Handle better the status codes.
Add a way to instruct the upper layer to don't bother w/ new requests if/when a device queue is full/busy or the device is unavailabale at that time Use scsipi_inquiry_data instead of its own inquiry structure
This commit is contained in:
dante
parent
1937dbee6a
commit
94cd08a535
225
sys/dev/ic/adw.c
225
sys/dev/ic/adw.c
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@ -1,4 +1,4 @@
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/* $NetBSD: adw.c,v 1.20 2000/05/10 21:22:34 dante Exp $ */
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/* $NetBSD: adw.c,v 1.21 2000/05/14 18:25:49 dante Exp $ */
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/*
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* Generic driver for the Advanced Systems Inc. SCSI controllers
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@ -92,6 +92,7 @@ static void adw_print_info __P((ADW_SOFTC *, int));
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static int adw_poll __P((ADW_SOFTC *, struct scsipi_xfer *, int));
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static void adw_timeout __P((void *));
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static void adw_reset_bus __P((ADW_SOFTC *, struct scsipi_xfer *));
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/******************************************************************************/
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@ -566,6 +567,10 @@ adw_attach(sc)
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sc->sc_dev.dv_xname, i, ADW_MAX_CARRIER);
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}
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/*
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* Zero's the freeze_device status
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*/
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bzero(sc->sc_freeze_dev, sizeof(sc->sc_freeze_dev));
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/*
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* Initialize the adapter
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@ -691,10 +696,20 @@ adw_scsi_cmd(xs)
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* called with the first queue entry as our argument.
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*/
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if (xs == TAILQ_FIRST(&sc->sc_queue)) {
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if(sc->sc_freeze_dev[xs->sc_link->scsipi_scsi.target]) {
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splx(s);
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return (TRY_AGAIN_LATER);
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}
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TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
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fromqueue = 1;
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nowait = 1;
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} else {
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if(sc->sc_freeze_dev[xs->sc_link->scsipi_scsi.target]) {
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splx(s);
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xs->error = XS_DRIVER_STUFFUP;
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return (TRY_AGAIN_LATER);
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}
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/* Polled requests can't be queued for later. */
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dontqueue = xs->xs_control & XS_CTL_POLL;
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@ -835,9 +850,7 @@ adw_build_req(xs, ccb, flags)
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scsiqp->vsense_addr = &ccb->scsi_sense;
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scsiqp->sense_addr = sc->sc_dmamap_control->dm_segs[0].ds_addr +
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ADW_CCB_OFF(ccb) + offsetof(struct adw_ccb, scsi_sense);
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/* scsiqp->sense_addr = ccb->hashkey +
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offsetof(struct adw_ccb, scsi_sense);
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*/ scsiqp->sense_len = sizeof(struct scsipi_sense_data);
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scsiqp->sense_len = sizeof(struct scsipi_sense_data);
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/*
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* Build ADW_SCSI_REQ_Q for a scatter-gather buffer command.
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@ -1023,17 +1036,8 @@ adw_timeout(arg)
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* reinitialize the host adapter.
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*/
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callout_stop(&xs->xs_callout);
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printf(" AGAIN. Resetting SCSI Bus\n");
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AdvResetSCSIBus(sc);
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while((ccb = TAILQ_LAST(&sc->sc_pending_ccb,
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adw_pending_ccb)) != NULL) {
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callout_stop(&ccb->xs->xs_callout);
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TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
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TAILQ_INSERT_HEAD(&sc->sc_waiting_ccb, ccb, chain);
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}
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adw_queue_ccb(sc, TAILQ_FIRST(&sc->sc_waiting_ccb), 1);
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adw_reset_bus(sc, xs);
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splx(s);
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return;
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} else if (ccb->flags & CCB_ABORTING) {
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@ -1108,6 +1112,27 @@ adw_timeout(arg)
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}
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static void
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adw_reset_bus(sc, xs)
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ADW_SOFTC *sc;
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struct scsipi_xfer *xs;
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{
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ADW_CCB *ccb;
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int s;
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s = splbio();
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AdvResetSCSIBus(sc);
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while((ccb = TAILQ_LAST(&sc->sc_pending_ccb,
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adw_pending_ccb)) != NULL) {
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callout_stop(&ccb->xs->xs_callout);
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TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
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TAILQ_INSERT_HEAD(&sc->sc_waiting_ccb, ccb, chain);
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}
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adw_queue_ccb(sc, TAILQ_FIRST(&sc->sc_waiting_ccb), 1);
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splx(s);
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}
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/******************************************************************************/
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/* Host Adapter and Peripherals Information Routines */
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/******************************************************************************/
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@ -1237,89 +1262,137 @@ adw_isr_callback(sc, scsiq)
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* 'host_status' conatins the host adapter status.
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* 'scsi_status' contains the scsi peripheral status.
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*/
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switch (scsiq->done_status) {
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case QD_NO_ERROR:
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xs->error = XS_NOERROR;
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xs->resid = scsiq->data_cnt;
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#ifdef ADW_DEBUG
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/* Check for an underrun condition. */
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if ((xs->datalen != 0) && (scsiq->data_cnt != 0) &&
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(scsiq->data_cnt <= xs->datalen)) {
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printf("%s: underrun condition %d bytes\n",
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sc->sc_dev.dv_xname, scsiq->data_cnt);
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}
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#endif
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if ((scsiq->cdb[0] == INQUIRY) && (scsiq->target_lun == 0)) {
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if ((scsiq->host_status == QHSTA_NO_ERROR) &&
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((scsiq->done_status == QD_NO_ERROR) ||
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(scsiq->done_status == QD_WITH_ERROR))) {
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switch (scsiq->host_status) {
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case SCSI_STATUS_GOOD:
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if ((scsiq->cdb[0] == INQUIRY) &&
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(scsiq->target_lun == 0)) {
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adw_print_info(sc, scsiq->target_id);
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}
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xs->error = XS_NOERROR;
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xs->resid = scsiq->data_cnt;
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sc->sc_freeze_dev[scsiq->target_id] = 0;
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break;
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case QD_WITH_ERROR:
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switch (scsiq->host_status) {
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case QHSTA_NO_ERROR:
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switch(scsiq->scsi_status) {
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case SS_CHK_CONDITION:
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case SCSI_STATUS_CHECK_CONDITION:
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case SCSI_STATUS_CMD_TERMINATED:
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s1 = &ccb->scsi_sense;
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s2 = &xs->sense.scsi_sense;
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*s2 = *s1;
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xs->error = XS_SENSE;
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sc->sc_freeze_dev[scsiq->target_id] = 1;
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break;
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default:
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xs->error = XS_DRIVER_STUFFUP;
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#ifdef ADW_DEBUG
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printf("%s: Command %d completed with error."
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" SCSI Status = %d\n",
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sc->sc_dev.dv_xname, scsiq->cdb[0],
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scsiq->scsi_status);
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#endif
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xs->error = XS_BUSY;
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sc->sc_freeze_dev[scsiq->target_id] = 1;
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break;
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}
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} else if (scsiq->done_status == QD_ABORTED_BY_HOST) {
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xs->error = XS_DRIVER_STUFFUP;
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} else {
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switch (scsiq->host_status) {
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case QHSTA_M_SEL_TIMEOUT:
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xs->error = XS_SELTIMEOUT;
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break;
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case QHSTA_M_SXFR_OFF_UFLW:
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case QHSTA_M_SXFR_OFF_OFLW:
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case QHSTA_M_DATA_OVER_RUN:
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printf("%s: Overrun/Overflow/Underflow condition\n",
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sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_SXFR_DESELECTED:
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case QHSTA_M_UNEXPECTED_BUS_FREE:
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printf("%s: Unexpected BUS free\n",sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_SCSI_BUS_RESET:
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case QHSTA_M_SCSI_BUS_RESET_UNSOL:
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printf("%s: BUS Reset\n", sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_BUS_DEVICE_RESET:
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printf("%s: Device Reset\n", sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_QUEUE_ABORTED:
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printf("%s: Queue Aborted\n", sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_SXFR_SDMA_ERR:
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case QHSTA_M_SXFR_SXFR_PERR:
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case QHSTA_M_RDMA_PERR:
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/*
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* SCSI DMA Error. This should *NEVER* happen!
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* DMA Error. This should *NEVER* happen!
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*
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* Lets try resetting the bus and reinitialize
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* the host adapter.
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*/
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AdvResetSCSIBus(sc);
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while((ccb = TAILQ_LAST(&sc->sc_pending_ccb,
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adw_pending_ccb)) != NULL) {
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callout_stop(&ccb->xs->xs_callout);
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TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
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TAILQ_INSERT_HEAD(&sc->sc_waiting_ccb, ccb, chain);
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}
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adw_queue_ccb(sc, TAILQ_FIRST(&sc->sc_waiting_ccb), 1);
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return;
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default:
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xs->error = XS_DRIVER_STUFFUP;
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#ifdef ADW_DEBUG
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printf("%s: Command %d completed with error."
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" Host Status = %d\n",
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sc->sc_dev.dv_xname, scsiq->cdb[0],
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scsiq->host_status);
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#endif
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break;
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}
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printf("%s: DMA Error. Reseting bus\n",
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sc->sc_dev.dv_xname);
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adw_reset_bus(sc, xs);
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xs->error = XS_BUSY;
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break;
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case QD_ABORTED_BY_HOST:
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case QHSTA_M_WTM_TIMEOUT:
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case QHSTA_M_SXFR_WD_TMO:
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/* The SCSI bus hung in a phase */
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printf("%s: Watch Dog timer expired. Reseting bus\n",
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sc->sc_dev.dv_xname);
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adw_reset_bus(sc, xs);
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xs->error = XS_BUSY;
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break;
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case QHSTA_M_SXFR_XFR_PH_ERR:
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printf("%s: Transfer Error\n", sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_BAD_CMPL_STATUS_IN:
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/* No command complete after a status message */
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printf("%s: Bad Completion Status\n",
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sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_AUTO_REQ_SENSE_FAIL:
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printf("%s: Auto Sense Failed\n", sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_INVALID_DEVICE:
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printf("%s: Invalid Device\n", sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_NO_AUTO_REQ_SENSE:
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/*
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* User didn't request sense, but we got a
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* check condition.
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*/
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printf("%s: Unexpected Check Condition\n",
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sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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break;
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case QHSTA_M_SXFR_UNKNOWN_ERROR:
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printf("%s: Unknown Error\n", sc->sc_dev.dv_xname);
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xs->error = XS_DRIVER_STUFFUP;
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printf("%s: Command aborted by host.\n", sc->sc_dev.dv_xname);
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break;
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default:
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xs->error = XS_DRIVER_STUFFUP;
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#ifdef ADW_DEBUG
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printf("%s: Command %d completed with error."
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" Done Status = %d\n",
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sc->sc_dev.dv_xname, scsiq->cdb[0],
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scsiq->done_status);
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#endif
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break;
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panic("%s: Unhandled Host Status Error %x",
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sc->sc_dev.dv_xname, scsiq->host_status);
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}
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}
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TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
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@ -1339,9 +1412,7 @@ adw_async_callback(sc, code)
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{
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switch (code) {
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case ADV_ASYNC_SCSI_BUS_RESET_DET:
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/*
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* The firmware detected a SCSI Bus reset.
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*/
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/* The firmware detected a SCSI Bus reset. */
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printf("%s: SCSI Bus reset detected\n", sc->sc_dev.dv_xname);
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break;
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@ -1356,17 +1427,13 @@ adw_async_callback(sc, code)
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break;
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case ADV_HOST_SCSI_BUS_RESET:
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/*
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* Host generated SCSI bus reset occurred.
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*/
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/* Host generated SCSI bus reset occurred. */
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printf("%s: Host generated SCSI bus reset occurred\n",
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sc->sc_dev.dv_xname);
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break;
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case ADV_ASYNC_CARRIER_READY_FAILURE:
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/*
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* Carrier Ready failure.
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*/
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/* Carrier Ready failure. */
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printf("%s: Carrier Ready failure!\n", sc->sc_dev.dv_xname);
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break;
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@ -1,4 +1,4 @@
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/* $NetBSD: adwlib.c,v 1.12 2000/05/10 21:22:34 dante Exp $ */
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/* $NetBSD: adwlib.c,v 1.13 2000/05/14 18:25:49 dante Exp $ */
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/*
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* Low level routines for the Advanced Systems Inc. SCSI controllers chips
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@ -3033,11 +3033,7 @@ ADW_SOFTC *sc;
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}
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/* Translate initialization return value to status value. */
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if (status == 0) {
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status = ADW_TRUE;
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} else {
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status = ADW_FALSE;
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}
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status = (status == 0)? ADW_TRUE : ADW_FALSE;
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/*
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* Restore the BIOS signature word.
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@ -3248,7 +3244,7 @@ u_int32_t idle_cmd_parameter;
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{
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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int result;
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u_int16_t result;
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u_int32_t i, j, s;
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s = splbio();
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@ -3256,8 +3252,6 @@ u_int32_t idle_cmd_parameter;
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/*
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* Clear the idle command status which is set by the microcode
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* to a non-zero value to indicate when the command is completed.
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* The non-zero result is one of the IDLE_CMD_STATUS_* values
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* defined in a_advlib.h.
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*/
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ADW_WRITE_WORD_LRAM(iot, ioh, ASC_MC_IDLE_CMD_STATUS, (u_int16_t) 0);
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@ -3318,7 +3312,7 @@ ADW_SCSI_REQ_Q *scsiq;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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u_int8_t tid;
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ADW_SCSI_INQUIRY *inq;
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struct scsipi_inquiry_data *inq;
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u_int16_t tidmask;
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u_int16_t cfg_word;
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@ -3339,12 +3333,13 @@ ADW_SCSI_REQ_Q *scsiq;
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tid = scsiq->target_id;
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inq = (ADW_SCSI_INQUIRY *) scsiq->vdata_addr;
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inq = (struct scsipi_inquiry_data *) scsiq->vdata_addr;
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/*
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* WDTR, SDTR, and Tag Queuing cannot be enabled for old devices.
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*/
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if (inq->rsp_data_fmt < 2 && inq->ansi_apr_ver < 2) {
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if (((inq->response_format & SID_RespDataFmt) < 2) /*SCSI-1 | CCS*/ &&
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((inq->version & SID_ANSII) < 2)) {
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return;
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} else {
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/*
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@ -3369,7 +3364,7 @@ ADW_SCSI_REQ_Q *scsiq;
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#ifdef SCSI_ADW_WDTR_DISABLE
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if(!(tidmask & SCSI_ADW_WDTR_DISABLE))
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#endif /* SCSI_ADW_WDTR_DISABLE */
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if ((sc->wdtr_able & tidmask) && inq->WBus16) {
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if ((sc->wdtr_able & tidmask) && (inq->flags3 & SID_WBus16)) {
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ADW_READ_WORD_LRAM(iot, ioh, ASC_MC_WDTR_ABLE,
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cfg_word);
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if ((cfg_word & tidmask) == 0) {
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@ -3407,7 +3402,7 @@ ADW_SCSI_REQ_Q *scsiq;
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#ifdef SCSI_ADW_SDTR_DISABLE
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if(!(tidmask & SCSI_ADW_SDTR_DISABLE))
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#endif /* SCSI_ADW_SDTR_DISABLE */
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if ((sc->sdtr_able & tidmask) && inq->Sync) {
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if ((sc->sdtr_able & tidmask) && (inq->flags3 & SID_Sync)) {
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ADW_READ_WORD_LRAM(iot, ioh, ASC_MC_SDTR_ABLE, cfg_word);
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if ((cfg_word & tidmask) == 0) {
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cfg_word |= tidmask;
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@ -3442,7 +3437,8 @@ ADW_SCSI_REQ_Q *scsiq;
|
|||
* and WDTR messages to negotiate synchronous speed
|
||||
* and offset, transfer width, and protocol options.
|
||||
*/
|
||||
if (inq->Clocking & INQ_CLOCKING_DT_ONLY)
|
||||
if ((inq->flags4 & SID_Cloacking) &
|
||||
SIDV_CLOCKING_DT_ONLY)
|
||||
{
|
||||
ADW_READ_WORD_LRAM(iot, ioh, ASC_MC_PPR_ABLE,
|
||||
sc->ppr_able);
|
||||
|
|
@ -3467,7 +3463,7 @@ ADW_SCSI_REQ_Q *scsiq;
|
|||
#ifdef SCSI_ADW_TAGQ_DISABLE
|
||||
if(!(tidmask & SCSI_ADW_TAGQ_DISABLE))
|
||||
#endif /* SCSI_ADW_TAGQ_DISABLE */
|
||||
if ((sc->tagqng_able & tidmask) && inq->CmdQue) {
|
||||
if ((sc->tagqng_able & tidmask) && (inq->flags3 & SID_CmdQue)) {
|
||||
ADW_READ_WORD_LRAM(iot, ioh, ASC_MC_TAGQNG_ABLE,
|
||||
cfg_word);
|
||||
cfg_word |= tidmask;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: adwlib.h,v 1.10 2000/05/10 21:22:34 dante Exp $ */
|
||||
/* $NetBSD: adwlib.h,v 1.11 2000/05/14 18:25:49 dante Exp $ */
|
||||
|
||||
/*
|
||||
* Definitions for low level routines and data structures
|
||||
|
|
@ -1017,6 +1017,8 @@ typedef struct adw_softc {
|
|||
|
||||
TAILQ_HEAD(, scsipi_xfer) sc_queue;
|
||||
|
||||
int sc_freeze_dev[ADW_MAX_TID];
|
||||
|
||||
ADW_CALLBACK isr_callback; /* pointer to function, called in AdvISR() */
|
||||
ADW_CALLBACK async_callback; /* pointer to function, called in AdvISR() */
|
||||
u_int16_t bios_ctrl; /* BIOS control word, EEPROM word 12 */
|
||||
|
|
@ -1134,15 +1136,15 @@ typedef struct adw_scsi_req_q {
|
|||
/*
|
||||
* ASC_SCSI_REQ_Q 'scsi_status' return values.
|
||||
*/
|
||||
#define SS_GOOD 0x00
|
||||
#define SS_CHK_CONDITION 0x02
|
||||
#define SS_CONDITION_MET 0x04
|
||||
#define SS_TARGET_BUSY 0x08
|
||||
#define SS_INTERMID 0x10
|
||||
#define SS_INTERMID_COND_MET 0x14
|
||||
#define SS_RSERV_CONFLICT 0x18
|
||||
#define SS_CMD_TERMINATED 0x22
|
||||
#define SS_QUEUE_FULL 0x28
|
||||
#define SCSI_STATUS_GOOD 0x00
|
||||
#define SCSI_STATUS_CHECK_CONDITION 0x02
|
||||
#define SCSI_STATUS_CONDITION_MET 0x04
|
||||
#define SCSI_STATUS_TARGET_BUSY 0x08
|
||||
#define SCSI_STATUS_INTERMID 0x10
|
||||
#define SCSI_STATUS_INTERMID_COND_MET 0x14
|
||||
#define SCSI_STATUS_RSERV_CONFLICT 0x18
|
||||
#define SCSI_STATUS_CMD_TERMINATED 0x22
|
||||
#define SCSI_STATUS_QUEUE_FULL 0x28
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -1315,52 +1317,6 @@ do { \
|
|||
*/
|
||||
#define ADW_TID_TO_TIDMASK(tid) (0x01 << ((tid) & ADW_MAX_TID))
|
||||
|
||||
/*
|
||||
* SCSI Iquiry structure
|
||||
*/
|
||||
#define INQ_CLOCKING_ST_ONLY 0x0
|
||||
#define INQ_CLOCKING_DT_ONLY 0x1
|
||||
#define INQ_CLOCKING_ST_AND_DT 0x3
|
||||
|
||||
typedef struct {
|
||||
u_int8_t peri_dvc_type : 5; /* peripheral device type */
|
||||
u_int8_t peri_qualifier : 3; /* peripheral qualifier */
|
||||
u_int8_t dvc_type_modifier : 7; /* device type modifier (for SCSI I) */
|
||||
u_int8_t rmb : 1; /* RMB - removable medium bit */
|
||||
u_int8_t ansi_apr_ver : 3; /* ANSI approved version */
|
||||
u_int8_t ecma_ver : 3; /* ECMA version */
|
||||
u_int8_t iso_ver : 2; /* ISO version */
|
||||
u_int8_t rsp_data_fmt : 4; /* response data format */
|
||||
/* 0 SCSI 1 */
|
||||
/* 1 CCS */
|
||||
/* 2 SCSI-2 */
|
||||
/* 3-F reserved */
|
||||
u_int8_t res1 : 2; /* reserved */
|
||||
u_int8_t TemIOP : 1; /* terminate I/O process bit (see 5.6.22) */
|
||||
u_int8_t aenc : 1; /* asynch. event notification (processor) */
|
||||
u_int8_t add_len; /* additional length */
|
||||
u_int8_t res2; /* reserved */
|
||||
u_int8_t res3; /* reserved */
|
||||
u_int8_t StfRe : 1; /* soft reset implemented */
|
||||
u_int8_t CmdQue : 1; /* command queuing */
|
||||
u_int8_t res4 : 1; /* reserved */
|
||||
u_int8_t Linked : 1; /* linked command for this logical unit */
|
||||
u_int8_t Sync : 1; /* synchronous data transfer */
|
||||
u_int8_t WBus16 : 1; /* wide bus 16 bit data transfer */
|
||||
u_int8_t WBus32 : 1; /* wide bus 32 bit data transfer */
|
||||
u_int8_t RelAdr : 1; /* relative addressing mode */
|
||||
u_int8_t vendor_id[8]; /* vendor identification */
|
||||
u_int8_t product_id[16]; /* product identification */
|
||||
u_int8_t product_rev_level[4]; /* product revision level */
|
||||
u_int8_t vendor_specific[20]; /* vendor specific */
|
||||
u_int8_t IUS : 1; /* information unit supported */
|
||||
u_int8_t QAS : 1; /* quick arbitrate supported */
|
||||
u_int8_t Clocking : 2; /* clocking field */
|
||||
u_int8_t res5 : 4; /* reserved */
|
||||
u_int8_t res6; /* reserved */
|
||||
} ADW_SCSI_INQUIRY; /* 58 bytes */
|
||||
|
||||
|
||||
/*
|
||||
* Adv Library functions available to drivers.
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in New Issue