modifications to the threshold and nicer error checking from christos
and .. splhigh() around insw/outsw code.. yetch
This commit is contained in:
deraadt
parent
73aca695ac
commit
943735dc41
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@ -27,7 +27,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_ep.c,v 1.41 1994/06/04 01:52:28 deraadt Exp $
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* $Id: if_ep.c,v 1.42 1994/07/01 23:08:11 deraadt Exp $
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*/
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#include "bpfilter.h"
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@ -459,7 +459,7 @@ epstart(ifp)
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{
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register struct ep_softc *sc = epcd.cd_devs[ifp->if_unit];
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struct mbuf *m, *top;
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int s, len, pad;
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int s, sh, len, pad;
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s = splimp();
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if (sc->sc_arpcom.ac_if.if_flags & IFF_OACTIVE) {
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@ -496,15 +496,14 @@ startagain:
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goto readcheck;
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}
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
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if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) {
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
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/* not enough room in FIFO */
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sc->sc_arpcom.ac_if.if_flags |= IFF_OACTIVE;
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splx(s);
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return (0);
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} else {
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | 2044);
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outw(BASE + EP_COMMAND, ACK_INTR | S_TX_AVAIL);
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}
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IF_DEQUEUE(&sc->sc_arpcom.ac_if.if_snd, m);
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@ -518,6 +517,8 @@ startagain:
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outw(BASE + EP_W1_TX_PIO_WR_1, len);
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outw(BASE + EP_W1_TX_PIO_WR_1, 0xffff); /* Second dword meaningless */
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sh = splhigh();
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for (top = m; m != 0; m = m->m_next) {
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if (sc->bus32bit) {
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outsl(BASE + EP_W1_TX_PIO_WR_1, mtod(m, caddr_t),
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@ -533,9 +534,12 @@ startagain:
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*(mtod(m, caddr_t) + m->m_len - 1));
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}
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}
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while (pad--)
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outb(BASE + EP_W1_TX_PIO_WR_1, 0); /* Padding */
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splx(sh);
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#if NBPFILTER > 0
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if (sc->sc_arpcom.ac_if.if_bpf)
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bpf_mtap(sc->sc_arpcom.ac_if.if_bpf, top);
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@ -556,6 +560,48 @@ readcheck:
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goto startagain;
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}
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static void
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eptxstat(sc)
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register struct ep_softc *sc;
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{
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int i;
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/*
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* We need to read+write TX_STATUS until we get a 0 status
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* in order to turn off the interrupt flag.
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*/
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while ((i = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) {
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outb(BASE + EP_W1_TX_STATUS, 0x0);
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if (i & TXS_JABBER) {
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++sc->sc_arpcom.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
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printf("%s: jabber (%x)\n",
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sc->sc_dev.dv_xname, i);
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epreset(sc);
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} else if (i & TXS_UNDERRUN) {
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++sc->sc_arpcom.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
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printf("%s: fifo underrun (%x) @%d\n",
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sc->sc_dev.dv_xname, i,
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sc->tx_start_thresh);
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if (sc->tx_succ_ok < 100)
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sc->tx_start_thresh = min(ETHER_MAX_LEN,
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sc->tx_start_thresh + 20);
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sc->tx_succ_ok = 0;
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epreset(sc);
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} else if (i & TXS_MAX_COLLISION) {
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++sc->sc_arpcom.ac_if.if_collisions;
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outw(BASE + EP_COMMAND, TX_ENABLE);
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sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
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} else
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sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
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}
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}
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int
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epintr(sc)
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register struct ep_softc *sc;
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@ -574,7 +620,6 @@ epintr(sc)
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if (status & S_RX_COMPLETE)
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epread(sc);
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if (status & S_TX_AVAIL) {
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inw(BASE + EP_W1_FREE_TX);
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sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
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epstart(&sc->sc_arpcom.ac_if);
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}
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@ -586,37 +631,7 @@ epintr(sc)
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return (1);
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}
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if (status & S_TX_COMPLETE) {
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/*
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* We need to read+write TX_STATUS until we get a 0 status
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* in order to turn off the interrupt flag.
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*/
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while ((i = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) {
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outb(BASE + EP_W1_TX_STATUS, 0x0);
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if (i & TXS_JABBER) {
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++sc->sc_arpcom.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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printf("%s: jabber (%x %x)\n",
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sc->sc_dev.dv_xname, status, i);
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epreset(sc);
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} else if (i & TXS_UNDERRUN) {
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++sc->sc_arpcom.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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printf("%s: fifo underrun (%x %x), correcting\n",
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sc->sc_dev.dv_xname, status, i);
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if (sc->tx_succ_ok < 100)
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sc->tx_start_thresh = min(ETHER_MAX_LEN,
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sc->tx_start_thresh + 20);
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sc->tx_succ_ok = 0;
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epreset(sc);
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} else if (i & TXS_MAX_COLLISION) {
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++sc->sc_arpcom.ac_if.if_collisions;
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outw(BASE + EP_COMMAND, TX_ENABLE);
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sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
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} else
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sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
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}
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eptxstat(sc);
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epstart(ifp);
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}
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status = inw(BASE + EP_STATUS) &
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@ -634,15 +649,39 @@ epread(sc)
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struct ether_header *eh;
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struct mbuf *mcur, *m, *m0, *top;
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int totlen, lenthisone;
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int save_totlen;
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int save_totlen, sh;
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totlen = inw(BASE + EP_W1_RX_STATUS);
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top = 0;
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if (totlen & ERR_RX) {
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if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG) {
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int err = totlen & ERR_MASK;
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char *s = NULL;
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if (totlen & ERR_INCOMPLETE)
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s = "incomplete packet";
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else if (err == ERR_OVERRUN)
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s = "packet overrun";
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else if (err == ERR_RUNT)
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s = "runt packet";
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else if (err == ERR_ALIGNMENT)
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s = "bad alignment";
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else if (err == ERR_CRC)
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s = "bad crc";
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else if (err == ERR_OVERSIZE)
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s = "oversized packet";
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else if (err == ERR_DRIBBLE)
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s = "dribble bits";
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if (s)
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printf("%s: %s\n", sc->sc_dev.dv_xname, s);
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}
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if (totlen & (ERR_INCOMPLETE|ERR_RX)) {
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++sc->sc_arpcom.ac_if.if_ierrors;
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goto out;
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}
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save_totlen = totlen &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */
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m = sc->mb[sc->next_mb];
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@ -662,6 +701,9 @@ epread(sc)
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#define EROUND ((sizeof(struct ether_header) + 3) & ~3)
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#define EOFF (EROUND - sizeof(struct ether_header))
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m0->m_data += EOFF;
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sh = splhigh();
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/* Read what should be the header. */
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insw(BASE + EP_W1_RX_PIO_RD_1,
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mtod(m0, caddr_t), sizeof(struct ether_header) / 2);
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@ -676,8 +718,10 @@ epread(sc)
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sc->mb[sc->next_mb] = 0;
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if (!m) {
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MGET(m, M_DONTWAIT, MT_DATA);
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if (m == 0)
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if (m == 0) {
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splx(sh);
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goto out;
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}
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} else {
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timeout(epmbuffill, sc, 1);
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sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
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@ -710,6 +754,7 @@ epread(sc)
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top->m_pkthdr.len = save_totlen;
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top->m_pkthdr.rcvif = &sc->sc_arpcom.ac_if;
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outw(BASE + EP_COMMAND, RX_DISCARD_TOP_PACK);
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splx(sh);
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while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS)
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;
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++sc->sc_arpcom.ac_if.if_ipackets;
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@ -21,7 +21,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_epreg.h,v 1.4 1994/04/15 10:51:36 deraadt Exp $
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* $Id: if_epreg.h,v 1.5 1994/07/01 23:08:15 deraadt Exp $
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*/
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/*
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@ -219,7 +219,7 @@
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*
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* 15: Incomplete or FIFO empty.
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* 14: 1: Error in RX Packet 0: Incomplete or no error.
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* 13-11: Type of error.
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* 14-11: Type of error. [14-11]
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* 1000 = Overrun.
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* 1011 = Run Packet Error.
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* 1100 = Alignment Error.
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@ -232,13 +232,13 @@
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*/
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#define ERR_INCOMPLETE (u_short) (0x8000)
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#define ERR_RX (u_short) (0x4000)
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#define ERR_RX_PACKET (u_short) (0x2000)
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#define ERR_OVERRUN (u_short) (0x1000)
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#define ERR_RUNT (u_short) (0x1300)
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#define ERR_ALIGNMENT (u_short) (0x1400)
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#define ERR_CRC (u_short) (0x1500)
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#define ERR_OVERSIZE (u_short) (0x1100)
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#define ERR_DRIBBLE (u_short) (0x0200)
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#define ERR_MASK (u_short) (0x7800)
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#define ERR_OVERRUN (u_short) (0x4000)
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#define ERR_RUNT (u_short) (0x5800)
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#define ERR_ALIGNMENT (u_short) (0x6000)
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#define ERR_CRC (u_short) (0x6800)
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#define ERR_OVERSIZE (u_short) (0x4800)
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#define ERR_DRIBBLE (u_short) (0x1000)
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/*
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* TX Status
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@ -27,7 +27,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_ep.c,v 1.41 1994/06/04 01:52:28 deraadt Exp $
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* $Id: if_ep.c,v 1.42 1994/07/01 23:08:11 deraadt Exp $
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*/
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#include "bpfilter.h"
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@ -459,7 +459,7 @@ epstart(ifp)
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{
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register struct ep_softc *sc = epcd.cd_devs[ifp->if_unit];
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struct mbuf *m, *top;
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int s, len, pad;
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int s, sh, len, pad;
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s = splimp();
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if (sc->sc_arpcom.ac_if.if_flags & IFF_OACTIVE) {
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@ -496,15 +496,14 @@ startagain:
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goto readcheck;
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}
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
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if (inw(BASE + EP_W1_FREE_TX) < len + pad + 4) {
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
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/* not enough room in FIFO */
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sc->sc_arpcom.ac_if.if_flags |= IFF_OACTIVE;
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splx(s);
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return (0);
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} else {
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outw(BASE + EP_COMMAND, SET_TX_AVAIL_THRESH | 2044);
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outw(BASE + EP_COMMAND, ACK_INTR | S_TX_AVAIL);
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}
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IF_DEQUEUE(&sc->sc_arpcom.ac_if.if_snd, m);
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@ -518,6 +517,8 @@ startagain:
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outw(BASE + EP_W1_TX_PIO_WR_1, len);
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outw(BASE + EP_W1_TX_PIO_WR_1, 0xffff); /* Second dword meaningless */
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sh = splhigh();
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for (top = m; m != 0; m = m->m_next) {
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if (sc->bus32bit) {
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outsl(BASE + EP_W1_TX_PIO_WR_1, mtod(m, caddr_t),
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@ -533,9 +534,12 @@ startagain:
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*(mtod(m, caddr_t) + m->m_len - 1));
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}
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}
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while (pad--)
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outb(BASE + EP_W1_TX_PIO_WR_1, 0); /* Padding */
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splx(sh);
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#if NBPFILTER > 0
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if (sc->sc_arpcom.ac_if.if_bpf)
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bpf_mtap(sc->sc_arpcom.ac_if.if_bpf, top);
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@ -556,6 +560,48 @@ readcheck:
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goto startagain;
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}
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static void
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eptxstat(sc)
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register struct ep_softc *sc;
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{
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int i;
|
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/*
|
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* We need to read+write TX_STATUS until we get a 0 status
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* in order to turn off the interrupt flag.
|
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*/
|
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while ((i = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) {
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outb(BASE + EP_W1_TX_STATUS, 0x0);
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if (i & TXS_JABBER) {
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++sc->sc_arpcom.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
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printf("%s: jabber (%x)\n",
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sc->sc_dev.dv_xname, i);
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epreset(sc);
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} else if (i & TXS_UNDERRUN) {
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++sc->sc_arpcom.ac_if.if_oerrors;
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untimeout(epmbuffill, sc);
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if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
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printf("%s: fifo underrun (%x) @%d\n",
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sc->sc_dev.dv_xname, i,
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sc->tx_start_thresh);
|
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if (sc->tx_succ_ok < 100)
|
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sc->tx_start_thresh = min(ETHER_MAX_LEN,
|
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sc->tx_start_thresh + 20);
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sc->tx_succ_ok = 0;
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epreset(sc);
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} else if (i & TXS_MAX_COLLISION) {
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++sc->sc_arpcom.ac_if.if_collisions;
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outw(BASE + EP_COMMAND, TX_ENABLE);
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sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
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} else
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sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
|
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|
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}
|
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}
|
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|
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int
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epintr(sc)
|
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register struct ep_softc *sc;
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|
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@ -574,7 +620,6 @@ epintr(sc)
|
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if (status & S_RX_COMPLETE)
|
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epread(sc);
|
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if (status & S_TX_AVAIL) {
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inw(BASE + EP_W1_FREE_TX);
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sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
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epstart(&sc->sc_arpcom.ac_if);
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}
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|
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@ -586,37 +631,7 @@ epintr(sc)
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return (1);
|
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}
|
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if (status & S_TX_COMPLETE) {
|
||||
/*
|
||||
* We need to read+write TX_STATUS until we get a 0 status
|
||||
* in order to turn off the interrupt flag.
|
||||
*/
|
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while ((i = inb(BASE + EP_W1_TX_STATUS)) & TXS_COMPLETE) {
|
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outb(BASE + EP_W1_TX_STATUS, 0x0);
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|
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if (i & TXS_JABBER) {
|
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++sc->sc_arpcom.ac_if.if_oerrors;
|
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untimeout(epmbuffill, sc);
|
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printf("%s: jabber (%x %x)\n",
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sc->sc_dev.dv_xname, status, i);
|
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epreset(sc);
|
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} else if (i & TXS_UNDERRUN) {
|
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++sc->sc_arpcom.ac_if.if_oerrors;
|
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untimeout(epmbuffill, sc);
|
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printf("%s: fifo underrun (%x %x), correcting\n",
|
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sc->sc_dev.dv_xname, status, i);
|
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if (sc->tx_succ_ok < 100)
|
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sc->tx_start_thresh = min(ETHER_MAX_LEN,
|
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sc->tx_start_thresh + 20);
|
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sc->tx_succ_ok = 0;
|
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epreset(sc);
|
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} else if (i & TXS_MAX_COLLISION) {
|
||||
++sc->sc_arpcom.ac_if.if_collisions;
|
||||
outw(BASE + EP_COMMAND, TX_ENABLE);
|
||||
sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
|
||||
} else
|
||||
sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
|
||||
|
||||
}
|
||||
eptxstat(sc);
|
||||
epstart(ifp);
|
||||
}
|
||||
status = inw(BASE + EP_STATUS) &
|
||||
|
|
@ -634,15 +649,39 @@ epread(sc)
|
|||
struct ether_header *eh;
|
||||
struct mbuf *mcur, *m, *m0, *top;
|
||||
int totlen, lenthisone;
|
||||
int save_totlen;
|
||||
int save_totlen, sh;
|
||||
|
||||
totlen = inw(BASE + EP_W1_RX_STATUS);
|
||||
top = 0;
|
||||
|
||||
if (totlen & ERR_RX) {
|
||||
if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG) {
|
||||
int err = totlen & ERR_MASK;
|
||||
char *s = NULL;
|
||||
|
||||
if (totlen & ERR_INCOMPLETE)
|
||||
s = "incomplete packet";
|
||||
else if (err == ERR_OVERRUN)
|
||||
s = "packet overrun";
|
||||
else if (err == ERR_RUNT)
|
||||
s = "runt packet";
|
||||
else if (err == ERR_ALIGNMENT)
|
||||
s = "bad alignment";
|
||||
else if (err == ERR_CRC)
|
||||
s = "bad crc";
|
||||
else if (err == ERR_OVERSIZE)
|
||||
s = "oversized packet";
|
||||
else if (err == ERR_DRIBBLE)
|
||||
s = "dribble bits";
|
||||
|
||||
if (s)
|
||||
printf("%s: %s\n", sc->sc_dev.dv_xname, s);
|
||||
}
|
||||
|
||||
if (totlen & (ERR_INCOMPLETE|ERR_RX)) {
|
||||
++sc->sc_arpcom.ac_if.if_ierrors;
|
||||
goto out;
|
||||
}
|
||||
|
||||
save_totlen = totlen &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */
|
||||
|
||||
m = sc->mb[sc->next_mb];
|
||||
|
|
@ -662,6 +701,9 @@ epread(sc)
|
|||
#define EROUND ((sizeof(struct ether_header) + 3) & ~3)
|
||||
#define EOFF (EROUND - sizeof(struct ether_header))
|
||||
m0->m_data += EOFF;
|
||||
|
||||
sh = splhigh();
|
||||
|
||||
/* Read what should be the header. */
|
||||
insw(BASE + EP_W1_RX_PIO_RD_1,
|
||||
mtod(m0, caddr_t), sizeof(struct ether_header) / 2);
|
||||
|
|
@ -676,8 +718,10 @@ epread(sc)
|
|||
sc->mb[sc->next_mb] = 0;
|
||||
if (!m) {
|
||||
MGET(m, M_DONTWAIT, MT_DATA);
|
||||
if (m == 0)
|
||||
if (m == 0) {
|
||||
splx(sh);
|
||||
goto out;
|
||||
}
|
||||
} else {
|
||||
timeout(epmbuffill, sc, 1);
|
||||
sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
|
||||
|
|
@ -710,6 +754,7 @@ epread(sc)
|
|||
top->m_pkthdr.len = save_totlen;
|
||||
top->m_pkthdr.rcvif = &sc->sc_arpcom.ac_if;
|
||||
outw(BASE + EP_COMMAND, RX_DISCARD_TOP_PACK);
|
||||
splx(sh);
|
||||
while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS)
|
||||
;
|
||||
++sc->sc_arpcom.ac_if.if_ipackets;
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: if_epreg.h,v 1.4 1994/04/15 10:51:36 deraadt Exp $
|
||||
* $Id: if_epreg.h,v 1.5 1994/07/01 23:08:15 deraadt Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
@ -219,7 +219,7 @@
|
|||
*
|
||||
* 15: Incomplete or FIFO empty.
|
||||
* 14: 1: Error in RX Packet 0: Incomplete or no error.
|
||||
* 13-11: Type of error.
|
||||
* 14-11: Type of error. [14-11]
|
||||
* 1000 = Overrun.
|
||||
* 1011 = Run Packet Error.
|
||||
* 1100 = Alignment Error.
|
||||
|
|
@ -232,13 +232,13 @@
|
|||
*/
|
||||
#define ERR_INCOMPLETE (u_short) (0x8000)
|
||||
#define ERR_RX (u_short) (0x4000)
|
||||
#define ERR_RX_PACKET (u_short) (0x2000)
|
||||
#define ERR_OVERRUN (u_short) (0x1000)
|
||||
#define ERR_RUNT (u_short) (0x1300)
|
||||
#define ERR_ALIGNMENT (u_short) (0x1400)
|
||||
#define ERR_CRC (u_short) (0x1500)
|
||||
#define ERR_OVERSIZE (u_short) (0x1100)
|
||||
#define ERR_DRIBBLE (u_short) (0x0200)
|
||||
#define ERR_MASK (u_short) (0x7800)
|
||||
#define ERR_OVERRUN (u_short) (0x4000)
|
||||
#define ERR_RUNT (u_short) (0x5800)
|
||||
#define ERR_ALIGNMENT (u_short) (0x6000)
|
||||
#define ERR_CRC (u_short) (0x6800)
|
||||
#define ERR_OVERSIZE (u_short) (0x4800)
|
||||
#define ERR_DRIBBLE (u_short) (0x1000)
|
||||
|
||||
/*
|
||||
* TX Status
|
||||
|
|
|
|||
Loading…
Reference in New Issue