Kill '$' in exported symbols.
This commit is contained in:
skrll
parent
fae01d956c
commit
93a4f7c66c
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.S,v 1.33 2009/05/08 09:33:58 skrll Exp $ */
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/* $NetBSD: locore.S,v 1.34 2009/05/24 09:17:59 skrll Exp $ */
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/* $OpenBSD: locore.S,v 1.158 2008/07/28 19:08:46 miod Exp $ */
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/*
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@ -237,9 +237,9 @@ ENTRY_NOPROFILE(start,0)
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/* XXX - we should create a real trapframe for lwp0 */
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copy %t3, %t2
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ldi NBPG+TRAPFRAME_SIZEOF, %t1
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$start_zero_tf:
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L$start_zero_tf:
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stws,ma %r0, 4(%t2)
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addib,>= -8, %t1, $start_zero_tf
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addib,>= -8, %t1, L$start_zero_tf
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stws,ma %r0, 4(%t2) /* XXX could use ,bc here, but gas is broken */
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/*
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@ -283,13 +283,13 @@ $start_zero_tf:
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* turn on virtual memory.
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*/
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copy %sp, %arg0
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ldil L%$qisnowon, %rp
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ldo R%$qisnowon(%rp), %rp
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ldil L%qisnowon, %rp
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ldo R%qisnowon(%rp), %rp
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b kernel_setup
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ldi PSW_Q|PSW_I, %arg1
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$qisnowon:
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qisnowon:
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copy %r4, %arg0
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copy %r5, %arg1
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/*
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@ -309,8 +309,8 @@ $qisnowon:
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*/
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mtctl %r0, %pcsq
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mtctl %r0, %pcsq
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ldil L%$virtual_mode, %t1
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ldo R%$virtual_mode(%t1), %t1
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ldil L%virtual_mode, %t1
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ldo R%virtual_mode(%t1), %t1
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mtctl %t1, %pcoq
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ldo 4(%t1), %t1
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mtctl %t1, %pcoq
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@ -326,7 +326,7 @@ $qisnowon:
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nop
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nop
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$virtual_mode:
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virtual_mode:
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ldil L%kernelmapped, %t1
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stw %t1, R%kernelmapped(%t1)
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@ -336,12 +336,12 @@ $virtual_mode:
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/* have to call debugger from here, from virtual mode */
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ldil L%boothowto, %r1
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ldw R%boothowto(%r1), %r1
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bb,>= %r1, 25, $noddb
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bb,>= %r1, 25, L$noddb
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nop
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break HPPA_BREAK_KERNEL, HPPA_BREAK_KGDB
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nop
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$noddb:
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L$noddb:
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#endif
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.import main,code
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@ -395,8 +395,8 @@ LEAF_ENTRY_NOPROFILE(kernel_setup)
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/*
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* load address of interrupt vector table
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*/
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ldil L%$ivaaddr,%t2
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ldo R%$ivaaddr(%t2),%t2
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ldil L%ivaaddr,%t2
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ldo R%ivaaddr(%t2),%t2
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mtctl %t2,%iva
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/*
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@ -668,10 +668,10 @@ ENTRY(hp700_intr_ipending_new,HPPA_FRAME_SIZE)
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* the addib runs with the mtsar in its delay slot.
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* If the addib branches, the mtsar is nullified.
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*/
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$hp700_inew_loop:
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L$hp700_inew_loop:
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mtsar %arg2
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bvb,>=,n %arg1, $hp700_inew_loop
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addib,<,n -1, %arg2, $hp700_inew_done
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bvb,>=,n %arg1, L$hp700_inew_loop
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addib,<,n -1, %arg2, L$hp700_inew_done
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/*
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* If the map entry for this bit has INT_REG_BIT_REG
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@ -683,11 +683,11 @@ $hp700_inew_loop:
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ldil L%INT_REG_BIT_REG, %t2
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ldo R%INT_REG_BIT_REG(%t2), %t2
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and %t1, %t2, %t3
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combt,=,n %t2, %t3, $hp700_inew_descend
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addib,>= -1, %arg2, $hp700_inew_loop
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combt,=,n %t2, %t3, L$hp700_inew_descend
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addib,>= -1, %arg2, L$hp700_inew_loop
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or %t1, %ret0, %ret0
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$hp700_inew_done:
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L$hp700_inew_done:
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/* End stack calling convention. */
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ldw HPPA_FRAME_CRP(%r3), %rp
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@ -695,7 +695,7 @@ $hp700_inew_done:
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bv %r0(%rp)
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ldw,mb -HPPA_FRAME_SIZE(%sp), %r3
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$hp700_inew_descend:
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L$hp700_inew_descend:
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/*
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* If the next interrupt register index is zero,
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@ -704,7 +704,7 @@ $hp700_inew_descend:
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* never descend into since it's the root.)
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*/
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andcm,<> %t1, %t2, %t1
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b,n $hp700_inew_unused
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b,n L$hp700_inew_unused
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/* Save our state. */
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stw %arg0, HPPA_FRAME_ARG(0)(%r3)
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@ -734,10 +734,10 @@ $hp700_inew_descend:
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ldw HPPA_FRAME_ARG(3)(%r3), %ret1
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or %ret1, %ret0, %ret0
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$hp700_inew_unused:
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addib,>= -1, %arg2, $hp700_inew_loop
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L$hp700_inew_unused:
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addib,>= -1, %arg2, L$hp700_inew_loop
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nop
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b,n $hp700_inew_done
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b,n L$hp700_inew_done
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EXIT(hp700_intr_ipending_new)
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/*
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@ -999,7 +999,7 @@ ENTRY_NOPROFILE(lwp_trampoline,HPPA_FRAME_SIZE)
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*/
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mfctl CR_CURLWP, %t2
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.call
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b $syscall_return
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b syscall_return
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ldw L_MD(%t2), %t3
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EXIT(lwp_trampoline)
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@ -1,4 +1,4 @@
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/* $NetBSD: copy.S,v 1.11 2009/05/09 12:18:29 skrll Exp $ */
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/* $NetBSD: copy.S,v 1.12 2009/05/24 09:17:59 skrll Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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@ -174,14 +174,14 @@ LEAF_ENTRY(spstrcpy)
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mtsp %arg2, %sr2
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copy %arg1, %arg0 /* save src */
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$spstrcpy_loop:
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comb,=,n %r0, %ret1, $spstrcpy_exit
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L$spstrcpy_loop:
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comb,=,n %r0, %ret1, L$spstrcpy_exit
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ldbs,ma 1(%sr1, %arg1), %t1
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stbs,ma %t1, 1(%sr2, %arg3)
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comb,<> %r0, %t1, $spstrcpy_loop
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comb,<> %r0, %t1, L$spstrcpy_loop
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ldo -1(%ret1), %ret1
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$spstrcpy_exit:
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L$spstrcpy_exit:
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/* reset fault handler */
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stw %r0, PCB_ONFAULT+U_PCB(%r31)
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mtsp %r0, %sr2 /* XXX need this? */
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@ -1,4 +1,4 @@
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/* $NetBSD: fpemu.S,v 1.4 2007/11/12 12:58:10 skrll Exp $ */
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/* $NetBSD: fpemu.S,v 1.5 2009/05/24 09:17:59 skrll Exp $ */
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/* $OpenBSD: fpemu.S,v 1.4 2001/03/29 02:18:45 mickey Exp $ */
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@ -38,12 +38,12 @@
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#define FPEMU_VERSION (1 << 11)
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#define FP_TABLE2(name, ep0, ep1, ep2, ep3) \
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ldil L%$fpemu_tbl$name, %t1 ! \
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ldo R%$fpemu_tbl$name(%t1), %t1 ! \
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ldil L%L$fpemu_tbl$name, %t1 ! \
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ldo R%L$fpemu_tbl$name(%t1), %t1 ! \
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ldwx,s %r1(%t1), %t2 ! \
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bv %r0(%t2) ! \
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nop ! \
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.label $fpemu_tbl$name ! \
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.label L$fpemu_tbl$name ! \
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.import __CONCAT(__CONCAT(ep0,_),name), code ! \
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.import __CONCAT(__CONCAT(ep1,_),name), code ! \
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.import __CONCAT(__CONCAT(ep2,_),name), code ! \
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@ -51,12 +51,12 @@
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.word __CONCAT(__CONCAT(ep0,_),name), __CONCAT(__CONCAT(ep1,_),name), __CONCAT(__CONCAT(ep2,_),name), __CONCAT(__CONCAT(ep3,_),name)
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#define FP_TABLE3(name,ep0,ep1,ep2,ep3,ep4,ep5,ep6,ep7,ep8,ep9,epa,epb,epc,epd,epe,epf) \
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ldil L%$fpemu_tbl$name, %t1 ! \
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ldo R%$fpemu_tbl$name(%t1), %t1 ! \
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ldil L%L$fpemu_tbl$name, %t1 ! \
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ldo R%L$fpemu_tbl$name(%t1), %t1 ! \
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ldwx,s %r1(%t1), %t2 ! \
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bv %r0(%t2) ! \
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nop ! \
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.label $fpemu_tbl$name ! \
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.label L$fpemu_tbl$name ! \
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.import __CONCAT(__CONCAT(ep0,_),name), code ! \
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.import __CONCAT(__CONCAT(ep1,_),name), code ! \
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.import __CONCAT(__CONCAT(ep2,_),name), code ! \
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@ -77,8 +77,8 @@
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.section .bss
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.export $fpemu_stack, data
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$fpemu_stack:
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.export L$fpemu_stack, data
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L$fpemu_stack:
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.comm NBPG
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.text
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@ -89,11 +89,11 @@ LEAF_ENTRY_NOPROFILE(fpu_emulate)
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extru %arg0, 22, 2, %arg3
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extru %arg0, 18, 3, %r31
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comib,= 1, %arg3, $fpu_cln1
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comib,= 1, %arg3, L$fpu_cln1
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nop
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extru %arg0, 16, 2, %r31
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$fpu_cln1:
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L$fpu_cln1:
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/*
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* theoreticaly we would need to determine the fpu instruction
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* exception type (there could be 4 of those, but stick w/
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@ -103,9 +103,9 @@ $fpu_cln1:
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extru,<> %arg0, 10, 5, %r1
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ldi 32, %r1 /* fpemu zero reg */
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extru,<> %arg0, 31, 5, %t1
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b,n $fpemu_nzt
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comib,=,n 2, %arg3, $fpemu_exit
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$fpemu_nzt:
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b,n L$fpemu_nzt
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comib,=,n 2, %arg3, L$fpemu_exit
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L$fpemu_nzt:
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copy %arg0, %t4
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sh3add %r1, %arg2, %arg0
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extru %arg1, 20, 2, %r1
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@ -120,29 +120,29 @@ $fpemu_nzt:
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* r1 -- format specifier
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* (t4 -- copy or arg0, ie iir)
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*/
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comib,=,n 0, %arg3, $fpemu0c_0
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comib,=,n 1, %arg3, $fpemu0c_1
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comib,=,n 2, %arg3, $fpemu0c_2
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comib,=,n 3, %arg3, $fpemu0c_3
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comib,=,n 0, %arg3, L$fpemu0c_0
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comib,=,n 1, %arg3, L$fpemu0c_1
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comib,=,n 2, %arg3, L$fpemu0c_2
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comib,=,n 3, %arg3, L$fpemu0c_3
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$fpemu0c_0:
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comib,=,n 0, %r31, $fpemu0c_0_0
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comib,=,n 1, %r31, $fpemu_exit
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comib,=,n 2, %r31, $fpemu0c_0_2
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comib,=,n 3, %r31, $fpemu0c_0_3
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comib,=,n 4, %r31, $fpemu0c_0_4
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comib,=,n 5, %r31, $fpemu0c_0_5
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comib,=,n 6, %r31, $fpemu_exit
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comib,=,n 7, %r31, $fpemu_exit
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L$fpemu0c_0:
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comib,=,n 0, %r31, L$fpemu0c_0_0
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comib,=,n 1, %r31, L$fpemu_exit
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comib,=,n 2, %r31, L$fpemu0c_0_2
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comib,=,n 3, %r31, L$fpemu0c_0_3
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comib,=,n 4, %r31, L$fpemu0c_0_4
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comib,=,n 5, %r31, L$fpemu0c_0_5
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comib,=,n 6, %r31, L$fpemu_exit
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comib,=,n 7, %r31, L$fpemu_exit
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$fpemu0c_0_0:
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L$fpemu0c_0_0:
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ldi FPEMU_VERSION, %t4
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stw %t4, 0(%arg2)
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bv 0(%rp)
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copy %r0, %ret0
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$fpemu0c_0_2: /* fcpy */
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comib,=,n 2, %r1, $fpemu_exit
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L$fpemu0c_0_2: /* fcpy */
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comib,=,n 2, %r1, L$fpemu_exit
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subi 3, %r1, %r1
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ldw 0*4(%arg0), %t1
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ldw 1*4(%arg0), %t2
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@ -160,8 +160,8 @@ $fpemu0c_0_2: /* fcpy */
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bv 0(%rp)
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copy %r0, %ret0
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$fpemu0c_0_3: /* fabs */
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comib,=,n 2, %r1, $fpemu_exit
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L$fpemu0c_0_3: /* fabs */
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comib,=,n 2, %r1, L$fpemu_exit
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subi 3, %r1, %r1
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ldw 0*4(%arg0), %t1
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ldw 1*4(%arg0), %t2
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@ -180,30 +180,30 @@ $fpemu0c_0_3: /* fabs */
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bv 0(%rp)
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copy %r0, %ret0
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$fpemu0c_0_4: /* fsqrt */
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L$fpemu0c_0_4: /* fsqrt */
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/* quad not implemented */
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FP_TABLE2(fsqrt,sgl,dbl,invalid,invalid)
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$fpemu0c_0_5: /* frnd */
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L$fpemu0c_0_5: /* frnd */
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/* quad not implemented */
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FP_TABLE2(frnd,sgl,dbl,invalid,quad)
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$fpemu0c_1:
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L$fpemu0c_1:
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extru %t4, 18, 2, %t2
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sh2add %r1, %t2, %r1
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comib,=,n 0, %r31, $fpemu0c_1_0
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comib,=,n 1, %r31, $fpemu0c_1_1
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comib,=,n 2, %r31, $fpemu0c_1_2
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comib,=,n 3, %r31, $fpemu0c_1_3
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comib,=,n 0, %r31, L$fpemu0c_1_0
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comib,=,n 1, %r31, L$fpemu0c_1_1
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comib,=,n 2, %r31, L$fpemu0c_1_2
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comib,=,n 3, %r31, L$fpemu0c_1_3
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$fpemu0c_1_0: /* fcnvff */
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L$fpemu0c_1_0: /* fcnvff */
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#define sgl_to_quad_fcnvff invalid_fcnvff
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#define dbl_to_quad_fcnvff invalid_fcnvff
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#define quad_to_sgl_fcnvff invalid_fcnvff
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#define quad_to_dbl_fcnvff invalid_fcnvff
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FP_TABLE3(fcnvff, invalid, sgl_to_dbl, invalid, sgl_to_quad, dbl_to_sgl, invalid, invalid, dbl_to_quad, invalid, invalid, invalid, invalid, quad_to_sgl, quad_to_dbl, invalid, invalid)
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$fpemu0c_1_1: /* fcnvxf */
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L$fpemu0c_1_1: /* fcnvxf */
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#define sgl_to_quad_fcnvxf invalid_fcnvxf
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#define dbl_to_quad_fcnvxf invalid_fcnvxf
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#define quad_to_sgl_fcnvxf invalid_fcnvxf
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@ -211,7 +211,7 @@ $fpemu0c_1_1: /* fcnvxf */
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#define quad_to_quad_fcnvxf invalid_fcnvxf
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FP_TABLE3(fcnvxf, sgl_to_sgl, sgl_to_dbl, invalid, sgl_to_quad, dbl_to_sgl, dbl_to_dbl, invalid, dbl_to_quad, invalid, invalid, invalid, invalid, quad_to_sgl, quad_to_dbl, invalid, quad_to_quad)
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$fpemu0c_1_2: /* fcnvfx */
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L$fpemu0c_1_2: /* fcnvfx */
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#define sgl_to_quad_fcnvfx invalid_fcnvfx
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#define dbl_to_quad_fcnvfx invalid_fcnvfx
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#define quad_to_sgl_fcnvfx invalid_fcnvfx
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@ -219,7 +219,7 @@ $fpemu0c_1_2: /* fcnvfx */
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#define quad_to_quad_fcnvfx invalid_fcnvfx
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FP_TABLE3(fcnvfx, sgl_to_sgl, sgl_to_dbl, invalid, sgl_to_quad, dbl_to_sgl, dbl_to_dbl, invalid, dbl_to_quad, invalid, invalid, invalid, invalid, quad_to_sgl, quad_to_dbl, invalid, quad_to_quad)
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$fpemu0c_1_3: /* fcnvfxt */
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L$fpemu0c_1_3: /* fcnvfxt */
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#define sgl_to_quad_fcnvfxt invalid_fcnvfxt
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#define dbl_to_quad_fcnvfxt invalid_fcnvfxt
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#define quad_to_sgl_fcnvfxt invalid_fcnvfxt
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|
|
@ -228,17 +228,17 @@ $fpemu0c_1_3: /* fcnvfxt */
|
|||
FP_TABLE3(fcnvfxt, sgl_to_sgl, sgl_to_dbl, invalid, sgl_to_quad, dbl_to_sgl, dbl_to_dbl, invalid, dbl_to_quad, invalid, invalid, invalid, invalid, quad_to_sgl, quad_to_dbl, invalid, quad_to_quad)
|
||||
|
||||
|
||||
$fpemu0c_2:
|
||||
comib,=,n 0, %r31, $fpemu0c_2_0
|
||||
comib,=,n 1, %r31, $fpemu0c_2_1
|
||||
comib,=,n 2, %r31, $fpemu_exit
|
||||
comib,=,n 3, %r31, $fpemu_exit
|
||||
comib,=,n 4, %r31, $fpemu_exit
|
||||
comib,=,n 5, %r31, $fpemu_exit
|
||||
comib,=,n 6, %r31, $fpemu_exit
|
||||
comib,=,n 7, %r31, $fpemu_exit
|
||||
L$fpemu0c_2:
|
||||
comib,=,n 0, %r31, L$fpemu0c_2_0
|
||||
comib,=,n 1, %r31, L$fpemu0c_2_1
|
||||
comib,=,n 2, %r31, L$fpemu_exit
|
||||
comib,=,n 3, %r31, L$fpemu_exit
|
||||
comib,=,n 4, %r31, L$fpemu_exit
|
||||
comib,=,n 5, %r31, L$fpemu_exit
|
||||
comib,=,n 6, %r31, L$fpemu_exit
|
||||
comib,=,n 7, %r31, L$fpemu_exit
|
||||
|
||||
$fpemu0c_2_0:
|
||||
L$fpemu0c_2_0:
|
||||
copy %arg2, %arg3
|
||||
extru,<> %t4, 15, 5, %t1
|
||||
ldi 32, %t1
|
||||
|
|
@ -246,8 +246,8 @@ $fpemu0c_2_0:
|
|||
extru %t4, 31, 5, %arg2
|
||||
FP_TABLE2(fcmp,sgl,dbl,invalid,invalid)
|
||||
|
||||
$fpemu0c_2_1:
|
||||
comib,<>,n 0, %r1, $fpemu_exit
|
||||
L$fpemu0c_2_1:
|
||||
comib,<>,n 0, %r1, L$fpemu_exit
|
||||
|
||||
/* extru %t4, 31, 5, %arg1 */
|
||||
/* XXX timex is much more compilicated */
|
||||
|
|
@ -268,38 +268,38 @@ $fpemu0c_2_1:
|
|||
bv %r0(%rp)
|
||||
mtctl %t2, %pcoq
|
||||
|
||||
$fpemu0c_3:
|
||||
L$fpemu0c_3:
|
||||
copy %arg2, %arg3
|
||||
extru,<> %t4, 31, 5, %t1
|
||||
ldi 32, %t1
|
||||
sh3add %t1, %arg3, %arg2
|
||||
|
||||
comib,=,n 0, %r31, $fpemu0c_3_0
|
||||
comib,=,n 1, %r31, $fpemu0c_3_1
|
||||
comib,=,n 2, %r31, $fpemu0c_3_2
|
||||
comib,=,n 3, %r31, $fpemu0c_3_3
|
||||
comib,=,n 4, %r31, $fpemu0c_3_4
|
||||
comib,=,n 5, %r31, $fpemu_exit
|
||||
comib,=,n 6, %r31, $fpemu_exit
|
||||
comib,=,n 7, %r31, $fpemu_exit
|
||||
comib,=,n 0, %r31, L$fpemu0c_3_0
|
||||
comib,=,n 1, %r31, L$fpemu0c_3_1
|
||||
comib,=,n 2, %r31, L$fpemu0c_3_2
|
||||
comib,=,n 3, %r31, L$fpemu0c_3_3
|
||||
comib,=,n 4, %r31, L$fpemu0c_3_4
|
||||
comib,=,n 5, %r31, L$fpemu_exit
|
||||
comib,=,n 6, %r31, L$fpemu_exit
|
||||
comib,=,n 7, %r31, L$fpemu_exit
|
||||
|
||||
$fpemu0c_3_0: /* fadd */
|
||||
L$fpemu0c_3_0: /* fadd */
|
||||
FP_TABLE2(fadd,sgl,dbl,invalid,invalid)
|
||||
|
||||
$fpemu0c_3_1: /* fsub */
|
||||
L$fpemu0c_3_1: /* fsub */
|
||||
FP_TABLE2(fsub,sgl,dbl,invalid,invalid)
|
||||
|
||||
$fpemu0c_3_2: /* fmpy */
|
||||
L$fpemu0c_3_2: /* fmpy */
|
||||
FP_TABLE2(fmpy,sgl,dbl,invalid,invalid)
|
||||
|
||||
$fpemu0c_3_3: /* fdiv */
|
||||
L$fpemu0c_3_3: /* fdiv */
|
||||
FP_TABLE2(fdiv,sgl,dbl,invalid,invalid)
|
||||
|
||||
$fpemu0c_3_4: /* frem */
|
||||
L$fpemu0c_3_4: /* frem */
|
||||
FP_TABLE2(frem,sgl,dbl,invalid,invalid)
|
||||
|
||||
.export $fpemu_exit, code
|
||||
$fpemu_exit:
|
||||
.export L$fpemu_exit, code
|
||||
L$fpemu_exit:
|
||||
/* these look very ugly, but we don't want to mess up w/ m4 just
|
||||
* for the sake of overall world prettieness value growth XXX */
|
||||
invalid_fsqrt:
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: trap.S,v 1.29 2009/05/24 09:13:37 skrll Exp $ */
|
||||
/* $NetBSD: trap.S,v 1.30 2009/05/24 09:17:59 skrll Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2002 The NetBSD Foundation, Inc.
|
||||
|
|
@ -107,9 +107,9 @@
|
|||
|
||||
.section .data
|
||||
.align 64
|
||||
$trap_tmp_save:
|
||||
L$trap_tmp_save:
|
||||
.block TF_PHYS
|
||||
.size $trap_tmp_save, .-$trap_tmp_save
|
||||
.size L$trap_tmp_save, .-L$trap_tmp_save
|
||||
|
||||
.align 64
|
||||
.export emergency_stack_start, data
|
||||
|
|
@ -134,10 +134,10 @@ emergency_stack_end:
|
|||
.export gateway_page, entry
|
||||
gateway_page:
|
||||
nop /* @ 0.C0000000 (Nothing) */
|
||||
gate,n $bsd_syscall,%r0 /* @ 0.C0000004 (HPUX/BSD) */
|
||||
gate,n bsd_syscall,%r0 /* @ 0.C0000004 (HPUX/BSD) */
|
||||
#ifdef COMPAT_OSF1
|
||||
bl,n $osf_syscall,%r0
|
||||
bl,n $osf_syscall,%r0
|
||||
bl,n osf_syscall,%r0
|
||||
bl,n osf_syscall,%r0
|
||||
#else
|
||||
nop /* @ 0.C0000008 (HPOSF UNIX) */
|
||||
nop /* @ 0.C000000C (HPOSF Mach) */
|
||||
|
|
@ -148,7 +148,7 @@ gateway_page:
|
|||
nop
|
||||
|
||||
#ifdef COMPAT_OSF1
|
||||
$osf_syscall:
|
||||
osf_syscall:
|
||||
/*
|
||||
* Ripped screaming from OSF/MkLinux:
|
||||
*
|
||||
|
|
@ -163,11 +163,11 @@ $osf_syscall:
|
|||
stw %r22, HPPA_FRAME_ARG(4)(%sp)
|
||||
stw %r21, HPPA_FRAME_ARG(5)(%sp)
|
||||
stw %r29, HPPA_FRAME_SL(%sp)
|
||||
gate $bsd_syscall,%r0
|
||||
gate bsd_syscall,%r0
|
||||
copy %r1, %r22
|
||||
#endif /* COMPAT_OSF1 */
|
||||
|
||||
$bsd_syscall:
|
||||
bsd_syscall:
|
||||
/*
|
||||
* set up a space register and a protection id so that
|
||||
* we can access kernel memory
|
||||
|
|
@ -182,10 +182,10 @@ $bsd_syscall:
|
|||
/*
|
||||
* now call the syscall handler
|
||||
*/
|
||||
.import $syscall,code
|
||||
.import syscall_entry,code
|
||||
.call
|
||||
ldil L%$syscall, %t2
|
||||
be R%$syscall(%sr1, %t2)
|
||||
ldil L%syscall_entry, %t2
|
||||
be R%syscall_entry(%sr1, %t2)
|
||||
nop ! nop ! nop ! nop
|
||||
.size gateway_page, .-gateway_page
|
||||
|
||||
|
|
@ -193,11 +193,11 @@ $bsd_syscall:
|
|||
.export gateway_page_end, entry
|
||||
gateway_page_end:
|
||||
|
||||
.export $syscall,entry
|
||||
.export syscall_entry,entry
|
||||
.proc
|
||||
.callinfo calls
|
||||
.entry
|
||||
$syscall:
|
||||
syscall_entry:
|
||||
/*
|
||||
* %r1: eiem
|
||||
* %ret0: process protection id
|
||||
|
|
@ -422,11 +422,11 @@ $syscall:
|
|||
.procend
|
||||
/* FALLTHROUGH */
|
||||
|
||||
.export $syscall_return, entry
|
||||
.export syscall_return, entry
|
||||
.proc
|
||||
.callinfo no_calls
|
||||
.entry
|
||||
$syscall_return:
|
||||
syscall_return:
|
||||
/* t3 == VA trapframe */
|
||||
/* check for AST ? XXX */
|
||||
|
||||
|
|
@ -439,8 +439,8 @@ $syscall_return:
|
|||
* hopefully no page fault would happen on or after the copy,
|
||||
* and interrupts are disabled.
|
||||
*/
|
||||
ldil L%$trap_tmp_save, %t2
|
||||
ldo R%$trap_tmp_save(%t2), %t2
|
||||
ldil L%L$trap_tmp_save, %t2
|
||||
ldo R%L$trap_tmp_save(%t2), %t2
|
||||
|
||||
ldw 0(%t3), %r1 ! ldw 4(%t3), %t1 ! stw %r1, 0(%t2) ! stw %t1, 4(%t2)
|
||||
ldw 8(%t3), %r1 ! ldw 12(%t3), %t1 ! stw %r1, 8(%t2) ! stw %t1, 12(%t2)
|
||||
|
|
@ -532,8 +532,8 @@ $syscall_return:
|
|||
* since we don't use it anyway.
|
||||
*/
|
||||
ssm 0, %r0
|
||||
ldil L%$trap_tmp_save, %t3
|
||||
ldo R%$trap_tmp_save(%t3), %t3
|
||||
ldil L%L$trap_tmp_save, %t3
|
||||
ldo R%L$trap_tmp_save(%t3), %t3
|
||||
nop ! nop ! nop ! nop ! nop
|
||||
rsm RESET_PSW, %r0
|
||||
|
||||
|
|
@ -567,14 +567,14 @@ $syscall_return:
|
|||
nop
|
||||
.exit
|
||||
.procend
|
||||
.size $syscall, .-$syscall
|
||||
$syscall_end:
|
||||
.size syscall_entry, .- syscall_entry
|
||||
|
||||
/*
|
||||
* interrupt vector table
|
||||
*/
|
||||
#define TLABEL(name) $trap$name
|
||||
#define TELABEL(num) __CONCAT(trap_ep_,num)
|
||||
#define TLABEL(name) __CONCAT(trap_,name)
|
||||
#define TRAPLABEL(name,num) __CONCAT(TLABEL(name),num)
|
||||
#define TELABEL(num) __CONCAT(trap_ep_,num)
|
||||
|
||||
#define TRAP(name,num) \
|
||||
mtctl %r1, %tr7 ! \
|
||||
|
|
@ -585,21 +585,21 @@ $syscall_end:
|
|||
.align 32
|
||||
|
||||
#define ATRAP(name,num) \
|
||||
.export TLABEL(name)$num, entry ! \
|
||||
.label TLABEL(name)$num ! \
|
||||
TRAP(all,num) ! \
|
||||
.size TLABEL(name)$num, .-TLABEL(name)$num
|
||||
.export TRAPLABEL(name,num), entry ! \
|
||||
.label TRAPLABEL(name,num) ! \
|
||||
TRAP(all,num) ! \
|
||||
.size TRAPLABEL(name,num), .-TRAPLABEL(name,num)
|
||||
|
||||
#define CTRAP(name,num,pre) \
|
||||
.export TLABEL(name)$num, entry ! \
|
||||
.label TLABEL(name)$num ! \
|
||||
.export TRAPLABEL(name,num), entry ! \
|
||||
.label TRAPLABEL(name,num) ! \
|
||||
pre ! \
|
||||
TRAP(name,num) ! \
|
||||
.size TLABEL(name)$num, .-TLABEL(name)$num
|
||||
.size TRAPLABEL(name,num), .-TRAPLABEL(name,num)
|
||||
|
||||
#define STRAP(name,num,pre) \
|
||||
.export TLABEL(name)$num, entry ! \
|
||||
.label TLABEL(name)$num ! \
|
||||
.export TRAPLABEL(name,num), entry ! \
|
||||
.label TRAPLABEL(name,num) ! \
|
||||
pre ! \
|
||||
mtctl %r1, %tr7 ! \
|
||||
.export TELABEL(num), entry ! \
|
||||
|
|
@ -610,13 +610,13 @@ $syscall_end:
|
|||
bv 0(%r1) ! \
|
||||
ldi num, %r1 ! \
|
||||
.align 32 ! \
|
||||
.size TLABEL(name)$num, .-TLABEL(name)$num
|
||||
.size TRAPLABEL(name,num), .-TRAPLABEL(name,num)
|
||||
|
||||
#define LDILDO(name) ! \
|
||||
.export name, entry ! \
|
||||
.label name ! \
|
||||
ldil L%$name,%r1 ! \
|
||||
ldo R%$name(%r1), %r1
|
||||
ldil L%TLABEL(name),%r1 ! \
|
||||
ldo R%TLABEL(name)(%r1), %r1
|
||||
|
||||
#ifdef HP7000_CPU
|
||||
LDILDO(itlb_x)
|
||||
|
|
@ -670,9 +670,9 @@ LDILDO(tlbd_u)
|
|||
nop
|
||||
|
||||
.align NBPG
|
||||
.export $ivaaddr, entry
|
||||
.export ivaaddr, entry
|
||||
.export os_hpmc, entry
|
||||
$ivaaddr:
|
||||
ivaaddr:
|
||||
ATRAP(null,T_NONEXIST) /* 0. invalid interrupt vector */
|
||||
os_hpmc:
|
||||
CTRAP(hpmc,T_HPMC,HPMCPRE) /* 1. high priority machine check */
|
||||
|
|
@ -704,43 +704,43 @@ os_hpmc:
|
|||
ATRAP(dacc,T_DATACC) /* 26. data access rights trap */
|
||||
ATRAP(dpid,T_DATAPID) /* 27. data protection ID trap */
|
||||
ATRAP(dalgn,T_DATALIGN) /* 28. unaligned data ref trap */
|
||||
ATRAP(unk29,29)
|
||||
ATRAP(unk30,30)
|
||||
ATRAP(unk31,31)
|
||||
ATRAP(unk32,32)
|
||||
ATRAP(unk33,33)
|
||||
ATRAP(unk34,34)
|
||||
ATRAP(unk35,35)
|
||||
ATRAP(unk36,36)
|
||||
ATRAP(unk37,37)
|
||||
ATRAP(unk38,38)
|
||||
ATRAP(unk39,39)
|
||||
ATRAP(unk40,40)
|
||||
ATRAP(unk41,41)
|
||||
ATRAP(unk42,42)
|
||||
ATRAP(unk43,43)
|
||||
ATRAP(unk44,44)
|
||||
ATRAP(unk45,45)
|
||||
ATRAP(unk46,46)
|
||||
ATRAP(unk47,47)
|
||||
ATRAP(unk48,48)
|
||||
ATRAP(unk49,49)
|
||||
ATRAP(unk50,50)
|
||||
ATRAP(unk51,51)
|
||||
ATRAP(unk52,52)
|
||||
ATRAP(unk53,53)
|
||||
ATRAP(unk54,54)
|
||||
ATRAP(unk55,55)
|
||||
ATRAP(unk56,56)
|
||||
ATRAP(unk57,57)
|
||||
ATRAP(unk58,58)
|
||||
ATRAP(unk59,59)
|
||||
ATRAP(unk60,60)
|
||||
ATRAP(unk61,61)
|
||||
ATRAP(unk62,62)
|
||||
ATRAP(unk63,63)
|
||||
ATRAP(unk,29)
|
||||
ATRAP(unk,30)
|
||||
ATRAP(unk,31)
|
||||
ATRAP(unk,32)
|
||||
ATRAP(unk,33)
|
||||
ATRAP(unk,34)
|
||||
ATRAP(unk,35)
|
||||
ATRAP(unk,36)
|
||||
ATRAP(unk,37)
|
||||
ATRAP(unk,38)
|
||||
ATRAP(unk,39)
|
||||
ATRAP(unk,40)
|
||||
ATRAP(unk,41)
|
||||
ATRAP(unk,42)
|
||||
ATRAP(unk,43)
|
||||
ATRAP(unk,44)
|
||||
ATRAP(unk,45)
|
||||
ATRAP(unk,46)
|
||||
ATRAP(unk,47)
|
||||
ATRAP(unk,48)
|
||||
ATRAP(unk,49)
|
||||
ATRAP(unk,50)
|
||||
ATRAP(unk,51)
|
||||
ATRAP(unk,52)
|
||||
ATRAP(unk,53)
|
||||
ATRAP(unk,54)
|
||||
ATRAP(unk,55)
|
||||
ATRAP(unk,56)
|
||||
ATRAP(unk,57)
|
||||
ATRAP(unk,58)
|
||||
ATRAP(unk,59)
|
||||
ATRAP(unk,60)
|
||||
ATRAP(unk,61)
|
||||
ATRAP(unk,62)
|
||||
ATRAP(unk,63)
|
||||
/* 64 */
|
||||
.size $ivaaddr, .-$ivaaddr
|
||||
.size ivaaddr, .-ivaaddr
|
||||
|
||||
/*
|
||||
* This is the locore support for HPMC and TOC machine checks.
|
||||
|
|
@ -797,8 +797,8 @@ ALTENTRY(os_hpmc_cont)
|
|||
mtsp %r1, %sr7
|
||||
|
||||
/* Reload the Interruption Vector Address. */
|
||||
ldil L%$ivaaddr, %r1
|
||||
ldo R%$ivaaddr(%r1), %r1
|
||||
ldil L%ivaaddr, %r1
|
||||
ldo R%ivaaddr(%r1), %r1
|
||||
mtctl %r1, %iva
|
||||
|
||||
/* Reload the HPT base and mask. */
|
||||
|
|
@ -830,7 +830,7 @@ ALTENTRY(os_hpmc_cont)
|
|||
stwm %r1, HPPA_FRAME_SIZE(%sp)
|
||||
|
||||
/* If this is a TOC, remap the kernel. */
|
||||
comib,<>,n T_INTERRUPT, %arg0, $check_do_rfi
|
||||
comib,<>,n T_INTERRUPT, %arg0, L$check_do_rfi
|
||||
|
||||
/* Clear kernelmapped. */
|
||||
ldil L%kernelmapped, %r1
|
||||
|
|
@ -853,7 +853,7 @@ ALTENTRY(os_hpmc_cont)
|
|||
/* Disable the interrupt queues. */
|
||||
rsm RESET_PSW, %r0
|
||||
|
||||
$check_do_rfi:
|
||||
L$check_do_rfi:
|
||||
|
||||
/* Load IPSW. */
|
||||
ldil L%kpsw, %r1
|
||||
|
|
@ -908,7 +908,7 @@ LEAF_ENTRY_NOPROFILE(TLABEL(emu))
|
|||
* If the opcode field is 0xe, then it's an FPU instruction.
|
||||
*/
|
||||
extru %arg0, 5, 6, %r1
|
||||
comib,=,n 4, %r1, $emulate_sfu
|
||||
comib,=,n 4, %r1, L$emulate_sfu
|
||||
comib,=,n 0xe, %r1, hppa_fpu_nop0
|
||||
|
||||
/*
|
||||
|
|
@ -918,7 +918,7 @@ LEAF_ENTRY_NOPROFILE(TLABEL(emu))
|
|||
* coprocessor.
|
||||
*/
|
||||
extru %arg0, 25, 3, %r1
|
||||
comib,<<,n 1, %r1, $emulate_coproc
|
||||
comib,<<,n 1, %r1, L$emulate_coproc
|
||||
|
||||
/*
|
||||
* If we're still here, this is a FPU
|
||||
|
|
@ -949,7 +949,7 @@ LEAF_ENTRY_NOPROFILE(TLABEL(emu))
|
|||
* an FPU coprocessor.
|
||||
*/
|
||||
ALTENTRY(hppa_fpu_nop0)
|
||||
b,n $emulate_fpu
|
||||
b,n L$emulate_fpu
|
||||
|
||||
/*
|
||||
* We have a hardware FPU. If it is enabled,
|
||||
|
|
@ -957,7 +957,7 @@ ALTENTRY(hppa_fpu_nop0)
|
|||
*/
|
||||
mfctl %ccr, %arg0
|
||||
extru,= %arg0, 25, 2, %r1
|
||||
b,n $emulate_fpu
|
||||
b,n L$emulate_fpu
|
||||
|
||||
/*
|
||||
* The hardware FPU is disabled, so we need to swap
|
||||
|
|
@ -1002,7 +1002,7 @@ ALTENTRY(hppa_fpu_nop0)
|
|||
* (courtesy of CTRAP), and %arg0 is saved in %tr2
|
||||
* (courtesy of the sfu/coprocessor dispatcher).
|
||||
*/
|
||||
$emulate_sfu:
|
||||
L$emulate_sfu:
|
||||
/*
|
||||
* Currently we just restore %arg0 and
|
||||
* trap with an illegal instruction.
|
||||
|
|
@ -1017,7 +1017,7 @@ $emulate_sfu:
|
|||
* (courtesy of CTRAP), and %t1 is saved in %tr2
|
||||
* (courtesy of the sfu/coprocessor dispatcher).
|
||||
*/
|
||||
$emulate_coproc:
|
||||
L$emulate_coproc:
|
||||
/*
|
||||
* Currently we just restore %arg0 and
|
||||
* trap with an illegal instruction.
|
||||
|
|
@ -1032,7 +1032,7 @@ $emulate_coproc:
|
|||
* (courtesy of CTRAP), and %t1 is saved in %tr2
|
||||
* (courtesy of the sfu/coprocessor dispatcher).
|
||||
*/
|
||||
$emulate_fpu:
|
||||
L$emulate_fpu:
|
||||
/*
|
||||
* We get back to C via the normal generic trap
|
||||
* mechanism, as opposed to switching to a special
|
||||
|
|
@ -1052,8 +1052,8 @@ $emulate_fpu:
|
|||
* sfu and non-FPU instructions again, it assumes
|
||||
* that these kinds of instructions have already
|
||||
* been translated into some other trap type (as
|
||||
* they have, by the above $emulate_sfu and
|
||||
* $emulate_coproc), and all T_EMULATION | T_USER
|
||||
* they have, by the above L$emulate_sfu and
|
||||
* L$emulate_coproc), and all T_EMULATION | T_USER
|
||||
* traps are FPU instructions that need emulating.
|
||||
*
|
||||
* So we just restore %arg0 and trap with
|
||||
|
|
@ -1089,7 +1089,7 @@ LEAF_ENTRY_NOPROFILE(hppa_fpu_swap)
|
|||
*/
|
||||
mfctl %ccr, %r1
|
||||
depi 3, 25, 2, %r1
|
||||
comb,= %r0, %arg0, $fpu_swap_in
|
||||
comb,= %r0, %arg0, L$fpu_swap_in
|
||||
mtctl %r1, %ccr
|
||||
|
||||
/*
|
||||
|
|
@ -1142,7 +1142,7 @@ LEAF_ENTRY_NOPROFILE(hppa_fpu_swap)
|
|||
fdc,m %r1(%arg0)
|
||||
sync
|
||||
|
||||
$fpu_swap_in:
|
||||
L$fpu_swap_in:
|
||||
|
||||
/*
|
||||
* Stash the incoming user structure in
|
||||
|
|
@ -1158,7 +1158,7 @@ $fpu_swap_in:
|
|||
* past the swap-in code if it is zero.
|
||||
*/
|
||||
ldil L%fpu_cur_uspace, %r1
|
||||
comb,= %r0, %arg1, $fpu_no_swap_in
|
||||
comb,= %r0, %arg1, L$fpu_no_swap_in
|
||||
stw %arg1, R%fpu_cur_uspace(%r1)
|
||||
|
||||
/*
|
||||
|
|
@ -1210,7 +1210,7 @@ $fpu_swap_in:
|
|||
fdc,m %r1(%arg1)
|
||||
sync
|
||||
|
||||
$fpu_swap_done:
|
||||
L$fpu_swap_done:
|
||||
|
||||
/* Increment the switch count and return. */
|
||||
ldil L%fpu_csw, %r1
|
||||
|
|
@ -1219,12 +1219,12 @@ $fpu_swap_done:
|
|||
bv %r0(%rp)
|
||||
stw %arg0, R%fpu_csw(%r1)
|
||||
|
||||
$fpu_no_swap_in:
|
||||
L$fpu_no_swap_in:
|
||||
|
||||
/* We didn't swap any FPU state in, so disable the FPU. */
|
||||
mfctl %ccr, %r1
|
||||
depi 0, 25, 2, %r1
|
||||
b $fpu_swap_done
|
||||
b L$fpu_swap_done
|
||||
mtctl %r1, %ccr
|
||||
EXIT(hppa_fpu_swap)
|
||||
|
||||
|
|
@ -1315,9 +1315,9 @@ itlb_c:
|
|||
* %r24 = undefined
|
||||
* %r25 = undefined
|
||||
*/
|
||||
LEAF_ENTRY_NOPROFILE($tlbd_s)
|
||||
ALTENTRY($tlbd_t)
|
||||
ALTENTRY($tlbd_x)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(tlbd_s))
|
||||
ALTENTRY(TLABEL(tlbd_t))
|
||||
ALTENTRY(TLABEL(tlbd_x))
|
||||
TLB_STATS_PRE(tlbd)
|
||||
TLB_PULL(1, TLABEL(all))
|
||||
mfsp %sr1, %r16
|
||||
|
|
@ -1328,7 +1328,7 @@ ALTENTRY($tlbd_x)
|
|||
TLB_STATS_AFT(tlbd)
|
||||
rfir
|
||||
nop
|
||||
EXIT($tlbd_s)
|
||||
EXIT(TLABEL(tlbd_s))
|
||||
|
||||
/*
|
||||
* This is a handler for interruption 6, "Instruction TLB miss fault",
|
||||
|
|
@ -1345,9 +1345,9 @@ EXIT($tlbd_s)
|
|||
* %r24 = undefined
|
||||
* %r25 = undefined
|
||||
*/
|
||||
LEAF_ENTRY_NOPROFILE($itlb_s)
|
||||
ALTENTRY($itlb_t)
|
||||
ALTENTRY($itlb_x)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(itlb_s))
|
||||
ALTENTRY(TLABEL(itlb_t))
|
||||
ALTENTRY(TLABEL(itlb_x))
|
||||
TLB_STATS_PRE(itlb)
|
||||
TLB_PULL(0, TLABEL(all))
|
||||
extru,= %r25, 5, 1, %r0 /* gate needs a kernel pid */
|
||||
|
|
@ -1360,7 +1360,7 @@ ALTENTRY($itlb_x)
|
|||
TLB_STATS_AFT(itlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($itlb_s)
|
||||
EXIT(TLABEL(itlb_s))
|
||||
|
||||
/*
|
||||
* This is a handler for interruption 15, "Data TLB miss fault",
|
||||
|
|
@ -1377,9 +1377,9 @@ EXIT($itlb_s)
|
|||
* %r24 = undefined
|
||||
* %r25 = undefined
|
||||
*/
|
||||
LEAF_ENTRY_NOPROFILE($dtlb_s)
|
||||
ALTENTRY($dtlb_t)
|
||||
ALTENTRY($dtlb_x)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(dtlb_s))
|
||||
ALTENTRY(TLABEL(dtlb_t))
|
||||
ALTENTRY(TLABEL(dtlb_x))
|
||||
TLB_STATS_PRE(dtlb)
|
||||
TLB_PULL(0, TLABEL(all))
|
||||
mfsp %sr1, %r16
|
||||
|
|
@ -1390,16 +1390,16 @@ ALTENTRY($dtlb_x)
|
|||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($dtlb_s)
|
||||
EXIT(TLABEL(dtlb_s))
|
||||
|
||||
LEAF_ENTRY_NOPROFILE($dtlbna_s)
|
||||
ALTENTRY($itlbna_s)
|
||||
ALTENTRY($dtlbna_t)
|
||||
ALTENTRY($itlbna_t)
|
||||
ALTENTRY($dtlbna_x)
|
||||
ALTENTRY($itlbna_x)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(dtlbna_s))
|
||||
ALTENTRY(TLABEL(itlbna_s))
|
||||
ALTENTRY(TLABEL(dtlbna_t))
|
||||
ALTENTRY(TLABEL(itlbna_t))
|
||||
ALTENTRY(TLABEL(dtlbna_x))
|
||||
ALTENTRY(TLABEL(itlbna_x))
|
||||
TLB_STATS_PRE(dtlb)
|
||||
TLB_PULL(0, $dtlbna_t_fake)
|
||||
TLB_PULL(0, L$dtlbna_t_fake)
|
||||
mfsp %sr1, %r16
|
||||
mtsp %r8, %sr1
|
||||
idtlba %r17,(%sr1, %r9)
|
||||
|
|
@ -1408,8 +1408,8 @@ ALTENTRY($itlbna_x)
|
|||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
$dtlbna_s_fake:
|
||||
$dtlbna_t_fake:
|
||||
L$dtlbna_s_fake:
|
||||
L$dtlbna_t_fake:
|
||||
/* parse prober/w insns, have to decent to trap() to set regs proper */
|
||||
mfctl %iir, %r16
|
||||
extru %r16, 6, 6, %r24
|
||||
|
|
@ -1430,7 +1430,7 @@ $dtlbna_t_fake:
|
|||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($dtlbna_s)
|
||||
EXIT(TLABEL(dtlbna_s))
|
||||
|
||||
#endif /* defined(HP7000_CPU) || defined(HP7100_CPU) || defined(HP7200_CPU) */
|
||||
|
||||
|
|
@ -1500,7 +1500,7 @@ EXIT($dtlbna_s)
|
|||
*/
|
||||
|
||||
.align 32
|
||||
LEAF_ENTRY_NOPROFILE($tlbd_l)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(tlbd_l))
|
||||
TLB_STATS_PRE(tlbd)
|
||||
TLB_PULL_L(1, TLABEL(all))
|
||||
IDTLBAF(17)
|
||||
|
|
@ -1516,7 +1516,7 @@ LEAF_ENTRY_NOPROFILE($tlbd_l)
|
|||
TLB_STATS_AFT(tlbd)
|
||||
rfir
|
||||
nop
|
||||
EXIT($tlbd_l)
|
||||
EXIT(TLABEL(tlbd_l))
|
||||
|
||||
/*
|
||||
* This is a handler for interruption 6, "Instruction TLB miss fault",
|
||||
|
|
@ -1538,7 +1538,7 @@ EXIT($tlbd_l)
|
|||
* we found a post-silicon bug that makes cr28
|
||||
* unreliable for the itlb miss handler
|
||||
*/
|
||||
LEAF_ENTRY_NOPROFILE($itlb_l)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(itlb_l))
|
||||
TLB_STATS_PRE(itlb)
|
||||
TLB_PULL_L(0, TLABEL(all))
|
||||
extru,= %r25, 5, 1, %r0 /* gate needs a kernel pid */
|
||||
|
|
@ -1548,18 +1548,18 @@ LEAF_ENTRY_NOPROFILE($itlb_l)
|
|||
TLB_STATS_AFT(itlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($itlb_l)
|
||||
EXIT(TLABEL(itlb_l))
|
||||
|
||||
LEAF_ENTRY_NOPROFILE($dtlbna_l)
|
||||
ALTENTRY($itlbna_l)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(dtlbna_l))
|
||||
ALTENTRY(TLABEL(itlbna_l))
|
||||
TLB_STATS_PRE(dtlb)
|
||||
TLB_PULL_L(0, $dtlbna_l_fake)
|
||||
TLB_PULL_L(0, L$dtlbna_l_fake)
|
||||
IDTLBAF(17)
|
||||
IDTLBPF(25)
|
||||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
$dtlbna_l_fake:
|
||||
L$dtlbna_l_fake:
|
||||
/* parse prober/w insns, have to decent to trap() to set regs proper */
|
||||
mfctl %iir, %r16
|
||||
extru %r16, 6, 6, %r24
|
||||
|
|
@ -1577,9 +1577,9 @@ $dtlbna_l_fake:
|
|||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($dtlbna_l)
|
||||
EXIT(TLABEL(dtlbna_l))
|
||||
|
||||
LEAF_ENTRY_NOPROFILE($dtlb_l)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(dtlb_l))
|
||||
TLB_STATS_PRE(dtlb)
|
||||
TLB_PULL_L(0, TLABEL(all))
|
||||
IDTLBAF(17)
|
||||
|
|
@ -1597,7 +1597,7 @@ LEAF_ENTRY_NOPROFILE($dtlb_l)
|
|||
|
||||
ldo PAGE_SIZE(%r9), %r9
|
||||
extru,<> %r9, 20, 5, %r0
|
||||
b,n $dtlb_done_l /* skip if no simple advance */
|
||||
b,n L$dtlb_done_l /* skip if no simple advance */
|
||||
/* do not check the PT overlap since the above
|
||||
* check already guaranties that */
|
||||
|
||||
|
|
@ -1605,7 +1605,7 @@ LEAF_ENTRY_NOPROFILE($dtlb_l)
|
|||
extru %r9, 19, 10, %r16 /* %r24 was loaded in the TLB_PULL_L */
|
||||
ldwx,s %r16(%r24), %r17 /* va -> pa:prot */
|
||||
sh2addl %r16, %r24, %r25
|
||||
combt,=,n %r0, %r17, $dtlb_done_l
|
||||
combt,=,n %r0, %r17, L$dtlb_done_l
|
||||
copy %r17, %r16
|
||||
depi 0, 21, 1, %r17
|
||||
sub,= %r16, %r17, %r0 /* do not store if unchanged */
|
||||
|
|
@ -1623,12 +1623,12 @@ LEAF_ENTRY_NOPROFILE($dtlb_l)
|
|||
stw %r16, 0(%r24)
|
||||
stw %r25, 4(%r24)
|
||||
stw %r17, 8(%r24)
|
||||
$dtlb_done_l:
|
||||
L$dtlb_done_l:
|
||||
#endif
|
||||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($dtlb_l)
|
||||
EXIT(TLABEL(dtlb_l))
|
||||
#endif /* defined(HP7100LC_CPU) || defined(HP7300LC_CPU) */
|
||||
|
||||
#if defined(HP8000_CPU) || defined(HP8200_CPU) || defined(HP8500_CPU)
|
||||
|
|
@ -1651,7 +1651,7 @@ EXIT($dtlb_l)
|
|||
depdi 0, 44, 30, %r25 ! \
|
||||
depd %r16, 14, 15, %r25
|
||||
|
||||
LEAF_ENTRY_NOPROFILE($tlbd_u)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(tlbd_u))
|
||||
TLB_STATS_PRE(tlbd)
|
||||
TLB_PULL_L(1, TLABEL(all))
|
||||
TLB_PCX2PCXU
|
||||
|
|
@ -1659,9 +1659,9 @@ LEAF_ENTRY_NOPROFILE($tlbd_u)
|
|||
TLB_STATS_AFT(tlbd)
|
||||
rfir
|
||||
nop
|
||||
EXIT($tlbd_u)
|
||||
EXIT(TLABEL(tlbd_u))
|
||||
|
||||
LEAF_ENTRY_NOPROFILE($itlb_u)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(itlb_u))
|
||||
TLB_STATS_PRE(itlb)
|
||||
TLB_PULL_L(0, TLABEL(all))
|
||||
extru,= %r25, 5, 1, %r0 /* gate needs a kernel pid */
|
||||
|
|
@ -1671,18 +1671,18 @@ LEAF_ENTRY_NOPROFILE($itlb_u)
|
|||
TLB_STATS_AFT(itlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($itlb_u)
|
||||
EXIT(TLABEL(itlb_u))
|
||||
|
||||
LEAF_ENTRY_NOPROFILE($dtlbna_u)
|
||||
ALTENTRY($itlbna_u)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(dtlbna_u))
|
||||
ALTENTRY(TLABEL(itlbna_u))
|
||||
TLB_STATS_PRE(dtlb)
|
||||
TLB_PULL_L(0, $dtlbna_u_fake)
|
||||
TLB_PULL_L(0, L$dtlbna_u_fake)
|
||||
TLB_PCX2PCXU
|
||||
idtlbt %r17, %r25
|
||||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
$dtlbna_u_fake:
|
||||
L$dtlbna_u_fake:
|
||||
/* parse prober/w insns, have to decent to trap() to set regs proper */
|
||||
mfctl %iir, %r16
|
||||
extru %r16, 6, 6, %r24
|
||||
|
|
@ -1699,9 +1699,9 @@ $dtlbna_u_fake:
|
|||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($dtlbna_u)
|
||||
EXIT(TLABEL(dtlbna_u))
|
||||
|
||||
LEAF_ENTRY_NOPROFILE($dtlb_u)
|
||||
LEAF_ENTRY_NOPROFILE(TLABEL(dtlb_u))
|
||||
TLB_STATS_PRE(dtlb)
|
||||
TLB_PULL_L(0, TLABEL(all))
|
||||
TLB_PCX2PCXU
|
||||
|
|
@ -1709,7 +1709,7 @@ LEAF_ENTRY_NOPROFILE($dtlb_u)
|
|||
TLB_STATS_AFT(dtlb)
|
||||
rfir
|
||||
nop
|
||||
EXIT($dtlb_u)
|
||||
EXIT(TLABEL(dtlb_u))
|
||||
|
||||
.level 1.1
|
||||
#endif /* HP8000_CPU */
|
||||
|
|
@ -1919,8 +1919,8 @@ ENTRY_NOPROFILE(TLABEL(all),0)
|
|||
/* do not overwrite %tr4(%cr28) it contains the contents of r24 */
|
||||
mtctl %t3, %tr2
|
||||
|
||||
ldil L%$trap_tmp_save, %t3
|
||||
ldo R%$trap_tmp_save(%t3), %t3
|
||||
ldil L%L$trap_tmp_save, %t3
|
||||
ldo R%L$trap_tmp_save(%t3), %t3
|
||||
stw %t1, TF_R22(%t3) /* use ,bc */
|
||||
stw %t2, TF_R21(%t3)
|
||||
|
||||
|
|
@ -1987,7 +1987,7 @@ ENTRY_NOPROFILE(TLABEL(all),0)
|
|||
/* Nullify if pcoqh & HPPA_PC_PRIV_MASK != 0. */
|
||||
dep,<> %t1, 31, 2, %r0
|
||||
/* Branch if (pcoqh & ~PAGE_MASK) != SYSCALLGATE */
|
||||
comb,<> %t1, %t2, $trap_from_kernel
|
||||
comb,<> %t1, %t2, L$trap_from_kernel
|
||||
/* Finish aligning the assumed kernel sp. */
|
||||
dep %r0, 31, 6, %sp
|
||||
|
||||
|
|
@ -1996,11 +1996,11 @@ ENTRY_NOPROFILE(TLABEL(all),0)
|
|||
depi 1, TFF_LAST_POS, 1, %r1
|
||||
ldw U_PCB+PCB_UVA(%t2), %sp
|
||||
#ifdef DIAGNOSTIC
|
||||
b $trap_have_stack
|
||||
b L$trap_have_stack
|
||||
#endif
|
||||
ldo NBPG(%sp), %sp
|
||||
|
||||
$trap_from_kernel:
|
||||
L$trap_from_kernel:
|
||||
#ifdef DIAGNOSTIC
|
||||
/*
|
||||
* Use the emergency stack if we have taken some kind
|
||||
|
|
@ -2013,11 +2013,11 @@ $trap_from_kernel:
|
|||
dep %r0, 31, PGSHIFT, %t2
|
||||
comb,=,n %t1, %t2, 0
|
||||
ldo NBPG(%t1), %t1
|
||||
comb,<> %t1, %t2, $trap_have_stack
|
||||
comb,<> %t1, %t2, L$trap_have_stack
|
||||
mfctl %tr2, %t1
|
||||
mfctl %isr, %t2
|
||||
comib,<>,n HPPA_SID_KERNEL, %t2, $trap_have_stack
|
||||
#define _CHECK_TRAP_TYPE(tt) ldi tt, %t2 ! comb,= %r1, %t2, $trap_kstack_fault
|
||||
comib,<>,n HPPA_SID_KERNEL, %t2, L$trap_have_stack
|
||||
#define _CHECK_TRAP_TYPE(tt) ldi tt, %t2 ! comb,= %r1, %t2, L$trap_kstack_fault
|
||||
_CHECK_TRAP_TYPE(T_ITLBMISS)
|
||||
_CHECK_TRAP_TYPE(T_DTLBMISS)
|
||||
_CHECK_TRAP_TYPE(T_ITLBMISSNA)
|
||||
|
|
@ -2026,15 +2026,15 @@ $trap_from_kernel:
|
|||
_CHECK_TRAP_TYPE(T_DATACC)
|
||||
_CHECK_TRAP_TYPE(T_DATAPID)
|
||||
ldi T_DATALIGN, %t2
|
||||
comb,<>,n %r1, %t2, $trap_have_stack
|
||||
comb,<>,n %r1, %t2, L$trap_have_stack
|
||||
#undef _CHECK_TRAP_TYPE
|
||||
$trap_kstack_fault:
|
||||
L$trap_kstack_fault:
|
||||
ldil L%emergency_stack_start, %sp
|
||||
ldo R%emergency_stack_start(%sp), %sp
|
||||
$trap_have_stack:
|
||||
L$trap_have_stack:
|
||||
#endif
|
||||
ldil L%$trapnowvirt, %t2
|
||||
ldo R%$trapnowvirt(%t2), %t2
|
||||
ldil L%trapnowvirt, %t2
|
||||
ldo R%trapnowvirt(%t2), %t2
|
||||
mtctl %t2, %pcoq
|
||||
stw %t1, TF_IIOQH(%t3)
|
||||
ldo 4(%t2), %t2
|
||||
|
|
@ -2064,14 +2064,14 @@ $trap_have_stack:
|
|||
|
||||
#if defined(DDB) || defined(KGDB)
|
||||
/*
|
||||
* Match the offset from %sp for the trapframe with $syscall
|
||||
* Match the offset from %sp for the trapframe with syscall_entry
|
||||
*/
|
||||
ldo HPPA_FRAME_MAXARGS+HPPA_FRAME_SIZE-1(%sp),%sp
|
||||
depi 0, 31, 6, %sp
|
||||
#endif
|
||||
rfir
|
||||
nop ! nop ! nop ! nop ! nop ! nop ! nop ! nop
|
||||
$trapnowvirt:
|
||||
trapnowvirt:
|
||||
/*
|
||||
* t3 contains the virtual address of the trapframe
|
||||
* sp is loaded w/ the right VA (we did not need it being physical)
|
||||
|
|
@ -2136,8 +2136,8 @@ $trapnowvirt:
|
|||
/*
|
||||
* Copy partially saved state from the store into the frame
|
||||
*/
|
||||
ldil L%$trap_tmp_save, %t2
|
||||
ldo R%$trap_tmp_save(%t2), %t2
|
||||
ldil L%L$trap_tmp_save, %t2
|
||||
ldo R%L$trap_tmp_save(%t2), %t2
|
||||
/* use ,bc each line */
|
||||
ldw 0(%t2), %r1 ! ldw 4(%t2), %t1 ! stw %r1, 0(%t3) ! stw %t1, 4(%t3)
|
||||
ldw 8(%t2), %r1 ! ldw 12(%t2), %t1 ! stw %r1, 8(%t3) ! stw %t1, 12(%t3)
|
||||
|
|
@ -2234,20 +2234,22 @@ $trapnowvirt:
|
|||
ldw -HPPA_FRAME_SIZE+4(%sp), %t3
|
||||
/* see if curlwp has changed */
|
||||
ldw TF_FLAGS(%t3), %arg0
|
||||
bb,>=,n %arg0, TFF_LAST_POS, $trap_return
|
||||
bb,>=,n %arg0, TFF_LAST_POS, L$trap_return
|
||||
nop
|
||||
|
||||
mfctl CR_CURLWP, %t2
|
||||
ldw L_MD(%t2), %t3
|
||||
|
||||
$trap_return:
|
||||
ldil L%$syscall_return, %t1
|
||||
ldo R%$syscall_return(%t1), %t1
|
||||
L$trap_return:
|
||||
ldil L%syscall_return, %t1
|
||||
ldo R%syscall_return(%t1), %t1
|
||||
bv,n %r0(%t1)
|
||||
nop
|
||||
|
||||
.export $trap$all$end, entry
|
||||
$trap$all$end:
|
||||
#if 0
|
||||
.export T$trap$all$end, entry
|
||||
T$trap$all$end:
|
||||
#endif
|
||||
EXIT(TLABEL(all))
|
||||
|
||||
.align 32
|
||||
|
|
@ -2256,41 +2258,41 @@ ENTRY_NOPROFILE(TLABEL(ibrk),0)
|
|||
/* If called by a user process then always pass it to trap() */
|
||||
mfctl %pcoq, %r8
|
||||
extru,= %r8, 31, 2, %r0
|
||||
b,n $ibrk_bad
|
||||
b,n L$ibrk_bad
|
||||
|
||||
/* don't accept breaks from data segments */
|
||||
.import etext
|
||||
ldil L%etext, %r9
|
||||
ldo R%etext(%r9), %r9
|
||||
comb,>>=,n %r8, %r9, $ibrk_bad
|
||||
comb,>>=,n %r8, %r9, L$ibrk_bad
|
||||
|
||||
mfctl %iir, %r8
|
||||
extru %r8, 31, 5, %r9
|
||||
comib,<>,n HPPA_BREAK_KERNEL, %r9, $ibrk_bad
|
||||
comib,<>,n HPPA_BREAK_KERNEL, %r9, L$ibrk_bad
|
||||
|
||||
/* now process all those `break' calls we make */
|
||||
extru %r8, 18, 13, %r9
|
||||
comib,=,n HPPA_BREAK_GET_PSW, %r9, $ibrk_getpsw
|
||||
comib,=,n HPPA_BREAK_SET_PSW, %r9, $ibrk_setpsw
|
||||
comib,=,n HPPA_BREAK_GET_PSW, %r9, L$ibrk_getpsw
|
||||
comib,=,n HPPA_BREAK_SET_PSW, %r9, L$ibrk_setpsw
|
||||
|
||||
$ibrk_bad:
|
||||
L$ibrk_bad:
|
||||
/* illegal (unimplemented) break entry point */
|
||||
b TLABEL(all)
|
||||
nop
|
||||
|
||||
$ibrk_getpsw:
|
||||
b $ibrk_exit
|
||||
L$ibrk_getpsw:
|
||||
b L$ibrk_exit
|
||||
mfctl %ipsw, %ret0
|
||||
|
||||
$ibrk_setpsw:
|
||||
L$ibrk_setpsw:
|
||||
mfctl %ipsw, %ret0
|
||||
b $ibrk_exit
|
||||
b L$ibrk_exit
|
||||
mtctl %arg0, %ipsw
|
||||
|
||||
/* insert other fast breaks here */
|
||||
nop ! nop
|
||||
|
||||
$ibrk_exit:
|
||||
L$ibrk_exit:
|
||||
/* skip the break */
|
||||
mtctl %r0, %pcoq
|
||||
mfctl %pcoq, %r9
|
||||
|
|
|
|||
Loading…
Reference in New Issue