Align IO and memory of PCI devices.

This commit is contained in:
thomas 1999-11-07 22:23:05 +00:00
parent 420e7a8fd2
commit 938dcb33e9
1 changed files with 27 additions and 2 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: pci_machdep.c,v 1.19 1999/10/21 15:38:54 leo Exp $ */
/* $NetBSD: pci_machdep.c,v 1.20 1999/11/07 22:23:05 thomas Exp $ */
/*
* Copyright (c) 1996 Leo Weppelman. All rights reserved.
@ -66,7 +66,14 @@
*/
#define PCI_MEM_START 0x00100000 /* 1 MByte */
#define PCI_IO_START 0x00004000 /* 16 kByte (some PCI cards allow only
I/O addresses up to 0xffff) */
I/O adresses up to 0xffff) */
/*
* PCI memory and IO should be aligned acording to this masks
*/
#define PCI_MACHDEP_IO_ALIGN_MASK 0xffffff00
#define PCI_MACHDEP_MEM_ALIGN_MASK 0xfffff000
/*
* Convert a PCI 'device' number to a slot number.
*/
@ -351,6 +358,14 @@ enable_pci_devices()
if (mask & PCI_MAPREG_TYPE_IO) {
p->size = PCI_MAPREG_IO_SIZE(mask);
/*
* Align IO if necessary
*/
if (p->size < PCI_MAPREG_IO_SIZE(PCI_MACHDEP_IO_ALIGN_MASK)) {
p->mask = PCI_MACHDEP_IO_ALIGN_MASK;
p->size = PCI_MAPREG_IO_SIZE(p->mask);
}
/*
* if I/O is already enabled (probably by the console driver)
* save the address in order to take care about it later.
@ -362,6 +377,14 @@ enable_pci_devices()
} else {
p->size = PCI_MAPREG_MEM_SIZE(mask);
/*
* Align memory if necessary
*/
if (p->size < PCI_MAPREG_IO_SIZE(PCI_MACHDEP_MEM_ALIGN_MASK)) {
p->mask = PCI_MACHDEP_MEM_ALIGN_MASK;
p->size = PCI_MAPREG_MEM_SIZE(p->mask);
}
/*
* if memory is already enabled (probably by the console driver)
* save the address in order to take care about it later.
@ -445,6 +468,7 @@ enable_pci_devices()
csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
csr |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
p->csr = csr;
}
}
p = LIST_NEXT(p, link);
@ -485,6 +509,7 @@ enable_pci_devices()
csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
p->csr = csr;
}
}
p = LIST_NEXT(p, link);