Calibrate the timeouts from rev 1.26 by using DELAY(1) so their
values are less machine-dependant. Fixes port-i386/10141, where spurrious timeouts were being seen. Also note the line numbers of the timeouts so it can be determined which is being seen (via __LINE__).
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f2973e2fb8
commit
92f539aa66
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@ -1,4 +1,4 @@
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/* $NetBSD: i82557.c,v 1.26 2000/05/12 03:35:57 jhawk Exp $ */
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/* $NetBSD: i82557.c,v 1.27 2000/05/19 16:00:30 jhawk Exp $ */
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/*-
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* Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
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@ -1370,13 +1370,15 @@ fxp_init(sc)
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CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->sc_cddma + FXP_CDCONFIGOFF);
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CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
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/* ...and wait for it to complete. */
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i = 10000;
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i = 1000;
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do {
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FXP_CDCONFIGSYNC(sc,
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BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
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DELAY(1);
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} while ((cbp->cb_status & FXP_CB_STATUS_C) == 0 && --i);
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if (i == 0) {
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printf("%s: dmasync timeout\n", sc->sc_dev.dv_xname);
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printf("%s at line %d: dmasync timeout\n",
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sc->sc_dev.dv_xname, __LINE__);
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return ETIMEDOUT;
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}
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@ -1400,15 +1402,18 @@ fxp_init(sc)
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CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->sc_cddma + FXP_CDIASOFF);
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CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
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/* ...and wait for it to complete. */
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i = 10000;
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i = 1000;
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do {
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FXP_CDIASSYNC(sc,
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BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
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DELAY(1);
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} while ((cb_ias->cb_status & FXP_CB_STATUS_C) == 0 && --i);
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if (i == 0) {
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printf("%s: dmasync timeout\n", sc->sc_dev.dv_xname);
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printf("%s at line %d: dmasync timeout\n",
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sc->sc_dev.dv_xname, __LINE__);
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return ETIMEDOUT;
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}
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/*
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* Initialize the transmit descriptor ring. txlast is initialized
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* to the end of the list so that it will wrap around to the first
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@ -1842,12 +1847,13 @@ fxp_mc_setup(sc)
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* Wait until the command unit is not active. This should never
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* happen since nothing is queued, but make sure anyway.
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*/
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count = 10000;
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count = 100;
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while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) ==
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FXP_SCB_CUS_ACTIVE && --count)
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/* nothing */ ;
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DELAY(1);
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if (count == 0) {
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printf("%s: command queue timeout\n", sc->sc_dev.dv_xname);
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printf("%s at line %d: command queue timeout\n",
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sc->sc_dev.dv_xname, __LINE__);
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return;
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}
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@ -1859,13 +1865,15 @@ fxp_mc_setup(sc)
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CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
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/* ...and wait for it to complete. */
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count = 10000;
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count = 1000;
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do {
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FXP_CDMCSSYNC(sc,
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BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
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DELAY(1);
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} while ((mcsp->cb_status & FXP_CB_STATUS_C) == 0 && --count);
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if (count == 0) {
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printf("%s: dmasync timeout\n", sc->sc_dev.dv_xname);
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printf("%s at line %d: dmasync timeout\n",
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sc->sc_dev.dv_xname, __LINE__);
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return;
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}
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}
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