Remove unnecessary code for interrupt vector handling.
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f4f1fcf563
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.26 1998/04/13 12:12:59 ragge Exp $ */
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/* $NetBSD: cpu.h,v 1.27 1998/05/22 09:49:07 ragge Exp $ */
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/*
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/*
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* Copyright (c) 1994 Ludd, University of Lule}, Sweden
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* Copyright (c) 1994 Ludd, University of Lule}, Sweden
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@ -55,10 +55,6 @@ struct cpu_dep {
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int (*cpu_clkread) __P((time_t)); /* Read cpu clock time */
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int (*cpu_clkread) __P((time_t)); /* Read cpu clock time */
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void (*cpu_clkwrite) __P((void)); /* Write system time to cpu */
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void (*cpu_clkwrite) __P((void)); /* Write system time to cpu */
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int cpu_vups; /* speed of cpu */
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int cpu_vups; /* speed of cpu */
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u_char *cpu_intreq; /* Used on some VAXstations */
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u_char *cpu_intclr; /* Used on some VAXstations */
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u_char *cpu_intmsk; /* Used on some VAXstations */
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struct uc_map *cpu_map; /* Map containing important addresses */
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void (*cpu_halt) __P((void)); /* Cpu dependent halt call */
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void (*cpu_halt) __P((void)); /* Cpu dependent halt call */
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void (*cpu_reboot) __P((int)); /* Cpu dependent reboot call */
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void (*cpu_reboot) __P((int)); /* Cpu dependent reboot call */
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void (*cpu_clrf) __P((void)); /* Clear cold/warm start flags */
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void (*cpu_clrf) __P((void)); /* Clear cold/warm start flags */
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@ -1,4 +1,4 @@
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/* $NetBSD: ka410.h,v 1.2 1997/02/19 10:06:05 ragge Exp $ */
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/* $NetBSD: ka410.h,v 1.3 1998/05/22 09:49:08 ragge Exp $ */
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/*
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/*
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* Copyright (c) 1996 Ludd, University of Lule}, Sweden.
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* Copyright (c) 1996 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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* All rights reserved.
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@ -146,19 +146,6 @@ extern volatile unsigned char *ka410_intmsk;
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#define INTR_SC (1<<1) /* SCSI controller */
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#define INTR_SC (1<<1) /* SCSI controller */
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#define INTR_DC (1<<0) /* Disk controller */
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#define INTR_DC (1<<0) /* Disk controller */
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/*
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* interrupt vector numbers
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*/
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#define IVEC_BASE 0x20040020
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#define IVEC_SR 0x000002C0
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#define IVEC_ST 0x000002C4
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#define IVEC_NP 0x00000250
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#define IVEC_NS 0x00000254
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#define IVEC_VF 0x00000244
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#define IVEC_VS 0x00000248
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#define IVEC_SC 0x000003F8
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#define IVEC_DC 0x000003FC
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/*
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/*
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* Clock-Chip data in NVRAM
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* Clock-Chip data in NVRAM
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*/
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*/
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@ -208,5 +195,3 @@ struct ka410_clock {
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/* Prototypes */
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/* Prototypes */
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int ka410_setup __P((struct uvax_calls *p, int flags));
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int ka410_setup __P((struct uvax_calls *p, int flags));
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static int ka410_clkread __P((time_t));
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static void ka410_clkwrite __P((void));
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@ -1,4 +1,4 @@
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/* $NetBSD: uvax.h,v 1.2 1997/02/19 10:06:07 ragge Exp $ */
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/* $NetBSD: uvax.h,v 1.3 1998/05/22 09:49:08 ragge Exp $ */
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/*
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/*
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* Copyright (c) 1996 Ludd, University of Lule}, Sweden.
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* Copyright (c) 1996 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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* All rights reserved.
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@ -79,7 +79,6 @@ struct uc_map {
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u_long um_virt;
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u_long um_virt;
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};
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};
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extern struct uc_map *uc_physmap;
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extern struct uc_map *uc_physmap;
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/*
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/*
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* Generic definitions common on all MicroVAXen clock chip.
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* Generic definitions common on all MicroVAXen clock chip.
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*/
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*/
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@ -102,6 +101,30 @@ extern struct uc_map *uc_physmap;
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#define uVAX_CLKRSTRT 010
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#define uVAX_CLKRSTRT 010
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#define uVAX_CLKLANG 0360
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#define uVAX_CLKLANG 0360
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/*
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* Miscellaneous registers common on most VAXststions.
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*/
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struct vs_cpu {
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u_long vc_hltcod; /* Halt Code Register */
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u_long vc_410mser; /* VS2K */
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u_long vc_410cear; /* VS2K */
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u_char vc_intmsk; /* Interrupt mask register */
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u_char vc_vdcorg; /* Mono display origin */
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u_char vc_vdcsel; /* Video interrupt select */
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u_char vc_intreq; /* Interrupt request register */
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#define vc_intclr vc_intreq
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u_short vc_diagdsp; /* Diagnostic display register */
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u_short pad4;
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u_long vc_parctl; /* Parity Control Register */
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u_short pad5;
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u_short pad6;
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u_short pad7;
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u_short vc_diagtme; /* Diagnostic time register */
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};
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#define PARCTL_DMA 0x1000000
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#define PARCTL_CPEN 2
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#define PARCTL_DPEN 1
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/* Prototypes */
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/* Prototypes */
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int uvax_clkread __P((time_t));
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int uvax_clkread __P((time_t));
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void uvax_clkwrite __P((void));
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void uvax_clkwrite __P((void));
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@ -1,4 +1,4 @@
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/* $NetBSD: vsbus.h,v 1.1 1996/07/20 17:58:28 ragge Exp $ */
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/* $NetBSD: vsbus.h,v 1.2 1998/05/22 09:49:08 ragge Exp $ */
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/*
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/*
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* Copyright (c) 1996 Ludd, University of Lule}, Sweden.
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* Copyright (c) 1996 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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* All rights reserved.
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@ -76,10 +76,50 @@ struct confargs {
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#define ca_leflags ca_aux2
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#define ca_leflags ca_aux2
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};
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};
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int vsbus_intr_register __P((struct confargs *, int(*)(void*), void*));
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struct vsbus_attach_args {
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int vsbus_intr_enable __P((struct confargs *));
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int va_type;
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int vsbus_intr_disable __P((struct confargs *));
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};
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int vsbus_intr_unregister __P((struct confargs *));
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/*
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* Some chip addresses and constants, same on all VAXstations.
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*/
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#define NI_ADDR 0x20090000 /* Ethernet address */
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#define DZ_CSR 0x200a0000 /* DZ11-compatible chip csr */
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#define VS_CLOCK 0x200b0000 /* clock chip address */
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#define NI_BASE 0x200e0000 /* LANCE CSRs */
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#define NI_IOSIZE (128 * NBPG) /* IO address size */
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#define VS_REGS 0x20080000 /* Misc cpu internal regs */
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/*
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* interrupt vector numbers
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*/
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#define IVEC_BASE 0x20040020
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#define IVEC_SR 0x000002C0
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#define INR_SR 7
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#define IVEC_ST 0x000002C4
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#define INR_ST 6
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#define IVEC_NP 0x00000250
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#define INR_NP 5
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#define IVEC_NS 0x00000254
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#define INR_NS 4
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#define IVEC_VF 0x00000244
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#define INR_VF 3
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#define IVEC_VS 0x00000248
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#define INR_VS 2
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#define IVEC_SC 0x000003F8
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#define INR_SC 1
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#define IVEC_DC 0x000003FC
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#define INR_DC 0
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caddr_t dz_regs; /* On-board serial line */
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caddr_t le_iomem; /* base addr of RAM -- CPU's view */
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short *lance_csr; /* LANCE CSR virtual address */
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int *lance_addr; /* Ethernet address */
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struct vs_cpu *vs_cpu; /* Common CPU registers */
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void vsbus_intr_enable __P((int));
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void vsbus_intr_disable __P((int));
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void vsbus_intr_attach __P((int, void(*)(int), int));
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int vsbus_lockDMA __P((struct confargs *));
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int vsbus_lockDMA __P((struct confargs *));
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int vsbus_unlockDMA __P((struct confargs *));
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int vsbus_unlockDMA __P((struct confargs *));
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