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Add support for the gcc __sync builtins. 

Note that these need earmv6 or later to get the ldrex/strex instructions
This commit is contained in:
matt 2013-11-08 22:42:52 +00:00
parent 1e9feaef61
commit 918e319dfb
42 changed files with 2009 additions and 39 deletions
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26
common/lib/libc/arch/arm/atomic/Makefile.inc
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@ -1,4 +1,4 @@
# $NetBSD: Makefile.inc,v 1.13 2013/08/19 03:55:12 matt Exp $
# $NetBSD: Makefile.inc,v 1.14 2013/11/08 22:42:52 matt Exp $
ARMV6= ${CPUFLAGS:M-march=armv6*} ${CPUFLAGS:M-mcpu=arm11*}
ARMV6+= ${CFLAGS:M-march=armv6*:} ${CFLAGS:M-mcpu=arm11*}
@ -6,8 +6,7 @@ ARMV6+= ${CPPFLAGS:M-march=armv6*:} ${CPPFLAGS:M-mcpu=arm11*}
ARMV7= ${CPUFLAGS:M-march=armv7*} ${CPUFLAGS:M-mcpu=cortex*}
ARMV7+= ${CFLAGS:M-march=armv7*:} ${CFLAGS:M-mcpu=cortex*}
ARMV7+= ${CPPFLAGS:M-march=armv7*:} ${CPPFLAGS:M-mcpu=cortex*}
.if empty(CPPFLAGS:M-D_STANDALONE) \
&& empty(CFLAGS:M-march=*) && empty(CFLAGS:M-mcpu=*) \
.if empty(CFLAGS:M-march=*) && empty(CFLAGS:M-mcpu=*) \
&& empty(CPPFLAGS:M-march=*) && empty(CPPFLAGS:M-mcpu=*) \
&& empty(CPUFLAGS:M-march=*) && empty(CPUFLAGS:M-mcpu=*)
ARMV6+= ${MACHINE_ARCH:Mearmv6*}
@ -25,12 +24,21 @@ SRCS.atomic+= atomic_add_32_cas.c atomic_add_32_nv_cas.c \
atomic_or_32_cas.c atomic_or_32_nv_cas.c \
atomic_swap_32_cas.c membar_ops_nop.c
.else
SRCS.atomic+= atomic_add_32.S atomic_and_32.S atomic_cas_32.S
SRCS.atomic+= atomic_dec_32.S atomic_inc_32.S atomic_or_32.S
SRCS.atomic+= atomic_swap.S membar_ops.S
SRCS.atomic+= atomic_add_64.S atomic_and_64.S atomic_cas_64.S
SRCS.atomic+= atomic_dec_64.S atomic_inc_64.S atomic_or_64.S
SRCS.atomic+= atomic_swap_64.S
.for op in add and cas nand or xor
.for sz in 8 16 32 64
SRCS.atomic+= atomic_${op}_${sz}.S
.endfor
.endfor
SRCS.atomic+= atomic_dec_32.S atomic_dec_64.S
SRCS.atomic+= atomic_inc_32.S atomic_inc_64.S
SRCS.atomic+= atomic_swap.S atomic_swap_16.S atomic_swap_64.S
SRCS.atomic+= membar_ops.S
.for op in add and nand or sub xor
SRCS.atomic+= sync_fetch_and_${op}_8.S
.endfor
.for sz in 1 2 4 8
SRCS.atomic+= sync_bool_compare_and_swap_${sz}.S
.endfor
.endif
.endif

100
common/lib/libc/arch/arm/atomic/atomic_add_16.S Normal file
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@ -0,0 +1,100 @@
/* $NetBSD: atomic_add_16.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_sub_16)
negs r1, r1
/* FALLTHROUGH */
ENTRY_NP(_atomic_add_16)
mov ip, r0
1: ldrexh r0, [ip] /* load old value */
adds r3, r0, r1 /* calculate new value */
strexh r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_add_16)
END(_atomic_sub_16)
ATOMIC_OP_ALIAS(atomic_add_16,_atomic_add_16)
ATOMIC_OP_ALIAS(atomic_add_short,_atomic_add_16)
ATOMIC_OP_ALIAS(atomic_add_ushort,_atomic_add_16)
STRONG_ALIAS(__sync_fetch_and_add_2,_atomic_add_16)
STRONG_ALIAS(_atomic_add_short,_atomic_add_16)
STRONG_ALIAS(_atomic_add_ushort,_atomic_add_16)
ATOMIC_OP_ALIAS(atomic_sub_16,_atomic_sub_16)
ATOMIC_OP_ALIAS(atomic_sub_short,_atomic_sub_16)
ATOMIC_OP_ALIAS(atomic_sub_ushort,_atomic_sub_16)
STRONG_ALIAS(__sync_fetch_and_sub_2,_atomic_sub_16)
STRONG_ALIAS(_atomic_sub_short,_atomic_sub_16)
STRONG_ALIAS(_atomic_sub_ushort,_atomic_sub_16)
ENTRY_NP(_atomic_sub_16_nv)
negs r1, r1
/* FALLTHROUGH */
ENTRY_NP(_atomic_add_16_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexh r0, [ip] /* load old value */
adds r0, r0, r1 /* calculate new value (return value) */
strexh r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_add_16_nv)
END(_atomic_sub_16_nv)
ATOMIC_OP_ALIAS(atomic_add_16_nv,_atomic_add_16_nv)
ATOMIC_OP_ALIAS(atomic_add_short_nv,_atomic_add_16_nv)
ATOMIC_OP_ALIAS(atomic_add_ushort_nv,_atomic_add_16_nv)
STRONG_ALIAS(__sync_add_and_fetch_2,_atomic_add_16_nv)
STRONG_ALIAS(_atomic_add_short_nv,_atomic_add_16_nv)
STRONG_ALIAS(_atomic_add_ushort_nv,_atomic_add_16_nv)
ATOMIC_OP_ALIAS(atomic_sub_16_nv,_atomic_sub_16_nv)
ATOMIC_OP_ALIAS(atomic_sub_short_nv,_atomic_sub_16_nv)
ATOMIC_OP_ALIAS(atomic_sub_ushort_nv,_atomic_sub_16_nv)
STRONG_ALIAS(__sync_sub_and_fetch_2,_atomic_sub_16_nv)
STRONG_ALIAS(_atomic_sub_short_nv,_atomic_sub_16_nv)
STRONG_ALIAS(_atomic_sub_ushort_nv,_atomic_sub_16_nv)
#endif /* _ARM_ARCH_6 */

38
common/lib/libc/arch/arm/atomic/atomic_add_32.S
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@ -1,4 +1,4 @@
/* $NetBSD: atomic_add_32.S,v 1.5 2013/08/11 04:41:17 matt Exp $ */
/* $NetBSD: atomic_add_32.S,v 1.6 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@ -33,10 +33,14 @@
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_sub_32)
negs r1, r1
/* FALLTHROUGH */
ENTRY_NP(_atomic_add_32)
1: ldrex r3, [r0] /* load old value */
adds r3, r3, r1 /* calculate new value */
strex r2, r3, [r0] /* try to store */
mov ip, r0
1: ldrex r0, [ip] /* load old value */
adds r3, r0, r1 /* calculate new value */
strex r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
@ -46,15 +50,29 @@ ENTRY_NP(_atomic_add_32)
#endif
RET /* return old value */
END(_atomic_add_32)
END(_atomic_sub_32)
ATOMIC_OP_ALIAS(atomic_add_32,_atomic_add_32)
ATOMIC_OP_ALIAS(atomic_add_int,_atomic_add_32)
ATOMIC_OP_ALIAS(atomic_add_long,_atomic_add_32)
ATOMIC_OP_ALIAS(atomic_add_ptr,_atomic_add_32)
STRONG_ALIAS(__sync_fetch_and_add_4,_atomic_add_32)
STRONG_ALIAS(_atomic_add_int,_atomic_add_32)
STRONG_ALIAS(_atomic_add_long,_atomic_add_32)
STRONG_ALIAS(_atomic_add_ptr,_atomic_add_32)
ATOMIC_OP_ALIAS(atomic_sub_32,_atomic_sub_32)
ATOMIC_OP_ALIAS(atomic_sub_int,_atomic_sub_32)
ATOMIC_OP_ALIAS(atomic_sub_long,_atomic_sub_32)
ATOMIC_OP_ALIAS(atomic_sub_ptr,_atomic_sub_32)
STRONG_ALIAS(__sync_fetch_and_sub_4,_atomic_sub_32)
STRONG_ALIAS(_atomic_sub_int,_atomic_sub_32)
STRONG_ALIAS(_atomic_sub_long,_atomic_sub_32)
STRONG_ALIAS(_atomic_sub_ptr,_atomic_sub_32)
ENTRY_NP(_atomic_sub_32_nv)
negs r1, r1
/* FALLTHROUGH */
ENTRY_NP(_atomic_add_32_nv)
mov ip, r0 /* need r0 for return value */
1: ldrex r0, [ip] /* load old value */
@ -68,13 +86,23 @@ ENTRY_NP(_atomic_add_32_nv)
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_add_32_nv)
END(_atomic_add_32_nv)
END(_atomic_sub_32_nv)
ATOMIC_OP_ALIAS(atomic_add_32_nv,_atomic_add_32_nv)
ATOMIC_OP_ALIAS(atomic_add_int_nv,_atomic_add_32_nv)
ATOMIC_OP_ALIAS(atomic_add_long_nv,_atomic_add_32_nv)
ATOMIC_OP_ALIAS(atomic_add_ptr_nv,_atomic_add_32_nv)
STRONG_ALIAS(__sync_add_and_fetch_4,_atomic_add_32_nv)
STRONG_ALIAS(_atomic_add_int_nv,_atomic_add_32_nv)
STRONG_ALIAS(_atomic_add_long_nv,_atomic_add_32_nv)
STRONG_ALIAS(_atomic_add_ptr_nv,_atomic_add_32_nv)
ATOMIC_OP_ALIAS(atomic_sub_32_nv,_atomic_sub_32_nv)
ATOMIC_OP_ALIAS(atomic_sub_int_nv,_atomic_sub_32_nv)
ATOMIC_OP_ALIAS(atomic_sub_long_nv,_atomic_sub_32_nv)
ATOMIC_OP_ALIAS(atomic_sub_ptr_nv,_atomic_sub_32_nv)
STRONG_ALIAS(__sync_sub_and_fetch_4,_atomic_sub_32_nv)
STRONG_ALIAS(_atomic_sub_int_nv,_atomic_sub_32_nv)
STRONG_ALIAS(_atomic_sub_long_nv,_atomic_sub_32_nv)
STRONG_ALIAS(_atomic_sub_ptr_nv,_atomic_sub_32_nv)
#endif /* _ARM_ARCH_6 */

3
common/lib/libc/arch/arm/atomic/atomic_add_64.S
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@ -1,4 +1,4 @@
/* $NetBSD: atomic_add_64.S,v 1.8 2013/08/20 07:52:31 matt Exp $ */
/* $NetBSD: atomic_add_64.S,v 1.9 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@ -57,5 +57,6 @@ END(_atomic_add_64_nv)
STRONG_ALIAS(_atomic_add_64,_atomic_add_64_nv)
ATOMIC_OP_ALIAS(atomic_add_64_nv,_atomic_add_64_nv)
ATOMIC_OP_ALIAS(atomic_add_64,_atomic_add_64)
STRONG_ALIAS(__sync_add_and_fetch_8,_atomic_add_64_nv)
#endif /* _ARM_ARCH_6 */

100
common/lib/libc/arch/arm/atomic/atomic_add_8.S Normal file
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@ -0,0 +1,100 @@
/* $NetBSD: atomic_add_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_sub_8)
negs r1, r1
/* FALLTHROUGH */
ENTRY_NP(_atomic_add_8)
mov ip, r0
1: ldrexb r0, [ip] /* load old value */
adds r3, r0, r1 /* calculate new value */
strexb r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_add_8)
END(_atomic_sub_8)
ATOMIC_OP_ALIAS(atomic_add_8,_atomic_add_8)
ATOMIC_OP_ALIAS(atomic_add_char,_atomic_add_8)
ATOMIC_OP_ALIAS(atomic_add_uchar,_atomic_add_8)
STRONG_ALIAS(__sync_fetch_and_add_1,_atomic_add_8)
STRONG_ALIAS(_atomic_add_char,_atomic_add_8)
STRONG_ALIAS(_atomic_add_uchar,_atomic_add_8)
ATOMIC_OP_ALIAS(atomic_sub_8,_atomic_sub_8)
ATOMIC_OP_ALIAS(atomic_sub_char,_atomic_sub_8)
ATOMIC_OP_ALIAS(atomic_sub_uchar,_atomic_sub_8)
STRONG_ALIAS(__sync_fetch_and_sub_1,_atomic_sub_8)
STRONG_ALIAS(_atomic_sub_char,_atomic_sub_8)
STRONG_ALIAS(_atomic_sub_uchar,_atomic_sub_8)
ENTRY_NP(_atomic_sub_8_nv)
negs r1, r1
/* FALLTHROUGH */
ENTRY_NP(_atomic_add_8_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexb r0, [ip] /* load old value */
adds r0, r0, r1 /* calculate new value (return value) */
strexb r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_add_8_nv)
END(_atomic_sub_8_nv)
ATOMIC_OP_ALIAS(atomic_add_8_nv,_atomic_add_8_nv)
ATOMIC_OP_ALIAS(atomic_add_char_nv,_atomic_add_8_nv)
ATOMIC_OP_ALIAS(atomic_add_uchar_nv,_atomic_add_8_nv)
STRONG_ALIAS(__sync_add_and_fetch_1,_atomic_add_8_nv)
STRONG_ALIAS(_atomic_add_char_nv,_atomic_add_8_nv)
STRONG_ALIAS(_atomic_add_uchar_nv,_atomic_add_8_nv)
ATOMIC_OP_ALIAS(atomic_sub_8_nv,_atomic_sub_8_nv)
ATOMIC_OP_ALIAS(atomic_sub_char_nv,_atomic_sub_8_nv)
ATOMIC_OP_ALIAS(atomic_sub_uchar_nv,_atomic_sub_8_nv)
STRONG_ALIAS(__sync_sub_and_fetch_1,_atomic_sub_8_nv)
STRONG_ALIAS(_atomic_sub_char_nv,_atomic_sub_8_nv)
STRONG_ALIAS(_atomic_sub_uchar_nv,_atomic_sub_8_nv)
#endif /* _ARM_ARCH_6 */

76
common/lib/libc/arch/arm/atomic/atomic_and_16.S Normal file
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@ -0,0 +1,76 @@
/* $NetBSD: atomic_and_16.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_and_16)
mov ip, r0
1: ldrexh r0, [ip] /* load old value (to be returned) */
ands r3, r0, r1 /* calculate new value */
strexh r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_and_16)
ATOMIC_OP_ALIAS(atomic_and_16,_atomic_and_16)
ATOMIC_OP_ALIAS(atomic_and_ushort,_atomic_and_16)
STRONG_ALIAS(__sync_fetch_and_and_2,_atomic_and_16)
STRONG_ALIAS(_atomic_and_ushort,_atomic_and_16)
ENTRY_NP(_atomic_and_16_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexh r0, [ip] /* load old value */
ands r0, r0, r1 /* calculate new value (return value) */
strexh r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_and_16_nv)
ATOMIC_OP_ALIAS(atomic_and_16_nv,_atomic_and_16_nv)
ATOMIC_OP_ALIAS(atomic_and_ushort_nv,_atomic_and_16_nv)
STRONG_ALIAS(__sync_and_and_fetch_2,_atomic_and_16_nv)
STRONG_ALIAS(_atomic_and_ushort_nv,_atomic_and_16_nv)
#endif /* _ARM_ARCH_6 */

11
common/lib/libc/arch/arm/atomic/atomic_and_32.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_and_32.S,v 1.5 2013/08/11 04:41:17 matt Exp $ */
/* $NetBSD: atomic_and_32.S,v 1.6 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@ -34,9 +34,10 @@
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_and_32)
1: ldrex r3, [r0] /* load old value (to be returned) */
ands r3, r3, r1 /* calculate new value */
strex r2, r3, [r0] /* try to store */
mov ip, r0
1: ldrex r0, [ip] /* load old value (to be returned) */
ands r3, r0, r1 /* calculate new value */
strex r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
@ -50,6 +51,7 @@ END(_atomic_and_32)
ATOMIC_OP_ALIAS(atomic_and_32,_atomic_and_32)
ATOMIC_OP_ALIAS(atomic_and_uint,_atomic_and_32)
ATOMIC_OP_ALIAS(atomic_and_ulong,_atomic_and_32)
STRONG_ALIAS(__sync_fetch_and_and_4,_atomic_and_32)
STRONG_ALIAS(_atomic_and_uint,_atomic_and_32)
STRONG_ALIAS(_atomic_and_ulong,_atomic_and_32)
@ -71,6 +73,7 @@ END(_atomic_and_32_nv)
ATOMIC_OP_ALIAS(atomic_and_32_nv,_atomic_and_32_nv)
ATOMIC_OP_ALIAS(atomic_and_uint_nv,_atomic_and_32_nv)
ATOMIC_OP_ALIAS(atomic_and_ulong_nv,_atomic_and_32_nv)
STRONG_ALIAS(__sync_and_and_fetch_4,_atomic_and_32_nv)
STRONG_ALIAS(_atomic_and_uint_nv,_atomic_and_32_nv)
STRONG_ALIAS(_atomic_and_ulong_nv,_atomic_and_32_nv)

3
common/lib/libc/arch/arm/atomic/atomic_and_64.S
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@ -1,4 +1,4 @@
/* $NetBSD: atomic_and_64.S,v 1.7 2013/08/20 07:52:31 matt Exp $ */
/* $NetBSD: atomic_and_64.S,v 1.8 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@ -57,5 +57,6 @@ END(_atomic_and_64_nv)
STRONG_ALIAS(_atomic_and_64,_atomic_and_64_nv)
ATOMIC_OP_ALIAS(atomic_and_64_nv,_atomic_and_64_nv)
ATOMIC_OP_ALIAS(atomic_and_64,_atomic_and_64_nv)
STRONG_ALIAS(__sync_and_and_fetch_8,_atomic_and_64_nv)
#endif /* _ARM_ARCH_6 */

76
common/lib/libc/arch/arm/atomic/atomic_and_8.S Normal file
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@ -0,0 +1,76 @@
/* $NetBSD: atomic_and_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_and_8)
mov ip, r0
1: ldrexb r0, [ip] /* load old value (to be returned) */
ands r3, r0, r1 /* calculate new value */
strexb r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_and_8)
ATOMIC_OP_ALIAS(atomic_and_8,_atomic_and_8)
ATOMIC_OP_ALIAS(atomic_and_uchar,_atomic_and_8)
STRONG_ALIAS(__sync_fetch_and_and_1,_atomic_and_8)
STRONG_ALIAS(_atomic_and_uchar,_atomic_and_8)
ENTRY_NP(_atomic_and_8_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexb r0, [ip] /* load old value */
ands r0, r0, r1 /* calculate new value (return value) */
strexb r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_and_8_nv)
ATOMIC_OP_ALIAS(atomic_and_8_nv,_atomic_and_8_nv)
ATOMIC_OP_ALIAS(atomic_and_uchar_nv,_atomic_and_8_nv)
STRONG_ALIAS(__sync_and_and_fetch_1,_atomic_and_8_nv)
STRONG_ALIAS(_atomic_and_uchar_nv,_atomic_and_8_nv)
#endif /* _ARM_ARCH_6 */

64
common/lib/libc/arch/arm/atomic/atomic_cas_16.S Normal file
View File

@ -0,0 +1,64 @@
/* $NetBSD: atomic_cas_16.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#if defined(_ARM_ARCH_6)
/*
* ARMv6 has load-exclusive/store-exclusive which works for both user
* and kernel.
*/
ENTRY_NP(_atomic_cas_16)
mov ip, r0 /* we need r0 for return value */
1:
ldrexh r0, [ip] /* load old value */
cmp r0, r1 /* compare? */
#ifdef __thumb__
bne 2f
#else
RETc(ne) /* return if different */
#endif
strexh r3, r2, [ip] /* store new value */
cmp r3, #0 /* succeed? */
bne 1b /* nope, try again. */
#ifdef _ARM_ARCH_7
dsb /* data synchronization barrier */
#else
mcr p15, 0, r3, c7, c10, 4 /* data synchronization barrier */
#endif
2: RET /* return. */
END(_atomic_cas_16)
ATOMIC_OP_ALIAS(atomic_cas_16,_atomic_cas_16)
STRONG_ALIAS(_atomic_cas_short,_atomic_cas_16)
STRONG_ALIAS(_atomic_cas_ushort,_atomic_cas_16)
STRONG_ALIAS(__sync_val_compare_and_swap_2,_atomic_cas_16)
#endif /* _ARM_ARCH_6 */

3
common/lib/libc/arch/arm/atomic/atomic_cas_32.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_cas_32.S,v 1.5 2013/08/10 19:59:21 matt Exp $ */
/* $NetBSD: atomic_cas_32.S,v 1.6 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@ -64,6 +64,7 @@ ATOMIC_OP_ALIAS(atomic_cas_32_ni,_atomic_cas_32)
ATOMIC_OP_ALIAS(atomic_cas_uint_ni,_atomic_cas_32)
ATOMIC_OP_ALIAS(atomic_cas_ulong_ni,_atomic_cas_32)
ATOMIC_OP_ALIAS(atomic_cas_ptr_ni,_atomic_cas_32)
STRONG_ALIAS(__sync_val_compare_and_swap_4,_atomic_cas_32)
STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32)
STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32)
STRONG_ALIAS(_atomic_cas_32_ni,_atomic_cas_32)

3
common/lib/libc/arch/arm/atomic/atomic_cas_64.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_cas_64.S,v 1.3 2013/08/10 19:59:21 matt Exp $ */
/* $NetBSD: atomic_cas_64.S,v 1.4 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@ -70,5 +70,6 @@ ENTRY_NP(_atomic_cas_64)
END(_atomic_cas_64)
ATOMIC_OP_ALIAS(atomic_cas_64,_atomic_cas_64)
STRONG_ALIAS(__sync_val_compare_and_swap_8,_atomic_cas_64)
#endif /* _ARM_ARCH_6 */

6
common/lib/libc/arch/arm/atomic/atomic_cas_8.S
View File

@ -1,6 +1,7 @@
/* $NetBSD: atomic_cas_8.S,v 1.5 2013/08/10 19:59:21 matt Exp $ */
/* $NetBSD: atomic_cas_8.S,v 1.6 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
@ -59,5 +60,6 @@ ENTRY_NP(_atomic_cas_8)
ATOMIC_OP_ALIAS(atomic_cas_8,_atomic_cas_8)
STRONG_ALIAS(_atomic_cas_char,_atomic_cas_8)
STRONG_ALIAS(_atomic_cas_uchar,_atomic_cas_8)
STRONG_ALIAS(__sync_val_compare_and_swap_1,_atomic_cas_8)
#endif /* _ARM_ARCH_6 */

6
common/lib/libc/arch/arm/atomic/atomic_inc_32.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_inc_32.S,v 1.6 2013/08/11 04:41:17 matt Exp $ */
/* $NetBSD: atomic_inc_32.S,v 1.7 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@ -44,7 +44,7 @@ ENTRY_NP(_atomic_inc_32)
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_inc_32)
END(_atomic_inc_32)
ATOMIC_OP_ALIAS(atomic_inc_32,_atomic_inc_32)
ATOMIC_OP_ALIAS(atomic_inc_uint,_atomic_inc_32)
ATOMIC_OP_ALIAS(atomic_inc_ulong,_atomic_inc_32)
@ -66,7 +66,7 @@ ENTRY_NP(_atomic_inc_32_nv)
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_inc_32_nv)
END(_atomic_inc_32_nv)
ATOMIC_OP_ALIAS(atomic_inc_32_nv,_atomic_inc_32_nv)
ATOMIC_OP_ALIAS(atomic_inc_uint_nv,_atomic_inc_32_nv)
ATOMIC_OP_ALIAS(atomic_inc_ulong_nv,_atomic_inc_32_nv)

78
common/lib/libc/arch/arm/atomic/atomic_nand_16.S Normal file
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@ -0,0 +1,78 @@
/* $NetBSD: atomic_nand_16.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_nand_16)
mov ip, r0
1: ldrexh r0, [ip] /* load old value (to be returned) */
mvns r3, r0 /* complement source */
ands r3, r3, r1 /* calculate new value */
strexh r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_nand_16)
ATOMIC_OP_ALIAS(atomic_nand_16,_atomic_nand_16)
ATOMIC_OP_ALIAS(atomic_nand_ushort,_atomic_nand_16)
STRONG_ALIAS(__sync_fetch_and_nand_2,_atomic_nand_16)
STRONG_ALIAS(_atomic_nand_ushort,_atomic_nand_16)
ENTRY_NP(_atomic_nand_16_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexh r0, [ip] /* load old value */
mvns r0, r0 /* complement source */
ands r0, r0, r1 /* calculate new value (return value) */
strexh r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_nand_16_nv)
ATOMIC_OP_ALIAS(atomic_nand_16_nv,_atomic_nand_16_nv)
ATOMIC_OP_ALIAS(atomic_nand_ushort_nv,_atomic_nand_16_nv)
STRONG_ALIAS(__sync_nand_and_fetch_2,_atomic_nand_16_nv)
STRONG_ALIAS(_atomic_nand_ushort_nv,_atomic_nand_16_nv)
#endif /* _ARM_ARCH_6 */

82
common/lib/libc/arch/arm/atomic/atomic_nand_32.S Normal file
View File

@ -0,0 +1,82 @@
/* $NetBSD: atomic_nand_32.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_nand_32)
mov ip, r0
1: ldrex r0, [ip] /* load old value (to be returned) */
mvns r3, r0 /* complement source */
ands r3, r3, r1 /* calculate new value */
strex r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_nand_32)
ATOMIC_OP_ALIAS(atomic_nand_32,_atomic_nand_32)
ATOMIC_OP_ALIAS(atomic_nand_uint,_atomic_nand_32)
ATOMIC_OP_ALIAS(atomic_nand_ulong,_atomic_nand_32)
STRONG_ALIAS(__sync_fetch_and_nand_4,_atomic_nand_32)
STRONG_ALIAS(_atomic_nand_uint,_atomic_nand_32)
STRONG_ALIAS(_atomic_nand_ulong,_atomic_nand_32)
ENTRY_NP(_atomic_nand_32_nv)
mov ip, r0 /* need r0 for return value */
1: ldrex r0, [ip] /* load old value */
mvns r0, r0 /* complement source */
ands r0, r0, r1 /* calculate new value (return value) */
strex r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_32_nv,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_uint_nv,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_ulong_nv,_atomic_nand_32_nv)
STRONG_ALIAS(__sync_nand_and_fetch_4,_atomic_nand_32_nv)
STRONG_ALIAS(_atomic_nand_uint_nv,_atomic_nand_32_nv)
STRONG_ALIAS(_atomic_nand_ulong_nv,_atomic_nand_32_nv)
#endif /* _ARM_ARCH_6 */

64
common/lib/libc/arch/arm/atomic/atomic_nand_64.S Normal file
View File

@ -0,0 +1,64 @@
/* $NetBSD: atomic_nand_64.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_nand_64_nv)
push {r3,r4} /* save temporary */
#ifndef __ARM_EABI__
mov r3, r2
mov r2, r1
#endif
mov ip, r0 /* need r0 for return value */
1: ldrexd r0, [ip] /* load old value */
mvns r0, r0 /* complement old value */
mvns r1, r1 /* complement old value */
ands r0, r0, r2 /* calculate new value */
ands r1, r1, r3 /* calculate new value */
strexd r4, r0, [ip] /* try to store */
cmp r4, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r4, c7, c10, 5 /* data memory barrier */
#endif
pop {r3,r4} /* restore temporary */
RET /* return new value */
END(_atomic_nand_64_nv)
STRONG_ALIAS(_atomic_nand_64,_atomic_nand_64_nv)
ATOMIC_OP_ALIAS(atomic_nand_64_nv,_atomic_nand_64_nv)
ATOMIC_OP_ALIAS(atomic_nand_64,_atomic_nand_64_nv)
STRONG_ALIAS(__sync_nand_and_fetch_8,_atomic_nand_64_nv)
#endif /* _ARM_ARCH_6 */

78
common/lib/libc/arch/arm/atomic/atomic_nand_8.S Normal file
View File

@ -0,0 +1,78 @@
/* $NetBSD: atomic_nand_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_nand_8)
mov ip, r0
1: ldrexb r0, [ip] /* load old value (to be returned) */
mvns r3, r0 /* complement source */
ands r3, r3, r1 /* calculate new value */
strexb r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_nand_8)
ATOMIC_OP_ALIAS(atomic_nand_8,_atomic_nand_8)
ATOMIC_OP_ALIAS(atomic_nand_uchar,_atomic_nand_8)
STRONG_ALIAS(__sync_fetch_and_nand_1,_atomic_nand_8)
STRONG_ALIAS(_atomic_nand_uchar,_atomic_nand_8)
ENTRY_NP(_atomic_nand_8_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexb r0, [ip] /* load old value */
mvns r0, r0 /* complement source */
ands r0, r0, r1 /* calculate new value (return value) */
strexb r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_nand_8_nv)
ATOMIC_OP_ALIAS(atomic_nand_8_nv,_atomic_nand_8_nv)
ATOMIC_OP_ALIAS(atomic_nand_uchar_nv,_atomic_nand_8_nv)
STRONG_ALIAS(__sync_nand_and_fetch_1,_atomic_nand_8_nv)
STRONG_ALIAS(_atomic_nand_uchar_nv,_atomic_nand_8_nv)
#endif /* _ARM_ARCH_6 */

6
common/lib/libc/arch/arm/atomic/atomic_op_asm.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_op_asm.h,v 1.3 2012/09/11 20:51:25 matt Exp $ */
/* $NetBSD: atomic_op_asm.h,v 1.4 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@ -56,11 +56,15 @@
#define LO r1
#define NHI r2
#define NLO r3
#define THI r4
#define TLO r5
#else
#define LO r0
#define HI r1
#define NLO r2
#define NHI r3
#define TLO r4
#define THI r5
#endif
#endif /* _ATOMIC_OP_ASM_H_ */

75
common/lib/libc/arch/arm/atomic/atomic_or_16.S Normal file
View File

@ -0,0 +1,75 @@
/* $NetBSD: atomic_or_16.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_or_16)
mov ip, r0
1: ldrexh r0, [ip] /* load old value (to be returned) */
orrs r3, r0, r1 /* calculate new value */
strexh r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_or_16)
ATOMIC_OP_ALIAS(atomic_or_16,_atomic_or_16)
ATOMIC_OP_ALIAS(atomic_or_ushort,_atomic_or_16)
STRONG_ALIAS(__sync_fetch_and_or_2,_atomic_or_16)
STRONG_ALIAS(_atomic_or_ushort,_atomic_or_16)
ENTRY_NP(_atomic_or_16_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexh r0, [ip] /* load old value */
orrs r0, r0, r1 /* calculate new value (return value) */
strexh r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_or_16_nv)
ATOMIC_OP_ALIAS(atomic_or_16_nv,_atomic_or_16_nv)
ATOMIC_OP_ALIAS(atomic_or_ushort_nv,_atomic_or_16_nv)
STRONG_ALIAS(__sync_or_and_fetch_2,_atomic_or_16_nv)
STRONG_ALIAS(_atomic_or_ushort_nv,_atomic_or_16_nv)
#endif /* _ARM_ARCH_6 */

11
common/lib/libc/arch/arm/atomic/atomic_or_32.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_or_32.S,v 1.5 2013/08/11 04:41:17 matt Exp $ */
/* $NetBSD: atomic_or_32.S,v 1.6 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@ -33,9 +33,10 @@
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_or_32)
1: ldrex r3, [r0] /* load old value (to be returned) */
orrs r3, r3, r1 /* calculate new value */
strex r2, r3, [r0] /* try to store */
mov ip, r0
1: ldrex r0, [ip] /* load old value (to be returned) */
orrs r3, r0, r1 /* calculate new value */
strex r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
@ -49,6 +50,7 @@ END(_atomic_or_32)
ATOMIC_OP_ALIAS(atomic_or_32,_atomic_or_32)
ATOMIC_OP_ALIAS(atomic_or_uint,_atomic_or_32)
ATOMIC_OP_ALIAS(atomic_or_ulong,_atomic_or_32)
STRONG_ALIAS(__sync_fetch_and_or_4,_atomic_or_32)
STRONG_ALIAS(_atomic_or_uint,_atomic_or_32)
STRONG_ALIAS(_atomic_or_ulong,_atomic_or_32)
@ -70,6 +72,7 @@ END(_atomic_or_32_nv)
ATOMIC_OP_ALIAS(atomic_or_32_nv,_atomic_or_32_nv)
ATOMIC_OP_ALIAS(atomic_or_uint_nv,_atomic_or_32_nv)
ATOMIC_OP_ALIAS(atomic_or_ulong_nv,_atomic_or_32_nv)
STRONG_ALIAS(__sync_or_and_fetch_4,_atomic_or_32_nv)
STRONG_ALIAS(_atomic_or_uint_nv,_atomic_or_32_nv)
STRONG_ALIAS(_atomic_or_ulong_nv,_atomic_or_32_nv)

3
common/lib/libc/arch/arm/atomic/atomic_or_64.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_or_64.S,v 1.7 2013/08/20 07:52:31 matt Exp $ */
/* $NetBSD: atomic_or_64.S,v 1.8 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@ -57,5 +57,6 @@ END(_atomic_or_64_nv)
STRONG_ALIAS(_atomic_or_64,_atomic_or_64_nv)
ATOMIC_OP_ALIAS(atomic_or_64_nv,_atomic_or_64_nv)
ATOMIC_OP_ALIAS(atomic_or_64,_atomic_or_64)
STRONG_ALIAS(__sync_or_and_fetch_8,_atomic_or_64)
#endif /* _ARM_ARCH_6 */

76
common/lib/libc/arch/arm/atomic/atomic_or_8.S Normal file
View File

@ -0,0 +1,76 @@
/* $NetBSD: atomic_or_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_or_8)
mov ip, r0
1: ldrexb r0, [ip] /* load old value (to be returned) */
orrs r3, r0, r1 /* calculate new value */
strexb r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_or_8)
ATOMIC_OP_ALIAS(atomic_or_8,_atomic_or_8)
ATOMIC_OP_ALIAS(atomic_or_char,_atomic_or_8)
STRONG_ALIAS(__sync_fetch_and_or_1,_atomic_or_8)
STRONG_ALIAS(_atomic_or_char,_atomic_or_8)
ENTRY_NP(_atomic_or_8_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexb r0, [ip] /* load old value */
orrs r0, r0, r1 /* calculate new value (return value) */
strexb r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_or_8_nv)
ATOMIC_OP_ALIAS(atomic_or_8_nv,_atomic_or_8_nv)
ATOMIC_OP_ALIAS(atomic_or_char_nv,_atomic_or_8_nv)
STRONG_ALIAS(__sync_or_and_fetch_1,_atomic_or_8_nv)
STRONG_ALIAS(_atomic_or_char_nv,_atomic_or_8_nv)
#endif /* _ARM_ARCH_6 */

63
common/lib/libc/arch/arm/atomic/atomic_sub_64.S Normal file
View File

@ -0,0 +1,63 @@
/* $NetBSD: atomic_sub_64.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_sub_64_nv)
push {r3,r4} /* save temporary */
mov ip, r0 /* need r0 for return value */
#ifndef __ARM_EABI__
mov r3, r2
mov r2, r1
#endif
1: ldrexd r0, [ip] /* load old value */
subs LO, LO, NLO /* calculate new value lo */
sbcs HI, HI, NHI /* calculate new value hi */
strexd r4, r0, [ip] /* try to store */
cmp r4, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r4, c7, c10, 5 /* data memory barrier */
#endif
pop {r3,r4} /* restore temporary */
RET /* return new value */
END(_atomic_sub_64_nv)
STRONG_ALIAS(_atomic_sub_64,_atomic_sub_64_nv)
ATOMIC_OP_ALIAS(atomic_sub_64_nv,_atomic_sub_64_nv)
ATOMIC_OP_ALIAS(atomic_sub_64,_atomic_sub_64)
STRONG_ALIAS(__sync_sub_and_fetch_8,_atomic_sub_64_nv)
#endif /* _ARM_ARCH_6 */

16
common/lib/libc/arch/arm/atomic/atomic_swap.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_swap.S,v 1.7 2013/08/11 04:41:17 matt Exp $ */
/* $NetBSD: atomic_swap.S,v 1.8 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2007,2012 The NetBSD Foundation, Inc.
@ -78,10 +78,17 @@ ATOMIC_OP_ALIAS(atomic_swap_32,_atomic_swap_32)
ATOMIC_OP_ALIAS(atomic_swap_uint,_atomic_swap_32)
ATOMIC_OP_ALIAS(atomic_swap_ulong,_atomic_swap_32)
ATOMIC_OP_ALIAS(atomic_swap_ptr,_atomic_swap_32)
STRONG_ALIAS(__sync_lock_test_and_set_4,_atomic_swap_32)
STRONG_ALIAS(_atomic_swap_uint,_atomic_swap_32)
STRONG_ALIAS(_atomic_swap_ulong,_atomic_swap_32)
STRONG_ALIAS(_atomic_swap_ptr,_atomic_swap_32)
ENTRY_NP(__sync_lock_release_4)
mov r1, #0
strb r1, [r0]
RET
END(__sync_lock_release_4)
ENTRY_NP(_atomic_swap_8)
mov ip, r0
1:
@ -105,5 +112,12 @@ END(_atomic_swap_8)
ATOMIC_OP_ALIAS(atomic_swap_8,_atomic_swap_8)
ATOMIC_OP_ALIAS(atomic_swap_char,_atomic_swap_8)
ATOMIC_OP_ALIAS(atomic_swap_uchar,_atomic_swap_8)
STRONG_ALIAS(__sync_lock_test_and_set_1,_atomic_swap_8)
STRONG_ALIAS(_atomic_swap_char,_atomic_swap_8)
STRONG_ALIAS(_atomic_swap_uchar,_atomic_swap_8)
ENTRY_NP(__sync_lock_release_1)
mov r1, #0
strb r1, [r0]
RET
END(__sync_lock_release_1)

62
common/lib/libc/arch/arm/atomic/atomic_swap_16.S Normal file
View File

@ -0,0 +1,62 @@
/* $NetBSD: atomic_swap_16.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas of 3am Software Foundry.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_swap_16)
mov ip, r0
1:
ldrexh r0, [ip]
strexh r3, r1, [ip]
cmp r3, #0
bne 1b
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, ip, c7, c10, 5 /* data memory barrier */
#endif
RET
END(_atomic_swap_16)
ATOMIC_OP_ALIAS(atomic_swap_16,_atomic_swap_16)
ATOMIC_OP_ALIAS(atomic_swap_short,_atomic_swap_16)
ATOMIC_OP_ALIAS(atomic_swap_ushort,_atomic_swap_16)
STRONG_ALIAS(__sync_lock_test_and_set_2,_atomic_swap_16)
STRONG_ALIAS(_atomic_swap_short,_atomic_swap_16)
STRONG_ALIAS(_atomic_swap_ushort,_atomic_swap_16)
ENTRY_NP(__sync_lock_release_2)
mov r1, #0
strh r1, [r0]
RET
END(__sync_lock_release_2)
#endif /* _ARM_ARCH_6 */

12
common/lib/libc/arch/arm/atomic/atomic_swap_64.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: atomic_swap_64.S,v 1.5 2013/08/20 07:52:31 matt Exp $ */
/* $NetBSD: atomic_swap_64.S,v 1.6 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@ -48,5 +48,13 @@ ENTRY_NP(_atomic_swap_64)
#endif
pop {r3,r4} /* restore temporary */
RET
END(_atomic_swap_64)
END(_atomic_swap_64)
ATOMIC_OP_ALIAS(atomic_swap_64,_atomic_swap_64)
STRONG_ALIAS(__sync_lock_test_and_set_8,_atomic_swap_64)
ENTRY_NP(__sync_lock_release_8)
mov r2, #0
mov r3, #0
strd r2, [r0]
RET
END(__sync_lock_release_8)

76
common/lib/libc/arch/arm/atomic/atomic_xor_16.S Normal file
View File

@ -0,0 +1,76 @@
/* $NetBSD: atomic_xor_16.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_xor_16)
mov ip, r0
1: ldrexh r0, [ip] /* load old value (to be returned) */
eors r3, r0, r1 /* calculate new value */
strexh r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_xor_16)
ATOMIC_OP_ALIAS(atomic_xor_16,_atomic_xor_16)
ATOMIC_OP_ALIAS(atomic_xor_ushort,_atomic_xor_16)
STRONG_ALIAS(__sync_fetch_and_xor_2,_atomic_xor_16)
STRONG_ALIAS(_atomic_xor_ushort,_atomic_xor_16)
ENTRY_NP(_atomic_xor_16_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexh r0, [ip] /* load old value */
eors r0, r0, r1 /* calculate new value (return value) */
strexh r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_xor_16_nv)
ATOMIC_OP_ALIAS(atomic_xor_16_nv,_atomic_xor_16_nv)
ATOMIC_OP_ALIAS(atomic_xor_ushort_nv,_atomic_xor_16_nv)
STRONG_ALIAS(__sync_xor_and_fetch_2,_atomic_xor_16_nv)
STRONG_ALIAS(_atomic_xor_ushort_nv,_atomic_xor_16_nv)
#endif /* _ARM_ARCH_6 */

79
common/lib/libc/arch/arm/atomic/atomic_xor_32.S Normal file
View File

@ -0,0 +1,79 @@
/* $NetBSD: atomic_xor_32.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_xor_32)
mov ip, r0
1: ldrex r0, [ip] /* load old value (to be returned) */
eors r3, r0, r1 /* calculate new value */
strex r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_xor_32)
ATOMIC_OP_ALIAS(atomic_xor_32,_atomic_xor_32)
ATOMIC_OP_ALIAS(atomic_xor_uint,_atomic_xor_32)
ATOMIC_OP_ALIAS(atomic_xor_ulong,_atomic_xor_32)
STRONG_ALIAS(__sync_fetch_and_xor_4,_atomic_xor_32)
STRONG_ALIAS(_atomic_xor_uint,_atomic_xor_32)
STRONG_ALIAS(_atomic_xor_ulong,_atomic_xor_32)
ENTRY_NP(_atomic_xor_32_nv)
mov ip, r0 /* need r0 for return value */
1: ldrex r0, [ip] /* load old value */
eors r0, r0, r1 /* calculate new value (return value) */
strex r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_xor_32_nv)
ATOMIC_OP_ALIAS(atomic_xor_32_nv,_atomic_xor_32_nv)
ATOMIC_OP_ALIAS(atomic_xor_uint_nv,_atomic_xor_32_nv)
ATOMIC_OP_ALIAS(atomic_xor_ulong_nv,_atomic_xor_32_nv)
STRONG_ALIAS(__sync_xor_and_fetch_4,_atomic_xor_32_nv)
STRONG_ALIAS(_atomic_xor_uint_nv,_atomic_xor_32_nv)
STRONG_ALIAS(_atomic_xor_ulong_nv,_atomic_xor_32_nv)
#endif /* _ARM_ARCH_6 */

62
common/lib/libc/arch/arm/atomic/atomic_xor_64.S Normal file
View File

@ -0,0 +1,62 @@
/* $NetBSD: atomic_xor_64.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_xor_64_nv)
push {r3,r4} /* save temporary */
#ifndef __ARM_EABI__
mov r3, r2
mov r2, r1
#endif
mov ip, r0 /* need r0 for return value */
1: ldrexd r0, [ip] /* load old value */
eors r0, r0, r2 /* calculate new value (return value) */
eors r1, r1, r3 /* calculate new value (return value) */
strexd r4, r0, [ip] /* try to store */
cmp r4, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r4, c7, c10, 5 /* data memory barrier */
#endif
pop {r3,r4} /* restore temporary */
RET /* return new value */
END(_atomic_xor_64_nv)
STRONG_ALIAS(_atomic_xor_64,_atomic_xor_64_nv)
ATOMIC_OP_ALIAS(atomic_xor_64_nv,_atomic_xor_64_nv)
ATOMIC_OP_ALIAS(atomic_xor_64,_atomic_xor_64)
STRONG_ALIAS(__sync_xor_and_fetch_8,_atomic_xor_64)
#endif /* _ARM_ARCH_6 */

76
common/lib/libc/arch/arm/atomic/atomic_xor_8.S Normal file
View File

@ -0,0 +1,76 @@
/* $NetBSD: atomic_xor_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(_atomic_xor_8)
mov ip, r0
1: ldrexb r0, [ip] /* load old value (to be returned) */
eors r3, r0, r1 /* calculate new value */
strexb r2, r3, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return old value */
END(_atomic_xor_8)
ATOMIC_OP_ALIAS(atomic_xor_8,_atomic_xor_8)
ATOMIC_OP_ALIAS(atomic_xor_uchar,_atomic_xor_8)
STRONG_ALIAS(__sync_fetch_and_xor_1,_atomic_xor_8)
STRONG_ALIAS(_atomic_xor_uchar,_atomic_xor_8)
ENTRY_NP(_atomic_xor_8_nv)
mov ip, r0 /* need r0 for return value */
1: ldrexb r0, [ip] /* load old value */
eors r0, r0, r1 /* calculate new value (return value) */
strexb r2, r0, [ip] /* try to store */
cmp r2, #0 /* succeed? */
bne 1b /* no, try again? */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
RET /* return new value */
END(_atomic_xor_8_nv)
ATOMIC_OP_ALIAS(atomic_xor_8_nv,_atomic_xor_8_nv)
ATOMIC_OP_ALIAS(atomic_xor_uchar_nv,_atomic_xor_8_nv)
STRONG_ALIAS(__sync_xor_and_fetch_1,_atomic_xor_8_nv)
STRONG_ALIAS(_atomic_xor_uchar_nv,_atomic_xor_8_nv)
#endif /* _ARM_ARCH_6 */

7
common/lib/libc/arch/arm/atomic/membar_ops.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: membar_ops.S,v 1.3 2012/08/16 16:49:10 matt Exp $ */
/* $NetBSD: membar_ops.S,v 1.4 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@ -39,7 +39,7 @@ ENTRY_NP(_membar_producer)
mcr p15, 0, r0, c7, c10, 4 /* Data Synchronization Barrier */
#endif
RET
END(_membar_producer)
END(_membar_producer)
ATOMIC_OP_ALIAS(membar_producer,_membar_producer)
ATOMIC_OP_ALIAS(membar_write,_membar_producer)
STRONG_ALIAS(_membar_write,_membar_producer)
@ -51,12 +51,13 @@ ENTRY_NP(_membar_sync)
mcr p15, 0, r0, c7, c10, 5 /* Data Memory Barrier */
#endif
RET
END(_membar_sync)
END(_membar_sync)
ATOMIC_OP_ALIAS(membar_sync,_membar_sync)
ATOMIC_OP_ALIAS(membar_enter,_membar_sync)
ATOMIC_OP_ALIAS(membar_exit,_membar_sync)
ATOMIC_OP_ALIAS(membar_consumer,_membar_sync)
ATOMIC_OP_ALIAS(membar_read,_membar_sync)
STRONG_ALIAS(__sync_synchronize,_membar_sync)
STRONG_ALIAS(_membar_enter,_membar_sync)
STRONG_ALIAS(_membar_exit,_membar_sync)
STRONG_ALIAS(_membar_consumer,_membar_sync)

62
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_1.S Normal file
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@ -0,0 +1,62 @@
/* $NetBSD: sync_bool_compare_and_swap_1.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#if defined(_ARM_ARCH_6)
/*
* ARMv6 has load-exclusive/store-exclusive which works for both user
* and kernel.
*/
ENTRY_NP(__sync_bool_compare_and_swap_1)
mov ip, r0 /* we need r0 for return value */
mov r0, #0 /* assume no match */
1:
ldrexb r3, [ip] /* load old value */
cmp r3, r1 /* compare? */
#ifdef __thumb__
bne 2f
#else
RETc(ne) /* return if different */
#endif
strexb r0, r2, [ip] /* store new value */
cmp r0, #0 /* succeed? */
bne 1b /* nope, try again. */
mov r0, #1 /* it was a success */
#ifdef _ARM_ARCH_7
dsb /* data synchronization barrier */
#else
mcr p15, 0, r3, c7, c10, 4 /* data synchronization barrier */
#endif
2: RET /* return. */
END(__sync_bool_compare_and_swap_1)
#endif /* _ARM_ARCH_6 */

61
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_2.S Normal file
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@ -0,0 +1,61 @@
/* $NetBSD: sync_bool_compare_and_swap_2.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#if defined(_ARM_ARCH_6)
/*
* ARMv6 has load-exclusive/store-exclusive which works for both user
* and kernel.
*/
ENTRY_NP(__sync_bool_compare_and_swap_2)
mov ip, r0 /* we need r0 for return value */
movs r0, #0 /* assume failure */
1:
ldrexh r3, [ip] /* load old value */
cmp r3, r1 /* compare? */
#ifdef __thumb__
bne 2f
#else
RETc(ne) /* return if different */
#endif
strexh r0, r2, [ip] /* store new value */
cmp r0, #0 /* succeed? */
bne 1b /* nope, try again. */
movs r0, #1 /* indicate success */
#ifdef _ARM_ARCH_7
dsb /* data synchronization barrier */
#else
mcr p15, 0, r3, c7, c10, 4 /* data synchronization barrier */
#endif
2: RET /* return. */
END(__sync_bool_compare_and_swap_2)
#endif /* _ARM_ARCH_6 */

61
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_4.S Normal file
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@ -0,0 +1,61 @@
/* $NetBSD: sync_bool_compare_and_swap_4.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#if defined(_ARM_ARCH_6)
/*
* ARMv6 has load-exclusive/store-exclusive which works for both user
* and kernel.
*/
ENTRY_NP(__sync_bool_compare_and_swap_4)
mov ip, r0 /* we need r0 for return value */
movs r0, #0 /* assume failure */
1:
ldrex r3, [ip] /* load old value */
cmp r3, r1 /* compare? */
#ifdef __thumb__
bne 2f /* return if different */
#else
RETc(ne) /* return if different */
#endif
strex r0, r2, [ip] /* store new value */
cmp r0, #0 /* succeed? */
bne 1b /* nope, try again. */
movs r0, #1 /* indicate success */
#ifdef _ARM_ARCH_7
dsb
#else
mcr p15, 0, r3, c7, c10, 4 /* data synchronization barrier */
#endif
2: RET /* return. */
END(__sync_bool_compare_and_swap_4)
#endif /* _ARM_ARCH_6 */

73
common/lib/libc/arch/arm/atomic/sync_bool_compare_and_swap_8.S Normal file
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@ -0,0 +1,73 @@
/* $NetBSD: sync_bool_compare_and_swap_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#if defined(_ARM_ARCH_6)
/*
* ARMv6 has load-exclusive/store-exclusive which works for both user
* and kernel.
*/
ENTRY_NP(__sync_bool_compare_and_swap_8)
push {r4-r7} /* save temporaries */
mov ip, r0 /* we need r0 for return value */
movs r0, #0 /* assume failure */
#ifdef __ARM_EABI__
ldrd r4, [sp] /* fetch new value from stack */
#else
ldr r4, [sp, #0] /* fetch new value from stack */
ldr r5, [sp, #4] /* fetch new value from stack */
mov r3, r2 /* r2 will be overwritten by r1 which ... */
mov r2, r1 /* r1 will be overwritten by ldrexd */
#endif
1:
ldrexd r6, [ip] /* load current value */
cmp r6, r2 /* compare to old? 1st half */
#ifdef __thumb__
bne 2f /* jump to return if different */
cmp r7, r3 /* compare to old? 2nd half */
#else
cmpeq r7, r3 /* compare to old? 2nd half */
#endif
bne 2f /* jump to return if different */
strexd r0, r4, [ip] /* store new value */
cmp r0, #0 /* succeed? */
bne 1b /* nope, try again. */
movs r0, #1 /* indicate success */
#ifdef _ARM_ARCH_7
dsb
#else
mcr p15, 0, ip, c7, c10, 4 /* data synchronization barrier */
#endif
2: pop {r4-r7} /* restore temporaries */
RET /* return. */
END(__sync_bool_compare_and_swap_8)
#endif /* _ARM_ARCH_6 */

58
common/lib/libc/arch/arm/atomic/sync_fetch_and_add_8.S Normal file
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@ -0,0 +1,58 @@
/* $NetBSD: sync_fetch_and_add_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(__sync_fetch_and_add_8)
push {r4-r7}
mov ip, r0
#ifndef __ARM__EABI__
mov r3, r2
mov r2, r1
#endif
1: ldrexd r0, [ip] /* load old value */
adds TLO, LO, NLO /* calculate new value */
adcs THI, HI, NHI /* calculate new value */
strexd r6, r4, [ip] /* try to store */
cmp r6, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
pop {r4-r7}
RET /* return old value */
END(__sync_fetch_and_add_8)
#endif /* _ARM_ARCH_6 */

58
common/lib/libc/arch/arm/atomic/sync_fetch_and_and_8.S Normal file
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@ -0,0 +1,58 @@
/* $NetBSD: sync_fetch_and_and_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(__sync_fetch_and_and_8)
push {r4-r7}
mov ip, r0
#ifndef __ARM__EABI__
mov r3, r2
mov r2, r1
#endif
1: ldrexd r0, [ip] /* load old value */
ands r4, r0, r2 /* calculate new value */
ands r5, r1, r3 /* calculate new value */
strexd r6, r4, [ip] /* try to store */
cmp r6, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
pop {r4-r7}
RET /* return old value */
END(__sync_fetch_and_and_8)
#endif /* _ARM_ARCH_6 */

60
common/lib/libc/arch/arm/atomic/sync_fetch_and_nand_8.S Normal file
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@ -0,0 +1,60 @@
/* $NetBSD: sync_fetch_and_nand_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(__sync_fetch_and_nand_8)
push {r4-r7}
mov ip, r0
#ifndef __ARM__EABI__
mov r3, r2
mov r2, r1
#endif
1: ldrexd r0, [ip] /* load old value */
mvns r4, r0 /* complement old value */
mvns r5, r0 /* complement old value */
ands r4, r4, r2 /* calculate new value */
ands r5, r5, r3 /* calculate new value */
strexd r6, r4, [ip] /* try to store */
cmp r6, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
pop {r4-r7}
RET /* return old value */
END(__sync_fetch_and_nand_8)
#endif /* _ARM_ARCH_6 */

58
common/lib/libc/arch/arm/atomic/sync_fetch_and_or_8.S Normal file
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@ -0,0 +1,58 @@
/* $NetBSD: sync_fetch_and_or_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(__sync_fetch_and_or_8)
push {r4-r7}
mov ip, r0
#ifndef __ARM__EABI__
mov r3, r2
mov r2, r1
#endif
1: ldrexd r0, [ip] /* load old value */
orrs r4, r0, r2 /* calculate new value */
orrs r5, r1, r3 /* calculate new value */
strexd r6, r4, [ip] /* try to store */
cmp r6, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
pop {r4-r7}
RET /* return old value */
END(__sync_fetch_and_or_8)
#endif /* _ARM_ARCH_6 */

58
common/lib/libc/arch/arm/atomic/sync_fetch_and_sub_8.S Normal file
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@ -0,0 +1,58 @@
/* $NetBSD: sync_fetch_and_sub_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(__sync_fetch_and_sub_8)
push {r4-r7}
mov ip, r0
#ifndef __ARM__EABI__
mov r3, r2
mov r2, r1
#endif
1: ldrexd r0, [ip] /* load old value */
subs TLO, LO, NLO /* calculate new value */
sbcs THI, HI, NHI /* calculate new value */
strexd r6, r4, [ip] /* try to store */
cmp r6, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
pop {r4-r7}
RET /* return old value */
END(__sync_fetch_and_sub_8)
#endif /* _ARM_ARCH_6 */

58
common/lib/libc/arch/arm/atomic/sync_fetch_and_xor_8.S Normal file
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@ -0,0 +1,58 @@
/* $NetBSD: sync_fetch_and_xor_8.S,v 1.1 2013/11/08 22:42:52 matt Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "atomic_op_asm.h"
#ifdef _ARM_ARCH_6
ENTRY_NP(__sync_fetch_and_xor_8)
push {r4-r7}
mov ip, r0
#ifndef __ARM__EABI__
mov r3, r2
mov r2, r1
#endif
1: ldrexd r0, [ip] /* load old value */
eors r4, r0, r2 /* calculate new value */
eors r5, r1, r3 /* calculate new value */
strexd r6, r4, [ip] /* try to store */
cmp r6, #0 /* succeed? */
bne 1b /* no, try again */
#ifdef _ARM_ARCH_7
dmb
#else
mcr p15, 0, r2, c7, c10, 5 /* data memory barrier */
#endif
pop {r4-r7}
RET /* return old value */
END(__sync_fetch_and_xor_8)
#endif /* _ARM_ARCH_6 */