remove pyro_xir(). we don't have the MD support for it (yet?).
clean up some debug code. clean up the DPRINTF() code, and expand the interrupt mapping debug code to match schizo and psycho. set IOMMU_TSBSIZE_IN_PTSB, and if oberon, IOMMU_FLUSH_CACHE. disable the STC explicitly.
This commit is contained in:
mrg
parent
817ca0ac3d
commit
9117b6a117
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@ -1,4 +1,4 @@
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/* $NetBSD: pyro.c,v 1.2 2011/03/15 11:42:03 mrg Exp $ */
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/* $NetBSD: pyro.c,v 1.3 2011/03/20 20:48:36 mrg Exp $ */
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/* from: $OpenBSD: pyro.c,v 1.20 2010/12/05 15:15:14 kettenis Exp $ */
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/*
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@ -118,12 +118,6 @@ void *pyro_intr_establish(bus_space_tag_t, int, int,
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int pyro_dmamap_create(bus_dma_tag_t, bus_size_t, int,
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bus_size_t, bus_size_t, int, bus_dmamap_t *);
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#if 0
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#ifdef DDB
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void pyro_xir(void *, int);
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#endif
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#endif
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int
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pyro_match(struct device *parent, struct cfdata *match, void *aux)
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{
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@ -219,7 +213,6 @@ pyro_init(struct pyro_softc *sc, int busa)
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if (bus_space_map(pbm->pp_cfgt, 0, 0x10000000, 0, &pbm->pp_cfgh))
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panic("pyro: can't map config space");
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printf("cfgh: _ptr %p _asi %x _sasi %x\n", (void *)pbm->pp_cfgh._ptr, pbm->pp_cfgh._asi, pbm->pp_cfgh._sasi);
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pbm->pp_pc = pyro_alloc_chipset(pbm, sc->sc_node, &_sparc_pci_chipset);
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pbm->pp_pc->spc_busmax = busranges[1];
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@ -244,12 +237,6 @@ printf("cfgh: _ptr %p _asi %x _sasi %x\n", (void *)pbm->pp_cfgh._ptr, pbm->pp_cf
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free(busranges, M_DEVBUF);
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#if 0
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#ifdef DDB
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db_register_xir(pyro_xir, sc);
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#endif
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#endif
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config_found(&sc->sc_dv, &pba, pyro_print);
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}
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@ -269,16 +256,17 @@ pyro_init_iommu(struct pyro_softc *sc, struct pyro_pbm *pbm)
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panic("pyro: unable to create iommu handle");
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}
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#if 0
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is->is_sb[0] = &pbm->pp_sb;
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is->is_sb[0]->sb_bustag = is->is_bustag;
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#endif
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/* We have no STC. */
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is->is_sb[0] = NULL;
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name = (char *)malloc(32, M_DEVBUF, M_NOWAIT);
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if (name == NULL)
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panic("couldn't malloc iommu name");
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snprintf(name, 32, "%s dvma", sc->sc_dv.dv_xname);
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/* Tell iommu how to set the TSB size. */
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is->is_flags = IOMMU_TSBSIZE_IN_PTSB;
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/* On Oberon, we need to flush the cache. */
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if (sc->sc_oberon)
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is->is_flags |= IOMMU_FLUSH_CACHE;
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@ -294,14 +282,6 @@ pyro_print(void *aux, const char *p)
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return (QUIET);
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}
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#if 0 /* XXXMRG */
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int
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pyro_conf_size(pci_chipset_tag_t pc, pcitag_t tag)
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{
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return PCIE_CONFIG_SPACE_SIZE;
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}
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#endif
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pcireg_t
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pyro_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
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{
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@ -347,7 +327,7 @@ pyro_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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if (*ihp != (pci_intr_handle_t)-1) {
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*ihp |= sc->sc_ign;
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DPRINTF(PDB_INTR, ("%s: not -1 -> ih %lx", __func__, (u_long)*ihp));
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DPRINTF(PDB_INTR, ("%s: not -1 -> ih %lx\n", __func__, (u_long)*ihp));
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return (0);
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}
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@ -359,7 +339,7 @@ pyro_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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*/
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if (pa->pa_intrpin == 0) {
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DPRINTF(PDB_INTR, ("%s: no intrpen", __func__));
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DPRINTF(PDB_INTR, ("%s: no intrpen\n", __func__));
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return (-1);
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}
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@ -373,7 +353,7 @@ pyro_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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*ihp |= (dev << 2) & INTMAP_PCISLOT;
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*ihp |= sc->sc_ign;
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DPRINTF(PDB_INTR, ("%s: weird hack -> ih %lx", __func__, (u_long)*ihp));
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DPRINTF(PDB_INTR, ("%s: weird hack -> ih %lx\n", __func__, (u_long)*ihp));
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return (0);
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}
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@ -561,7 +541,7 @@ pyro_intr_establish(bus_space_tag_t t, int ihandle, int level,
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struct pyro_softc *sc = pbm->pp_sc;
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struct intrhand *ih = NULL;
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volatile u_int64_t *intrmapptr = NULL, *intrclrptr = NULL;
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u_int64_t *imap, *iclr;
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u_int64_t *imapbase, *iclrbase;
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int ino;
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ino = INTINO(ihandle);
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@ -574,11 +554,11 @@ pyro_intr_establish(bus_space_tag_t t, int ihandle, int level,
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level = 2;
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}
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imap = (uint64_t *)((uintptr_t)bus_space_vaddr(sc->sc_bustag, sc->sc_csrh) + 0x1000);
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iclr = (uint64_t *)((uintptr_t)bus_space_vaddr(sc->sc_bustag, sc->sc_csrh) + 0x1400);
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intrmapptr = &imap[ino];
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intrclrptr = &iclr[ino];
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DPRINTF(PDB_INTR, (" imap %p iclr %p mapptr %p clrptr %p", imap, iclr, intrmapptr, intrclrptr));
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imapbase = (uint64_t *)((uintptr_t)bus_space_vaddr(sc->sc_bustag, sc->sc_csrh) + 0x1000);
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iclrbase = (uint64_t *)((uintptr_t)bus_space_vaddr(sc->sc_bustag, sc->sc_csrh) + 0x1400);
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intrmapptr = &imapbase[ino];
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intrclrptr = &iclrbase[ino];
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DPRINTF(PDB_INTR, (" imapbase %p iclrbase %p mapptr %p clrptr %p\n", imapbase, iclrbase, intrmapptr, intrclrptr));
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ino |= INTVEC(ihandle);
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ih = malloc(sizeof *ih, M_DEVBUF, M_NOWAIT);
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@ -597,30 +577,38 @@ pyro_intr_establish(bus_space_tag_t t, int ihandle, int level,
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intr_establish(ih->ih_pil, level != IPL_VM, ih);
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if (intrmapptr != NULL) {
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u_int64_t ival;
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u_int64_t imap;
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ival = *intrmapptr;
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ival &= ~FIRE_INTRMAP_INT_CNTRL_NUM_MASK;
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ival |= FIRE_INTRMAP_INT_CNTRL_NUM0;
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imap = *intrmapptr;
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DPRINTF(PDB_INTR, ("%s: read intrmap = %016qx", __func__,
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(unsigned long long)imap));
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imap &= ~FIRE_INTRMAP_INT_CNTRL_NUM_MASK;
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imap |= FIRE_INTRMAP_INT_CNTRL_NUM0;
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DPRINTF(PDB_INTR, ("; set intr group intrmap = %016qx",
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(unsigned long long)imap));
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if (sc->sc_oberon) {
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ival &= ~OBERON_INTRMAP_T_DESTID_MASK;
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ival |= CPU_JUPITERID <<
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imap &= ~OBERON_INTRMAP_T_DESTID_MASK;
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imap |= CPU_JUPITERID <<
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OBERON_INTRMAP_T_DESTID_SHIFT;
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} else {
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ival &= ~FIRE_INTRMAP_T_JPID_MASK;
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ival |= CPU_UPAID << FIRE_INTRMAP_T_JPID_SHIFT;
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imap &= ~FIRE_INTRMAP_T_JPID_MASK;
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imap |= CPU_UPAID << FIRE_INTRMAP_T_JPID_SHIFT;
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}
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ival |= INTMAP_V;
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*intrmapptr = ival;
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ival = *intrmapptr;
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ih->ih_number |= ival & INTMAP_INR;
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DPRINTF(PDB_INTR, ("; set cpuid num intrmap = %016qx",
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(unsigned long long)imap));
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imap |= INTMAP_V;
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*intrmapptr = imap;
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DPRINTF(PDB_INTR, ("; writing intrmap = %016qx",
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(unsigned long long)imap));
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imap = *intrmapptr;
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DPRINTF(PDB_INTR, ("; reread intrmap = %016qx\n",
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(unsigned long long)imap));
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ih->ih_number |= imap & INTMAP_INR;
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}
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#if 0 /* XXXMRG? do this? our schizo does. */
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if (intrclrptr) {
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/* set state to IDLE */
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*intrclrptr = 0;
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}
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#endif
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return (ih);
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}
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@ -632,22 +620,9 @@ pyro_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
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void *cookie;
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struct pyro_pbm *pbm = (struct pyro_pbm *)pc->cookie;
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DPRINTF(PDB_INTR, ("%s: ih %lx; level %d", __func__, (u_long)ih, level));
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DPRINTF(PDB_INTR, ("%s: ih %lx; level %d\n", __func__, (u_long)ih, level));
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cookie = bus_intr_establish(pbm->pp_memt, ih, level, func, arg);
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DPRINTF(PDB_INTR, ("; returning handle %p\n", cookie));
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DPRINTF(PDB_INTR, ("%s: returning handle %p\n", __func__, cookie));
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return (cookie);
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}
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#if 0
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#ifdef DDB
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void
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pyro_xir(void *arg, int cpu)
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{
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struct pyro_softc *sc = arg;
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bus_space_write_8(sc->sc_bustag, sc->sc_xbch, FIRE_RESET_GEN,
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FIRE_RESET_GEN_XIR);
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}
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#endif
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#endif
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