Make colour depths higher than 8bit work in X.
Now igsfb will switch to 16 or 32 bit colour when entering graphics mode, depending on available video memory and the given mode. While there re-initialize the colour map etc. when leaving graphics mode.
This commit is contained in:
macallan
parent
c32688c3c2
commit
910612113d
@ -1,4 +1,4 @@
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/* $NetBSD: igsfb.c,v 1.46 2009/11/11 17:01:17 macallan Exp $ */
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/* $NetBSD: igsfb.c,v 1.47 2009/11/18 21:59:38 macallan Exp $ */
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/*
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* Copyright (c) 2002, 2003 Valeriy E. Ushakov
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@ -31,7 +31,7 @@
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* Integraphics Systems IGA 168x and CyberPro series.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: igsfb.c,v 1.46 2009/11/11 17:01:17 macallan Exp $");
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__KERNEL_RCSID(0, "$NetBSD: igsfb.c,v 1.47 2009/11/18 21:59:38 macallan Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -201,7 +201,8 @@ igsfb_attach_subr(struct igsfb_softc *sc, int isconsole)
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? "hardware bswap, " : "software bswap, "
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: "",
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dc->dc_width, dc->dc_height, dc->dc_depth);
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printf("%s: using %dbpp for X\n", device_xname(&sc->sc_dev),
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dc->dc_maxdepth);
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ri = &dc->dc_console.scr_ri;
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ri->ri_ops.eraserows(ri, 0, ri->ri_rows, defattr);
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@ -613,13 +614,13 @@ igsfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
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#define wsd_fbip ((struct wsdisplay_fbinfo *)data)
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wsd_fbip->height = dc->dc_height;
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wsd_fbip->width = dc->dc_width;
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wsd_fbip->depth = dc->dc_depth;
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wsd_fbip->depth = dc->dc_maxdepth;
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wsd_fbip->cmsize = IGS_CMAP_SIZE;
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#undef wsd_fbip
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return 0;
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case WSDISPLAYIO_LINEBYTES:
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*(int *)data = dc->dc_stride;
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*(int *)data = dc->dc_width * (dc->dc_maxdepth >> 3);
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return 0;
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case WSDISPLAYIO_SMODE:
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@ -632,8 +633,14 @@ igsfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
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igsfb_update_cursor(dc,
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WSDISPLAY_CURSOR_DOCUR);
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}
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if ((dc->dc_mode != NULL) && (dc->dc_maxdepth != 8))
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igsfb_set_mode(dc, dc->dc_mode,
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dc->dc_maxdepth);
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} else {
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dc->dc_mapped = 0;
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if ((dc->dc_mode != NULL) && (dc->dc_maxdepth != 8))
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igsfb_set_mode(dc, dc->dc_mode, 8);
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igsfb_init_cmap(dc);
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/* reinit sprite for text cursor */
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if (dc->dc_hwflags & IGSFB_HW_TEXT_CURSOR) {
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igsfb_make_text_cursor(dc, dc->dc_vd.active);
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@ -1170,6 +1177,7 @@ igsfb_accel_wait(struct igsfb_devconfig *dc)
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int timo = 100000;
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uint8_t reg;
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bus_space_write_1(t, h, IGS_COP_MAP_FMT_REG, (dc->dc_depth >> 3) - 1);
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while (timo--) {
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reg = bus_space_read_1(t, h, IGS_COP_CTL_REG);
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if ((reg & IGS_COP_CTL_BUSY) == 0)
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@ -1,4 +1,4 @@
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/* $NetBSD: igsfb_subr.c,v 1.11 2009/11/18 06:10:50 macallan Exp $ */
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/* $NetBSD: igsfb_subr.c,v 1.12 2009/11/18 21:59:38 macallan Exp $ */
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/*
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* Copyright (c) 2002 Valeriy E. Ushakov
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@ -32,7 +32,7 @@
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* Integraphics Systems IGA 168x and CyberPro series.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: igsfb_subr.c,v 1.11 2009/11/18 06:10:50 macallan Exp $");
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__KERNEL_RCSID(0, "$NetBSD: igsfb_subr.c,v 1.12 2009/11/18 21:59:38 macallan Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -427,7 +427,7 @@ void
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igsfb_hw_setup(struct igsfb_devconfig *dc)
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{
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const struct videomode *mode = NULL;
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int i;
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int i, size, d;
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igsfb_init_seq(dc);
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igsfb_init_crtc(dc);
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@ -443,20 +443,36 @@ igsfb_hw_setup(struct igsfb_devconfig *dc)
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}
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if (i < videomode_count) {
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size = videomode_list[i].hdisplay * videomode_list[i].vdisplay;
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/* found a mode, now let's see if we can display it */
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if ((videomode_list[i].dot_clock <= IGS_MAX_CLOCK) &&
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(videomode_list[i].hdisplay <= 2048) &&
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(videomode_list[i].hdisplay >= 320) &&
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(videomode_list[i].vdisplay <= 2048) &&
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(videomode_list[i].vdisplay >= 200)) {
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(videomode_list[i].vdisplay >= 200) &&
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(size <= (dc->dc_memsz - 0x1000))) {
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mode = &videomode_list[i];
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/*
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* now let's see which maximum depth we can support
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* in that mode
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*/
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d = (dc->dc_vmemsz - 0x1000) / size;
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if (d >= 4) {
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dc->dc_maxdepth = 32;
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} else if (d >= 2) {
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dc->dc_maxdepth = 16;
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} else
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dc->dc_maxdepth = 8;
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}
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}
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dc->dc_mode = mode;
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if (mode != NULL) {
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igsfb_set_mode(dc, mode, 8);
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} else
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} else {
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igsfb_1024x768_8bpp_60Hz(dc);
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dc->dc_maxdepth = 8;
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}
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igsfb_video_on(dc);
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}
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@ -470,30 +486,32 @@ igsfb_set_mode(struct igsfb_devconfig *dc, const struct videomode *mode,
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int i, m, n, p, hoffset, bytes_per_pixel, memfetch;
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int vsync_start, hsync_start, vsync_end, hsync_end;
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int vblank_start, vblank_end, hblank_start, hblank_end;
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uint8_t vclk1, vclk2, vclk3, overflow;
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int croffset;
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uint8_t vclk1, vclk2, vclk3, overflow, reg, seq_mode;
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switch (depth) {
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case 8:
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bytes_per_pixel = IGS_EXT_SEQ_8BPP;
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seq_mode = IGS_EXT_SEQ_8BPP;
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break;
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case 15:
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bytes_per_pixel = IGS_EXT_SEQ_15BPP; /* 5-5-5 */
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seq_mode = IGS_EXT_SEQ_15BPP; /* 5-5-5 */
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break;
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case 16:
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bytes_per_pixel = IGS_EXT_SEQ_16BPP; /* 5-6-5 */
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seq_mode = IGS_EXT_SEQ_16BPP; /* 5-6-5 */
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break;
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case 24:
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bytes_per_pixel = IGS_EXT_SEQ_24BPP; /* 8-8-8 */
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seq_mode = IGS_EXT_SEQ_24BPP; /* 8-8-8 */
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break;
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case 32:
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bytes_per_pixel = IGS_EXT_SEQ_32BPP;
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seq_mode = IGS_EXT_SEQ_32BPP;
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break;
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default:
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aprint_error("igsfb: unsupported depth (%d), reverting"
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" to 8 bit\n", depth);
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depth = 8;
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bytes_per_pixel = IGS_EXT_SEQ_8BPP;
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seq_mode = IGS_EXT_SEQ_8BPP;
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}
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bytes_per_pixel = depth >> 3;
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hoffset = (mode->hdisplay >> 3) * bytes_per_pixel;
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memfetch = hoffset + 1;
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@ -503,6 +521,11 @@ igsfb_set_mode(struct igsfb_devconfig *dc, const struct videomode *mode,
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((mode->vsync_start & 0x400) >> 7) |
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0x10;
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/* RAMDAC address 2 select */
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reg = igs_ext_read(iot, ioh, IGS_EXT_SPRITE_CTL);
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igs_ext_write(iot, ioh, IGS_EXT_SPRITE_CTL,
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reg | IGS_EXT_SPRITE_DAC_PEL);
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if (depth == 8) {
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/* palette mode */
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bus_space_write_1(dc->dc_iot, dc->dc_ioh, IGS_DAC_CMD, 0x06);
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@ -510,6 +533,10 @@ igsfb_set_mode(struct igsfb_devconfig *dc, const struct videomode *mode,
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/* bypass palette */
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bus_space_write_1(dc->dc_iot, dc->dc_ioh, IGS_DAC_CMD, 0x16);
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}
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/* restore */
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igs_ext_write(iot, ioh, IGS_EXT_SPRITE_CTL, reg);
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bus_space_write_1(iot, ioh, IGS_PEL_MASK, 0xff);
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igs_crtc_write(iot, ioh, 0x11, 0x00); /* write enable CRTC 0..7 */
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@ -593,11 +620,10 @@ igsfb_set_mode(struct igsfb_devconfig *dc, const struct videomode *mode,
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igsfb_freq_latch(dc);
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igs_ext_write(iot, ioh, IGS_EXT_VOVFL, overflow);
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igs_ext_write(iot, ioh, IGS_EXT_SEQ_MISC, bytes_per_pixel);
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igs_ext_write(iot, ioh, IGS_EXT_SEQ_MISC, seq_mode);
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igs_ext_write(iot, ioh, 0x14, memfetch & 0xff);
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igs_ext_write(iot, ioh, 0x15,
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((memfetch & 0x300) >> 8) | ((hoffset & 0x300) >> 4));
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igs_ext_write(iot, ioh, IGS_EXT_SPRITE_CTL, 0x00);
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/* finally set the dot clock */
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igsfb_calc_pll(mode->dot_clock, &m, &n, &p, 2047, 255, 7, IGS_MIN_VCO);
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@ -613,10 +639,30 @@ igsfb_set_mode(struct igsfb_devconfig *dc, const struct videomode *mode,
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igsfb_freq_latch(dc);
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DPRINTF("clock: %d\n", IGS_CLOCK(m, n, p));
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if (dc->dc_id > 0x2000) {
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/* we have a blitter, so configure it as well */
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bus_space_write_1(dc->dc_iot, dc->dc_coph, IGS_COP_MAP_FMT_REG,
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bytes_per_pixel - 1);
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bus_space_write_2(dc->dc_iot, dc->dc_coph,
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IGS_COP_SRC_MAP_WIDTH_REG, dc->dc_width - 1);
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bus_space_write_2(dc->dc_iot, dc->dc_coph,
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IGS_COP_DST_MAP_WIDTH_REG, dc->dc_width - 1);
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}
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/* re-init the cursor data address too */
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croffset = dc->dc_vmemsz - IGS_CURSOR_DATA_SIZE;
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croffset >>= 10; /* bytes -> kilobytes */
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igs_ext_write(dc->dc_iot, dc->dc_ioh,
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IGS_EXT_SPRITE_DATA_LO, croffset & 0xff);
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igs_ext_write(dc->dc_iot, dc->dc_ioh,
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IGS_EXT_SPRITE_DATA_HI, (croffset >> 8) & 0xf);
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dc->dc_width = mode->hdisplay;
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dc->dc_height = mode->vdisplay;
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dc->dc_depth = depth;
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dc->dc_stride = dc->dc_width * bytes_per_pixel;
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dc->dc_stride = dc->dc_width * (depth >> 3);
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igsfb_video_on(dc);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: igsfbvar.h,v 1.18 2009/11/11 17:01:17 macallan Exp $ */
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/* $NetBSD: igsfbvar.h,v 1.19 2009/11/18 21:59:38 macallan Exp $ */
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/*
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* Copyright (c) 2002, 2003 Valeriy E. Ushakov
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@ -78,6 +78,8 @@ struct igsfb_devconfig {
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/* resolution */
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int dc_width, dc_height, dc_depth, dc_stride;
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int dc_maxdepth;
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const struct videomode *dc_mode;
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char dc_modestring[128];
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