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Attach int0 at mainbus (precedent being the ip32 CRIME device, which handled

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interrupts and timer calibration yet is also attached at mainbus).

Introduce the INDY_R4600_CACHE config option, which more accurately describes
the code enabled by this option.

This renders #ifdef IPxx completely obsolete, thus we theoretically can unify
the GENERIC files if a workable load address relocation scheme can be found.
This commit is contained in:
sekiya 2004-01-19 00:12:31 +00:00
parent 1fa0b4f2cc
commit 90448f3f3f
5 changed files with 65 additions and 41 deletions
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9
sys/arch/sgimips/conf/GENERIC32_IP2x
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@ -1,4 +1,4 @@
# $NetBSD: GENERIC32_IP2x,v 1.8 2004/01/15 08:46:31 pooka Exp $ # $NetBSD: GENERIC32_IP2x,v 1.9 2004/01/19 00:12:31 sekiya Exp $
# #
# GENERIC32_IP2x machine description file # GENERIC32_IP2x machine description file
# #
@ -29,14 +29,14 @@ makeoptions TEXTADDR=0x88069000 # entry point
options INCLUDE_CONFIG_FILE # embed config file in kernel binary options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "GENERIC32-IP2x-$Revision: 1.8 $" #ident "GENERIC32-IP2x-$Revision: 1.9 $"
maxusers 32 maxusers 32
# CPU related options # CPU related options
options IP2X # Indigo / Indigo2 / Indy
options MIPS3 # MIPS3 support options MIPS3 # MIPS3 support
options INDY_R4600_CACHE # Include routines to handle special
# R4600 cache -- required for Indy.
#options BLINK # blinkenlitzen #options BLINK # blinkenlitzen
@ -186,6 +186,7 @@ uk* at scsibus? target ? lun ? # unknown SCSI
imc0 at mainbus0 addr 0x1fa00000 imc0 at mainbus0 addr 0x1fa00000
gio0 at imc0 gio0 at imc0
eisa0 at imc0 eisa0 at imc0
int0 at mainbus0 # Interrupt controller
hpc0 at gio? addr 0x1fb80000 hpc0 at gio? addr 0x1fb80000
hpc1 at gio? addr 0x1fb00000 hpc1 at gio? addr 0x1fb00000

5
sys/arch/sgimips/conf/files.sgimips
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@ -1,4 +1,4 @@
# $NetBSD: files.sgimips,v 1.34 2004/01/18 04:06:42 sekiya Exp $ # $NetBSD: files.sgimips,v 1.35 2004/01/19 00:12:31 sekiya Exp $
maxpartitions 16 maxpartitions 16
@ -17,8 +17,7 @@ file arch/sgimips/sgimips/cpu.c cpu
file dev/arcbios/arcbios.c file dev/arcbios/arcbios.c
file dev/arcbios/arcbios_tty.c file dev/arcbios/arcbios_tty.c
file arch/sgimips/sgimips/ip22_cache.S ip2x file arch/sgimips/sgimips/ip22_cache.S indy_r4600_cache
file arch/sgimips/sgimips/int.c ip1x | ip2x
file arch/sgimips/sgimips/autoconf.c file arch/sgimips/sgimips/autoconf.c
file arch/sgimips/sgimips/bus.c file arch/sgimips/sgimips/bus.c
file arch/sgimips/sgimips/clock.c file arch/sgimips/sgimips/clock.c

6
sys/arch/sgimips/dev/files.dev
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@ -1,7 +1,11 @@
# $NetBSD: files.dev,v 1.1 2004/01/18 04:07:17 sekiya Exp $ # $NetBSD: files.dev,v 1.2 2004/01/19 00:12:31 sekiya Exp $
define giobus {} define giobus {}
device int
attach int at mainbus
file arch/sgimips/dev/int.c int
device imc: giobus, eisabus device imc: giobus, eisabus
attach imc at mainbus attach imc at mainbus
file arch/sgimips/dev/imc.c imc file arch/sgimips/dev/imc.c imc

60
sys/arch/sgimips/sgimips/int.c → sys/arch/sgimips/dev/int.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: int.c,v 1.1 2004/01/18 00:47:21 sekiya Exp $ */ /* $NetBSD: int.c,v 1.1 2004/01/19 00:12:31 sekiya Exp $ */
/* /*
* Copyright (c) 2004 Christopher SEKIYA * Copyright (c) 2004 Christopher SEKIYA
@ -32,7 +32,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: int.c,v 1.1 2004/01/18 00:47:21 sekiya Exp $"); __KERNEL_RCSID(0, "$NetBSD: int.c,v 1.1 2004/01/19 00:12:31 sekiya Exp $");
#include "opt_cputype.h" #include "opt_cputype.h"
#include "opt_machtypes.h" #include "opt_machtypes.h"
@ -56,7 +56,13 @@ __KERNEL_RCSID(0, "$NetBSD: int.c,v 1.1 2004/01/18 00:47:21 sekiya Exp $");
static bus_space_handle_t ioh; static bus_space_handle_t ioh;
static bus_space_tag_t iot; static bus_space_tag_t iot;
void int_init(u_int32_t); struct int_softc {
struct device sc_dev;
};
static int int_match(struct device *, struct cfdata *, void *);
static void int_attach(struct device *, struct device *, void *);
void int_local0_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t); void int_local0_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
void int_local1_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t); void int_local1_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
int int_mappable_intr(void *); int int_mappable_intr(void *);
@ -65,13 +71,42 @@ void *int_intr_establish(int, int, int (*)(void *), void *);
unsigned long int_cal_timer(void); unsigned long int_cal_timer(void);
void int_8254_cal(void); void int_8254_cal(void);
void CFATTACH_DECL(int, sizeof(struct int_softc),
int_init(u_int32_t address) int_match, int_attach, NULL, NULL);
static int
int_match(struct device *parent, struct cfdata *match, void *aux)
{
if ( (mach_type == MACH_SGI_IP12) || (mach_type == MACH_SGI_IP20) ||
(mach_type == MACH_SGI_IP22) )
return 1;
return 0;
}
static void
int_attach(struct device *parent, struct device *self, void *aux)
{ {
int i; int i;
unsigned long cps; unsigned long cps;
unsigned long ctrdiff[3]; unsigned long ctrdiff[3];
u_int32_t address;
if (mach_type == MACH_SGI_IP12)
address = INT_IP12;
else if (mach_type == MACH_SGI_IP20)
address = INT_IP20;
else if (mach_type == MACH_SGI_IP22) {
if (mach_subtype == MACH_SGI_IP22_FULLHOUSE)
address = INT_IP22;
else
address = INT_IP24;
}
else
panic("\nint0: passed match, but failed attach?");
printf(" addr 0x%x", address);
bus_space_map(iot, address, 0, 0, &ioh); bus_space_map(iot, address, 0, 0, &ioh);
iot = SGIMIPS_BUS_SPACE_NORMAL; iot = SGIMIPS_BUS_SPACE_NORMAL;
@ -109,18 +144,19 @@ int_init(u_int32_t address)
cps = cps / (sizeof(ctrdiff) / sizeof(ctrdiff[0])); cps = cps / (sizeof(ctrdiff) / sizeof(ctrdiff[0]));
printf("Timer calibration, %lu cycles (%lu, %lu, %lu)\n", cps, printf(": bus %luMHz, CPU %luMHz", cps / 10000, cps / 5000);
ctrdiff[0], ctrdiff[1], ctrdiff[2]);
/* R4k/R4400/R4600/R5k count at half CPU frequency */ /* R4k/R4400/R4600/R5k count at half CPU frequency */
curcpu()->ci_cpu_freq = 2 * cps * hz; curcpu()->ci_cpu_freq = 2 * cps * hz;
break; break;
default: default:
panic("int: unsupported machine type %i\n", mach_type); panic("int0: unsupported machine type %i\n", mach_type);
break; break;
} }
printf("\n");
curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / (2 * hz); curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / (2 * hz);
curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / (2 * 1000000); curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / (2 * 1000000);
MIPS_SET_CI_RECIPRICAL(curcpu()); MIPS_SET_CI_RECIPRICAL(curcpu());
@ -160,7 +196,7 @@ int_mappable_intr(void *arg)
ret |= (intrtab[intnum].ih_fun) ret |= (intrtab[intnum].ih_fun)
(intrtab[intnum].ih_arg); (intrtab[intnum].ih_arg);
else else
printf("Unexpected mappable interrupt %d\n", printf("int0: unexpected mapped interrupt %d\n",
intnum); intnum);
} }
} }
@ -187,7 +223,7 @@ int_local0_intr(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipend
if (intrtab[i].ih_fun != NULL) if (intrtab[i].ih_fun != NULL)
ret |= (intrtab[i].ih_fun)(intrtab[i].ih_arg); ret |= (intrtab[i].ih_fun)(intrtab[i].ih_arg);
else else
printf("Unexpected local0 interrupt %d\n", i); printf("int0: unexpected local0 interrupt %d\n", i);
} }
} }
} }
@ -212,7 +248,7 @@ int_local1_intr(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipend
ret |= (intrtab[8 + i].ih_fun) ret |= (intrtab[8 + i].ih_fun)
(intrtab[8 + i].ih_arg); (intrtab[8 + i].ih_arg);
else else
printf("Unexpected local1 interrupt %x\n", printf("int0: unexpected local1 interrupt %x\n",
8 + i ); 8 + i );
} }
} }
@ -228,7 +264,7 @@ int_intr_establish(int level, int ipl, int (*handler) (void *), void *arg)
if (intrtab[level].ih_fun != NULL) if (intrtab[level].ih_fun != NULL)
{ {
printf("warning: ip2x cannot share interrupts yet.\n"); printf("int0: cannot share interrupts yet.\n");
return (void *)NULL; return (void *)NULL;
} }

26
sys/arch/sgimips/sgimips/machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.76 2004/01/18 04:43:42 sekiya Exp $ */ /* $NetBSD: machdep.c,v 1.77 2004/01/19 00:12:31 sekiya Exp $ */
/* /*
* Copyright (c) 2000 Soren S. Jorvang * Copyright (c) 2000 Soren S. Jorvang
@ -34,7 +34,7 @@
*/ */
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.76 2004/01/18 04:43:42 sekiya Exp $"); __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.77 2004/01/19 00:12:31 sekiya Exp $");
#include "opt_ddb.h" #include "opt_ddb.h"
#include "opt_kgdb.h" #include "opt_kgdb.h"
@ -141,10 +141,9 @@ u_int32_t clockmask;
phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX]; phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
int mem_cluster_cnt; int mem_cluster_cnt;
#if !defined(IP32) #if defined(INDY_R4600_CACHE)
extern void ip22_sdcache_disable(void); extern void ip22_sdcache_disable(void);
extern void ip22_sdcache_enable(void); extern void ip22_sdcache_enable(void);
extern void int_init(u_int32_t);
#endif #endif
extern void mips1_clock_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t); extern void mips1_clock_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
@ -385,10 +384,8 @@ mach_init(int argc, char **argv, int magic, struct btinfo_common *btinfo)
switch (mach_type) { switch (mach_type) {
case MACH_SGI_IP12: case MACH_SGI_IP12:
#if defined(IP1X)
int_init(INT_IP12);
i = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000); i = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000);
mach_boardrev = (sysid & 0x7000) >> 12; mach_boardrev = (i & 0x7000) >> 12;
if ((i & 0x8000) == 0) { if ((i & 0x8000) == 0) {
if (mach_boardrev < 7) /* 4D/3X */ if (mach_boardrev < 7) /* 4D/3X */
@ -408,11 +405,8 @@ mach_init(int argc, char **argv, int magic, struct btinfo_common *btinfo)
clockmask = 0xbf00; clockmask = 0xbf00;
platform.intr3 = mips1_clock_intr; platform.intr3 = mips1_clock_intr;
platform.clkread = mips1_clkread; platform.clkread = mips1_clkread;
#endif
break; break;
case MACH_SGI_IP20: case MACH_SGI_IP20:
#if defined(IP2X)
int_init(INT_IP20);
i = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000); i = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000);
mach_boardrev = (i & 0x7000) >> 12; mach_boardrev = (i & 0x7000) >> 12;
@ -424,22 +418,12 @@ mach_init(int argc, char **argv, int magic, struct btinfo_common *btinfo)
platform.clkread = mips3_clkread; platform.clkread = mips3_clkread;
break; break;
case MACH_SGI_IP22: case MACH_SGI_IP22:
i = *(volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x1fbd9858);
if (i & 1) {
mach_subtype = MACH_SGI_IP22_FULLHOUSE;
int_init(INT_IP22);
} else {
mach_subtype = MACH_SGI_IP22_GUINESS;
int_init(INT_IP24);
}
mach_boardrev = (i >> 1) & 0x0f;
biomask = 0x0700; biomask = 0x0700;
netmask = 0x0700; netmask = 0x0700;
ttymask = 0x0f00; ttymask = 0x0f00;
clockmask = 0xbf00; clockmask = 0xbf00;
platform.intr5 = mips3_clock_intr; platform.intr5 = mips3_clock_intr;
platform.clkread = mips3_clkread; platform.clkread = mips3_clkread;
#endif
break; break;
case MACH_SGI_IP32: case MACH_SGI_IP32:
biomask = 0x0700; biomask = 0x0700;
@ -842,7 +826,7 @@ void mips_machdep_cache_config(void)
arcbios_tree_walk(mips_machdep_find_l2cache, NULL); arcbios_tree_walk(mips_machdep_find_l2cache, NULL);
switch (MIPS_PRID_IMPL(cpu_id)) { switch (MIPS_PRID_IMPL(cpu_id)) {
#if defined(IP2X) #if defined(INDY_R4600_CACHE)
case MIPS_R4600: case MIPS_R4600:
/* /*
* R4600 is on Indy-class machines only. Disable and * R4600 is on Indy-class machines only. Disable and