From 8ff672edf7b4a1d1b7622caf5ddba114910abdd4 Mon Sep 17 00:00:00 2001
From: joerg <joerg@NetBSD.org>
Date: Tue, 17 Jul 2018 19:10:43 +0000
Subject: [PATCH] Mark files not tagged with llvm-337282 as dead

---
 .../bindings/go/llvm/DIBuilderBindings.cpp    |  253 --
 .../llvm/bindings/go/llvm/DIBuilderBindings.h |  144 -
 .../llvm/include/llvm/Analysis/ObjectUtils.h  |   42 -
 .../Analysis/OptimizationDiagnosticInfo.h     |  164 -
 .../BinaryFormat/ELFRelocs/WebAssembly.def    |    8 -
 .../BinaryFormat/WasmRelocs/WebAssembly.def   |   13 -
 .../llvm/include/llvm/CodeGen/CommandFlags.h  |  382 --
 .../include/llvm/CodeGen/ExecutionDepsFix.h   |  230 --
 .../llvm/CodeGen/GlobalISel/GISelAccessor.h   |   39 -
 .../llvm/CodeGen/LiveIntervalAnalysis.h       |  476 ---
 .../include/llvm/CodeGen/LiveStackAnalysis.h  |  103 -
 .../include/llvm/CodeGen/MachineValueType.h   | 1049 -----
 .../llvm/DebugInfo/CodeView/CVDebugRecord.h   |   55 -
 .../llvm/DebugInfo/CodeView/TypeName.h        |   22 -
 .../DebugInfo/CodeView/TypeRecordBuilder.h    |   78 -
 .../llvm/DebugInfo/CodeView/TypeSerializer.h  |  159 -
 .../DebugInfo/CodeView/TypeTableBuilder.h     |  137 -
 .../llvm/DebugInfo/MSF/MSFStreamLayout.h      |   35 -
 .../PDB/Native/PublicsStreamBuilder.h         |   54 -
 .../llvm/ExecutionEngine/ObjectMemoryBuffer.h |   63 -
 .../llvm/MC/MCTargetOptionsCommandFlags.h     |   80 -
 .../llvm/Support/AMDGPUCodeObjectMetadata.h   |  422 --
 .../include/llvm/Support/CodeGenCWrappers.h   |   64 -
 .../include/llvm/Support/DataTypes.h.cmake    |  135 -
 .../dist/llvm/include/llvm/Support/GCOV.h     |  460 ---
 .../dist/llvm/include/llvm/Target/CostTable.h |   70 -
 .../include/llvm/Target/TargetCallingConv.h   |  204 -
 .../include/llvm/Target/TargetFrameLowering.h |  346 --
 .../include/llvm/Target/TargetInstrInfo.h     | 1669 --------
 .../llvm/include/llvm/Target/TargetLowering.h | 3493 -----------------
 .../include/llvm/Target/TargetOpcodes.def     |  435 --
 .../llvm/include/llvm/Target/TargetOpcodes.h  |   42 -
 .../include/llvm/Target/TargetRegisterInfo.h  | 1152 ------
 .../include/llvm/Target/TargetSubtargetInfo.h |  248 --
 .../include/llvm/Transforms/GCOVProfiler.h    |   31 -
 .../include/llvm/Transforms/InstrProfiling.h  |  124 -
 .../llvm/Transforms/PGOInstrumentation.h      |   61 -
 .../include/llvm/Transforms/SampleProfile.h   |   31 -
 .../llvm/Transforms/Utils/CmpInstAnalysis.h   |   70 -
 .../Transforms/Utils/SimplifyInstructions.h   |   31 -
 .../Analysis/OptimizationDiagnosticInfo.cpp   |  224 --
 .../llvm/lib/Analysis/SparsePropagation.cpp   |  347 --
 .../CodeGen/AsmPrinter/DwarfAccelTable.cpp    |  287 --
 .../lib/CodeGen/AsmPrinter/DwarfAccelTable.h  |  255 --
 .../llvm/lib/CodeGen/BranchCoalescing.cpp     |  758 ----
 .../lib/CodeGen/CountingFunctionInserter.cpp  |   62 -
 .../llvm/lib/CodeGen/ExecutionDepsFix.cpp     |  755 ----
 .../llvm/lib/CodeGen/LiveIntervalAnalysis.cpp | 1592 --------
 .../llvm/lib/CodeGen/LiveStackAnalysis.cpp    |   88 -
 .../llvm/lib/DebugInfo/CodeView/TypeName.cpp  |  243 --
 .../lib/DebugInfo/CodeView/TypeSerializer.cpp |  389 --
 .../DebugInfo/DWARF/SyntaxHighlighting.cpp    |   40 -
 .../lib/DebugInfo/DWARF/SyntaxHighlighting.h  |   42 -
 .../llvm/lib/DebugInfo/PDB/Native/GSI.cpp     |   93 -
 .../dist/llvm/lib/DebugInfo/PDB/Native/GSI.h  |   68 -
 .../PDB/Native/PublicsStreamBuilder.cpp       |   89 -
 .../lib/ExecutionEngine/MCJIT/ObjectBuffer.h  |   48 -
 .../llvm/dist/llvm/lib/Fuzzer/CMakeLists.txt  |   68 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerCorpus.h  |  275 --
 .../dist/llvm/lib/Fuzzer/FuzzerCrossOver.cpp  |   52 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerDefs.h    |  128 -
 .../dist/llvm/lib/Fuzzer/FuzzerDictionary.h   |  127 -
 .../dist/llvm/lib/Fuzzer/FuzzerDriver.cpp     |  763 ----
 .../llvm/lib/Fuzzer/FuzzerExtFunctions.def    |   46 -
 .../dist/llvm/lib/Fuzzer/FuzzerExtFunctions.h |   35 -
 .../lib/Fuzzer/FuzzerExtFunctionsDlsym.cpp    |   52 -
 .../lib/Fuzzer/FuzzerExtFunctionsDlsymWin.cpp |   62 -
 .../lib/Fuzzer/FuzzerExtFunctionsWeak.cpp     |   54 -
 .../Fuzzer/FuzzerExtFunctionsWeakAlias.cpp    |   56 -
 .../llvm/lib/Fuzzer/FuzzerExtraCounters.cpp   |   41 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerFlags.def |  139 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerIO.cpp    |  118 -
 .../bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIO.h  |   76 -
 .../dist/llvm/lib/Fuzzer/FuzzerIOPosix.cpp    |  123 -
 .../dist/llvm/lib/Fuzzer/FuzzerIOWindows.cpp  |  323 --
 .../dist/llvm/lib/Fuzzer/FuzzerInterface.h    |   67 -
 .../dist/llvm/lib/Fuzzer/FuzzerInternal.h     |  143 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerLoop.cpp  |  695 ----
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerMain.cpp  |   21 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerMerge.cpp |  338 --
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerMerge.h   |   80 -
 .../dist/llvm/lib/Fuzzer/FuzzerMutate.cpp     |  533 ---
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerMutate.h  |  150 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerOptions.h |   68 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerRandom.h  |   34 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerSHA1.cpp  |  222 --
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerSHA1.h    |   33 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerShmem.h   |   69 -
 .../dist/llvm/lib/Fuzzer/FuzzerShmemPosix.cpp |  103 -
 .../llvm/lib/Fuzzer/FuzzerShmemWindows.cpp    |   64 -
 .../dist/llvm/lib/Fuzzer/FuzzerTracePC.cpp    |  501 ---
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerTracePC.h |  210 -
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerUtil.cpp  |  225 --
 .../llvm/dist/llvm/lib/Fuzzer/FuzzerUtil.h    |   86 -
 .../dist/llvm/lib/Fuzzer/FuzzerUtilDarwin.cpp |  161 -
 .../dist/llvm/lib/Fuzzer/FuzzerUtilLinux.cpp  |   24 -
 .../dist/llvm/lib/Fuzzer/FuzzerUtilPosix.cpp  |  144 -
 .../llvm/lib/Fuzzer/FuzzerUtilWindows.cpp     |  193 -
 .../dist/llvm/lib/Fuzzer/FuzzerValueBitMap.h  |   94 -
 .../dist/llvm/lib/Fuzzer/afl/afl_driver.cpp   |  335 --
 .../bsd/llvm/dist/llvm/lib/Fuzzer/build.sh    |   11 -
 .../bsd/llvm/dist/llvm/lib/Fuzzer/cxx.dict    |  122 -
 .../standalone/StandaloneFuzzTargetMain.c     |   41 -
 .../llvm/lib/Fuzzer/test/AFLDriverTest.cpp    |   28 -
 .../Fuzzer/test/AbsNegAndConstant64Test.cpp   |   23 -
 .../lib/Fuzzer/test/AbsNegAndConstantTest.cpp |   23 -
 .../Fuzzer/test/AccumulateAllocationsTest.cpp |   17 -
 .../llvm/lib/Fuzzer/test/BadStrcmpTest.cpp    |   19 -
 .../lib/Fuzzer/test/BogusInitializeTest.cpp   |   15 -
 .../lib/Fuzzer/test/BufferOverflowOnInput.cpp |   23 -
 .../dist/llvm/lib/Fuzzer/test/CMakeLists.txt  |  277 --
 .../llvm/lib/Fuzzer/test/CallerCalleeTest.cpp |   59 -
 .../dist/llvm/lib/Fuzzer/test/CleanseTest.cpp |   16 -
 .../dist/llvm/lib/Fuzzer/test/CounterTest.cpp |   18 -
 .../test/CustomCrossOverAndMutateTest.cpp     |   34 -
 .../lib/Fuzzer/test/CustomCrossOverTest.cpp   |   63 -
 .../lib/Fuzzer/test/CustomMutatorTest.cpp     |   38 -
 .../llvm/lib/Fuzzer/test/CxxStringEqTest.cpp  |   25 -
 .../llvm/dist/llvm/lib/Fuzzer/test/DSO1.cpp   |   14 -
 .../llvm/dist/llvm/lib/Fuzzer/test/DSO2.cpp   |   14 -
 .../llvm/lib/Fuzzer/test/DSOTestExtra.cpp     |   11 -
 .../dist/llvm/lib/Fuzzer/test/DSOTestMain.cpp |   31 -
 .../dist/llvm/lib/Fuzzer/test/DivTest.cpp     |   20 -
 .../dist/llvm/lib/Fuzzer/test/EmptyTest.cpp   |   11 -
 .../llvm/lib/Fuzzer/test/EquivalenceATest.cpp |   17 -
 .../llvm/lib/Fuzzer/test/EquivalenceBTest.cpp |   27 -
 .../dist/llvm/lib/Fuzzer/test/FlagsTest.cpp   |   32 -
 .../test/FourIndependentBranchesTest.cpp      |   23 -
 .../lib/Fuzzer/test/FullCoverageSetTest.cpp   |   24 -
 .../llvm/lib/Fuzzer/test/FuzzerUnittest.cpp   |  761 ----
 .../llvm/lib/Fuzzer/test/InitializeTest.cpp   |   28 -
 .../dist/llvm/lib/Fuzzer/test/LargeTest.cpp   |   37 -
 .../dist/llvm/lib/Fuzzer/test/LeakTest.cpp    |   17 -
 .../llvm/lib/Fuzzer/test/LeakTimeoutTest.cpp  |   17 -
 .../dist/llvm/lib/Fuzzer/test/LoadTest.cpp    |   22 -
 .../lib/Fuzzer/test/Memcmp64BytesTest.cpp     |   20 -
 .../dist/llvm/lib/Fuzzer/test/MemcmpTest.cpp  |   31 -
 .../lib/Fuzzer/test/NotinstrumentedTest.cpp   |   11 -
 .../llvm/lib/Fuzzer/test/NthRunCrashTest.cpp  |   18 -
 .../lib/Fuzzer/test/NullDerefOnEmptyTest.cpp  |   19 -
 .../llvm/lib/Fuzzer/test/NullDerefTest.cpp    |   26 -
 .../llvm/lib/Fuzzer/test/OneHugeAllocTest.cpp |   28 -
 .../test/OutOfMemorySingleLargeMallocTest.cpp |   27 -
 .../llvm/lib/Fuzzer/test/OutOfMemoryTest.cpp  |   31 -
 .../lib/Fuzzer/test/OverwriteInputTest.cpp    |   13 -
 .../lib/Fuzzer/test/RepeatedBytesTest.cpp     |   29 -
 .../llvm/lib/Fuzzer/test/RepeatedMemcmp.cpp   |   24 -
 .../test/ShrinkControlFlowSimpleTest.cpp      |   19 -
 .../lib/Fuzzer/test/ShrinkControlFlowTest.cpp |   29 -
 .../Fuzzer/test/ShrinkValueProfileTest.cpp    |   22 -
 .../lib/Fuzzer/test/SignedIntOverflowTest.cpp |   28 -
 .../llvm/lib/Fuzzer/test/SimpleCmpTest.cpp    |   47 -
 .../lib/Fuzzer/test/SimpleDictionaryTest.cpp  |   29 -
 .../llvm/lib/Fuzzer/test/SimpleHashTest.cpp   |   40 -
 .../dist/llvm/lib/Fuzzer/test/SimpleTest.cpp  |   27 -
 .../lib/Fuzzer/test/SimpleThreadedTest.cpp    |   25 -
 .../lib/Fuzzer/test/SingleByteInputTest.cpp   |   17 -
 .../llvm/lib/Fuzzer/test/SingleMemcmpTest.cpp |   17 -
 .../llvm/lib/Fuzzer/test/SingleStrcmpTest.cpp |   21 -
 .../lib/Fuzzer/test/SingleStrncmpTest.cpp     |   19 -
 .../dist/llvm/lib/Fuzzer/test/SpamyTest.cpp   |   21 -
 .../dist/llvm/lib/Fuzzer/test/StrcmpTest.cpp  |   32 -
 .../llvm/lib/Fuzzer/test/StrncmpOOBTest.cpp   |   21 -
 .../dist/llvm/lib/Fuzzer/test/StrncmpTest.cpp |   28 -
 .../dist/llvm/lib/Fuzzer/test/StrstrTest.cpp  |   28 -
 .../dist/llvm/lib/Fuzzer/test/SwapCmpTest.cpp |   35 -
 .../dist/llvm/lib/Fuzzer/test/Switch2Test.cpp |   35 -
 .../dist/llvm/lib/Fuzzer/test/SwitchTest.cpp  |   58 -
 .../llvm/lib/Fuzzer/test/TableLookupTest.cpp  |   44 -
 .../llvm/lib/Fuzzer/test/ThreadedLeakTest.cpp |   18 -
 .../llvm/lib/Fuzzer/test/ThreadedTest.cpp     |   26 -
 .../llvm/lib/Fuzzer/test/TimeoutEmptyTest.cpp |   14 -
 .../dist/llvm/lib/Fuzzer/test/TimeoutTest.cpp |   26 -
 .../llvm/lib/Fuzzer/test/TraceMallocTest.cpp  |   27 -
 .../lib/Fuzzer/test/TwoDifferentBugsTest.cpp  |   22 -
 .../Fuzzer/test/afl-driver-extra-stats.test   |   30 -
 .../lib/Fuzzer/test/afl-driver-stderr.test    |   12 -
 .../dist/llvm/lib/Fuzzer/test/afl-driver.test |   26 -
 .../dist/llvm/lib/Fuzzer/test/bad-strcmp.test |    1 -
 .../llvm/lib/Fuzzer/test/caller-callee.test   |    2 -
 .../dist/llvm/lib/Fuzzer/test/cleanse.test    |    3 -
 .../dist/llvm/lib/Fuzzer/test/coverage.test   |   21 -
 .../dist/llvm/lib/Fuzzer/test/cxxstring.test  |    4 -
 .../llvm/dist/llvm/lib/Fuzzer/test/dict1.txt  |    4 -
 .../llvm/lib/Fuzzer/test/disable-leaks.test   |    4 -
 .../llvm/lib/Fuzzer/test/dump_coverage.test   |   14 -
 .../lib/Fuzzer/test/equivalence-signals.test  |    9 -
 .../llvm/lib/Fuzzer/test/equivalence.test     |    8 -
 .../llvm/lib/Fuzzer/test/extra-counters.test  |    6 -
 .../Fuzzer/test/fuzzer-customcrossover.test   |   10 -
 .../test/fuzzer-customcrossoverandmutate.test |    1 -
 .../lib/Fuzzer/test/fuzzer-custommutator.test |    4 -
 .../llvm/lib/Fuzzer/test/fuzzer-dict.test     |    6 -
 .../llvm/lib/Fuzzer/test/fuzzer-dirs.test     |   19 -
 .../llvm/lib/Fuzzer/test/fuzzer-fdmask.test   |   30 -
 .../lib/Fuzzer/test/fuzzer-finalstats.test    |   11 -
 .../llvm/lib/Fuzzer/test/fuzzer-flags.test    |   21 -
 .../llvm/lib/Fuzzer/test/fuzzer-leak.test     |   33 -
 .../Fuzzer/test/fuzzer-oom-with-profile.test  |    6 -
 .../dist/llvm/lib/Fuzzer/test/fuzzer-oom.test |   12 -
 .../lib/Fuzzer/test/fuzzer-printcovpcs.test   |    8 -
 .../llvm/lib/Fuzzer/test/fuzzer-runs.test     |    8 -
 .../llvm/lib/Fuzzer/test/fuzzer-seed.test     |    3 -
 .../llvm/lib/Fuzzer/test/fuzzer-segv.test     |    7 -
 .../lib/Fuzzer/test/fuzzer-singleinputs.test  |   16 -
 .../llvm/lib/Fuzzer/test/fuzzer-threaded.test |    7 -
 .../llvm/lib/Fuzzer/test/fuzzer-timeout.test  |   19 -
 .../lib/Fuzzer/test/fuzzer-traces-hooks.test  |   17 -
 .../llvm/lib/Fuzzer/test/fuzzer-ubsan.test    |    4 -
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 .../bsd/llvm/dist/llvm/lib/Fuzzer/test/hi.txt |    1 -
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 .../dist/llvm/lib/Fuzzer/test/lit.site.cfg.in |    5 -
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 .../llvm/lib/Fuzzer/test/minimize_crash.test  |   13 -
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 external/bsd/llvm/dist/llvm/lib/IR/GCOV.cpp   |  821 ----
 .../bsd/llvm/dist/llvm/lib/IR/ValueTypes.cpp  |  323 --
 .../lib/Support/AMDGPUCodeObjectMetadata.cpp  |  216 -
 .../llvm/dist/llvm/lib/Support/regcclass.h    |   75 -
 .../bsd/llvm/dist/llvm/lib/Support/regcname.h |  144 -
 .../llvm/lib/Target/AArch64/AArch64SchedM1.td |  711 ----
 .../AArch64/AArch64VectorByElementOpt.cpp     |  388 --
 .../lib/Target/AMDGPU/AMDGPUMCInstLower.h     |   46 -
 .../AMDGPUOpenCLImageTypeLoweringPass.cpp     |  372 --
 .../llvm/lib/Target/AMDGPU/CIInstructions.td  |   15 -
 .../AMDGPUCodeObjectMetadataStreamer.cpp      |  432 --
 .../AMDGPUCodeObjectMetadataStreamer.h        |   99 -
 .../dist/llvm/lib/Target/AMDGPU/Processors.td |  223 --
 .../llvm/lib/Target/AMDGPU/R600Intrinsics.td  |   67 -
 .../AMDGPU/SIFixControlFlowLiveIntervals.cpp  |   88 -
 .../llvm/lib/Target/AMDGPU/SIInsertWaits.cpp  |  708 ----
 .../lib/Target/AVR/AVRInstrumentFunctions.cpp |  222 --
 .../lib/Target/Hexagon/HexagonDepDecoders.h   |   64 -
 .../Hexagon/HexagonIntrinsicsDerived.td       |   40 -
 .../Target/Mips/MicroMips64r6InstrFormats.td  |  267 --
 .../lib/Target/Mips/MicroMips64r6InstrInfo.td |  562 ---
 .../lib/Target/Mips/MipsHazardSchedule.cpp    |  163 -
 .../llvm/lib/Target/Mips/MipsLongBranch.cpp   |  548 ---
 .../dist/llvm/lib/Target/NVPTX/NVPTXSection.h |   45 -
 .../dist/llvm/lib/Target/NVPTX/NVPTXVector.td | 1479 -------
 .../llvm/lib/Target/PowerPC/p9-instrs.txt     |  442 ---
 .../WebAssemblyELFObjectWriter.cpp            |   67 -
 .../X86DisassemblerDecoderCommon.h            |  462 ---
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 .../lib/Transforms/Utils/CmpInstAnalysis.cpp  |  108 -
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diff --git a/external/bsd/llvm/dist/llvm/bindings/go/llvm/DIBuilderBindings.cpp b/external/bsd/llvm/dist/llvm/bindings/go/llvm/DIBuilderBindings.cpp
deleted file mode 100644
index a0792e93d4ba..000000000000
--- a/external/bsd/llvm/dist/llvm/bindings/go/llvm/DIBuilderBindings.cpp
+++ /dev/null
@@ -1,253 +0,0 @@
-//===- DIBuilderBindings.cpp - Bindings for DIBuilder ---------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines C bindings for the DIBuilder class.
-//
-//===----------------------------------------------------------------------===//
-
-#include "DIBuilderBindings.h"
-#include "IRBindings.h"
-#include "llvm/IR/DIBuilder.h"
-#include "llvm/IR/IRBuilder.h"
-#include "llvm/IR/Module.h"
-
-using namespace llvm;
-
-LLVMDIBuilderRef LLVMNewDIBuilder(LLVMModuleRef mref) {
-  Module *m = unwrap(mref);
-  return wrap(new DIBuilder(*m));
-}
-
-void LLVMDIBuilderDestroy(LLVMDIBuilderRef dref) {
-  DIBuilder *d = unwrap(dref);
-  delete d;
-}
-
-void LLVMDIBuilderFinalize(LLVMDIBuilderRef dref) { unwrap(dref)->finalize(); }
-
-LLVMMetadataRef LLVMDIBuilderCreateCompileUnit(LLVMDIBuilderRef Dref,
-                                               unsigned Lang, const char *File,
-                                               const char *Dir,
-                                               const char *Producer,
-                                               int Optimized, const char *Flags,
-                                               unsigned RuntimeVersion) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createCompileUnit(Lang, D->createFile(File, Dir), Producer,
-                                   Optimized, Flags, RuntimeVersion));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateFile(LLVMDIBuilderRef Dref, const char *File,
-                                        const char *Dir) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createFile(File, Dir));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateLexicalBlock(LLVMDIBuilderRef Dref,
-                                                LLVMMetadataRef Scope,
-                                                LLVMMetadataRef File,
-                                                unsigned Line,
-                                                unsigned Column) {
-  DIBuilder *D = unwrap(Dref);
-  auto *LB = D->createLexicalBlock(unwrap<DILocalScope>(Scope),
-                                   unwrap<DIFile>(File), Line, Column);
-  return wrap(LB);
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateLexicalBlockFile(LLVMDIBuilderRef Dref,
-                                                    LLVMMetadataRef Scope,
-                                                    LLVMMetadataRef File,
-                                                    unsigned Discriminator) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createLexicalBlockFile(unwrap<DILocalScope>(Scope),
-                                        unwrap<DIFile>(File), Discriminator));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateFunction(
-    LLVMDIBuilderRef Dref, LLVMMetadataRef Scope, const char *Name,
-    const char *LinkageName, LLVMMetadataRef File, unsigned Line,
-    LLVMMetadataRef CompositeType, int IsLocalToUnit, int IsDefinition,
-    unsigned ScopeLine, unsigned Flags, int IsOptimized) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createFunction(
-      unwrap<DIScope>(Scope), Name, LinkageName,
-      File ? unwrap<DIFile>(File) : nullptr, Line,
-      unwrap<DISubroutineType>(CompositeType), IsLocalToUnit, IsDefinition,
-      ScopeLine, static_cast<DINode::DIFlags>(Flags), IsOptimized));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateAutoVariable(
-    LLVMDIBuilderRef Dref, LLVMMetadataRef Scope, const char *Name,
-    LLVMMetadataRef File, unsigned Line, LLVMMetadataRef Ty, int AlwaysPreserve,
-    unsigned Flags, uint32_t AlignInBits) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(
-      D->createAutoVariable(unwrap<DIScope>(Scope), Name, unwrap<DIFile>(File),
-                            Line, unwrap<DIType>(Ty), AlwaysPreserve,
-                            static_cast<DINode::DIFlags>(Flags), AlignInBits));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateParameterVariable(
-    LLVMDIBuilderRef Dref, LLVMMetadataRef Scope, const char *Name,
-    unsigned ArgNo, LLVMMetadataRef File, unsigned Line, LLVMMetadataRef Ty,
-    int AlwaysPreserve, unsigned Flags) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createParameterVariable(
-      unwrap<DIScope>(Scope), Name, ArgNo, unwrap<DIFile>(File), Line,
-      unwrap<DIType>(Ty), AlwaysPreserve, static_cast<DINode::DIFlags>(Flags)));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateBasicType(LLVMDIBuilderRef Dref,
-                                             const char *Name,
-                                             uint64_t SizeInBits,
-                                             unsigned Encoding) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createBasicType(Name, SizeInBits, Encoding));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreatePointerType(LLVMDIBuilderRef Dref,
-                                               LLVMMetadataRef PointeeType,
-                                               uint64_t SizeInBits,
-                                               uint32_t AlignInBits,
-                                               const char *Name) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createPointerType(unwrap<DIType>(PointeeType), SizeInBits,
-                                   AlignInBits, /* DWARFAddressSpace */ None,
-                                   Name));
-}
-
-LLVMMetadataRef
-LLVMDIBuilderCreateSubroutineType(LLVMDIBuilderRef Dref, LLVMMetadataRef File,
-                                  LLVMMetadataRef ParameterTypes) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(
-      D->createSubroutineType(DITypeRefArray(unwrap<MDTuple>(ParameterTypes))));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateStructType(
-    LLVMDIBuilderRef Dref, LLVMMetadataRef Scope, const char *Name,
-    LLVMMetadataRef File, unsigned Line, uint64_t SizeInBits,
-    uint32_t AlignInBits, unsigned Flags, LLVMMetadataRef DerivedFrom,
-    LLVMMetadataRef ElementTypes) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createStructType(
-      unwrap<DIScope>(Scope), Name, File ? unwrap<DIFile>(File) : nullptr, Line,
-      SizeInBits, AlignInBits, static_cast<DINode::DIFlags>(Flags),
-      DerivedFrom ? unwrap<DIType>(DerivedFrom) : nullptr,
-      ElementTypes ? DINodeArray(unwrap<MDTuple>(ElementTypes)) : nullptr));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateReplaceableCompositeType(
-    LLVMDIBuilderRef Dref, unsigned Tag, const char *Name,
-    LLVMMetadataRef Scope, LLVMMetadataRef File, unsigned Line,
-    unsigned RuntimeLang, uint64_t SizeInBits, uint32_t AlignInBits,
-    unsigned Flags) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createReplaceableCompositeType(
-      Tag, Name, unwrap<DIScope>(Scope), File ? unwrap<DIFile>(File) : nullptr,
-      Line, RuntimeLang, SizeInBits, AlignInBits,
-      static_cast<DINode::DIFlags>(Flags)));
-}
-
-LLVMMetadataRef
-LLVMDIBuilderCreateMemberType(LLVMDIBuilderRef Dref, LLVMMetadataRef Scope,
-                              const char *Name, LLVMMetadataRef File,
-                              unsigned Line, uint64_t SizeInBits,
-                              uint32_t AlignInBits, uint64_t OffsetInBits,
-                              unsigned Flags, LLVMMetadataRef Ty) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createMemberType(
-      unwrap<DIScope>(Scope), Name, File ? unwrap<DIFile>(File) : nullptr, Line,
-      SizeInBits, AlignInBits, OffsetInBits,
-      static_cast<DINode::DIFlags>(Flags), unwrap<DIType>(Ty)));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateArrayType(LLVMDIBuilderRef Dref,
-                                             uint64_t SizeInBits,
-                                             uint32_t AlignInBits,
-                                             LLVMMetadataRef ElementType,
-                                             LLVMMetadataRef Subscripts) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createArrayType(SizeInBits, AlignInBits,
-                                 unwrap<DIType>(ElementType),
-                                 DINodeArray(unwrap<MDTuple>(Subscripts))));
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateTypedef(LLVMDIBuilderRef Dref,
-                                           LLVMMetadataRef Ty, const char *Name,
-                                           LLVMMetadataRef File, unsigned Line,
-                                           LLVMMetadataRef Context) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createTypedef(unwrap<DIType>(Ty), Name,
-                               File ? unwrap<DIFile>(File) : nullptr, Line,
-                               Context ? unwrap<DIScope>(Context) : nullptr));
-}
-
-LLVMMetadataRef LLVMDIBuilderGetOrCreateSubrange(LLVMDIBuilderRef Dref,
-                                                 int64_t Lo, int64_t Count) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->getOrCreateSubrange(Lo, Count));
-}
-
-LLVMMetadataRef LLVMDIBuilderGetOrCreateArray(LLVMDIBuilderRef Dref,
-                                              LLVMMetadataRef *Data,
-                                              size_t Length) {
-  DIBuilder *D = unwrap(Dref);
-  Metadata **DataValue = unwrap(Data);
-  ArrayRef<Metadata *> Elements(DataValue, Length);
-  DINodeArray A = D->getOrCreateArray(Elements);
-  return wrap(A.get());
-}
-
-LLVMMetadataRef LLVMDIBuilderGetOrCreateTypeArray(LLVMDIBuilderRef Dref,
-                                                  LLVMMetadataRef *Data,
-                                                  size_t Length) {
-  DIBuilder *D = unwrap(Dref);
-  Metadata **DataValue = unwrap(Data);
-  ArrayRef<Metadata *> Elements(DataValue, Length);
-  DITypeRefArray A = D->getOrCreateTypeArray(Elements);
-  return wrap(A.get());
-}
-
-LLVMMetadataRef LLVMDIBuilderCreateExpression(LLVMDIBuilderRef Dref,
-                                              int64_t *Addr, size_t Length) {
-  DIBuilder *D = unwrap(Dref);
-  return wrap(D->createExpression(ArrayRef<int64_t>(Addr, Length)));
-}
-
-LLVMValueRef LLVMDIBuilderInsertDeclareAtEnd(LLVMDIBuilderRef Dref,
-                                             LLVMValueRef Storage,
-                                             LLVMMetadataRef VarInfo,
-                                             LLVMMetadataRef Expr,
-                                             LLVMBasicBlockRef Block) {
-  // Fail immediately here until the llgo folks update their bindings.  The
-  // called function is going to assert out anyway.
-  llvm_unreachable("DIBuilder API change requires a DebugLoc");
-
-  DIBuilder *D = unwrap(Dref);
-  Instruction *Instr = D->insertDeclare(
-      unwrap(Storage), unwrap<DILocalVariable>(VarInfo),
-      unwrap<DIExpression>(Expr), /* DebugLoc */ nullptr, unwrap(Block));
-  return wrap(Instr);
-}
-
-LLVMValueRef LLVMDIBuilderInsertValueAtEnd(LLVMDIBuilderRef Dref,
-                                           LLVMValueRef Val, uint64_t Offset,
-                                           LLVMMetadataRef VarInfo,
-                                           LLVMMetadataRef Expr,
-                                           LLVMBasicBlockRef Block) {
-  // Fail immediately here until the llgo folks update their bindings.  The
-  // called function is going to assert out anyway.
-  llvm_unreachable("DIBuilder API change requires a DebugLoc");
-
-  DIBuilder *D = unwrap(Dref);
-  Instruction *Instr = D->insertDbgValueIntrinsic(
-      unwrap(Val), Offset, unwrap<DILocalVariable>(VarInfo),
-      unwrap<DIExpression>(Expr), /* DebugLoc */ nullptr, unwrap(Block));
-  return wrap(Instr);
-}
diff --git a/external/bsd/llvm/dist/llvm/bindings/go/llvm/DIBuilderBindings.h b/external/bsd/llvm/dist/llvm/bindings/go/llvm/DIBuilderBindings.h
deleted file mode 100644
index dee88217fd36..000000000000
--- a/external/bsd/llvm/dist/llvm/bindings/go/llvm/DIBuilderBindings.h
+++ /dev/null
@@ -1,144 +0,0 @@
-//===- DIBuilderBindings.h - Bindings for DIBuilder -------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines C bindings for the DIBuilder class.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_BINDINGS_GO_LLVM_DIBUILDERBINDINGS_H
-#define LLVM_BINDINGS_GO_LLVM_DIBUILDERBINDINGS_H
-
-#include "IRBindings.h"
-#include "llvm-c/Core.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// FIXME: These bindings shouldn't be Go-specific and should eventually move to
-// a (somewhat) less stable collection of C APIs for use in creating bindings of
-// LLVM in other languages.
-
-typedef struct LLVMOpaqueDIBuilder *LLVMDIBuilderRef;
-
-LLVMDIBuilderRef LLVMNewDIBuilder(LLVMModuleRef m);
-
-void LLVMDIBuilderDestroy(LLVMDIBuilderRef d);
-void LLVMDIBuilderFinalize(LLVMDIBuilderRef d);
-
-LLVMMetadataRef
-LLVMDIBuilderCreateCompileUnit(LLVMDIBuilderRef D, unsigned Language,
-                               const char *File, const char *Dir,
-                               const char *Producer, int Optimized,
-                               const char *Flags, unsigned RuntimeVersion);
-
-LLVMMetadataRef LLVMDIBuilderCreateFile(LLVMDIBuilderRef D, const char *File,
-                                        const char *Dir);
-
-LLVMMetadataRef LLVMDIBuilderCreateLexicalBlock(LLVMDIBuilderRef D,
-                                                LLVMMetadataRef Scope,
-                                                LLVMMetadataRef File,
-                                                unsigned Line, unsigned Column);
-
-LLVMMetadataRef LLVMDIBuilderCreateLexicalBlockFile(LLVMDIBuilderRef D,
-                                                    LLVMMetadataRef Scope,
-                                                    LLVMMetadataRef File,
-                                                    unsigned Discriminator);
-
-LLVMMetadataRef LLVMDIBuilderCreateFunction(
-    LLVMDIBuilderRef D, LLVMMetadataRef Scope, const char *Name,
-    const char *LinkageName, LLVMMetadataRef File, unsigned Line,
-    LLVMMetadataRef CompositeType, int IsLocalToUnit, int IsDefinition,
-    unsigned ScopeLine, unsigned Flags, int IsOptimized);
-
-LLVMMetadataRef LLVMDIBuilderCreateAutoVariable(
-    LLVMDIBuilderRef D, LLVMMetadataRef Scope, const char *Name,
-    LLVMMetadataRef File, unsigned Line, LLVMMetadataRef Ty, int AlwaysPreserve,
-    unsigned Flags, uint32_t AlignInBits);
-
-LLVMMetadataRef LLVMDIBuilderCreateParameterVariable(
-    LLVMDIBuilderRef D, LLVMMetadataRef Scope, const char *Name, unsigned ArgNo,
-    LLVMMetadataRef File, unsigned Line, LLVMMetadataRef Ty, int AlwaysPreserve,
-    unsigned Flags);
-
-LLVMMetadataRef LLVMDIBuilderCreateBasicType(LLVMDIBuilderRef D,
-                                             const char *Name,
-                                             uint64_t SizeInBits,
-                                             unsigned Encoding);
-
-LLVMMetadataRef LLVMDIBuilderCreatePointerType(LLVMDIBuilderRef D,
-                                               LLVMMetadataRef PointeeType,
-                                               uint64_t SizeInBits,
-                                               uint32_t AlignInBits,
-                                               const char *Name);
-
-LLVMMetadataRef
-LLVMDIBuilderCreateSubroutineType(LLVMDIBuilderRef D, LLVMMetadataRef File,
-                                  LLVMMetadataRef ParameterTypes);
-
-LLVMMetadataRef LLVMDIBuilderCreateStructType(
-    LLVMDIBuilderRef D, LLVMMetadataRef Scope, const char *Name,
-    LLVMMetadataRef File, unsigned Line, uint64_t SizeInBits,
-    uint32_t AlignInBits, unsigned Flags, LLVMMetadataRef DerivedFrom,
-    LLVMMetadataRef ElementTypes);
-
-LLVMMetadataRef LLVMDIBuilderCreateReplaceableCompositeType(
-    LLVMDIBuilderRef D, unsigned Tag, const char *Name, LLVMMetadataRef Scope,
-    LLVMMetadataRef File, unsigned Line, unsigned RuntimeLang,
-    uint64_t SizeInBits, uint32_t AlignInBits, unsigned Flags);
-
-LLVMMetadataRef
-LLVMDIBuilderCreateMemberType(LLVMDIBuilderRef D, LLVMMetadataRef Scope,
-                              const char *Name, LLVMMetadataRef File,
-                              unsigned Line, uint64_t SizeInBits,
-                              uint32_t AlignInBits, uint64_t OffsetInBits,
-                              unsigned Flags, LLVMMetadataRef Ty);
-
-LLVMMetadataRef LLVMDIBuilderCreateArrayType(LLVMDIBuilderRef D,
-                                             uint64_t SizeInBits,
-                                             uint32_t AlignInBits,
-                                             LLVMMetadataRef ElementType,
-                                             LLVMMetadataRef Subscripts);
-
-LLVMMetadataRef LLVMDIBuilderCreateTypedef(LLVMDIBuilderRef D,
-                                           LLVMMetadataRef Ty, const char *Name,
-                                           LLVMMetadataRef File, unsigned Line,
-                                           LLVMMetadataRef Context);
-
-LLVMMetadataRef LLVMDIBuilderGetOrCreateSubrange(LLVMDIBuilderRef D, int64_t Lo,
-                                                 int64_t Count);
-
-LLVMMetadataRef LLVMDIBuilderGetOrCreateArray(LLVMDIBuilderRef D,
-                                              LLVMMetadataRef *Data,
-                                              size_t Length);
-
-LLVMMetadataRef LLVMDIBuilderGetOrCreateTypeArray(LLVMDIBuilderRef D,
-                                                  LLVMMetadataRef *Data,
-                                                  size_t Length);
-
-LLVMMetadataRef LLVMDIBuilderCreateExpression(LLVMDIBuilderRef Dref,
-                                              int64_t *Addr, size_t Length);
-
-LLVMValueRef LLVMDIBuilderInsertDeclareAtEnd(LLVMDIBuilderRef D,
-                                             LLVMValueRef Storage,
-                                             LLVMMetadataRef VarInfo,
-                                             LLVMMetadataRef Expr,
-                                             LLVMBasicBlockRef Block);
-
-LLVMValueRef LLVMDIBuilderInsertValueAtEnd(LLVMDIBuilderRef D, LLVMValueRef Val,
-                                           uint64_t Offset,
-                                           LLVMMetadataRef VarInfo,
-                                           LLVMMetadataRef Expr,
-                                           LLVMBasicBlockRef Block);
-
-#ifdef __cplusplus
-} // extern "C"
-#endif
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Analysis/ObjectUtils.h b/external/bsd/llvm/dist/llvm/include/llvm/Analysis/ObjectUtils.h
deleted file mode 100644
index 2ad3b1717009..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Analysis/ObjectUtils.h
+++ /dev/null
@@ -1,42 +0,0 @@
-//===- Analysis/ObjectUtils.h - analysis utils for object files -*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_ANALYSIS_OBJECT_UTILS_H
-#define LLVM_ANALYSIS_OBJECT_UTILS_H
-
-#include "llvm/IR/GlobalVariable.h"
-
-namespace llvm {
-
-/// True if GV can be left out of the object symbol table. This is the case
-/// for linkonce_odr values whose address is not significant. While legal, it is
-/// not normally profitable to omit them from the .o symbol table. Using this
-/// analysis makes sense when the information can be passed down to the linker
-/// or we are in LTO.
-inline bool canBeOmittedFromSymbolTable(const GlobalValue *GV) {
-  if (!GV->hasLinkOnceODRLinkage())
-    return false;
-
-  // We assume that anyone who sets global unnamed_addr on a non-constant knows
-  // what they're doing.
-  if (GV->hasGlobalUnnamedAddr())
-    return true;
-
-  // If it is a non constant variable, it needs to be uniqued across shared
-  // objects.
-  if (auto *Var = dyn_cast<GlobalVariable>(GV))
-    if (!Var->isConstant())
-      return false;
-
-  return GV->hasAtLeastLocalUnnamedAddr();
-}
-
-}
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Analysis/OptimizationDiagnosticInfo.h b/external/bsd/llvm/dist/llvm/include/llvm/Analysis/OptimizationDiagnosticInfo.h
deleted file mode 100644
index 64dd0737a112..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Analysis/OptimizationDiagnosticInfo.h
+++ /dev/null
@@ -1,164 +0,0 @@
-//===- OptimizationDiagnosticInfo.h - Optimization Diagnostic ---*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Optimization diagnostic interfaces.  It's packaged as an analysis pass so
-// that by using this service passes become dependent on BFI as well.  BFI is
-// used to compute the "hotness" of the diagnostic message.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_IR_OPTIMIZATIONDIAGNOSTICINFO_H
-#define LLVM_IR_OPTIMIZATIONDIAGNOSTICINFO_H
-
-#include "llvm/ADT/Optional.h"
-#include "llvm/Analysis/BlockFrequencyInfo.h"
-#include "llvm/IR/DiagnosticInfo.h"
-#include "llvm/IR/Function.h"
-#include "llvm/IR/PassManager.h"
-#include "llvm/Pass.h"
-
-namespace llvm {
-class DebugLoc;
-class LLVMContext;
-class Loop;
-class Pass;
-class Twine;
-class Value;
-
-/// The optimization diagnostic interface.
-///
-/// It allows reporting when optimizations are performed and when they are not
-/// along with the reasons for it.  Hotness information of the corresponding
-/// code region can be included in the remark if DiagnosticsHotnessRequested is
-/// enabled in the LLVM context.
-class OptimizationRemarkEmitter {
-public:
-  OptimizationRemarkEmitter(const Function *F, BlockFrequencyInfo *BFI)
-      : F(F), BFI(BFI) {}
-
-  /// \brief This variant can be used to generate ORE on demand (without the
-  /// analysis pass).
-  ///
-  /// Note that this ctor has a very different cost depending on whether
-  /// F->getContext().getDiagnosticsHotnessRequested() is on or not.  If it's off
-  /// the operation is free.
-  ///
-  /// Whereas if DiagnosticsHotnessRequested is on, it is fairly expensive
-  /// operation since BFI and all its required analyses are computed.  This is
-  /// for example useful for CGSCC passes that can't use function analyses
-  /// passes in the old PM.
-  OptimizationRemarkEmitter(const Function *F);
-
-  OptimizationRemarkEmitter(OptimizationRemarkEmitter &&Arg)
-      : F(Arg.F), BFI(Arg.BFI) {}
-
-  OptimizationRemarkEmitter &operator=(OptimizationRemarkEmitter &&RHS) {
-    F = RHS.F;
-    BFI = RHS.BFI;
-    return *this;
-  }
-
-  /// Handle invalidation events in the new pass manager.
-  bool invalidate(Function &F, const PreservedAnalyses &PA,
-                  FunctionAnalysisManager::Invalidator &Inv);
-
-  /// \brief Output the remark via the diagnostic handler and to the
-  /// optimization record file.
-  ///
-  /// This is the new interface that should be now used rather than the legacy
-  /// emit* APIs.
-  void emit(DiagnosticInfoOptimizationBase &OptDiag);
-
-  /// \brief Whether we allow for extra compile-time budget to perform more
-  /// analysis to produce fewer false positives.
-  ///
-  /// This is useful when reporting missed optimizations.  In this case we can
-  /// use the extra analysis (1) to filter trivial false positives or (2) to
-  /// provide more context so that non-trivial false positives can be quickly
-  /// detected by the user.
-  bool allowExtraAnalysis() const {
-    // For now, only allow this with -fsave-optimization-record since the -Rpass
-    // options are handled in the front-end.
-    return F->getContext().getDiagnosticsOutputFile();
-  }
-
-private:
-  const Function *F;
-
-  BlockFrequencyInfo *BFI;
-
-  /// If we generate BFI on demand, we need to free it when ORE is freed.
-  std::unique_ptr<BlockFrequencyInfo> OwnedBFI;
-
-  /// Compute hotness from IR value (currently assumed to be a block) if PGO is
-  /// available.
-  Optional<uint64_t> computeHotness(const Value *V);
-
-  /// Similar but use value from \p OptDiag and update hotness there.
-  void computeHotness(DiagnosticInfoIROptimization &OptDiag);
-
-  /// \brief Only allow verbose messages if we know we're filtering by hotness
-  /// (BFI is only set in this case).
-  bool shouldEmitVerbose() { return BFI != nullptr; }
-
-  OptimizationRemarkEmitter(const OptimizationRemarkEmitter &) = delete;
-  void operator=(const OptimizationRemarkEmitter &) = delete;
-};
-
-/// \brief Add a small namespace to avoid name clashes with the classes used in
-/// the streaming interface.  We want these to be short for better
-/// write/readability.
-namespace ore {
-using NV = DiagnosticInfoOptimizationBase::Argument;
-using setIsVerbose = DiagnosticInfoOptimizationBase::setIsVerbose;
-using setExtraArgs = DiagnosticInfoOptimizationBase::setExtraArgs;
-}
-
-/// OptimizationRemarkEmitter legacy analysis pass
-///
-/// Note that this pass shouldn't generally be marked as preserved by other
-/// passes.  It's holding onto BFI, so if the pass does not preserve BFI, BFI
-/// could be freed.
-class OptimizationRemarkEmitterWrapperPass : public FunctionPass {
-  std::unique_ptr<OptimizationRemarkEmitter> ORE;
-
-public:
-  OptimizationRemarkEmitterWrapperPass();
-
-  bool runOnFunction(Function &F) override;
-
-  void getAnalysisUsage(AnalysisUsage &AU) const override;
-
-  OptimizationRemarkEmitter &getORE() {
-    assert(ORE && "pass not run yet");
-    return *ORE;
-  }
-
-  static char ID;
-};
-
-class OptimizationRemarkEmitterAnalysis
-    : public AnalysisInfoMixin<OptimizationRemarkEmitterAnalysis> {
-  friend AnalysisInfoMixin<OptimizationRemarkEmitterAnalysis>;
-  static AnalysisKey Key;
-
-public:
-  /// \brief Provide the result typedef for this analysis pass.
-  typedef OptimizationRemarkEmitter Result;
-
-  /// \brief Run the analysis pass over a function and produce BFI.
-  Result run(Function &F, FunctionAnalysisManager &AM);
-};
-
-namespace yaml {
-template <> struct MappingTraits<DiagnosticInfoOptimizationBase *> {
-  static void mapping(IO &io, DiagnosticInfoOptimizationBase *&OptDiag);
-};
-}
-}
-#endif // LLVM_IR_OPTIMIZATIONDIAGNOSTICINFO_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/BinaryFormat/ELFRelocs/WebAssembly.def b/external/bsd/llvm/dist/llvm/include/llvm/BinaryFormat/ELFRelocs/WebAssembly.def
deleted file mode 100644
index 9a34349efb96..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/BinaryFormat/ELFRelocs/WebAssembly.def
+++ /dev/null
@@ -1,8 +0,0 @@
-
-#ifndef ELF_RELOC
-#error "ELF_RELOC must be defined"
-#endif
-
-ELF_RELOC(R_WEBASSEMBLY_NONE,          0)
-ELF_RELOC(R_WEBASSEMBLY_DATA,          1)
-ELF_RELOC(R_WEBASSEMBLY_FUNCTION,      2)
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/BinaryFormat/WasmRelocs/WebAssembly.def b/external/bsd/llvm/dist/llvm/include/llvm/BinaryFormat/WasmRelocs/WebAssembly.def
deleted file mode 100644
index da64e025478d..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/BinaryFormat/WasmRelocs/WebAssembly.def
+++ /dev/null
@@ -1,13 +0,0 @@
-
-#ifndef WASM_RELOC
-#error "WASM_RELOC must be defined"
-#endif
-
-WASM_RELOC(R_WEBASSEMBLY_FUNCTION_INDEX_LEB,   0)
-WASM_RELOC(R_WEBASSEMBLY_TABLE_INDEX_SLEB,     1)
-WASM_RELOC(R_WEBASSEMBLY_TABLE_INDEX_I32,      2)
-WASM_RELOC(R_WEBASSEMBLY_GLOBAL_ADDR_LEB,      3)
-WASM_RELOC(R_WEBASSEMBLY_GLOBAL_ADDR_SLEB,     4)
-WASM_RELOC(R_WEBASSEMBLY_GLOBAL_ADDR_I32,      5)
-WASM_RELOC(R_WEBASSEMBLY_TYPE_INDEX_LEB,       6)
-WASM_RELOC(R_WEBASSEMBLY_GLOBAL_INDEX_LEB,     7)
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/CommandFlags.h b/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/CommandFlags.h
deleted file mode 100644
index 0d898827efc6..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/CommandFlags.h
+++ /dev/null
@@ -1,382 +0,0 @@
-//===-- CommandFlags.h - Command Line Flags Interface -----------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains codegen-specific flags that are shared between different
-// command line tools. The tools "llc" and "opt" both use this file to prevent
-// flag duplication.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_COMMANDFLAGS_H
-#define LLVM_CODEGEN_COMMANDFLAGS_H
-
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/IR/Instructions.h"
-#include "llvm/IR/Intrinsics.h"
-#include "llvm/IR/Module.h"
-#include "llvm/MC/MCTargetOptionsCommandFlags.h"
-#include "llvm/MC/SubtargetFeature.h"
-#include "llvm/Support/CodeGen.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Host.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetOptions.h"
-#include <string>
-using namespace llvm;
-
-cl::opt<std::string>
-MArch("march", cl::desc("Architecture to generate code for (see --version)"));
-
-cl::opt<std::string>
-MCPU("mcpu",
-     cl::desc("Target a specific cpu type (-mcpu=help for details)"),
-     cl::value_desc("cpu-name"),
-     cl::init(""));
-
-cl::list<std::string>
-MAttrs("mattr",
-       cl::CommaSeparated,
-       cl::desc("Target specific attributes (-mattr=help for details)"),
-       cl::value_desc("a1,+a2,-a3,..."));
-
-cl::opt<Reloc::Model> RelocModel(
-    "relocation-model", cl::desc("Choose relocation model"),
-    cl::values(
-        clEnumValN(Reloc::Static, "static", "Non-relocatable code"),
-        clEnumValN(Reloc::PIC_, "pic",
-                   "Fully relocatable, position independent code"),
-        clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
-                   "Relocatable external references, non-relocatable code"),
-        clEnumValN(Reloc::ROPI, "ropi",
-                   "Code and read-only data relocatable, accessed PC-relative"),
-        clEnumValN(Reloc::RWPI, "rwpi",
-                   "Read-write data relocatable, accessed relative to static base"),
-        clEnumValN(Reloc::ROPI_RWPI, "ropi-rwpi",
-                   "Combination of ropi and rwpi")));
-
-static inline Optional<Reloc::Model> getRelocModel() {
-  if (RelocModel.getNumOccurrences()) {
-    Reloc::Model R = RelocModel;
-    return R;
-  }
-  return None;
-}
-
-cl::opt<ThreadModel::Model>
-TMModel("thread-model",
-        cl::desc("Choose threading model"),
-        cl::init(ThreadModel::POSIX),
-        cl::values(clEnumValN(ThreadModel::POSIX, "posix",
-                              "POSIX thread model"),
-                   clEnumValN(ThreadModel::Single, "single",
-                              "Single thread model")));
-
-cl::opt<llvm::CodeModel::Model>
-CMModel("code-model",
-        cl::desc("Choose code model"),
-        cl::init(CodeModel::Default),
-        cl::values(clEnumValN(CodeModel::Default, "default",
-                              "Target default code model"),
-                   clEnumValN(CodeModel::Small, "small",
-                              "Small code model"),
-                   clEnumValN(CodeModel::Kernel, "kernel",
-                              "Kernel code model"),
-                   clEnumValN(CodeModel::Medium, "medium",
-                              "Medium code model"),
-                   clEnumValN(CodeModel::Large, "large",
-                              "Large code model")));
-
-cl::opt<llvm::ExceptionHandling>
-ExceptionModel("exception-model",
-               cl::desc("exception model"),
-               cl::init(ExceptionHandling::None),
-               cl::values(clEnumValN(ExceptionHandling::None, "default",
-                                     "default exception handling model"),
-                          clEnumValN(ExceptionHandling::DwarfCFI, "dwarf",
-                                     "DWARF-like CFI based exception handling"),
-                          clEnumValN(ExceptionHandling::SjLj, "sjlj",
-                                     "SjLj exception handling"),
-                          clEnumValN(ExceptionHandling::ARM, "arm",
-                                     "ARM EHABI exceptions"),
-                          clEnumValN(ExceptionHandling::WinEH, "wineh",
-                                     "Windows exception model")));
-
-cl::opt<TargetMachine::CodeGenFileType>
-FileType("filetype", cl::init(TargetMachine::CGFT_AssemblyFile),
-  cl::desc("Choose a file type (not all types are supported by all targets):"),
-  cl::values(
-             clEnumValN(TargetMachine::CGFT_AssemblyFile, "asm",
-                        "Emit an assembly ('.s') file"),
-             clEnumValN(TargetMachine::CGFT_ObjectFile, "obj",
-                        "Emit a native object ('.o') file"),
-             clEnumValN(TargetMachine::CGFT_Null, "null",
-                        "Emit nothing, for performance testing")));
-
-cl::opt<bool>
-DisableFPElim("disable-fp-elim",
-              cl::desc("Disable frame pointer elimination optimization"),
-              cl::init(false));
-
-cl::opt<bool>
-EnableUnsafeFPMath("enable-unsafe-fp-math",
-                cl::desc("Enable optimizations that may decrease FP precision"),
-                cl::init(false));
-
-cl::opt<bool>
-EnableNoInfsFPMath("enable-no-infs-fp-math",
-                cl::desc("Enable FP math optimizations that assume no +-Infs"),
-                cl::init(false));
-
-cl::opt<bool>
-EnableNoNaNsFPMath("enable-no-nans-fp-math",
-                   cl::desc("Enable FP math optimizations that assume no NaNs"),
-                   cl::init(false));
-
-cl::opt<bool>
-EnableNoSignedZerosFPMath("enable-no-signed-zeros-fp-math",
-                          cl::desc("Enable FP math optimizations that assume "
-                                   "the sign of 0 is insignificant"),
-                          cl::init(false));
-
-cl::opt<bool>
-EnableNoTrappingFPMath("enable-no-trapping-fp-math",
-                       cl::desc("Enable setting the FP exceptions build "
-                                "attribute not to use exceptions"),
-                       cl::init(false));
-
-cl::opt<llvm::FPDenormal::DenormalMode>
-DenormalMode("denormal-fp-math",
-          cl::desc("Select which denormal numbers the code is permitted to require"),
-          cl::init(FPDenormal::IEEE),
-          cl::values(
-              clEnumValN(FPDenormal::IEEE, "ieee",
-                         "IEEE 754 denormal numbers"),
-              clEnumValN(FPDenormal::PreserveSign, "preserve-sign",
-                         "the sign of a  flushed-to-zero number is preserved "
-                         "in the sign of 0"),
-              clEnumValN(FPDenormal::PositiveZero, "positive-zero",
-                         "denormals are flushed to positive zero")));
-
-cl::opt<bool>
-EnableHonorSignDependentRoundingFPMath("enable-sign-dependent-rounding-fp-math",
-      cl::Hidden,
-      cl::desc("Force codegen to assume rounding mode can change dynamically"),
-      cl::init(false));
-
-cl::opt<llvm::FloatABI::ABIType>
-FloatABIForCalls("float-abi",
-                 cl::desc("Choose float ABI type"),
-                 cl::init(FloatABI::Default),
-                 cl::values(
-                     clEnumValN(FloatABI::Default, "default",
-                                "Target default float ABI type"),
-                     clEnumValN(FloatABI::Soft, "soft",
-                                "Soft float ABI (implied by -soft-float)"),
-                     clEnumValN(FloatABI::Hard, "hard",
-                                "Hard float ABI (uses FP registers)")));
-
-cl::opt<llvm::FPOpFusion::FPOpFusionMode>
-FuseFPOps("fp-contract",
-          cl::desc("Enable aggressive formation of fused FP ops"),
-          cl::init(FPOpFusion::Standard),
-          cl::values(
-              clEnumValN(FPOpFusion::Fast, "fast",
-                         "Fuse FP ops whenever profitable"),
-              clEnumValN(FPOpFusion::Standard, "on",
-                         "Only fuse 'blessed' FP ops."),
-              clEnumValN(FPOpFusion::Strict, "off",
-                         "Only fuse FP ops when the result won't be affected.")));
-
-cl::opt<bool>
-DontPlaceZerosInBSS("nozero-initialized-in-bss",
-              cl::desc("Don't place zero-initialized symbols into bss section"),
-              cl::init(false));
-
-cl::opt<bool>
-EnableGuaranteedTailCallOpt("tailcallopt",
-  cl::desc("Turn fastcc calls into tail calls by (potentially) changing ABI."),
-  cl::init(false));
-
-cl::opt<bool>
-DisableTailCalls("disable-tail-calls",
-                 cl::desc("Never emit tail calls"),
-                 cl::init(false));
-
-cl::opt<bool>
-StackSymbolOrdering("stack-symbol-ordering",
-                    cl::desc("Order local stack symbols."),
-                    cl::init(true));
-
-cl::opt<unsigned>
-OverrideStackAlignment("stack-alignment",
-                       cl::desc("Override default stack alignment"),
-                       cl::init(0));
-
-cl::opt<bool>
-StackRealign("stackrealign",
-             cl::desc("Force align the stack to the minimum alignment"),
-             cl::init(false));
-
-cl::opt<std::string>
-TrapFuncName("trap-func", cl::Hidden,
-        cl::desc("Emit a call to trap function rather than a trap instruction"),
-        cl::init(""));
-
-cl::opt<bool>
-UseCtors("use-ctors",
-             cl::desc("Use .ctors instead of .init_array."),
-             cl::init(false));
-
-cl::opt<bool> RelaxELFRelocations(
-    "relax-elf-relocations",
-    cl::desc("Emit GOTPCRELX/REX_GOTPCRELX instead of GOTPCREL on x86-64 ELF"),
-    cl::init(false));
-
-cl::opt<bool> DataSections("data-sections",
-                           cl::desc("Emit data into separate sections"),
-                           cl::init(false));
-
-cl::opt<bool>
-FunctionSections("function-sections",
-                 cl::desc("Emit functions into separate sections"),
-                 cl::init(false));
-
-cl::opt<bool> EmulatedTLS("emulated-tls",
-                          cl::desc("Use emulated TLS model"),
-                          cl::init(false));
-
-cl::opt<bool> UniqueSectionNames("unique-section-names",
-                                 cl::desc("Give unique names to every section"),
-                                 cl::init(true));
-
-cl::opt<llvm::EABI> EABIVersion(
-    "meabi", cl::desc("Set EABI type (default depends on triple):"),
-    cl::init(EABI::Default),
-    cl::values(clEnumValN(EABI::Default, "default",
-                          "Triple default EABI version"),
-               clEnumValN(EABI::EABI4, "4", "EABI version 4"),
-               clEnumValN(EABI::EABI5, "5", "EABI version 5"),
-               clEnumValN(EABI::GNU, "gnu", "EABI GNU")));
-
-cl::opt<DebuggerKind>
-DebuggerTuningOpt("debugger-tune",
-                  cl::desc("Tune debug info for a particular debugger"),
-                  cl::init(DebuggerKind::Default),
-                  cl::values(
-                      clEnumValN(DebuggerKind::GDB, "gdb", "gdb"),
-                      clEnumValN(DebuggerKind::LLDB, "lldb", "lldb"),
-                      clEnumValN(DebuggerKind::SCE, "sce",
-                                 "SCE targets (e.g. PS4)")));
-
-// Common utility function tightly tied to the options listed here. Initializes
-// a TargetOptions object with CodeGen flags and returns it.
-static inline TargetOptions InitTargetOptionsFromCodeGenFlags() {
-  TargetOptions Options;
-  Options.AllowFPOpFusion = FuseFPOps;
-  Options.UnsafeFPMath = EnableUnsafeFPMath;
-  Options.NoInfsFPMath = EnableNoInfsFPMath;
-  Options.NoNaNsFPMath = EnableNoNaNsFPMath;
-  Options.NoSignedZerosFPMath = EnableNoSignedZerosFPMath;
-  Options.NoTrappingFPMath = EnableNoTrappingFPMath;
-  Options.FPDenormalMode = DenormalMode;
-  Options.HonorSignDependentRoundingFPMathOption =
-      EnableHonorSignDependentRoundingFPMath;
-  if (FloatABIForCalls != FloatABI::Default)
-    Options.FloatABIType = FloatABIForCalls;
-  Options.NoZerosInBSS = DontPlaceZerosInBSS;
-  Options.GuaranteedTailCallOpt = EnableGuaranteedTailCallOpt;
-  Options.StackAlignmentOverride = OverrideStackAlignment;
-  Options.StackSymbolOrdering = StackSymbolOrdering;
-  Options.UseInitArray = !UseCtors;
-  Options.RelaxELFRelocations = RelaxELFRelocations;
-  Options.DataSections = DataSections;
-  Options.FunctionSections = FunctionSections;
-  Options.UniqueSectionNames = UniqueSectionNames;
-  Options.EmulatedTLS = EmulatedTLS;
-  Options.ExceptionModel = ExceptionModel;
-
-  Options.MCOptions = InitMCTargetOptionsFromFlags();
-
-  Options.ThreadModel = TMModel;
-  Options.EABIVersion = EABIVersion;
-  Options.DebuggerTuning = DebuggerTuningOpt;
-
-  return Options;
-}
-
-static inline std::string getCPUStr() {
-  // If user asked for the 'native' CPU, autodetect here. If autodection fails,
-  // this will set the CPU to an empty string which tells the target to
-  // pick a basic default.
-  if (MCPU == "native")
-    return sys::getHostCPUName();
-
-  return MCPU;
-}
-
-static inline std::string getFeaturesStr() {
-  SubtargetFeatures Features;
-
-  // If user asked for the 'native' CPU, we need to autodetect features.
-  // This is necessary for x86 where the CPU might not support all the
-  // features the autodetected CPU name lists in the target. For example,
-  // not all Sandybridge processors support AVX.
-  if (MCPU == "native") {
-    StringMap<bool> HostFeatures;
-    if (sys::getHostCPUFeatures(HostFeatures))
-      for (auto &F : HostFeatures)
-        Features.AddFeature(F.first(), F.second);
-  }
-
-  for (unsigned i = 0; i != MAttrs.size(); ++i)
-    Features.AddFeature(MAttrs[i]);
-
-  return Features.getString();
-}
-
-/// \brief Set function attributes of functions in Module M based on CPU,
-/// Features, and command line flags.
-static inline void setFunctionAttributes(StringRef CPU, StringRef Features,
-                                         Module &M) {
-  for (auto &F : M) {
-    auto &Ctx = F.getContext();
-    AttributeList Attrs = F.getAttributes();
-    AttrBuilder NewAttrs;
-
-    if (!CPU.empty())
-      NewAttrs.addAttribute("target-cpu", CPU);
-    if (!Features.empty())
-      NewAttrs.addAttribute("target-features", Features);
-    if (DisableFPElim.getNumOccurrences() > 0)
-      NewAttrs.addAttribute("no-frame-pointer-elim",
-                            DisableFPElim ? "true" : "false");
-    if (DisableTailCalls.getNumOccurrences() > 0)
-      NewAttrs.addAttribute("disable-tail-calls",
-                            toStringRef(DisableTailCalls));
-    if (StackRealign)
-      NewAttrs.addAttribute("stackrealign");
-
-    if (TrapFuncName.getNumOccurrences() > 0)
-      for (auto &B : F)
-        for (auto &I : B)
-          if (auto *Call = dyn_cast<CallInst>(&I))
-            if (const auto *F = Call->getCalledFunction())
-              if (F->getIntrinsicID() == Intrinsic::debugtrap ||
-                  F->getIntrinsicID() == Intrinsic::trap)
-                Call->addAttribute(
-                    llvm::AttributeList::FunctionIndex,
-                    Attribute::get(Ctx, "trap-func-name", TrapFuncName));
-
-    // Let NewAttrs override Attrs.
-    F.setAttributes(
-        Attrs.addAttributes(Ctx, AttributeList::FunctionIndex, NewAttrs));
-  }
-}
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ExecutionDepsFix.h b/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ExecutionDepsFix.h
deleted file mode 100644
index f4db8b7322da..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ExecutionDepsFix.h
+++ /dev/null
@@ -1,230 +0,0 @@
-//==- llvm/CodeGen/ExecutionDepsFix.h - Execution Dependency Fix -*- C++ -*-==//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file Execution Dependency Fix pass.
-///
-/// Some X86 SSE instructions like mov, and, or, xor are available in different
-/// variants for different operand types. These variant instructions are
-/// equivalent, but on Nehalem and newer cpus there is extra latency
-/// transferring data between integer and floating point domains.  ARM cores
-/// have similar issues when they are configured with both VFP and NEON
-/// pipelines.
-///
-/// This pass changes the variant instructions to minimize domain crossings.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_EXECUTIONDEPSFIX_H
-#define LLVM_CODEGEN_EXECUTIONDEPSFIX_H
-
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/iterator_range.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/RegisterClassInfo.h"
-#include "llvm/Pass.h"
-#include "llvm/Support/Allocator.h"
-#include "llvm/Support/MathExtras.h"
-#include <cassert>
-#include <limits>
-#include <utility>
-#include <vector>
-
-namespace llvm {
-
-class MachineBasicBlock;
-class MachineInstr;
-class TargetInstrInfo;
-
-/// A DomainValue is a bit like LiveIntervals' ValNo, but it also keeps track
-/// of execution domains.
-///
-/// An open DomainValue represents a set of instructions that can still switch
-/// execution domain. Multiple registers may refer to the same open
-/// DomainValue - they will eventually be collapsed to the same execution
-/// domain.
-///
-/// A collapsed DomainValue represents a single register that has been forced
-/// into one of more execution domains. There is a separate collapsed
-/// DomainValue for each register, but it may contain multiple execution
-/// domains. A register value is initially created in a single execution
-/// domain, but if we were forced to pay the penalty of a domain crossing, we
-/// keep track of the fact that the register is now available in multiple
-/// domains.
-struct DomainValue {
-  // Basic reference counting.
-  unsigned Refs = 0;
-
-  // Bitmask of available domains. For an open DomainValue, it is the still
-  // possible domains for collapsing. For a collapsed DomainValue it is the
-  // domains where the register is available for free.
-  unsigned AvailableDomains;
-
-  // Pointer to the next DomainValue in a chain.  When two DomainValues are
-  // merged, Victim.Next is set to point to Victor, so old DomainValue
-  // references can be updated by following the chain.
-  DomainValue *Next;
-
-  // Twiddleable instructions using or defining these registers.
-  SmallVector<MachineInstr*, 8> Instrs;
-
-  DomainValue() { clear(); }
-
-  // A collapsed DomainValue has no instructions to twiddle - it simply keeps
-  // track of the domains where the registers are already available.
-  bool isCollapsed() const { return Instrs.empty(); }
-
-  // Is domain available?
-  bool hasDomain(unsigned domain) const {
-    assert(domain <
-               static_cast<unsigned>(std::numeric_limits<unsigned>::digits) &&
-           "undefined behavior");
-    return AvailableDomains & (1u << domain);
-  }
-
-  // Mark domain as available.
-  void addDomain(unsigned domain) {
-    AvailableDomains |= 1u << domain;
-  }
-
-  // Restrict to a single domain available.
-  void setSingleDomain(unsigned domain) {
-    AvailableDomains = 1u << domain;
-  }
-
-  // Return bitmask of domains that are available and in mask.
-  unsigned getCommonDomains(unsigned mask) const {
-    return AvailableDomains & mask;
-  }
-
-  // First domain available.
-  unsigned getFirstDomain() const {
-    return countTrailingZeros(AvailableDomains);
-  }
-
-  // Clear this DomainValue and point to next which has all its data.
-  void clear() {
-    AvailableDomains = 0;
-    Next = nullptr;
-    Instrs.clear();
-  }
-};
-
-/// Information about a live register.
-struct LiveReg {
-  /// Value currently in this register, or NULL when no value is being tracked.
-  /// This counts as a DomainValue reference.
-  DomainValue *Value;
-
-  /// Instruction that defined this register, relative to the beginning of the
-  /// current basic block.  When a LiveReg is used to represent a live-out
-  /// register, this value is relative to the end of the basic block, so it
-  /// will be a negative number.
-  int Def;
-};
-
-class ExecutionDepsFix : public MachineFunctionPass {
-  SpecificBumpPtrAllocator<DomainValue> Allocator;
-  SmallVector<DomainValue*,16> Avail;
-
-  const TargetRegisterClass *const RC;
-  MachineFunction *MF;
-  const TargetInstrInfo *TII;
-  const TargetRegisterInfo *TRI;
-  RegisterClassInfo RegClassInfo;
-  std::vector<SmallVector<int, 1>> AliasMap;
-  const unsigned NumRegs;
-  LiveReg *LiveRegs;
-  struct MBBInfo {
-    // Keeps clearance and domain information for all registers. Note that this
-    // is different from the usual definition notion of liveness. The CPU
-    // doesn't care whether or not we consider a register killed.
-    LiveReg *OutRegs = nullptr;
-
-    // Whether we have gotten to this block in primary processing yet.
-    bool PrimaryCompleted = false;
-
-    // The number of predecessors for which primary processing has completed
-    unsigned IncomingProcessed = 0;
-
-    // The value of `IncomingProcessed` at the start of primary processing
-    unsigned PrimaryIncoming = 0;
-
-    // The number of predecessors for which all processing steps are done.
-    unsigned IncomingCompleted = 0;
-
-    MBBInfo() = default;
-  };
-  using MBBInfoMap = DenseMap<MachineBasicBlock *, MBBInfo>;
-  MBBInfoMap MBBInfos;
-
-  /// List of undefined register reads in this block in forward order.
-  std::vector<std::pair<MachineInstr *, unsigned>> UndefReads;
-
-  /// Storage for register unit liveness.
-  LivePhysRegs LiveRegSet;
-
-  /// Current instruction number.
-  /// The first instruction in each basic block is 0.
-  int CurInstr;
-
-public:
-  ExecutionDepsFix(char &PassID, const TargetRegisterClass &RC)
-    : MachineFunctionPass(PassID), RC(&RC), NumRegs(RC.getNumRegs()) {}
-
-  void getAnalysisUsage(AnalysisUsage &AU) const override {
-    AU.setPreservesAll();
-    MachineFunctionPass::getAnalysisUsage(AU);
-  }
-
-  bool runOnMachineFunction(MachineFunction &MF) override;
-
-  MachineFunctionProperties getRequiredProperties() const override {
-    return MachineFunctionProperties().set(
-        MachineFunctionProperties::Property::NoVRegs);
-  }
-
-private:
-  iterator_range<SmallVectorImpl<int>::const_iterator>
-  regIndices(unsigned Reg) const;
-  // DomainValue allocation.
-  DomainValue *alloc(int domain = -1);
-  DomainValue *retain(DomainValue *DV) {
-    if (DV) ++DV->Refs;
-    return DV;
-  }
-  void release(DomainValue*);
-  DomainValue *resolve(DomainValue*&);
-
-  // LiveRegs manipulations.
-  void setLiveReg(int rx, DomainValue *DV);
-  void kill(int rx);
-  void force(int rx, unsigned domain);
-  void collapse(DomainValue *dv, unsigned domain);
-  bool merge(DomainValue *A, DomainValue *B);
-
-  void enterBasicBlock(MachineBasicBlock*);
-  void leaveBasicBlock(MachineBasicBlock*);
-  bool isBlockDone(MachineBasicBlock *);
-  void processBasicBlock(MachineBasicBlock *MBB, bool PrimaryPass);
-  bool visitInstr(MachineInstr *);
-  void processDefs(MachineInstr *, bool breakDependency, bool Kill);
-  void visitSoftInstr(MachineInstr*, unsigned mask);
-  void visitHardInstr(MachineInstr*, unsigned domain);
-  bool pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx,
-                                unsigned Pref);
-  bool shouldBreakDependence(MachineInstr*, unsigned OpIdx, unsigned Pref);
-  void processUndefReads(MachineBasicBlock*);
-};
-
-} // end namepsace llvm
-
-#endif // LLVM_CODEGEN_EXECUTIONDEPSFIX_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/GISelAccessor.h b/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/GISelAccessor.h
deleted file mode 100644
index 8dea38059ea4..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/GISelAccessor.h
+++ /dev/null
@@ -1,39 +0,0 @@
-//===-- GISelAccessor.h - GISel Accessor ------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// This file declares the API to access the various APIs related
-/// to GlobalISel.
-//
-//===----------------------------------------------------------------------===/
-
-#ifndef LLVM_CODEGEN_GLOBALISEL_GISELACCESSOR_H
-#define LLVM_CODEGEN_GLOBALISEL_GISELACCESSOR_H
-
-namespace llvm {
-class CallLowering;
-class InstructionSelector;
-class LegalizerInfo;
-class RegisterBankInfo;
-
-/// The goal of this helper class is to gather the accessor to all
-/// the APIs related to GlobalISel.
-/// It should be derived to feature an actual accessor to the GISel APIs.
-/// The reason why this is not simply done into the subtarget is to avoid
-/// spreading ifdefs around.
-struct GISelAccessor {
-  virtual ~GISelAccessor() {}
-  virtual const CallLowering *getCallLowering() const { return nullptr;}
-  virtual const InstructionSelector *getInstructionSelector() const {
-    return nullptr;
-  }
-  virtual const LegalizerInfo *getLegalizerInfo() const { return nullptr; }
-  virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr;}
-};
-} // End namespace llvm;
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h b/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h
deleted file mode 100644
index 820e88362483..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ /dev/null
@@ -1,476 +0,0 @@
-//===- LiveIntervalAnalysis.h - Live Interval Analysis ----------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file This file implements the LiveInterval analysis pass.  Given some
-/// numbering of each the machine instructions (in this implemention depth-first
-/// order) an interval [i, j) is said to be a live interval for register v if
-/// there is no instruction with number j' > j such that v is live at j' and
-/// there is no instruction with number i' < i such that v is live at i'. In
-/// this implementation intervals can have holes, i.e. an interval might look
-/// like [1,20), [50,65), [1000,1001).
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_LIVEINTERVALANALYSIS_H
-#define LLVM_CODEGEN_LIVEINTERVALANALYSIS_H
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/IndexedMap.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/Analysis/AliasAnalysis.h"
-#include "llvm/CodeGen/LiveInterval.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/SlotIndexes.h"
-#include "llvm/MC/LaneBitmask.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Compiler.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Target/TargetRegisterInfo.h"
-#include <cassert>
-#include <cstdint>
-#include <utility>
-
-namespace llvm {
-
-extern cl::opt<bool> UseSegmentSetForPhysRegs;
-
-class BitVector;
-class LiveRangeCalc;
-class MachineBlockFrequencyInfo;
-class MachineDominatorTree;
-class MachineFunction;
-class MachineInstr;
-class MachineRegisterInfo;
-class raw_ostream;
-class TargetInstrInfo;
-class VirtRegMap;
-
-  class LiveIntervals : public MachineFunctionPass {
-    MachineFunction* MF;
-    MachineRegisterInfo* MRI;
-    const TargetRegisterInfo* TRI;
-    const TargetInstrInfo* TII;
-    AliasAnalysis *AA;
-    SlotIndexes* Indexes;
-    MachineDominatorTree *DomTree = nullptr;
-    LiveRangeCalc *LRCalc = nullptr;
-
-    /// Special pool allocator for VNInfo's (LiveInterval val#).
-    VNInfo::Allocator VNInfoAllocator;
-
-    /// Live interval pointers for all the virtual registers.
-    IndexedMap<LiveInterval*, VirtReg2IndexFunctor> VirtRegIntervals;
-
-    /// Sorted list of instructions with register mask operands. Always use the
-    /// 'r' slot, RegMasks are normal clobbers, not early clobbers.
-    SmallVector<SlotIndex, 8> RegMaskSlots;
-
-    /// This vector is parallel to RegMaskSlots, it holds a pointer to the
-    /// corresponding register mask.  This pointer can be recomputed as:
-    ///
-    ///   MI = Indexes->getInstructionFromIndex(RegMaskSlot[N]);
-    ///   unsigned OpNum = findRegMaskOperand(MI);
-    ///   RegMaskBits[N] = MI->getOperand(OpNum).getRegMask();
-    ///
-    /// This is kept in a separate vector partly because some standard
-    /// libraries don't support lower_bound() with mixed objects, partly to
-    /// improve locality when searching in RegMaskSlots.
-    /// Also see the comment in LiveInterval::find().
-    SmallVector<const uint32_t*, 8> RegMaskBits;
-
-    /// For each basic block number, keep (begin, size) pairs indexing into the
-    /// RegMaskSlots and RegMaskBits arrays.
-    /// Note that basic block numbers may not be layout contiguous, that's why
-    /// we can't just keep track of the first register mask in each basic
-    /// block.
-    SmallVector<std::pair<unsigned, unsigned>, 8> RegMaskBlocks;
-
-    /// Keeps a live range set for each register unit to track fixed physreg
-    /// interference.
-    SmallVector<LiveRange*, 0> RegUnitRanges;
-
-  public:
-    static char ID;
-
-    LiveIntervals();
-    ~LiveIntervals() override;
-
-    /// Calculate the spill weight to assign to a single instruction.
-    static float getSpillWeight(bool isDef, bool isUse,
-                                const MachineBlockFrequencyInfo *MBFI,
-                                const MachineInstr &Instr);
-
-    LiveInterval &getInterval(unsigned Reg) {
-      if (hasInterval(Reg))
-        return *VirtRegIntervals[Reg];
-      else
-        return createAndComputeVirtRegInterval(Reg);
-    }
-
-    const LiveInterval &getInterval(unsigned Reg) const {
-      return const_cast<LiveIntervals*>(this)->getInterval(Reg);
-    }
-
-    bool hasInterval(unsigned Reg) const {
-      return VirtRegIntervals.inBounds(Reg) && VirtRegIntervals[Reg];
-    }
-
-    /// Interval creation.
-    LiveInterval &createEmptyInterval(unsigned Reg) {
-      assert(!hasInterval(Reg) && "Interval already exists!");
-      VirtRegIntervals.grow(Reg);
-      VirtRegIntervals[Reg] = createInterval(Reg);
-      return *VirtRegIntervals[Reg];
-    }
-
-    LiveInterval &createAndComputeVirtRegInterval(unsigned Reg) {
-      LiveInterval &LI = createEmptyInterval(Reg);
-      computeVirtRegInterval(LI);
-      return LI;
-    }
-
-    /// Interval removal.
-    void removeInterval(unsigned Reg) {
-      delete VirtRegIntervals[Reg];
-      VirtRegIntervals[Reg] = nullptr;
-    }
-
-    /// Given a register and an instruction, adds a live segment from that
-    /// instruction to the end of its MBB.
-    LiveInterval::Segment addSegmentToEndOfBlock(unsigned reg,
-                                                 MachineInstr &startInst);
-
-    /// After removing some uses of a register, shrink its live range to just
-    /// the remaining uses. This method does not compute reaching defs for new
-    /// uses, and it doesn't remove dead defs.
-    /// Dead PHIDef values are marked as unused. New dead machine instructions
-    /// are added to the dead vector. Returns true if the interval may have been
-    /// separated into multiple connected components.
-    bool shrinkToUses(LiveInterval *li,
-                      SmallVectorImpl<MachineInstr*> *dead = nullptr);
-
-    /// Specialized version of
-    /// shrinkToUses(LiveInterval *li, SmallVectorImpl<MachineInstr*> *dead)
-    /// that works on a subregister live range and only looks at uses matching
-    /// the lane mask of the subregister range.
-    /// This may leave the subrange empty which needs to be cleaned up with
-    /// LiveInterval::removeEmptySubranges() afterwards.
-    void shrinkToUses(LiveInterval::SubRange &SR, unsigned Reg);
-
-    /// Extend the live range \p LR to reach all points in \p Indices. The
-    /// points in the \p Indices array must be jointly dominated by the union
-    /// of the existing defs in \p LR and points in \p Undefs.
-    ///
-    /// PHI-defs are added as needed to maintain SSA form.
-    ///
-    /// If a SlotIndex in \p Indices is the end index of a basic block, \p LR
-    /// will be extended to be live out of the basic block.
-    /// If a SlotIndex in \p Indices is jointy dominated only by points in
-    /// \p Undefs, the live range will not be extended to that point.
-    ///
-    /// See also LiveRangeCalc::extend().
-    void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices,
-                         ArrayRef<SlotIndex> Undefs);
-
-    void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices) {
-      extendToIndices(LR, Indices, /*Undefs=*/{});
-    }
-
-    /// If \p LR has a live value at \p Kill, prune its live range by removing
-    /// any liveness reachable from Kill. Add live range end points to
-    /// EndPoints such that extendToIndices(LI, EndPoints) will reconstruct the
-    /// value's live range.
-    ///
-    /// Calling pruneValue() and extendToIndices() can be used to reconstruct
-    /// SSA form after adding defs to a virtual register.
-    void pruneValue(LiveRange &LR, SlotIndex Kill,
-                    SmallVectorImpl<SlotIndex> *EndPoints);
-
-    /// This function should not be used. Its intend is to tell you that
-    /// you are doing something wrong if you call pruveValue directly on a
-    /// LiveInterval. Indeed, you are supposed to call pruneValue on the main
-    /// LiveRange and all the LiveRange of the subranges if any.
-    LLVM_ATTRIBUTE_UNUSED void pruneValue(LiveInterval &, SlotIndex,
-                                          SmallVectorImpl<SlotIndex> *) {
-      llvm_unreachable(
-          "Use pruneValue on the main LiveRange and on each subrange");
-    }
-
-    SlotIndexes *getSlotIndexes() const {
-      return Indexes;
-    }
-
-    AliasAnalysis *getAliasAnalysis() const {
-      return AA;
-    }
-
-    /// Returns true if the specified machine instr has been removed or was
-    /// never entered in the map.
-    bool isNotInMIMap(const MachineInstr &Instr) const {
-      return !Indexes->hasIndex(Instr);
-    }
-
-    /// Returns the base index of the given instruction.
-    SlotIndex getInstructionIndex(const MachineInstr &Instr) const {
-      return Indexes->getInstructionIndex(Instr);
-    }
-
-    /// Returns the instruction associated with the given index.
-    MachineInstr* getInstructionFromIndex(SlotIndex index) const {
-      return Indexes->getInstructionFromIndex(index);
-    }
-
-    /// Return the first index in the given basic block.
-    SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const {
-      return Indexes->getMBBStartIdx(mbb);
-    }
-
-    /// Return the last index in the given basic block.
-    SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const {
-      return Indexes->getMBBEndIdx(mbb);
-    }
-
-    bool isLiveInToMBB(const LiveRange &LR,
-                       const MachineBasicBlock *mbb) const {
-      return LR.liveAt(getMBBStartIdx(mbb));
-    }
-
-    bool isLiveOutOfMBB(const LiveRange &LR,
-                        const MachineBasicBlock *mbb) const {
-      return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot());
-    }
-
-    MachineBasicBlock* getMBBFromIndex(SlotIndex index) const {
-      return Indexes->getMBBFromIndex(index);
-    }
-
-    void insertMBBInMaps(MachineBasicBlock *MBB) {
-      Indexes->insertMBBInMaps(MBB);
-      assert(unsigned(MBB->getNumber()) == RegMaskBlocks.size() &&
-             "Blocks must be added in order.");
-      RegMaskBlocks.push_back(std::make_pair(RegMaskSlots.size(), 0));
-    }
-
-    SlotIndex InsertMachineInstrInMaps(MachineInstr &MI) {
-      return Indexes->insertMachineInstrInMaps(MI);
-    }
-
-    void InsertMachineInstrRangeInMaps(MachineBasicBlock::iterator B,
-                                       MachineBasicBlock::iterator E) {
-      for (MachineBasicBlock::iterator I = B; I != E; ++I)
-        Indexes->insertMachineInstrInMaps(*I);
-    }
-
-    void RemoveMachineInstrFromMaps(MachineInstr &MI) {
-      Indexes->removeMachineInstrFromMaps(MI);
-    }
-
-    SlotIndex ReplaceMachineInstrInMaps(MachineInstr &MI, MachineInstr &NewMI) {
-      return Indexes->replaceMachineInstrInMaps(MI, NewMI);
-    }
-
-    VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
-
-    void getAnalysisUsage(AnalysisUsage &AU) const override;
-    void releaseMemory() override;
-
-    /// Pass entry point; Calculates LiveIntervals.
-    bool runOnMachineFunction(MachineFunction&) override;
-
-    /// Implement the dump method.
-    void print(raw_ostream &O, const Module* = nullptr) const override;
-
-    /// If LI is confined to a single basic block, return a pointer to that
-    /// block.  If LI is live in to or out of any block, return NULL.
-    MachineBasicBlock *intervalIsInOneMBB(const LiveInterval &LI) const;
-
-    /// Returns true if VNI is killed by any PHI-def values in LI.
-    /// This may conservatively return true to avoid expensive computations.
-    bool hasPHIKill(const LiveInterval &LI, const VNInfo *VNI) const;
-
-    /// Add kill flags to any instruction that kills a virtual register.
-    void addKillFlags(const VirtRegMap*);
-
-    /// Call this method to notify LiveIntervals that instruction \p MI has been
-    /// moved within a basic block. This will update the live intervals for all
-    /// operands of \p MI. Moves between basic blocks are not supported.
-    ///
-    /// \param UpdateFlags Update live intervals for nonallocatable physregs.
-    void handleMove(MachineInstr &MI, bool UpdateFlags = false);
-
-    /// Update intervals for operands of \p MI so that they begin/end on the
-    /// SlotIndex for \p BundleStart.
-    ///
-    /// \param UpdateFlags Update live intervals for nonallocatable physregs.
-    ///
-    /// Requires MI and BundleStart to have SlotIndexes, and assumes
-    /// existing liveness is accurate. BundleStart should be the first
-    /// instruction in the Bundle.
-    void handleMoveIntoBundle(MachineInstr &MI, MachineInstr &BundleStart,
-                              bool UpdateFlags = false);
-
-    /// Update live intervals for instructions in a range of iterators. It is
-    /// intended for use after target hooks that may insert or remove
-    /// instructions, and is only efficient for a small number of instructions.
-    ///
-    /// OrigRegs is a vector of registers that were originally used by the
-    /// instructions in the range between the two iterators.
-    ///
-    /// Currently, the only only changes that are supported are simple removal
-    /// and addition of uses.
-    void repairIntervalsInRange(MachineBasicBlock *MBB,
-                                MachineBasicBlock::iterator Begin,
-                                MachineBasicBlock::iterator End,
-                                ArrayRef<unsigned> OrigRegs);
-
-    // Register mask functions.
-    //
-    // Machine instructions may use a register mask operand to indicate that a
-    // large number of registers are clobbered by the instruction.  This is
-    // typically used for calls.
-    //
-    // For compile time performance reasons, these clobbers are not recorded in
-    // the live intervals for individual physical registers.  Instead,
-    // LiveIntervalAnalysis maintains a sorted list of instructions with
-    // register mask operands.
-
-    /// Returns a sorted array of slot indices of all instructions with
-    /// register mask operands.
-    ArrayRef<SlotIndex> getRegMaskSlots() const { return RegMaskSlots; }
-
-    /// Returns a sorted array of slot indices of all instructions with register
-    /// mask operands in the basic block numbered \p MBBNum.
-    ArrayRef<SlotIndex> getRegMaskSlotsInBlock(unsigned MBBNum) const {
-      std::pair<unsigned, unsigned> P = RegMaskBlocks[MBBNum];
-      return getRegMaskSlots().slice(P.first, P.second);
-    }
-
-    /// Returns an array of register mask pointers corresponding to
-    /// getRegMaskSlots().
-    ArrayRef<const uint32_t*> getRegMaskBits() const { return RegMaskBits; }
-
-    /// Returns an array of mask pointers corresponding to
-    /// getRegMaskSlotsInBlock(MBBNum).
-    ArrayRef<const uint32_t*> getRegMaskBitsInBlock(unsigned MBBNum) const {
-      std::pair<unsigned, unsigned> P = RegMaskBlocks[MBBNum];
-      return getRegMaskBits().slice(P.first, P.second);
-    }
-
-    /// Test if \p LI is live across any register mask instructions, and
-    /// compute a bit mask of physical registers that are not clobbered by any
-    /// of them.
-    ///
-    /// Returns false if \p LI doesn't cross any register mask instructions. In
-    /// that case, the bit vector is not filled in.
-    bool checkRegMaskInterference(LiveInterval &LI,
-                                  BitVector &UsableRegs);
-
-    // Register unit functions.
-    //
-    // Fixed interference occurs when MachineInstrs use physregs directly
-    // instead of virtual registers. This typically happens when passing
-    // arguments to a function call, or when instructions require operands in
-    // fixed registers.
-    //
-    // Each physreg has one or more register units, see MCRegisterInfo. We
-    // track liveness per register unit to handle aliasing registers more
-    // efficiently.
-
-    /// Return the live range for register unit \p Unit. It will be computed if
-    /// it doesn't exist.
-    LiveRange &getRegUnit(unsigned Unit) {
-      LiveRange *LR = RegUnitRanges[Unit];
-      if (!LR) {
-        // Compute missing ranges on demand.
-        // Use segment set to speed-up initial computation of the live range.
-        RegUnitRanges[Unit] = LR = new LiveRange(UseSegmentSetForPhysRegs);
-        computeRegUnitRange(*LR, Unit);
-      }
-      return *LR;
-    }
-
-    /// Return the live range for register unit \p Unit if it has already been
-    /// computed, or nullptr if it hasn't been computed yet.
-    LiveRange *getCachedRegUnit(unsigned Unit) {
-      return RegUnitRanges[Unit];
-    }
-
-    const LiveRange *getCachedRegUnit(unsigned Unit) const {
-      return RegUnitRanges[Unit];
-    }
-
-    /// Remove computed live range for register unit \p Unit. Subsequent uses
-    /// should rely on on-demand recomputation.
-    void removeRegUnit(unsigned Unit) {
-      delete RegUnitRanges[Unit];
-      RegUnitRanges[Unit] = nullptr;
-    }
-
-    /// Remove value numbers and related live segments starting at position
-    /// \p Pos that are part of any liverange of physical register \p Reg or one
-    /// of its subregisters.
-    void removePhysRegDefAt(unsigned Reg, SlotIndex Pos);
-
-    /// Remove value number and related live segments of \p LI and its subranges
-    /// that start at position \p Pos.
-    void removeVRegDefAt(LiveInterval &LI, SlotIndex Pos);
-
-    /// Split separate components in LiveInterval \p LI into separate intervals.
-    void splitSeparateComponents(LiveInterval &LI,
-                                 SmallVectorImpl<LiveInterval*> &SplitLIs);
-
-    /// For live interval \p LI with correct SubRanges construct matching
-    /// information for the main live range. Expects the main live range to not
-    /// have any segments or value numbers.
-    void constructMainRangeFromSubranges(LiveInterval &LI);
-
-  private:
-    /// Compute live intervals for all virtual registers.
-    void computeVirtRegs();
-
-    /// Compute RegMaskSlots and RegMaskBits.
-    void computeRegMasks();
-
-    /// Walk the values in \p LI and check for dead values:
-    /// - Dead PHIDef values are marked as unused.
-    /// - Dead operands are marked as such.
-    /// - Completely dead machine instructions are added to the \p dead vector
-    ///   if it is not nullptr.
-    /// Returns true if any PHI value numbers have been removed which may
-    /// have separated the interval into multiple connected components.
-    bool computeDeadValues(LiveInterval &LI,
-                           SmallVectorImpl<MachineInstr*> *dead);
-
-    static LiveInterval* createInterval(unsigned Reg);
-
-    void printInstrs(raw_ostream &O) const;
-    void dumpInstrs() const;
-
-    void computeLiveInRegUnits();
-    void computeRegUnitRange(LiveRange&, unsigned Unit);
-    void computeVirtRegInterval(LiveInterval&);
-
-
-    /// Helper function for repairIntervalsInRange(), walks backwards and
-    /// creates/modifies live segments in \p LR to match the operands found.
-    /// Only full operands or operands with subregisters matching \p LaneMask
-    /// are considered.
-    void repairOldRegInRange(MachineBasicBlock::iterator Begin,
-                             MachineBasicBlock::iterator End,
-                             const SlotIndex endIdx, LiveRange &LR,
-                             unsigned Reg,
-                             LaneBitmask LaneMask = LaneBitmask::getAll());
-
-    class HMEditor;
-  };
-
-} // end namespace llvm
-
-#endif // LLVM_CODEGEN_LIVEINTERVALANALYSIS_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/LiveStackAnalysis.h b/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/LiveStackAnalysis.h
deleted file mode 100644
index c90ae7b184f4..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/LiveStackAnalysis.h
+++ /dev/null
@@ -1,103 +0,0 @@
-//===- LiveStackAnalysis.h - Live Stack Slot Analysis -----------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements the live stack slot analysis pass. It is analogous to
-// live interval analysis except it's analyzing liveness of stack slots rather
-// than registers.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_LIVESTACKANALYSIS_H
-#define LLVM_CODEGEN_LIVESTACKANALYSIS_H
-
-#include "llvm/CodeGen/LiveInterval.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/Pass.h"
-#include <cassert>
-#include <map>
-#include <unordered_map>
-
-namespace llvm {
-
-class TargetRegisterClass;
-class TargetRegisterInfo;
-
-class LiveStacks : public MachineFunctionPass {
-  const TargetRegisterInfo *TRI;
-
-  /// Special pool allocator for VNInfo's (LiveInterval val#).
-  ///
-  VNInfo::Allocator VNInfoAllocator;
-
-  /// S2IMap - Stack slot indices to live interval mapping.
-  using SS2IntervalMap = std::unordered_map<int, LiveInterval>;
-  SS2IntervalMap S2IMap;
-
-  /// S2RCMap - Stack slot indices to register class mapping.
-  std::map<int, const TargetRegisterClass *> S2RCMap;
-
-public:
-  static char ID; // Pass identification, replacement for typeid
-
-  LiveStacks() : MachineFunctionPass(ID) {
-    initializeLiveStacksPass(*PassRegistry::getPassRegistry());
-  }
-
-  using iterator = SS2IntervalMap::iterator;
-  using const_iterator = SS2IntervalMap::const_iterator;
-
-  const_iterator begin() const { return S2IMap.begin(); }
-  const_iterator end() const { return S2IMap.end(); }
-  iterator begin() { return S2IMap.begin(); }
-  iterator end() { return S2IMap.end(); }
-
-  unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); }
-
-  LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC);
-
-  LiveInterval &getInterval(int Slot) {
-    assert(Slot >= 0 && "Spill slot indice must be >= 0");
-    SS2IntervalMap::iterator I = S2IMap.find(Slot);
-    assert(I != S2IMap.end() && "Interval does not exist for stack slot");
-    return I->second;
-  }
-
-  const LiveInterval &getInterval(int Slot) const {
-    assert(Slot >= 0 && "Spill slot indice must be >= 0");
-    SS2IntervalMap::const_iterator I = S2IMap.find(Slot);
-    assert(I != S2IMap.end() && "Interval does not exist for stack slot");
-    return I->second;
-  }
-
-  bool hasInterval(int Slot) const { return S2IMap.count(Slot); }
-
-  const TargetRegisterClass *getIntervalRegClass(int Slot) const {
-    assert(Slot >= 0 && "Spill slot indice must be >= 0");
-    std::map<int, const TargetRegisterClass *>::const_iterator I =
-        S2RCMap.find(Slot);
-    assert(I != S2RCMap.end() &&
-           "Register class info does not exist for stack slot");
-    return I->second;
-  }
-
-  VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
-
-  void getAnalysisUsage(AnalysisUsage &AU) const override;
-  void releaseMemory() override;
-
-  /// runOnMachineFunction - pass entry point
-  bool runOnMachineFunction(MachineFunction &) override;
-
-  /// print - Implement the dump method.
-  void print(raw_ostream &O, const Module * = nullptr) const override;
-};
-
-} // end namespace llvm
-
-#endif // LLVM_CODEGEN_LIVESTACK_ANALYSIS_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/MachineValueType.h b/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/MachineValueType.h
deleted file mode 100644
index 0bdb38bfcbec..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/MachineValueType.h
+++ /dev/null
@@ -1,1049 +0,0 @@
-//===- CodeGen/MachineValueType.h - Machine-Level types ---------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the set of machine-level target independent types which
-// legal values in the code generator use.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_MACHINEVALUETYPE_H
-#define LLVM_CODEGEN_MACHINEVALUETYPE_H
-
-#include "llvm/ADT/iterator_range.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/MathExtras.h"
-#include <cassert>
-
-namespace llvm {
-
-  class Type;
-
-  /// Machine Value Type. Every type that is supported natively by some
-  /// processor targeted by LLVM occurs here. This means that any legal value
-  /// type can be represented by an MVT.
-  class MVT {
-  public:
-    enum SimpleValueType : uint8_t {
-      // Simple value types that aren't explicitly part of this enumeration
-      // are considered extended value types.
-      INVALID_SIMPLE_VALUE_TYPE = 0,
-
-      // If you change this numbering, you must change the values in
-      // ValueTypes.td as well!
-      Other          =   1,   // This is a non-standard value
-      i1             =   2,   // This is a 1 bit integer value
-      i8             =   3,   // This is an 8 bit integer value
-      i16            =   4,   // This is a 16 bit integer value
-      i32            =   5,   // This is a 32 bit integer value
-      i64            =   6,   // This is a 64 bit integer value
-      i128           =   7,   // This is a 128 bit integer value
-
-      FIRST_INTEGER_VALUETYPE = i1,
-      LAST_INTEGER_VALUETYPE  = i128,
-
-      f16            =   8,   // This is a 16 bit floating point value
-      f32            =   9,   // This is a 32 bit floating point value
-      f64            =  10,   // This is a 64 bit floating point value
-      f80            =  11,   // This is a 80 bit floating point value
-      f128           =  12,   // This is a 128 bit floating point value
-      ppcf128        =  13,   // This is a PPC 128-bit floating point value
-
-      FIRST_FP_VALUETYPE = f16,
-      LAST_FP_VALUETYPE  = ppcf128,
-
-      v1i1           =  14,   //    1 x i1
-      v2i1           =  15,   //    2 x i1
-      v4i1           =  16,   //    4 x i1
-      v8i1           =  17,   //    8 x i1
-      v16i1          =  18,   //   16 x i1
-      v32i1          =  19,   //   32 x i1
-      v64i1          =  20,   //   64 x i1
-      v512i1         =  21,   //  512 x i1
-      v1024i1        =  22,   // 1024 x i1
-
-      v1i8           =  23,   //  1 x i8
-      v2i8           =  24,   //  2 x i8
-      v4i8           =  25,   //  4 x i8
-      v8i8           =  26,   //  8 x i8
-      v16i8          =  27,   // 16 x i8
-      v32i8          =  28,   // 32 x i8
-      v64i8          =  29,   // 64 x i8
-      v128i8         =  30,   //128 x i8
-      v256i8         =  31,   //256 x i8
-
-      v1i16          =  32,   //  1 x i16
-      v2i16          =  33,   //  2 x i16
-      v4i16          =  34,   //  4 x i16
-      v8i16          =  35,   //  8 x i16
-      v16i16         =  36,   // 16 x i16
-      v32i16         =  37,   // 32 x i16
-      v64i16         =  38,   // 64 x i16
-      v128i16        =  39,   //128 x i16
-
-      v1i32          =  40,   //  1 x i32
-      v2i32          =  41,   //  2 x i32
-      v4i32          =  42,   //  4 x i32
-      v8i32          =  43,   //  8 x i32
-      v16i32         =  44,   // 16 x i32
-      v32i32         =  45,   // 32 x i32
-      v64i32         =  46,   // 64 x i32
-
-      v1i64          =  47,   //  1 x i64
-      v2i64          =  48,   //  2 x i64
-      v4i64          =  49,   //  4 x i64
-      v8i64          =  50,   //  8 x i64
-      v16i64         =  51,   // 16 x i64
-      v32i64         =  52,   // 32 x i64
-
-      v1i128         =  53,   //  1 x i128
-
-      // Scalable integer types
-      nxv1i1         =  54,   // n x  1 x i1
-      nxv2i1         =  55,   // n x  2 x i1
-      nxv4i1         =  56,   // n x  4 x i1
-      nxv8i1         =  57,   // n x  8 x i1
-      nxv16i1        =  58,   // n x 16 x i1
-      nxv32i1        =  59,   // n x 32 x i1
-
-      nxv1i8         =  60,   // n x  1 x i8
-      nxv2i8         =  61,   // n x  2 x i8
-      nxv4i8         =  62,   // n x  4 x i8
-      nxv8i8         =  63,   // n x  8 x i8
-      nxv16i8        =  64,   // n x 16 x i8
-      nxv32i8        =  65,   // n x 32 x i8
-
-      nxv1i16        =  66,   // n x  1 x i16
-      nxv2i16        =  67,   // n x  2 x i16
-      nxv4i16        =  68,   // n x  4 x i16
-      nxv8i16        =  69,   // n x  8 x i16
-      nxv16i16       =  70,   // n x 16 x i16
-      nxv32i16       =  71,   // n x 32 x i16
-
-      nxv1i32        =  72,   // n x  1 x i32
-      nxv2i32        =  73,   // n x  2 x i32
-      nxv4i32        =  74,   // n x  4 x i32
-      nxv8i32        =  75,   // n x  8 x i32
-      nxv16i32       =  76,   // n x 16 x i32
-      nxv32i32       =  77,   // n x 32 x i32
-
-      nxv1i64        =  78,   // n x  1 x i64
-      nxv2i64        =  79,   // n x  2 x i64
-      nxv4i64        =  80,   // n x  4 x i64
-      nxv8i64        =  81,   // n x  8 x i64
-      nxv16i64       =  82,   // n x 16 x i64
-      nxv32i64       =  83,   // n x 32 x i64
-
-      FIRST_INTEGER_VECTOR_VALUETYPE = v1i1,
-      LAST_INTEGER_VECTOR_VALUETYPE = nxv32i64,
-
-      FIRST_INTEGER_SCALABLE_VALUETYPE = nxv1i1,
-      LAST_INTEGER_SCALABLE_VALUETYPE = nxv32i64,
-
-      v2f16          =  84,   //  2 x f16
-      v4f16          =  85,   //  4 x f16
-      v8f16          =  86,   //  8 x f16
-      v1f32          =  87,   //  1 x f32
-      v2f32          =  88,   //  2 x f32
-      v4f32          =  89,   //  4 x f32
-      v8f32          =  90,   //  8 x f32
-      v16f32         =  91,   // 16 x f32
-      v1f64          =  92,   //  1 x f64
-      v2f64          =  93,   //  2 x f64
-      v4f64          =  94,   //  4 x f64
-      v8f64          =  95,   //  8 x f64
-
-      nxv2f16        =  96,   // n x  2 x f16
-      nxv4f16        =  97,   // n x  4 x f16
-      nxv8f16        =  98,   // n x  8 x f16
-      nxv1f32        =  99,   // n x  1 x f32
-      nxv2f32        = 100,   // n x  2 x f32
-      nxv4f32        = 101,   // n x  4 x f32
-      nxv8f32        = 102,   // n x  8 x f32
-      nxv16f32       = 103,   // n x 16 x f32
-      nxv1f64        = 104,   // n x  1 x f64
-      nxv2f64        = 105,   // n x  2 x f64
-      nxv4f64        = 106,   // n x  4 x f64
-      nxv8f64        = 107,   // n x  8 x f64
-
-      FIRST_FP_VECTOR_VALUETYPE = v2f16,
-      LAST_FP_VECTOR_VALUETYPE = nxv8f64,
-
-      FIRST_FP_SCALABLE_VALUETYPE = nxv2f16,
-      LAST_FP_SCALABLE_VALUETYPE = nxv8f64,
-
-      FIRST_VECTOR_VALUETYPE = v1i1,
-      LAST_VECTOR_VALUETYPE  = nxv8f64,
-
-      x86mmx         =  108,   // This is an X86 MMX value
-
-      Glue           =  109,   // This glues nodes together during pre-RA sched
-
-      isVoid         =  110,   // This has no value
-
-      Untyped        =  111,   // This value takes a register, but has
-                               // unspecified type.  The register class
-                               // will be determined by the opcode.
-
-      FIRST_VALUETYPE = 1,     // This is always the beginning of the list.
-      LAST_VALUETYPE =  112,   // This always remains at the end of the list.
-
-      // This is the current maximum for LAST_VALUETYPE.
-      // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
-      // This value must be a multiple of 32.
-      MAX_ALLOWED_VALUETYPE = 128,
-
-      // A value of type llvm::TokenTy
-      token          = 248,
-
-      // This is MDNode or MDString.
-      Metadata       = 249,
-
-      // An int value the size of the pointer of the current
-      // target to any address space. This must only be used internal to
-      // tblgen. Other than for overloading, we treat iPTRAny the same as iPTR.
-      iPTRAny        = 250,
-
-      // A vector with any length and element size. This is used
-      // for intrinsics that have overloadings based on vector types.
-      // This is only for tblgen's consumption!
-      vAny           = 251,
-
-      // Any floating-point or vector floating-point value. This is used
-      // for intrinsics that have overloadings based on floating-point types.
-      // This is only for tblgen's consumption!
-      fAny           = 252,
-
-      // An integer or vector integer value of any bit width. This is
-      // used for intrinsics that have overloadings based on integer bit widths.
-      // This is only for tblgen's consumption!
-      iAny           = 253,
-
-      // An int value the size of the pointer of the current
-      // target.  This should only be used internal to tblgen!
-      iPTR           = 254,
-
-      // Any type. This is used for intrinsics that have overloadings.
-      // This is only for tblgen's consumption!
-      Any            = 255
-    };
-
-    SimpleValueType SimpleTy = INVALID_SIMPLE_VALUE_TYPE;
-
-    // A class to represent the number of elements in a vector
-    //
-    // For fixed-length vectors, the total number of elements is equal to 'Min'
-    // For scalable vectors, the total number of elements is a multiple of 'Min'
-    class ElementCount {
-    public:
-      unsigned Min;
-      bool Scalable;
-
-      ElementCount(unsigned Min, bool Scalable)
-      : Min(Min), Scalable(Scalable) {}
-
-      ElementCount operator*(unsigned RHS) {
-        return { Min * RHS, Scalable };
-      }
-
-      ElementCount& operator*=(unsigned RHS) {
-        Min *= RHS;
-        return *this;
-      }
-
-      ElementCount operator/(unsigned RHS) {
-        return { Min / RHS, Scalable };
-      }
-
-      ElementCount& operator/=(unsigned RHS) {
-        Min /= RHS;
-        return *this;
-      }
-
-      bool operator==(const ElementCount& RHS) {
-        return Min == RHS.Min && Scalable == RHS.Scalable;
-      }
-    };
-
-    constexpr MVT() = default;
-    constexpr MVT(SimpleValueType SVT) : SimpleTy(SVT) {}
-
-    bool operator>(const MVT& S)  const { return SimpleTy >  S.SimpleTy; }
-    bool operator<(const MVT& S)  const { return SimpleTy <  S.SimpleTy; }
-    bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
-    bool operator!=(const MVT& S) const { return SimpleTy != S.SimpleTy; }
-    bool operator>=(const MVT& S) const { return SimpleTy >= S.SimpleTy; }
-    bool operator<=(const MVT& S) const { return SimpleTy <= S.SimpleTy; }
-
-    /// Return true if this is a valid simple valuetype.
-    bool isValid() const {
-      return (SimpleTy >= MVT::FIRST_VALUETYPE &&
-              SimpleTy < MVT::LAST_VALUETYPE);
-    }
-
-    /// Return true if this is a FP or a vector FP type.
-    bool isFloatingPoint() const {
-      return ((SimpleTy >= MVT::FIRST_FP_VALUETYPE &&
-               SimpleTy <= MVT::LAST_FP_VALUETYPE) ||
-              (SimpleTy >= MVT::FIRST_FP_VECTOR_VALUETYPE &&
-               SimpleTy <= MVT::LAST_FP_VECTOR_VALUETYPE));
-    }
-
-    /// Return true if this is an integer or a vector integer type.
-    bool isInteger() const {
-      return ((SimpleTy >= MVT::FIRST_INTEGER_VALUETYPE &&
-               SimpleTy <= MVT::LAST_INTEGER_VALUETYPE) ||
-              (SimpleTy >= MVT::FIRST_INTEGER_VECTOR_VALUETYPE &&
-               SimpleTy <= MVT::LAST_INTEGER_VECTOR_VALUETYPE));
-    }
-
-    /// Return true if this is an integer, not including vectors.
-    bool isScalarInteger() const {
-      return (SimpleTy >= MVT::FIRST_INTEGER_VALUETYPE &&
-              SimpleTy <= MVT::LAST_INTEGER_VALUETYPE);
-    }
-
-    /// Return true if this is a vector value type.
-    bool isVector() const {
-      return (SimpleTy >= MVT::FIRST_VECTOR_VALUETYPE &&
-              SimpleTy <= MVT::LAST_VECTOR_VALUETYPE);
-    }
-
-    /// Return true if this is a vector value type where the
-    /// runtime length is machine dependent
-    bool isScalableVector() const {
-      return ((SimpleTy >= MVT::FIRST_INTEGER_SCALABLE_VALUETYPE &&
-               SimpleTy <= MVT::LAST_INTEGER_SCALABLE_VALUETYPE) ||
-              (SimpleTy >= MVT::FIRST_FP_SCALABLE_VALUETYPE &&
-               SimpleTy <= MVT::LAST_FP_SCALABLE_VALUETYPE));
-    }
-
-    /// Return true if this is a 16-bit vector type.
-    bool is16BitVector() const {
-      return (SimpleTy == MVT::v2i8  || SimpleTy == MVT::v1i16 ||
-              SimpleTy == MVT::v16i1);
-    }
-
-    /// Return true if this is a 32-bit vector type.
-    bool is32BitVector() const {
-      return (SimpleTy == MVT::v32i1 || SimpleTy == MVT::v4i8  ||
-              SimpleTy == MVT::v2i16 || SimpleTy == MVT::v1i32 ||
-              SimpleTy == MVT::v2f16 || SimpleTy == MVT::v1f32);
-    }
-
-    /// Return true if this is a 64-bit vector type.
-    bool is64BitVector() const {
-      return (SimpleTy == MVT::v64i1 || SimpleTy == MVT::v8i8  ||
-              SimpleTy == MVT::v4i16 || SimpleTy == MVT::v2i32 ||
-              SimpleTy == MVT::v1i64 || SimpleTy == MVT::v4f16 ||
-              SimpleTy == MVT::v2f32 || SimpleTy == MVT::v1f64);
-    }
-
-    /// Return true if this is a 128-bit vector type.
-    bool is128BitVector() const {
-      return (SimpleTy == MVT::v16i8  || SimpleTy == MVT::v8i16 ||
-              SimpleTy == MVT::v4i32  || SimpleTy == MVT::v2i64 ||
-              SimpleTy == MVT::v1i128 || SimpleTy == MVT::v8f16 ||
-              SimpleTy == MVT::v4f32  || SimpleTy == MVT::v2f64);
-    }
-
-    /// Return true if this is a 256-bit vector type.
-    bool is256BitVector() const {
-      return (SimpleTy == MVT::v8f32 || SimpleTy == MVT::v4f64  ||
-              SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 ||
-              SimpleTy == MVT::v8i32 || SimpleTy == MVT::v4i64);
-    }
-
-    /// Return true if this is a 512-bit vector type.
-    bool is512BitVector() const {
-      return (SimpleTy == MVT::v16f32 || SimpleTy == MVT::v8f64  ||
-              SimpleTy == MVT::v512i1 || SimpleTy == MVT::v64i8  ||
-              SimpleTy == MVT::v32i16 || SimpleTy == MVT::v16i32 ||
-              SimpleTy == MVT::v8i64);
-    }
-
-    /// Return true if this is a 1024-bit vector type.
-    bool is1024BitVector() const {
-      return (SimpleTy == MVT::v1024i1 || SimpleTy == MVT::v128i8 ||
-              SimpleTy == MVT::v64i16  || SimpleTy == MVT::v32i32 ||
-              SimpleTy == MVT::v16i64);
-    }
-
-    /// Return true if this is a 1024-bit vector type.
-    bool is2048BitVector() const {
-      return (SimpleTy == MVT::v256i8 || SimpleTy == MVT::v128i16 ||
-              SimpleTy == MVT::v64i32 || SimpleTy == MVT::v32i64);
-    }
-
-    /// Return true if this is an overloaded type for TableGen.
-    bool isOverloaded() const {
-      return (SimpleTy==MVT::Any  ||
-              SimpleTy==MVT::iAny || SimpleTy==MVT::fAny ||
-              SimpleTy==MVT::vAny || SimpleTy==MVT::iPTRAny);
-    }
-
-    /// Returns true if the given vector is a power of 2.
-    bool isPow2VectorType() const {
-      unsigned NElts = getVectorNumElements();
-      return !(NElts & (NElts - 1));
-    }
-
-    /// Widens the length of the given vector MVT up to the nearest power of 2
-    /// and returns that type.
-    MVT getPow2VectorType() const {
-      if (isPow2VectorType())
-        return *this;
-
-      unsigned NElts = getVectorNumElements();
-      unsigned Pow2NElts = 1 << Log2_32_Ceil(NElts);
-      return MVT::getVectorVT(getVectorElementType(), Pow2NElts);
-    }
-
-    /// If this is a vector, return the element type, otherwise return this.
-    MVT getScalarType() const {
-      return isVector() ? getVectorElementType() : *this;
-    }
-
-    MVT getVectorElementType() const {
-      switch (SimpleTy) {
-      default:
-        llvm_unreachable("Not a vector MVT!");
-      case v1i1:
-      case v2i1:
-      case v4i1:
-      case v8i1:
-      case v16i1:
-      case v32i1:
-      case v64i1:
-      case v512i1:
-      case v1024i1:
-      case nxv1i1:
-      case nxv2i1:
-      case nxv4i1:
-      case nxv8i1:
-      case nxv16i1:
-      case nxv32i1: return i1;
-      case v1i8:
-      case v2i8:
-      case v4i8:
-      case v8i8:
-      case v16i8:
-      case v32i8:
-      case v64i8:
-      case v128i8:
-      case v256i8:
-      case nxv1i8:
-      case nxv2i8:
-      case nxv4i8:
-      case nxv8i8:
-      case nxv16i8:
-      case nxv32i8: return i8;
-      case v1i16:
-      case v2i16:
-      case v4i16:
-      case v8i16:
-      case v16i16:
-      case v32i16:
-      case v64i16:
-      case v128i16:
-      case nxv1i16:
-      case nxv2i16:
-      case nxv4i16:
-      case nxv8i16:
-      case nxv16i16:
-      case nxv32i16: return i16;
-      case v1i32:
-      case v2i32:
-      case v4i32:
-      case v8i32:
-      case v16i32:
-      case v32i32:
-      case v64i32:
-      case nxv1i32:
-      case nxv2i32:
-      case nxv4i32:
-      case nxv8i32:
-      case nxv16i32:
-      case nxv32i32: return i32;
-      case v1i64:
-      case v2i64:
-      case v4i64:
-      case v8i64:
-      case v16i64:
-      case v32i64:
-      case nxv1i64:
-      case nxv2i64:
-      case nxv4i64:
-      case nxv8i64:
-      case nxv16i64:
-      case nxv32i64: return i64;
-      case v1i128: return i128;
-      case v2f16:
-      case v4f16:
-      case v8f16:
-      case nxv2f16:
-      case nxv4f16:
-      case nxv8f16: return f16;
-      case v1f32:
-      case v2f32:
-      case v4f32:
-      case v8f32:
-      case v16f32:
-      case nxv1f32:
-      case nxv2f32:
-      case nxv4f32:
-      case nxv8f32:
-      case nxv16f32: return f32;
-      case v1f64:
-      case v2f64:
-      case v4f64:
-      case v8f64:
-      case nxv1f64:
-      case nxv2f64:
-      case nxv4f64:
-      case nxv8f64: return f64;
-      }
-    }
-
-    unsigned getVectorNumElements() const {
-      switch (SimpleTy) {
-      default:
-        llvm_unreachable("Not a vector MVT!");
-      case v1024i1: return 1024;
-      case v512i1: return 512;
-      case v256i8: return 256;
-      case v128i8:
-      case v128i16: return 128;
-      case v64i1:
-      case v64i8:
-      case v64i16:
-      case v64i32: return 64;
-      case v32i1:
-      case v32i8:
-      case v32i16:
-      case v32i32:
-      case v32i64:
-      case nxv32i1:
-      case nxv32i8:
-      case nxv32i16:
-      case nxv32i32:
-      case nxv32i64: return 32;
-      case v16i1:
-      case v16i8:
-      case v16i16:
-      case v16i32:
-      case v16i64:
-      case v16f32:
-      case nxv16i1:
-      case nxv16i8:
-      case nxv16i16:
-      case nxv16i32:
-      case nxv16i64:
-      case nxv16f32: return 16;
-      case v8i1:
-      case v8i8:
-      case v8i16:
-      case v8i32:
-      case v8i64:
-      case v8f16:
-      case v8f32:
-      case v8f64:
-      case nxv8i1:
-      case nxv8i8:
-      case nxv8i16:
-      case nxv8i32:
-      case nxv8i64:
-      case nxv8f16:
-      case nxv8f32:
-      case nxv8f64: return 8;
-      case v4i1:
-      case v4i8:
-      case v4i16:
-      case v4i32:
-      case v4i64:
-      case v4f16:
-      case v4f32:
-      case v4f64:
-      case nxv4i1:
-      case nxv4i8:
-      case nxv4i16:
-      case nxv4i32:
-      case nxv4i64:
-      case nxv4f16:
-      case nxv4f32:
-      case nxv4f64: return 4;
-      case v2i1:
-      case v2i8:
-      case v2i16:
-      case v2i32:
-      case v2i64:
-      case v2f16:
-      case v2f32:
-      case v2f64:
-      case nxv2i1:
-      case nxv2i8:
-      case nxv2i16:
-      case nxv2i32:
-      case nxv2i64:
-      case nxv2f16:
-      case nxv2f32:
-      case nxv2f64: return 2;
-      case v1i1:
-      case v1i8:
-      case v1i16:
-      case v1i32:
-      case v1i64:
-      case v1i128:
-      case v1f32:
-      case v1f64:
-      case nxv1i1:
-      case nxv1i8:
-      case nxv1i16:
-      case nxv1i32:
-      case nxv1i64:
-      case nxv1f32:
-      case nxv1f64: return 1;
-      }
-    }
-
-    MVT::ElementCount getVectorElementCount() const {
-      return { getVectorNumElements(), isScalableVector() };
-    }
-
-    unsigned getSizeInBits() const {
-      switch (SimpleTy) {
-      default:
-        llvm_unreachable("getSizeInBits called on extended MVT.");
-      case Other:
-        llvm_unreachable("Value type is non-standard value, Other.");
-      case iPTR:
-        llvm_unreachable("Value type size is target-dependent. Ask TLI.");
-      case iPTRAny:
-      case iAny:
-      case fAny:
-      case vAny:
-      case Any:
-        llvm_unreachable("Value type is overloaded.");
-      case token:
-        llvm_unreachable("Token type is a sentinel that cannot be used "
-                         "in codegen and has no size");
-      case Metadata:
-        llvm_unreachable("Value type is metadata.");
-      case i1:
-      case v1i1:
-      case nxv1i1: return 1;
-      case v2i1:
-      case nxv2i1: return 2;
-      case v4i1:
-      case nxv4i1: return 4;
-      case i8  :
-      case v1i8:
-      case v8i1:
-      case nxv1i8:
-      case nxv8i1: return 8;
-      case i16 :
-      case f16:
-      case v16i1:
-      case v2i8:
-      case v1i16:
-      case nxv16i1:
-      case nxv2i8:
-      case nxv1i16: return 16;
-      case f32 :
-      case i32 :
-      case v32i1:
-      case v4i8:
-      case v2i16:
-      case v2f16:
-      case v1f32:
-      case v1i32:
-      case nxv32i1:
-      case nxv4i8:
-      case nxv2i16:
-      case nxv1i32:
-      case nxv2f16:
-      case nxv1f32: return 32;
-      case x86mmx:
-      case f64 :
-      case i64 :
-      case v64i1:
-      case v8i8:
-      case v4i16:
-      case v2i32:
-      case v1i64:
-      case v4f16:
-      case v2f32:
-      case v1f64:
-      case nxv8i8:
-      case nxv4i16:
-      case nxv2i32:
-      case nxv1i64:
-      case nxv4f16:
-      case nxv2f32:
-      case nxv1f64: return 64;
-      case f80 :  return 80;
-      case f128:
-      case ppcf128:
-      case i128:
-      case v16i8:
-      case v8i16:
-      case v4i32:
-      case v2i64:
-      case v1i128:
-      case v8f16:
-      case v4f32:
-      case v2f64:
-      case nxv16i8:
-      case nxv8i16:
-      case nxv4i32:
-      case nxv2i64:
-      case nxv8f16:
-      case nxv4f32:
-      case nxv2f64: return 128;
-      case v32i8:
-      case v16i16:
-      case v8i32:
-      case v4i64:
-      case v8f32:
-      case v4f64:
-      case nxv32i8:
-      case nxv16i16:
-      case nxv8i32:
-      case nxv4i64:
-      case nxv8f32:
-      case nxv4f64: return 256;
-      case v512i1:
-      case v64i8:
-      case v32i16:
-      case v16i32:
-      case v8i64:
-      case v16f32:
-      case v8f64:
-      case nxv32i16:
-      case nxv16i32:
-      case nxv8i64:
-      case nxv16f32:
-      case nxv8f64: return 512;
-      case v1024i1:
-      case v128i8:
-      case v64i16:
-      case v32i32:
-      case v16i64:
-      case nxv32i32:
-      case nxv16i64: return 1024;
-      case v256i8:
-      case v128i16:
-      case v64i32:
-      case v32i64:
-      case nxv32i64: return 2048;
-      }
-    }
-
-    unsigned getScalarSizeInBits() const {
-      return getScalarType().getSizeInBits();
-    }
-
-    /// Return the number of bytes overwritten by a store of the specified value
-    /// type.
-    unsigned getStoreSize() const {
-      return (getSizeInBits() + 7) / 8;
-    }
-
-    /// Return the number of bits overwritten by a store of the specified value
-    /// type.
-    unsigned getStoreSizeInBits() const {
-      return getStoreSize() * 8;
-    }
-
-    /// Return true if this has more bits than VT.
-    bool bitsGT(MVT VT) const {
-      return getSizeInBits() > VT.getSizeInBits();
-    }
-
-    /// Return true if this has no less bits than VT.
-    bool bitsGE(MVT VT) const {
-      return getSizeInBits() >= VT.getSizeInBits();
-    }
-
-    /// Return true if this has less bits than VT.
-    bool bitsLT(MVT VT) const {
-      return getSizeInBits() < VT.getSizeInBits();
-    }
-
-    /// Return true if this has no more bits than VT.
-    bool bitsLE(MVT VT) const {
-      return getSizeInBits() <= VT.getSizeInBits();
-    }
-
-    static MVT getFloatingPointVT(unsigned BitWidth) {
-      switch (BitWidth) {
-      default:
-        llvm_unreachable("Bad bit width!");
-      case 16:
-        return MVT::f16;
-      case 32:
-        return MVT::f32;
-      case 64:
-        return MVT::f64;
-      case 80:
-        return MVT::f80;
-      case 128:
-        return MVT::f128;
-      }
-    }
-
-    static MVT getIntegerVT(unsigned BitWidth) {
-      switch (BitWidth) {
-      default:
-        return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
-      case 1:
-        return MVT::i1;
-      case 8:
-        return MVT::i8;
-      case 16:
-        return MVT::i16;
-      case 32:
-        return MVT::i32;
-      case 64:
-        return MVT::i64;
-      case 128:
-        return MVT::i128;
-      }
-    }
-
-    static MVT getVectorVT(MVT VT, unsigned NumElements) {
-      switch (VT.SimpleTy) {
-      default:
-        break;
-      case MVT::i1:
-        if (NumElements == 1)    return MVT::v1i1;
-        if (NumElements == 2)    return MVT::v2i1;
-        if (NumElements == 4)    return MVT::v4i1;
-        if (NumElements == 8)    return MVT::v8i1;
-        if (NumElements == 16)   return MVT::v16i1;
-        if (NumElements == 32)   return MVT::v32i1;
-        if (NumElements == 64)   return MVT::v64i1;
-        if (NumElements == 512)  return MVT::v512i1;
-        if (NumElements == 1024) return MVT::v1024i1;
-        break;
-      case MVT::i8:
-        if (NumElements == 1)   return MVT::v1i8;
-        if (NumElements == 2)   return MVT::v2i8;
-        if (NumElements == 4)   return MVT::v4i8;
-        if (NumElements == 8)   return MVT::v8i8;
-        if (NumElements == 16)  return MVT::v16i8;
-        if (NumElements == 32)  return MVT::v32i8;
-        if (NumElements == 64)  return MVT::v64i8;
-        if (NumElements == 128) return MVT::v128i8;
-        if (NumElements == 256) return MVT::v256i8;
-        break;
-      case MVT::i16:
-        if (NumElements == 1)   return MVT::v1i16;
-        if (NumElements == 2)   return MVT::v2i16;
-        if (NumElements == 4)   return MVT::v4i16;
-        if (NumElements == 8)   return MVT::v8i16;
-        if (NumElements == 16)  return MVT::v16i16;
-        if (NumElements == 32)  return MVT::v32i16;
-        if (NumElements == 64)  return MVT::v64i16;
-        if (NumElements == 128) return MVT::v128i16;
-        break;
-      case MVT::i32:
-        if (NumElements == 1)  return MVT::v1i32;
-        if (NumElements == 2)  return MVT::v2i32;
-        if (NumElements == 4)  return MVT::v4i32;
-        if (NumElements == 8)  return MVT::v8i32;
-        if (NumElements == 16) return MVT::v16i32;
-        if (NumElements == 32) return MVT::v32i32;
-        if (NumElements == 64) return MVT::v64i32;
-        break;
-      case MVT::i64:
-        if (NumElements == 1)  return MVT::v1i64;
-        if (NumElements == 2)  return MVT::v2i64;
-        if (NumElements == 4)  return MVT::v4i64;
-        if (NumElements == 8)  return MVT::v8i64;
-        if (NumElements == 16) return MVT::v16i64;
-        if (NumElements == 32) return MVT::v32i64;
-        break;
-      case MVT::i128:
-        if (NumElements == 1)  return MVT::v1i128;
-        break;
-      case MVT::f16:
-        if (NumElements == 2)  return MVT::v2f16;
-        if (NumElements == 4)  return MVT::v4f16;
-        if (NumElements == 8)  return MVT::v8f16;
-        break;
-      case MVT::f32:
-        if (NumElements == 1)  return MVT::v1f32;
-        if (NumElements == 2)  return MVT::v2f32;
-        if (NumElements == 4)  return MVT::v4f32;
-        if (NumElements == 8)  return MVT::v8f32;
-        if (NumElements == 16) return MVT::v16f32;
-        break;
-      case MVT::f64:
-        if (NumElements == 1)  return MVT::v1f64;
-        if (NumElements == 2)  return MVT::v2f64;
-        if (NumElements == 4)  return MVT::v4f64;
-        if (NumElements == 8)  return MVT::v8f64;
-        break;
-      }
-      return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
-    }
-
-    static MVT getScalableVectorVT(MVT VT, unsigned NumElements) {
-      switch(VT.SimpleTy) {
-        default:
-          break;
-        case MVT::i1:
-          if (NumElements == 1)  return MVT::nxv1i1;
-          if (NumElements == 2)  return MVT::nxv2i1;
-          if (NumElements == 4)  return MVT::nxv4i1;
-          if (NumElements == 8)  return MVT::nxv8i1;
-          if (NumElements == 16) return MVT::nxv16i1;
-          if (NumElements == 32) return MVT::nxv32i1;
-          break;
-        case MVT::i8:
-          if (NumElements == 1)  return MVT::nxv1i8;
-          if (NumElements == 2)  return MVT::nxv2i8;
-          if (NumElements == 4)  return MVT::nxv4i8;
-          if (NumElements == 8)  return MVT::nxv8i8;
-          if (NumElements == 16) return MVT::nxv16i8;
-          if (NumElements == 32) return MVT::nxv32i8;
-          break;
-        case MVT::i16:
-          if (NumElements == 1)  return MVT::nxv1i16;
-          if (NumElements == 2)  return MVT::nxv2i16;
-          if (NumElements == 4)  return MVT::nxv4i16;
-          if (NumElements == 8)  return MVT::nxv8i16;
-          if (NumElements == 16) return MVT::nxv16i16;
-          if (NumElements == 32) return MVT::nxv32i16;
-          break;
-        case MVT::i32:
-          if (NumElements == 1)  return MVT::nxv1i32;
-          if (NumElements == 2)  return MVT::nxv2i32;
-          if (NumElements == 4)  return MVT::nxv4i32;
-          if (NumElements == 8)  return MVT::nxv8i32;
-          if (NumElements == 16) return MVT::nxv16i32;
-          if (NumElements == 32) return MVT::nxv32i32;
-          break;
-        case MVT::i64:
-          if (NumElements == 1)  return MVT::nxv1i64;
-          if (NumElements == 2)  return MVT::nxv2i64;
-          if (NumElements == 4)  return MVT::nxv4i64;
-          if (NumElements == 8)  return MVT::nxv8i64;
-          if (NumElements == 16) return MVT::nxv16i64;
-          if (NumElements == 32) return MVT::nxv32i64;
-          break;
-        case MVT::f16:
-          if (NumElements == 2)  return MVT::nxv2f16;
-          if (NumElements == 4)  return MVT::nxv4f16;
-          if (NumElements == 8)  return MVT::nxv8f16;
-          break;
-        case MVT::f32:
-          if (NumElements == 1)  return MVT::nxv1f32;
-          if (NumElements == 2)  return MVT::nxv2f32;
-          if (NumElements == 4)  return MVT::nxv4f32;
-          if (NumElements == 8)  return MVT::nxv8f32;
-          if (NumElements == 16) return MVT::nxv16f32;
-          break;
-        case MVT::f64:
-          if (NumElements == 1)  return MVT::nxv1f64;
-          if (NumElements == 2)  return MVT::nxv2f64;
-          if (NumElements == 4)  return MVT::nxv4f64;
-          if (NumElements == 8)  return MVT::nxv8f64;
-          break;
-      }
-      return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
-    }
-
-    static MVT getVectorVT(MVT VT, unsigned NumElements, bool IsScalable) {
-      if (IsScalable)
-        return getScalableVectorVT(VT, NumElements);
-      return getVectorVT(VT, NumElements);
-    }
-
-    static MVT getVectorVT(MVT VT, MVT::ElementCount EC) {
-      if (EC.Scalable)
-        return getScalableVectorVT(VT, EC.Min);
-      return getVectorVT(VT, EC.Min);
-    }
-
-    /// Return the value type corresponding to the specified type.  This returns
-    /// all pointers as iPTR.  If HandleUnknown is true, unknown types are
-    /// returned as Other, otherwise they are invalid.
-    static MVT getVT(Type *Ty, bool HandleUnknown = false);
-
-  private:
-    /// A simple iterator over the MVT::SimpleValueType enum.
-    struct mvt_iterator {
-      SimpleValueType VT;
-
-      mvt_iterator(SimpleValueType VT) : VT(VT) {}
-
-      MVT operator*() const { return VT; }
-      bool operator!=(const mvt_iterator &LHS) const { return VT != LHS.VT; }
-
-      mvt_iterator& operator++() {
-        VT = (MVT::SimpleValueType)((int)VT + 1);
-        assert((int)VT <= MVT::MAX_ALLOWED_VALUETYPE &&
-               "MVT iterator overflowed.");
-        return *this;
-      }
-    };
-
-    /// A range of the MVT::SimpleValueType enum.
-    using mvt_range = iterator_range<mvt_iterator>;
-
-  public:
-    /// SimpleValueType Iteration
-    /// @{
-    static mvt_range all_valuetypes() {
-      return mvt_range(MVT::FIRST_VALUETYPE, MVT::LAST_VALUETYPE);
-    }
-
-    static mvt_range integer_valuetypes() {
-      return mvt_range(MVT::FIRST_INTEGER_VALUETYPE,
-                       (MVT::SimpleValueType)(MVT::LAST_INTEGER_VALUETYPE + 1));
-    }
-
-    static mvt_range fp_valuetypes() {
-      return mvt_range(MVT::FIRST_FP_VALUETYPE,
-                       (MVT::SimpleValueType)(MVT::LAST_FP_VALUETYPE + 1));
-    }
-
-    static mvt_range vector_valuetypes() {
-      return mvt_range(MVT::FIRST_VECTOR_VALUETYPE,
-                       (MVT::SimpleValueType)(MVT::LAST_VECTOR_VALUETYPE + 1));
-    }
-
-    static mvt_range integer_vector_valuetypes() {
-      return mvt_range(
-          MVT::FIRST_INTEGER_VECTOR_VALUETYPE,
-          (MVT::SimpleValueType)(MVT::LAST_INTEGER_VECTOR_VALUETYPE + 1));
-    }
-
-    static mvt_range fp_vector_valuetypes() {
-      return mvt_range(
-          MVT::FIRST_FP_VECTOR_VALUETYPE,
-          (MVT::SimpleValueType)(MVT::LAST_FP_VECTOR_VALUETYPE + 1));
-    }
-
-    static mvt_range integer_scalable_vector_valuetypes() {
-      return mvt_range(MVT::FIRST_INTEGER_SCALABLE_VALUETYPE,
-              (MVT::SimpleValueType)(MVT::LAST_INTEGER_SCALABLE_VALUETYPE + 1));
-    }
-
-    static mvt_range fp_scalable_vector_valuetypes() {
-      return mvt_range(MVT::FIRST_FP_SCALABLE_VALUETYPE,
-                   (MVT::SimpleValueType)(MVT::LAST_FP_SCALABLE_VALUETYPE + 1));
-    }
-    /// @}
-  };
-
-} // end namespace llvm
-
-#endif // LLVM_CODEGEN_MACHINEVALUETYPE_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/CVDebugRecord.h b/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/CVDebugRecord.h
deleted file mode 100644
index 5a0bb4266ba2..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/CVDebugRecord.h
+++ /dev/null
@@ -1,55 +0,0 @@
-//===- CVDebugRecord.h ------------------------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_DEBUGINFO_CODEVIEW_CVDEBUGRECORD_H
-#define LLVM_DEBUGINFO_CODEVIEW_CVDEBUGRECORD_H
-
-#include "llvm/Support/Endian.h"
-
-namespace llvm {
-namespace OMF {
-struct Signature {
-  enum ID : uint32_t {
-    PDB70 = 0x53445352, // RSDS
-    PDB20 = 0x3031424e, // NB10
-    CV50 = 0x3131424e,  // NB11
-    CV41 = 0x3930424e,  // NB09
-  };
-
-  support::ulittle32_t CVSignature;
-  support::ulittle32_t Offset;
-};
-}
-
-namespace codeview {
-struct PDB70DebugInfo {
-  support::ulittle32_t CVSignature;
-  uint8_t Signature[16];
-  support::ulittle32_t Age;
-  // char PDBFileName[];
-};
-
-struct PDB20DebugInfo {
-  support::ulittle32_t CVSignature;
-  support::ulittle32_t Offset;
-  support::ulittle32_t Signature;
-  support::ulittle32_t Age;
-  // char PDBFileName[];
-};
-
-union DebugInfo {
-  struct OMF::Signature Signature;
-  struct PDB20DebugInfo PDB20;
-  struct PDB70DebugInfo PDB70;
-};
-}
-}
-
-#endif
-
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeName.h b/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeName.h
deleted file mode 100644
index a987b4afd283..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeName.h
+++ /dev/null
@@ -1,22 +0,0 @@
-//===- TypeName.h --------------------------------------------- *- C++ --*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPENAME_H
-#define LLVM_DEBUGINFO_CODEVIEW_TYPENAME_H
-
-#include "llvm/DebugInfo/CodeView/TypeCollection.h"
-#include "llvm/DebugInfo/CodeView/TypeIndex.h"
-
-namespace llvm {
-namespace codeview {
-std::string computeTypeName(TypeCollection &Types, TypeIndex Index);
-}
-} // namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeRecordBuilder.h b/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeRecordBuilder.h
deleted file mode 100644
index 5a6507ee7f5b..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeRecordBuilder.h
+++ /dev/null
@@ -1,78 +0,0 @@
-//===- TypeRecordBuilder.h --------------------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPERECORDBUILDER_H
-#define LLVM_DEBUGINFO_CODEVIEW_TYPERECORDBUILDER_H
-
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/DebugInfo/CodeView/CodeView.h"
-#include "llvm/DebugInfo/CodeView/TypeIndex.h"
-#include "llvm/DebugInfo/CodeView/TypeRecord.h"
-#include "llvm/Support/EndianStream.h"
-#include "llvm/Support/raw_ostream.h"
-
-namespace llvm {
-namespace codeview {
-
-class TypeRecordBuilder {
-private:
-  TypeRecordBuilder(const TypeRecordBuilder &) = delete;
-  TypeRecordBuilder &operator=(const TypeRecordBuilder &) = delete;
-
-public:
-  explicit TypeRecordBuilder(TypeRecordKind Kind);
-
-  void writeUInt8(uint8_t Value);
-  void writeInt16(int16_t Value);
-  void writeUInt16(uint16_t Value);
-  void writeInt32(int32_t Value);
-  void writeUInt32(uint32_t Value);
-  void writeInt64(int64_t Value);
-  void writeUInt64(uint64_t Value);
-  void writeTypeIndex(TypeIndex TypeInd);
-  void writeTypeRecordKind(TypeRecordKind Kind);
-  void writeEncodedInteger(int64_t Value);
-  void writeEncodedSignedInteger(int64_t Value);
-  void writeEncodedUnsignedInteger(uint64_t Value);
-  void writeNullTerminatedString(StringRef Value);
-  void writeGuid(StringRef Guid);
-  void writeBytes(StringRef Value) { Stream << Value; }
-
-  llvm::StringRef str();
-
-  uint64_t size() const { return Stream.tell(); }
-  TypeRecordKind kind() const { return Kind; }
-
-  /// Returns the number of bytes remaining before this record is larger than
-  /// the maximum record length. Accounts for the extra two byte size field in
-  /// the header.
-  size_t maxBytesRemaining() const { return MaxRecordLength - size() - 2; }
-
-  void truncate(uint64_t Size) {
-    // This works because raw_svector_ostream is not buffered.
-    assert(Size < Buffer.size());
-    Buffer.resize(Size);
-  }
-
-  void reset(TypeRecordKind K) {
-    Buffer.clear();
-    Kind = K;
-    writeTypeRecordKind(K);
-  }
-
-private:
-  TypeRecordKind Kind;
-  llvm::SmallVector<char, 256> Buffer;
-  llvm::raw_svector_ostream Stream;
-  llvm::support::endian::Writer<llvm::support::endianness::little> Writer;
-};
-}
-}
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeSerializer.h b/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeSerializer.h
deleted file mode 100644
index 0e734a8170bd..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeSerializer.h
+++ /dev/null
@@ -1,159 +0,0 @@
-//===- TypeSerializer.h -----------------------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPESERIALIZER_H
-#define LLVM_DEBUGINFO_CODEVIEW_TYPESERIALIZER_H
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/Optional.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/DebugInfo/CodeView/CodeView.h"
-#include "llvm/DebugInfo/CodeView/RecordSerialization.h"
-#include "llvm/DebugInfo/CodeView/TypeIndex.h"
-#include "llvm/DebugInfo/CodeView/TypeRecord.h"
-#include "llvm/DebugInfo/CodeView/TypeRecordMapping.h"
-#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"
-#include "llvm/Support/Allocator.h"
-#include "llvm/Support/BinaryByteStream.h"
-#include "llvm/Support/BinaryStreamWriter.h"
-#include "llvm/Support/Error.h"
-#include <cassert>
-#include <cstdint>
-#include <memory>
-#include <vector>
-
-namespace llvm {
-namespace codeview {
-
-class TypeHasher;
-
-class TypeSerializer : public TypeVisitorCallbacks {
-  struct SubRecord {
-    SubRecord(TypeLeafKind K, uint32_t S) : Kind(K), Size(S) {}
-
-    TypeLeafKind Kind;
-    uint32_t Size = 0;
-  };
-  struct RecordSegment {
-    SmallVector<SubRecord, 16> SubRecords;
-
-    uint32_t length() const {
-      uint32_t L = sizeof(RecordPrefix);
-      for (const auto &R : SubRecords) {
-        L += R.Size;
-      }
-      return L;
-    }
-  };
-
-  using MutableRecordList = SmallVector<MutableArrayRef<uint8_t>, 2>;
-
-  static constexpr uint8_t ContinuationLength = 8;
-  BumpPtrAllocator &RecordStorage;
-  RecordSegment CurrentSegment;
-  MutableRecordList FieldListSegments;
-
-  Optional<TypeLeafKind> TypeKind;
-  Optional<TypeLeafKind> MemberKind;
-  std::vector<uint8_t> RecordBuffer;
-  MutableBinaryByteStream Stream;
-  BinaryStreamWriter Writer;
-  TypeRecordMapping Mapping;
-
-  /// Private type record hashing implementation details are handled here.
-  std::unique_ptr<TypeHasher> Hasher;
-
-  /// Contains a list of all records indexed by TypeIndex.toArrayIndex().
-  SmallVector<ArrayRef<uint8_t>, 2> SeenRecords;
-
-  /// Temporary storage that we use to copy a record's data while re-writing
-  /// its type indices.
-  SmallVector<uint8_t, 256> RemapStorage;
-
-  TypeIndex nextTypeIndex() const;
-
-  bool isInFieldList() const;
-  MutableArrayRef<uint8_t> getCurrentSubRecordData();
-  MutableArrayRef<uint8_t> getCurrentRecordData();
-  Error writeRecordPrefix(TypeLeafKind Kind);
-
-  Expected<MutableArrayRef<uint8_t>>
-  addPadding(MutableArrayRef<uint8_t> Record);
-
-public:
-  explicit TypeSerializer(BumpPtrAllocator &Storage, bool Hash = true);
-  ~TypeSerializer() override;
-
-  void reset();
-
-  BumpPtrAllocator &getAllocator() { return RecordStorage; }
-
-  ArrayRef<ArrayRef<uint8_t>> records() const;
-  TypeIndex insertRecordBytes(ArrayRef<uint8_t> &Record);
-  TypeIndex insertRecord(const RemappedType &Record);
-  Expected<TypeIndex> visitTypeEndGetIndex(CVType &Record);
-
-  using TypeVisitorCallbacks::visitTypeBegin;
-  Error visitTypeBegin(CVType &Record) override;
-  Error visitTypeEnd(CVType &Record) override;
-  Error visitMemberBegin(CVMemberRecord &Record) override;
-  Error visitMemberEnd(CVMemberRecord &Record) override;
-
-#define TYPE_RECORD(EnumName, EnumVal, Name)                                   \
-  virtual Error visitKnownRecord(CVType &CVR, Name##Record &Record) override { \
-    return visitKnownRecordImpl(CVR, Record);                                  \
-  }
-#define TYPE_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
-#define MEMBER_RECORD(EnumName, EnumVal, Name)                                 \
-  Error visitKnownMember(CVMemberRecord &CVR, Name##Record &Record) override { \
-    return visitKnownMemberImpl<Name##Record>(CVR, Record);                    \
-  }
-#define MEMBER_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
-#include "llvm/DebugInfo/CodeView/CodeViewTypes.def"
-
-private:
-  template <typename RecordKind>
-  Error visitKnownRecordImpl(CVType &CVR, RecordKind &Record) {
-    return Mapping.visitKnownRecord(CVR, Record);
-  }
-
-  template <typename RecordType>
-  Error visitKnownMemberImpl(CVMemberRecord &CVR, RecordType &Record) {
-    assert(CVR.Kind == static_cast<TypeLeafKind>(Record.getKind()));
-
-    if (auto EC = Writer.writeEnum(CVR.Kind))
-      return EC;
-
-    if (auto EC = Mapping.visitKnownMember(CVR, Record))
-      return EC;
-
-    // Get all the data that was just written and is yet to be committed to
-    // the current segment.  Then pad it to 4 bytes.
-    MutableArrayRef<uint8_t> ThisRecord = getCurrentSubRecordData();
-    auto ExpectedRecord = addPadding(ThisRecord);
-    if (!ExpectedRecord)
-      return ExpectedRecord.takeError();
-    ThisRecord = *ExpectedRecord;
-
-    CurrentSegment.SubRecords.emplace_back(CVR.Kind, ThisRecord.size());
-    CVR.Data = ThisRecord;
-
-    // Both the last subrecord and the total length of this segment should be
-    // multiples of 4.
-    assert(ThisRecord.size() % 4 == 0);
-    assert(CurrentSegment.length() % 4 == 0);
-
-    return Error::success();
-  }
-};
-
-} // end namespace codeview
-} // end namespace llvm
-
-#endif // LLVM_DEBUGINFO_CODEVIEW_TYPESERIALIZER_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeTableBuilder.h b/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeTableBuilder.h
deleted file mode 100644
index 1069dcd45334..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/TypeTableBuilder.h
+++ /dev/null
@@ -1,137 +0,0 @@
-//===- TypeTableBuilder.h ---------------------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPETABLEBUILDER_H
-#define LLVM_DEBUGINFO_CODEVIEW_TYPETABLEBUILDER_H
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/DebugInfo/CodeView/CodeView.h"
-#include "llvm/DebugInfo/CodeView/TypeIndex.h"
-#include "llvm/DebugInfo/CodeView/TypeRecord.h"
-#include "llvm/DebugInfo/CodeView/TypeSerializer.h"
-#include "llvm/Support/Allocator.h"
-#include "llvm/Support/Error.h"
-#include <algorithm>
-#include <cassert>
-#include <cstdint>
-#include <type_traits>
-
-namespace llvm {
-namespace codeview {
-
-class TypeTableBuilder {
-private:
-  TypeIndex handleError(Error EC) const {
-    assert(false && "Couldn't write Type!");
-    consumeError(std::move(EC));
-    return TypeIndex();
-  }
-
-  BumpPtrAllocator &Allocator;
-  TypeSerializer Serializer;
-
-public:
-  explicit TypeTableBuilder(BumpPtrAllocator &Allocator,
-                            bool WriteUnique = true)
-      : Allocator(Allocator), Serializer(Allocator, WriteUnique) {}
-  TypeTableBuilder(const TypeTableBuilder &) = delete;
-  TypeTableBuilder &operator=(const TypeTableBuilder &) = delete;
-
-  bool empty() const { return Serializer.records().empty(); }
-
-  BumpPtrAllocator &getAllocator() const { return Allocator; }
-
-  template <typename T> TypeIndex writeKnownType(T &Record) {
-    static_assert(!std::is_same<T, FieldListRecord>::value,
-                  "Can't serialize FieldList!");
-
-    CVType Type;
-    Type.Type = static_cast<TypeLeafKind>(Record.getKind());
-    if (auto EC = Serializer.visitTypeBegin(Type))
-      return handleError(std::move(EC));
-    if (auto EC = Serializer.visitKnownRecord(Type, Record))
-      return handleError(std::move(EC));
-
-    auto ExpectedIndex = Serializer.visitTypeEndGetIndex(Type);
-    if (!ExpectedIndex)
-      return handleError(ExpectedIndex.takeError());
-
-    return *ExpectedIndex;
-  }
-
-  TypeIndex writeSerializedRecord(ArrayRef<uint8_t> Record) {
-    return Serializer.insertRecordBytes(Record);
-  }
-
-  TypeIndex writeSerializedRecord(const RemappedType &Record) {
-    return Serializer.insertRecord(Record);
-  }
-
-  template <typename TFunc> void ForEachRecord(TFunc Func) {
-    uint32_t Index = TypeIndex::FirstNonSimpleIndex;
-
-    for (auto Record : Serializer.records()) {
-      Func(TypeIndex(Index), Record);
-      ++Index;
-    }
-  }
-
-  ArrayRef<ArrayRef<uint8_t>> records() const { return Serializer.records(); }
-};
-
-class FieldListRecordBuilder {
-  TypeTableBuilder &TypeTable;
-  BumpPtrAllocator Allocator;
-  TypeSerializer TempSerializer;
-  CVType Type;
-
-public:
-  explicit FieldListRecordBuilder(TypeTableBuilder &TypeTable)
-      : TypeTable(TypeTable), TempSerializer(Allocator, false) {
-    Type.Type = TypeLeafKind::LF_FIELDLIST;
-  }
-
-  void begin() {
-    TempSerializer.reset();
-
-    if (auto EC = TempSerializer.visitTypeBegin(Type))
-      consumeError(std::move(EC));
-  }
-
-  template <typename T> void writeMemberType(T &Record) {
-    CVMemberRecord CVMR;
-    CVMR.Kind = static_cast<TypeLeafKind>(Record.getKind());
-    if (auto EC = TempSerializer.visitMemberBegin(CVMR))
-      consumeError(std::move(EC));
-    if (auto EC = TempSerializer.visitKnownMember(CVMR, Record))
-      consumeError(std::move(EC));
-    if (auto EC = TempSerializer.visitMemberEnd(CVMR))
-      consumeError(std::move(EC));
-  }
-
-  TypeIndex end(bool Write) {
-    TypeIndex Index;
-    if (auto EC = TempSerializer.visitTypeEnd(Type)) {
-      consumeError(std::move(EC));
-      return TypeIndex();
-    }
-
-    if (Write) {
-      for (auto Record : TempSerializer.records())
-        Index = TypeTable.writeSerializedRecord(Record);
-    }
-
-    return Index;
-  }
-};
-
-} // end namespace codeview
-} // end namespace llvm
-
-#endif // LLVM_DEBUGINFO_CODEVIEW_TYPETABLEBUILDER_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/MSF/MSFStreamLayout.h b/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/MSF/MSFStreamLayout.h
deleted file mode 100644
index bdde98f52662..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/MSF/MSFStreamLayout.h
+++ /dev/null
@@ -1,35 +0,0 @@
-//===- MSFStreamLayout.h - Describes the layout of a stream -----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_DEBUGINFO_MSF_MSFSTREAMLAYOUT_H
-#define LLVM_DEBUGINFO_MSF_MSFSTREAMLAYOUT_H
-
-#include "llvm/Support/Endian.h"
-
-#include <cstdint>
-#include <vector>
-
-namespace llvm {
-namespace msf {
-
-/// \brief Describes the layout of a stream in an MSF layout.  A "stream" here
-/// is defined as any logical unit of data which may be arranged inside the MSF
-/// file as a sequence of (possibly discontiguous) blocks.  When we want to read
-/// from a particular MSF Stream, we fill out a stream layout structure and the
-/// reader uses it to determine which blocks in the underlying MSF file contain
-/// the data, so that it can be pieced together in the right order.
-class MSFStreamLayout {
-public:
-  uint32_t Length;
-  std::vector<support::ulittle32_t> Blocks;
-};
-} // namespace msf
-} // namespace llvm
-
-#endif // LLVM_DEBUGINFO_MSF_MSFSTREAMLAYOUT_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/PDB/Native/PublicsStreamBuilder.h b/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/PDB/Native/PublicsStreamBuilder.h
deleted file mode 100644
index 5ab57ebef53d..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/DebugInfo/PDB/Native/PublicsStreamBuilder.h
+++ /dev/null
@@ -1,54 +0,0 @@
-//===- PublicsStreamBuilder.h - PDB Publics Stream Creation -----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_DEBUGINFO_PDB_RAW_PDBPUBLICSTREAMBUILDER_H
-#define LLVM_DEBUGINFO_PDB_RAW_PDBPUBLICSTREAMBUILDER_H
-
-#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
-#include "llvm/DebugInfo/PDB/Native/RawTypes.h"
-#include "llvm/Support/BinaryByteStream.h"
-#include "llvm/Support/BinaryStreamRef.h"
-#include "llvm/Support/BinaryStreamWriter.h"
-#include "llvm/Support/Endian.h"
-#include "llvm/Support/Error.h"
-
-namespace llvm {
-namespace msf {
-class MSFBuilder;
-}
-namespace pdb {
-class PublicsStream;
-struct PublicsStreamHeader;
-
-class PublicsStreamBuilder {
-public:
-  explicit PublicsStreamBuilder(msf::MSFBuilder &Msf);
-  ~PublicsStreamBuilder();
-
-  PublicsStreamBuilder(const PublicsStreamBuilder &) = delete;
-  PublicsStreamBuilder &operator=(const PublicsStreamBuilder &) = delete;
-
-  Error finalizeMsfLayout();
-  uint32_t calculateSerializedLength() const;
-
-  Error commit(BinaryStreamWriter &PublicsWriter);
-
-  uint32_t getStreamIndex() const { return StreamIdx; }
-  uint32_t getRecordStreamIdx() const { return RecordStreamIdx; }
-
-private:
-  uint32_t StreamIdx = kInvalidStreamIndex;
-  uint32_t RecordStreamIdx = kInvalidStreamIndex;
-  std::vector<PSHashRecord> HashRecords;
-  msf::MSFBuilder &Msf;
-};
-} // namespace pdb
-} // namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/ExecutionEngine/ObjectMemoryBuffer.h b/external/bsd/llvm/dist/llvm/include/llvm/ExecutionEngine/ObjectMemoryBuffer.h
deleted file mode 100644
index 0f00ad006a7d..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/ExecutionEngine/ObjectMemoryBuffer.h
+++ /dev/null
@@ -1,63 +0,0 @@
-//===- ObjectMemoryBuffer.h - SmallVector-backed MemoryBuffrer  -*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares a wrapper class to hold the memory into which an
-// object will be generated.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_EXECUTIONENGINE_OBJECTMEMORYBUFFER_H
-#define LLVM_EXECUTIONENGINE_OBJECTMEMORYBUFFER_H
-
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/Support/MemoryBuffer.h"
-#include "llvm/Support/raw_ostream.h"
-
-namespace llvm {
-
-/// \brief SmallVector-backed MemoryBuffer instance.
-///
-/// This class enables efficient construction of MemoryBuffers from SmallVector
-/// instances. This is useful for MCJIT and Orc, where object files are streamed
-/// into SmallVectors, then inspected using ObjectFile (which takes a
-/// MemoryBuffer).
-class ObjectMemoryBuffer : public MemoryBuffer {
-public:
-
-  /// \brief Construct an ObjectMemoryBuffer from the given SmallVector r-value.
-  ///
-  /// FIXME: It'd be nice for this to be a non-templated constructor taking a
-  /// SmallVectorImpl here instead of a templated one taking a SmallVector<N>,
-  /// but SmallVector's move-construction/assignment currently only take
-  /// SmallVectors. If/when that is fixed we can simplify this constructor and
-  /// the following one.
-  ObjectMemoryBuffer(SmallVectorImpl<char> &&SV)
-    : SV(std::move(SV)), BufferName("<in-memory object>") {
-    init(this->SV.begin(), this->SV.end(), false);
-  }
-
-  /// \brief Construct a named ObjectMemoryBuffer from the given SmallVector
-  ///        r-value and StringRef.
-  ObjectMemoryBuffer(SmallVectorImpl<char> &&SV, StringRef Name)
-    : SV(std::move(SV)), BufferName(Name) {
-    init(this->SV.begin(), this->SV.end(), false);
-  }
-
-  StringRef getBufferIdentifier() const override { return BufferName; }
-
-  BufferKind getBufferKind() const override { return MemoryBuffer_Malloc; }
-
-private:
-  SmallVector<char, 0> SV;
-  std::string BufferName;
-};
-
-} // namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h b/external/bsd/llvm/dist/llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
deleted file mode 100644
index 96179be3b8b0..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
+++ /dev/null
@@ -1,80 +0,0 @@
-//===-- MCTargetOptionsCommandFlags.h --------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains machine code-specific flags that are shared between
-// different command line tools.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_MC_MCTARGETOPTIONSCOMMANDFLAGS_H
-#define LLVM_MC_MCTARGETOPTIONSCOMMANDFLAGS_H
-
-#include "llvm/MC/MCTargetOptions.h"
-#include "llvm/Support/CommandLine.h"
-using namespace llvm;
-
-cl::opt<MCTargetOptions::AsmInstrumentation> AsmInstrumentation(
-    "asm-instrumentation", cl::desc("Instrumentation of inline assembly and "
-                                    "assembly source files"),
-    cl::init(MCTargetOptions::AsmInstrumentationNone),
-    cl::values(clEnumValN(MCTargetOptions::AsmInstrumentationNone, "none",
-                          "no instrumentation at all"),
-               clEnumValN(MCTargetOptions::AsmInstrumentationAddress, "address",
-                          "instrument instructions with memory arguments")));
-
-cl::opt<bool> RelaxAll("mc-relax-all",
-                       cl::desc("When used with filetype=obj, "
-                                "relax all fixups in the emitted object file"));
-
-cl::opt<bool> IncrementalLinkerCompatible(
-    "incremental-linker-compatible",
-    cl::desc(
-        "When used with filetype=obj, "
-        "emit an object file which can be used with an incremental linker"));
-
-cl::opt<bool> PIECopyRelocations("pie-copy-relocations", cl::desc("PIE Copy Relocations"));
-
-cl::opt<int> DwarfVersion("dwarf-version", cl::desc("Dwarf version"),
-                          cl::init(0));
-
-cl::opt<bool> ShowMCInst("asm-show-inst",
-                         cl::desc("Emit internal instruction representation to "
-                                  "assembly file"));
-
-cl::opt<bool> FatalWarnings("fatal-warnings",
-                            cl::desc("Treat warnings as errors"));
-
-cl::opt<bool> NoWarn("no-warn", cl::desc("Suppress all warnings"));
-cl::alias NoWarnW("W", cl::desc("Alias for --no-warn"), cl::aliasopt(NoWarn));
-
-cl::opt<bool> NoDeprecatedWarn("no-deprecated-warn",
-                               cl::desc("Suppress all deprecated warnings"));
-
-cl::opt<std::string>
-ABIName("target-abi", cl::Hidden,
-        cl::desc("The name of the ABI to be targeted from the backend."),
-        cl::init(""));
-
-static inline MCTargetOptions InitMCTargetOptionsFromFlags() {
-  MCTargetOptions Options;
-  Options.SanitizeAddress =
-      (AsmInstrumentation == MCTargetOptions::AsmInstrumentationAddress);
-  Options.MCRelaxAll = RelaxAll;
-  Options.MCIncrementalLinkerCompatible = IncrementalLinkerCompatible;
-  Options.MCPIECopyRelocations = PIECopyRelocations;
-  Options.DwarfVersion = DwarfVersion;
-  Options.ShowMCInst = ShowMCInst;
-  Options.ABIName = ABIName;
-  Options.MCFatalWarnings = FatalWarnings;
-  Options.MCNoWarn = NoWarn;
-  Options.MCNoDeprecatedWarn = NoDeprecatedWarn;
-  return Options;
-}
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Support/AMDGPUCodeObjectMetadata.h b/external/bsd/llvm/dist/llvm/include/llvm/Support/AMDGPUCodeObjectMetadata.h
deleted file mode 100644
index d274c5ee9184..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Support/AMDGPUCodeObjectMetadata.h
+++ /dev/null
@@ -1,422 +0,0 @@
-//===--- AMDGPUCodeObjectMetadata.h -----------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// \brief AMDGPU Code Object Metadata definitions and in-memory
-/// representations.
-///
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_SUPPORT_AMDGPUCODEOBJECTMETADATA_H
-#define LLVM_SUPPORT_AMDGPUCODEOBJECTMETADATA_H
-
-#include <cstdint>
-#include <string>
-#include <system_error>
-#include <vector>
-
-namespace llvm {
-namespace AMDGPU {
-
-//===----------------------------------------------------------------------===//
-// Code Object Metadata.
-//===----------------------------------------------------------------------===//
-namespace CodeObject {
-
-/// \brief Code object metadata major version.
-constexpr uint32_t MetadataVersionMajor = 1;
-/// \brief Code object metadata minor version.
-constexpr uint32_t MetadataVersionMinor = 0;
-
-/// \brief Code object metadata beginning assembler directive.
-constexpr char MetadataAssemblerDirectiveBegin[] =
-    ".amdgpu_code_object_metadata";
-/// \brief Code object metadata ending assembler directive.
-constexpr char MetadataAssemblerDirectiveEnd[] =
-    ".end_amdgpu_code_object_metadata";
-
-/// \brief Access qualifiers.
-enum class AccessQualifier : uint8_t {
-  Default   = 0,
-  ReadOnly  = 1,
-  WriteOnly = 2,
-  ReadWrite = 3,
-  Unknown   = 0xff
-};
-
-/// \brief Address space qualifiers.
-enum class AddressSpaceQualifier : uint8_t {
-  Private  = 0,
-  Global   = 1,
-  Constant = 2,
-  Local    = 3,
-  Generic  = 4,
-  Region   = 5,
-  Unknown  = 0xff
-};
-
-/// \brief Value kinds.
-enum class ValueKind : uint8_t {
-  ByValue                = 0,
-  GlobalBuffer           = 1,
-  DynamicSharedPointer   = 2,
-  Sampler                = 3,
-  Image                  = 4,
-  Pipe                   = 5,
-  Queue                  = 6,
-  HiddenGlobalOffsetX    = 7,
-  HiddenGlobalOffsetY    = 8,
-  HiddenGlobalOffsetZ    = 9,
-  HiddenNone             = 10,
-  HiddenPrintfBuffer     = 11,
-  HiddenDefaultQueue     = 12,
-  HiddenCompletionAction = 13,
-  Unknown                = 0xff
-};
-
-/// \brief Value types.
-enum class ValueType : uint8_t {
-  Struct  = 0,
-  I8      = 1,
-  U8      = 2,
-  I16     = 3,
-  U16     = 4,
-  F16     = 5,
-  I32     = 6,
-  U32     = 7,
-  F32     = 8,
-  I64     = 9,
-  U64     = 10,
-  F64     = 11,
-  Unknown = 0xff
-};
-
-//===----------------------------------------------------------------------===//
-// Kernel Metadata.
-//===----------------------------------------------------------------------===//
-namespace Kernel {
-
-//===----------------------------------------------------------------------===//
-// Kernel Attributes Metadata.
-//===----------------------------------------------------------------------===//
-namespace Attrs {
-
-namespace Key {
-/// \brief Key for Kernel::Attr::Metadata::mReqdWorkGroupSize.
-constexpr char ReqdWorkGroupSize[] = "ReqdWorkGroupSize";
-/// \brief Key for Kernel::Attr::Metadata::mWorkGroupSizeHint.
-constexpr char WorkGroupSizeHint[] = "WorkGroupSizeHint";
-/// \brief Key for Kernel::Attr::Metadata::mVecTypeHint.
-constexpr char VecTypeHint[] = "VecTypeHint";
-} // end namespace Key
-
-/// \brief In-memory representation of kernel attributes metadata.
-struct Metadata final {
-  /// \brief 'reqd_work_group_size' attribute. Optional.
-  std::vector<uint32_t> mReqdWorkGroupSize = std::vector<uint32_t>();
-  /// \brief 'work_group_size_hint' attribute. Optional.
-  std::vector<uint32_t> mWorkGroupSizeHint = std::vector<uint32_t>();
-  /// \brief 'vec_type_hint' attribute. Optional.
-  std::string mVecTypeHint = std::string();
-
-  /// \brief Default constructor.
-  Metadata() = default;
-
-  /// \returns True if kernel attributes metadata is empty, false otherwise.
-  bool empty() const {
-    return mReqdWorkGroupSize.empty() &&
-           mWorkGroupSizeHint.empty() &&
-           mVecTypeHint.empty();
-  }
-
-  /// \returns True if kernel attributes metadata is not empty, false otherwise.
-  bool notEmpty() const {
-    return !empty();
-  }
-};
-
-} // end namespace Attrs
-
-//===----------------------------------------------------------------------===//
-// Kernel Argument Metadata.
-//===----------------------------------------------------------------------===//
-namespace Arg {
-
-namespace Key {
-/// \brief Key for Kernel::Arg::Metadata::mSize.
-constexpr char Size[] = "Size";
-/// \brief Key for Kernel::Arg::Metadata::mAlign.
-constexpr char Align[] = "Align";
-/// \brief Key for Kernel::Arg::Metadata::mValueKind.
-constexpr char ValueKind[] = "ValueKind";
-/// \brief Key for Kernel::Arg::Metadata::mValueType.
-constexpr char ValueType[] = "ValueType";
-/// \brief Key for Kernel::Arg::Metadata::mPointeeAlign.
-constexpr char PointeeAlign[] = "PointeeAlign";
-/// \brief Key for Kernel::Arg::Metadata::mAccQual.
-constexpr char AccQual[] = "AccQual";
-/// \brief Key for Kernel::Arg::Metadata::mAddrSpaceQual.
-constexpr char AddrSpaceQual[] = "AddrSpaceQual";
-/// \brief Key for Kernel::Arg::Metadata::mIsConst.
-constexpr char IsConst[] = "IsConst";
-/// \brief Key for Kernel::Arg::Metadata::mIsPipe.
-constexpr char IsPipe[] = "IsPipe";
-/// \brief Key for Kernel::Arg::Metadata::mIsRestrict.
-constexpr char IsRestrict[] = "IsRestrict";
-/// \brief Key for Kernel::Arg::Metadata::mIsVolatile.
-constexpr char IsVolatile[] = "IsVolatile";
-/// \brief Key for Kernel::Arg::Metadata::mName.
-constexpr char Name[] = "Name";
-/// \brief Key for Kernel::Arg::Metadata::mTypeName.
-constexpr char TypeName[] = "TypeName";
-} // end namespace Key
-
-/// \brief In-memory representation of kernel argument metadata.
-struct Metadata final {
-  /// \brief Size in bytes. Required.
-  uint32_t mSize = 0;
-  /// \brief Alignment in bytes. Required.
-  uint32_t mAlign = 0;
-  /// \brief Value kind. Required.
-  ValueKind mValueKind = ValueKind::Unknown;
-  /// \brief Value type. Required.
-  ValueType mValueType = ValueType::Unknown;
-  /// \brief Pointee alignment in bytes. Optional.
-  uint32_t mPointeeAlign = 0;
-  /// \brief Access qualifier. Optional.
-  AccessQualifier mAccQual = AccessQualifier::Unknown;
-  /// \brief Address space qualifier. Optional.
-  AddressSpaceQualifier mAddrSpaceQual = AddressSpaceQualifier::Unknown;
-  /// \brief True if 'const' qualifier is specified. Optional.
-  bool mIsConst = false;
-  /// \brief True if 'pipe' qualifier is specified. Optional.
-  bool mIsPipe = false;
-  /// \brief True if 'restrict' qualifier is specified. Optional.
-  bool mIsRestrict = false;
-  /// \brief True if 'volatile' qualifier is specified. Optional.
-  bool mIsVolatile = false;
-  /// \brief Name. Optional.
-  std::string mName = std::string();
-  /// \brief Type name. Optional.
-  std::string mTypeName = std::string();
-
-  /// \brief Default constructor.
-  Metadata() = default;
-};
-
-} // end namespace Arg
-
-//===----------------------------------------------------------------------===//
-// Kernel Code Properties Metadata.
-//===----------------------------------------------------------------------===//
-namespace CodeProps {
-
-namespace Key {
-/// \brief Key for Kernel::CodeProps::Metadata::mKernargSegmentSize.
-constexpr char KernargSegmentSize[] = "KernargSegmentSize";
-/// \brief Key for Kernel::CodeProps::Metadata::mWorkgroupGroupSegmentSize.
-constexpr char WorkgroupGroupSegmentSize[] = "WorkgroupGroupSegmentSize";
-/// \brief Key for Kernel::CodeProps::Metadata::mWorkitemPrivateSegmentSize.
-constexpr char WorkitemPrivateSegmentSize[] = "WorkitemPrivateSegmentSize";
-/// \brief Key for Kernel::CodeProps::Metadata::mWavefrontNumSGPRs.
-constexpr char WavefrontNumSGPRs[] = "WavefrontNumSGPRs";
-/// \brief Key for Kernel::CodeProps::Metadata::mWorkitemNumVGPRs.
-constexpr char WorkitemNumVGPRs[] = "WorkitemNumVGPRs";
-/// \brief Key for Kernel::CodeProps::Metadata::mKernargSegmentAlign.
-constexpr char KernargSegmentAlign[] = "KernargSegmentAlign";
-/// \brief Key for Kernel::CodeProps::Metadata::mGroupSegmentAlign.
-constexpr char GroupSegmentAlign[] = "GroupSegmentAlign";
-/// \brief Key for Kernel::CodeProps::Metadata::mPrivateSegmentAlign.
-constexpr char PrivateSegmentAlign[] = "PrivateSegmentAlign";
-/// \brief Key for Kernel::CodeProps::Metadata::mWavefrontSize.
-constexpr char WavefrontSize[] = "WavefrontSize";
-} // end namespace Key
-
-/// \brief In-memory representation of kernel code properties metadata.
-struct Metadata final {
-  /// \brief Size in bytes of the kernarg segment memory. Kernarg segment memory
-  /// holds the values of the arguments to the kernel. Optional.
-  uint64_t mKernargSegmentSize = 0;
-  /// \brief Size in bytes of the group segment memory required by a workgroup.
-  /// This value does not include any dynamically allocated group segment memory
-  /// that may be added when the kernel is dispatched. Optional.
-  uint32_t mWorkgroupGroupSegmentSize = 0;
-  /// \brief Size in bytes of the private segment memory required by a workitem.
-  /// Private segment memory includes arg, spill and private segments. Optional.
-  uint32_t mWorkitemPrivateSegmentSize = 0;
-  /// \brief Total number of SGPRs used by a wavefront. Optional.
-  uint16_t mWavefrontNumSGPRs = 0;
-  /// \brief Total number of VGPRs used by a workitem. Optional.
-  uint16_t mWorkitemNumVGPRs = 0;
-  /// \brief Maximum byte alignment of variables used by the kernel in the
-  /// kernarg memory segment. Expressed as a power of two. Optional.
-  uint8_t mKernargSegmentAlign = 0;
-  /// \brief Maximum byte alignment of variables used by the kernel in the
-  /// group memory segment. Expressed as a power of two. Optional.
-  uint8_t mGroupSegmentAlign = 0;
-  /// \brief Maximum byte alignment of variables used by the kernel in the
-  /// private memory segment. Expressed as a power of two. Optional.
-  uint8_t mPrivateSegmentAlign = 0;
-  /// \brief Wavefront size. Expressed as a power of two. Optional.
-  uint8_t mWavefrontSize = 0;
-
-  /// \brief Default constructor.
-  Metadata() = default;
-
-  /// \returns True if kernel code properties metadata is empty, false
-  /// otherwise.
-  bool empty() const {
-    return !notEmpty();
-  }
-
-  /// \returns True if kernel code properties metadata is not empty, false
-  /// otherwise.
-  bool notEmpty() const {
-    return mKernargSegmentSize || mWorkgroupGroupSegmentSize ||
-           mWorkitemPrivateSegmentSize || mWavefrontNumSGPRs ||
-           mWorkitemNumVGPRs || mKernargSegmentAlign || mGroupSegmentAlign ||
-           mPrivateSegmentAlign || mWavefrontSize;
-  }
-};
-
-} // end namespace CodeProps
-
-//===----------------------------------------------------------------------===//
-// Kernel Debug Properties Metadata.
-//===----------------------------------------------------------------------===//
-namespace DebugProps {
-
-namespace Key {
-/// \brief Key for Kernel::DebugProps::Metadata::mDebuggerABIVersion.
-constexpr char DebuggerABIVersion[] = "DebuggerABIVersion";
-/// \brief Key for Kernel::DebugProps::Metadata::mReservedNumVGPRs.
-constexpr char ReservedNumVGPRs[] = "ReservedNumVGPRs";
-/// \brief Key for Kernel::DebugProps::Metadata::mReservedFirstVGPR.
-constexpr char ReservedFirstVGPR[] = "ReservedFirstVGPR";
-/// \brief Key for Kernel::DebugProps::Metadata::mPrivateSegmentBufferSGPR.
-constexpr char PrivateSegmentBufferSGPR[] = "PrivateSegmentBufferSGPR";
-/// \brief Key for
-///     Kernel::DebugProps::Metadata::mWavefrontPrivateSegmentOffsetSGPR.
-constexpr char WavefrontPrivateSegmentOffsetSGPR[] =
-    "WavefrontPrivateSegmentOffsetSGPR";
-} // end namespace Key
-
-/// \brief In-memory representation of kernel debug properties metadata.
-struct Metadata final {
-  /// \brief Debugger ABI version. Optional.
-  std::vector<uint32_t> mDebuggerABIVersion = std::vector<uint32_t>();
-  /// \brief Consecutive number of VGPRs reserved for debugger use. Must be 0 if
-  /// mDebuggerABIVersion is not set. Optional.
-  uint16_t mReservedNumVGPRs = 0;
-  /// \brief First fixed VGPR reserved. Must be uint16_t(-1) if
-  /// mDebuggerABIVersion is not set or mReservedFirstVGPR is 0. Optional.
-  uint16_t mReservedFirstVGPR = uint16_t(-1);
-  /// \brief Fixed SGPR of the first of 4 SGPRs used to hold the scratch V# used
-  /// for the entire kernel execution. Must be uint16_t(-1) if
-  /// mDebuggerABIVersion is not set or SGPR not used or not known. Optional.
-  uint16_t mPrivateSegmentBufferSGPR = uint16_t(-1);
-  /// \brief Fixed SGPR used to hold the wave scratch offset for the entire
-  /// kernel execution. Must be uint16_t(-1) if mDebuggerABIVersion is not set
-  /// or SGPR is not used or not known. Optional.
-  uint16_t mWavefrontPrivateSegmentOffsetSGPR = uint16_t(-1);
-
-  /// \brief Default constructor.
-  Metadata() = default;
-
-  /// \returns True if kernel debug properties metadata is empty, false
-  /// otherwise.
-  bool empty() const {
-    return !notEmpty();
-  }
-
-  /// \returns True if kernel debug properties metadata is not empty, false
-  /// otherwise.
-  bool notEmpty() const {
-    return !mDebuggerABIVersion.empty();
-  }
-};
-
-} // end namespace DebugProps
-
-namespace Key {
-/// \brief Key for Kernel::Metadata::mName.
-constexpr char Name[] = "Name";
-/// \brief Key for Kernel::Metadata::mLanguage.
-constexpr char Language[] = "Language";
-/// \brief Key for Kernel::Metadata::mLanguageVersion.
-constexpr char LanguageVersion[] = "LanguageVersion";
-/// \brief Key for Kernel::Metadata::mAttrs.
-constexpr char Attrs[] = "Attrs";
-/// \brief Key for Kernel::Metadata::mArgs.
-constexpr char Args[] = "Args";
-/// \brief Key for Kernel::Metadata::mCodeProps.
-constexpr char CodeProps[] = "CodeProps";
-/// \brief Key for Kernel::Metadata::mDebugProps.
-constexpr char DebugProps[] = "DebugProps";
-} // end namespace Key
-
-/// \brief In-memory representation of kernel metadata.
-struct Metadata final {
-  /// \brief Name. Required.
-  std::string mName = std::string();
-  /// \brief Language. Optional.
-  std::string mLanguage = std::string();
-  /// \brief Language version. Optional.
-  std::vector<uint32_t> mLanguageVersion = std::vector<uint32_t>();
-  /// \brief Attributes metadata. Optional.
-  Attrs::Metadata mAttrs = Attrs::Metadata();
-  /// \brief Arguments metadata. Optional.
-  std::vector<Arg::Metadata> mArgs = std::vector<Arg::Metadata>();
-  /// \brief Code properties metadata. Optional.
-  CodeProps::Metadata mCodeProps = CodeProps::Metadata();
-  /// \brief Debug properties metadata. Optional.
-  DebugProps::Metadata mDebugProps = DebugProps::Metadata();
-
-  /// \brief Default constructor.
-  Metadata() = default;
-};
-
-} // end namespace Kernel
-
-namespace Key {
-/// \brief Key for CodeObject::Metadata::mVersion.
-constexpr char Version[] = "Version";
-/// \brief Key for CodeObject::Metadata::mPrintf.
-constexpr char Printf[] = "Printf";
-/// \brief Key for CodeObject::Metadata::mKernels.
-constexpr char Kernels[] = "Kernels";
-} // end namespace Key
-
-/// \brief In-memory representation of code object metadata.
-struct Metadata final {
-  /// \brief Code object metadata version. Required.
-  std::vector<uint32_t> mVersion = std::vector<uint32_t>();
-  /// \brief Printf metadata. Optional.
-  std::vector<std::string> mPrintf = std::vector<std::string>();
-  /// \brief Kernels metadata. Optional.
-  std::vector<Kernel::Metadata> mKernels = std::vector<Kernel::Metadata>();
-
-  /// \brief Default constructor.
-  Metadata() = default;
-
-  /// \brief Converts \p YamlString to \p CodeObjectMetadata.
-  static std::error_code fromYamlString(std::string YamlString,
-                                        Metadata &CodeObjectMetadata);
-
-  /// \brief Converts \p CodeObjectMetadata to \p YamlString.
-  static std::error_code toYamlString(Metadata CodeObjectMetadata,
-                                      std::string &YamlString);
-};
-
-} // end namespace CodeObject
-} // end namespace AMDGPU
-} // end namespace llvm
-
-#endif // LLVM_SUPPORT_AMDGPUCODEOBJECTMETADATA_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Support/CodeGenCWrappers.h b/external/bsd/llvm/dist/llvm/include/llvm/Support/CodeGenCWrappers.h
deleted file mode 100644
index 6db4433a4350..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Support/CodeGenCWrappers.h
+++ /dev/null
@@ -1,64 +0,0 @@
-//===- llvm/Support/CodeGenCWrappers.h - CodeGen C Wrappers -----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines C bindings wrappers for enums in llvm/Support/CodeGen.h
-// that need them.  The wrappers are separated to avoid adding an indirect
-// dependency on llvm/Config/Targets.def to CodeGen.h.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_SUPPORT_CODEGENCWRAPPERS_H
-#define LLVM_SUPPORT_CODEGENCWRAPPERS_H
-
-#include "llvm-c/TargetMachine.h"
-#include "llvm/Support/CodeGen.h"
-#include "llvm/Support/ErrorHandling.h"
-
-namespace llvm {
-
-inline CodeModel::Model unwrap(LLVMCodeModel Model) {
-  switch (Model) {
-  case LLVMCodeModelDefault:
-    return CodeModel::Default;
-  case LLVMCodeModelJITDefault:
-    return CodeModel::JITDefault;
-  case LLVMCodeModelSmall:
-    return CodeModel::Small;
-  case LLVMCodeModelKernel:
-    return CodeModel::Kernel;
-  case LLVMCodeModelMedium:
-    return CodeModel::Medium;
-  case LLVMCodeModelLarge:
-    return CodeModel::Large;
-  }
-  return CodeModel::Default;
-}
-
-inline LLVMCodeModel wrap(CodeModel::Model Model) {
-  switch (Model) {
-  case CodeModel::Default:
-    return LLVMCodeModelDefault;
-  case CodeModel::JITDefault:
-    return LLVMCodeModelJITDefault;
-  case CodeModel::Small:
-    return LLVMCodeModelSmall;
-  case CodeModel::Kernel:
-    return LLVMCodeModelKernel;
-  case CodeModel::Medium:
-    return LLVMCodeModelMedium;
-  case CodeModel::Large:
-    return LLVMCodeModelLarge;
-  }
-  llvm_unreachable("Bad CodeModel!");
-}
-
-} // end llvm namespace
-
-#endif
-
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Support/DataTypes.h.cmake b/external/bsd/llvm/dist/llvm/include/llvm/Support/DataTypes.h.cmake
deleted file mode 100644
index a58e2e454b7d..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Support/DataTypes.h.cmake
+++ /dev/null
@@ -1,135 +0,0 @@
-/*===-- include/Support/DataTypes.h - Define fixed size types -----*- C -*-===*\
-|*                                                                            *|
-|*                     The LLVM Compiler Infrastructure                       *|
-|*                                                                            *|
-|* This file is distributed under the University of Illinois Open Source      *|
-|* License. See LICENSE.TXT for details.                                      *|
-|*                                                                            *|
-|*===----------------------------------------------------------------------===*|
-|*                                                                            *|
-|* This file contains definitions to figure out the size of _HOST_ data types.*|
-|* This file is important because different host OS's define different macros,*|
-|* which makes portability tough.  This file exports the following            *|
-|* definitions:                                                               *|
-|*                                                                            *|
-|*   [u]int(32|64)_t : typedefs for signed and unsigned 32/64 bit system types*|
-|*   [U]INT(8|16|32|64)_(MIN|MAX) : Constants for the min and max values.     *|
-|*                                                                            *|
-|* No library is required when using these functions.                         *|
-|*                                                                            *|
-|*===----------------------------------------------------------------------===*/
-
-/* Please leave this file C-compatible. */
-
-#ifndef SUPPORT_DATATYPES_H
-#define SUPPORT_DATATYPES_H
-
-#cmakedefine HAVE_INTTYPES_H ${HAVE_INTTYPES_H}
-#cmakedefine HAVE_STDINT_H ${HAVE_STDINT_H}
-#cmakedefine HAVE_UINT64_T ${HAVE_UINT64_T}
-#cmakedefine HAVE_U_INT64_T ${HAVE_U_INT64_T}
-
-#ifdef __cplusplus
-#include <cmath>
-#else
-#include <math.h>
-#endif
-
-#ifdef __cplusplus
-#include <cinttypes>
-#else
-#ifdef HAVE_INTTYPES_H
-#include <inttypes.h>
-#endif
-#endif
-
-#ifdef __cplusplus
-#include <cstdint>
-#else
-#ifdef HAVE_STDINT_H
-#include <stdint.h>
-#else
-#error "Compiler must provide an implementation of stdint.h"
-#endif
-#endif
-
-#ifndef _MSC_VER
-
-#if !defined(UINT32_MAX)
-# error "The standard header <cstdint> is not C++11 compliant. Must #define "\
-        "__STDC_LIMIT_MACROS before #including Support/DataTypes.h"
-#endif
-
-#if !defined(UINT32_C)
-# error "The standard header <cstdint> is not C++11 compliant. Must #define "\
-        "__STDC_CONSTANT_MACROS before #including Support/DataTypes.h"
-#endif
-
-/* Note that <inttypes.h> includes <stdint.h>, if this is a C99 system. */
-#include <sys/types.h>
-
-#ifdef _AIX
-// GCC is strict about defining large constants: they must have LL modifier.
-#undef INT64_MAX
-#undef INT64_MIN
-#endif
-
-/* Handle incorrect definition of uint64_t as u_int64_t */
-#ifndef HAVE_UINT64_T
-#ifdef HAVE_U_INT64_T
-typedef u_int64_t uint64_t;
-#else
-# error "Don't have a definition for uint64_t on this platform"
-#endif
-#endif
-
-#else /* _MSC_VER */
-#ifdef __cplusplus
-#include <cstddef>
-#include <cstdlib>
-#else
-#include <stddef.h>
-#include <stdlib.h>
-#endif
-#include <sys/types.h>
-
-#if defined(_WIN64)
-typedef signed __int64 ssize_t;
-#else
-typedef signed int ssize_t;
-#endif /* _WIN64 */
-
-#ifndef HAVE_INTTYPES_H
-#define PRId64 "I64d"
-#define PRIi64 "I64i"
-#define PRIo64 "I64o"
-#define PRIu64 "I64u"
-#define PRIx64 "I64x"
-#define PRIX64 "I64X"
-
-#define PRId32 "d"
-#define PRIi32 "i"
-#define PRIo32 "o"
-#define PRIu32 "u"
-#define PRIx32 "x"
-#define PRIX32 "X"
-#endif /* HAVE_INTTYPES_H */
-
-#endif /* _MSC_VER */
-
-/* Set defaults for constants which we cannot find. */
-#if !defined(INT64_MAX)
-# define INT64_MAX 9223372036854775807LL
-#endif
-#if !defined(INT64_MIN)
-# define INT64_MIN ((-INT64_MAX)-1)
-#endif
-#if !defined(UINT64_MAX)
-# define UINT64_MAX 0xffffffffffffffffULL
-#endif
-
-#ifndef HUGE_VALF
-#define HUGE_VALF (float)HUGE_VAL
-#endif
-
-#endif /* SUPPORT_DATATYPES_H */
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Support/GCOV.h b/external/bsd/llvm/dist/llvm/include/llvm/Support/GCOV.h
deleted file mode 100644
index 02016e7dbd62..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Support/GCOV.h
+++ /dev/null
@@ -1,460 +0,0 @@
-//===- GCOV.h - LLVM coverage tool ------------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This header provides the interface to read and write coverage files that
-// use 'gcov' format.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_SUPPORT_GCOV_H
-#define LLVM_SUPPORT_GCOV_H
-
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/MapVector.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/StringMap.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/ADT/iterator.h"
-#include "llvm/ADT/iterator_range.h"
-#include "llvm/Support/MemoryBuffer.h"
-#include "llvm/Support/raw_ostream.h"
-#include <cassert>
-#include <cstddef>
-#include <cstdint>
-#include <memory>
-#include <string>
-#include <utility>
-
-namespace llvm {
-
-class GCOVFunction;
-class GCOVBlock;
-class FileInfo;
-
-namespace GCOV {
-
-enum GCOVVersion { V402, V404, V704 };
-
-/// \brief A struct for passing gcov options between functions.
-struct Options {
-  Options(bool A, bool B, bool C, bool F, bool P, bool U, bool L, bool N)
-      : AllBlocks(A), BranchInfo(B), BranchCount(C), FuncCoverage(F),
-        PreservePaths(P), UncondBranch(U), LongFileNames(L), NoOutput(N) {}
-
-  bool AllBlocks;
-  bool BranchInfo;
-  bool BranchCount;
-  bool FuncCoverage;
-  bool PreservePaths;
-  bool UncondBranch;
-  bool LongFileNames;
-  bool NoOutput;
-};
-
-} // end namespace GCOV
-
-/// GCOVBuffer - A wrapper around MemoryBuffer to provide GCOV specific
-/// read operations.
-class GCOVBuffer {
-public:
-  GCOVBuffer(MemoryBuffer *B) : Buffer(B) {}
-
-  /// readGCNOFormat - Check GCNO signature is valid at the beginning of buffer.
-  bool readGCNOFormat() {
-    StringRef File = Buffer->getBuffer().slice(0, 4);
-    if (File != "oncg") {
-      errs() << "Unexpected file type: " << File << ".\n";
-      return false;
-    }
-    Cursor = 4;
-    return true;
-  }
-
-  /// readGCDAFormat - Check GCDA signature is valid at the beginning of buffer.
-  bool readGCDAFormat() {
-    StringRef File = Buffer->getBuffer().slice(0, 4);
-    if (File != "adcg") {
-      errs() << "Unexpected file type: " << File << ".\n";
-      return false;
-    }
-    Cursor = 4;
-    return true;
-  }
-
-  /// readGCOVVersion - Read GCOV version.
-  bool readGCOVVersion(GCOV::GCOVVersion &Version) {
-    StringRef VersionStr = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    if (VersionStr == "*204") {
-      Cursor += 4;
-      Version = GCOV::V402;
-      return true;
-    }
-    if (VersionStr == "*404") {
-      Cursor += 4;
-      Version = GCOV::V404;
-      return true;
-    }
-    if (VersionStr == "*704") {
-      Cursor += 4;
-      Version = GCOV::V704;
-      return true;
-    }
-    errs() << "Unexpected version: " << VersionStr << ".\n";
-    return false;
-  }
-
-  /// readFunctionTag - If cursor points to a function tag then increment the
-  /// cursor and return true otherwise return false.
-  bool readFunctionTag() {
-    StringRef Tag = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    if (Tag.empty() || Tag[0] != '\0' || Tag[1] != '\0' || Tag[2] != '\0' ||
-        Tag[3] != '\1') {
-      return false;
-    }
-    Cursor += 4;
-    return true;
-  }
-
-  /// readBlockTag - If cursor points to a block tag then increment the
-  /// cursor and return true otherwise return false.
-  bool readBlockTag() {
-    StringRef Tag = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    if (Tag.empty() || Tag[0] != '\0' || Tag[1] != '\0' || Tag[2] != '\x41' ||
-        Tag[3] != '\x01') {
-      return false;
-    }
-    Cursor += 4;
-    return true;
-  }
-
-  /// readEdgeTag - If cursor points to an edge tag then increment the
-  /// cursor and return true otherwise return false.
-  bool readEdgeTag() {
-    StringRef Tag = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    if (Tag.empty() || Tag[0] != '\0' || Tag[1] != '\0' || Tag[2] != '\x43' ||
-        Tag[3] != '\x01') {
-      return false;
-    }
-    Cursor += 4;
-    return true;
-  }
-
-  /// readLineTag - If cursor points to a line tag then increment the
-  /// cursor and return true otherwise return false.
-  bool readLineTag() {
-    StringRef Tag = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    if (Tag.empty() || Tag[0] != '\0' || Tag[1] != '\0' || Tag[2] != '\x45' ||
-        Tag[3] != '\x01') {
-      return false;
-    }
-    Cursor += 4;
-    return true;
-  }
-
-  /// readArcTag - If cursor points to an gcda arc tag then increment the
-  /// cursor and return true otherwise return false.
-  bool readArcTag() {
-    StringRef Tag = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    if (Tag.empty() || Tag[0] != '\0' || Tag[1] != '\0' || Tag[2] != '\xa1' ||
-        Tag[3] != '\1') {
-      return false;
-    }
-    Cursor += 4;
-    return true;
-  }
-
-  /// readObjectTag - If cursor points to an object summary tag then increment
-  /// the cursor and return true otherwise return false.
-  bool readObjectTag() {
-    StringRef Tag = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    if (Tag.empty() || Tag[0] != '\0' || Tag[1] != '\0' || Tag[2] != '\0' ||
-        Tag[3] != '\xa1') {
-      return false;
-    }
-    Cursor += 4;
-    return true;
-  }
-
-  /// readProgramTag - If cursor points to a program summary tag then increment
-  /// the cursor and return true otherwise return false.
-  bool readProgramTag() {
-    StringRef Tag = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    if (Tag.empty() || Tag[0] != '\0' || Tag[1] != '\0' || Tag[2] != '\0' ||
-        Tag[3] != '\xa3') {
-      return false;
-    }
-    Cursor += 4;
-    return true;
-  }
-
-  bool readInt(uint32_t &Val) {
-    if (Buffer->getBuffer().size() < Cursor + 4) {
-      errs() << "Unexpected end of memory buffer: " << Cursor + 4 << ".\n";
-      return false;
-    }
-    StringRef Str = Buffer->getBuffer().slice(Cursor, Cursor + 4);
-    Cursor += 4;
-    Val = *(const uint32_t *)(Str.data());
-    return true;
-  }
-
-  bool readInt64(uint64_t &Val) {
-    uint32_t Lo, Hi;
-    if (!readInt(Lo) || !readInt(Hi))
-      return false;
-    Val = ((uint64_t)Hi << 32) | Lo;
-    return true;
-  }
-
-  bool readString(StringRef &Str) {
-    uint32_t Len = 0;
-    // Keep reading until we find a non-zero length. This emulates gcov's
-    // behaviour, which appears to do the same.
-    while (Len == 0)
-      if (!readInt(Len))
-        return false;
-    Len *= 4;
-    if (Buffer->getBuffer().size() < Cursor + Len) {
-      errs() << "Unexpected end of memory buffer: " << Cursor + Len << ".\n";
-      return false;
-    }
-    Str = Buffer->getBuffer().slice(Cursor, Cursor + Len).split('\0').first;
-    Cursor += Len;
-    return true;
-  }
-
-  uint64_t getCursor() const { return Cursor; }
-  void advanceCursor(uint32_t n) { Cursor += n * 4; }
-
-private:
-  MemoryBuffer *Buffer;
-  uint64_t Cursor = 0;
-};
-
-/// GCOVFile - Collects coverage information for one pair of coverage file
-/// (.gcno and .gcda).
-class GCOVFile {
-public:
-  GCOVFile() = default;
-
-  bool readGCNO(GCOVBuffer &Buffer);
-  bool readGCDA(GCOVBuffer &Buffer);
-  uint32_t getChecksum() const { return Checksum; }
-  void print(raw_ostream &OS) const;
-  void dump() const;
-  void collectLineCounts(FileInfo &FI);
-
-private:
-  bool GCNOInitialized = false;
-  GCOV::GCOVVersion Version;
-  uint32_t Checksum = 0;
-  SmallVector<std::unique_ptr<GCOVFunction>, 16> Functions;
-  uint32_t RunCount = 0;
-  uint32_t ProgramCount = 0;
-};
-
-/// GCOVEdge - Collects edge information.
-struct GCOVEdge {
-  GCOVEdge(GCOVBlock &S, GCOVBlock &D) : Src(S), Dst(D) {}
-
-  GCOVBlock &Src;
-  GCOVBlock &Dst;
-  uint64_t Count = 0;
-};
-
-/// GCOVFunction - Collects function information.
-class GCOVFunction {
-public:
-  using BlockIterator = pointee_iterator<SmallVectorImpl<
-      std::unique_ptr<GCOVBlock>>::const_iterator>;
-
-  GCOVFunction(GCOVFile &P) : Parent(P) {}
-
-  bool readGCNO(GCOVBuffer &Buffer, GCOV::GCOVVersion Version);
-  bool readGCDA(GCOVBuffer &Buffer, GCOV::GCOVVersion Version);
-  StringRef getName() const { return Name; }
-  StringRef getFilename() const { return Filename; }
-  size_t getNumBlocks() const { return Blocks.size(); }
-  uint64_t getEntryCount() const;
-  uint64_t getExitCount() const;
-
-  BlockIterator block_begin() const { return Blocks.begin(); }
-  BlockIterator block_end() const { return Blocks.end(); }
-  iterator_range<BlockIterator> blocks() const {
-    return make_range(block_begin(), block_end());
-  }
-
-  void print(raw_ostream &OS) const;
-  void dump() const;
-  void collectLineCounts(FileInfo &FI);
-
-private:
-  GCOVFile &Parent;
-  uint32_t Ident = 0;
-  uint32_t Checksum;
-  uint32_t LineNumber = 0;
-  StringRef Name;
-  StringRef Filename;
-  SmallVector<std::unique_ptr<GCOVBlock>, 16> Blocks;
-  SmallVector<std::unique_ptr<GCOVEdge>, 16> Edges;
-};
-
-/// GCOVBlock - Collects block information.
-class GCOVBlock {
-  struct EdgeWeight {
-    EdgeWeight(GCOVBlock *D) : Dst(D) {}
-
-    GCOVBlock *Dst;
-    uint64_t Count = 0;
-  };
-
-  struct SortDstEdgesFunctor {
-    bool operator()(const GCOVEdge *E1, const GCOVEdge *E2) {
-      return E1->Dst.Number < E2->Dst.Number;
-    }
-  };
-
-public:
-  using EdgeIterator = SmallVectorImpl<GCOVEdge *>::const_iterator;
-
-  GCOVBlock(GCOVFunction &P, uint32_t N) : Parent(P), Number(N) {}
-  ~GCOVBlock();
-
-  const GCOVFunction &getParent() const { return Parent; }
-  void addLine(uint32_t N) { Lines.push_back(N); }
-  uint32_t getLastLine() const { return Lines.back(); }
-  void addCount(size_t DstEdgeNo, uint64_t N);
-  uint64_t getCount() const { return Counter; }
-
-  void addSrcEdge(GCOVEdge *Edge) {
-    assert(&Edge->Dst == this); // up to caller to ensure edge is valid
-    SrcEdges.push_back(Edge);
-  }
-
-  void addDstEdge(GCOVEdge *Edge) {
-    assert(&Edge->Src == this); // up to caller to ensure edge is valid
-    // Check if adding this edge causes list to become unsorted.
-    if (DstEdges.size() && DstEdges.back()->Dst.Number > Edge->Dst.Number)
-      DstEdgesAreSorted = false;
-    DstEdges.push_back(Edge);
-  }
-
-  size_t getNumSrcEdges() const { return SrcEdges.size(); }
-  size_t getNumDstEdges() const { return DstEdges.size(); }
-  void sortDstEdges();
-
-  EdgeIterator src_begin() const { return SrcEdges.begin(); }
-  EdgeIterator src_end() const { return SrcEdges.end(); }
-  iterator_range<EdgeIterator> srcs() const {
-    return make_range(src_begin(), src_end());
-  }
-
-  EdgeIterator dst_begin() const { return DstEdges.begin(); }
-  EdgeIterator dst_end() const { return DstEdges.end(); }
-  iterator_range<EdgeIterator> dsts() const {
-    return make_range(dst_begin(), dst_end());
-  }
-
-  void print(raw_ostream &OS) const;
-  void dump() const;
-  void collectLineCounts(FileInfo &FI);
-
-private:
-  GCOVFunction &Parent;
-  uint32_t Number;
-  uint64_t Counter = 0;
-  bool DstEdgesAreSorted = true;
-  SmallVector<GCOVEdge *, 16> SrcEdges;
-  SmallVector<GCOVEdge *, 16> DstEdges;
-  SmallVector<uint32_t, 16> Lines;
-};
-
-class FileInfo {
-  // It is unlikely--but possible--for multiple functions to be on the same
-  // line.
-  // Therefore this typedef allows LineData.Functions to store multiple
-  // functions
-  // per instance. This is rare, however, so optimize for the common case.
-  using FunctionVector = SmallVector<const GCOVFunction *, 1>;
-  using FunctionLines = DenseMap<uint32_t, FunctionVector>;
-  using BlockVector = SmallVector<const GCOVBlock *, 4>;
-  using BlockLines = DenseMap<uint32_t, BlockVector>;
-
-  struct LineData {
-    LineData() = default;
-
-    BlockLines Blocks;
-    FunctionLines Functions;
-    uint32_t LastLine = 0;
-  };
-
-  struct GCOVCoverage {
-    GCOVCoverage(StringRef Name) : Name(Name) {}
-
-    StringRef Name;
-
-    uint32_t LogicalLines = 0;
-    uint32_t LinesExec = 0;
-
-    uint32_t Branches = 0;
-    uint32_t BranchesExec = 0;
-    uint32_t BranchesTaken = 0;
-  };
-
-public:
-  FileInfo(const GCOV::Options &Options) : Options(Options) {}
-
-  void addBlockLine(StringRef Filename, uint32_t Line, const GCOVBlock *Block) {
-    if (Line > LineInfo[Filename].LastLine)
-      LineInfo[Filename].LastLine = Line;
-    LineInfo[Filename].Blocks[Line - 1].push_back(Block);
-  }
-
-  void addFunctionLine(StringRef Filename, uint32_t Line,
-                       const GCOVFunction *Function) {
-    if (Line > LineInfo[Filename].LastLine)
-      LineInfo[Filename].LastLine = Line;
-    LineInfo[Filename].Functions[Line - 1].push_back(Function);
-  }
-
-  void setRunCount(uint32_t Runs) { RunCount = Runs; }
-  void setProgramCount(uint32_t Programs) { ProgramCount = Programs; }
-  void print(raw_ostream &OS, StringRef MainFilename, StringRef GCNOFile,
-             StringRef GCDAFile);
-
-private:
-  std::string getCoveragePath(StringRef Filename, StringRef MainFilename);
-  std::unique_ptr<raw_ostream> openCoveragePath(StringRef CoveragePath);
-  void printFunctionSummary(raw_ostream &OS, const FunctionVector &Funcs) const;
-  void printBlockInfo(raw_ostream &OS, const GCOVBlock &Block,
-                      uint32_t LineIndex, uint32_t &BlockNo) const;
-  void printBranchInfo(raw_ostream &OS, const GCOVBlock &Block,
-                       GCOVCoverage &Coverage, uint32_t &EdgeNo);
-  void printUncondBranchInfo(raw_ostream &OS, uint32_t &EdgeNo,
-                             uint64_t Count) const;
-
-  void printCoverage(raw_ostream &OS, const GCOVCoverage &Coverage) const;
-  void printFuncCoverage(raw_ostream &OS) const;
-  void printFileCoverage(raw_ostream &OS) const;
-
-  const GCOV::Options &Options;
-  StringMap<LineData> LineInfo;
-  uint32_t RunCount = 0;
-  uint32_t ProgramCount = 0;
-
-  using FileCoverageList = SmallVector<std::pair<std::string, GCOVCoverage>, 4>;
-  using FuncCoverageMap = MapVector<const GCOVFunction *, GCOVCoverage>;
-
-  FileCoverageList FileCoverages;
-  FuncCoverageMap FuncCoverages;
-};
-
-} // end namespace llvm
-
-#endif // LLVM_SUPPORT_GCOV_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/CostTable.h b/external/bsd/llvm/dist/llvm/include/llvm/Target/CostTable.h
deleted file mode 100644
index b7d9240a91f5..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/CostTable.h
+++ /dev/null
@@ -1,70 +0,0 @@
-//===-- CostTable.h - Instruction Cost Table handling -----------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-///
-/// \file
-/// \brief Cost tables and simple lookup functions
-///
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_COSTTABLE_H_
-#define LLVM_TARGET_COSTTABLE_H_
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/CodeGen/MachineValueType.h"
-
-namespace llvm {
-
-/// Cost Table Entry
-struct CostTblEntry {
-  int ISD;
-  MVT::SimpleValueType Type;
-  unsigned Cost;
-};
-
-/// Find in cost table, TypeTy must be comparable to CompareTy by ==
-inline const CostTblEntry *CostTableLookup(ArrayRef<CostTblEntry> Tbl,
-                                           int ISD, MVT Ty) {
-  auto I = find_if(Tbl, [=](const CostTblEntry &Entry) {
-    return ISD == Entry.ISD && Ty == Entry.Type;
-  });
-  if (I != Tbl.end())
-    return I;
-
-  // Could not find an entry.
-  return nullptr;
-}
-
-/// Type Conversion Cost Table
-struct TypeConversionCostTblEntry {
-  int ISD;
-  MVT::SimpleValueType Dst;
-  MVT::SimpleValueType Src;
-  unsigned Cost;
-};
-
-/// Find in type conversion cost table, TypeTy must be comparable to CompareTy
-/// by ==
-inline const TypeConversionCostTblEntry *
-ConvertCostTableLookup(ArrayRef<TypeConversionCostTblEntry> Tbl,
-                       int ISD, MVT Dst, MVT Src) {
-  auto I = find_if(Tbl, [=](const TypeConversionCostTblEntry &Entry) {
-    return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
-  });
-  if (I != Tbl.end())
-    return I;
-
-  // Could not find an entry.
-  return nullptr;
-}
-
-} // namespace llvm
-
-
-#endif /* LLVM_TARGET_COSTTABLE_H_ */
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetCallingConv.h b/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetCallingConv.h
deleted file mode 100644
index 4f750b8a289f..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetCallingConv.h
+++ /dev/null
@@ -1,204 +0,0 @@
-//===-- llvm/Target/TargetCallingConv.h - Calling Convention ----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines types for working with calling-convention information.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_TARGETCALLINGCONV_H
-#define LLVM_TARGET_TARGETCALLINGCONV_H
-
-#include "llvm/CodeGen/MachineValueType.h"
-#include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/Support/MathExtras.h"
-#include <cassert>
-#include <climits>
-#include <cstdint>
-
-namespace llvm {
-namespace ISD {
-
-  struct ArgFlagsTy {
-  private:
-    unsigned IsZExt : 1;     ///< Zero extended
-    unsigned IsSExt : 1;     ///< Sign extended
-    unsigned IsInReg : 1;    ///< Passed in register
-    unsigned IsSRet : 1;     ///< Hidden struct-ret ptr
-    unsigned IsByVal : 1;    ///< Struct passed by value
-    unsigned IsNest : 1;     ///< Nested fn static chain
-    unsigned IsReturned : 1; ///< Always returned
-    unsigned IsSplit : 1;
-    unsigned IsInAlloca : 1;   ///< Passed with inalloca
-    unsigned IsSplitEnd : 1;   ///< Last part of a split
-    unsigned IsSwiftSelf : 1;  ///< Swift self parameter
-    unsigned IsSwiftError : 1; ///< Swift error parameter
-    unsigned IsHva : 1;        ///< HVA field for
-    unsigned IsHvaStart : 1;   ///< HVA structure start
-    unsigned IsSecArgPass : 1; ///< Second argument
-    unsigned ByValAlign : 4;   ///< Log 2 of byval alignment
-    unsigned OrigAlign : 5;    ///< Log 2 of original alignment
-    unsigned IsInConsecutiveRegsLast : 1;
-    unsigned IsInConsecutiveRegs : 1;
-    unsigned IsCopyElisionCandidate : 1; ///< Argument copy elision candidate
-
-    unsigned ByValSize; ///< Byval struct size
-
-  public:
-    ArgFlagsTy()
-        : IsZExt(0), IsSExt(0), IsInReg(0), IsSRet(0), IsByVal(0), IsNest(0),
-          IsReturned(0), IsSplit(0), IsInAlloca(0), IsSplitEnd(0),
-          IsSwiftSelf(0), IsSwiftError(0), IsHva(0), IsHvaStart(0),
-          IsSecArgPass(0), ByValAlign(0), OrigAlign(0),
-          IsInConsecutiveRegsLast(0), IsInConsecutiveRegs(0),
-          IsCopyElisionCandidate(0), ByValSize(0) {
-      static_assert(sizeof(*this) == 2 * sizeof(unsigned), "flags are too big");
-    }
-
-    bool isZExt() const { return IsZExt; }
-    void setZExt() { IsZExt = 1; }
-
-    bool isSExt() const { return IsSExt; }
-    void setSExt() { IsSExt = 1; }
-
-    bool isInReg() const { return IsInReg; }
-    void setInReg() { IsInReg = 1; }
-
-    bool isSRet() const { return IsSRet; }
-    void setSRet() { IsSRet = 1; }
-
-    bool isByVal() const { return IsByVal; }
-    void setByVal() { IsByVal = 1; }
-
-    bool isInAlloca() const { return IsInAlloca; }
-    void setInAlloca() { IsInAlloca = 1; }
-
-    bool isSwiftSelf() const { return IsSwiftSelf; }
-    void setSwiftSelf() { IsSwiftSelf = 1; }
-
-    bool isSwiftError() const { return IsSwiftError; }
-    void setSwiftError() { IsSwiftError = 1; }
-
-    bool isHva() const { return IsHva; }
-    void setHva() { IsHva = 1; }
-
-    bool isHvaStart() const { return IsHvaStart; }
-    void setHvaStart() { IsHvaStart = 1; }
-
-    bool isSecArgPass() const { return IsSecArgPass; }
-    void setSecArgPass() { IsSecArgPass = 1; }
-
-    bool isNest() const { return IsNest; }
-    void setNest() { IsNest = 1; }
-
-    bool isReturned() const { return IsReturned; }
-    void setReturned() { IsReturned = 1; }
-
-    bool isInConsecutiveRegs()  const { return IsInConsecutiveRegs; }
-    void setInConsecutiveRegs() { IsInConsecutiveRegs = 1; }
-
-    bool isInConsecutiveRegsLast() const { return IsInConsecutiveRegsLast; }
-    void setInConsecutiveRegsLast() { IsInConsecutiveRegsLast = 1; }
-
-    bool isSplit()   const { return IsSplit; }
-    void setSplit()  { IsSplit = 1; }
-
-    bool isSplitEnd()   const { return IsSplitEnd; }
-    void setSplitEnd()  { IsSplitEnd = 1; }
-
-    bool isCopyElisionCandidate()  const { return IsCopyElisionCandidate; }
-    void setCopyElisionCandidate() { IsCopyElisionCandidate = 1; }
-
-    unsigned getByValAlign() const { return (1U << ByValAlign) / 2; }
-    void setByValAlign(unsigned A) {
-      ByValAlign = Log2_32(A) + 1;
-      assert(getByValAlign() == A && "bitfield overflow");
-    }
-
-    unsigned getOrigAlign() const { return (1U << OrigAlign) / 2; }
-    void setOrigAlign(unsigned A) {
-      OrigAlign = Log2_32(A) + 1;
-      assert(getOrigAlign() == A && "bitfield overflow");
-    }
-
-    unsigned getByValSize() const { return ByValSize; }
-    void setByValSize(unsigned S) { ByValSize = S; }
-  };
-
-  /// InputArg - This struct carries flags and type information about a
-  /// single incoming (formal) argument or incoming (from the perspective
-  /// of the caller) return value virtual register.
-  ///
-  struct InputArg {
-    ArgFlagsTy Flags;
-    MVT VT = MVT::Other;
-    EVT ArgVT;
-    bool Used = false;
-
-    /// Index original Function's argument.
-    unsigned OrigArgIndex;
-    /// Sentinel value for implicit machine-level input arguments.
-    static const unsigned NoArgIndex = UINT_MAX;
-
-    /// Offset in bytes of current input value relative to the beginning of
-    /// original argument. E.g. if argument was splitted into four 32 bit
-    /// registers, we got 4 InputArgs with PartOffsets 0, 4, 8 and 12.
-    unsigned PartOffset;
-
-    InputArg() = default;
-    InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used,
-             unsigned origIdx, unsigned partOffs)
-      : Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) {
-      VT = vt.getSimpleVT();
-      ArgVT = argvt;
-    }
-
-    bool isOrigArg() const {
-      return OrigArgIndex != NoArgIndex;
-    }
-
-    unsigned getOrigArgIndex() const {
-      assert(OrigArgIndex != NoArgIndex && "Implicit machine-level argument");
-      return OrigArgIndex;
-    }
-  };
-
-  /// OutputArg - This struct carries flags and a value for a
-  /// single outgoing (actual) argument or outgoing (from the perspective
-  /// of the caller) return value virtual register.
-  ///
-  struct OutputArg {
-    ArgFlagsTy Flags;
-    MVT VT;
-    EVT ArgVT;
-
-    /// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
-    bool IsFixed = false;
-
-    /// Index original Function's argument.
-    unsigned OrigArgIndex;
-
-    /// Offset in bytes of current output value relative to the beginning of
-    /// original argument. E.g. if argument was splitted into four 32 bit
-    /// registers, we got 4 OutputArgs with PartOffsets 0, 4, 8 and 12.
-    unsigned PartOffset;
-
-    OutputArg() = default;
-    OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed,
-              unsigned origIdx, unsigned partOffs)
-      : Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
-        PartOffset(partOffs) {
-      VT = vt.getSimpleVT();
-      ArgVT = argvt;
-    }
-  };
-
-} // end namespace ISD
-} // end namespace llvm
-
-#endif // LLVM_TARGET_TARGETCALLINGCONV_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetFrameLowering.h b/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetFrameLowering.h
deleted file mode 100644
index 4576f8c7582b..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetFrameLowering.h
+++ /dev/null
@@ -1,346 +0,0 @@
-//===-- llvm/Target/TargetFrameLowering.h ---------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Interface to describe the layout of a stack frame on the target machine.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_TARGETFRAMELOWERING_H
-#define LLVM_TARGET_TARGETFRAMELOWERING_H
-
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include <utility>
-#include <vector>
-
-namespace llvm {
-  class BitVector;
-  class CalleeSavedInfo;
-  class MachineFunction;
-  class RegScavenger;
-
-/// Information about stack frame layout on the target.  It holds the direction
-/// of stack growth, the known stack alignment on entry to each function, and
-/// the offset to the locals area.
-///
-/// The offset to the local area is the offset from the stack pointer on
-/// function entry to the first location where function data (local variables,
-/// spill locations) can be stored.
-class TargetFrameLowering {
-public:
-  enum StackDirection {
-    StackGrowsUp,        // Adding to the stack increases the stack address
-    StackGrowsDown       // Adding to the stack decreases the stack address
-  };
-
-  // Maps a callee saved register to a stack slot with a fixed offset.
-  struct SpillSlot {
-    unsigned Reg;
-    int Offset; // Offset relative to stack pointer on function entry.
-  };
-private:
-  StackDirection StackDir;
-  unsigned StackAlignment;
-  unsigned TransientStackAlignment;
-  int LocalAreaOffset;
-  bool StackRealignable;
-public:
-  TargetFrameLowering(StackDirection D, unsigned StackAl, int LAO,
-                      unsigned TransAl = 1, bool StackReal = true)
-    : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
-      LocalAreaOffset(LAO), StackRealignable(StackReal) {}
-
-  virtual ~TargetFrameLowering();
-
-  // These methods return information that describes the abstract stack layout
-  // of the target machine.
-
-  /// getStackGrowthDirection - Return the direction the stack grows
-  ///
-  StackDirection getStackGrowthDirection() const { return StackDir; }
-
-  /// getStackAlignment - This method returns the number of bytes to which the
-  /// stack pointer must be aligned on entry to a function.  Typically, this
-  /// is the largest alignment for any data object in the target.
-  ///
-  unsigned getStackAlignment() const { return StackAlignment; }
-
-  /// alignSPAdjust - This method aligns the stack adjustment to the correct
-  /// alignment.
-  ///
-  int alignSPAdjust(int SPAdj) const {
-    if (SPAdj < 0) {
-      SPAdj = -alignTo(-SPAdj, StackAlignment);
-    } else {
-      SPAdj = alignTo(SPAdj, StackAlignment);
-    }
-    return SPAdj;
-  }
-
-  /// getTransientStackAlignment - This method returns the number of bytes to
-  /// which the stack pointer must be aligned at all times, even between
-  /// calls.
-  ///
-  unsigned getTransientStackAlignment() const {
-    return TransientStackAlignment;
-  }
-
-  /// isStackRealignable - This method returns whether the stack can be
-  /// realigned.
-  bool isStackRealignable() const {
-    return StackRealignable;
-  }
-
-  /// Return the skew that has to be applied to stack alignment under
-  /// certain conditions (e.g. stack was adjusted before function \p MF
-  /// was called).
-  virtual unsigned getStackAlignmentSkew(const MachineFunction &MF) const;
-
-  /// getOffsetOfLocalArea - This method returns the offset of the local area
-  /// from the stack pointer on entrance to a function.
-  ///
-  int getOffsetOfLocalArea() const { return LocalAreaOffset; }
-
-  /// isFPCloseToIncomingSP - Return true if the frame pointer is close to
-  /// the incoming stack pointer, false if it is close to the post-prologue
-  /// stack pointer.
-  virtual bool isFPCloseToIncomingSP() const { return true; }
-
-  /// assignCalleeSavedSpillSlots - Allows target to override spill slot
-  /// assignment logic.  If implemented, assignCalleeSavedSpillSlots() should
-  /// assign frame slots to all CSI entries and return true.  If this method
-  /// returns false, spill slots will be assigned using generic implementation.
-  /// assignCalleeSavedSpillSlots() may add, delete or rearrange elements of
-  /// CSI.
-  virtual bool
-  assignCalleeSavedSpillSlots(MachineFunction &MF,
-                              const TargetRegisterInfo *TRI,
-                              std::vector<CalleeSavedInfo> &CSI) const {
-    return false;
-  }
-
-  /// getCalleeSavedSpillSlots - This method returns a pointer to an array of
-  /// pairs, that contains an entry for each callee saved register that must be
-  /// spilled to a particular stack location if it is spilled.
-  ///
-  /// Each entry in this array contains a <register,offset> pair, indicating the
-  /// fixed offset from the incoming stack pointer that each register should be
-  /// spilled at. If a register is not listed here, the code generator is
-  /// allowed to spill it anywhere it chooses.
-  ///
-  virtual const SpillSlot *
-  getCalleeSavedSpillSlots(unsigned &NumEntries) const {
-    NumEntries = 0;
-    return nullptr;
-  }
-
-  /// targetHandlesStackFrameRounding - Returns true if the target is
-  /// responsible for rounding up the stack frame (probably at emitPrologue
-  /// time).
-  virtual bool targetHandlesStackFrameRounding() const {
-    return false;
-  }
-
-  /// Returns true if the target will correctly handle shrink wrapping.
-  virtual bool enableShrinkWrapping(const MachineFunction &MF) const {
-    return false;
-  }
-
-  /// Returns true if the stack slot holes in the fixed and callee-save stack
-  /// area should be used when allocating other stack locations to reduce stack
-  /// size.
-  virtual bool enableStackSlotScavenging(const MachineFunction &MF) const {
-    return false;
-  }
-
-  /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
-  /// the function.
-  virtual void emitPrologue(MachineFunction &MF,
-                            MachineBasicBlock &MBB) const = 0;
-  virtual void emitEpilogue(MachineFunction &MF,
-                            MachineBasicBlock &MBB) const = 0;
-
-  /// Replace a StackProbe stub (if any) with the actual probe code inline
-  virtual void inlineStackProbe(MachineFunction &MF,
-                                MachineBasicBlock &PrologueMBB) const {}
-
-  /// Adjust the prologue to have the function use segmented stacks. This works
-  /// by adding a check even before the "normal" function prologue.
-  virtual void adjustForSegmentedStacks(MachineFunction &MF,
-                                        MachineBasicBlock &PrologueMBB) const {}
-
-  /// Adjust the prologue to add Erlang Run-Time System (ERTS) specific code in
-  /// the assembly prologue to explicitly handle the stack.
-  virtual void adjustForHiPEPrologue(MachineFunction &MF,
-                                     MachineBasicBlock &PrologueMBB) const {}
-
-  /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee
-  /// saved registers and returns true if it isn't possible / profitable to do
-  /// so by issuing a series of store instructions via
-  /// storeRegToStackSlot(). Returns false otherwise.
-  virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
-                                         MachineBasicBlock::iterator MI,
-                                        const std::vector<CalleeSavedInfo> &CSI,
-                                         const TargetRegisterInfo *TRI) const {
-    return false;
-  }
-
-  /// restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee
-  /// saved registers and returns true if it isn't possible / profitable to do
-  /// so by issuing a series of load instructions via loadRegToStackSlot().
-  /// Returns false otherwise.
-  virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
-                                           MachineBasicBlock::iterator MI,
-                                        const std::vector<CalleeSavedInfo> &CSI,
-                                        const TargetRegisterInfo *TRI) const {
-    return false;
-  }
-
-  /// Return true if the target needs to disable frame pointer elimination.
-  virtual bool noFramePointerElim(const MachineFunction &MF) const;
-
-  /// hasFP - Return true if the specified function should have a dedicated
-  /// frame pointer register. For most targets this is true only if the function
-  /// has variable sized allocas or if frame pointer elimination is disabled.
-  virtual bool hasFP(const MachineFunction &MF) const = 0;
-
-  /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
-  /// not required, we reserve argument space for call sites in the function
-  /// immediately on entry to the current function. This eliminates the need for
-  /// add/sub sp brackets around call sites. Returns true if the call frame is
-  /// included as part of the stack frame.
-  virtual bool hasReservedCallFrame(const MachineFunction &MF) const {
-    return !hasFP(MF);
-  }
-
-  /// canSimplifyCallFramePseudos - When possible, it's best to simplify the
-  /// call frame pseudo ops before doing frame index elimination. This is
-  /// possible only when frame index references between the pseudos won't
-  /// need adjusting for the call frame adjustments. Normally, that's true
-  /// if the function has a reserved call frame or a frame pointer. Some
-  /// targets (Thumb2, for example) may have more complicated criteria,
-  /// however, and can override this behavior.
-  virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const {
-    return hasReservedCallFrame(MF) || hasFP(MF);
-  }
-
-  // needsFrameIndexResolution - Do we need to perform FI resolution for
-  // this function. Normally, this is required only when the function
-  // has any stack objects. However, targets may want to override this.
-  virtual bool needsFrameIndexResolution(const MachineFunction &MF) const;
-
-  /// getFrameIndexReference - This method should return the base register
-  /// and offset used to reference a frame index location. The offset is
-  /// returned directly, and the base register is returned via FrameReg.
-  virtual int getFrameIndexReference(const MachineFunction &MF, int FI,
-                                     unsigned &FrameReg) const;
-
-  /// Same as \c getFrameIndexReference, except that the stack pointer (as
-  /// opposed to the frame pointer) will be the preferred value for \p
-  /// FrameReg. This is generally used for emitting statepoint or EH tables that
-  /// use offsets from RSP.  If \p IgnoreSPUpdates is true, the returned
-  /// offset is only guaranteed to be valid with respect to the value of SP at
-  /// the end of the prologue.
-  virtual int getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
-                                             unsigned &FrameReg,
-                                             bool IgnoreSPUpdates) const {
-    // Always safe to dispatch to getFrameIndexReference.
-    return getFrameIndexReference(MF, FI, FrameReg);
-  }
-
-  /// This method determines which of the registers reported by
-  /// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved.
-  /// The default implementation checks populates the \p SavedRegs bitset with
-  /// all registers which are modified in the function, targets may override
-  /// this function to save additional registers.
-  /// This method also sets up the register scavenger ensuring there is a free
-  /// register or a frameindex available.
-  virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
-                                    RegScavenger *RS = nullptr) const;
-
-  /// processFunctionBeforeFrameFinalized - This method is called immediately
-  /// before the specified function's frame layout (MF.getFrameInfo()) is
-  /// finalized.  Once the frame is finalized, MO_FrameIndex operands are
-  /// replaced with direct constants.  This method is optional.
-  ///
-  virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF,
-                                             RegScavenger *RS = nullptr) const {
-  }
-
-  virtual unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const {
-    report_fatal_error("WinEH not implemented for this target");
-  }
-
-  /// This method is called during prolog/epilog code insertion to eliminate
-  /// call frame setup and destroy pseudo instructions (but only if the Target
-  /// is using them).  It is responsible for eliminating these instructions,
-  /// replacing them with concrete instructions.  This method need only be
-  /// implemented if using call frame setup/destroy pseudo instructions.
-  /// Returns an iterator pointing to the instruction after the replaced one.
-  virtual MachineBasicBlock::iterator
-  eliminateCallFramePseudoInstr(MachineFunction &MF,
-                                MachineBasicBlock &MBB,
-                                MachineBasicBlock::iterator MI) const {
-    llvm_unreachable("Call Frame Pseudo Instructions do not exist on this "
-                     "target!");
-  }
-
-
-  /// Order the symbols in the local stack frame.
-  /// The list of objects that we want to order is in \p objectsToAllocate as
-  /// indices into the MachineFrameInfo. The array can be reordered in any way
-  /// upon return. The contents of the array, however, may not be modified (i.e.
-  /// only their order may be changed).
-  /// By default, just maintain the original order.
-  virtual void
-  orderFrameObjects(const MachineFunction &MF,
-                    SmallVectorImpl<int> &objectsToAllocate) const {
-  }
-
-  /// Check whether or not the given \p MBB can be used as a prologue
-  /// for the target.
-  /// The prologue will be inserted first in this basic block.
-  /// This method is used by the shrink-wrapping pass to decide if
-  /// \p MBB will be correctly handled by the target.
-  /// As soon as the target enable shrink-wrapping without overriding
-  /// this method, we assume that each basic block is a valid
-  /// prologue.
-  virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const {
-    return true;
-  }
-
-  /// Check whether or not the given \p MBB can be used as a epilogue
-  /// for the target.
-  /// The epilogue will be inserted before the first terminator of that block.
-  /// This method is used by the shrink-wrapping pass to decide if
-  /// \p MBB will be correctly handled by the target.
-  /// As soon as the target enable shrink-wrapping without overriding
-  /// this method, we assume that each basic block is a valid
-  /// epilogue.
-  virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const {
-    return true;
-  }
-
-  /// Check if given function is safe for not having callee saved registers.
-  /// This is used when interprocedural register allocation is enabled.
-  static bool isSafeForNoCSROpt(const Function *F) {
-    if (!F->hasLocalLinkage() || F->hasAddressTaken() ||
-        !F->hasFnAttribute(Attribute::NoRecurse))
-      return false;
-    // Function should not be optimized as tail call.
-    for (const User *U : F->users())
-      if (auto CS = ImmutableCallSite(U))
-        if (CS.isTailCall())
-          return false;
-    return true;
-  }
-};
-
-} // End llvm namespace
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetInstrInfo.h b/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetInstrInfo.h
deleted file mode 100644
index 1843a2eed9bf..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetInstrInfo.h
+++ /dev/null
@@ -1,1669 +0,0 @@
-//===- llvm/Target/TargetInstrInfo.h - Instruction Info ---------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes the target machine instruction set to the code generator.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_TARGETINSTRINFO_H
-#define LLVM_TARGET_TARGETINSTRINFO_H
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/DenseMapInfo.h"
-#include "llvm/ADT/None.h"
-#include "llvm/CodeGen/LiveIntervalAnalysis.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineCombinerPattern.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineLoopInfo.h"
-#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/MC/MCInstrInfo.h"
-#include "llvm/Support/BranchProbability.h"
-#include "llvm/Support/ErrorHandling.h"
-#include <cassert>
-#include <cstddef>
-#include <cstdint>
-#include <utility>
-#include <vector>
-
-namespace llvm {
-
-class DFAPacketizer;
-class InstrItineraryData;
-class LiveVariables;
-class MachineMemOperand;
-class MachineRegisterInfo;
-class MCAsmInfo;
-class MCInst;
-struct MCSchedModel;
-class Module;
-class ScheduleDAG;
-class ScheduleHazardRecognizer;
-class SDNode;
-class SelectionDAG;
-class RegScavenger;
-class TargetRegisterClass;
-class TargetRegisterInfo;
-class TargetSchedModel;
-class TargetSubtargetInfo;
-
-template<class T> class SmallVectorImpl;
-
-//---------------------------------------------------------------------------
-///
-/// TargetInstrInfo - Interface to description of machine instruction set
-///
-class TargetInstrInfo : public MCInstrInfo {
-public:
-  TargetInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u,
-                  unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u)
-      : CallFrameSetupOpcode(CFSetupOpcode),
-        CallFrameDestroyOpcode(CFDestroyOpcode),
-        CatchRetOpcode(CatchRetOpcode),
-        ReturnOpcode(ReturnOpcode) {}
-  TargetInstrInfo(const TargetInstrInfo &) = delete;
-  TargetInstrInfo &operator=(const TargetInstrInfo &) = delete;
-  virtual ~TargetInstrInfo();
-
-  static bool isGenericOpcode(unsigned Opc) {
-    return Opc <= TargetOpcode::GENERIC_OP_END;
-  }
-
-  /// Given a machine instruction descriptor, returns the register
-  /// class constraint for OpNum, or NULL.
-  const TargetRegisterClass *getRegClass(const MCInstrDesc &TID,
-                                         unsigned OpNum,
-                                         const TargetRegisterInfo *TRI,
-                                         const MachineFunction &MF) const;
-
-  /// Return true if the instruction is trivially rematerializable, meaning it
-  /// has no side effects and requires no operands that aren't always available.
-  /// This means the only allowed uses are constants and unallocatable physical
-  /// registers so that the instructions result is independent of the place
-  /// in the function.
-  bool isTriviallyReMaterializable(const MachineInstr &MI,
-                                   AliasAnalysis *AA = nullptr) const {
-    return MI.getOpcode() == TargetOpcode::IMPLICIT_DEF ||
-           (MI.getDesc().isRematerializable() &&
-            (isReallyTriviallyReMaterializable(MI, AA) ||
-             isReallyTriviallyReMaterializableGeneric(MI, AA)));
-  }
-
-protected:
-  /// For instructions with opcodes for which the M_REMATERIALIZABLE flag is
-  /// set, this hook lets the target specify whether the instruction is actually
-  /// trivially rematerializable, taking into consideration its operands. This
-  /// predicate must return false if the instruction has any side effects other
-  /// than producing a value, or if it requres any address registers that are
-  /// not always available.
-  /// Requirements must be check as stated in isTriviallyReMaterializable() .
-  virtual bool isReallyTriviallyReMaterializable(const MachineInstr &MI,
-                                                 AliasAnalysis *AA) const {
-    return false;
-  }
-
-  /// This method commutes the operands of the given machine instruction MI.
-  /// The operands to be commuted are specified by their indices OpIdx1 and
-  /// OpIdx2.
-  ///
-  /// If a target has any instructions that are commutable but require
-  /// converting to different instructions or making non-trivial changes
-  /// to commute them, this method can be overloaded to do that.
-  /// The default implementation simply swaps the commutable operands.
-  ///
-  /// If NewMI is false, MI is modified in place and returned; otherwise, a
-  /// new machine instruction is created and returned.
-  ///
-  /// Do not call this method for a non-commutable instruction.
-  /// Even though the instruction is commutable, the method may still
-  /// fail to commute the operands, null pointer is returned in such cases.
-  virtual MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
-                                               unsigned OpIdx1,
-                                               unsigned OpIdx2) const;
-
-  /// Assigns the (CommutableOpIdx1, CommutableOpIdx2) pair of commutable
-  /// operand indices to (ResultIdx1, ResultIdx2).
-  /// One or both input values of the pair: (ResultIdx1, ResultIdx2) may be
-  /// predefined to some indices or be undefined (designated by the special
-  /// value 'CommuteAnyOperandIndex').
-  /// The predefined result indices cannot be re-defined.
-  /// The function returns true iff after the result pair redefinition
-  /// the fixed result pair is equal to or equivalent to the source pair of
-  /// indices: (CommutableOpIdx1, CommutableOpIdx2). It is assumed here that
-  /// the pairs (x,y) and (y,x) are equivalent.
-  static bool fixCommutedOpIndices(unsigned &ResultIdx1,
-                                   unsigned &ResultIdx2,
-                                   unsigned CommutableOpIdx1,
-                                   unsigned CommutableOpIdx2);
-
-private:
-  /// For instructions with opcodes for which the M_REMATERIALIZABLE flag is
-  /// set and the target hook isReallyTriviallyReMaterializable returns false,
-  /// this function does target-independent tests to determine if the
-  /// instruction is really trivially rematerializable.
-  bool isReallyTriviallyReMaterializableGeneric(const MachineInstr &MI,
-                                                AliasAnalysis *AA) const;
-
-public:
-  /// These methods return the opcode of the frame setup/destroy instructions
-  /// if they exist (-1 otherwise).  Some targets use pseudo instructions in
-  /// order to abstract away the difference between operating with a frame
-  /// pointer and operating without, through the use of these two instructions.
-  ///
-  unsigned getCallFrameSetupOpcode() const { return CallFrameSetupOpcode; }
-  unsigned getCallFrameDestroyOpcode() const { return CallFrameDestroyOpcode; }
-
-  /// Returns true if the argument is a frame pseudo instruction.
-  bool isFrameInstr(const MachineInstr &I) const {
-    return I.getOpcode() == getCallFrameSetupOpcode() ||
-      I.getOpcode() == getCallFrameDestroyOpcode();
-  }
-
-  /// Returns true if the argument is a frame setup pseudo instruction.
-  bool isFrameSetup(const MachineInstr &I) const {
-    return I.getOpcode() == getCallFrameSetupOpcode();
-  }
-
-  /// Returns size of the frame associated with the given frame instruction.
-  /// For frame setup instruction this is frame that is set up space set up
-  /// after the instruction. For frame destroy instruction this is the frame
-  /// freed by the caller.
-  /// Note, in some cases a call frame (or a part of it) may be prepared prior
-  /// to the frame setup instruction. It occurs in the calls that involve
-  /// inalloca arguments. This function reports only the size of the frame part
-  /// that is set up between the frame setup and destroy pseudo instructions.
-  int64_t getFrameSize(const MachineInstr &I) const {
-    assert(isFrameInstr(I) && "Not a frame instruction");
-    assert(I.getOperand(0).getImm() >= 0);
-    return I.getOperand(0).getImm();
-  }
-
-  /// Returns the total frame size, which is made up of the space set up inside
-  /// the pair of frame start-stop instructions and the space that is set up
-  /// prior to the pair.
-  int64_t getFrameTotalSize(const MachineInstr &I) const {
-    if (isFrameSetup(I)) {
-      assert(I.getOperand(1).getImm() >= 0 && "Frame size must not be negative");
-      return getFrameSize(I) + I.getOperand(1).getImm();
-    }
-    return getFrameSize(I);
-  }
-
-  unsigned getCatchReturnOpcode() const { return CatchRetOpcode; }
-  unsigned getReturnOpcode() const { return ReturnOpcode; }
-
-  /// Returns the actual stack pointer adjustment made by an instruction
-  /// as part of a call sequence. By default, only call frame setup/destroy
-  /// instructions adjust the stack, but targets may want to override this
-  /// to enable more fine-grained adjustment, or adjust by a different value.
-  virtual int getSPAdjust(const MachineInstr &MI) const;
-
-  /// Return true if the instruction is a "coalescable" extension instruction.
-  /// That is, it's like a copy where it's legal for the source to overlap the
-  /// destination. e.g. X86::MOVSX64rr32. If this returns true, then it's
-  /// expected the pre-extension value is available as a subreg of the result
-  /// register. This also returns the sub-register index in SubIdx.
-  virtual bool isCoalescableExtInstr(const MachineInstr &MI,
-                                     unsigned &SrcReg, unsigned &DstReg,
-                                     unsigned &SubIdx) const {
-    return false;
-  }
-
-  /// If the specified machine instruction is a direct
-  /// load from a stack slot, return the virtual or physical register number of
-  /// the destination along with the FrameIndex of the loaded stack slot.  If
-  /// not, return 0.  This predicate must return 0 if the instruction has
-  /// any side effects other than loading from the stack slot.
-  virtual unsigned isLoadFromStackSlot(const MachineInstr &MI,
-                                       int &FrameIndex) const {
-    return 0;
-  }
-
-  /// Check for post-frame ptr elimination stack locations as well.
-  /// This uses a heuristic so it isn't reliable for correctness.
-  virtual unsigned isLoadFromStackSlotPostFE(const MachineInstr &MI,
-                                             int &FrameIndex) const {
-    return 0;
-  }
-
-  /// If the specified machine instruction has a load from a stack slot,
-  /// return true along with the FrameIndex of the loaded stack slot and the
-  /// machine mem operand containing the reference.
-  /// If not, return false.  Unlike isLoadFromStackSlot, this returns true for
-  /// any instructions that loads from the stack.  This is just a hint, as some
-  /// cases may be missed.
-  virtual bool hasLoadFromStackSlot(const MachineInstr &MI,
-                                    const MachineMemOperand *&MMO,
-                                    int &FrameIndex) const;
-
-  /// If the specified machine instruction is a direct
-  /// store to a stack slot, return the virtual or physical register number of
-  /// the source reg along with the FrameIndex of the loaded stack slot.  If
-  /// not, return 0.  This predicate must return 0 if the instruction has
-  /// any side effects other than storing to the stack slot.
-  virtual unsigned isStoreToStackSlot(const MachineInstr &MI,
-                                      int &FrameIndex) const {
-    return 0;
-  }
-
-  /// Check for post-frame ptr elimination stack locations as well.
-  /// This uses a heuristic, so it isn't reliable for correctness.
-  virtual unsigned isStoreToStackSlotPostFE(const MachineInstr &MI,
-                                            int &FrameIndex) const {
-    return 0;
-  }
-
-  /// If the specified machine instruction has a store to a stack slot,
-  /// return true along with the FrameIndex of the loaded stack slot and the
-  /// machine mem operand containing the reference.
-  /// If not, return false.  Unlike isStoreToStackSlot,
-  /// this returns true for any instructions that stores to the
-  /// stack.  This is just a hint, as some cases may be missed.
-  virtual bool hasStoreToStackSlot(const MachineInstr &MI,
-                                   const MachineMemOperand *&MMO,
-                                   int &FrameIndex) const;
-
-  /// Return true if the specified machine instruction
-  /// is a copy of one stack slot to another and has no other effect.
-  /// Provide the identity of the two frame indices.
-  virtual bool isStackSlotCopy(const MachineInstr &MI, int &DestFrameIndex,
-                               int &SrcFrameIndex) const {
-    return false;
-  }
-
-  /// Compute the size in bytes and offset within a stack slot of a spilled
-  /// register or subregister.
-  ///
-  /// \param [out] Size in bytes of the spilled value.
-  /// \param [out] Offset in bytes within the stack slot.
-  /// \returns true if both Size and Offset are successfully computed.
-  ///
-  /// Not all subregisters have computable spill slots. For example,
-  /// subregisters registers may not be byte-sized, and a pair of discontiguous
-  /// subregisters has no single offset.
-  ///
-  /// Targets with nontrivial bigendian implementations may need to override
-  /// this, particularly to support spilled vector registers.
-  virtual bool getStackSlotRange(const TargetRegisterClass *RC, unsigned SubIdx,
-                                 unsigned &Size, unsigned &Offset,
-                                 const MachineFunction &MF) const;
-
-  /// Returns the size in bytes of the specified MachineInstr, or ~0U
-  /// when this function is not implemented by a target.
-  virtual unsigned getInstSizeInBytes(const MachineInstr &MI) const {
-    return ~0U;
-  }
-
-  /// Return true if the instruction is as cheap as a move instruction.
-  ///
-  /// Targets for different archs need to override this, and different
-  /// micro-architectures can also be finely tuned inside.
-  virtual bool isAsCheapAsAMove(const MachineInstr &MI) const {
-    return MI.isAsCheapAsAMove();
-  }
-
-  /// Return true if the instruction should be sunk by MachineSink.
-  ///
-  /// MachineSink determines on its own whether the instruction is safe to sink;
-  /// this gives the target a hook to override the default behavior with regards
-  /// to which instructions should be sunk.
-  virtual bool shouldSink(const MachineInstr &MI) const {
-    return true;
-  }
-
-  /// Re-issue the specified 'original' instruction at the
-  /// specific location targeting a new destination register.
-  /// The register in Orig->getOperand(0).getReg() will be substituted by
-  /// DestReg:SubIdx. Any existing subreg index is preserved or composed with
-  /// SubIdx.
-  virtual void reMaterialize(MachineBasicBlock &MBB,
-                             MachineBasicBlock::iterator MI, unsigned DestReg,
-                             unsigned SubIdx, const MachineInstr &Orig,
-                             const TargetRegisterInfo &TRI) const;
-
-  /// Create a duplicate of the Orig instruction in MF. This is like
-  /// MachineFunction::CloneMachineInstr(), but the target may update operands
-  /// that are required to be unique.
-  ///
-  /// The instruction must be duplicable as indicated by isNotDuplicable().
-  virtual MachineInstr *duplicate(MachineInstr &Orig,
-                                  MachineFunction &MF) const;
-
-  /// This method must be implemented by targets that
-  /// set the M_CONVERTIBLE_TO_3_ADDR flag.  When this flag is set, the target
-  /// may be able to convert a two-address instruction into one or more true
-  /// three-address instructions on demand.  This allows the X86 target (for
-  /// example) to convert ADD and SHL instructions into LEA instructions if they
-  /// would require register copies due to two-addressness.
-  ///
-  /// This method returns a null pointer if the transformation cannot be
-  /// performed, otherwise it returns the last new instruction.
-  ///
-  virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
-                                              MachineInstr &MI,
-                                              LiveVariables *LV) const {
-    return nullptr;
-  }
-
-  // This constant can be used as an input value of operand index passed to
-  // the method findCommutedOpIndices() to tell the method that the
-  // corresponding operand index is not pre-defined and that the method
-  // can pick any commutable operand.
-  static const unsigned CommuteAnyOperandIndex = ~0U;
-
-  /// This method commutes the operands of the given machine instruction MI.
-  ///
-  /// The operands to be commuted are specified by their indices OpIdx1 and
-  /// OpIdx2. OpIdx1 and OpIdx2 arguments may be set to a special value
-  /// 'CommuteAnyOperandIndex', which means that the method is free to choose
-  /// any arbitrarily chosen commutable operand. If both arguments are set to
-  /// 'CommuteAnyOperandIndex' then the method looks for 2 different commutable
-  /// operands; then commutes them if such operands could be found.
-  ///
-  /// If NewMI is false, MI is modified in place and returned; otherwise, a
-  /// new machine instruction is created and returned.
-  ///
-  /// Do not call this method for a non-commutable instruction or
-  /// for non-commuable operands.
-  /// Even though the instruction is commutable, the method may still
-  /// fail to commute the operands, null pointer is returned in such cases.
-  MachineInstr *
-  commuteInstruction(MachineInstr &MI, bool NewMI = false,
-                     unsigned OpIdx1 = CommuteAnyOperandIndex,
-                     unsigned OpIdx2 = CommuteAnyOperandIndex) const;
-
-  /// Returns true iff the routine could find two commutable operands in the
-  /// given machine instruction.
-  /// The 'SrcOpIdx1' and 'SrcOpIdx2' are INPUT and OUTPUT arguments.
-  /// If any of the INPUT values is set to the special value
-  /// 'CommuteAnyOperandIndex' then the method arbitrarily picks a commutable
-  /// operand, then returns its index in the corresponding argument.
-  /// If both of INPUT values are set to 'CommuteAnyOperandIndex' then method
-  /// looks for 2 commutable operands.
-  /// If INPUT values refer to some operands of MI, then the method simply
-  /// returns true if the corresponding operands are commutable and returns
-  /// false otherwise.
-  ///
-  /// For example, calling this method this way:
-  ///     unsigned Op1 = 1, Op2 = CommuteAnyOperandIndex;
-  ///     findCommutedOpIndices(MI, Op1, Op2);
-  /// can be interpreted as a query asking to find an operand that would be
-  /// commutable with the operand#1.
-  virtual bool findCommutedOpIndices(MachineInstr &MI, unsigned &SrcOpIdx1,
-                                     unsigned &SrcOpIdx2) const;
-
-  /// A pair composed of a register and a sub-register index.
-  /// Used to give some type checking when modeling Reg:SubReg.
-  struct RegSubRegPair {
-    unsigned Reg;
-    unsigned SubReg;
-
-    RegSubRegPair(unsigned Reg = 0, unsigned SubReg = 0)
-        : Reg(Reg), SubReg(SubReg) {}
-  };
-
-  /// A pair composed of a pair of a register and a sub-register index,
-  /// and another sub-register index.
-  /// Used to give some type checking when modeling Reg:SubReg1, SubReg2.
-  struct RegSubRegPairAndIdx : RegSubRegPair {
-    unsigned SubIdx;
-
-    RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0,
-                        unsigned SubIdx = 0)
-        : RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {}
-  };
-
-  /// Build the equivalent inputs of a REG_SEQUENCE for the given \p MI
-  /// and \p DefIdx.
-  /// \p [out] InputRegs of the equivalent REG_SEQUENCE. Each element of
-  /// the list is modeled as <Reg:SubReg, SubIdx>.
-  /// E.g., REG_SEQUENCE vreg1:sub1, sub0, vreg2, sub1 would produce
-  /// two elements:
-  /// - vreg1:sub1, sub0
-  /// - vreg2<:0>, sub1
-  ///
-  /// \returns true if it is possible to build such an input sequence
-  /// with the pair \p MI, \p DefIdx. False otherwise.
-  ///
-  /// \pre MI.isRegSequence() or MI.isRegSequenceLike().
-  ///
-  /// \note The generic implementation does not provide any support for
-  /// MI.isRegSequenceLike(). In other words, one has to override
-  /// getRegSequenceLikeInputs for target specific instructions.
-  bool
-  getRegSequenceInputs(const MachineInstr &MI, unsigned DefIdx,
-                       SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const;
-
-  /// Build the equivalent inputs of a EXTRACT_SUBREG for the given \p MI
-  /// and \p DefIdx.
-  /// \p [out] InputReg of the equivalent EXTRACT_SUBREG.
-  /// E.g., EXTRACT_SUBREG vreg1:sub1, sub0, sub1 would produce:
-  /// - vreg1:sub1, sub0
-  ///
-  /// \returns true if it is possible to build such an input sequence
-  /// with the pair \p MI, \p DefIdx. False otherwise.
-  ///
-  /// \pre MI.isExtractSubreg() or MI.isExtractSubregLike().
-  ///
-  /// \note The generic implementation does not provide any support for
-  /// MI.isExtractSubregLike(). In other words, one has to override
-  /// getExtractSubregLikeInputs for target specific instructions.
-  bool
-  getExtractSubregInputs(const MachineInstr &MI, unsigned DefIdx,
-                         RegSubRegPairAndIdx &InputReg) const;
-
-  /// Build the equivalent inputs of a INSERT_SUBREG for the given \p MI
-  /// and \p DefIdx.
-  /// \p [out] BaseReg and \p [out] InsertedReg contain
-  /// the equivalent inputs of INSERT_SUBREG.
-  /// E.g., INSERT_SUBREG vreg0:sub0, vreg1:sub1, sub3 would produce:
-  /// - BaseReg: vreg0:sub0
-  /// - InsertedReg: vreg1:sub1, sub3
-  ///
-  /// \returns true if it is possible to build such an input sequence
-  /// with the pair \p MI, \p DefIdx. False otherwise.
-  ///
-  /// \pre MI.isInsertSubreg() or MI.isInsertSubregLike().
-  ///
-  /// \note The generic implementation does not provide any support for
-  /// MI.isInsertSubregLike(). In other words, one has to override
-  /// getInsertSubregLikeInputs for target specific instructions.
-  bool
-  getInsertSubregInputs(const MachineInstr &MI, unsigned DefIdx,
-                        RegSubRegPair &BaseReg,
-                        RegSubRegPairAndIdx &InsertedReg) const;
-
-  /// Return true if two machine instructions would produce identical values.
-  /// By default, this is only true when the two instructions
-  /// are deemed identical except for defs. If this function is called when the
-  /// IR is still in SSA form, the caller can pass the MachineRegisterInfo for
-  /// aggressive checks.
-  virtual bool produceSameValue(const MachineInstr &MI0,
-                                const MachineInstr &MI1,
-                                const MachineRegisterInfo *MRI = nullptr) const;
-
-  /// \returns true if a branch from an instruction with opcode \p BranchOpc
-  ///  bytes is capable of jumping to a position \p BrOffset bytes away.
-  virtual bool isBranchOffsetInRange(unsigned BranchOpc,
-                                     int64_t BrOffset) const {
-    llvm_unreachable("target did not implement");
-  }
-
-  /// \returns The block that branch instruction \p MI jumps to.
-  virtual MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const {
-    llvm_unreachable("target did not implement");
-  }
-
-  /// Insert an unconditional indirect branch at the end of \p MBB to \p
-  /// NewDestBB.  \p BrOffset indicates the offset of \p NewDestBB relative to
-  /// the offset of the position to insert the new branch.
-  ///
-  /// \returns The number of bytes added to the block.
-  virtual unsigned insertIndirectBranch(MachineBasicBlock &MBB,
-                                        MachineBasicBlock &NewDestBB,
-                                        const DebugLoc &DL,
-                                        int64_t BrOffset = 0,
-                                        RegScavenger *RS = nullptr) const {
-    llvm_unreachable("target did not implement");
-  }
-
-  /// Analyze the branching code at the end of MBB, returning
-  /// true if it cannot be understood (e.g. it's a switch dispatch or isn't
-  /// implemented for a target).  Upon success, this returns false and returns
-  /// with the following information in various cases:
-  ///
-  /// 1. If this block ends with no branches (it just falls through to its succ)
-  ///    just return false, leaving TBB/FBB null.
-  /// 2. If this block ends with only an unconditional branch, it sets TBB to be
-  ///    the destination block.
-  /// 3. If this block ends with a conditional branch and it falls through to a
-  ///    successor block, it sets TBB to be the branch destination block and a
-  ///    list of operands that evaluate the condition. These operands can be
-  ///    passed to other TargetInstrInfo methods to create new branches.
-  /// 4. If this block ends with a conditional branch followed by an
-  ///    unconditional branch, it returns the 'true' destination in TBB, the
-  ///    'false' destination in FBB, and a list of operands that evaluate the
-  ///    condition.  These operands can be passed to other TargetInstrInfo
-  ///    methods to create new branches.
-  ///
-  /// Note that removeBranch and insertBranch must be implemented to support
-  /// cases where this method returns success.
-  ///
-  /// If AllowModify is true, then this routine is allowed to modify the basic
-  /// block (e.g. delete instructions after the unconditional branch).
-  ///
-  /// The CFG information in MBB.Predecessors and MBB.Successors must be valid
-  /// before calling this function.
-  virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
-                             MachineBasicBlock *&FBB,
-                             SmallVectorImpl<MachineOperand> &Cond,
-                             bool AllowModify = false) const {
-    return true;
-  }
-
-  /// Represents a predicate at the MachineFunction level.  The control flow a
-  /// MachineBranchPredicate represents is:
-  ///
-  ///  Reg <def>= LHS `Predicate` RHS         == ConditionDef
-  ///  if Reg then goto TrueDest else goto FalseDest
-  ///
-  struct MachineBranchPredicate {
-    enum ComparePredicate {
-      PRED_EQ,     // True if two values are equal
-      PRED_NE,     // True if two values are not equal
-      PRED_INVALID // Sentinel value
-    };
-
-    ComparePredicate Predicate = PRED_INVALID;
-    MachineOperand LHS = MachineOperand::CreateImm(0);
-    MachineOperand RHS = MachineOperand::CreateImm(0);
-    MachineBasicBlock *TrueDest = nullptr;
-    MachineBasicBlock *FalseDest = nullptr;
-    MachineInstr *ConditionDef = nullptr;
-
-    /// SingleUseCondition is true if ConditionDef is dead except for the
-    /// branch(es) at the end of the basic block.
-    ///
-    bool SingleUseCondition = false;
-
-    explicit MachineBranchPredicate() = default;
-  };
-
-  /// Analyze the branching code at the end of MBB and parse it into the
-  /// MachineBranchPredicate structure if possible.  Returns false on success
-  /// and true on failure.
-  ///
-  /// If AllowModify is true, then this routine is allowed to modify the basic
-  /// block (e.g. delete instructions after the unconditional branch).
-  ///
-  virtual bool analyzeBranchPredicate(MachineBasicBlock &MBB,
-                                      MachineBranchPredicate &MBP,
-                                      bool AllowModify = false) const {
-    return true;
-  }
-
-  /// Remove the branching code at the end of the specific MBB.
-  /// This is only invoked in cases where AnalyzeBranch returns success. It
-  /// returns the number of instructions that were removed.
-  /// If \p BytesRemoved is non-null, report the change in code size from the
-  /// removed instructions.
-  virtual unsigned removeBranch(MachineBasicBlock &MBB,
-                                int *BytesRemoved = nullptr) const {
-    llvm_unreachable("Target didn't implement TargetInstrInfo::removeBranch!");
-  }
-
-  /// Insert branch code into the end of the specified MachineBasicBlock. The
-  /// operands to this method are the same as those returned by AnalyzeBranch.
-  /// This is only invoked in cases where AnalyzeBranch returns success. It
-  /// returns the number of instructions inserted. If \p BytesAdded is non-null,
-  /// report the change in code size from the added instructions.
-  ///
-  /// It is also invoked by tail merging to add unconditional branches in
-  /// cases where AnalyzeBranch doesn't apply because there was no original
-  /// branch to analyze.  At least this much must be implemented, else tail
-  /// merging needs to be disabled.
-  ///
-  /// The CFG information in MBB.Predecessors and MBB.Successors must be valid
-  /// before calling this function.
-  virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
-                                MachineBasicBlock *FBB,
-                                ArrayRef<MachineOperand> Cond,
-                                const DebugLoc &DL,
-                                int *BytesAdded = nullptr) const {
-    llvm_unreachable("Target didn't implement TargetInstrInfo::insertBranch!");
-  }
-
-  unsigned insertUnconditionalBranch(MachineBasicBlock &MBB,
-                                     MachineBasicBlock *DestBB,
-                                     const DebugLoc &DL,
-                                     int *BytesAdded = nullptr) const {
-    return insertBranch(MBB, DestBB, nullptr,
-                        ArrayRef<MachineOperand>(), DL, BytesAdded);
-  }
-
-  /// Analyze the loop code, return true if it cannot be understoo. Upon
-  /// success, this function returns false and returns information about the
-  /// induction variable and compare instruction used at the end.
-  virtual bool analyzeLoop(MachineLoop &L, MachineInstr *&IndVarInst,
-                           MachineInstr *&CmpInst) const {
-    return true;
-  }
-
-  /// Generate code to reduce the loop iteration by one and check if the loop is
-  /// finished.  Return the value/register of the the new loop count.  We need
-  /// this function when peeling off one or more iterations of a loop. This
-  /// function assumes the nth iteration is peeled first.
-  virtual unsigned reduceLoopCount(MachineBasicBlock &MBB,
-                                   MachineInstr *IndVar, MachineInstr &Cmp,
-                                   SmallVectorImpl<MachineOperand> &Cond,
-                                   SmallVectorImpl<MachineInstr *> &PrevInsts,
-                                   unsigned Iter, unsigned MaxIter) const {
-    llvm_unreachable("Target didn't implement ReduceLoopCount");
-  }
-
-  /// Delete the instruction OldInst and everything after it, replacing it with
-  /// an unconditional branch to NewDest. This is used by the tail merging pass.
-  virtual void ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail,
-                                       MachineBasicBlock *NewDest) const;
-
-  /// Return true if it's legal to split the given basic
-  /// block at the specified instruction (i.e. instruction would be the start
-  /// of a new basic block).
-  virtual bool isLegalToSplitMBBAt(MachineBasicBlock &MBB,
-                                   MachineBasicBlock::iterator MBBI) const {
-    return true;
-  }
-
-  /// Return true if it's profitable to predicate
-  /// instructions with accumulated instruction latency of "NumCycles"
-  /// of the specified basic block, where the probability of the instructions
-  /// being executed is given by Probability, and Confidence is a measure
-  /// of our confidence that it will be properly predicted.
-  virtual
-  bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
-                           unsigned ExtraPredCycles,
-                           BranchProbability Probability) const {
-    return false;
-  }
-
-  /// Second variant of isProfitableToIfCvt. This one
-  /// checks for the case where two basic blocks from true and false path
-  /// of a if-then-else (diamond) are predicated on mutally exclusive
-  /// predicates, where the probability of the true path being taken is given
-  /// by Probability, and Confidence is a measure of our confidence that it
-  /// will be properly predicted.
-  virtual bool
-  isProfitableToIfCvt(MachineBasicBlock &TMBB,
-                      unsigned NumTCycles, unsigned ExtraTCycles,
-                      MachineBasicBlock &FMBB,
-                      unsigned NumFCycles, unsigned ExtraFCycles,
-                      BranchProbability Probability) const {
-    return false;
-  }
-
-  /// Return true if it's profitable for if-converter to duplicate instructions
-  /// of specified accumulated instruction latencies in the specified MBB to
-  /// enable if-conversion.
-  /// The probability of the instructions being executed is given by
-  /// Probability, and Confidence is a measure of our confidence that it
-  /// will be properly predicted.
-  virtual bool
-  isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
-                            BranchProbability Probability) const {
-    return false;
-  }
-
-  /// Return true if it's profitable to unpredicate
-  /// one side of a 'diamond', i.e. two sides of if-else predicated on mutually
-  /// exclusive predicates.
-  /// e.g.
-  ///   subeq  r0, r1, #1
-  ///   addne  r0, r1, #1
-  /// =>
-  ///   sub    r0, r1, #1
-  ///   addne  r0, r1, #1
-  ///
-  /// This may be profitable is conditional instructions are always executed.
-  virtual bool isProfitableToUnpredicate(MachineBasicBlock &TMBB,
-                                         MachineBasicBlock &FMBB) const {
-    return false;
-  }
-
-  /// Return true if it is possible to insert a select
-  /// instruction that chooses between TrueReg and FalseReg based on the
-  /// condition code in Cond.
-  ///
-  /// When successful, also return the latency in cycles from TrueReg,
-  /// FalseReg, and Cond to the destination register. In most cases, a select
-  /// instruction will be 1 cycle, so CondCycles = TrueCycles = FalseCycles = 1
-  ///
-  /// Some x86 implementations have 2-cycle cmov instructions.
-  ///
-  /// @param MBB         Block where select instruction would be inserted.
-  /// @param Cond        Condition returned by AnalyzeBranch.
-  /// @param TrueReg     Virtual register to select when Cond is true.
-  /// @param FalseReg    Virtual register to select when Cond is false.
-  /// @param CondCycles  Latency from Cond+Branch to select output.
-  /// @param TrueCycles  Latency from TrueReg to select output.
-  /// @param FalseCycles Latency from FalseReg to select output.
-  virtual bool canInsertSelect(const MachineBasicBlock &MBB,
-                               ArrayRef<MachineOperand> Cond,
-                               unsigned TrueReg, unsigned FalseReg,
-                               int &CondCycles,
-                               int &TrueCycles, int &FalseCycles) const {
-    return false;
-  }
-
-  /// Insert a select instruction into MBB before I that will copy TrueReg to
-  /// DstReg when Cond is true, and FalseReg to DstReg when Cond is false.
-  ///
-  /// This function can only be called after canInsertSelect() returned true.
-  /// The condition in Cond comes from AnalyzeBranch, and it can be assumed
-  /// that the same flags or registers required by Cond are available at the
-  /// insertion point.
-  ///
-  /// @param MBB      Block where select instruction should be inserted.
-  /// @param I        Insertion point.
-  /// @param DL       Source location for debugging.
-  /// @param DstReg   Virtual register to be defined by select instruction.
-  /// @param Cond     Condition as computed by AnalyzeBranch.
-  /// @param TrueReg  Virtual register to copy when Cond is true.
-  /// @param FalseReg Virtual register to copy when Cons is false.
-  virtual void insertSelect(MachineBasicBlock &MBB,
-                            MachineBasicBlock::iterator I, const DebugLoc &DL,
-                            unsigned DstReg, ArrayRef<MachineOperand> Cond,
-                            unsigned TrueReg, unsigned FalseReg) const {
-    llvm_unreachable("Target didn't implement TargetInstrInfo::insertSelect!");
-  }
-
-  /// Analyze the given select instruction, returning true if
-  /// it cannot be understood. It is assumed that MI->isSelect() is true.
-  ///
-  /// When successful, return the controlling condition and the operands that
-  /// determine the true and false result values.
-  ///
-  ///   Result = SELECT Cond, TrueOp, FalseOp
-  ///
-  /// Some targets can optimize select instructions, for example by predicating
-  /// the instruction defining one of the operands. Such targets should set
-  /// Optimizable.
-  ///
-  /// @param         MI Select instruction to analyze.
-  /// @param Cond    Condition controlling the select.
-  /// @param TrueOp  Operand number of the value selected when Cond is true.
-  /// @param FalseOp Operand number of the value selected when Cond is false.
-  /// @param Optimizable Returned as true if MI is optimizable.
-  /// @returns False on success.
-  virtual bool analyzeSelect(const MachineInstr &MI,
-                             SmallVectorImpl<MachineOperand> &Cond,
-                             unsigned &TrueOp, unsigned &FalseOp,
-                             bool &Optimizable) const {
-    assert(MI.getDesc().isSelect() && "MI must be a select instruction");
-    return true;
-  }
-
-  /// Given a select instruction that was understood by
-  /// analyzeSelect and returned Optimizable = true, attempt to optimize MI by
-  /// merging it with one of its operands. Returns NULL on failure.
-  ///
-  /// When successful, returns the new select instruction. The client is
-  /// responsible for deleting MI.
-  ///
-  /// If both sides of the select can be optimized, PreferFalse is used to pick
-  /// a side.
-  ///
-  /// @param MI          Optimizable select instruction.
-  /// @param NewMIs     Set that record all MIs in the basic block up to \p
-  /// MI. Has to be updated with any newly created MI or deleted ones.
-  /// @param PreferFalse Try to optimize FalseOp instead of TrueOp.
-  /// @returns Optimized instruction or NULL.
-  virtual MachineInstr *optimizeSelect(MachineInstr &MI,
-                                       SmallPtrSetImpl<MachineInstr *> &NewMIs,
-                                       bool PreferFalse = false) const {
-    // This function must be implemented if Optimizable is ever set.
-    llvm_unreachable("Target must implement TargetInstrInfo::optimizeSelect!");
-  }
-
-  /// Emit instructions to copy a pair of physical registers.
-  ///
-  /// This function should support copies within any legal register class as
-  /// well as any cross-class copies created during instruction selection.
-  ///
-  /// The source and destination registers may overlap, which may require a
-  /// careful implementation when multiple copy instructions are required for
-  /// large registers. See for example the ARM target.
-  virtual void copyPhysReg(MachineBasicBlock &MBB,
-                           MachineBasicBlock::iterator MI, const DebugLoc &DL,
-                           unsigned DestReg, unsigned SrcReg,
-                           bool KillSrc) const {
-    llvm_unreachable("Target didn't implement TargetInstrInfo::copyPhysReg!");
-  }
-
-  /// Store the specified register of the given register class to the specified
-  /// stack frame index. The store instruction is to be added to the given
-  /// machine basic block before the specified machine instruction. If isKill
-  /// is true, the register operand is the last use and must be marked kill.
-  virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
-                                   MachineBasicBlock::iterator MI,
-                                   unsigned SrcReg, bool isKill, int FrameIndex,
-                                   const TargetRegisterClass *RC,
-                                   const TargetRegisterInfo *TRI) const {
-    llvm_unreachable("Target didn't implement "
-                     "TargetInstrInfo::storeRegToStackSlot!");
-  }
-
-  /// Load the specified register of the given register class from the specified
-  /// stack frame index. The load instruction is to be added to the given
-  /// machine basic block before the specified machine instruction.
-  virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
-                                    MachineBasicBlock::iterator MI,
-                                    unsigned DestReg, int FrameIndex,
-                                    const TargetRegisterClass *RC,
-                                    const TargetRegisterInfo *TRI) const {
-    llvm_unreachable("Target didn't implement "
-                     "TargetInstrInfo::loadRegFromStackSlot!");
-  }
-
-  /// This function is called for all pseudo instructions
-  /// that remain after register allocation. Many pseudo instructions are
-  /// created to help register allocation. This is the place to convert them
-  /// into real instructions. The target can edit MI in place, or it can insert
-  /// new instructions and erase MI. The function should return true if
-  /// anything was changed.
-  virtual bool expandPostRAPseudo(MachineInstr &MI) const { return false; }
-
-  /// Check whether the target can fold a load that feeds a subreg operand
-  /// (or a subreg operand that feeds a store).
-  /// For example, X86 may want to return true if it can fold
-  /// movl (%esp), %eax
-  /// subb, %al, ...
-  /// Into:
-  /// subb (%esp), ...
-  ///
-  /// Ideally, we'd like the target implementation of foldMemoryOperand() to
-  /// reject subregs - but since this behavior used to be enforced in the
-  /// target-independent code, moving this responsibility to the targets
-  /// has the potential of causing nasty silent breakage in out-of-tree targets.
-  virtual bool isSubregFoldable() const { return false; }
-
-  /// Attempt to fold a load or store of the specified stack
-  /// slot into the specified machine instruction for the specified operand(s).
-  /// If this is possible, a new instruction is returned with the specified
-  /// operand folded, otherwise NULL is returned.
-  /// The new instruction is inserted before MI, and the client is responsible
-  /// for removing the old instruction.
-  MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
-                                  int FrameIndex,
-                                  LiveIntervals *LIS = nullptr) const;
-
-  /// Same as the previous version except it allows folding of any load and
-  /// store from / to any address, not just from a specific stack slot.
-  MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
-                                  MachineInstr &LoadMI,
-                                  LiveIntervals *LIS = nullptr) const;
-
-  /// Return true when there is potentially a faster code sequence
-  /// for an instruction chain ending in \p Root. All potential patterns are
-  /// returned in the \p Pattern vector. Pattern should be sorted in priority
-  /// order since the pattern evaluator stops checking as soon as it finds a
-  /// faster sequence.
-  /// \param Root - Instruction that could be combined with one of its operands
-  /// \param Patterns - Vector of possible combination patterns
-  virtual bool getMachineCombinerPatterns(
-      MachineInstr &Root,
-      SmallVectorImpl<MachineCombinerPattern> &Patterns) const;
-
-  /// Return true when a code sequence can improve throughput. It
-  /// should be called only for instructions in loops.
-  /// \param Pattern - combiner pattern
-  virtual bool isThroughputPattern(MachineCombinerPattern Pattern) const;
-
-  /// Return true if the input \P Inst is part of a chain of dependent ops
-  /// that are suitable for reassociation, otherwise return false.
-  /// If the instruction's operands must be commuted to have a previous
-  /// instruction of the same type define the first source operand, \P Commuted
-  /// will be set to true.
-  bool isReassociationCandidate(const MachineInstr &Inst, bool &Commuted) const;
-
-  /// Return true when \P Inst is both associative and commutative.
-  virtual bool isAssociativeAndCommutative(const MachineInstr &Inst) const {
-    return false;
-  }
-
-  /// Return true when \P Inst has reassociable operands in the same \P MBB.
-  virtual bool hasReassociableOperands(const MachineInstr &Inst,
-                                       const MachineBasicBlock *MBB) const;
-
-  /// Return true when \P Inst has reassociable sibling.
-  bool hasReassociableSibling(const MachineInstr &Inst, bool &Commuted) const;
-
-  /// When getMachineCombinerPatterns() finds patterns, this function generates
-  /// the instructions that could replace the original code sequence. The client
-  /// has to decide whether the actual replacement is beneficial or not.
-  /// \param Root - Instruction that could be combined with one of its operands
-  /// \param Pattern - Combination pattern for Root
-  /// \param InsInstrs - Vector of new instructions that implement P
-  /// \param DelInstrs - Old instructions, including Root, that could be
-  /// replaced by InsInstr
-  /// \param InstrIdxForVirtReg - map of virtual register to instruction in
-  /// InsInstr that defines it
-  virtual void genAlternativeCodeSequence(
-      MachineInstr &Root, MachineCombinerPattern Pattern,
-      SmallVectorImpl<MachineInstr *> &InsInstrs,
-      SmallVectorImpl<MachineInstr *> &DelInstrs,
-      DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const;
-
-  /// Attempt to reassociate \P Root and \P Prev according to \P Pattern to
-  /// reduce critical path length.
-  void reassociateOps(MachineInstr &Root, MachineInstr &Prev,
-                      MachineCombinerPattern Pattern,
-                      SmallVectorImpl<MachineInstr *> &InsInstrs,
-                      SmallVectorImpl<MachineInstr *> &DelInstrs,
-                      DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const;
-
-  /// This is an architecture-specific helper function of reassociateOps.
-  /// Set special operand attributes for new instructions after reassociation.
-  virtual void setSpecialOperandAttr(MachineInstr &OldMI1, MachineInstr &OldMI2,
-                                     MachineInstr &NewMI1,
-                                     MachineInstr &NewMI2) const {
-  }
-
-  /// Return true when a target supports MachineCombiner.
-  virtual bool useMachineCombiner() const { return false; }
-
-protected:
-  /// Target-dependent implementation for foldMemoryOperand.
-  /// Target-independent code in foldMemoryOperand will
-  /// take care of adding a MachineMemOperand to the newly created instruction.
-  /// The instruction and any auxiliary instructions necessary will be inserted
-  /// at InsertPt.
-  virtual MachineInstr *
-  foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
-                        ArrayRef<unsigned> Ops,
-                        MachineBasicBlock::iterator InsertPt, int FrameIndex,
-                        LiveIntervals *LIS = nullptr) const {
-    return nullptr;
-  }
-
-  /// Target-dependent implementation for foldMemoryOperand.
-  /// Target-independent code in foldMemoryOperand will
-  /// take care of adding a MachineMemOperand to the newly created instruction.
-  /// The instruction and any auxiliary instructions necessary will be inserted
-  /// at InsertPt.
-  virtual MachineInstr *foldMemoryOperandImpl(
-      MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
-      MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
-      LiveIntervals *LIS = nullptr) const {
-    return nullptr;
-  }
-
-  /// \brief Target-dependent implementation of getRegSequenceInputs.
-  ///
-  /// \returns true if it is possible to build the equivalent
-  /// REG_SEQUENCE inputs with the pair \p MI, \p DefIdx. False otherwise.
-  ///
-  /// \pre MI.isRegSequenceLike().
-  ///
-  /// \see TargetInstrInfo::getRegSequenceInputs.
-  virtual bool getRegSequenceLikeInputs(
-      const MachineInstr &MI, unsigned DefIdx,
-      SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const {
-    return false;
-  }
-
-  /// \brief Target-dependent implementation of getExtractSubregInputs.
-  ///
-  /// \returns true if it is possible to build the equivalent
-  /// EXTRACT_SUBREG inputs with the pair \p MI, \p DefIdx. False otherwise.
-  ///
-  /// \pre MI.isExtractSubregLike().
-  ///
-  /// \see TargetInstrInfo::getExtractSubregInputs.
-  virtual bool getExtractSubregLikeInputs(
-      const MachineInstr &MI, unsigned DefIdx,
-      RegSubRegPairAndIdx &InputReg) const {
-    return false;
-  }
-
-  /// \brief Target-dependent implementation of getInsertSubregInputs.
-  ///
-  /// \returns true if it is possible to build the equivalent
-  /// INSERT_SUBREG inputs with the pair \p MI, \p DefIdx. False otherwise.
-  ///
-  /// \pre MI.isInsertSubregLike().
-  ///
-  /// \see TargetInstrInfo::getInsertSubregInputs.
-  virtual bool
-  getInsertSubregLikeInputs(const MachineInstr &MI, unsigned DefIdx,
-                            RegSubRegPair &BaseReg,
-                            RegSubRegPairAndIdx &InsertedReg) const {
-    return false;
-  }
-
-public:
-  /// unfoldMemoryOperand - Separate a single instruction which folded a load or
-  /// a store or a load and a store into two or more instruction. If this is
-  /// possible, returns true as well as the new instructions by reference.
-  virtual bool
-  unfoldMemoryOperand(MachineFunction &MF, MachineInstr &MI, unsigned Reg,
-                      bool UnfoldLoad, bool UnfoldStore,
-                      SmallVectorImpl<MachineInstr *> &NewMIs) const {
-    return false;
-  }
-
-  virtual bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
-                                   SmallVectorImpl<SDNode*> &NewNodes) const {
-    return false;
-  }
-
-  /// Returns the opcode of the would be new
-  /// instruction after load / store are unfolded from an instruction of the
-  /// specified opcode. It returns zero if the specified unfolding is not
-  /// possible. If LoadRegIndex is non-null, it is filled in with the operand
-  /// index of the operand which will hold the register holding the loaded
-  /// value.
-  virtual unsigned getOpcodeAfterMemoryUnfold(unsigned Opc,
-                                      bool UnfoldLoad, bool UnfoldStore,
-                                      unsigned *LoadRegIndex = nullptr) const {
-    return 0;
-  }
-
-  /// This is used by the pre-regalloc scheduler to determine if two loads are
-  /// loading from the same base address. It should only return true if the base
-  /// pointers are the same and the only differences between the two addresses
-  /// are the offset. It also returns the offsets by reference.
-  virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
-                                    int64_t &Offset1, int64_t &Offset2) const {
-    return false;
-  }
-
-  /// This is a used by the pre-regalloc scheduler to determine (in conjunction
-  /// with areLoadsFromSameBasePtr) if two loads should be scheduled together.
-  /// On some targets if two loads are loading from
-  /// addresses in the same cache line, it's better if they are scheduled
-  /// together. This function takes two integers that represent the load offsets
-  /// from the common base address. It returns true if it decides it's desirable
-  /// to schedule the two loads together. "NumLoads" is the number of loads that
-  /// have already been scheduled after Load1.
-  virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
-                                       int64_t Offset1, int64_t Offset2,
-                                       unsigned NumLoads) const {
-    return false;
-  }
-
-  /// Get the base register and byte offset of an instruction that reads/writes
-  /// memory.
-  virtual bool getMemOpBaseRegImmOfs(MachineInstr &MemOp, unsigned &BaseReg,
-                                     int64_t &Offset,
-                                     const TargetRegisterInfo *TRI) const {
-    return false;
-  }
-
-  /// Return true if the instruction contains a base register and offset. If
-  /// true, the function also sets the operand position in the instruction
-  /// for the base register and offset.
-  virtual bool getBaseAndOffsetPosition(const MachineInstr &MI,
-                                        unsigned &BasePos,
-                                        unsigned &OffsetPos) const {
-    return false;
-  }
-
-  /// If the instruction is an increment of a constant value, return the amount.
-  virtual bool getIncrementValue(const MachineInstr &MI, int &Value) const {
-    return false;
-  }
-
-  /// Returns true if the two given memory operations should be scheduled
-  /// adjacent. Note that you have to add:
-  ///   DAG->addMutation(createLoadClusterDAGMutation(DAG->TII, DAG->TRI));
-  /// or
-  ///   DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
-  /// to TargetPassConfig::createMachineScheduler() to have an effect.
-  virtual bool shouldClusterMemOps(MachineInstr &FirstLdSt,
-                                   MachineInstr &SecondLdSt,
-                                   unsigned NumLoads) const {
-    llvm_unreachable("target did not implement shouldClusterMemOps()");
-  }
-
-  /// Reverses the branch condition of the specified condition list,
-  /// returning false on success and true if it cannot be reversed.
-  virtual
-  bool reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
-    return true;
-  }
-
-  /// Insert a noop into the instruction stream at the specified point.
-  virtual void insertNoop(MachineBasicBlock &MBB,
-                          MachineBasicBlock::iterator MI) const;
-
-  /// Return the noop instruction to use for a noop.
-  virtual void getNoop(MCInst &NopInst) const;
-
-  /// Return true for post-incremented instructions.
-  virtual bool isPostIncrement(const MachineInstr &MI) const {
-    return false;
-  }
-
-  /// Returns true if the instruction is already predicated.
-  virtual bool isPredicated(const MachineInstr &MI) const {
-    return false;
-  }
-
-  /// Returns true if the instruction is a
-  /// terminator instruction that has not been predicated.
-  virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const;
-
-  /// Returns true if MI is an unconditional tail call.
-  virtual bool isUnconditionalTailCall(const MachineInstr &MI) const {
-    return false;
-  }
-
-  /// Returns true if the tail call can be made conditional on BranchCond.
-  virtual bool
-  canMakeTailCallConditional(SmallVectorImpl<MachineOperand> &Cond,
-                             const MachineInstr &TailCall) const {
-    return false;
-  }
-
-  /// Replace the conditional branch in MBB with a conditional tail call.
-  virtual void replaceBranchWithTailCall(MachineBasicBlock &MBB,
-                                         SmallVectorImpl<MachineOperand> &Cond,
-                                         const MachineInstr &TailCall) const {
-    llvm_unreachable("Target didn't implement replaceBranchWithTailCall!");
-  }
-
-  /// Convert the instruction into a predicated instruction.
-  /// It returns true if the operation was successful.
-  virtual bool PredicateInstruction(MachineInstr &MI,
-                                    ArrayRef<MachineOperand> Pred) const;
-
-  /// Returns true if the first specified predicate
-  /// subsumes the second, e.g. GE subsumes GT.
-  virtual
-  bool SubsumesPredicate(ArrayRef<MachineOperand> Pred1,
-                         ArrayRef<MachineOperand> Pred2) const {
-    return false;
-  }
-
-  /// If the specified instruction defines any predicate
-  /// or condition code register(s) used for predication, returns true as well
-  /// as the definition predicate(s) by reference.
-  virtual bool DefinesPredicate(MachineInstr &MI,
-                                std::vector<MachineOperand> &Pred) const {
-    return false;
-  }
-
-  /// Return true if the specified instruction can be predicated.
-  /// By default, this returns true for every instruction with a
-  /// PredicateOperand.
-  virtual bool isPredicable(const MachineInstr &MI) const {
-    return MI.getDesc().isPredicable();
-  }
-
-  /// Return true if it's safe to move a machine
-  /// instruction that defines the specified register class.
-  virtual bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const {
-    return true;
-  }
-
-  /// Test if the given instruction should be considered a scheduling boundary.
-  /// This primarily includes labels and terminators.
-  virtual bool isSchedulingBoundary(const MachineInstr &MI,
-                                    const MachineBasicBlock *MBB,
-                                    const MachineFunction &MF) const;
-
-  /// Measure the specified inline asm to determine an approximation of its
-  /// length.
-  virtual unsigned getInlineAsmLength(const char *Str,
-                                      const MCAsmInfo &MAI) const;
-
-  /// Allocate and return a hazard recognizer to use for this target when
-  /// scheduling the machine instructions before register allocation.
-  virtual ScheduleHazardRecognizer*
-  CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
-                               const ScheduleDAG *DAG) const;
-
-  /// Allocate and return a hazard recognizer to use for this target when
-  /// scheduling the machine instructions before register allocation.
-  virtual ScheduleHazardRecognizer*
-  CreateTargetMIHazardRecognizer(const InstrItineraryData*,
-                                 const ScheduleDAG *DAG) const;
-
-  /// Allocate and return a hazard recognizer to use for this target when
-  /// scheduling the machine instructions after register allocation.
-  virtual ScheduleHazardRecognizer*
-  CreateTargetPostRAHazardRecognizer(const InstrItineraryData*,
-                                     const ScheduleDAG *DAG) const;
-
-  /// Allocate and return a hazard recognizer to use for by non-scheduling
-  /// passes.
-  virtual ScheduleHazardRecognizer*
-  CreateTargetPostRAHazardRecognizer(const MachineFunction &MF) const {
-    return nullptr;
-  }
-
-  /// Provide a global flag for disabling the PreRA hazard recognizer that
-  /// targets may choose to honor.
-  bool usePreRAHazardRecognizer() const;
-
-  /// For a comparison instruction, return the source registers
-  /// in SrcReg and SrcReg2 if having two register operands, and the value it
-  /// compares against in CmpValue. Return true if the comparison instruction
-  /// can be analyzed.
-  virtual bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,
-                              unsigned &SrcReg2, int &Mask, int &Value) const {
-    return false;
-  }
-
-  /// See if the comparison instruction can be converted
-  /// into something more efficient. E.g., on ARM most instructions can set the
-  /// flags register, obviating the need for a separate CMP.
-  virtual bool optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
-                                    unsigned SrcReg2, int Mask, int Value,
-                                    const MachineRegisterInfo *MRI) const {
-    return false;
-  }
-  virtual bool optimizeCondBranch(MachineInstr &MI) const { return false; }
-
-  /// Try to remove the load by folding it to a register operand at the use.
-  /// We fold the load instructions if and only if the
-  /// def and use are in the same BB. We only look at one load and see
-  /// whether it can be folded into MI. FoldAsLoadDefReg is the virtual register
-  /// defined by the load we are trying to fold. DefMI returns the machine
-  /// instruction that defines FoldAsLoadDefReg, and the function returns
-  /// the machine instruction generated due to folding.
-  virtual MachineInstr *optimizeLoadInstr(MachineInstr &MI,
-                                          const MachineRegisterInfo *MRI,
-                                          unsigned &FoldAsLoadDefReg,
-                                          MachineInstr *&DefMI) const {
-    return nullptr;
-  }
-
-  /// 'Reg' is known to be defined by a move immediate instruction,
-  /// try to fold the immediate into the use instruction.
-  /// If MRI->hasOneNonDBGUse(Reg) is true, and this function returns true,
-  /// then the caller may assume that DefMI has been erased from its parent
-  /// block. The caller may assume that it will not be erased by this
-  /// function otherwise.
-  virtual bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
-                             unsigned Reg, MachineRegisterInfo *MRI) const {
-    return false;
-  }
-
-  /// Return the number of u-operations the given machine
-  /// instruction will be decoded to on the target cpu. The itinerary's
-  /// IssueWidth is the number of microops that can be dispatched each
-  /// cycle. An instruction with zero microops takes no dispatch resources.
-  virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
-                                  const MachineInstr &MI) const;
-
-  /// Return true for pseudo instructions that don't consume any
-  /// machine resources in their current form. These are common cases that the
-  /// scheduler should consider free, rather than conservatively handling them
-  /// as instructions with no itinerary.
-  bool isZeroCost(unsigned Opcode) const {
-    return Opcode <= TargetOpcode::COPY;
-  }
-
-  virtual int getOperandLatency(const InstrItineraryData *ItinData,
-                                SDNode *DefNode, unsigned DefIdx,
-                                SDNode *UseNode, unsigned UseIdx) const;
-
-  /// Compute and return the use operand latency of a given pair of def and use.
-  /// In most cases, the static scheduling itinerary was enough to determine the
-  /// operand latency. But it may not be possible for instructions with variable
-  /// number of defs / uses.
-  ///
-  /// This is a raw interface to the itinerary that may be directly overridden
-  /// by a target. Use computeOperandLatency to get the best estimate of
-  /// latency.
-  virtual int getOperandLatency(const InstrItineraryData *ItinData,
-                                const MachineInstr &DefMI, unsigned DefIdx,
-                                const MachineInstr &UseMI,
-                                unsigned UseIdx) const;
-
-  /// Compute the instruction latency of a given instruction.
-  /// If the instruction has higher cost when predicated, it's returned via
-  /// PredCost.
-  virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
-                                   const MachineInstr &MI,
-                                   unsigned *PredCost = nullptr) const;
-
-  virtual unsigned getPredicationCost(const MachineInstr &MI) const;
-
-  virtual int getInstrLatency(const InstrItineraryData *ItinData,
-                              SDNode *Node) const;
-
-  /// Return the default expected latency for a def based on its opcode.
-  unsigned defaultDefLatency(const MCSchedModel &SchedModel,
-                             const MachineInstr &DefMI) const;
-
-  int computeDefOperandLatency(const InstrItineraryData *ItinData,
-                               const MachineInstr &DefMI) const;
-
-  /// Return true if this opcode has high latency to its result.
-  virtual bool isHighLatencyDef(int opc) const { return false; }
-
-  /// Compute operand latency between a def of 'Reg'
-  /// and a use in the current loop. Return true if the target considered
-  /// it 'high'. This is used by optimization passes such as machine LICM to
-  /// determine whether it makes sense to hoist an instruction out even in a
-  /// high register pressure situation.
-  virtual bool hasHighOperandLatency(const TargetSchedModel &SchedModel,
-                                     const MachineRegisterInfo *MRI,
-                                     const MachineInstr &DefMI, unsigned DefIdx,
-                                     const MachineInstr &UseMI,
-                                     unsigned UseIdx) const {
-    return false;
-  }
-
-  /// Compute operand latency of a def of 'Reg'. Return true
-  /// if the target considered it 'low'.
-  virtual bool hasLowDefLatency(const TargetSchedModel &SchedModel,
-                                const MachineInstr &DefMI,
-                                unsigned DefIdx) const;
-
-  /// Perform target-specific instruction verification.
-  virtual bool verifyInstruction(const MachineInstr &MI,
-                                 StringRef &ErrInfo) const {
-    return true;
-  }
-
-  /// Return the current execution domain and bit mask of
-  /// possible domains for instruction.
-  ///
-  /// Some micro-architectures have multiple execution domains, and multiple
-  /// opcodes that perform the same operation in different domains.  For
-  /// example, the x86 architecture provides the por, orps, and orpd
-  /// instructions that all do the same thing.  There is a latency penalty if a
-  /// register is written in one domain and read in another.
-  ///
-  /// This function returns a pair (domain, mask) containing the execution
-  /// domain of MI, and a bit mask of possible domains.  The setExecutionDomain
-  /// function can be used to change the opcode to one of the domains in the
-  /// bit mask.  Instructions whose execution domain can't be changed should
-  /// return a 0 mask.
-  ///
-  /// The execution domain numbers don't have any special meaning except domain
-  /// 0 is used for instructions that are not associated with any interesting
-  /// execution domain.
-  ///
-  virtual std::pair<uint16_t, uint16_t>
-  getExecutionDomain(const MachineInstr &MI) const {
-    return std::make_pair(0, 0);
-  }
-
-  /// Change the opcode of MI to execute in Domain.
-  ///
-  /// The bit (1 << Domain) must be set in the mask returned from
-  /// getExecutionDomain(MI).
-  virtual void setExecutionDomain(MachineInstr &MI, unsigned Domain) const {}
-
-  /// Returns the preferred minimum clearance
-  /// before an instruction with an unwanted partial register update.
-  ///
-  /// Some instructions only write part of a register, and implicitly need to
-  /// read the other parts of the register.  This may cause unwanted stalls
-  /// preventing otherwise unrelated instructions from executing in parallel in
-  /// an out-of-order CPU.
-  ///
-  /// For example, the x86 instruction cvtsi2ss writes its result to bits
-  /// [31:0] of the destination xmm register. Bits [127:32] are unaffected, so
-  /// the instruction needs to wait for the old value of the register to become
-  /// available:
-  ///
-  ///   addps %xmm1, %xmm0
-  ///   movaps %xmm0, (%rax)
-  ///   cvtsi2ss %rbx, %xmm0
-  ///
-  /// In the code above, the cvtsi2ss instruction needs to wait for the addps
-  /// instruction before it can issue, even though the high bits of %xmm0
-  /// probably aren't needed.
-  ///
-  /// This hook returns the preferred clearance before MI, measured in
-  /// instructions.  Other defs of MI's operand OpNum are avoided in the last N
-  /// instructions before MI.  It should only return a positive value for
-  /// unwanted dependencies.  If the old bits of the defined register have
-  /// useful values, or if MI is determined to otherwise read the dependency,
-  /// the hook should return 0.
-  ///
-  /// The unwanted dependency may be handled by:
-  ///
-  /// 1. Allocating the same register for an MI def and use.  That makes the
-  ///    unwanted dependency identical to a required dependency.
-  ///
-  /// 2. Allocating a register for the def that has no defs in the previous N
-  ///    instructions.
-  ///
-  /// 3. Calling breakPartialRegDependency() with the same arguments.  This
-  ///    allows the target to insert a dependency breaking instruction.
-  ///
-  virtual unsigned
-  getPartialRegUpdateClearance(const MachineInstr &MI, unsigned OpNum,
-                               const TargetRegisterInfo *TRI) const {
-    // The default implementation returns 0 for no partial register dependency.
-    return 0;
-  }
-
-  /// \brief Return the minimum clearance before an instruction that reads an
-  /// unused register.
-  ///
-  /// For example, AVX instructions may copy part of a register operand into
-  /// the unused high bits of the destination register.
-  ///
-  /// vcvtsi2sdq %rax, %xmm0<undef>, %xmm14
-  ///
-  /// In the code above, vcvtsi2sdq copies %xmm0[127:64] into %xmm14 creating a
-  /// false dependence on any previous write to %xmm0.
-  ///
-  /// This hook works similarly to getPartialRegUpdateClearance, except that it
-  /// does not take an operand index. Instead sets \p OpNum to the index of the
-  /// unused register.
-  virtual unsigned getUndefRegClearance(const MachineInstr &MI, unsigned &OpNum,
-                                        const TargetRegisterInfo *TRI) const {
-    // The default implementation returns 0 for no undef register dependency.
-    return 0;
-  }
-
-  /// Insert a dependency-breaking instruction
-  /// before MI to eliminate an unwanted dependency on OpNum.
-  ///
-  /// If it wasn't possible to avoid a def in the last N instructions before MI
-  /// (see getPartialRegUpdateClearance), this hook will be called to break the
-  /// unwanted dependency.
-  ///
-  /// On x86, an xorps instruction can be used as a dependency breaker:
-  ///
-  ///   addps %xmm1, %xmm0
-  ///   movaps %xmm0, (%rax)
-  ///   xorps %xmm0, %xmm0
-  ///   cvtsi2ss %rbx, %xmm0
-  ///
-  /// An <imp-kill> operand should be added to MI if an instruction was
-  /// inserted.  This ties the instructions together in the post-ra scheduler.
-  ///
-  virtual void breakPartialRegDependency(MachineInstr &MI, unsigned OpNum,
-                                         const TargetRegisterInfo *TRI) const {}
-
-  /// Create machine specific model for scheduling.
-  virtual DFAPacketizer *
-  CreateTargetScheduleState(const TargetSubtargetInfo &) const {
-    return nullptr;
-  }
-
-  /// Sometimes, it is possible for the target
-  /// to tell, even without aliasing information, that two MIs access different
-  /// memory addresses. This function returns true if two MIs access different
-  /// memory addresses and false otherwise.
-  ///
-  /// Assumes any physical registers used to compute addresses have the same
-  /// value for both instructions. (This is the most useful assumption for
-  /// post-RA scheduling.)
-  ///
-  /// See also MachineInstr::mayAlias, which is implemented on top of this
-  /// function.
-  virtual bool
-  areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb,
-                                  AliasAnalysis *AA = nullptr) const {
-    assert((MIa.mayLoad() || MIa.mayStore()) &&
-           "MIa must load from or modify a memory location");
-    assert((MIb.mayLoad() || MIb.mayStore()) &&
-           "MIb must load from or modify a memory location");
-    return false;
-  }
-
-  /// \brief Return the value to use for the MachineCSE's LookAheadLimit,
-  /// which is a heuristic used for CSE'ing phys reg defs.
-  virtual unsigned getMachineCSELookAheadLimit () const {
-    // The default lookahead is small to prevent unprofitable quadratic
-    // behavior.
-    return 5;
-  }
-
-  /// Return an array that contains the ids of the target indices (used for the
-  /// TargetIndex machine operand) and their names.
-  ///
-  /// MIR Serialization is able to serialize only the target indices that are
-  /// defined by this method.
-  virtual ArrayRef<std::pair<int, const char *>>
-  getSerializableTargetIndices() const {
-    return None;
-  }
-
-  /// Decompose the machine operand's target flags into two values - the direct
-  /// target flag value and any of bit flags that are applied.
-  virtual std::pair<unsigned, unsigned>
-  decomposeMachineOperandsTargetFlags(unsigned /*TF*/) const {
-    return std::make_pair(0u, 0u);
-  }
-
-  /// Return an array that contains the direct target flag values and their
-  /// names.
-  ///
-  /// MIR Serialization is able to serialize only the target flags that are
-  /// defined by this method.
-  virtual ArrayRef<std::pair<unsigned, const char *>>
-  getSerializableDirectMachineOperandTargetFlags() const {
-    return None;
-  }
-
-  /// Return an array that contains the bitmask target flag values and their
-  /// names.
-  ///
-  /// MIR Serialization is able to serialize only the target flags that are
-  /// defined by this method.
-  virtual ArrayRef<std::pair<unsigned, const char *>>
-  getSerializableBitmaskMachineOperandTargetFlags() const {
-    return None;
-  }
-
-  /// Return an array that contains the MMO target flag values and their
-  /// names.
-  ///
-  /// MIR Serialization is able to serialize only the MMO target flags that are
-  /// defined by this method.
-  virtual ArrayRef<std::pair<MachineMemOperand::Flags, const char *>>
-  getSerializableMachineMemOperandTargetFlags() const {
-    return None;
-  }
-
-  /// Determines whether \p Inst is a tail call instruction. Override this
-  /// method on targets that do not properly set MCID::Return and MCID::Call on
-  /// tail call instructions."
-  virtual bool isTailCall(const MachineInstr &Inst) const {
-    return Inst.isReturn() && Inst.isCall();
-  }
-
-  /// True if the instruction is bound to the top of its basic block and no
-  /// other instructions shall be inserted before it. This can be implemented
-  /// to prevent register allocator to insert spills before such instructions.
-  virtual bool isBasicBlockPrologue(const MachineInstr &MI) const {
-    return false;
-  }
-
-  /// \brief Return how many instructions would be saved by outlining a
-  /// sequence containing \p SequenceSize instructions that appears
-  /// \p Occurrences times in a module.
-  virtual unsigned getOutliningBenefit(size_t SequenceSize, size_t Occurrences,
-                                       bool CanBeTailCall) const {
-    llvm_unreachable(
-        "Target didn't implement TargetInstrInfo::getOutliningBenefit!");
-  }
-
-  /// Represents how an instruction should be mapped by the outliner.
-  /// \p Legal instructions are those which are safe to outline.
-  /// \p Illegal instructions are those which cannot be outlined.
-  /// \p Invisible instructions are instructions which can be outlined, but
-  /// shouldn't actually impact the outlining result.
-  enum MachineOutlinerInstrType {Legal, Illegal, Invisible};
-
-  /// Returns how or if \p MI should be outlined.
-  virtual MachineOutlinerInstrType getOutliningType(MachineInstr &MI) const {
-    llvm_unreachable(
-        "Target didn't implement TargetInstrInfo::getOutliningType!");
-  }
-
-  /// Insert a custom epilogue for outlined functions.
-  /// This may be empty, in which case no epilogue or return statement will be
-  /// emitted.
-  virtual void insertOutlinerEpilogue(MachineBasicBlock &MBB,
-                                      MachineFunction &MF,
-                                      bool IsTailCall) const {
-    llvm_unreachable(
-        "Target didn't implement TargetInstrInfo::insertOutlinerEpilogue!");
-  }
-
-  /// Insert a call to an outlined function into the program.
-  /// Returns an iterator to the spot where we inserted the call. This must be
-  /// implemented by the target.
-  virtual MachineBasicBlock::iterator
-  insertOutlinedCall(Module &M, MachineBasicBlock &MBB,
-                     MachineBasicBlock::iterator &It, MachineFunction &MF,
-                     bool IsTailCall) const {
-    llvm_unreachable(
-        "Target didn't implement TargetInstrInfo::insertOutlinedCall!");
-  }
-
-  /// Insert a custom prologue for outlined functions.
-  /// This may be empty, in which case no prologue will be emitted.
-  virtual void insertOutlinerPrologue(MachineBasicBlock &MBB,
-                                      MachineFunction &MF,
-                                      bool IsTailCall) const {
-    llvm_unreachable(
-        "Target didn't implement TargetInstrInfo::insertOutlinerPrologue!");
-  }
-
-  /// Return true if the function can safely be outlined from.
-  /// By default, this means that the function has no red zone.
-  virtual bool isFunctionSafeToOutlineFrom(MachineFunction &MF) const {
-    llvm_unreachable("Target didn't implement "
-                     "TargetInstrInfo::isFunctionSafeToOutlineFrom!");
-  }
-
-private:
-  unsigned CallFrameSetupOpcode, CallFrameDestroyOpcode;
-  unsigned CatchRetOpcode;
-  unsigned ReturnOpcode;
-};
-
-/// \brief Provide DenseMapInfo for TargetInstrInfo::RegSubRegPair.
-template<>
-struct DenseMapInfo<TargetInstrInfo::RegSubRegPair> {
-  using RegInfo = DenseMapInfo<unsigned>;
-
-  static inline TargetInstrInfo::RegSubRegPair getEmptyKey() {
-    return TargetInstrInfo::RegSubRegPair(RegInfo::getEmptyKey(),
-                         RegInfo::getEmptyKey());
-  }
-
-  static inline TargetInstrInfo::RegSubRegPair getTombstoneKey() {
-    return TargetInstrInfo::RegSubRegPair(RegInfo::getTombstoneKey(),
-                         RegInfo::getTombstoneKey());
-  }
-
-  /// \brief Reuse getHashValue implementation from
-  /// std::pair<unsigned, unsigned>.
-  static unsigned getHashValue(const TargetInstrInfo::RegSubRegPair &Val) {
-    std::pair<unsigned, unsigned> PairVal =
-        std::make_pair(Val.Reg, Val.SubReg);
-    return DenseMapInfo<std::pair<unsigned, unsigned>>::getHashValue(PairVal);
-  }
-
-  static bool isEqual(const TargetInstrInfo::RegSubRegPair &LHS,
-                      const TargetInstrInfo::RegSubRegPair &RHS) {
-    return RegInfo::isEqual(LHS.Reg, RHS.Reg) &&
-           RegInfo::isEqual(LHS.SubReg, RHS.SubReg);
-  }
-};
-
-} // end namespace llvm
-
-#endif // LLVM_TARGET_TARGETINSTRINFO_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetLowering.h b/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetLowering.h
deleted file mode 100644
index 23711d636c9a..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetLowering.h
+++ /dev/null
@@ -1,3493 +0,0 @@
-//===- llvm/Target/TargetLowering.h - Target Lowering Info ------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-///
-/// \file
-/// This file describes how to lower LLVM code to machine code.  This has two
-/// main components:
-///
-///  1. Which ValueTypes are natively supported by the target.
-///  2. Which operations are supported for supported ValueTypes.
-///  3. Cost thresholds for alternative implementations of certain operations.
-///
-/// In addition it has a few other components, like information about FP
-/// immediates.
-///
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_TARGETLOWERING_H
-#define LLVM_TARGET_TARGETLOWERING_H
-
-#include "llvm/ADT/APInt.h"
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/CodeGen/DAGCombine.h"
-#include "llvm/CodeGen/ISDOpcodes.h"
-#include "llvm/CodeGen/MachineValueType.h"
-#include "llvm/CodeGen/RuntimeLibcalls.h"
-#include "llvm/CodeGen/SelectionDAG.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
-#include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/IR/Attributes.h"
-#include "llvm/IR/CallSite.h"
-#include "llvm/IR/CallingConv.h"
-#include "llvm/IR/DataLayout.h"
-#include "llvm/IR/DerivedTypes.h"
-#include "llvm/IR/Function.h"
-#include "llvm/IR/IRBuilder.h"
-#include "llvm/IR/InlineAsm.h"
-#include "llvm/IR/Instruction.h"
-#include "llvm/IR/Instructions.h"
-#include "llvm/IR/Type.h"
-#include "llvm/MC/MCRegisterInfo.h"
-#include "llvm/Support/AtomicOrdering.h"
-#include "llvm/Support/Casting.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Target/TargetCallingConv.h"
-#include "llvm/Target/TargetMachine.h"
-#include <algorithm>
-#include <cassert>
-#include <climits>
-#include <cstdint>
-#include <iterator>
-#include <map>
-#include <string>
-#include <utility>
-#include <vector>
-
-namespace llvm {
-
-class BranchProbability;
-class CCState;
-class CCValAssign;
-class Constant;
-class FastISel;
-class FunctionLoweringInfo;
-class GlobalValue;
-class IntrinsicInst;
-struct KnownBits;
-class LLVMContext;
-class MachineBasicBlock;
-class MachineFunction;
-class MachineInstr;
-class MachineJumpTableInfo;
-class MachineLoop;
-class MachineRegisterInfo;
-class MCContext;
-class MCExpr;
-class Module;
-class TargetRegisterClass;
-class TargetLibraryInfo;
-class TargetRegisterInfo;
-class Value;
-
-namespace Sched {
-
-  enum Preference {
-    None,             // No preference
-    Source,           // Follow source order.
-    RegPressure,      // Scheduling for lowest register pressure.
-    Hybrid,           // Scheduling for both latency and register pressure.
-    ILP,              // Scheduling for ILP in low register pressure mode.
-    VLIW              // Scheduling for VLIW targets.
-  };
-
-} // end namespace Sched
-
-/// This base class for TargetLowering contains the SelectionDAG-independent
-/// parts that can be used from the rest of CodeGen.
-class TargetLoweringBase {
-public:
-  /// This enum indicates whether operations are valid for a target, and if not,
-  /// what action should be used to make them valid.
-  enum LegalizeAction : uint8_t {
-    Legal,      // The target natively supports this operation.
-    Promote,    // This operation should be executed in a larger type.
-    Expand,     // Try to expand this to other ops, otherwise use a libcall.
-    LibCall,    // Don't try to expand this to other ops, always use a libcall.
-    Custom      // Use the LowerOperation hook to implement custom lowering.
-  };
-
-  /// This enum indicates whether a types are legal for a target, and if not,
-  /// what action should be used to make them valid.
-  enum LegalizeTypeAction : uint8_t {
-    TypeLegal,           // The target natively supports this type.
-    TypePromoteInteger,  // Replace this integer with a larger one.
-    TypeExpandInteger,   // Split this integer into two of half the size.
-    TypeSoftenFloat,     // Convert this float to a same size integer type,
-                         // if an operation is not supported in target HW.
-    TypeExpandFloat,     // Split this float into two of half the size.
-    TypeScalarizeVector, // Replace this one-element vector with its element.
-    TypeSplitVector,     // Split this vector into two of half the size.
-    TypeWidenVector,     // This vector should be widened into a larger vector.
-    TypePromoteFloat     // Replace this float with a larger one.
-  };
-
-  /// LegalizeKind holds the legalization kind that needs to happen to EVT
-  /// in order to type-legalize it.
-  using LegalizeKind = std::pair<LegalizeTypeAction, EVT>;
-
-  /// Enum that describes how the target represents true/false values.
-  enum BooleanContent {
-    UndefinedBooleanContent,    // Only bit 0 counts, the rest can hold garbage.
-    ZeroOrOneBooleanContent,        // All bits zero except for bit 0.
-    ZeroOrNegativeOneBooleanContent // All bits equal to bit 0.
-  };
-
-  /// Enum that describes what type of support for selects the target has.
-  enum SelectSupportKind {
-    ScalarValSelect,      // The target supports scalar selects (ex: cmov).
-    ScalarCondVectorVal,  // The target supports selects with a scalar condition
-                          // and vector values (ex: cmov).
-    VectorMaskSelect      // The target supports vector selects with a vector
-                          // mask (ex: x86 blends).
-  };
-
-  /// Enum that specifies what an atomic load/AtomicRMWInst is expanded
-  /// to, if at all. Exists because different targets have different levels of
-  /// support for these atomic instructions, and also have different options
-  /// w.r.t. what they should expand to.
-  enum class AtomicExpansionKind {
-    None,    // Don't expand the instruction.
-    LLSC,    // Expand the instruction into loadlinked/storeconditional; used
-             // by ARM/AArch64.
-    LLOnly,  // Expand the (load) instruction into just a load-linked, which has
-             // greater atomic guarantees than a normal load.
-    CmpXChg, // Expand the instruction into cmpxchg; used by at least X86.
-  };
-
-  /// Enum that specifies when a multiplication should be expanded.
-  enum class MulExpansionKind {
-    Always,            // Always expand the instruction.
-    OnlyLegalOrCustom, // Only expand when the resulting instructions are legal
-                       // or custom.
-  };
-
-  class ArgListEntry {
-  public:
-    Value *Val = nullptr;
-    SDValue Node = SDValue();
-    Type *Ty = nullptr;
-    bool IsSExt : 1;
-    bool IsZExt : 1;
-    bool IsInReg : 1;
-    bool IsSRet : 1;
-    bool IsNest : 1;
-    bool IsByVal : 1;
-    bool IsInAlloca : 1;
-    bool IsReturned : 1;
-    bool IsSwiftSelf : 1;
-    bool IsSwiftError : 1;
-    uint16_t Alignment = 0;
-
-    ArgListEntry()
-        : IsSExt(false), IsZExt(false), IsInReg(false), IsSRet(false),
-          IsNest(false), IsByVal(false), IsInAlloca(false), IsReturned(false),
-          IsSwiftSelf(false), IsSwiftError(false) {}
-
-    void setAttributes(ImmutableCallSite *CS, unsigned ArgIdx);
-  };
-  using ArgListTy = std::vector<ArgListEntry>;
-
-  virtual void markLibCallAttributes(MachineFunction *MF, unsigned CC,
-                                     ArgListTy &Args) const {};
-
-  static ISD::NodeType getExtendForContent(BooleanContent Content) {
-    switch (Content) {
-    case UndefinedBooleanContent:
-      // Extend by adding rubbish bits.
-      return ISD::ANY_EXTEND;
-    case ZeroOrOneBooleanContent:
-      // Extend by adding zero bits.
-      return ISD::ZERO_EXTEND;
-    case ZeroOrNegativeOneBooleanContent:
-      // Extend by copying the sign bit.
-      return ISD::SIGN_EXTEND;
-    }
-    llvm_unreachable("Invalid content kind");
-  }
-
-  /// NOTE: The TargetMachine owns TLOF.
-  explicit TargetLoweringBase(const TargetMachine &TM);
-  TargetLoweringBase(const TargetLoweringBase &) = delete;
-  TargetLoweringBase &operator=(const TargetLoweringBase &) = delete;
-  virtual ~TargetLoweringBase() = default;
-
-protected:
-  /// \brief Initialize all of the actions to default values.
-  void initActions();
-
-public:
-  const TargetMachine &getTargetMachine() const { return TM; }
-
-  virtual bool useSoftFloat() const { return false; }
-
-  /// Return the pointer type for the given address space, defaults to
-  /// the pointer type from the data layout.
-  /// FIXME: The default needs to be removed once all the code is updated.
-  MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const {
-    return MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
-  }
-
-  /// Return the type for frame index, which is determined by
-  /// the alloca address space specified through the data layout.
-  MVT getFrameIndexTy(const DataLayout &DL) const {
-    return getPointerTy(DL, DL.getAllocaAddrSpace());
-  }
-
-  /// Return the type for operands of fence.
-  /// TODO: Let fence operands be of i32 type and remove this.
-  virtual MVT getFenceOperandTy(const DataLayout &DL) const {
-    return getPointerTy(DL);
-  }
-
-  /// EVT is not used in-tree, but is used by out-of-tree target.
-  /// A documentation for this function would be nice...
-  virtual MVT getScalarShiftAmountTy(const DataLayout &, EVT) const;
-
-  EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL) const;
-
-  /// Returns the type to be used for the index operand of:
-  /// ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT,
-  /// ISD::INSERT_SUBVECTOR, and ISD::EXTRACT_SUBVECTOR
-  virtual MVT getVectorIdxTy(const DataLayout &DL) const {
-    return getPointerTy(DL);
-  }
-
-  virtual bool isSelectSupported(SelectSupportKind /*kind*/) const {
-    return true;
-  }
-
-  /// Return true if multiple condition registers are available.
-  bool hasMultipleConditionRegisters() const {
-    return HasMultipleConditionRegisters;
-  }
-
-  /// Return true if the target has BitExtract instructions.
-  bool hasExtractBitsInsn() const { return HasExtractBitsInsn; }
-
-  /// Return the preferred vector type legalization action.
-  virtual TargetLoweringBase::LegalizeTypeAction
-  getPreferredVectorAction(EVT VT) const {
-    // The default action for one element vectors is to scalarize
-    if (VT.getVectorNumElements() == 1)
-      return TypeScalarizeVector;
-    // The default action for other vectors is to promote
-    return TypePromoteInteger;
-  }
-
-  // There are two general methods for expanding a BUILD_VECTOR node:
-  //  1. Use SCALAR_TO_VECTOR on the defined scalar values and then shuffle
-  //     them together.
-  //  2. Build the vector on the stack and then load it.
-  // If this function returns true, then method (1) will be used, subject to
-  // the constraint that all of the necessary shuffles are legal (as determined
-  // by isShuffleMaskLegal). If this function returns false, then method (2) is
-  // always used. The vector type, and the number of defined values, are
-  // provided.
-  virtual bool
-  shouldExpandBuildVectorWithShuffles(EVT /* VT */,
-                                      unsigned DefinedValues) const {
-    return DefinedValues < 3;
-  }
-
-  /// Return true if integer divide is usually cheaper than a sequence of
-  /// several shifts, adds, and multiplies for this target.
-  /// The definition of "cheaper" may depend on whether we're optimizing
-  /// for speed or for size.
-  virtual bool isIntDivCheap(EVT VT, AttributeList Attr) const { return false; }
-
-  /// Return true if the target can handle a standalone remainder operation.
-  virtual bool hasStandaloneRem(EVT VT) const {
-    return true;
-  }
-
-  /// Return true if SQRT(X) shouldn't be replaced with X*RSQRT(X).
-  virtual bool isFsqrtCheap(SDValue X, SelectionDAG &DAG) const {
-    // Default behavior is to replace SQRT(X) with X*RSQRT(X).
-    return false;
-  }
-
-  /// Reciprocal estimate status values used by the functions below.
-  enum ReciprocalEstimate : int {
-    Unspecified = -1,
-    Disabled = 0,
-    Enabled = 1
-  };
-
-  /// Return a ReciprocalEstimate enum value for a square root of the given type
-  /// based on the function's attributes. If the operation is not overridden by
-  /// the function's attributes, "Unspecified" is returned and target defaults
-  /// are expected to be used for instruction selection.
-  int getRecipEstimateSqrtEnabled(EVT VT, MachineFunction &MF) const;
-
-  /// Return a ReciprocalEstimate enum value for a division of the given type
-  /// based on the function's attributes. If the operation is not overridden by
-  /// the function's attributes, "Unspecified" is returned and target defaults
-  /// are expected to be used for instruction selection.
-  int getRecipEstimateDivEnabled(EVT VT, MachineFunction &MF) const;
-
-  /// Return the refinement step count for a square root of the given type based
-  /// on the function's attributes. If the operation is not overridden by
-  /// the function's attributes, "Unspecified" is returned and target defaults
-  /// are expected to be used for instruction selection.
-  int getSqrtRefinementSteps(EVT VT, MachineFunction &MF) const;
-
-  /// Return the refinement step count for a division of the given type based
-  /// on the function's attributes. If the operation is not overridden by
-  /// the function's attributes, "Unspecified" is returned and target defaults
-  /// are expected to be used for instruction selection.
-  int getDivRefinementSteps(EVT VT, MachineFunction &MF) const;
-
-  /// Returns true if target has indicated at least one type should be bypassed.
-  bool isSlowDivBypassed() const { return !BypassSlowDivWidths.empty(); }
-
-  /// Returns map of slow types for division or remainder with corresponding
-  /// fast types
-  const DenseMap<unsigned int, unsigned int> &getBypassSlowDivWidths() const {
-    return BypassSlowDivWidths;
-  }
-
-  /// Return true if Flow Control is an expensive operation that should be
-  /// avoided.
-  bool isJumpExpensive() const { return JumpIsExpensive; }
-
-  /// Return true if selects are only cheaper than branches if the branch is
-  /// unlikely to be predicted right.
-  bool isPredictableSelectExpensive() const {
-    return PredictableSelectIsExpensive;
-  }
-
-  /// If a branch or a select condition is skewed in one direction by more than
-  /// this factor, it is very likely to be predicted correctly.
-  virtual BranchProbability getPredictableBranchThreshold() const;
-
-  /// Return true if the following transform is beneficial:
-  /// fold (conv (load x)) -> (load (conv*)x)
-  /// On architectures that don't natively support some vector loads
-  /// efficiently, casting the load to a smaller vector of larger types and
-  /// loading is more efficient, however, this can be undone by optimizations in
-  /// dag combiner.
-  virtual bool isLoadBitCastBeneficial(EVT LoadVT,
-                                       EVT BitcastVT) const {
-    // Don't do if we could do an indexed load on the original type, but not on
-    // the new one.
-    if (!LoadVT.isSimple() || !BitcastVT.isSimple())
-      return true;
-
-    MVT LoadMVT = LoadVT.getSimpleVT();
-
-    // Don't bother doing this if it's just going to be promoted again later, as
-    // doing so might interfere with other combines.
-    if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
-        getTypeToPromoteTo(ISD::LOAD, LoadMVT) == BitcastVT.getSimpleVT())
-      return false;
-
-    return true;
-  }
-
-  /// Return true if the following transform is beneficial:
-  /// (store (y (conv x)), y*)) -> (store x, (x*))
-  virtual bool isStoreBitCastBeneficial(EVT StoreVT, EVT BitcastVT) const {
-    // Default to the same logic as loads.
-    return isLoadBitCastBeneficial(StoreVT, BitcastVT);
-  }
-
-  /// Return true if it is expected to be cheaper to do a store of a non-zero
-  /// vector constant with the given size and type for the address space than to
-  /// store the individual scalar element constants.
-  virtual bool storeOfVectorConstantIsCheap(EVT MemVT,
-                                            unsigned NumElem,
-                                            unsigned AddrSpace) const {
-    return false;
-  }
-
-  /// Should we merge stores after Legalization (generally
-  /// better quality) or before (simpler)
-  virtual bool mergeStoresAfterLegalization() const { return false; }
-
-  /// Returns if it's reasonable to merge stores to MemVT size.
-  virtual bool canMergeStoresTo(unsigned AS, EVT MemVT,
-                                const SelectionDAG &DAG) const {
-    return true;
-  }
-
-  /// \brief Return true if it is cheap to speculate a call to intrinsic cttz.
-  virtual bool isCheapToSpeculateCttz() const {
-    return false;
-  }
-
-  /// \brief Return true if it is cheap to speculate a call to intrinsic ctlz.
-  virtual bool isCheapToSpeculateCtlz() const {
-    return false;
-  }
-
-  /// \brief Return true if ctlz instruction is fast.
-  virtual bool isCtlzFast() const {
-    return false;
-  }
-
-  /// Return true if it is safe to transform an integer-domain bitwise operation
-  /// into the equivalent floating-point operation. This should be set to true
-  /// if the target has IEEE-754-compliant fabs/fneg operations for the input
-  /// type.
-  virtual bool hasBitPreservingFPLogic(EVT VT) const {
-    return false;
-  }
-
-  /// \brief Return true if it is cheaper to split the store of a merged int val
-  /// from a pair of smaller values into multiple stores.
-  virtual bool isMultiStoresCheaperThanBitsMerge(EVT LTy, EVT HTy) const {
-    return false;
-  }
-
-  /// \brief Return if the target supports combining a
-  /// chain like:
-  /// \code
-  ///   %andResult = and %val1, #mask
-  ///   %icmpResult = icmp %andResult, 0
-  /// \endcode
-  /// into a single machine instruction of a form like:
-  /// \code
-  ///   cc = test %register, #mask
-  /// \endcode
-  virtual bool isMaskAndCmp0FoldingBeneficial(const Instruction &AndI) const {
-    return false;
-  }
-
-  /// Use bitwise logic to make pairs of compares more efficient. For example:
-  /// and (seteq A, B), (seteq C, D) --> seteq (or (xor A, B), (xor C, D)), 0
-  /// This should be true when it takes more than one instruction to lower
-  /// setcc (cmp+set on x86 scalar), when bitwise ops are faster than logic on
-  /// condition bits (crand on PowerPC), and/or when reducing cmp+br is a win.
-  virtual bool convertSetCCLogicToBitwiseLogic(EVT VT) const {
-    return false;
-  }
-
-  /// Return the preferred operand type if the target has a quick way to compare
-  /// integer values of the given size. Assume that any legal integer type can
-  /// be compared efficiently. Targets may override this to allow illegal wide
-  /// types to return a vector type if there is support to compare that type.
-  virtual MVT hasFastEqualityCompare(unsigned NumBits) const {
-    MVT VT = MVT::getIntegerVT(NumBits);
-    return isTypeLegal(VT) ? VT : MVT::INVALID_SIMPLE_VALUE_TYPE;
-  }
-
-  /// Return true if the target should transform:
-  /// (X & Y) == Y ---> (~X & Y) == 0
-  /// (X & Y) != Y ---> (~X & Y) != 0
-  ///
-  /// This may be profitable if the target has a bitwise and-not operation that
-  /// sets comparison flags. A target may want to limit the transformation based
-  /// on the type of Y or if Y is a constant.
-  ///
-  /// Note that the transform will not occur if Y is known to be a power-of-2
-  /// because a mask and compare of a single bit can be handled by inverting the
-  /// predicate, for example:
-  /// (X & 8) == 8 ---> (X & 8) != 0
-  virtual bool hasAndNotCompare(SDValue Y) const {
-    return false;
-  }
-
-  /// Return true if the target has a bitwise and-not operation:
-  /// X = ~A & B
-  /// This can be used to simplify select or other instructions.
-  virtual bool hasAndNot(SDValue X) const {
-    // If the target has the more complex version of this operation, assume that
-    // it has this operation too.
-    return hasAndNotCompare(X);
-  }
-
-  /// \brief Return true if the target wants to use the optimization that
-  /// turns ext(promotableInst1(...(promotableInstN(load)))) into
-  /// promotedInst1(...(promotedInstN(ext(load)))).
-  bool enableExtLdPromotion() const { return EnableExtLdPromotion; }
-
-  /// Return true if the target can combine store(extractelement VectorTy,
-  /// Idx).
-  /// \p Cost[out] gives the cost of that transformation when this is true.
-  virtual bool canCombineStoreAndExtract(Type *VectorTy, Value *Idx,
-                                         unsigned &Cost) const {
-    return false;
-  }
-
-  /// Return true if target supports floating point exceptions.
-  bool hasFloatingPointExceptions() const {
-    return HasFloatingPointExceptions;
-  }
-
-  /// Return true if target always beneficiates from combining into FMA for a
-  /// given value type. This must typically return false on targets where FMA
-  /// takes more cycles to execute than FADD.
-  virtual bool enableAggressiveFMAFusion(EVT VT) const {
-    return false;
-  }
-
-  /// Return the ValueType of the result of SETCC operations.
-  virtual EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
-                                 EVT VT) const;
-
-  /// Return the ValueType for comparison libcalls. Comparions libcalls include
-  /// floating point comparion calls, and Ordered/Unordered check calls on
-  /// floating point numbers.
-  virtual
-  MVT::SimpleValueType getCmpLibcallReturnType() const;
-
-  /// For targets without i1 registers, this gives the nature of the high-bits
-  /// of boolean values held in types wider than i1.
-  ///
-  /// "Boolean values" are special true/false values produced by nodes like
-  /// SETCC and consumed (as the condition) by nodes like SELECT and BRCOND.
-  /// Not to be confused with general values promoted from i1.  Some cpus
-  /// distinguish between vectors of boolean and scalars; the isVec parameter
-  /// selects between the two kinds.  For example on X86 a scalar boolean should
-  /// be zero extended from i1, while the elements of a vector of booleans
-  /// should be sign extended from i1.
-  ///
-  /// Some cpus also treat floating point types the same way as they treat
-  /// vectors instead of the way they treat scalars.
-  BooleanContent getBooleanContents(bool isVec, bool isFloat) const {
-    if (isVec)
-      return BooleanVectorContents;
-    return isFloat ? BooleanFloatContents : BooleanContents;
-  }
-
-  BooleanContent getBooleanContents(EVT Type) const {
-    return getBooleanContents(Type.isVector(), Type.isFloatingPoint());
-  }
-
-  /// Return target scheduling preference.
-  Sched::Preference getSchedulingPreference() const {
-    return SchedPreferenceInfo;
-  }
-
-  /// Some scheduler, e.g. hybrid, can switch to different scheduling heuristics
-  /// for different nodes. This function returns the preference (or none) for
-  /// the given node.
-  virtual Sched::Preference getSchedulingPreference(SDNode *) const {
-    return Sched::None;
-  }
-
-  /// Return the register class that should be used for the specified value
-  /// type.
-  virtual const TargetRegisterClass *getRegClassFor(MVT VT) const {
-    const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
-    assert(RC && "This value type is not natively supported!");
-    return RC;
-  }
-
-  /// Return the 'representative' register class for the specified value
-  /// type.
-  ///
-  /// The 'representative' register class is the largest legal super-reg
-  /// register class for the register class of the value type.  For example, on
-  /// i386 the rep register class for i8, i16, and i32 are GR32; while the rep
-  /// register class is GR64 on x86_64.
-  virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const {
-    const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy];
-    return RC;
-  }
-
-  /// Return the cost of the 'representative' register class for the specified
-  /// value type.
-  virtual uint8_t getRepRegClassCostFor(MVT VT) const {
-    return RepRegClassCostForVT[VT.SimpleTy];
-  }
-
-  /// Return true if the target has native support for the specified value type.
-  /// This means that it has a register that directly holds it without
-  /// promotions or expansions.
-  bool isTypeLegal(EVT VT) const {
-    assert(!VT.isSimple() ||
-           (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT));
-    return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr;
-  }
-
-  class ValueTypeActionImpl {
-    /// ValueTypeActions - For each value type, keep a LegalizeTypeAction enum
-    /// that indicates how instruction selection should deal with the type.
-    LegalizeTypeAction ValueTypeActions[MVT::LAST_VALUETYPE];
-
-  public:
-    ValueTypeActionImpl() {
-      std::fill(std::begin(ValueTypeActions), std::end(ValueTypeActions),
-                TypeLegal);
-    }
-
-    LegalizeTypeAction getTypeAction(MVT VT) const {
-      return ValueTypeActions[VT.SimpleTy];
-    }
-
-    void setTypeAction(MVT VT, LegalizeTypeAction Action) {
-      ValueTypeActions[VT.SimpleTy] = Action;
-    }
-  };
-
-  const ValueTypeActionImpl &getValueTypeActions() const {
-    return ValueTypeActions;
-  }
-
-  /// Return how we should legalize values of this type, either it is already
-  /// legal (return 'Legal') or we need to promote it to a larger type (return
-  /// 'Promote'), or we need to expand it into multiple registers of smaller
-  /// integer type (return 'Expand').  'Custom' is not an option.
-  LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const {
-    return getTypeConversion(Context, VT).first;
-  }
-  LegalizeTypeAction getTypeAction(MVT VT) const {
-    return ValueTypeActions.getTypeAction(VT);
-  }
-
-  /// For types supported by the target, this is an identity function.  For
-  /// types that must be promoted to larger types, this returns the larger type
-  /// to promote to.  For integer types that are larger than the largest integer
-  /// register, this contains one step in the expansion to get to the smaller
-  /// register. For illegal floating point types, this returns the integer type
-  /// to transform to.
-  EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const {
-    return getTypeConversion(Context, VT).second;
-  }
-
-  /// For types supported by the target, this is an identity function.  For
-  /// types that must be expanded (i.e. integer types that are larger than the
-  /// largest integer register or illegal floating point types), this returns
-  /// the largest legal type it will be expanded to.
-  EVT getTypeToExpandTo(LLVMContext &Context, EVT VT) const {
-    assert(!VT.isVector());
-    while (true) {
-      switch (getTypeAction(Context, VT)) {
-      case TypeLegal:
-        return VT;
-      case TypeExpandInteger:
-        VT = getTypeToTransformTo(Context, VT);
-        break;
-      default:
-        llvm_unreachable("Type is not legal nor is it to be expanded!");
-      }
-    }
-  }
-
-  /// Vector types are broken down into some number of legal first class types.
-  /// For example, EVT::v8f32 maps to 2 EVT::v4f32 with Altivec or SSE1, or 8
-  /// promoted EVT::f64 values with the X86 FP stack.  Similarly, EVT::v2i64
-  /// turns into 4 EVT::i32 values with both PPC and X86.
-  ///
-  /// This method returns the number of registers needed, and the VT for each
-  /// register.  It also returns the VT and quantity of the intermediate values
-  /// before they are promoted/expanded.
-  unsigned getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
-                                  EVT &IntermediateVT,
-                                  unsigned &NumIntermediates,
-                                  MVT &RegisterVT) const;
-
-  /// Certain targets such as MIPS require that some types such as vectors are
-  /// always broken down into scalars in some contexts. This occurs even if the
-  /// vector type is legal.
-  virtual unsigned getVectorTypeBreakdownForCallingConv(
-      LLVMContext &Context, EVT VT, EVT &IntermediateVT,
-      unsigned &NumIntermediates, MVT &RegisterVT) const {
-    return getVectorTypeBreakdown(Context, VT, IntermediateVT, NumIntermediates,
-                                  RegisterVT);
-  }
-
-  struct IntrinsicInfo {
-    unsigned     opc = 0;          // target opcode
-    EVT          memVT;            // memory VT
-    const Value* ptrVal = nullptr; // value representing memory location
-    int          offset = 0;       // offset off of ptrVal
-    unsigned     size = 0;         // the size of the memory location
-                                   // (taken from memVT if zero)
-    unsigned     align = 1;        // alignment
-    bool         vol = false;      // is volatile?
-    bool         readMem = false;  // reads memory?
-    bool         writeMem = false; // writes memory?
-
-    IntrinsicInfo() = default;
-  };
-
-  /// Given an intrinsic, checks if on the target the intrinsic will need to map
-  /// to a MemIntrinsicNode (touches memory). If this is the case, it returns
-  /// true and store the intrinsic information into the IntrinsicInfo that was
-  /// passed to the function.
-  virtual bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &,
-                                  unsigned /*Intrinsic*/) const {
-    return false;
-  }
-
-  /// Returns true if the target can instruction select the specified FP
-  /// immediate natively. If false, the legalizer will materialize the FP
-  /// immediate as a load from a constant pool.
-  virtual bool isFPImmLegal(const APFloat &/*Imm*/, EVT /*VT*/) const {
-    return false;
-  }
-
-  /// Targets can use this to indicate that they only support *some*
-  /// VECTOR_SHUFFLE operations, those with specific masks.  By default, if a
-  /// target supports the VECTOR_SHUFFLE node, all mask values are assumed to be
-  /// legal.
-  virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &/*Mask*/,
-                                  EVT /*VT*/) const {
-    return true;
-  }
-
-  /// Returns true if the operation can trap for the value type.
-  ///
-  /// VT must be a legal type. By default, we optimistically assume most
-  /// operations don't trap except for integer divide and remainder.
-  virtual bool canOpTrap(unsigned Op, EVT VT) const;
-
-  /// Similar to isShuffleMaskLegal. This is used by Targets can use this to
-  /// indicate if there is a suitable VECTOR_SHUFFLE that can be used to replace
-  /// a VAND with a constant pool entry.
-  virtual bool isVectorClearMaskLegal(const SmallVectorImpl<int> &/*Mask*/,
-                                      EVT /*VT*/) const {
-    return false;
-  }
-
-  /// Return how this operation should be treated: either it is legal, needs to
-  /// be promoted to a larger size, needs to be expanded to some other code
-  /// sequence, or the target has a custom expander for it.
-  LegalizeAction getOperationAction(unsigned Op, EVT VT) const {
-    if (VT.isExtended()) return Expand;
-    // If a target-specific SDNode requires legalization, require the target
-    // to provide custom legalization for it.
-    if (Op >= array_lengthof(OpActions[0])) return Custom;
-    return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];
-  }
-
-  /// Return true if the specified operation is legal on this target or can be
-  /// made legal with custom lowering. This is used to help guide high-level
-  /// lowering decisions.
-  bool isOperationLegalOrCustom(unsigned Op, EVT VT) const {
-    return (VT == MVT::Other || isTypeLegal(VT)) &&
-      (getOperationAction(Op, VT) == Legal ||
-       getOperationAction(Op, VT) == Custom);
-  }
-
-  /// Return true if the specified operation is legal on this target or can be
-  /// made legal using promotion. This is used to help guide high-level lowering
-  /// decisions.
-  bool isOperationLegalOrPromote(unsigned Op, EVT VT) const {
-    return (VT == MVT::Other || isTypeLegal(VT)) &&
-      (getOperationAction(Op, VT) == Legal ||
-       getOperationAction(Op, VT) == Promote);
-  }
-
-  /// Return true if the specified operation is legal on this target or can be
-  /// made legal with custom lowering or using promotion. This is used to help
-  /// guide high-level lowering decisions.
-  bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT) const {
-    return (VT == MVT::Other || isTypeLegal(VT)) &&
-      (getOperationAction(Op, VT) == Legal ||
-       getOperationAction(Op, VT) == Custom ||
-       getOperationAction(Op, VT) == Promote);
-  }
-
-  /// Return true if the specified operation is illegal but has a custom lowering
-  /// on that type. This is used to help guide high-level lowering
-  /// decisions.
-  bool isOperationCustom(unsigned Op, EVT VT) const {
-    return (!isTypeLegal(VT) && getOperationAction(Op, VT) == Custom);
-  }
-
-  /// Return true if lowering to a jump table is allowed.
-  bool areJTsAllowed(const Function *Fn) const {
-    if (Fn->getFnAttribute("no-jump-tables").getValueAsString() == "true")
-      return false;
-
-    return isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
-           isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
-  }
-
-  /// Check whether the range [Low,High] fits in a machine word.
-  bool rangeFitsInWord(const APInt &Low, const APInt &High,
-                       const DataLayout &DL) const {
-    // FIXME: Using the pointer type doesn't seem ideal.
-    uint64_t BW = DL.getPointerSizeInBits();
-    uint64_t Range = (High - Low).getLimitedValue(UINT64_MAX - 1) + 1;
-    return Range <= BW;
-  }
-
-  /// Return true if lowering to a jump table is suitable for a set of case
-  /// clusters which may contain \p NumCases cases, \p Range range of values.
-  /// FIXME: This function check the maximum table size and density, but the
-  /// minimum size is not checked. It would be nice if the the minimum size is
-  /// also combined within this function. Currently, the minimum size check is
-  /// performed in findJumpTable() in SelectionDAGBuiler and
-  /// getEstimatedNumberOfCaseClusters() in BasicTTIImpl.
-  bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases,
-                              uint64_t Range) const {
-    const bool OptForSize = SI->getParent()->getParent()->optForSize();
-    const unsigned MinDensity = getMinimumJumpTableDensity(OptForSize);
-    const unsigned MaxJumpTableSize =
-        OptForSize || getMaximumJumpTableSize() == 0
-            ? UINT_MAX
-            : getMaximumJumpTableSize();
-    // Check whether a range of clusters is dense enough for a jump table.
-    if (Range <= MaxJumpTableSize &&
-        (NumCases * 100 >= Range * MinDensity)) {
-      return true;
-    }
-    return false;
-  }
-
-  /// Return true if lowering to a bit test is suitable for a set of case
-  /// clusters which contains \p NumDests unique destinations, \p Low and
-  /// \p High as its lowest and highest case values, and expects \p NumCmps
-  /// case value comparisons. Check if the number of destinations, comparison
-  /// metric, and range are all suitable.
-  bool isSuitableForBitTests(unsigned NumDests, unsigned NumCmps,
-                             const APInt &Low, const APInt &High,
-                             const DataLayout &DL) const {
-    // FIXME: I don't think NumCmps is the correct metric: a single case and a
-    // range of cases both require only one branch to lower. Just looking at the
-    // number of clusters and destinations should be enough to decide whether to
-    // build bit tests.
-
-    // To lower a range with bit tests, the range must fit the bitwidth of a
-    // machine word.
-    if (!rangeFitsInWord(Low, High, DL))
-      return false;
-
-    // Decide whether it's profitable to lower this range with bit tests. Each
-    // destination requires a bit test and branch, and there is an overall range
-    // check branch. For a small number of clusters, separate comparisons might
-    // be cheaper, and for many destinations, splitting the range might be
-    // better.
-    return (NumDests == 1 && NumCmps >= 3) || (NumDests == 2 && NumCmps >= 5) ||
-           (NumDests == 3 && NumCmps >= 6);
-  }
-
-  /// Return true if the specified operation is illegal on this target or
-  /// unlikely to be made legal with custom lowering. This is used to help guide
-  /// high-level lowering decisions.
-  bool isOperationExpand(unsigned Op, EVT VT) const {
-    return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand);
-  }
-
-  /// Return true if the specified operation is legal on this target.
-  bool isOperationLegal(unsigned Op, EVT VT) const {
-    return (VT == MVT::Other || isTypeLegal(VT)) &&
-           getOperationAction(Op, VT) == Legal;
-  }
-
-  /// Return how this load with extension should be treated: either it is legal,
-  /// needs to be promoted to a larger size, needs to be expanded to some other
-  /// code sequence, or the target has a custom expander for it.
-  LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT,
-                                  EVT MemVT) const {
-    if (ValVT.isExtended() || MemVT.isExtended()) return Expand;
-    unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
-    unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;
-    assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::LAST_VALUETYPE &&
-           MemI < MVT::LAST_VALUETYPE && "Table isn't big enough!");
-    unsigned Shift = 4 * ExtType;
-    return (LegalizeAction)((LoadExtActions[ValI][MemI] >> Shift) & 0xf);
-  }
-
-  /// Return true if the specified load with extension is legal on this target.
-  bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const {
-    return getLoadExtAction(ExtType, ValVT, MemVT) == Legal;
-  }
-
-  /// Return true if the specified load with extension is legal or custom
-  /// on this target.
-  bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const {
-    return getLoadExtAction(ExtType, ValVT, MemVT) == Legal ||
-           getLoadExtAction(ExtType, ValVT, MemVT) == Custom;
-  }
-
-  /// Return how this store with truncation should be treated: either it is
-  /// legal, needs to be promoted to a larger size, needs to be expanded to some
-  /// other code sequence, or the target has a custom expander for it.
-  LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT) const {
-    if (ValVT.isExtended() || MemVT.isExtended()) return Expand;
-    unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
-    unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;
-    assert(ValI < MVT::LAST_VALUETYPE && MemI < MVT::LAST_VALUETYPE &&
-           "Table isn't big enough!");
-    return TruncStoreActions[ValI][MemI];
-  }
-
-  /// Return true if the specified store with truncation is legal on this
-  /// target.
-  bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const {
-    return isTypeLegal(ValVT) && getTruncStoreAction(ValVT, MemVT) == Legal;
-  }
-
-  /// Return true if the specified store with truncation has solution on this
-  /// target.
-  bool isTruncStoreLegalOrCustom(EVT ValVT, EVT MemVT) const {
-    return isTypeLegal(ValVT) &&
-      (getTruncStoreAction(ValVT, MemVT) == Legal ||
-       getTruncStoreAction(ValVT, MemVT) == Custom);
-  }
-
-  /// Return how the indexed load should be treated: either it is legal, needs
-  /// to be promoted to a larger size, needs to be expanded to some other code
-  /// sequence, or the target has a custom expander for it.
-  LegalizeAction
-  getIndexedLoadAction(unsigned IdxMode, MVT VT) const {
-    assert(IdxMode < ISD::LAST_INDEXED_MODE && VT.isValid() &&
-           "Table isn't big enough!");
-    unsigned Ty = (unsigned)VT.SimpleTy;
-    return (LegalizeAction)((IndexedModeActions[Ty][IdxMode] & 0xf0) >> 4);
-  }
-
-  /// Return true if the specified indexed load is legal on this target.
-  bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const {
-    return VT.isSimple() &&
-      (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal ||
-       getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Custom);
-  }
-
-  /// Return how the indexed store should be treated: either it is legal, needs
-  /// to be promoted to a larger size, needs to be expanded to some other code
-  /// sequence, or the target has a custom expander for it.
-  LegalizeAction
-  getIndexedStoreAction(unsigned IdxMode, MVT VT) const {
-    assert(IdxMode < ISD::LAST_INDEXED_MODE && VT.isValid() &&
-           "Table isn't big enough!");
-    unsigned Ty = (unsigned)VT.SimpleTy;
-    return (LegalizeAction)(IndexedModeActions[Ty][IdxMode] & 0x0f);
-  }
-
-  /// Return true if the specified indexed load is legal on this target.
-  bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const {
-    return VT.isSimple() &&
-      (getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Legal ||
-       getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Custom);
-  }
-
-  /// Return how the condition code should be treated: either it is legal, needs
-  /// to be expanded to some other code sequence, or the target has a custom
-  /// expander for it.
-  LegalizeAction
-  getCondCodeAction(ISD::CondCode CC, MVT VT) const {
-    assert((unsigned)CC < array_lengthof(CondCodeActions) &&
-           ((unsigned)VT.SimpleTy >> 3) < array_lengthof(CondCodeActions[0]) &&
-           "Table isn't big enough!");
-    // See setCondCodeAction for how this is encoded.
-    uint32_t Shift = 4 * (VT.SimpleTy & 0x7);
-    uint32_t Value = CondCodeActions[CC][VT.SimpleTy >> 3];
-    LegalizeAction Action = (LegalizeAction) ((Value >> Shift) & 0xF);
-    assert(Action != Promote && "Can't promote condition code!");
-    return Action;
-  }
-
-  /// Return true if the specified condition code is legal on this target.
-  bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const {
-    return
-      getCondCodeAction(CC, VT) == Legal ||
-      getCondCodeAction(CC, VT) == Custom;
-  }
-
-  /// If the action for this operation is to promote, this method returns the
-  /// ValueType to promote to.
-  MVT getTypeToPromoteTo(unsigned Op, MVT VT) const {
-    assert(getOperationAction(Op, VT) == Promote &&
-           "This operation isn't promoted!");
-
-    // See if this has an explicit type specified.
-    std::map<std::pair<unsigned, MVT::SimpleValueType>,
-             MVT::SimpleValueType>::const_iterator PTTI =
-      PromoteToType.find(std::make_pair(Op, VT.SimpleTy));
-    if (PTTI != PromoteToType.end()) return PTTI->second;
-
-    assert((VT.isInteger() || VT.isFloatingPoint()) &&
-           "Cannot autopromote this type, add it with AddPromotedToType.");
-
-    MVT NVT = VT;
-    do {
-      NVT = (MVT::SimpleValueType)(NVT.SimpleTy+1);
-      assert(NVT.isInteger() == VT.isInteger() && NVT != MVT::isVoid &&
-             "Didn't find type to promote to!");
-    } while (!isTypeLegal(NVT) ||
-              getOperationAction(Op, NVT) == Promote);
-    return NVT;
-  }
-
-  /// Return the EVT corresponding to this LLVM type.  This is fixed by the LLVM
-  /// operations except for the pointer size.  If AllowUnknown is true, this
-  /// will return MVT::Other for types with no EVT counterpart (e.g. structs),
-  /// otherwise it will assert.
-  EVT getValueType(const DataLayout &DL, Type *Ty,
-                   bool AllowUnknown = false) const {
-    // Lower scalar pointers to native pointer types.
-    if (PointerType *PTy = dyn_cast<PointerType>(Ty))
-      return getPointerTy(DL, PTy->getAddressSpace());
-
-    if (Ty->isVectorTy()) {
-      VectorType *VTy = cast<VectorType>(Ty);
-      Type *Elm = VTy->getElementType();
-      // Lower vectors of pointers to native pointer types.
-      if (PointerType *PT = dyn_cast<PointerType>(Elm)) {
-        EVT PointerTy(getPointerTy(DL, PT->getAddressSpace()));
-        Elm = PointerTy.getTypeForEVT(Ty->getContext());
-      }
-
-      return EVT::getVectorVT(Ty->getContext(), EVT::getEVT(Elm, false),
-                       VTy->getNumElements());
-    }
-    return EVT::getEVT(Ty, AllowUnknown);
-  }
-
-  /// Return the MVT corresponding to this LLVM type. See getValueType.
-  MVT getSimpleValueType(const DataLayout &DL, Type *Ty,
-                         bool AllowUnknown = false) const {
-    return getValueType(DL, Ty, AllowUnknown).getSimpleVT();
-  }
-
-  /// Return the desired alignment for ByVal or InAlloca aggregate function
-  /// arguments in the caller parameter area.  This is the actual alignment, not
-  /// its logarithm.
-  virtual unsigned getByValTypeAlignment(Type *Ty, const DataLayout &DL) const;
-
-  /// Return the type of registers that this ValueType will eventually require.
-  MVT getRegisterType(MVT VT) const {
-    assert((unsigned)VT.SimpleTy < array_lengthof(RegisterTypeForVT));
-    return RegisterTypeForVT[VT.SimpleTy];
-  }
-
-  /// Return the type of registers that this ValueType will eventually require.
-  MVT getRegisterType(LLVMContext &Context, EVT VT) const {
-    if (VT.isSimple()) {
-      assert((unsigned)VT.getSimpleVT().SimpleTy <
-                array_lengthof(RegisterTypeForVT));
-      return RegisterTypeForVT[VT.getSimpleVT().SimpleTy];
-    }
-    if (VT.isVector()) {
-      EVT VT1;
-      MVT RegisterVT;
-      unsigned NumIntermediates;
-      (void)getVectorTypeBreakdown(Context, VT, VT1,
-                                   NumIntermediates, RegisterVT);
-      return RegisterVT;
-    }
-    if (VT.isInteger()) {
-      return getRegisterType(Context, getTypeToTransformTo(Context, VT));
-    }
-    llvm_unreachable("Unsupported extended type!");
-  }
-
-  /// Return the number of registers that this ValueType will eventually
-  /// require.
-  ///
-  /// This is one for any types promoted to live in larger registers, but may be
-  /// more than one for types (like i64) that are split into pieces.  For types
-  /// like i140, which are first promoted then expanded, it is the number of
-  /// registers needed to hold all the bits of the original type.  For an i140
-  /// on a 32 bit machine this means 5 registers.
-  unsigned getNumRegisters(LLVMContext &Context, EVT VT) const {
-    if (VT.isSimple()) {
-      assert((unsigned)VT.getSimpleVT().SimpleTy <
-                array_lengthof(NumRegistersForVT));
-      return NumRegistersForVT[VT.getSimpleVT().SimpleTy];
-    }
-    if (VT.isVector()) {
-      EVT VT1;
-      MVT VT2;
-      unsigned NumIntermediates;
-      return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2);
-    }
-    if (VT.isInteger()) {
-      unsigned BitWidth = VT.getSizeInBits();
-      unsigned RegWidth = getRegisterType(Context, VT).getSizeInBits();
-      return (BitWidth + RegWidth - 1) / RegWidth;
-    }
-    llvm_unreachable("Unsupported extended type!");
-  }
-
-  /// Certain combinations of ABIs, Targets and features require that types
-  /// are legal for some operations and not for other operations.
-  /// For MIPS all vector types must be passed through the integer register set.
-  virtual MVT getRegisterTypeForCallingConv(MVT VT) const {
-    return getRegisterType(VT);
-  }
-
-  virtual MVT getRegisterTypeForCallingConv(LLVMContext &Context,
-                                            EVT VT) const {
-    return getRegisterType(Context, VT);
-  }
-
-  /// Certain targets require unusual breakdowns of certain types. For MIPS,
-  /// this occurs when a vector type is used, as vector are passed through the
-  /// integer register set.
-  virtual unsigned getNumRegistersForCallingConv(LLVMContext &Context,
-                                                 EVT VT) const {
-    return getNumRegisters(Context, VT);
-  }
-
-  /// Certain targets have context senstive alignment requirements, where one
-  /// type has the alignment requirement of another type.
-  virtual unsigned getABIAlignmentForCallingConv(Type *ArgTy,
-                                                 DataLayout DL) const {
-    return DL.getABITypeAlignment(ArgTy);
-  }
-
-  /// If true, then instruction selection should seek to shrink the FP constant
-  /// of the specified type to a smaller type in order to save space and / or
-  /// reduce runtime.
-  virtual bool ShouldShrinkFPConstant(EVT) const { return true; }
-
-  // Return true if it is profitable to reduce the given load node to a smaller
-  // type.
-  //
-  // e.g. (i16 (trunc (i32 (load x))) -> i16 load x should be performed
-  virtual bool shouldReduceLoadWidth(SDNode *Load,
-                                     ISD::LoadExtType ExtTy,
-                                     EVT NewVT) const {
-    return true;
-  }
-
-  /// When splitting a value of the specified type into parts, does the Lo
-  /// or Hi part come first?  This usually follows the endianness, except
-  /// for ppcf128, where the Hi part always comes first.
-  bool hasBigEndianPartOrdering(EVT VT, const DataLayout &DL) const {
-    return DL.isBigEndian() || VT == MVT::ppcf128;
-  }
-
-  /// If true, the target has custom DAG combine transformations that it can
-  /// perform for the specified node.
-  bool hasTargetDAGCombine(ISD::NodeType NT) const {
-    assert(unsigned(NT >> 3) < array_lengthof(TargetDAGCombineArray));
-    return TargetDAGCombineArray[NT >> 3] & (1 << (NT&7));
-  }
-
-  unsigned getGatherAllAliasesMaxDepth() const {
-    return GatherAllAliasesMaxDepth;
-  }
-
-  /// Returns the size of the platform's va_list object.
-  virtual unsigned getVaListSizeInBits(const DataLayout &DL) const {
-    return getPointerTy(DL).getSizeInBits();
-  }
-
-  /// \brief Get maximum # of store operations permitted for llvm.memset
-  ///
-  /// This function returns the maximum number of store operations permitted
-  /// to replace a call to llvm.memset. The value is set by the target at the
-  /// performance threshold for such a replacement. If OptSize is true,
-  /// return the limit for functions that have OptSize attribute.
-  unsigned getMaxStoresPerMemset(bool OptSize) const {
-    return OptSize ? MaxStoresPerMemsetOptSize : MaxStoresPerMemset;
-  }
-
-  /// \brief Get maximum # of store operations permitted for llvm.memcpy
-  ///
-  /// This function returns the maximum number of store operations permitted
-  /// to replace a call to llvm.memcpy. The value is set by the target at the
-  /// performance threshold for such a replacement. If OptSize is true,
-  /// return the limit for functions that have OptSize attribute.
-  unsigned getMaxStoresPerMemcpy(bool OptSize) const {
-    return OptSize ? MaxStoresPerMemcpyOptSize : MaxStoresPerMemcpy;
-  }
-
-  /// Get maximum # of load operations permitted for memcmp
-  ///
-  /// This function returns the maximum number of load operations permitted
-  /// to replace a call to memcmp. The value is set by the target at the
-  /// performance threshold for such a replacement. If OptSize is true,
-  /// return the limit for functions that have OptSize attribute.
-  unsigned getMaxExpandSizeMemcmp(bool OptSize) const {
-    return OptSize ? MaxLoadsPerMemcmpOptSize : MaxLoadsPerMemcmp;
-  }
-
-  /// \brief Get maximum # of store operations permitted for llvm.memmove
-  ///
-  /// This function returns the maximum number of store operations permitted
-  /// to replace a call to llvm.memmove. The value is set by the target at the
-  /// performance threshold for such a replacement. If OptSize is true,
-  /// return the limit for functions that have OptSize attribute.
-  unsigned getMaxStoresPerMemmove(bool OptSize) const {
-    return OptSize ? MaxStoresPerMemmoveOptSize : MaxStoresPerMemmove;
-  }
-
-  /// \brief Determine if the target supports unaligned memory accesses.
-  ///
-  /// This function returns true if the target allows unaligned memory accesses
-  /// of the specified type in the given address space. If true, it also returns
-  /// whether the unaligned memory access is "fast" in the last argument by
-  /// reference. This is used, for example, in situations where an array
-  /// copy/move/set is converted to a sequence of store operations. Its use
-  /// helps to ensure that such replacements don't generate code that causes an
-  /// alignment error (trap) on the target machine.
-  virtual bool allowsMisalignedMemoryAccesses(EVT,
-                                              unsigned AddrSpace = 0,
-                                              unsigned Align = 1,
-                                              bool * /*Fast*/ = nullptr) const {
-    return false;
-  }
-
-  /// Return true if the target supports a memory access of this type for the
-  /// given address space and alignment. If the access is allowed, the optional
-  /// final parameter returns if the access is also fast (as defined by the
-  /// target).
-  bool allowsMemoryAccess(LLVMContext &Context, const DataLayout &DL, EVT VT,
-                          unsigned AddrSpace = 0, unsigned Alignment = 1,
-                          bool *Fast = nullptr) const;
-
-  /// Returns the target specific optimal type for load and store operations as
-  /// a result of memset, memcpy, and memmove lowering.
-  ///
-  /// If DstAlign is zero that means it's safe to destination alignment can
-  /// satisfy any constraint. Similarly if SrcAlign is zero it means there isn't
-  /// a need to check it against alignment requirement, probably because the
-  /// source does not need to be loaded. If 'IsMemset' is true, that means it's
-  /// expanding a memset. If 'ZeroMemset' is true, that means it's a memset of
-  /// zero. 'MemcpyStrSrc' indicates whether the memcpy source is constant so it
-  /// does not need to be loaded.  It returns EVT::Other if the type should be
-  /// determined using generic target-independent logic.
-  virtual EVT getOptimalMemOpType(uint64_t /*Size*/,
-                                  unsigned /*DstAlign*/, unsigned /*SrcAlign*/,
-                                  bool /*IsMemset*/,
-                                  bool /*ZeroMemset*/,
-                                  bool /*MemcpyStrSrc*/,
-                                  MachineFunction &/*MF*/) const {
-    return MVT::Other;
-  }
-
-  /// Returns true if it's safe to use load / store of the specified type to
-  /// expand memcpy / memset inline.
-  ///
-  /// This is mostly true for all types except for some special cases. For
-  /// example, on X86 targets without SSE2 f64 load / store are done with fldl /
-  /// fstpl which also does type conversion. Note the specified type doesn't
-  /// have to be legal as the hook is used before type legalization.
-  virtual bool isSafeMemOpType(MVT /*VT*/) const { return true; }
-
-  /// Determine if we should use _setjmp or setjmp to implement llvm.setjmp.
-  bool usesUnderscoreSetJmp() const {
-    return UseUnderscoreSetJmp;
-  }
-
-  /// Determine if we should use _longjmp or longjmp to implement llvm.longjmp.
-  bool usesUnderscoreLongJmp() const {
-    return UseUnderscoreLongJmp;
-  }
-
-  /// Return lower limit for number of blocks in a jump table.
-  unsigned getMinimumJumpTableEntries() const;
-
-  /// Return lower limit of the density in a jump table.
-  unsigned getMinimumJumpTableDensity(bool OptForSize) const;
-
-  /// Return upper limit for number of entries in a jump table.
-  /// Zero if no limit.
-  unsigned getMaximumJumpTableSize() const;
-
-  virtual bool isJumpTableRelative() const {
-    return TM.isPositionIndependent();
-  }
-
-  /// If a physical register, this specifies the register that
-  /// llvm.savestack/llvm.restorestack should save and restore.
-  unsigned getStackPointerRegisterToSaveRestore() const {
-    return StackPointerRegisterToSaveRestore;
-  }
-
-  /// If a physical register, this returns the register that receives the
-  /// exception address on entry to an EH pad.
-  virtual unsigned
-  getExceptionPointerRegister(const Constant *PersonalityFn) const {
-    // 0 is guaranteed to be the NoRegister value on all targets
-    return 0;
-  }
-
-  /// If a physical register, this returns the register that receives the
-  /// exception typeid on entry to a landing pad.
-  virtual unsigned
-  getExceptionSelectorRegister(const Constant *PersonalityFn) const {
-    // 0 is guaranteed to be the NoRegister value on all targets
-    return 0;
-  }
-
-  virtual bool needsFixedCatchObjects() const {
-    report_fatal_error("Funclet EH is not implemented for this target");
-  }
-
-  /// Returns the target's jmp_buf size in bytes (if never set, the default is
-  /// 200)
-  unsigned getJumpBufSize() const {
-    return JumpBufSize;
-  }
-
-  /// Returns the target's jmp_buf alignment in bytes (if never set, the default
-  /// is 0)
-  unsigned getJumpBufAlignment() const {
-    return JumpBufAlignment;
-  }
-
-  /// Return the minimum stack alignment of an argument.
-  unsigned getMinStackArgumentAlignment() const {
-    return MinStackArgumentAlignment;
-  }
-
-  /// Return the minimum function alignment.
-  unsigned getMinFunctionAlignment() const {
-    return MinFunctionAlignment;
-  }
-
-  /// Return the preferred function alignment.
-  unsigned getPrefFunctionAlignment() const {
-    return PrefFunctionAlignment;
-  }
-
-  /// Return the preferred loop alignment.
-  virtual unsigned getPrefLoopAlignment(MachineLoop *ML = nullptr) const {
-    return PrefLoopAlignment;
-  }
-
-  /// If the target has a standard location for the stack protector guard,
-  /// returns the address of that location. Otherwise, returns nullptr.
-  /// DEPRECATED: please override useLoadStackGuardNode and customize
-  ///             LOAD_STACK_GUARD, or customize @llvm.stackguard().
-  virtual Value *getIRStackGuard(IRBuilder<> &IRB) const;
-
-  /// Inserts necessary declarations for SSP (stack protection) purpose.
-  /// Should be used only when getIRStackGuard returns nullptr.
-  virtual void insertSSPDeclarations(Module &M) const;
-
-  /// Return the variable that's previously inserted by insertSSPDeclarations,
-  /// if any, otherwise return nullptr. Should be used only when
-  /// getIRStackGuard returns nullptr.
-  virtual Value *getSDagStackGuard(const Module &M) const;
-
-  /// If the target has a standard stack protection check function that
-  /// performs validation and error handling, returns the function. Otherwise,
-  /// returns nullptr. Must be previously inserted by insertSSPDeclarations.
-  /// Should be used only when getIRStackGuard returns nullptr.
-  virtual Value *getSSPStackGuardCheck(const Module &M) const;
-
-protected:
-  Value *getDefaultSafeStackPointerLocation(IRBuilder<> &IRB,
-                                            bool UseTLS) const;
-
-public:
-  /// Returns the target-specific address of the unsafe stack pointer.
-  virtual Value *getSafeStackPointerLocation(IRBuilder<> &IRB) const;
-
-  /// Returns the name of the symbol used to emit stack probes or the empty
-  /// string if not applicable.
-  virtual StringRef getStackProbeSymbolName(MachineFunction &MF) const {
-    return "";
-  }
-
-  /// Returns true if a cast between SrcAS and DestAS is a noop.
-  virtual bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const {
-    return false;
-  }
-
-  /// Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g. we
-  /// are happy to sink it into basic blocks.
-  virtual bool isCheapAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const {
-    return isNoopAddrSpaceCast(SrcAS, DestAS);
-  }
-
-  /// Return true if the pointer arguments to CI should be aligned by aligning
-  /// the object whose address is being passed. If so then MinSize is set to the
-  /// minimum size the object must be to be aligned and PrefAlign is set to the
-  /// preferred alignment.
-  virtual bool shouldAlignPointerArgs(CallInst * /*CI*/, unsigned & /*MinSize*/,
-                                      unsigned & /*PrefAlign*/) const {
-    return false;
-  }
-
-  //===--------------------------------------------------------------------===//
-  /// \name Helpers for TargetTransformInfo implementations
-  /// @{
-
-  /// Get the ISD node that corresponds to the Instruction class opcode.
-  int InstructionOpcodeToISD(unsigned Opcode) const;
-
-  /// Estimate the cost of type-legalization and the legalized type.
-  std::pair<int, MVT> getTypeLegalizationCost(const DataLayout &DL,
-                                              Type *Ty) const;
-
-  /// @}
-
-  //===--------------------------------------------------------------------===//
-  /// \name Helpers for atomic expansion.
-  /// @{
-
-  /// Returns the maximum atomic operation size (in bits) supported by
-  /// the backend. Atomic operations greater than this size (as well
-  /// as ones that are not naturally aligned), will be expanded by
-  /// AtomicExpandPass into an __atomic_* library call.
-  unsigned getMaxAtomicSizeInBitsSupported() const {
-    return MaxAtomicSizeInBitsSupported;
-  }
-
-  /// Returns the size of the smallest cmpxchg or ll/sc instruction
-  /// the backend supports.  Any smaller operations are widened in
-  /// AtomicExpandPass.
-  ///
-  /// Note that *unlike* operations above the maximum size, atomic ops
-  /// are still natively supported below the minimum; they just
-  /// require a more complex expansion.
-  unsigned getMinCmpXchgSizeInBits() const { return MinCmpXchgSizeInBits; }
-
-  /// Whether AtomicExpandPass should automatically insert fences and reduce
-  /// ordering for this atomic. This should be true for most architectures with
-  /// weak memory ordering. Defaults to false.
-  virtual bool shouldInsertFencesForAtomic(const Instruction *I) const {
-    return false;
-  }
-
-  /// Perform a load-linked operation on Addr, returning a "Value *" with the
-  /// corresponding pointee type. This may entail some non-trivial operations to
-  /// truncate or reconstruct types that will be illegal in the backend. See
-  /// ARMISelLowering for an example implementation.
-  virtual Value *emitLoadLinked(IRBuilder<> &Builder, Value *Addr,
-                                AtomicOrdering Ord) const {
-    llvm_unreachable("Load linked unimplemented on this target");
-  }
-
-  /// Perform a store-conditional operation to Addr. Return the status of the
-  /// store. This should be 0 if the store succeeded, non-zero otherwise.
-  virtual Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val,
-                                      Value *Addr, AtomicOrdering Ord) const {
-    llvm_unreachable("Store conditional unimplemented on this target");
-  }
-
-  /// Inserts in the IR a target-specific intrinsic specifying a fence.
-  /// It is called by AtomicExpandPass before expanding an
-  ///   AtomicRMW/AtomicCmpXchg/AtomicStore/AtomicLoad
-  ///   if shouldInsertFencesForAtomic returns true.
-  ///
-  /// Inst is the original atomic instruction, prior to other expansions that
-  /// may be performed.
-  ///
-  /// This function should either return a nullptr, or a pointer to an IR-level
-  ///   Instruction*. Even complex fence sequences can be represented by a
-  ///   single Instruction* through an intrinsic to be lowered later.
-  /// Backends should override this method to produce target-specific intrinsic
-  ///   for their fences.
-  /// FIXME: Please note that the default implementation here in terms of
-  ///   IR-level fences exists for historical/compatibility reasons and is
-  ///   *unsound* ! Fences cannot, in general, be used to restore sequential
-  ///   consistency. For example, consider the following example:
-  /// atomic<int> x = y = 0;
-  /// int r1, r2, r3, r4;
-  /// Thread 0:
-  ///   x.store(1);
-  /// Thread 1:
-  ///   y.store(1);
-  /// Thread 2:
-  ///   r1 = x.load();
-  ///   r2 = y.load();
-  /// Thread 3:
-  ///   r3 = y.load();
-  ///   r4 = x.load();
-  ///  r1 = r3 = 1 and r2 = r4 = 0 is impossible as long as the accesses are all
-  ///  seq_cst. But if they are lowered to monotonic accesses, no amount of
-  ///  IR-level fences can prevent it.
-  /// @{
-  virtual Instruction *emitLeadingFence(IRBuilder<> &Builder, Instruction *Inst,
-                                        AtomicOrdering Ord) const {
-    if (isReleaseOrStronger(Ord) && Inst->hasAtomicStore())
-      return Builder.CreateFence(Ord);
-    else
-      return nullptr;
-  }
-
-  virtual Instruction *emitTrailingFence(IRBuilder<> &Builder,
-                                         Instruction *Inst,
-                                         AtomicOrdering Ord) const {
-    if (isAcquireOrStronger(Ord))
-      return Builder.CreateFence(Ord);
-    else
-      return nullptr;
-  }
-  /// @}
-
-  // Emits code that executes when the comparison result in the ll/sc
-  // expansion of a cmpxchg instruction is such that the store-conditional will
-  // not execute.  This makes it possible to balance out the load-linked with
-  // a dedicated instruction, if desired.
-  // E.g., on ARM, if ldrex isn't followed by strex, the exclusive monitor would
-  // be unnecessarily held, except if clrex, inserted by this hook, is executed.
-  virtual void emitAtomicCmpXchgNoStoreLLBalance(IRBuilder<> &Builder) const {}
-
-  /// Returns true if the given (atomic) store should be expanded by the
-  /// IR-level AtomicExpand pass into an "atomic xchg" which ignores its input.
-  virtual bool shouldExpandAtomicStoreInIR(StoreInst *SI) const {
-    return false;
-  }
-
-  /// Returns true if arguments should be sign-extended in lib calls.
-  virtual bool shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const {
-    return IsSigned;
-  }
-
-  /// Returns how the given (atomic) load should be expanded by the
-  /// IR-level AtomicExpand pass.
-  virtual AtomicExpansionKind shouldExpandAtomicLoadInIR(LoadInst *LI) const {
-    return AtomicExpansionKind::None;
-  }
-
-  /// Returns true if the given atomic cmpxchg should be expanded by the
-  /// IR-level AtomicExpand pass into a load-linked/store-conditional sequence
-  /// (through emitLoadLinked() and emitStoreConditional()).
-  virtual bool shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *AI) const {
-    return false;
-  }
-
-  /// Returns how the IR-level AtomicExpand pass should expand the given
-  /// AtomicRMW, if at all. Default is to never expand.
-  virtual AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const {
-    return AtomicExpansionKind::None;
-  }
-
-  /// On some platforms, an AtomicRMW that never actually modifies the value
-  /// (such as fetch_add of 0) can be turned into a fence followed by an
-  /// atomic load. This may sound useless, but it makes it possible for the
-  /// processor to keep the cacheline shared, dramatically improving
-  /// performance. And such idempotent RMWs are useful for implementing some
-  /// kinds of locks, see for example (justification + benchmarks):
-  /// http://www.hpl.hp.com/techreports/2012/HPL-2012-68.pdf
-  /// This method tries doing that transformation, returning the atomic load if
-  /// it succeeds, and nullptr otherwise.
-  /// If shouldExpandAtomicLoadInIR returns true on that load, it will undergo
-  /// another round of expansion.
-  virtual LoadInst *
-  lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *RMWI) const {
-    return nullptr;
-  }
-
-  /// Returns how the platform's atomic operations are extended (ZERO_EXTEND,
-  /// SIGN_EXTEND, or ANY_EXTEND).
-  virtual ISD::NodeType getExtendForAtomicOps() const {
-    return ISD::ZERO_EXTEND;
-  }
-
-  /// @}
-
-  /// Returns true if we should normalize
-  /// select(N0&N1, X, Y) => select(N0, select(N1, X, Y), Y) and
-  /// select(N0|N1, X, Y) => select(N0, select(N1, X, Y, Y)) if it is likely
-  /// that it saves us from materializing N0 and N1 in an integer register.
-  /// Targets that are able to perform and/or on flags should return false here.
-  virtual bool shouldNormalizeToSelectSequence(LLVMContext &Context,
-                                               EVT VT) const {
-    // If a target has multiple condition registers, then it likely has logical
-    // operations on those registers.
-    if (hasMultipleConditionRegisters())
-      return false;
-    // Only do the transform if the value won't be split into multiple
-    // registers.
-    LegalizeTypeAction Action = getTypeAction(Context, VT);
-    return Action != TypeExpandInteger && Action != TypeExpandFloat &&
-      Action != TypeSplitVector;
-  }
-
-  /// Return true if a select of constants (select Cond, C1, C2) should be
-  /// transformed into simple math ops with the condition value. For example:
-  /// select Cond, C1, C1-1 --> add (zext Cond), C1-1
-  virtual bool convertSelectOfConstantsToMath() const {
-    return false;
-  }
-
-  //===--------------------------------------------------------------------===//
-  // TargetLowering Configuration Methods - These methods should be invoked by
-  // the derived class constructor to configure this object for the target.
-  //
-protected:
-  /// Specify how the target extends the result of integer and floating point
-  /// boolean values from i1 to a wider type.  See getBooleanContents.
-  void setBooleanContents(BooleanContent Ty) {
-    BooleanContents = Ty;
-    BooleanFloatContents = Ty;
-  }
-
-  /// Specify how the target extends the result of integer and floating point
-  /// boolean values from i1 to a wider type.  See getBooleanContents.
-  void setBooleanContents(BooleanContent IntTy, BooleanContent FloatTy) {
-    BooleanContents = IntTy;
-    BooleanFloatContents = FloatTy;
-  }
-
-  /// Specify how the target extends the result of a vector boolean value from a
-  /// vector of i1 to a wider type.  See getBooleanContents.
-  void setBooleanVectorContents(BooleanContent Ty) {
-    BooleanVectorContents = Ty;
-  }
-
-  /// Specify the target scheduling preference.
-  void setSchedulingPreference(Sched::Preference Pref) {
-    SchedPreferenceInfo = Pref;
-  }
-
-  /// Indicate whether this target prefers to use _setjmp to implement
-  /// llvm.setjmp or the version without _.  Defaults to false.
-  void setUseUnderscoreSetJmp(bool Val) {
-    UseUnderscoreSetJmp = Val;
-  }
-
-  /// Indicate whether this target prefers to use _longjmp to implement
-  /// llvm.longjmp or the version without _.  Defaults to false.
-  void setUseUnderscoreLongJmp(bool Val) {
-    UseUnderscoreLongJmp = Val;
-  }
-
-  /// Indicate the minimum number of blocks to generate jump tables.
-  void setMinimumJumpTableEntries(unsigned Val);
-
-  /// Indicate the maximum number of entries in jump tables.
-  /// Set to zero to generate unlimited jump tables.
-  void setMaximumJumpTableSize(unsigned);
-
-  /// If set to a physical register, this specifies the register that
-  /// llvm.savestack/llvm.restorestack should save and restore.
-  void setStackPointerRegisterToSaveRestore(unsigned R) {
-    StackPointerRegisterToSaveRestore = R;
-  }
-
-  /// Tells the code generator that the target has multiple (allocatable)
-  /// condition registers that can be used to store the results of comparisons
-  /// for use by selects and conditional branches. With multiple condition
-  /// registers, the code generator will not aggressively sink comparisons into
-  /// the blocks of their users.
-  void setHasMultipleConditionRegisters(bool hasManyRegs = true) {
-    HasMultipleConditionRegisters = hasManyRegs;
-  }
-
-  /// Tells the code generator that the target has BitExtract instructions.
-  /// The code generator will aggressively sink "shift"s into the blocks of
-  /// their users if the users will generate "and" instructions which can be
-  /// combined with "shift" to BitExtract instructions.
-  void setHasExtractBitsInsn(bool hasExtractInsn = true) {
-    HasExtractBitsInsn = hasExtractInsn;
-  }
-
-  /// Tells the code generator not to expand logic operations on comparison
-  /// predicates into separate sequences that increase the amount of flow
-  /// control.
-  void setJumpIsExpensive(bool isExpensive = true);
-
-  /// Tells the code generator that this target supports floating point
-  /// exceptions and cares about preserving floating point exception behavior.
-  void setHasFloatingPointExceptions(bool FPExceptions = true) {
-    HasFloatingPointExceptions = FPExceptions;
-  }
-
-  /// Tells the code generator which bitwidths to bypass.
-  void addBypassSlowDiv(unsigned int SlowBitWidth, unsigned int FastBitWidth) {
-    BypassSlowDivWidths[SlowBitWidth] = FastBitWidth;
-  }
-
-  /// Add the specified register class as an available regclass for the
-  /// specified value type. This indicates the selector can handle values of
-  /// that class natively.
-  void addRegisterClass(MVT VT, const TargetRegisterClass *RC) {
-    assert((unsigned)VT.SimpleTy < array_lengthof(RegClassForVT));
-    RegClassForVT[VT.SimpleTy] = RC;
-  }
-
-  /// Return the largest legal super-reg register class of the register class
-  /// for the specified type and its associated "cost".
-  virtual std::pair<const TargetRegisterClass *, uint8_t>
-  findRepresentativeClass(const TargetRegisterInfo *TRI, MVT VT) const;
-
-  /// Once all of the register classes are added, this allows us to compute
-  /// derived properties we expose.
-  void computeRegisterProperties(const TargetRegisterInfo *TRI);
-
-  /// Indicate that the specified operation does not work with the specified
-  /// type and indicate what to do about it. Note that VT may refer to either
-  /// the type of a result or that of an operand of Op.
-  void setOperationAction(unsigned Op, MVT VT,
-                          LegalizeAction Action) {
-    assert(Op < array_lengthof(OpActions[0]) && "Table isn't big enough!");
-    OpActions[(unsigned)VT.SimpleTy][Op] = Action;
-  }
-
-  /// Indicate that the specified load with extension does not work with the
-  /// specified type and indicate what to do about it.
-  void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
-                        LegalizeAction Action) {
-    assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValVT.isValid() &&
-           MemVT.isValid() && "Table isn't big enough!");
-    assert((unsigned)Action < 0x10 && "too many bits for bitfield array");
-    unsigned Shift = 4 * ExtType;
-    LoadExtActions[ValVT.SimpleTy][MemVT.SimpleTy] &= ~((uint16_t)0xF << Shift);
-    LoadExtActions[ValVT.SimpleTy][MemVT.SimpleTy] |= (uint16_t)Action << Shift;
-  }
-
-  /// Indicate that the specified truncating store does not work with the
-  /// specified type and indicate what to do about it.
-  void setTruncStoreAction(MVT ValVT, MVT MemVT,
-                           LegalizeAction Action) {
-    assert(ValVT.isValid() && MemVT.isValid() && "Table isn't big enough!");
-    TruncStoreActions[(unsigned)ValVT.SimpleTy][MemVT.SimpleTy] = Action;
-  }
-
-  /// Indicate that the specified indexed load does or does not work with the
-  /// specified type and indicate what to do abort it.
-  ///
-  /// NOTE: All indexed mode loads are initialized to Expand in
-  /// TargetLowering.cpp
-  void setIndexedLoadAction(unsigned IdxMode, MVT VT,
-                            LegalizeAction Action) {
-    assert(VT.isValid() && IdxMode < ISD::LAST_INDEXED_MODE &&
-           (unsigned)Action < 0xf && "Table isn't big enough!");
-    // Load action are kept in the upper half.
-    IndexedModeActions[(unsigned)VT.SimpleTy][IdxMode] &= ~0xf0;
-    IndexedModeActions[(unsigned)VT.SimpleTy][IdxMode] |= ((uint8_t)Action) <<4;
-  }
-
-  /// Indicate that the specified indexed store does or does not work with the
-  /// specified type and indicate what to do about it.
-  ///
-  /// NOTE: All indexed mode stores are initialized to Expand in
-  /// TargetLowering.cpp
-  void setIndexedStoreAction(unsigned IdxMode, MVT VT,
-                             LegalizeAction Action) {
-    assert(VT.isValid() && IdxMode < ISD::LAST_INDEXED_MODE &&
-           (unsigned)Action < 0xf && "Table isn't big enough!");
-    // Store action are kept in the lower half.
-    IndexedModeActions[(unsigned)VT.SimpleTy][IdxMode] &= ~0x0f;
-    IndexedModeActions[(unsigned)VT.SimpleTy][IdxMode] |= ((uint8_t)Action);
-  }
-
-  /// Indicate that the specified condition code is or isn't supported on the
-  /// target and indicate what to do about it.
-  void setCondCodeAction(ISD::CondCode CC, MVT VT,
-                         LegalizeAction Action) {
-    assert(VT.isValid() && (unsigned)CC < array_lengthof(CondCodeActions) &&
-           "Table isn't big enough!");
-    assert((unsigned)Action < 0x10 && "too many bits for bitfield array");
-    /// The lower 3 bits of the SimpleTy index into Nth 4bit set from the 32-bit
-    /// value and the upper 29 bits index into the second dimension of the array
-    /// to select what 32-bit value to use.
-    uint32_t Shift = 4 * (VT.SimpleTy & 0x7);
-    CondCodeActions[CC][VT.SimpleTy >> 3] &= ~((uint32_t)0xF << Shift);
-    CondCodeActions[CC][VT.SimpleTy >> 3] |= (uint32_t)Action << Shift;
-  }
-
-  /// If Opc/OrigVT is specified as being promoted, the promotion code defaults
-  /// to trying a larger integer/fp until it can find one that works. If that
-  /// default is insufficient, this method can be used by the target to override
-  /// the default.
-  void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) {
-    PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy;
-  }
-
-  /// Convenience method to set an operation to Promote and specify the type
-  /// in a single call.
-  void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) {
-    setOperationAction(Opc, OrigVT, Promote);
-    AddPromotedToType(Opc, OrigVT, DestVT);
-  }
-
-  /// Targets should invoke this method for each target independent node that
-  /// they want to provide a custom DAG combiner for by implementing the
-  /// PerformDAGCombine virtual method.
-  void setTargetDAGCombine(ISD::NodeType NT) {
-    assert(unsigned(NT >> 3) < array_lengthof(TargetDAGCombineArray));
-    TargetDAGCombineArray[NT >> 3] |= 1 << (NT&7);
-  }
-
-  /// Set the target's required jmp_buf buffer size (in bytes); default is 200
-  void setJumpBufSize(unsigned Size) {
-    JumpBufSize = Size;
-  }
-
-  /// Set the target's required jmp_buf buffer alignment (in bytes); default is
-  /// 0
-  void setJumpBufAlignment(unsigned Align) {
-    JumpBufAlignment = Align;
-  }
-
-  /// Set the target's minimum function alignment (in log2(bytes))
-  void setMinFunctionAlignment(unsigned Align) {
-    MinFunctionAlignment = Align;
-  }
-
-  /// Set the target's preferred function alignment.  This should be set if
-  /// there is a performance benefit to higher-than-minimum alignment (in
-  /// log2(bytes))
-  void setPrefFunctionAlignment(unsigned Align) {
-    PrefFunctionAlignment = Align;
-  }
-
-  /// Set the target's preferred loop alignment. Default alignment is zero, it
-  /// means the target does not care about loop alignment.  The alignment is
-  /// specified in log2(bytes). The target may also override
-  /// getPrefLoopAlignment to provide per-loop values.
-  void setPrefLoopAlignment(unsigned Align) {
-    PrefLoopAlignment = Align;
-  }
-
-  /// Set the minimum stack alignment of an argument (in log2(bytes)).
-  void setMinStackArgumentAlignment(unsigned Align) {
-    MinStackArgumentAlignment = Align;
-  }
-
-  /// Set the maximum atomic operation size supported by the
-  /// backend. Atomic operations greater than this size (as well as
-  /// ones that are not naturally aligned), will be expanded by
-  /// AtomicExpandPass into an __atomic_* library call.
-  void setMaxAtomicSizeInBitsSupported(unsigned SizeInBits) {
-    MaxAtomicSizeInBitsSupported = SizeInBits;
-  }
-
-  // Sets the minimum cmpxchg or ll/sc size supported by the backend.
-  void setMinCmpXchgSizeInBits(unsigned SizeInBits) {
-    MinCmpXchgSizeInBits = SizeInBits;
-  }
-
-public:
-  //===--------------------------------------------------------------------===//
-  // Addressing mode description hooks (used by LSR etc).
-  //
-
-  /// CodeGenPrepare sinks address calculations into the same BB as Load/Store
-  /// instructions reading the address. This allows as much computation as
-  /// possible to be done in the address mode for that operand. This hook lets
-  /// targets also pass back when this should be done on intrinsics which
-  /// load/store.
-  virtual bool getAddrModeArguments(IntrinsicInst * /*I*/,
-                                    SmallVectorImpl<Value*> &/*Ops*/,
-                                    Type *&/*AccessTy*/) const {
-    return false;
-  }
-
-  /// This represents an addressing mode of:
-  ///    BaseGV + BaseOffs + BaseReg + Scale*ScaleReg
-  /// If BaseGV is null,  there is no BaseGV.
-  /// If BaseOffs is zero, there is no base offset.
-  /// If HasBaseReg is false, there is no base register.
-  /// If Scale is zero, there is no ScaleReg.  Scale of 1 indicates a reg with
-  /// no scale.
-  struct AddrMode {
-    GlobalValue *BaseGV = nullptr;
-    int64_t      BaseOffs = 0;
-    bool         HasBaseReg = false;
-    int64_t      Scale = 0;
-    AddrMode() = default;
-  };
-
-  /// Return true if the addressing mode represented by AM is legal for this
-  /// target, for a load/store of the specified type.
-  ///
-  /// The type may be VoidTy, in which case only return true if the addressing
-  /// mode is legal for a load/store of any legal type.  TODO: Handle
-  /// pre/postinc as well.
-  ///
-  /// If the address space cannot be determined, it will be -1.
-  ///
-  /// TODO: Remove default argument
-  virtual bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
-                                     Type *Ty, unsigned AddrSpace) const;
-
-  /// \brief Return the cost of the scaling factor used in the addressing mode
-  /// represented by AM for this target, for a load/store of the specified type.
-  ///
-  /// If the AM is supported, the return value must be >= 0.
-  /// If the AM is not supported, it returns a negative value.
-  /// TODO: Handle pre/postinc as well.
-  /// TODO: Remove default argument
-  virtual int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM,
-                                   Type *Ty, unsigned AS = 0) const {
-    // Default: assume that any scaling factor used in a legal AM is free.
-    if (isLegalAddressingMode(DL, AM, Ty, AS))
-      return 0;
-    return -1;
-  }
-
-  virtual bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) const {
-    return true;
-  }
-
-  /// Return true if the specified immediate is legal icmp immediate, that is
-  /// the target has icmp instructions which can compare a register against the
-  /// immediate without having to materialize the immediate into a register.
-  virtual bool isLegalICmpImmediate(int64_t) const {
-    return true;
-  }
-
-  /// Return true if the specified immediate is legal add immediate, that is the
-  /// target has add instructions which can add a register with the immediate
-  /// without having to materialize the immediate into a register.
-  virtual bool isLegalAddImmediate(int64_t) const {
-    return true;
-  }
-
-  /// Return true if it's significantly cheaper to shift a vector by a uniform
-  /// scalar than by an amount which will vary across each lane. On x86, for
-  /// example, there is a "psllw" instruction for the former case, but no simple
-  /// instruction for a general "a << b" operation on vectors.
-  virtual bool isVectorShiftByScalarCheap(Type *Ty) const {
-    return false;
-  }
-
-  /// Returns true if the opcode is a commutative binary operation.
-  virtual bool isCommutativeBinOp(unsigned Opcode) const {
-    // FIXME: This should get its info from the td file.
-    switch (Opcode) {
-    case ISD::ADD:
-    case ISD::SMIN:
-    case ISD::SMAX:
-    case ISD::UMIN:
-    case ISD::UMAX:
-    case ISD::MUL:
-    case ISD::MULHU:
-    case ISD::MULHS:
-    case ISD::SMUL_LOHI:
-    case ISD::UMUL_LOHI:
-    case ISD::FADD:
-    case ISD::FMUL:
-    case ISD::AND:
-    case ISD::OR:
-    case ISD::XOR:
-    case ISD::SADDO:
-    case ISD::UADDO:
-    case ISD::ADDC:
-    case ISD::ADDE:
-    case ISD::FMINNUM:
-    case ISD::FMAXNUM:
-    case ISD::FMINNAN:
-    case ISD::FMAXNAN:
-      return true;
-    default: return false;
-    }
-  }
-
-  /// Return true if it's free to truncate a value of type FromTy to type
-  /// ToTy. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
-  /// by referencing its sub-register AX.
-  /// Targets must return false when FromTy <= ToTy.
-  virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const {
-    return false;
-  }
-
-  /// Return true if a truncation from FromTy to ToTy is permitted when deciding
-  /// whether a call is in tail position. Typically this means that both results
-  /// would be assigned to the same register or stack slot, but it could mean
-  /// the target performs adequate checks of its own before proceeding with the
-  /// tail call.  Targets must return false when FromTy <= ToTy.
-  virtual bool allowTruncateForTailCall(Type *FromTy, Type *ToTy) const {
-    return false;
-  }
-
-  virtual bool isTruncateFree(EVT FromVT, EVT ToVT) const {
-    return false;
-  }
-
-  virtual bool isProfitableToHoist(Instruction *I) const { return true; }
-
-  /// Return true if the extension represented by \p I is free.
-  /// Unlikely the is[Z|FP]ExtFree family which is based on types,
-  /// this method can use the context provided by \p I to decide
-  /// whether or not \p I is free.
-  /// This method extends the behavior of the is[Z|FP]ExtFree family.
-  /// In other words, if is[Z|FP]Free returns true, then this method
-  /// returns true as well. The converse is not true.
-  /// The target can perform the adequate checks by overriding isExtFreeImpl.
-  /// \pre \p I must be a sign, zero, or fp extension.
-  bool isExtFree(const Instruction *I) const {
-    switch (I->getOpcode()) {
-    case Instruction::FPExt:
-      if (isFPExtFree(EVT::getEVT(I->getType())))
-        return true;
-      break;
-    case Instruction::ZExt:
-      if (isZExtFree(I->getOperand(0)->getType(), I->getType()))
-        return true;
-      break;
-    case Instruction::SExt:
-      break;
-    default:
-      llvm_unreachable("Instruction is not an extension");
-    }
-    return isExtFreeImpl(I);
-  }
-
-  /// Return true if \p Load and \p Ext can form an ExtLoad.
-  /// For example, in AArch64
-  ///   %L = load i8, i8* %ptr
-  ///   %E = zext i8 %L to i32
-  /// can be lowered into one load instruction
-  ///   ldrb w0, [x0]
-  bool isExtLoad(const LoadInst *Load, const Instruction *Ext,
-                 const DataLayout &DL) const {
-    EVT VT = getValueType(DL, Ext->getType());
-    EVT LoadVT = getValueType(DL, Load->getType());
-
-    // If the load has other users and the truncate is not free, the ext
-    // probably isn't free.
-    if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) &&
-        !isTruncateFree(Ext->getType(), Load->getType()))
-      return false;
-
-    // Check whether the target supports casts folded into loads.
-    unsigned LType;
-    if (isa<ZExtInst>(Ext))
-      LType = ISD::ZEXTLOAD;
-    else {
-      assert(isa<SExtInst>(Ext) && "Unexpected ext type!");
-      LType = ISD::SEXTLOAD;
-    }
-
-    return isLoadExtLegal(LType, VT, LoadVT);
-  }
-
-  /// Return true if any actual instruction that defines a value of type FromTy
-  /// implicitly zero-extends the value to ToTy in the result register.
-  ///
-  /// The function should return true when it is likely that the truncate can
-  /// be freely folded with an instruction defining a value of FromTy. If
-  /// the defining instruction is unknown (because you're looking at a
-  /// function argument, PHI, etc.) then the target may require an
-  /// explicit truncate, which is not necessarily free, but this function
-  /// does not deal with those cases.
-  /// Targets must return false when FromTy >= ToTy.
-  virtual bool isZExtFree(Type *FromTy, Type *ToTy) const {
-    return false;
-  }
-
-  virtual bool isZExtFree(EVT FromTy, EVT ToTy) const {
-    return false;
-  }
-
-  /// Return true if the target supplies and combines to a paired load
-  /// two loaded values of type LoadedType next to each other in memory.
-  /// RequiredAlignment gives the minimal alignment constraints that must be met
-  /// to be able to select this paired load.
-  ///
-  /// This information is *not* used to generate actual paired loads, but it is
-  /// used to generate a sequence of loads that is easier to combine into a
-  /// paired load.
-  /// For instance, something like this:
-  /// a = load i64* addr
-  /// b = trunc i64 a to i32
-  /// c = lshr i64 a, 32
-  /// d = trunc i64 c to i32
-  /// will be optimized into:
-  /// b = load i32* addr1
-  /// d = load i32* addr2
-  /// Where addr1 = addr2 +/- sizeof(i32).
-  ///
-  /// In other words, unless the target performs a post-isel load combining,
-  /// this information should not be provided because it will generate more
-  /// loads.
-  virtual bool hasPairedLoad(EVT /*LoadedType*/,
-                             unsigned & /*RequiredAlignment*/) const {
-    return false;
-  }
-
-  /// \brief Get the maximum supported factor for interleaved memory accesses.
-  /// Default to be the minimum interleave factor: 2.
-  virtual unsigned getMaxSupportedInterleaveFactor() const { return 2; }
-
-  /// \brief Lower an interleaved load to target specific intrinsics. Return
-  /// true on success.
-  ///
-  /// \p LI is the vector load instruction.
-  /// \p Shuffles is the shufflevector list to DE-interleave the loaded vector.
-  /// \p Indices is the corresponding indices for each shufflevector.
-  /// \p Factor is the interleave factor.
-  virtual bool lowerInterleavedLoad(LoadInst *LI,
-                                    ArrayRef<ShuffleVectorInst *> Shuffles,
-                                    ArrayRef<unsigned> Indices,
-                                    unsigned Factor) const {
-    return false;
-  }
-
-  /// \brief Lower an interleaved store to target specific intrinsics. Return
-  /// true on success.
-  ///
-  /// \p SI is the vector store instruction.
-  /// \p SVI is the shufflevector to RE-interleave the stored vector.
-  /// \p Factor is the interleave factor.
-  virtual bool lowerInterleavedStore(StoreInst *SI, ShuffleVectorInst *SVI,
-                                     unsigned Factor) const {
-    return false;
-  }
-
-  /// Return true if zero-extending the specific node Val to type VT2 is free
-  /// (either because it's implicitly zero-extended such as ARM ldrb / ldrh or
-  /// because it's folded such as X86 zero-extending loads).
-  virtual bool isZExtFree(SDValue Val, EVT VT2) const {
-    return isZExtFree(Val.getValueType(), VT2);
-  }
-
-  /// Return true if an fpext operation is free (for instance, because
-  /// single-precision floating-point numbers are implicitly extended to
-  /// double-precision).
-  virtual bool isFPExtFree(EVT VT) const {
-    assert(VT.isFloatingPoint());
-    return false;
-  }
-
-  /// Return true if folding a vector load into ExtVal (a sign, zero, or any
-  /// extend node) is profitable.
-  virtual bool isVectorLoadExtDesirable(SDValue ExtVal) const { return false; }
-
-  /// Return true if an fneg operation is free to the point where it is never
-  /// worthwhile to replace it with a bitwise operation.
-  virtual bool isFNegFree(EVT VT) const {
-    assert(VT.isFloatingPoint());
-    return false;
-  }
-
-  /// Return true if an fabs operation is free to the point where it is never
-  /// worthwhile to replace it with a bitwise operation.
-  virtual bool isFAbsFree(EVT VT) const {
-    assert(VT.isFloatingPoint());
-    return false;
-  }
-
-  /// Return true if an FMA operation is faster than a pair of fmul and fadd
-  /// instructions. fmuladd intrinsics will be expanded to FMAs when this method
-  /// returns true, otherwise fmuladd is expanded to fmul + fadd.
-  ///
-  /// NOTE: This may be called before legalization on types for which FMAs are
-  /// not legal, but should return true if those types will eventually legalize
-  /// to types that support FMAs. After legalization, it will only be called on
-  /// types that support FMAs (via Legal or Custom actions)
-  virtual bool isFMAFasterThanFMulAndFAdd(EVT) const {
-    return false;
-  }
-
-  /// Return true if it's profitable to narrow operations of type VT1 to
-  /// VT2. e.g. on x86, it's profitable to narrow from i32 to i8 but not from
-  /// i32 to i16.
-  virtual bool isNarrowingProfitable(EVT /*VT1*/, EVT /*VT2*/) const {
-    return false;
-  }
-
-  /// \brief Return true if it is beneficial to convert a load of a constant to
-  /// just the constant itself.
-  /// On some targets it might be more efficient to use a combination of
-  /// arithmetic instructions to materialize the constant instead of loading it
-  /// from a constant pool.
-  virtual bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
-                                                 Type *Ty) const {
-    return false;
-  }
-
-  /// Return true if EXTRACT_SUBVECTOR is cheap for this result type
-  /// with this index. This is needed because EXTRACT_SUBVECTOR usually
-  /// has custom lowering that depends on the index of the first element,
-  /// and only the target knows which lowering is cheap.
-  virtual bool isExtractSubvectorCheap(EVT ResVT, unsigned Index) const {
-    return false;
-  }
-
-  // Return true if it is profitable to use a scalar input to a BUILD_VECTOR
-  // even if the vector itself has multiple uses.
-  virtual bool aggressivelyPreferBuildVectorSources(EVT VecVT) const {
-    return false;
-  }
-
-  //===--------------------------------------------------------------------===//
-  // Runtime Library hooks
-  //
-
-  /// Rename the default libcall routine name for the specified libcall.
-  void setLibcallName(RTLIB::Libcall Call, const char *Name) {
-    LibcallRoutineNames[Call] = Name;
-  }
-
-  /// Get the libcall routine name for the specified libcall.
-  const char *getLibcallName(RTLIB::Libcall Call) const {
-    return LibcallRoutineNames[Call];
-  }
-
-  /// Override the default CondCode to be used to test the result of the
-  /// comparison libcall against zero.
-  void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) {
-    CmpLibcallCCs[Call] = CC;
-  }
-
-  /// Get the CondCode that's to be used to test the result of the comparison
-  /// libcall against zero.
-  ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const {
-    return CmpLibcallCCs[Call];
-  }
-
-  /// Set the CallingConv that should be used for the specified libcall.
-  void setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC) {
-    LibcallCallingConvs[Call] = CC;
-  }
-
-  /// Get the CallingConv that should be used for the specified libcall.
-  CallingConv::ID getLibcallCallingConv(RTLIB::Libcall Call) const {
-    return LibcallCallingConvs[Call];
-  }
-
-  /// Execute target specific actions to finalize target lowering.
-  /// This is used to set extra flags in MachineFrameInformation and freezing
-  /// the set of reserved registers.
-  /// The default implementation just freezes the set of reserved registers.
-  virtual void finalizeLowering(MachineFunction &MF) const;
-
-private:
-  const TargetMachine &TM;
-
-  /// Tells the code generator that the target has multiple (allocatable)
-  /// condition registers that can be used to store the results of comparisons
-  /// for use by selects and conditional branches. With multiple condition
-  /// registers, the code generator will not aggressively sink comparisons into
-  /// the blocks of their users.
-  bool HasMultipleConditionRegisters;
-
-  /// Tells the code generator that the target has BitExtract instructions.
-  /// The code generator will aggressively sink "shift"s into the blocks of
-  /// their users if the users will generate "and" instructions which can be
-  /// combined with "shift" to BitExtract instructions.
-  bool HasExtractBitsInsn;
-
-  /// Tells the code generator to bypass slow divide or remainder
-  /// instructions. For example, BypassSlowDivWidths[32,8] tells the code
-  /// generator to bypass 32-bit integer div/rem with an 8-bit unsigned integer
-  /// div/rem when the operands are positive and less than 256.
-  DenseMap <unsigned int, unsigned int> BypassSlowDivWidths;
-
-  /// Tells the code generator that it shouldn't generate extra flow control
-  /// instructions and should attempt to combine flow control instructions via
-  /// predication.
-  bool JumpIsExpensive;
-
-  /// Whether the target supports or cares about preserving floating point
-  /// exception behavior.
-  bool HasFloatingPointExceptions;
-
-  /// This target prefers to use _setjmp to implement llvm.setjmp.
-  ///
-  /// Defaults to false.
-  bool UseUnderscoreSetJmp;
-
-  /// This target prefers to use _longjmp to implement llvm.longjmp.
-  ///
-  /// Defaults to false.
-  bool UseUnderscoreLongJmp;
-
-  /// Information about the contents of the high-bits in boolean values held in
-  /// a type wider than i1. See getBooleanContents.
-  BooleanContent BooleanContents;
-
-  /// Information about the contents of the high-bits in boolean values held in
-  /// a type wider than i1. See getBooleanContents.
-  BooleanContent BooleanFloatContents;
-
-  /// Information about the contents of the high-bits in boolean vector values
-  /// when the element type is wider than i1. See getBooleanContents.
-  BooleanContent BooleanVectorContents;
-
-  /// The target scheduling preference: shortest possible total cycles or lowest
-  /// register usage.
-  Sched::Preference SchedPreferenceInfo;
-
-  /// The size, in bytes, of the target's jmp_buf buffers
-  unsigned JumpBufSize;
-
-  /// The alignment, in bytes, of the target's jmp_buf buffers
-  unsigned JumpBufAlignment;
-
-  /// The minimum alignment that any argument on the stack needs to have.
-  unsigned MinStackArgumentAlignment;
-
-  /// The minimum function alignment (used when optimizing for size, and to
-  /// prevent explicitly provided alignment from leading to incorrect code).
-  unsigned MinFunctionAlignment;
-
-  /// The preferred function alignment (used when alignment unspecified and
-  /// optimizing for speed).
-  unsigned PrefFunctionAlignment;
-
-  /// The preferred loop alignment.
-  unsigned PrefLoopAlignment;
-
-  /// Size in bits of the maximum atomics size the backend supports.
-  /// Accesses larger than this will be expanded by AtomicExpandPass.
-  unsigned MaxAtomicSizeInBitsSupported;
-
-  /// Size in bits of the minimum cmpxchg or ll/sc operation the
-  /// backend supports.
-  unsigned MinCmpXchgSizeInBits;
-
-  /// If set to a physical register, this specifies the register that
-  /// llvm.savestack/llvm.restorestack should save and restore.
-  unsigned StackPointerRegisterToSaveRestore;
-
-  /// This indicates the default register class to use for each ValueType the
-  /// target supports natively.
-  const TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE];
-  unsigned char NumRegistersForVT[MVT::LAST_VALUETYPE];
-  MVT RegisterTypeForVT[MVT::LAST_VALUETYPE];
-
-  /// This indicates the "representative" register class to use for each
-  /// ValueType the target supports natively. This information is used by the
-  /// scheduler to track register pressure. By default, the representative
-  /// register class is the largest legal super-reg register class of the
-  /// register class of the specified type. e.g. On x86, i8, i16, and i32's
-  /// representative class would be GR32.
-  const TargetRegisterClass *RepRegClassForVT[MVT::LAST_VALUETYPE];
-
-  /// This indicates the "cost" of the "representative" register class for each
-  /// ValueType. The cost is used by the scheduler to approximate register
-  /// pressure.
-  uint8_t RepRegClassCostForVT[MVT::LAST_VALUETYPE];
-
-  /// For any value types we are promoting or expanding, this contains the value
-  /// type that we are changing to.  For Expanded types, this contains one step
-  /// of the expand (e.g. i64 -> i32), even if there are multiple steps required
-  /// (e.g. i64 -> i16).  For types natively supported by the system, this holds
-  /// the same type (e.g. i32 -> i32).
-  MVT TransformToType[MVT::LAST_VALUETYPE];
-
-  /// For each operation and each value type, keep a LegalizeAction that
-  /// indicates how instruction selection should deal with the operation.  Most
-  /// operations are Legal (aka, supported natively by the target), but
-  /// operations that are not should be described.  Note that operations on
-  /// non-legal value types are not described here.
-  LegalizeAction OpActions[MVT::LAST_VALUETYPE][ISD::BUILTIN_OP_END];
-
-  /// For each load extension type and each value type, keep a LegalizeAction
-  /// that indicates how instruction selection should deal with a load of a
-  /// specific value type and extension type. Uses 4-bits to store the action
-  /// for each of the 4 load ext types.
-  uint16_t LoadExtActions[MVT::LAST_VALUETYPE][MVT::LAST_VALUETYPE];
-
-  /// For each value type pair keep a LegalizeAction that indicates whether a
-  /// truncating store of a specific value type and truncating type is legal.
-  LegalizeAction TruncStoreActions[MVT::LAST_VALUETYPE][MVT::LAST_VALUETYPE];
-
-  /// For each indexed mode and each value type, keep a pair of LegalizeAction
-  /// that indicates how instruction selection should deal with the load /
-  /// store.
-  ///
-  /// The first dimension is the value_type for the reference. The second
-  /// dimension represents the various modes for load store.
-  uint8_t IndexedModeActions[MVT::LAST_VALUETYPE][ISD::LAST_INDEXED_MODE];
-
-  /// For each condition code (ISD::CondCode) keep a LegalizeAction that
-  /// indicates how instruction selection should deal with the condition code.
-  ///
-  /// Because each CC action takes up 4 bits, we need to have the array size be
-  /// large enough to fit all of the value types. This can be done by rounding
-  /// up the MVT::LAST_VALUETYPE value to the next multiple of 8.
-  uint32_t CondCodeActions[ISD::SETCC_INVALID][(MVT::LAST_VALUETYPE + 7) / 8];
-
-protected:
-  ValueTypeActionImpl ValueTypeActions;
-
-private:
-  LegalizeKind getTypeConversion(LLVMContext &Context, EVT VT) const;
-
-  /// Targets can specify ISD nodes that they would like PerformDAGCombine
-  /// callbacks for by calling setTargetDAGCombine(), which sets a bit in this
-  /// array.
-  unsigned char
-  TargetDAGCombineArray[(ISD::BUILTIN_OP_END+CHAR_BIT-1)/CHAR_BIT];
-
-  /// For operations that must be promoted to a specific type, this holds the
-  /// destination type.  This map should be sparse, so don't hold it as an
-  /// array.
-  ///
-  /// Targets add entries to this map with AddPromotedToType(..), clients access
-  /// this with getTypeToPromoteTo(..).
-  std::map<std::pair<unsigned, MVT::SimpleValueType>, MVT::SimpleValueType>
-    PromoteToType;
-
-  /// Stores the name each libcall.
-  const char *LibcallRoutineNames[RTLIB::UNKNOWN_LIBCALL];
-
-  /// The ISD::CondCode that should be used to test the result of each of the
-  /// comparison libcall against zero.
-  ISD::CondCode CmpLibcallCCs[RTLIB::UNKNOWN_LIBCALL];
-
-  /// Stores the CallingConv that should be used for each libcall.
-  CallingConv::ID LibcallCallingConvs[RTLIB::UNKNOWN_LIBCALL];
-
-protected:
-  /// Return true if the extension represented by \p I is free.
-  /// \pre \p I is a sign, zero, or fp extension and
-  ///      is[Z|FP]ExtFree of the related types is not true.
-  virtual bool isExtFreeImpl(const Instruction *I) const { return false; }
-
-  /// Depth that GatherAllAliases should should continue looking for chain
-  /// dependencies when trying to find a more preferable chain. As an
-  /// approximation, this should be more than the number of consecutive stores
-  /// expected to be merged.
-  unsigned GatherAllAliasesMaxDepth;
-
-  /// \brief Specify maximum number of store instructions per memset call.
-  ///
-  /// When lowering \@llvm.memset this field specifies the maximum number of
-  /// store operations that may be substituted for the call to memset. Targets
-  /// must set this value based on the cost threshold for that target. Targets
-  /// should assume that the memset will be done using as many of the largest
-  /// store operations first, followed by smaller ones, if necessary, per
-  /// alignment restrictions. For example, storing 9 bytes on a 32-bit machine
-  /// with 16-bit alignment would result in four 2-byte stores and one 1-byte
-  /// store.  This only applies to setting a constant array of a constant size.
-  unsigned MaxStoresPerMemset;
-
-  /// Maximum number of stores operations that may be substituted for the call
-  /// to memset, used for functions with OptSize attribute.
-  unsigned MaxStoresPerMemsetOptSize;
-
-  /// \brief Specify maximum bytes of store instructions per memcpy call.
-  ///
-  /// When lowering \@llvm.memcpy this field specifies the maximum number of
-  /// store operations that may be substituted for a call to memcpy. Targets
-  /// must set this value based on the cost threshold for that target. Targets
-  /// should assume that the memcpy will be done using as many of the largest
-  /// store operations first, followed by smaller ones, if necessary, per
-  /// alignment restrictions. For example, storing 7 bytes on a 32-bit machine
-  /// with 32-bit alignment would result in one 4-byte store, a one 2-byte store
-  /// and one 1-byte store. This only applies to copying a constant array of
-  /// constant size.
-  unsigned MaxStoresPerMemcpy;
-
-  /// Maximum number of store operations that may be substituted for a call to
-  /// memcpy, used for functions with OptSize attribute.
-  unsigned MaxStoresPerMemcpyOptSize;
-  unsigned MaxLoadsPerMemcmp;
-  unsigned MaxLoadsPerMemcmpOptSize;
-
-  /// \brief Specify maximum bytes of store instructions per memmove call.
-  ///
-  /// When lowering \@llvm.memmove this field specifies the maximum number of
-  /// store instructions that may be substituted for a call to memmove. Targets
-  /// must set this value based on the cost threshold for that target. Targets
-  /// should assume that the memmove will be done using as many of the largest
-  /// store operations first, followed by smaller ones, if necessary, per
-  /// alignment restrictions. For example, moving 9 bytes on a 32-bit machine
-  /// with 8-bit alignment would result in nine 1-byte stores.  This only
-  /// applies to copying a constant array of constant size.
-  unsigned MaxStoresPerMemmove;
-
-  /// Maximum number of store instructions that may be substituted for a call to
-  /// memmove, used for functions with OptSize attribute.
-  unsigned MaxStoresPerMemmoveOptSize;
-
-  /// Tells the code generator that select is more expensive than a branch if
-  /// the branch is usually predicted right.
-  bool PredictableSelectIsExpensive;
-
-  /// \see enableExtLdPromotion.
-  bool EnableExtLdPromotion;
-
-  /// Return true if the value types that can be represented by the specified
-  /// register class are all legal.
-  bool isLegalRC(const TargetRegisterInfo &TRI,
-                 const TargetRegisterClass &RC) const;
-
-  /// Replace/modify any TargetFrameIndex operands with a targte-dependent
-  /// sequence of memory operands that is recognized by PrologEpilogInserter.
-  MachineBasicBlock *emitPatchPoint(MachineInstr &MI,
-                                    MachineBasicBlock *MBB) const;
-};
-
-/// This class defines information used to lower LLVM code to legal SelectionDAG
-/// operators that the target instruction selector can accept natively.
-///
-/// This class also defines callbacks that targets must implement to lower
-/// target-specific constructs to SelectionDAG operators.
-class TargetLowering : public TargetLoweringBase {
-public:
-  struct DAGCombinerInfo;
-
-  TargetLowering(const TargetLowering &) = delete;
-  TargetLowering &operator=(const TargetLowering &) = delete;
-
-  /// NOTE: The TargetMachine owns TLOF.
-  explicit TargetLowering(const TargetMachine &TM);
-
-  bool isPositionIndependent() const;
-
-  /// Returns true by value, base pointer and offset pointer and addressing mode
-  /// by reference if the node's address can be legally represented as
-  /// pre-indexed load / store address.
-  virtual bool getPreIndexedAddressParts(SDNode * /*N*/, SDValue &/*Base*/,
-                                         SDValue &/*Offset*/,
-                                         ISD::MemIndexedMode &/*AM*/,
-                                         SelectionDAG &/*DAG*/) const {
-    return false;
-  }
-
-  /// Returns true by value, base pointer and offset pointer and addressing mode
-  /// by reference if this node can be combined with a load / store to form a
-  /// post-indexed load / store.
-  virtual bool getPostIndexedAddressParts(SDNode * /*N*/, SDNode * /*Op*/,
-                                          SDValue &/*Base*/,
-                                          SDValue &/*Offset*/,
-                                          ISD::MemIndexedMode &/*AM*/,
-                                          SelectionDAG &/*DAG*/) const {
-    return false;
-  }
-
-  /// Return the entry encoding for a jump table in the current function.  The
-  /// returned value is a member of the MachineJumpTableInfo::JTEntryKind enum.
-  virtual unsigned getJumpTableEncoding() const;
-
-  virtual const MCExpr *
-  LowerCustomJumpTableEntry(const MachineJumpTableInfo * /*MJTI*/,
-                            const MachineBasicBlock * /*MBB*/, unsigned /*uid*/,
-                            MCContext &/*Ctx*/) const {
-    llvm_unreachable("Need to implement this hook if target has custom JTIs");
-  }
-
-  /// Returns relocation base for the given PIC jumptable.
-  virtual SDValue getPICJumpTableRelocBase(SDValue Table,
-                                           SelectionDAG &DAG) const;
-
-  /// This returns the relocation base for the given PIC jumptable, the same as
-  /// getPICJumpTableRelocBase, but as an MCExpr.
-  virtual const MCExpr *
-  getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
-                               unsigned JTI, MCContext &Ctx) const;
-
-  /// Return true if folding a constant offset with the given GlobalAddress is
-  /// legal.  It is frequently not legal in PIC relocation models.
-  virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
-
-  bool isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
-                            SDValue &Chain) const;
-
-  void softenSetCCOperands(SelectionDAG &DAG, EVT VT, SDValue &NewLHS,
-                           SDValue &NewRHS, ISD::CondCode &CCCode,
-                           const SDLoc &DL) const;
-
-  /// Returns a pair of (return value, chain).
-  /// It is an error to pass RTLIB::UNKNOWN_LIBCALL as \p LC.
-  std::pair<SDValue, SDValue> makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC,
-                                          EVT RetVT, ArrayRef<SDValue> Ops,
-                                          bool isSigned, const SDLoc &dl,
-                                          bool doesNotReturn = false,
-                                          bool isReturnValueUsed = true) const;
-
-  /// Check whether parameters to a call that are passed in callee saved
-  /// registers are the same as from the calling function.  This needs to be
-  /// checked for tail call eligibility.
-  bool parametersInCSRMatch(const MachineRegisterInfo &MRI,
-      const uint32_t *CallerPreservedMask,
-      const SmallVectorImpl<CCValAssign> &ArgLocs,
-      const SmallVectorImpl<SDValue> &OutVals) const;
-
-  //===--------------------------------------------------------------------===//
-  // TargetLowering Optimization Methods
-  //
-
-  /// A convenience struct that encapsulates a DAG, and two SDValues for
-  /// returning information from TargetLowering to its clients that want to
-  /// combine.
-  struct TargetLoweringOpt {
-    SelectionDAG &DAG;
-    bool LegalTys;
-    bool LegalOps;
-    SDValue Old;
-    SDValue New;
-
-    explicit TargetLoweringOpt(SelectionDAG &InDAG,
-                               bool LT, bool LO) :
-      DAG(InDAG), LegalTys(LT), LegalOps(LO) {}
-
-    bool LegalTypes() const { return LegalTys; }
-    bool LegalOperations() const { return LegalOps; }
-
-    bool CombineTo(SDValue O, SDValue N) {
-      Old = O;
-      New = N;
-      return true;
-    }
-  };
-
-  /// Check to see if the specified operand of the specified instruction is a
-  /// constant integer.  If so, check to see if there are any bits set in the
-  /// constant that are not demanded.  If so, shrink the constant and return
-  /// true.
-  bool ShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
-                              TargetLoweringOpt &TLO) const;
-
-  // Target hook to do target-specific const optimization, which is called by
-  // ShrinkDemandedConstant. This function should return true if the target
-  // doesn't want ShrinkDemandedConstant to further optimize the constant.
-  virtual bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
-                                            TargetLoweringOpt &TLO) const {
-    return false;
-  }
-
-  /// Convert x+y to (VT)((SmallVT)x+(SmallVT)y) if the casts are free.  This
-  /// uses isZExtFree and ZERO_EXTEND for the widening cast, but it could be
-  /// generalized for targets with other types of implicit widening casts.
-  bool ShrinkDemandedOp(SDValue Op, unsigned BitWidth, const APInt &Demanded,
-                        TargetLoweringOpt &TLO) const;
-
-  /// Helper for SimplifyDemandedBits that can simplify an operation with
-  /// multiple uses.  This function simplifies operand \p OpIdx of \p User and
-  /// then updates \p User with the simplified version. No other uses of
-  /// \p OpIdx are updated. If \p User is the only user of \p OpIdx, this
-  /// function behaves exactly like function SimplifyDemandedBits declared
-  /// below except that it also updates the DAG by calling
-  /// DCI.CommitTargetLoweringOpt.
-  bool SimplifyDemandedBits(SDNode *User, unsigned OpIdx, const APInt &Demanded,
-                            DAGCombinerInfo &DCI, TargetLoweringOpt &TLO) const;
-
-  /// Look at Op.  At this point, we know that only the DemandedMask bits of the
-  /// result of Op are ever used downstream.  If we can use this information to
-  /// simplify Op, create a new simplified DAG node and return true, returning
-  /// the original and new nodes in Old and New.  Otherwise, analyze the
-  /// expression and return a mask of KnownOne and KnownZero bits for the
-  /// expression (used to simplify the caller).  The KnownZero/One bits may only
-  /// be accurate for those bits in the DemandedMask.
-  /// \p AssumeSingleUse When this parameter is true, this function will
-  ///    attempt to simplify \p Op even if there are multiple uses.
-  ///    Callers are responsible for correctly updating the DAG based on the
-  ///    results of this function, because simply replacing replacing TLO.Old
-  ///    with TLO.New will be incorrect when this parameter is true and TLO.Old
-  ///    has multiple uses.
-  bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedMask,
-                            KnownBits &Known,
-                            TargetLoweringOpt &TLO,
-                            unsigned Depth = 0,
-                            bool AssumeSingleUse = false) const;
-
-  /// Helper wrapper around SimplifyDemandedBits
-  bool SimplifyDemandedBits(SDValue Op, APInt &DemandedMask,
-                            DAGCombinerInfo &DCI) const;
-
-  /// Determine which of the bits specified in Mask are known to be either zero
-  /// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
-  /// argument allows us to only collect the known bits that are shared by the
-  /// requested vector elements.
-  virtual void computeKnownBitsForTargetNode(const SDValue Op,
-                                             KnownBits &Known,
-                                             const APInt &DemandedElts,
-                                             const SelectionDAG &DAG,
-                                             unsigned Depth = 0) const;
-
-  /// This method can be implemented by targets that want to expose additional
-  /// information about sign bits to the DAG Combiner. The DemandedElts
-  /// argument allows us to only collect the minimum sign bits that are shared
-  /// by the requested vector elements.
-  virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op,
-                                                   const APInt &DemandedElts,
-                                                   const SelectionDAG &DAG,
-                                                   unsigned Depth = 0) const;
-
-  struct DAGCombinerInfo {
-    void *DC;  // The DAG Combiner object.
-    CombineLevel Level;
-    bool CalledByLegalizer;
-
-  public:
-    SelectionDAG &DAG;
-
-    DAGCombinerInfo(SelectionDAG &dag, CombineLevel level,  bool cl, void *dc)
-      : DC(dc), Level(level), CalledByLegalizer(cl), DAG(dag) {}
-
-    bool isBeforeLegalize() const { return Level == BeforeLegalizeTypes; }
-    bool isBeforeLegalizeOps() const { return Level < AfterLegalizeVectorOps; }
-    bool isAfterLegalizeVectorOps() const {
-      return Level == AfterLegalizeDAG;
-    }
-    CombineLevel getDAGCombineLevel() { return Level; }
-    bool isCalledByLegalizer() const { return CalledByLegalizer; }
-
-    void AddToWorklist(SDNode *N);
-    SDValue CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo = true);
-    SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true);
-    SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo = true);
-
-    void CommitTargetLoweringOpt(const TargetLoweringOpt &TLO);
-  };
-
-  /// Return if the N is a constant or constant vector equal to the true value
-  /// from getBooleanContents().
-  bool isConstTrueVal(const SDNode *N) const;
-
-  /// Return if the N is a constant or constant vector equal to the false value
-  /// from getBooleanContents().
-  bool isConstFalseVal(const SDNode *N) const;
-
-  /// Return a constant of type VT that contains a true value that respects
-  /// getBooleanContents()
-  SDValue getConstTrueVal(SelectionDAG &DAG, EVT VT, const SDLoc &DL) const;
-
-  /// Return if \p N is a True value when extended to \p VT.
-  bool isExtendedTrueVal(const ConstantSDNode *N, EVT VT, bool Signed) const;
-
-  /// Try to simplify a setcc built with the specified operands and cc. If it is
-  /// unable to simplify it, return a null SDValue.
-  SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
-                        bool foldBooleans, DAGCombinerInfo &DCI,
-                        const SDLoc &dl) const;
-
-  /// Returns true (and the GlobalValue and the offset) if the node is a
-  /// GlobalAddress + offset.
-  virtual bool
-  isGAPlusOffset(SDNode *N, const GlobalValue* &GA, int64_t &Offset) const;
-
-  /// This method will be invoked for all target nodes and for any
-  /// target-independent nodes that the target has registered with invoke it
-  /// for.
-  ///
-  /// The semantics are as follows:
-  /// Return Value:
-  ///   SDValue.Val == 0   - No change was made
-  ///   SDValue.Val == N   - N was replaced, is dead, and is already handled.
-  ///   otherwise          - N should be replaced by the returned Operand.
-  ///
-  /// In addition, methods provided by DAGCombinerInfo may be used to perform
-  /// more complex transformations.
-  ///
-  virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
-
-  /// Return true if it is profitable to move a following shift through this
-  //  node, adjusting any immediate operands as necessary to preserve semantics.
-  //  This transformation may not be desirable if it disrupts a particularly
-  //  auspicious target-specific tree (e.g. bitfield extraction in AArch64).
-  //  By default, it returns true.
-  virtual bool isDesirableToCommuteWithShift(const SDNode *N) const {
-    return true;
-  }
-
-  // Return true if it is profitable to combine a BUILD_VECTOR to a TRUNCATE.
-  // Example of such a combine:
-  // v4i32 build_vector((extract_elt V, 0),
-  //                    (extract_elt V, 2),
-  //                    (extract_elt V, 4),
-  //                    (extract_elt V, 6))
-  //  -->
-  // v4i32 truncate (bitcast V to v4i64)
-  virtual bool isDesirableToCombineBuildVectorToTruncate() const {
-    return false;
-  }
-
-  /// Return true if the target has native support for the specified value type
-  /// and it is 'desirable' to use the type for the given node type. e.g. On x86
-  /// i16 is legal, but undesirable since i16 instruction encodings are longer
-  /// and some i16 instructions are slow.
-  virtual bool isTypeDesirableForOp(unsigned /*Opc*/, EVT VT) const {
-    // By default, assume all legal types are desirable.
-    return isTypeLegal(VT);
-  }
-
-  /// Return true if it is profitable for dag combiner to transform a floating
-  /// point op of specified opcode to a equivalent op of an integer
-  /// type. e.g. f32 load -> i32 load can be profitable on ARM.
-  virtual bool isDesirableToTransformToIntegerOp(unsigned /*Opc*/,
-                                                 EVT /*VT*/) const {
-    return false;
-  }
-
-  /// This method query the target whether it is beneficial for dag combiner to
-  /// promote the specified node. If true, it should return the desired
-  /// promotion type by reference.
-  virtual bool IsDesirableToPromoteOp(SDValue /*Op*/, EVT &/*PVT*/) const {
-    return false;
-  }
-
-  /// Return true if the target supports swifterror attribute. It optimizes
-  /// loads and stores to reading and writing a specific register.
-  virtual bool supportSwiftError() const {
-    return false;
-  }
-
-  /// Return true if the target supports that a subset of CSRs for the given
-  /// machine function is handled explicitly via copies.
-  virtual bool supportSplitCSR(MachineFunction *MF) const {
-    return false;
-  }
-
-  /// Perform necessary initialization to handle a subset of CSRs explicitly
-  /// via copies. This function is called at the beginning of instruction
-  /// selection.
-  virtual void initializeSplitCSR(MachineBasicBlock *Entry) const {
-    llvm_unreachable("Not Implemented");
-  }
-
-  /// Insert explicit copies in entry and exit blocks. We copy a subset of
-  /// CSRs to virtual registers in the entry block, and copy them back to
-  /// physical registers in the exit blocks. This function is called at the end
-  /// of instruction selection.
-  virtual void insertCopiesSplitCSR(
-      MachineBasicBlock *Entry,
-      const SmallVectorImpl<MachineBasicBlock *> &Exits) const {
-    llvm_unreachable("Not Implemented");
-  }
-
-  //===--------------------------------------------------------------------===//
-  // Lowering methods - These methods must be implemented by targets so that
-  // the SelectionDAGBuilder code knows how to lower these.
-  //
-
-  /// This hook must be implemented to lower the incoming (formal) arguments,
-  /// described by the Ins array, into the specified DAG. The implementation
-  /// should fill in the InVals array with legal-type argument values, and
-  /// return the resulting token chain value.
-  virtual SDValue LowerFormalArguments(
-      SDValue /*Chain*/, CallingConv::ID /*CallConv*/, bool /*isVarArg*/,
-      const SmallVectorImpl<ISD::InputArg> & /*Ins*/, const SDLoc & /*dl*/,
-      SelectionDAG & /*DAG*/, SmallVectorImpl<SDValue> & /*InVals*/) const {
-    llvm_unreachable("Not Implemented");
-  }
-
-  /// This structure contains all information that is necessary for lowering
-  /// calls. It is passed to TLI::LowerCallTo when the SelectionDAG builder
-  /// needs to lower a call, and targets will see this struct in their LowerCall
-  /// implementation.
-  struct CallLoweringInfo {
-    SDValue Chain;
-    Type *RetTy = nullptr;
-    bool RetSExt           : 1;
-    bool RetZExt           : 1;
-    bool IsVarArg          : 1;
-    bool IsInReg           : 1;
-    bool DoesNotReturn     : 1;
-    bool IsReturnValueUsed : 1;
-    bool IsConvergent      : 1;
-    bool IsPatchPoint      : 1;
-
-    // IsTailCall should be modified by implementations of
-    // TargetLowering::LowerCall that perform tail call conversions.
-    bool IsTailCall = false;
-
-    // Is Call lowering done post SelectionDAG type legalization.
-    bool IsPostTypeLegalization = false;
-
-    unsigned NumFixedArgs = -1;
-    CallingConv::ID CallConv = CallingConv::C;
-    SDValue Callee;
-    ArgListTy Args;
-    SelectionDAG &DAG;
-    SDLoc DL;
-    ImmutableCallSite *CS = nullptr;
-    SmallVector<ISD::OutputArg, 32> Outs;
-    SmallVector<SDValue, 32> OutVals;
-    SmallVector<ISD::InputArg, 32> Ins;
-    SmallVector<SDValue, 4> InVals;
-
-    CallLoweringInfo(SelectionDAG &DAG)
-        : RetSExt(false), RetZExt(false), IsVarArg(false), IsInReg(false),
-          DoesNotReturn(false), IsReturnValueUsed(true), IsConvergent(false),
-          IsPatchPoint(false), DAG(DAG) {}
-
-    CallLoweringInfo &setDebugLoc(const SDLoc &dl) {
-      DL = dl;
-      return *this;
-    }
-
-    CallLoweringInfo &setChain(SDValue InChain) {
-      Chain = InChain;
-      return *this;
-    }
-
-    // setCallee with target/module-specific attributes
-    CallLoweringInfo &setLibCallee(CallingConv::ID CC, Type *ResultType,
-                                   SDValue Target, ArgListTy &&ArgsList) {
-      RetTy = ResultType;
-      Callee = Target;
-      CallConv = CC;
-      NumFixedArgs = Args.size();
-      Args = std::move(ArgsList);
-
-      DAG.getTargetLoweringInfo().markLibCallAttributes(
-          &(DAG.getMachineFunction()), CC, Args);
-      return *this;
-    }
-
-    CallLoweringInfo &setCallee(CallingConv::ID CC, Type *ResultType,
-                                SDValue Target, ArgListTy &&ArgsList) {
-      RetTy = ResultType;
-      Callee = Target;
-      CallConv = CC;
-      NumFixedArgs = Args.size();
-      Args = std::move(ArgsList);
-      return *this;
-    }
-
-    CallLoweringInfo &setCallee(Type *ResultType, FunctionType *FTy,
-                                SDValue Target, ArgListTy &&ArgsList,
-                                ImmutableCallSite &Call) {
-      RetTy = ResultType;
-
-      IsInReg = Call.hasRetAttr(Attribute::InReg);
-      DoesNotReturn =
-          Call.doesNotReturn() ||
-          (!Call.isInvoke() &&
-           isa<UnreachableInst>(Call.getInstruction()->getNextNode()));
-      IsVarArg = FTy->isVarArg();
-      IsReturnValueUsed = !Call.getInstruction()->use_empty();
-      RetSExt = Call.hasRetAttr(Attribute::SExt);
-      RetZExt = Call.hasRetAttr(Attribute::ZExt);
-
-      Callee = Target;
-
-      CallConv = Call.getCallingConv();
-      NumFixedArgs = FTy->getNumParams();
-      Args = std::move(ArgsList);
-
-      CS = &Call;
-
-      return *this;
-    }
-
-    CallLoweringInfo &setInRegister(bool Value = true) {
-      IsInReg = Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setNoReturn(bool Value = true) {
-      DoesNotReturn = Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setVarArg(bool Value = true) {
-      IsVarArg = Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setTailCall(bool Value = true) {
-      IsTailCall = Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setDiscardResult(bool Value = true) {
-      IsReturnValueUsed = !Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setConvergent(bool Value = true) {
-      IsConvergent = Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setSExtResult(bool Value = true) {
-      RetSExt = Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setZExtResult(bool Value = true) {
-      RetZExt = Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setIsPatchPoint(bool Value = true) {
-      IsPatchPoint = Value;
-      return *this;
-    }
-
-    CallLoweringInfo &setIsPostTypeLegalization(bool Value=true) {
-      IsPostTypeLegalization = Value;
-      return *this;
-    }
-
-    ArgListTy &getArgs() {
-      return Args;
-    }
-  };
-
-  /// This function lowers an abstract call to a function into an actual call.
-  /// This returns a pair of operands.  The first element is the return value
-  /// for the function (if RetTy is not VoidTy).  The second element is the
-  /// outgoing token chain. It calls LowerCall to do the actual lowering.
-  std::pair<SDValue, SDValue> LowerCallTo(CallLoweringInfo &CLI) const;
-
-  /// This hook must be implemented to lower calls into the specified
-  /// DAG. The outgoing arguments to the call are described by the Outs array,
-  /// and the values to be returned by the call are described by the Ins
-  /// array. The implementation should fill in the InVals array with legal-type
-  /// return values from the call, and return the resulting token chain value.
-  virtual SDValue
-    LowerCall(CallLoweringInfo &/*CLI*/,
-              SmallVectorImpl<SDValue> &/*InVals*/) const {
-    llvm_unreachable("Not Implemented");
-  }
-
-  /// Target-specific cleanup for formal ByVal parameters.
-  virtual void HandleByVal(CCState *, unsigned &, unsigned) const {}
-
-  /// This hook should be implemented to check whether the return values
-  /// described by the Outs array can fit into the return registers.  If false
-  /// is returned, an sret-demotion is performed.
-  virtual bool CanLowerReturn(CallingConv::ID /*CallConv*/,
-                              MachineFunction &/*MF*/, bool /*isVarArg*/,
-               const SmallVectorImpl<ISD::OutputArg> &/*Outs*/,
-               LLVMContext &/*Context*/) const
-  {
-    // Return true by default to get preexisting behavior.
-    return true;
-  }
-
-  /// This hook must be implemented to lower outgoing return values, described
-  /// by the Outs array, into the specified DAG. The implementation should
-  /// return the resulting token chain value.
-  virtual SDValue LowerReturn(SDValue /*Chain*/, CallingConv::ID /*CallConv*/,
-                              bool /*isVarArg*/,
-                              const SmallVectorImpl<ISD::OutputArg> & /*Outs*/,
-                              const SmallVectorImpl<SDValue> & /*OutVals*/,
-                              const SDLoc & /*dl*/,
-                              SelectionDAG & /*DAG*/) const {
-    llvm_unreachable("Not Implemented");
-  }
-
-  /// Return true if result of the specified node is used by a return node
-  /// only. It also compute and return the input chain for the tail call.
-  ///
-  /// This is used to determine whether it is possible to codegen a libcall as
-  /// tail call at legalization time.
-  virtual bool isUsedByReturnOnly(SDNode *, SDValue &/*Chain*/) const {
-    return false;
-  }
-
-  /// Return true if the target may be able emit the call instruction as a tail
-  /// call. This is used by optimization passes to determine if it's profitable
-  /// to duplicate return instructions to enable tailcall optimization.
-  virtual bool mayBeEmittedAsTailCall(const CallInst *) const {
-    return false;
-  }
-
-  /// Return the builtin name for the __builtin___clear_cache intrinsic
-  /// Default is to invoke the clear cache library call
-  virtual const char * getClearCacheBuiltinName() const {
-    return "__clear_cache";
-  }
-
-  /// Return the register ID of the name passed in. Used by named register
-  /// global variables extension. There is no target-independent behaviour
-  /// so the default action is to bail.
-  virtual unsigned getRegisterByName(const char* RegName, EVT VT,
-                                     SelectionDAG &DAG) const {
-    report_fatal_error("Named registers not implemented for this target");
-  }
-
-  /// Return the type that should be used to zero or sign extend a
-  /// zeroext/signext integer return value.  FIXME: Some C calling conventions
-  /// require the return type to be promoted, but this is not true all the time,
-  /// e.g. i1/i8/i16 on x86/x86_64. It is also not necessary for non-C calling
-  /// conventions. The frontend should handle this and include all of the
-  /// necessary information.
-  virtual EVT getTypeForExtReturn(LLVMContext &Context, EVT VT,
-                                       ISD::NodeType /*ExtendKind*/) const {
-    EVT MinVT = getRegisterType(Context, MVT::i32);
-    return VT.bitsLT(MinVT) ? MinVT : VT;
-  }
-
-  /// For some targets, an LLVM struct type must be broken down into multiple
-  /// simple types, but the calling convention specifies that the entire struct
-  /// must be passed in a block of consecutive registers.
-  virtual bool
-  functionArgumentNeedsConsecutiveRegisters(Type *Ty, CallingConv::ID CallConv,
-                                            bool isVarArg) const {
-    return false;
-  }
-
-  /// Returns a 0 terminated array of registers that can be safely used as
-  /// scratch registers.
-  virtual const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const {
-    return nullptr;
-  }
-
-  /// This callback is used to prepare for a volatile or atomic load.
-  /// It takes a chain node as input and returns the chain for the load itself.
-  ///
-  /// Having a callback like this is necessary for targets like SystemZ,
-  /// which allows a CPU to reuse the result of a previous load indefinitely,
-  /// even if a cache-coherent store is performed by another CPU.  The default
-  /// implementation does nothing.
-  virtual SDValue prepareVolatileOrAtomicLoad(SDValue Chain, const SDLoc &DL,
-                                              SelectionDAG &DAG) const {
-    return Chain;
-  }
-
-  /// This callback is used to inspect load/store instructions and add
-  /// target-specific MachineMemOperand flags to them.  The default
-  /// implementation does nothing.
-  virtual MachineMemOperand::Flags getMMOFlags(const Instruction &I) const {
-    return MachineMemOperand::MONone;
-  }
-
-  /// This callback is invoked by the type legalizer to legalize nodes with an
-  /// illegal operand type but legal result types.  It replaces the
-  /// LowerOperation callback in the type Legalizer.  The reason we can not do
-  /// away with LowerOperation entirely is that LegalizeDAG isn't yet ready to
-  /// use this callback.
-  ///
-  /// TODO: Consider merging with ReplaceNodeResults.
-  ///
-  /// The target places new result values for the node in Results (their number
-  /// and types must exactly match those of the original return values of
-  /// the node), or leaves Results empty, which indicates that the node is not
-  /// to be custom lowered after all.
-  /// The default implementation calls LowerOperation.
-  virtual void LowerOperationWrapper(SDNode *N,
-                                     SmallVectorImpl<SDValue> &Results,
-                                     SelectionDAG &DAG) const;
-
-  /// This callback is invoked for operations that are unsupported by the
-  /// target, which are registered to use 'custom' lowering, and whose defined
-  /// values are all legal.  If the target has no operations that require custom
-  /// lowering, it need not implement this.  The default implementation of this
-  /// aborts.
-  virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
-
-  /// This callback is invoked when a node result type is illegal for the
-  /// target, and the operation was registered to use 'custom' lowering for that
-  /// result type.  The target places new result values for the node in Results
-  /// (their number and types must exactly match those of the original return
-  /// values of the node), or leaves Results empty, which indicates that the
-  /// node is not to be custom lowered after all.
-  ///
-  /// If the target has no operations that require custom lowering, it need not
-  /// implement this.  The default implementation aborts.
-  virtual void ReplaceNodeResults(SDNode * /*N*/,
-                                  SmallVectorImpl<SDValue> &/*Results*/,
-                                  SelectionDAG &/*DAG*/) const {
-    llvm_unreachable("ReplaceNodeResults not implemented for this target!");
-  }
-
-  /// This method returns the name of a target specific DAG node.
-  virtual const char *getTargetNodeName(unsigned Opcode) const;
-
-  /// This method returns a target specific FastISel object, or null if the
-  /// target does not support "fast" ISel.
-  virtual FastISel *createFastISel(FunctionLoweringInfo &,
-                                   const TargetLibraryInfo *) const {
-    return nullptr;
-  }
-
-  bool verifyReturnAddressArgumentIsConstant(SDValue Op,
-                                             SelectionDAG &DAG) const;
-
-  //===--------------------------------------------------------------------===//
-  // Inline Asm Support hooks
-  //
-
-  /// This hook allows the target to expand an inline asm call to be explicit
-  /// llvm code if it wants to.  This is useful for turning simple inline asms
-  /// into LLVM intrinsics, which gives the compiler more information about the
-  /// behavior of the code.
-  virtual bool ExpandInlineAsm(CallInst *) const {
-    return false;
-  }
-
-  enum ConstraintType {
-    C_Register,            // Constraint represents specific register(s).
-    C_RegisterClass,       // Constraint represents any of register(s) in class.
-    C_Memory,              // Memory constraint.
-    C_Other,               // Something else.
-    C_Unknown              // Unsupported constraint.
-  };
-
-  enum ConstraintWeight {
-    // Generic weights.
-    CW_Invalid  = -1,     // No match.
-    CW_Okay     = 0,      // Acceptable.
-    CW_Good     = 1,      // Good weight.
-    CW_Better   = 2,      // Better weight.
-    CW_Best     = 3,      // Best weight.
-
-    // Well-known weights.
-    CW_SpecificReg  = CW_Okay,    // Specific register operands.
-    CW_Register     = CW_Good,    // Register operands.
-    CW_Memory       = CW_Better,  // Memory operands.
-    CW_Constant     = CW_Best,    // Constant operand.
-    CW_Default      = CW_Okay     // Default or don't know type.
-  };
-
-  /// This contains information for each constraint that we are lowering.
-  struct AsmOperandInfo : public InlineAsm::ConstraintInfo {
-    /// This contains the actual string for the code, like "m".  TargetLowering
-    /// picks the 'best' code from ConstraintInfo::Codes that most closely
-    /// matches the operand.
-    std::string ConstraintCode;
-
-    /// Information about the constraint code, e.g. Register, RegisterClass,
-    /// Memory, Other, Unknown.
-    TargetLowering::ConstraintType ConstraintType = TargetLowering::C_Unknown;
-
-    /// If this is the result output operand or a clobber, this is null,
-    /// otherwise it is the incoming operand to the CallInst.  This gets
-    /// modified as the asm is processed.
-    Value *CallOperandVal = nullptr;
-
-    /// The ValueType for the operand value.
-    MVT ConstraintVT = MVT::Other;
-
-    /// Copy constructor for copying from a ConstraintInfo.
-    AsmOperandInfo(InlineAsm::ConstraintInfo Info)
-        : InlineAsm::ConstraintInfo(std::move(Info)) {}
-
-    /// Return true of this is an input operand that is a matching constraint
-    /// like "4".
-    bool isMatchingInputConstraint() const;
-
-    /// If this is an input matching constraint, this method returns the output
-    /// operand it matches.
-    unsigned getMatchedOperand() const;
-  };
-
-  using AsmOperandInfoVector = std::vector<AsmOperandInfo>;
-
-  /// Split up the constraint string from the inline assembly value into the
-  /// specific constraints and their prefixes, and also tie in the associated
-  /// operand values.  If this returns an empty vector, and if the constraint
-  /// string itself isn't empty, there was an error parsing.
-  virtual AsmOperandInfoVector ParseConstraints(const DataLayout &DL,
-                                                const TargetRegisterInfo *TRI,
-                                                ImmutableCallSite CS) const;
-
-  /// Examine constraint type and operand type and determine a weight value.
-  /// The operand object must already have been set up with the operand type.
-  virtual ConstraintWeight getMultipleConstraintMatchWeight(
-      AsmOperandInfo &info, int maIndex) const;
-
-  /// Examine constraint string and operand type and determine a weight value.
-  /// The operand object must already have been set up with the operand type.
-  virtual ConstraintWeight getSingleConstraintMatchWeight(
-      AsmOperandInfo &info, const char *constraint) const;
-
-  /// Determines the constraint code and constraint type to use for the specific
-  /// AsmOperandInfo, setting OpInfo.ConstraintCode and OpInfo.ConstraintType.
-  /// If the actual operand being passed in is available, it can be passed in as
-  /// Op, otherwise an empty SDValue can be passed.
-  virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo,
-                                      SDValue Op,
-                                      SelectionDAG *DAG = nullptr) const;
-
-  /// Given a constraint, return the type of constraint it is for this target.
-  virtual ConstraintType getConstraintType(StringRef Constraint) const;
-
-  /// Given a physical register constraint (e.g.  {edx}), return the register
-  /// number and the register class for the register.
-  ///
-  /// Given a register class constraint, like 'r', if this corresponds directly
-  /// to an LLVM register class, return a register of 0 and the register class
-  /// pointer.
-  ///
-  /// This should only be used for C_Register constraints.  On error, this
-  /// returns a register number of 0 and a null register class pointer.
-  virtual std::pair<unsigned, const TargetRegisterClass *>
-  getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
-                               StringRef Constraint, MVT VT) const;
-
-  virtual unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const {
-    if (ConstraintCode == "i")
-      return InlineAsm::Constraint_i;
-    else if (ConstraintCode == "m")
-      return InlineAsm::Constraint_m;
-    return InlineAsm::Constraint_Unknown;
-  }
-
-  /// Try to replace an X constraint, which matches anything, with another that
-  /// has more specific requirements based on the type of the corresponding
-  /// operand.  This returns null if there is no replacement to make.
-  virtual const char *LowerXConstraint(EVT ConstraintVT) const;
-
-  /// Lower the specified operand into the Ops vector.  If it is invalid, don't
-  /// add anything to Ops.
-  virtual void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint,
-                                            std::vector<SDValue> &Ops,
-                                            SelectionDAG &DAG) const;
-
-  //===--------------------------------------------------------------------===//
-  // Div utility functions
-  //
-  SDValue BuildSDIV(SDNode *N, const APInt &Divisor, SelectionDAG &DAG,
-                    bool IsAfterLegalization,
-                    std::vector<SDNode *> *Created) const;
-  SDValue BuildUDIV(SDNode *N, const APInt &Divisor, SelectionDAG &DAG,
-                    bool IsAfterLegalization,
-                    std::vector<SDNode *> *Created) const;
-
-  /// Targets may override this function to provide custom SDIV lowering for
-  /// power-of-2 denominators.  If the target returns an empty SDValue, LLVM
-  /// assumes SDIV is expensive and replaces it with a series of other integer
-  /// operations.
-  virtual SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor,
-                                SelectionDAG &DAG,
-                                std::vector<SDNode *> *Created) const;
-
-  /// Indicate whether this target prefers to combine FDIVs with the same
-  /// divisor. If the transform should never be done, return zero. If the
-  /// transform should be done, return the minimum number of divisor uses
-  /// that must exist.
-  virtual unsigned combineRepeatedFPDivisors() const {
-    return 0;
-  }
-
-  /// Hooks for building estimates in place of slower divisions and square
-  /// roots.
-
-  /// Return either a square root or its reciprocal estimate value for the input
-  /// operand.
-  /// \p Enabled is a ReciprocalEstimate enum with value either 'Unspecified' or
-  /// 'Enabled' as set by a potential default override attribute.
-  /// If \p RefinementSteps is 'Unspecified', the number of Newton-Raphson
-  /// refinement iterations required to generate a sufficient (though not
-  /// necessarily IEEE-754 compliant) estimate is returned in that parameter.
-  /// The boolean UseOneConstNR output is used to select a Newton-Raphson
-  /// algorithm implementation that uses either one or two constants.
-  /// The boolean Reciprocal is used to select whether the estimate is for the
-  /// square root of the input operand or the reciprocal of its square root.
-  /// A target may choose to implement its own refinement within this function.
-  /// If that's true, then return '0' as the number of RefinementSteps to avoid
-  /// any further refinement of the estimate.
-  /// An empty SDValue return means no estimate sequence can be created.
-  virtual SDValue getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,
-                                  int Enabled, int &RefinementSteps,
-                                  bool &UseOneConstNR, bool Reciprocal) const {
-    return SDValue();
-  }
-
-  /// Return a reciprocal estimate value for the input operand.
-  /// \p Enabled is a ReciprocalEstimate enum with value either 'Unspecified' or
-  /// 'Enabled' as set by a potential default override attribute.
-  /// If \p RefinementSteps is 'Unspecified', the number of Newton-Raphson
-  /// refinement iterations required to generate a sufficient (though not
-  /// necessarily IEEE-754 compliant) estimate is returned in that parameter.
-  /// A target may choose to implement its own refinement within this function.
-  /// If that's true, then return '0' as the number of RefinementSteps to avoid
-  /// any further refinement of the estimate.
-  /// An empty SDValue return means no estimate sequence can be created.
-  virtual SDValue getRecipEstimate(SDValue Operand, SelectionDAG &DAG,
-                                   int Enabled, int &RefinementSteps) const {
-    return SDValue();
-  }
-
-  //===--------------------------------------------------------------------===//
-  // Legalization utility functions
-  //
-
-  /// Expand a MUL or [US]MUL_LOHI of n-bit values into two or four nodes,
-  /// respectively, each computing an n/2-bit part of the result.
-  /// \param Result A vector that will be filled with the parts of the result
-  ///        in little-endian order.
-  /// \param LL Low bits of the LHS of the MUL.  You can use this parameter
-  ///        if you want to control how low bits are extracted from the LHS.
-  /// \param LH High bits of the LHS of the MUL.  See LL for meaning.
-  /// \param RL Low bits of the RHS of the MUL.  See LL for meaning
-  /// \param RH High bits of the RHS of the MUL.  See LL for meaning.
-  /// \returns true if the node has been expanded, false if it has not
-  bool expandMUL_LOHI(unsigned Opcode, EVT VT, SDLoc dl, SDValue LHS,
-                      SDValue RHS, SmallVectorImpl<SDValue> &Result, EVT HiLoVT,
-                      SelectionDAG &DAG, MulExpansionKind Kind,
-                      SDValue LL = SDValue(), SDValue LH = SDValue(),
-                      SDValue RL = SDValue(), SDValue RH = SDValue()) const;
-
-  /// Expand a MUL into two nodes.  One that computes the high bits of
-  /// the result and one that computes the low bits.
-  /// \param HiLoVT The value type to use for the Lo and Hi nodes.
-  /// \param LL Low bits of the LHS of the MUL.  You can use this parameter
-  ///        if you want to control how low bits are extracted from the LHS.
-  /// \param LH High bits of the LHS of the MUL.  See LL for meaning.
-  /// \param RL Low bits of the RHS of the MUL.  See LL for meaning
-  /// \param RH High bits of the RHS of the MUL.  See LL for meaning.
-  /// \returns true if the node has been expanded. false if it has not
-  bool expandMUL(SDNode *N, SDValue &Lo, SDValue &Hi, EVT HiLoVT,
-                 SelectionDAG &DAG, MulExpansionKind Kind,
-                 SDValue LL = SDValue(), SDValue LH = SDValue(),
-                 SDValue RL = SDValue(), SDValue RH = SDValue()) const;
-
-  /// Expand float(f32) to SINT(i64) conversion
-  /// \param N Node to expand
-  /// \param Result output after conversion
-  /// \returns True, if the expansion was successful, false otherwise
-  bool expandFP_TO_SINT(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
-
-  /// Turn load of vector type into a load of the individual elements.
-  /// \param LD load to expand
-  /// \returns MERGE_VALUEs of the scalar loads with their chains.
-  SDValue scalarizeVectorLoad(LoadSDNode *LD, SelectionDAG &DAG) const;
-
-  // Turn a store of a vector type into stores of the individual elements.
-  /// \param ST Store with a vector value type
-  /// \returns MERGE_VALUs of the individual store chains.
-  SDValue scalarizeVectorStore(StoreSDNode *ST, SelectionDAG &DAG) const;
-
-  /// Expands an unaligned load to 2 half-size loads for an integer, and
-  /// possibly more for vectors.
-  std::pair<SDValue, SDValue> expandUnalignedLoad(LoadSDNode *LD,
-                                                  SelectionDAG &DAG) const;
-
-  /// Expands an unaligned store to 2 half-size stores for integer values, and
-  /// possibly more for vectors.
-  SDValue expandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG) const;
-
-  /// Increments memory address \p Addr according to the type of the value
-  /// \p DataVT that should be stored. If the data is stored in compressed
-  /// form, the memory address should be incremented according to the number of
-  /// the stored elements. This number is equal to the number of '1's bits
-  /// in the \p Mask.
-  /// \p DataVT is a vector type. \p Mask is a vector value.
-  /// \p DataVT and \p Mask have the same number of vector elements.
-  SDValue IncrementMemoryAddress(SDValue Addr, SDValue Mask, const SDLoc &DL,
-                                 EVT DataVT, SelectionDAG &DAG,
-                                 bool IsCompressedMemory) const;
-
-  /// Get a pointer to vector element \p Idx located in memory for a vector of
-  /// type \p VecVT starting at a base address of \p VecPtr. If \p Idx is out of
-  /// bounds the returned pointer is unspecified, but will be within the vector
-  /// bounds.
-  SDValue getVectorElementPointer(SelectionDAG &DAG, SDValue VecPtr, EVT VecVT,
-                                  SDValue Idx) const;
-
-  //===--------------------------------------------------------------------===//
-  // Instruction Emitting Hooks
-  //
-
-  /// This method should be implemented by targets that mark instructions with
-  /// the 'usesCustomInserter' flag.  These instructions are special in various
-  /// ways, which require special support to insert.  The specified MachineInstr
-  /// is created but not inserted into any basic blocks, and this method is
-  /// called to expand it into a sequence of instructions, potentially also
-  /// creating new basic blocks and control flow.
-  /// As long as the returned basic block is different (i.e., we created a new
-  /// one), the custom inserter is free to modify the rest of \p MBB.
-  virtual MachineBasicBlock *
-  EmitInstrWithCustomInserter(MachineInstr &MI, MachineBasicBlock *MBB) const;
-
-  /// This method should be implemented by targets that mark instructions with
-  /// the 'hasPostISelHook' flag. These instructions must be adjusted after
-  /// instruction selection by target hooks.  e.g. To fill in optional defs for
-  /// ARM 's' setting instructions.
-  virtual void AdjustInstrPostInstrSelection(MachineInstr &MI,
-                                             SDNode *Node) const;
-
-  /// If this function returns true, SelectionDAGBuilder emits a
-  /// LOAD_STACK_GUARD node when it is lowering Intrinsic::stackprotector.
-  virtual bool useLoadStackGuardNode() const {
-    return false;
-  }
-
-  /// Lower TLS global address SDNode for target independent emulated TLS model.
-  virtual SDValue LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
-                                          SelectionDAG &DAG) const;
-
-  // seteq(x, 0) -> truncate(srl(ctlz(zext(x)), log2(#bits)))
-  // If we're comparing for equality to zero and isCtlzFast is true, expose the
-  // fact that this can be implemented as a ctlz/srl pair, so that the dag
-  // combiner can fold the new nodes.
-  SDValue lowerCmpEqZeroToCtlzSrl(SDValue Op, SelectionDAG &DAG) const;
-
-private:
-  SDValue simplifySetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
-                               ISD::CondCode Cond, DAGCombinerInfo &DCI,
-                               const SDLoc &DL) const;
-};
-
-/// Given an LLVM IR type and return type attributes, compute the return value
-/// EVTs and flags, and optionally also the offsets, if the return value is
-/// being lowered to memory.
-void GetReturnInfo(Type *ReturnType, AttributeList attr,
-                   SmallVectorImpl<ISD::OutputArg> &Outs,
-                   const TargetLowering &TLI, const DataLayout &DL);
-
-} // end namespace llvm
-
-#endif // LLVM_TARGET_TARGETLOWERING_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetOpcodes.def b/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetOpcodes.def
deleted file mode 100644
index cadf86058f0c..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetOpcodes.def
+++ /dev/null
@@ -1,435 +0,0 @@
-//===-- llvm/Target/TargetOpcodes.def - Target Indep Opcodes ------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the target independent instruction opcodes.
-//
-//===----------------------------------------------------------------------===//
-
-// NOTE: NO INCLUDE GUARD DESIRED!
-
-/// HANDLE_TARGET_OPCODE defines an opcode and its associated enum value.
-///
-#ifndef HANDLE_TARGET_OPCODE
-#define HANDLE_TARGET_OPCODE(OPC, NUM)
-#endif
-
-/// HANDLE_TARGET_OPCODE_MARKER defines an alternative identifier for an opcode.
-///
-#ifndef HANDLE_TARGET_OPCODE_MARKER
-#define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC)
-#endif
-
-/// Every instruction defined here must also appear in Target.td.
-///
-HANDLE_TARGET_OPCODE(PHI)
-HANDLE_TARGET_OPCODE(INLINEASM)
-HANDLE_TARGET_OPCODE(CFI_INSTRUCTION)
-HANDLE_TARGET_OPCODE(EH_LABEL)
-HANDLE_TARGET_OPCODE(GC_LABEL)
-
-/// KILL - This instruction is a noop that is used only to adjust the
-/// liveness of registers. This can be useful when dealing with
-/// sub-registers.
-HANDLE_TARGET_OPCODE(KILL)
-
-/// EXTRACT_SUBREG - This instruction takes two operands: a register
-/// that has subregisters, and a subregister index. It returns the
-/// extracted subregister value. This is commonly used to implement
-/// truncation operations on target architectures which support it.
-HANDLE_TARGET_OPCODE(EXTRACT_SUBREG)
-
-/// INSERT_SUBREG - This instruction takes three operands: a register that
-/// has subregisters, a register providing an insert value, and a
-/// subregister index. It returns the value of the first register with the
-/// value of the second register inserted. The first register is often
-/// defined by an IMPLICIT_DEF, because it is commonly used to implement
-/// anyext operations on target architectures which support it.
-HANDLE_TARGET_OPCODE(INSERT_SUBREG)
-
-/// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
-HANDLE_TARGET_OPCODE(IMPLICIT_DEF)
-
-/// SUBREG_TO_REG - Assert the value of bits in a super register.
-/// The result of this instruction is the value of the second operand inserted
-/// into the subregister specified by the third operand. All other bits are
-/// assumed to be equal to the bits in the immediate integer constant in the
-/// first operand. This instruction just communicates information; No code
-/// should be generated.
-/// This is typically used after an instruction where the write to a subregister
-/// implicitly cleared the bits in the super registers.
-HANDLE_TARGET_OPCODE(SUBREG_TO_REG)
-
-/// COPY_TO_REGCLASS - This instruction is a placeholder for a plain
-/// register-to-register copy into a specific register class. This is only
-/// used between instruction selection and MachineInstr creation, before
-/// virtual registers have been created for all the instructions, and it's
-/// only needed in cases where the register classes implied by the
-/// instructions are insufficient. It is emitted as a COPY MachineInstr.
-  HANDLE_TARGET_OPCODE(COPY_TO_REGCLASS)
-
-/// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic
-HANDLE_TARGET_OPCODE(DBG_VALUE)
-
-/// REG_SEQUENCE - This variadic instruction is used to form a register that
-/// represents a consecutive sequence of sub-registers. It's used as a
-/// register coalescing / allocation aid and must be eliminated before code
-/// emission.
-// In SDNode form, the first operand encodes the register class created by
-// the REG_SEQUENCE, while each subsequent pair names a vreg + subreg index
-// pair.  Once it has been lowered to a MachineInstr, the regclass operand
-// is no longer present.
-/// e.g. v1027 = REG_SEQUENCE v1024, 3, v1025, 4, v1026, 5
-/// After register coalescing references of v1024 should be replace with
-/// v1027:3, v1025 with v1027:4, etc.
-  HANDLE_TARGET_OPCODE(REG_SEQUENCE)
-
-/// COPY - Target-independent register copy. This instruction can also be
-/// used to copy between subregisters of virtual registers.
-  HANDLE_TARGET_OPCODE(COPY)
-
-/// BUNDLE - This instruction represents an instruction bundle. Instructions
-/// which immediately follow a BUNDLE instruction which are marked with
-/// 'InsideBundle' flag are inside the bundle.
-HANDLE_TARGET_OPCODE(BUNDLE)
-
-/// Lifetime markers.
-HANDLE_TARGET_OPCODE(LIFETIME_START)
-HANDLE_TARGET_OPCODE(LIFETIME_END)
-
-/// A Stackmap instruction captures the location of live variables at its
-/// position in the instruction stream. It is followed by a shadow of bytes
-/// that must lie within the function and not contain another stackmap.
-HANDLE_TARGET_OPCODE(STACKMAP)
-
-/// FEntry all - This is a marker instruction which gets translated into a raw fentry call.
-HANDLE_TARGET_OPCODE(FENTRY_CALL)
-
-/// Patchable call instruction - this instruction represents a call to a
-/// constant address, followed by a series of NOPs. It is intended to
-/// support optimizations for dynamic languages (such as javascript) that
-/// rewrite calls to runtimes with more efficient code sequences.
-/// This also implies a stack map.
-HANDLE_TARGET_OPCODE(PATCHPOINT)
-
-/// This pseudo-instruction loads the stack guard value. Targets which need
-/// to prevent the stack guard value or address from being spilled to the
-/// stack should override TargetLowering::emitLoadStackGuardNode and
-/// additionally expand this pseudo after register allocation.
-HANDLE_TARGET_OPCODE(LOAD_STACK_GUARD)
-
-/// Call instruction with associated vm state for deoptimization and list
-/// of live pointers for relocation by the garbage collector.  It is
-/// intended to support garbage collection with fully precise relocating
-/// collectors and deoptimizations in either the callee or caller.
-HANDLE_TARGET_OPCODE(STATEPOINT)
-
-/// Instruction that records the offset of a local stack allocation passed to
-/// llvm.localescape. It has two arguments: the symbol for the label and the
-/// frame index of the local stack allocation.
-HANDLE_TARGET_OPCODE(LOCAL_ESCAPE)
-
-/// Wraps a machine instruction which can fault, bundled with associated
-/// information on how to handle such a fault.
-/// For example loading instruction that may page fault, bundled with associated
-/// information on how to handle such a page fault.  It is intended to support
-/// "zero cost" null checks in managed languages by allowing LLVM to fold
-/// comparisons into existing memory operations.
-HANDLE_TARGET_OPCODE(FAULTING_OP)
-
-/// Wraps a machine instruction to add patchability constraints.  An
-/// instruction wrapped in PATCHABLE_OP has to either have a minimum
-/// size or be preceded with a nop of that size.  The first operand is
-/// an immediate denoting the minimum size of the instruction, the
-/// second operand is an immediate denoting the opcode of the original
-/// instruction.  The rest of the operands are the operands of the
-/// original instruction.
-HANDLE_TARGET_OPCODE(PATCHABLE_OP)
-
-/// This is a marker instruction which gets translated into a nop sled, useful
-/// for inserting instrumentation instructions at runtime.
-HANDLE_TARGET_OPCODE(PATCHABLE_FUNCTION_ENTER)
-
-/// Wraps a return instruction and its operands to enable adding nop sleds
-/// either before or after the return. The nop sleds are useful for inserting
-/// instrumentation instructions at runtime.
-/// The patch here replaces the return instruction.
-HANDLE_TARGET_OPCODE(PATCHABLE_RET)
-
-/// This is a marker instruction which gets translated into a nop sled, useful
-/// for inserting instrumentation instructions at runtime.
-/// The patch here prepends the return instruction.
-/// The same thing as in x86_64 is not possible for ARM because it has multiple
-/// return instructions. Furthermore, CPU allows parametrized and even
-/// conditional return instructions. In the current ARM implementation we are
-/// making use of the fact that currently LLVM doesn't seem to generate
-/// conditional return instructions.
-/// On ARM, the same instruction can be used for popping multiple registers
-/// from the stack and returning (it just pops pc register too), and LLVM
-/// generates it sometimes. So we can't insert the sled between this stack
-/// adjustment and the return without splitting the original instruction into 2
-/// instructions. So on ARM, rather than jumping into the exit trampoline, we
-/// call it, it does the tracing, preserves the stack and returns.
-HANDLE_TARGET_OPCODE(PATCHABLE_FUNCTION_EXIT)
-
-/// Wraps a tail call instruction and its operands to enable adding nop sleds
-/// either before or after the tail exit. We use this as a disambiguation from
-/// PATCHABLE_RET which specifically only works for return instructions.
-HANDLE_TARGET_OPCODE(PATCHABLE_TAIL_CALL)
-
-/// Wraps a logging call and its arguments with nop sleds. At runtime, this can be
-/// patched to insert instrumentation instructions.
-HANDLE_TARGET_OPCODE(PATCHABLE_EVENT_CALL)
-
-/// The following generic opcodes are not supposed to appear after ISel.
-/// This is something we might want to relax, but for now, this is convenient
-/// to produce diagnostics.
-
-/// Generic ADD instruction. This is an integer add.
-HANDLE_TARGET_OPCODE(G_ADD)
-HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_START, G_ADD)
-
-/// Generic SUB instruction. This is an integer sub.
-HANDLE_TARGET_OPCODE(G_SUB)
-
-// Generic multiply instruction.
-HANDLE_TARGET_OPCODE(G_MUL)
-
-// Generic signed division instruction.
-HANDLE_TARGET_OPCODE(G_SDIV)
-
-// Generic unsigned division instruction.
-HANDLE_TARGET_OPCODE(G_UDIV)
-
-// Generic signed remainder instruction.
-HANDLE_TARGET_OPCODE(G_SREM)
-
-// Generic unsigned remainder instruction.
-HANDLE_TARGET_OPCODE(G_UREM)
-
-/// Generic bitwise and instruction.
-HANDLE_TARGET_OPCODE(G_AND)
-
-/// Generic bitwise or instruction.
-HANDLE_TARGET_OPCODE(G_OR)
-
-/// Generic bitwise exclusive-or instruction.
-HANDLE_TARGET_OPCODE(G_XOR)
-
-
-HANDLE_TARGET_OPCODE(G_IMPLICIT_DEF)
-
-/// Generic instruction to materialize the address of an alloca or other
-/// stack-based object.
-HANDLE_TARGET_OPCODE(G_FRAME_INDEX)
-
-/// Generic reference to global value.
-HANDLE_TARGET_OPCODE(G_GLOBAL_VALUE)
-
-/// Generic instruction to extract blocks of bits from the register given
-/// (typically a sub-register COPY after instruction selection).
-HANDLE_TARGET_OPCODE(G_EXTRACT)
-
-HANDLE_TARGET_OPCODE(G_UNMERGE_VALUES)
-
-/// Generic instruction to insert blocks of bits from the registers given into
-/// the source.
-HANDLE_TARGET_OPCODE(G_INSERT)
-
-/// Generic instruction to paste a variable number of components together into a
-/// larger register.
-HANDLE_TARGET_OPCODE(G_MERGE_VALUES)
-
-/// Generic pointer to int conversion.
-HANDLE_TARGET_OPCODE(G_PTRTOINT)
-
-/// Generic int to pointer conversion.
-HANDLE_TARGET_OPCODE(G_INTTOPTR)
-
-/// Generic bitcast. The source and destination types must be different, or a
-/// COPY is the relevant instruction.
-HANDLE_TARGET_OPCODE(G_BITCAST)
-
-/// Generic load.
-HANDLE_TARGET_OPCODE(G_LOAD)
-
-/// Generic store.
-HANDLE_TARGET_OPCODE(G_STORE)
-
-/// Generic conditional branch instruction.
-HANDLE_TARGET_OPCODE(G_BRCOND)
-
-/// Generic indirect branch instruction.
-HANDLE_TARGET_OPCODE(G_BRINDIRECT)
-
-/// Generic intrinsic use (without side effects).
-HANDLE_TARGET_OPCODE(G_INTRINSIC)
-
-/// Generic intrinsic use (with side effects).
-HANDLE_TARGET_OPCODE(G_INTRINSIC_W_SIDE_EFFECTS)
-
-/// Generic extension allowing rubbish in high bits.
-HANDLE_TARGET_OPCODE(G_ANYEXT)
-
-/// Generic instruction to discard the high bits of a register. This differs
-/// from (G_EXTRACT val, 0) on its action on vectors: G_TRUNC will truncate
-/// each element individually, G_EXTRACT will typically discard the high
-/// elements of the vector.
-HANDLE_TARGET_OPCODE(G_TRUNC)
-
-/// Generic integer constant.
-HANDLE_TARGET_OPCODE(G_CONSTANT)
-
-/// Generic floating constant.
-HANDLE_TARGET_OPCODE(G_FCONSTANT)
-
-/// Generic va_start instruction. Stores to its one pointer operand.
-HANDLE_TARGET_OPCODE(G_VASTART)
-
-/// Generic va_start instruction. Stores to its one pointer operand.
-HANDLE_TARGET_OPCODE(G_VAARG)
-
-// Generic sign extend
-HANDLE_TARGET_OPCODE(G_SEXT)
-
-// Generic zero extend
-HANDLE_TARGET_OPCODE(G_ZEXT)
-
-// Generic left-shift
-HANDLE_TARGET_OPCODE(G_SHL)
-
-// Generic logical right-shift
-HANDLE_TARGET_OPCODE(G_LSHR)
-
-// Generic arithmetic right-shift
-HANDLE_TARGET_OPCODE(G_ASHR)
-
-/// Generic integer-base comparison, also applicable to vectors of integers.
-HANDLE_TARGET_OPCODE(G_ICMP)
-
-/// Generic floating-point comparison, also applicable to vectors.
-HANDLE_TARGET_OPCODE(G_FCMP)
-
-/// Generic select.
-HANDLE_TARGET_OPCODE(G_SELECT)
-
-/// Generic unsigned add instruction, consuming the normal operands plus a carry
-/// flag, and similarly producing the result and a carry flag.
-HANDLE_TARGET_OPCODE(G_UADDE)
-
-/// Generic unsigned subtract instruction, consuming the normal operands plus a
-/// carry flag, and similarly producing the result and a carry flag.
-HANDLE_TARGET_OPCODE(G_USUBE)
-
-/// Generic signed add instruction, producing the result and a signed overflow
-/// flag.
-HANDLE_TARGET_OPCODE(G_SADDO)
-
-/// Generic signed subtract instruction, producing the result and a signed
-/// overflow flag.
-HANDLE_TARGET_OPCODE(G_SSUBO)
-
-/// Generic unsigned multiply instruction, producing the result and a signed
-/// overflow flag.
-HANDLE_TARGET_OPCODE(G_UMULO)
-
-/// Generic signed multiply instruction, producing the result and a signed
-/// overflow flag.
-HANDLE_TARGET_OPCODE(G_SMULO)
-
-// Multiply two numbers at twice the incoming bit width (unsigned) and return
-// the high half of the result.
-HANDLE_TARGET_OPCODE(G_UMULH)
-
-// Multiply two numbers at twice the incoming bit width (signed) and return
-// the high half of the result.
-HANDLE_TARGET_OPCODE(G_SMULH)
-
-/// Generic FP addition.
-HANDLE_TARGET_OPCODE(G_FADD)
-
-/// Generic FP subtraction.
-HANDLE_TARGET_OPCODE(G_FSUB)
-
-/// Generic FP multiplication.
-HANDLE_TARGET_OPCODE(G_FMUL)
-
-/// Generic FMA multiplication. Behaves like llvm fma intrinsic
-HANDLE_TARGET_OPCODE(G_FMA)
-
-/// Generic FP division.
-HANDLE_TARGET_OPCODE(G_FDIV)
-
-/// Generic FP remainder.
-HANDLE_TARGET_OPCODE(G_FREM)
-
-/// Generic FP exponentiation.
-HANDLE_TARGET_OPCODE(G_FPOW)
-
-/// Generic base-e exponential of a value.
-HANDLE_TARGET_OPCODE(G_FEXP)
-
-/// Generic base-2 exponential of a value.
-HANDLE_TARGET_OPCODE(G_FEXP2)
-
-/// Floating point base-e logarithm of a value.
-HANDLE_TARGET_OPCODE(G_FLOG)
-
-/// Floating point base-2 logarithm of a value.
-HANDLE_TARGET_OPCODE(G_FLOG2)
-
-/// Generic FP negation.
-HANDLE_TARGET_OPCODE(G_FNEG)
-
-/// Generic FP extension.
-HANDLE_TARGET_OPCODE(G_FPEXT)
-
-/// Generic float to signed-int conversion
-HANDLE_TARGET_OPCODE(G_FPTRUNC)
-
-/// Generic float to signed-int conversion
-HANDLE_TARGET_OPCODE(G_FPTOSI)
-
-/// Generic float to unsigned-int conversion
-HANDLE_TARGET_OPCODE(G_FPTOUI)
-
-/// Generic signed-int to float conversion
-HANDLE_TARGET_OPCODE(G_SITOFP)
-
-/// Generic unsigned-int to float conversion
-HANDLE_TARGET_OPCODE(G_UITOFP)
-
-/// Generic pointer offset
-HANDLE_TARGET_OPCODE(G_GEP)
-
-/// Clear the specified number of low bits in a pointer. This rounds the value
-/// *down* to the given alignment.
-HANDLE_TARGET_OPCODE(G_PTR_MASK)
-
-/// Generic BRANCH instruction. This is an unconditional branch.
-HANDLE_TARGET_OPCODE(G_BR)
-
-/// Generic insertelement.
-HANDLE_TARGET_OPCODE(G_INSERT_VECTOR_ELT)
-
-/// Generic extractelement.
-HANDLE_TARGET_OPCODE(G_EXTRACT_VECTOR_ELT)
-
-/// Generic shufflevector.
-HANDLE_TARGET_OPCODE(G_SHUFFLE_VECTOR)
-
-// TODO: Add more generic opcodes as we move along.
-
-/// Marker for the end of the generic opcode.
-/// This is used to check if an opcode is in the range of the
-/// generic opcodes.
-HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_END, G_SHUFFLE_VECTOR)
-
-/// BUILTIN_OP_END - This must be the last enum value in this list.
-/// The target-specific post-isel opcode values start here.
-HANDLE_TARGET_OPCODE_MARKER(GENERIC_OP_END, PRE_ISEL_GENERIC_OPCODE_END)
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetOpcodes.h b/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetOpcodes.h
deleted file mode 100644
index 33df133a4d58..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetOpcodes.h
+++ /dev/null
@@ -1,42 +0,0 @@
-//===-- llvm/Target/TargetOpcodes.h - Target Indep Opcodes ------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the target independent instruction opcodes.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_TARGETOPCODES_H
-#define LLVM_TARGET_TARGETOPCODES_H
-
-namespace llvm {
-
-/// Invariant opcodes: All instruction sets have these as their low opcodes.
-///
-namespace TargetOpcode {
-enum {
-#define HANDLE_TARGET_OPCODE(OPC) OPC,
-#define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC) IDENT = OPC,
-#include "llvm/Target/TargetOpcodes.def"
-};
-} // end namespace TargetOpcode
-
-/// Check whether the given Opcode is a generic opcode that is not supposed
-/// to appear after ISel.
-static inline bool isPreISelGenericOpcode(unsigned Opcode) {
-  return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START &&
-         Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END;
-}
-
-/// Check whether the given Opcode is a target-specific opcode.
-static inline bool isTargetSpecificOpcode(unsigned Opcode) {
-  return Opcode > TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END;
-}
-} // end namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetRegisterInfo.h b/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetRegisterInfo.h
deleted file mode 100644
index b6839dad106f..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetRegisterInfo.h
+++ /dev/null
@@ -1,1152 +0,0 @@
-//==- Target/TargetRegisterInfo.h - Target Register Information --*- C++ -*-==//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes an abstract interface used to get information about a
-// target machines register file.  This information is used for a variety of
-// purposed, especially register allocation.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_TARGETREGISTERINFO_H
-#define LLVM_TARGET_TARGETREGISTERINFO_H
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/ADT/iterator_range.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineValueType.h"
-#include "llvm/IR/CallingConv.h"
-#include "llvm/MC/LaneBitmask.h"
-#include "llvm/MC/MCRegisterInfo.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/MathExtras.h"
-#include "llvm/Support/Printable.h"
-#include <cassert>
-#include <cstdint>
-#include <functional>
-
-namespace llvm {
-
-class BitVector;
-class LiveRegMatrix;
-class MachineFunction;
-class MachineInstr;
-class RegScavenger;
-class VirtRegMap;
-
-class TargetRegisterClass {
-public:
-  using iterator = const MCPhysReg *;
-  using const_iterator = const MCPhysReg *;
-  using sc_iterator = const TargetRegisterClass* const *;
-
-  // Instance variables filled by tablegen, do not use!
-  const MCRegisterClass *MC;
-  const uint16_t SpillSize, SpillAlignment;
-  const MVT::SimpleValueType *VTs;
-  const uint32_t *SubClassMask;
-  const uint16_t *SuperRegIndices;
-  const LaneBitmask LaneMask;
-  /// Classes with a higher priority value are assigned first by register
-  /// allocators using a greedy heuristic. The value is in the range [0,63].
-  const uint8_t AllocationPriority;
-  /// Whether the class supports two (or more) disjunct subregister indices.
-  const bool HasDisjunctSubRegs;
-  /// Whether a combination of subregisters can cover every register in the
-  /// class. See also the CoveredBySubRegs description in Target.td.
-  const bool CoveredBySubRegs;
-  const sc_iterator SuperClasses;
-  ArrayRef<MCPhysReg> (*OrderFunc)(const MachineFunction&);
-
-  /// Return the register class ID number.
-  unsigned getID() const { return MC->getID(); }
-
-  /// begin/end - Return all of the registers in this class.
-  ///
-  iterator       begin() const { return MC->begin(); }
-  iterator         end() const { return MC->end(); }
-
-  /// Return the number of registers in this class.
-  unsigned getNumRegs() const { return MC->getNumRegs(); }
-
-  iterator_range<SmallVectorImpl<MCPhysReg>::const_iterator>
-  getRegisters() const {
-    return make_range(MC->begin(), MC->end());
-  }
-
-  /// Return the specified register in the class.
-  unsigned getRegister(unsigned i) const {
-    return MC->getRegister(i);
-  }
-
-  /// Return true if the specified register is included in this register class.
-  /// This does not include virtual registers.
-  bool contains(unsigned Reg) const {
-    return MC->contains(Reg);
-  }
-
-  /// Return true if both registers are in this class.
-  bool contains(unsigned Reg1, unsigned Reg2) const {
-    return MC->contains(Reg1, Reg2);
-  }
-
-  /// Return the cost of copying a value between two registers in this class.
-  /// A negative number means the register class is very expensive
-  /// to copy e.g. status flag register classes.
-  int getCopyCost() const { return MC->getCopyCost(); }
-
-  /// Return true if this register class may be used to create virtual
-  /// registers.
-  bool isAllocatable() const { return MC->isAllocatable(); }
-
-  /// Return true if the specified TargetRegisterClass
-  /// is a proper sub-class of this TargetRegisterClass.
-  bool hasSubClass(const TargetRegisterClass *RC) const {
-    return RC != this && hasSubClassEq(RC);
-  }
-
-  /// Returns true if RC is a sub-class of or equal to this class.
-  bool hasSubClassEq(const TargetRegisterClass *RC) const {
-    unsigned ID = RC->getID();
-    return (SubClassMask[ID / 32] >> (ID % 32)) & 1;
-  }
-
-  /// Return true if the specified TargetRegisterClass is a
-  /// proper super-class of this TargetRegisterClass.
-  bool hasSuperClass(const TargetRegisterClass *RC) const {
-    return RC->hasSubClass(this);
-  }
-
-  /// Returns true if RC is a super-class of or equal to this class.
-  bool hasSuperClassEq(const TargetRegisterClass *RC) const {
-    return RC->hasSubClassEq(this);
-  }
-
-  /// Returns a bit vector of subclasses, including this one.
-  /// The vector is indexed by class IDs.
-  ///
-  /// To use it, consider the returned array as a chunk of memory that
-  /// contains an array of bits of size NumRegClasses. Each 32-bit chunk
-  /// contains a bitset of the ID of the subclasses in big-endian style.
-
-  /// I.e., the representation of the memory from left to right at the
-  /// bit level looks like:
-  /// [31 30 ... 1 0] [ 63 62 ... 33 32] ...
-  ///                     [ XXX NumRegClasses NumRegClasses - 1 ... ]
-  /// Where the number represents the class ID and XXX bits that
-  /// should be ignored.
-  ///
-  /// See the implementation of hasSubClassEq for an example of how it
-  /// can be used.
-  const uint32_t *getSubClassMask() const {
-    return SubClassMask;
-  }
-
-  /// Returns a 0-terminated list of sub-register indices that project some
-  /// super-register class into this register class. The list has an entry for
-  /// each Idx such that:
-  ///
-  ///   There exists SuperRC where:
-  ///     For all Reg in SuperRC:
-  ///       this->contains(Reg:Idx)
-  const uint16_t *getSuperRegIndices() const {
-    return SuperRegIndices;
-  }
-
-  /// Returns a NULL-terminated list of super-classes.  The
-  /// classes are ordered by ID which is also a topological ordering from large
-  /// to small classes.  The list does NOT include the current class.
-  sc_iterator getSuperClasses() const {
-    return SuperClasses;
-  }
-
-  /// Return true if this TargetRegisterClass is a subset
-  /// class of at least one other TargetRegisterClass.
-  bool isASubClass() const {
-    return SuperClasses[0] != nullptr;
-  }
-
-  /// Returns the preferred order for allocating registers from this register
-  /// class in MF. The raw order comes directly from the .td file and may
-  /// include reserved registers that are not allocatable.
-  /// Register allocators should also make sure to allocate
-  /// callee-saved registers only after all the volatiles are used. The
-  /// RegisterClassInfo class provides filtered allocation orders with
-  /// callee-saved registers moved to the end.
-  ///
-  /// The MachineFunction argument can be used to tune the allocatable
-  /// registers based on the characteristics of the function, subtarget, or
-  /// other criteria.
-  ///
-  /// By default, this method returns all registers in the class.
-  ArrayRef<MCPhysReg> getRawAllocationOrder(const MachineFunction &MF) const {
-    return OrderFunc ? OrderFunc(MF) : makeArrayRef(begin(), getNumRegs());
-  }
-
-  /// Returns the combination of all lane masks of register in this class.
-  /// The lane masks of the registers are the combination of all lane masks
-  /// of their subregisters. Returns 1 if there are no subregisters.
-  LaneBitmask getLaneMask() const {
-    return LaneMask;
-  }
-};
-
-/// Extra information, not in MCRegisterDesc, about registers.
-/// These are used by codegen, not by MC.
-struct TargetRegisterInfoDesc {
-  unsigned CostPerUse;          // Extra cost of instructions using register.
-  bool inAllocatableClass;      // Register belongs to an allocatable regclass.
-};
-
-/// Each TargetRegisterClass has a per register weight, and weight
-/// limit which must be less than the limits of its pressure sets.
-struct RegClassWeight {
-  unsigned RegWeight;
-  unsigned WeightLimit;
-};
-
-/// TargetRegisterInfo base class - We assume that the target defines a static
-/// array of TargetRegisterDesc objects that represent all of the machine
-/// registers that the target has.  As such, we simply have to track a pointer
-/// to this array so that we can turn register number into a register
-/// descriptor.
-///
-class TargetRegisterInfo : public MCRegisterInfo {
-public:
-  using regclass_iterator = const TargetRegisterClass * const *;
-  using vt_iterator = const MVT::SimpleValueType *;
-
-private:
-  const TargetRegisterInfoDesc *InfoDesc;     // Extra desc array for codegen
-  const char *const *SubRegIndexNames;        // Names of subreg indexes.
-  // Pointer to array of lane masks, one per sub-reg index.
-  const LaneBitmask *SubRegIndexLaneMasks;
-
-  regclass_iterator RegClassBegin, RegClassEnd;   // List of regclasses
-  LaneBitmask CoveringLanes;
-
-protected:
-  TargetRegisterInfo(const TargetRegisterInfoDesc *ID,
-                     regclass_iterator RegClassBegin,
-                     regclass_iterator RegClassEnd,
-                     const char *const *SRINames,
-                     const LaneBitmask *SRILaneMasks,
-                     LaneBitmask CoveringLanes);
-  virtual ~TargetRegisterInfo();
-
-public:
-  // Register numbers can represent physical registers, virtual registers, and
-  // sometimes stack slots. The unsigned values are divided into these ranges:
-  //
-  //   0           Not a register, can be used as a sentinel.
-  //   [1;2^30)    Physical registers assigned by TableGen.
-  //   [2^30;2^31) Stack slots. (Rarely used.)
-  //   [2^31;2^32) Virtual registers assigned by MachineRegisterInfo.
-  //
-  // Further sentinels can be allocated from the small negative integers.
-  // DenseMapInfo<unsigned> uses -1u and -2u.
-
-  /// isStackSlot - Sometimes it is useful the be able to store a non-negative
-  /// frame index in a variable that normally holds a register. isStackSlot()
-  /// returns true if Reg is in the range used for stack slots.
-  ///
-  /// Note that isVirtualRegister() and isPhysicalRegister() cannot handle stack
-  /// slots, so if a variable may contains a stack slot, always check
-  /// isStackSlot() first.
-  ///
-  static bool isStackSlot(unsigned Reg) {
-    return int(Reg) >= (1 << 30);
-  }
-
-  /// Compute the frame index from a register value representing a stack slot.
-  static int stackSlot2Index(unsigned Reg) {
-    assert(isStackSlot(Reg) && "Not a stack slot");
-    return int(Reg - (1u << 30));
-  }
-
-  /// Convert a non-negative frame index to a stack slot register value.
-  static unsigned index2StackSlot(int FI) {
-    assert(FI >= 0 && "Cannot hold a negative frame index.");
-    return FI + (1u << 30);
-  }
-
-  /// Return true if the specified register number is in
-  /// the physical register namespace.
-  static bool isPhysicalRegister(unsigned Reg) {
-    assert(!isStackSlot(Reg) && "Not a register! Check isStackSlot() first.");
-    return int(Reg) > 0;
-  }
-
-  /// Return true if the specified register number is in
-  /// the virtual register namespace.
-  static bool isVirtualRegister(unsigned Reg) {
-    assert(!isStackSlot(Reg) && "Not a register! Check isStackSlot() first.");
-    return int(Reg) < 0;
-  }
-
-  /// Convert a virtual register number to a 0-based index.
-  /// The first virtual register in a function will get the index 0.
-  static unsigned virtReg2Index(unsigned Reg) {
-    assert(isVirtualRegister(Reg) && "Not a virtual register");
-    return Reg & ~(1u << 31);
-  }
-
-  /// Convert a 0-based index to a virtual register number.
-  /// This is the inverse operation of VirtReg2IndexFunctor below.
-  static unsigned index2VirtReg(unsigned Index) {
-    return Index | (1u << 31);
-  }
-
-  /// Return the size in bits of a register from class RC.
-  unsigned getRegSizeInBits(const TargetRegisterClass &RC) const {
-    return RC.SpillSize * 8;
-  }
-
-  /// Return the size in bytes of the stack slot allocated to hold a spilled
-  /// copy of a register from class RC.
-  unsigned getSpillSize(const TargetRegisterClass &RC) const {
-    return RC.SpillSize;
-  }
-
-  /// Return the minimum required alignment for a spill slot for a register
-  /// of this class.
-  unsigned getSpillAlignment(const TargetRegisterClass &RC) const {
-    return RC.SpillAlignment;
-  }
-
-  /// Return true if the given TargetRegisterClass has the ValueType T.
-  bool isTypeLegalForClass(const TargetRegisterClass &RC, MVT T) const {
-    for (int i = 0; RC.VTs[i] != MVT::Other; ++i)
-      if (MVT(RC.VTs[i]) == T)
-        return true;
-    return false;
-  }
-
-  /// Loop over all of the value types that can be represented by values
-  // in the given register class.
-  vt_iterator legalclasstypes_begin(const TargetRegisterClass &RC) const {
-    return RC.VTs;
-  }
-
-  vt_iterator legalclasstypes_end(const TargetRegisterClass &RC) const {
-    vt_iterator I = RC.VTs;
-    while (*I != MVT::Other)
-      ++I;
-    return I;
-  }
-
-  /// Returns the Register Class of a physical register of the given type,
-  /// picking the most sub register class of the right type that contains this
-  /// physreg.
-  const TargetRegisterClass *
-    getMinimalPhysRegClass(unsigned Reg, MVT VT = MVT::Other) const;
-
-  /// Return the maximal subclass of the given register class that is
-  /// allocatable or NULL.
-  const TargetRegisterClass *
-    getAllocatableClass(const TargetRegisterClass *RC) const;
-
-  /// Returns a bitset indexed by register number indicating if a register is
-  /// allocatable or not. If a register class is specified, returns the subset
-  /// for the class.
-  BitVector getAllocatableSet(const MachineFunction &MF,
-                              const TargetRegisterClass *RC = nullptr) const;
-
-  /// Return the additional cost of using this register instead
-  /// of other registers in its class.
-  unsigned getCostPerUse(unsigned RegNo) const {
-    return InfoDesc[RegNo].CostPerUse;
-  }
-
-  /// Return true if the register is in the allocation of any register class.
-  bool isInAllocatableClass(unsigned RegNo) const {
-    return InfoDesc[RegNo].inAllocatableClass;
-  }
-
-  /// Return the human-readable symbolic target-specific
-  /// name for the specified SubRegIndex.
-  const char *getSubRegIndexName(unsigned SubIdx) const {
-    assert(SubIdx && SubIdx < getNumSubRegIndices() &&
-           "This is not a subregister index");
-    return SubRegIndexNames[SubIdx-1];
-  }
-
-  /// Return a bitmask representing the parts of a register that are covered by
-  /// SubIdx \see LaneBitmask.
-  ///
-  /// SubIdx == 0 is allowed, it has the lane mask ~0u.
-  LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const {
-    assert(SubIdx < getNumSubRegIndices() && "This is not a subregister index");
-    return SubRegIndexLaneMasks[SubIdx];
-  }
-
-  /// The lane masks returned by getSubRegIndexLaneMask() above can only be
-  /// used to determine if sub-registers overlap - they can't be used to
-  /// determine if a set of sub-registers completely cover another
-  /// sub-register.
-  ///
-  /// The X86 general purpose registers have two lanes corresponding to the
-  /// sub_8bit and sub_8bit_hi sub-registers. Both sub_32bit and sub_16bit have
-  /// lane masks '3', but the sub_16bit sub-register doesn't fully cover the
-  /// sub_32bit sub-register.
-  ///
-  /// On the other hand, the ARM NEON lanes fully cover their registers: The
-  /// dsub_0 sub-register is completely covered by the ssub_0 and ssub_1 lanes.
-  /// This is related to the CoveredBySubRegs property on register definitions.
-  ///
-  /// This function returns a bit mask of lanes that completely cover their
-  /// sub-registers. More precisely, given:
-  ///
-  ///   Covering = getCoveringLanes();
-  ///   MaskA = getSubRegIndexLaneMask(SubA);
-  ///   MaskB = getSubRegIndexLaneMask(SubB);
-  ///
-  /// If (MaskA & ~(MaskB & Covering)) == 0, then SubA is completely covered by
-  /// SubB.
-  LaneBitmask getCoveringLanes() const { return CoveringLanes; }
-
-  /// Returns true if the two registers are equal or alias each other.
-  /// The registers may be virtual registers.
-  bool regsOverlap(unsigned regA, unsigned regB) const {
-    if (regA == regB) return true;
-    if (isVirtualRegister(regA) || isVirtualRegister(regB))
-      return false;
-
-    // Regunits are numerically ordered. Find a common unit.
-    MCRegUnitIterator RUA(regA, this);
-    MCRegUnitIterator RUB(regB, this);
-    do {
-      if (*RUA == *RUB) return true;
-      if (*RUA < *RUB) ++RUA;
-      else             ++RUB;
-    } while (RUA.isValid() && RUB.isValid());
-    return false;
-  }
-
-  /// Returns true if Reg contains RegUnit.
-  bool hasRegUnit(unsigned Reg, unsigned RegUnit) const {
-    for (MCRegUnitIterator Units(Reg, this); Units.isValid(); ++Units)
-      if (*Units == RegUnit)
-        return true;
-    return false;
-  }
-
-  /// Return a null-terminated list of all of the callee-saved registers on
-  /// this target. The register should be in the order of desired callee-save
-  /// stack frame offset. The first register is closest to the incoming stack
-  /// pointer if stack grows down, and vice versa.
-  /// Notice: This function does not take into account disabled CSRs.
-  ///         In most cases you will want to use instead the function 
-  ///         getCalleeSavedRegs that is implemented in MachineRegisterInfo.
-  virtual const MCPhysReg*
-  getCalleeSavedRegs(const MachineFunction *MF) const = 0;
-
-  /// Return a mask of call-preserved registers for the given calling convention
-  /// on the current function. The mask should include all call-preserved
-  /// aliases. This is used by the register allocator to determine which
-  /// registers can be live across a call.
-  ///
-  /// The mask is an array containing (TRI::getNumRegs()+31)/32 entries.
-  /// A set bit indicates that all bits of the corresponding register are
-  /// preserved across the function call.  The bit mask is expected to be
-  /// sub-register complete, i.e. if A is preserved, so are all its
-  /// sub-registers.
-  ///
-  /// Bits are numbered from the LSB, so the bit for physical register Reg can
-  /// be found as (Mask[Reg / 32] >> Reg % 32) & 1.
-  ///
-  /// A NULL pointer means that no register mask will be used, and call
-  /// instructions should use implicit-def operands to indicate call clobbered
-  /// registers.
-  ///
-  virtual const uint32_t *getCallPreservedMask(const MachineFunction &MF,
-                                               CallingConv::ID) const {
-    // The default mask clobbers everything.  All targets should override.
-    return nullptr;
-  }
-
-  /// Return a register mask that clobbers everything.
-  virtual const uint32_t *getNoPreservedMask() const {
-    llvm_unreachable("target does not provide no preserved mask");
-  }
-
-  /// Return true if all bits that are set in mask \p mask0 are also set in
-  /// \p mask1.
-  bool regmaskSubsetEqual(const uint32_t *mask0, const uint32_t *mask1) const;
-
-  /// Return all the call-preserved register masks defined for this target.
-  virtual ArrayRef<const uint32_t *> getRegMasks() const = 0;
-  virtual ArrayRef<const char *> getRegMaskNames() const = 0;
-
-  /// Returns a bitset indexed by physical register number indicating if a
-  /// register is a special register that has particular uses and should be
-  /// considered unavailable at all times, e.g. stack pointer, return address.
-  /// A reserved register:
-  /// - is not allocatable
-  /// - is considered always live
-  /// - is ignored by liveness tracking
-  /// It is often necessary to reserve the super registers of a reserved
-  /// register as well, to avoid them getting allocated indirectly. You may use
-  /// markSuperRegs() and checkAllSuperRegsMarked() in this case.
-  virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
-
-  /// Returns true if PhysReg is unallocatable and constant throughout the
-  /// function.  Used by MachineRegisterInfo::isConstantPhysReg().
-  virtual bool isConstantPhysReg(unsigned PhysReg) const { return false; }
-
-  /// Physical registers that may be modified within a function but are
-  /// guaranteed to be restored before any uses. This is useful for targets that
-  /// have call sequences where a GOT register may be updated by the caller
-  /// prior to a call and is guaranteed to be restored (also by the caller)
-  /// after the call. 
-  virtual bool isCallerPreservedPhysReg(unsigned PhysReg,
-                                        const MachineFunction &MF) const {
-    return false;
-  }
-
-  /// Prior to adding the live-out mask to a stackmap or patchpoint
-  /// instruction, provide the target the opportunity to adjust it (mainly to
-  /// remove pseudo-registers that should be ignored).
-  virtual void adjustStackMapLiveOutMask(uint32_t *Mask) const {}
-
-  /// Return a super-register of the specified register
-  /// Reg so its sub-register of index SubIdx is Reg.
-  unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
-                               const TargetRegisterClass *RC) const {
-    return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC);
-  }
-
-  /// Return a subclass of the specified register
-  /// class A so that each register in it has a sub-register of the
-  /// specified sub-register index which is in the specified register class B.
-  ///
-  /// TableGen will synthesize missing A sub-classes.
-  virtual const TargetRegisterClass *
-  getMatchingSuperRegClass(const TargetRegisterClass *A,
-                           const TargetRegisterClass *B, unsigned Idx) const;
-
-  // For a copy-like instruction that defines a register of class DefRC with
-  // subreg index DefSubReg, reading from another source with class SrcRC and
-  // subregister SrcSubReg return true if this is a preferable copy
-  // instruction or an earlier use should be used.
-  virtual bool shouldRewriteCopySrc(const TargetRegisterClass *DefRC,
-                                    unsigned DefSubReg,
-                                    const TargetRegisterClass *SrcRC,
-                                    unsigned SrcSubReg) const;
-
-  /// Returns the largest legal sub-class of RC that
-  /// supports the sub-register index Idx.
-  /// If no such sub-class exists, return NULL.
-  /// If all registers in RC already have an Idx sub-register, return RC.
-  ///
-  /// TableGen generates a version of this function that is good enough in most
-  /// cases.  Targets can override if they have constraints that TableGen
-  /// doesn't understand.  For example, the x86 sub_8bit sub-register index is
-  /// supported by the full GR32 register class in 64-bit mode, but only by the
-  /// GR32_ABCD regiister class in 32-bit mode.
-  ///
-  /// TableGen will synthesize missing RC sub-classes.
-  virtual const TargetRegisterClass *
-  getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
-    assert(Idx == 0 && "Target has no sub-registers");
-    return RC;
-  }
-
-  /// Return the subregister index you get from composing
-  /// two subregister indices.
-  ///
-  /// The special null sub-register index composes as the identity.
-  ///
-  /// If R:a:b is the same register as R:c, then composeSubRegIndices(a, b)
-  /// returns c. Note that composeSubRegIndices does not tell you about illegal
-  /// compositions. If R does not have a subreg a, or R:a does not have a subreg
-  /// b, composeSubRegIndices doesn't tell you.
-  ///
-  /// The ARM register Q0 has two D subregs dsub_0:D0 and dsub_1:D1. It also has
-  /// ssub_0:S0 - ssub_3:S3 subregs.
-  /// If you compose subreg indices dsub_1, ssub_0 you get ssub_2.
-  unsigned composeSubRegIndices(unsigned a, unsigned b) const {
-    if (!a) return b;
-    if (!b) return a;
-    return composeSubRegIndicesImpl(a, b);
-  }
-
-  /// Transforms a LaneMask computed for one subregister to the lanemask that
-  /// would have been computed when composing the subsubregisters with IdxA
-  /// first. @sa composeSubRegIndices()
-  LaneBitmask composeSubRegIndexLaneMask(unsigned IdxA,
-                                         LaneBitmask Mask) const {
-    if (!IdxA)
-      return Mask;
-    return composeSubRegIndexLaneMaskImpl(IdxA, Mask);
-  }
-
-  /// Transform a lanemask given for a virtual register to the corresponding
-  /// lanemask before using subregister with index \p IdxA.
-  /// This is the reverse of composeSubRegIndexLaneMask(), assuming Mask is a
-  /// valie lane mask (no invalid bits set) the following holds:
-  /// X0 = composeSubRegIndexLaneMask(Idx, Mask)
-  /// X1 = reverseComposeSubRegIndexLaneMask(Idx, X0)
-  /// => X1 == Mask
-  LaneBitmask reverseComposeSubRegIndexLaneMask(unsigned IdxA,
-                                                LaneBitmask LaneMask) const {
-    if (!IdxA)
-      return LaneMask;
-    return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask);
-  }
-
-  /// Debugging helper: dump register in human readable form to dbgs() stream.
-  static void dumpReg(unsigned Reg, unsigned SubRegIndex = 0,
-                      const TargetRegisterInfo* TRI = nullptr);
-
-protected:
-  /// Overridden by TableGen in targets that have sub-registers.
-  virtual unsigned composeSubRegIndicesImpl(unsigned, unsigned) const {
-    llvm_unreachable("Target has no sub-registers");
-  }
-
-  /// Overridden by TableGen in targets that have sub-registers.
-  virtual LaneBitmask
-  composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const {
-    llvm_unreachable("Target has no sub-registers");
-  }
-
-  virtual LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned,
-                                                            LaneBitmask) const {
-    llvm_unreachable("Target has no sub-registers");
-  }
-
-public:
-  /// Find a common super-register class if it exists.
-  ///
-  /// Find a register class, SuperRC and two sub-register indices, PreA and
-  /// PreB, such that:
-  ///
-  ///   1. PreA + SubA == PreB + SubB  (using composeSubRegIndices()), and
-  ///
-  ///   2. For all Reg in SuperRC: Reg:PreA in RCA and Reg:PreB in RCB, and
-  ///
-  ///   3. SuperRC->getSize() >= max(RCA->getSize(), RCB->getSize()).
-  ///
-  /// SuperRC will be chosen such that no super-class of SuperRC satisfies the
-  /// requirements, and there is no register class with a smaller spill size
-  /// that satisfies the requirements.
-  ///
-  /// SubA and SubB must not be 0. Use getMatchingSuperRegClass() instead.
-  ///
-  /// Either of the PreA and PreB sub-register indices may be returned as 0. In
-  /// that case, the returned register class will be a sub-class of the
-  /// corresponding argument register class.
-  ///
-  /// The function returns NULL if no register class can be found.
-  const TargetRegisterClass*
-  getCommonSuperRegClass(const TargetRegisterClass *RCA, unsigned SubA,
-                         const TargetRegisterClass *RCB, unsigned SubB,
-                         unsigned &PreA, unsigned &PreB) const;
-
-  //===--------------------------------------------------------------------===//
-  // Register Class Information
-  //
-
-  /// Register class iterators
-  regclass_iterator regclass_begin() const { return RegClassBegin; }
-  regclass_iterator regclass_end() const { return RegClassEnd; }
-  iterator_range<regclass_iterator> regclasses() const {
-    return make_range(regclass_begin(), regclass_end());
-  }
-
-  unsigned getNumRegClasses() const {
-    return (unsigned)(regclass_end()-regclass_begin());
-  }
-
-  /// Returns the register class associated with the enumeration value.
-  /// See class MCOperandInfo.
-  const TargetRegisterClass *getRegClass(unsigned i) const {
-    assert(i < getNumRegClasses() && "Register Class ID out of range");
-    return RegClassBegin[i];
-  }
-
-  /// Returns the name of the register class.
-  const char *getRegClassName(const TargetRegisterClass *Class) const {
-    return MCRegisterInfo::getRegClassName(Class->MC);
-  }
-
-  /// Find the largest common subclass of A and B.
-  /// Return NULL if there is no common subclass.
-  /// The common subclass should contain
-  /// simple value type SVT if it is not the Any type.
-  const TargetRegisterClass *
-  getCommonSubClass(const TargetRegisterClass *A,
-                    const TargetRegisterClass *B,
-                    const MVT::SimpleValueType SVT =
-                    MVT::SimpleValueType::Any) const;
-
-  /// Returns a TargetRegisterClass used for pointer values.
-  /// If a target supports multiple different pointer register classes,
-  /// kind specifies which one is indicated.
-  virtual const TargetRegisterClass *
-  getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const {
-    llvm_unreachable("Target didn't implement getPointerRegClass!");
-  }
-
-  /// Returns a legal register class to copy a register in the specified class
-  /// to or from. If it is possible to copy the register directly without using
-  /// a cross register class copy, return the specified RC. Returns NULL if it
-  /// is not possible to copy between two registers of the specified class.
-  virtual const TargetRegisterClass *
-  getCrossCopyRegClass(const TargetRegisterClass *RC) const {
-    return RC;
-  }
-
-  /// Returns the largest super class of RC that is legal to use in the current
-  /// sub-target and has the same spill size.
-  /// The returned register class can be used to create virtual registers which
-  /// means that all its registers can be copied and spilled.
-  virtual const TargetRegisterClass *
-  getLargestLegalSuperClass(const TargetRegisterClass *RC,
-                            const MachineFunction &) const {
-    /// The default implementation is very conservative and doesn't allow the
-    /// register allocator to inflate register classes.
-    return RC;
-  }
-
-  /// Return the register pressure "high water mark" for the specific register
-  /// class. The scheduler is in high register pressure mode (for the specific
-  /// register class) if it goes over the limit.
-  ///
-  /// Note: this is the old register pressure model that relies on a manually
-  /// specified representative register class per value type.
-  virtual unsigned getRegPressureLimit(const TargetRegisterClass *RC,
-                                       MachineFunction &MF) const {
-    return 0;
-  }
-
-  /// Return a heuristic for the machine scheduler to compare the profitability
-  /// of increasing one register pressure set versus another.  The scheduler
-  /// will prefer increasing the register pressure of the set which returns
-  /// the largest value for this function.
-  virtual unsigned getRegPressureSetScore(const MachineFunction &MF,
-                                          unsigned PSetID) const {
-    return PSetID;
-  }
-
-  /// Get the weight in units of pressure for this register class.
-  virtual const RegClassWeight &getRegClassWeight(
-    const TargetRegisterClass *RC) const = 0;
-
-  /// Get the weight in units of pressure for this register unit.
-  virtual unsigned getRegUnitWeight(unsigned RegUnit) const = 0;
-
-  /// Get the number of dimensions of register pressure.
-  virtual unsigned getNumRegPressureSets() const = 0;
-
-  /// Get the name of this register unit pressure set.
-  virtual const char *getRegPressureSetName(unsigned Idx) const = 0;
-
-  /// Get the register unit pressure limit for this dimension.
-  /// This limit must be adjusted dynamically for reserved registers.
-  virtual unsigned getRegPressureSetLimit(const MachineFunction &MF,
-                                          unsigned Idx) const = 0;
-
-  /// Get the dimensions of register pressure impacted by this register class.
-  /// Returns a -1 terminated array of pressure set IDs.
-  virtual const int *getRegClassPressureSets(
-    const TargetRegisterClass *RC) const = 0;
-
-  /// Get the dimensions of register pressure impacted by this register unit.
-  /// Returns a -1 terminated array of pressure set IDs.
-  virtual const int *getRegUnitPressureSets(unsigned RegUnit) const = 0;
-
-  /// Get a list of 'hint' registers that the register allocator should try
-  /// first when allocating a physical register for the virtual register
-  /// VirtReg. These registers are effectively moved to the front of the
-  /// allocation order.
-  ///
-  /// The Order argument is the allocation order for VirtReg's register class
-  /// as returned from RegisterClassInfo::getOrder(). The hint registers must
-  /// come from Order, and they must not be reserved.
-  ///
-  /// The default implementation of this function can resolve
-  /// target-independent hints provided to MRI::setRegAllocationHint with
-  /// HintType == 0. Targets that override this function should defer to the
-  /// default implementation if they have no reason to change the allocation
-  /// order for VirtReg. There may be target-independent hints.
-  virtual void getRegAllocationHints(unsigned VirtReg,
-                                     ArrayRef<MCPhysReg> Order,
-                                     SmallVectorImpl<MCPhysReg> &Hints,
-                                     const MachineFunction &MF,
-                                     const VirtRegMap *VRM = nullptr,
-                                     const LiveRegMatrix *Matrix = nullptr)
-    const;
-
-  /// A callback to allow target a chance to update register allocation hints
-  /// when a register is "changed" (e.g. coalesced) to another register.
-  /// e.g. On ARM, some virtual registers should target register pairs,
-  /// if one of pair is coalesced to another register, the allocation hint of
-  /// the other half of the pair should be changed to point to the new register.
-  virtual void updateRegAllocHint(unsigned Reg, unsigned NewReg,
-                                  MachineFunction &MF) const {
-    // Do nothing.
-  }
-
-  /// Allow the target to reverse allocation order of local live ranges. This
-  /// will generally allocate shorter local live ranges first. For targets with
-  /// many registers, this could reduce regalloc compile time by a large
-  /// factor. It is disabled by default for three reasons:
-  /// (1) Top-down allocation is simpler and easier to debug for targets that
-  /// don't benefit from reversing the order.
-  /// (2) Bottom-up allocation could result in poor evicition decisions on some
-  /// targets affecting the performance of compiled code.
-  /// (3) Bottom-up allocation is no longer guaranteed to optimally color.
-  virtual bool reverseLocalAssignment() const { return false; }
-
-  /// Allow the target to override the cost of using a callee-saved register for
-  /// the first time. Default value of 0 means we will use a callee-saved
-  /// register if it is available.
-  virtual unsigned getCSRFirstUseCost() const { return 0; }
-
-  /// Returns true if the target requires (and can make use of) the register
-  /// scavenger.
-  virtual bool requiresRegisterScavenging(const MachineFunction &MF) const {
-    return false;
-  }
-
-  /// Returns true if the target wants to use frame pointer based accesses to
-  /// spill to the scavenger emergency spill slot.
-  virtual bool useFPForScavengingIndex(const MachineFunction &MF) const {
-    return true;
-  }
-
-  /// Returns true if the target requires post PEI scavenging of registers for
-  /// materializing frame index constants.
-  virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const {
-    return false;
-  }
-
-  /// Returns true if the target requires using the RegScavenger directly for
-  /// frame elimination despite using requiresFrameIndexScavenging.
-  virtual bool requiresFrameIndexReplacementScavenging(
-      const MachineFunction &MF) const {
-    return false;
-  }
-
-  /// Returns true if the target wants the LocalStackAllocation pass to be run
-  /// and virtual base registers used for more efficient stack access.
-  virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const {
-    return false;
-  }
-
-  /// Return true if target has reserved a spill slot in the stack frame of
-  /// the given function for the specified register. e.g. On x86, if the frame
-  /// register is required, the first fixed stack object is reserved as its
-  /// spill slot. This tells PEI not to create a new stack frame
-  /// object for the given register. It should be called only after
-  /// determineCalleeSaves().
-  virtual bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
-                                    int &FrameIdx) const {
-    return false;
-  }
-
-  /// Returns true if the live-ins should be tracked after register allocation.
-  virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
-    return false;
-  }
-
-  /// True if the stack can be realigned for the target.
-  virtual bool canRealignStack(const MachineFunction &MF) const;
-
-  /// True if storage within the function requires the stack pointer to be
-  /// aligned more than the normal calling convention calls for.
-  /// This cannot be overriden by the target, but canRealignStack can be
-  /// overridden.
-  bool needsStackRealignment(const MachineFunction &MF) const;
-
-  /// Get the offset from the referenced frame index in the instruction,
-  /// if there is one.
-  virtual int64_t getFrameIndexInstrOffset(const MachineInstr *MI,
-                                           int Idx) const {
-    return 0;
-  }
-
-  /// Returns true if the instruction's frame index reference would be better
-  /// served by a base register other than FP or SP.
-  /// Used by LocalStackFrameAllocation to determine which frame index
-  /// references it should create new base registers for.
-  virtual bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
-    return false;
-  }
-
-  /// Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx
-  /// before insertion point I.
-  virtual void materializeFrameBaseRegister(MachineBasicBlock *MBB,
-                                            unsigned BaseReg, int FrameIdx,
-                                            int64_t Offset) const {
-    llvm_unreachable("materializeFrameBaseRegister does not exist on this "
-                     "target");
-  }
-
-  /// Resolve a frame index operand of an instruction
-  /// to reference the indicated base register plus offset instead.
-  virtual void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
-                                 int64_t Offset) const {
-    llvm_unreachable("resolveFrameIndex does not exist on this target");
-  }
-
-  /// Determine whether a given base register plus offset immediate is
-  /// encodable to resolve a frame index.
-  virtual bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg,
-                                  int64_t Offset) const {
-    llvm_unreachable("isFrameOffsetLegal does not exist on this target");
-  }
-
-  /// Spill the register so it can be used by the register scavenger.
-  /// Return true if the register was spilled, false otherwise.
-  /// If this function does not spill the register, the scavenger
-  /// will instead spill it to the emergency spill slot.
-  virtual bool saveScavengerRegister(MachineBasicBlock &MBB,
-                                     MachineBasicBlock::iterator I,
-                                     MachineBasicBlock::iterator &UseMI,
-                                     const TargetRegisterClass *RC,
-                                     unsigned Reg) const {
-    return false;
-  }
-
-  /// This method must be overriden to eliminate abstract frame indices from
-  /// instructions which may use them. The instruction referenced by the
-  /// iterator contains an MO_FrameIndex operand which must be eliminated by
-  /// this method. This method may modify or replace the specified instruction,
-  /// as long as it keeps the iterator pointing at the finished product.
-  /// SPAdj is the SP adjustment due to call frame setup instruction.
-  /// FIOperandNum is the FI operand number.
-  virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
-                                   int SPAdj, unsigned FIOperandNum,
-                                   RegScavenger *RS = nullptr) const = 0;
-
-  /// Return the assembly name for \p Reg.
-  virtual StringRef getRegAsmName(unsigned Reg) const {
-    // FIXME: We are assuming that the assembly name is equal to the TableGen
-    // name converted to lower case
-    //
-    // The TableGen name is the name of the definition for this register in the
-    // target's tablegen files.  For example, the TableGen name of
-    // def EAX : Register <...>; is "EAX"
-    return StringRef(getName(Reg));
-  }
-
-  //===--------------------------------------------------------------------===//
-  /// Subtarget Hooks
-
-  /// \brief SrcRC and DstRC will be morphed into NewRC if this returns true.
-  virtual bool shouldCoalesce(MachineInstr *MI,
-                              const TargetRegisterClass *SrcRC,
-                              unsigned SubReg,
-                              const TargetRegisterClass *DstRC,
-                              unsigned DstSubReg,
-                              const TargetRegisterClass *NewRC) const
-  { return true; }
-
-  //===--------------------------------------------------------------------===//
-  /// Debug information queries.
-
-  /// getFrameRegister - This method should return the register used as a base
-  /// for values allocated in the current stack frame.
-  virtual unsigned getFrameRegister(const MachineFunction &MF) const = 0;
-
-  /// Mark a register and all its aliases as reserved in the given set.
-  void markSuperRegs(BitVector &RegisterSet, unsigned Reg) const;
-
-  /// Returns true if for every register in the set all super registers are part
-  /// of the set as well.
-  bool checkAllSuperRegsMarked(const BitVector &RegisterSet,
-      ArrayRef<MCPhysReg> Exceptions = ArrayRef<MCPhysReg>()) const;
-};
-
-//===----------------------------------------------------------------------===//
-//                           SuperRegClassIterator
-//===----------------------------------------------------------------------===//
-//
-// Iterate over the possible super-registers for a given register class. The
-// iterator will visit a list of pairs (Idx, Mask) corresponding to the
-// possible classes of super-registers.
-//
-// Each bit mask will have at least one set bit, and each set bit in Mask
-// corresponds to a SuperRC such that:
-//
-//   For all Reg in SuperRC: Reg:Idx is in RC.
-//
-// The iterator can include (O, RC->getSubClassMask()) as the first entry which
-// also satisfies the above requirement, assuming Reg:0 == Reg.
-//
-class SuperRegClassIterator {
-  const unsigned RCMaskWords;
-  unsigned SubReg = 0;
-  const uint16_t *Idx;
-  const uint32_t *Mask;
-
-public:
-  /// Create a SuperRegClassIterator that visits all the super-register classes
-  /// of RC. When IncludeSelf is set, also include the (0, sub-classes) entry.
-  SuperRegClassIterator(const TargetRegisterClass *RC,
-                        const TargetRegisterInfo *TRI,
-                        bool IncludeSelf = false)
-    : RCMaskWords((TRI->getNumRegClasses() + 31) / 32),
-      Idx(RC->getSuperRegIndices()), Mask(RC->getSubClassMask()) {
-    if (!IncludeSelf)
-      ++*this;
-  }
-
-  /// Returns true if this iterator is still pointing at a valid entry.
-  bool isValid() const { return Idx; }
-
-  /// Returns the current sub-register index.
-  unsigned getSubReg() const { return SubReg; }
-
-  /// Returns the bit mask of register classes that getSubReg() projects into
-  /// RC.
-  /// See TargetRegisterClass::getSubClassMask() for how to use it.
-  const uint32_t *getMask() const { return Mask; }
-
-  /// Advance iterator to the next entry.
-  void operator++() {
-    assert(isValid() && "Cannot move iterator past end.");
-    Mask += RCMaskWords;
-    SubReg = *Idx++;
-    if (!SubReg)
-      Idx = nullptr;
-  }
-};
-
-//===----------------------------------------------------------------------===//
-//                           BitMaskClassIterator
-//===----------------------------------------------------------------------===//
-/// This class encapuslates the logic to iterate over bitmask returned by
-/// the various RegClass related APIs.
-/// E.g., this class can be used to iterate over the subclasses provided by
-/// TargetRegisterClass::getSubClassMask or SuperRegClassIterator::getMask.
-class BitMaskClassIterator {
-  /// Total number of register classes.
-  const unsigned NumRegClasses;
-  /// Base index of CurrentChunk.
-  /// In other words, the number of bit we read to get at the
-  /// beginning of that chunck.
-  unsigned Base = 0;
-  /// Adjust base index of CurrentChunk.
-  /// Base index + how many bit we read within CurrentChunk.
-  unsigned Idx = 0;
-  /// Current register class ID.
-  unsigned ID = 0;
-  /// Mask we are iterating over.
-  const uint32_t *Mask;
-  /// Current chunk of the Mask we are traversing.
-  uint32_t CurrentChunk;
-
-  /// Move ID to the next set bit.
-  void moveToNextID() {
-    // If the current chunk of memory is empty, move to the next one,
-    // while making sure we do not go pass the number of register
-    // classes.
-    while (!CurrentChunk) {
-      // Move to the next chunk.
-      Base += 32;
-      if (Base >= NumRegClasses) {
-        ID = NumRegClasses;
-        return;
-      }
-      CurrentChunk = *++Mask;
-      Idx = Base;
-    }
-    // Otherwise look for the first bit set from the right
-    // (representation of the class ID is big endian).
-    // See getSubClassMask for more details on the representation.
-    unsigned Offset = countTrailingZeros(CurrentChunk);
-    // Add the Offset to the adjusted base number of this chunk: Idx.
-    // This is the ID of the register class.
-    ID = Idx + Offset;
-
-    // Consume the zeros, if any, and the bit we just read
-    // so that we are at the right spot for the next call.
-    // Do not do Offset + 1 because Offset may be 31 and 32
-    // will be UB for the shift, though in that case we could
-    // have make the chunk being equal to 0, but that would
-    // have introduced a if statement.
-    moveNBits(Offset);
-    moveNBits(1);
-  }
-
-  /// Move \p NumBits Bits forward in CurrentChunk.
-  void moveNBits(unsigned NumBits) {
-    assert(NumBits < 32 && "Undefined behavior spotted!");
-    // Consume the bit we read for the next call.
-    CurrentChunk >>= NumBits;
-    // Adjust the base for the chunk.
-    Idx += NumBits;
-  }
-
-public:
-  /// Create a BitMaskClassIterator that visits all the register classes
-  /// represented by \p Mask.
-  ///
-  /// \pre \p Mask != nullptr
-  BitMaskClassIterator(const uint32_t *Mask, const TargetRegisterInfo &TRI)
-      : NumRegClasses(TRI.getNumRegClasses()), Mask(Mask), CurrentChunk(*Mask) {
-    // Move to the first ID.
-    moveToNextID();
-  }
-
-  /// Returns true if this iterator is still pointing at a valid entry.
-  bool isValid() const { return getID() != NumRegClasses; }
-
-  /// Returns the current register class ID.
-  unsigned getID() const { return ID; }
-
-  /// Advance iterator to the next entry.
-  void operator++() {
-    assert(isValid() && "Cannot move iterator past end.");
-    moveToNextID();
-  }
-};
-
-// This is useful when building IndexedMaps keyed on virtual registers
-struct VirtReg2IndexFunctor : public std::unary_function<unsigned, unsigned> {
-  unsigned operator()(unsigned Reg) const {
-    return TargetRegisterInfo::virtReg2Index(Reg);
-  }
-};
-
-/// Prints virtual and physical registers with or without a TRI instance.
-///
-/// The format is:
-///   %noreg          - NoRegister
-///   %vreg5          - a virtual register.
-///   %vreg5:sub_8bit - a virtual register with sub-register index (with TRI).
-///   %EAX            - a physical register
-///   %physreg17      - a physical register when no TRI instance given.
-///
-/// Usage: OS << PrintReg(Reg, TRI) << '\n';
-Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI = nullptr,
-                   unsigned SubRegIdx = 0);
-
-/// Create Printable object to print register units on a \ref raw_ostream.
-///
-/// Register units are named after their root registers:
-///
-///   AL      - Single root.
-///   FP0~ST7 - Dual roots.
-///
-/// Usage: OS << PrintRegUnit(Unit, TRI) << '\n';
-Printable PrintRegUnit(unsigned Unit, const TargetRegisterInfo *TRI);
-
-/// \brief Create Printable object to print virtual registers and physical
-/// registers on a \ref raw_ostream.
-Printable PrintVRegOrUnit(unsigned VRegOrUnit, const TargetRegisterInfo *TRI);
-
-} // end namespace llvm
-
-#endif // LLVM_TARGET_TARGETREGISTERINFO_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetSubtargetInfo.h b/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetSubtargetInfo.h
deleted file mode 100644
index 9440c56dcf17..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Target/TargetSubtargetInfo.h
+++ /dev/null
@@ -1,248 +0,0 @@
-//===- llvm/Target/TargetSubtargetInfo.h - Target Information ---*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes the subtarget options of a Target machine.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_TARGETSUBTARGETINFO_H
-#define LLVM_TARGET_TARGETSUBTARGETINFO_H
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/CodeGen/PBQPRAConstraint.h"
-#include "llvm/CodeGen/ScheduleDAGMutation.h"
-#include "llvm/CodeGen/SchedulerRegistry.h"
-#include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Support/CodeGen.h"
-#include <memory>
-#include <vector>
-
-
-namespace llvm {
-
-class CallLowering;
-class InstrItineraryData;
-struct InstrStage;
-class InstructionSelector;
-class LegalizerInfo;
-class MachineInstr;
-struct MachineSchedPolicy;
-struct MCReadAdvanceEntry;
-struct MCWriteLatencyEntry;
-struct MCWriteProcResEntry;
-class RegisterBankInfo;
-class SDep;
-class SelectionDAGTargetInfo;
-struct SubtargetFeatureKV;
-struct SubtargetInfoKV;
-class SUnit;
-class TargetFrameLowering;
-class TargetInstrInfo;
-class TargetLowering;
-class TargetRegisterClass;
-class TargetRegisterInfo;
-class TargetSchedModel;
-class Triple;
-
-//===----------------------------------------------------------------------===//
-///
-/// TargetSubtargetInfo - Generic base class for all target subtargets.  All
-/// Target-specific options that control code generation and printing should
-/// be exposed through a TargetSubtargetInfo-derived class.
-///
-class TargetSubtargetInfo : public MCSubtargetInfo {
-protected: // Can only create subclasses...
-  TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS,
-                      ArrayRef<SubtargetFeatureKV> PF,
-                      ArrayRef<SubtargetFeatureKV> PD,
-                      const SubtargetInfoKV *ProcSched,
-                      const MCWriteProcResEntry *WPR,
-                      const MCWriteLatencyEntry *WL,
-                      const MCReadAdvanceEntry *RA, const InstrStage *IS,
-                      const unsigned *OC, const unsigned *FP);
-
-public:
-  // AntiDepBreakMode - Type of anti-dependence breaking that should
-  // be performed before post-RA scheduling.
-  using AntiDepBreakMode = enum { ANTIDEP_NONE, ANTIDEP_CRITICAL, ANTIDEP_ALL };
-  using RegClassVector = SmallVectorImpl<const TargetRegisterClass *>;
-
-  TargetSubtargetInfo() = delete;
-  TargetSubtargetInfo(const TargetSubtargetInfo &) = delete;
-  TargetSubtargetInfo &operator=(const TargetSubtargetInfo &) = delete;
-  ~TargetSubtargetInfo() override;
-
-  virtual bool isXRaySupported() const { return false; }
-
-  // Interfaces to the major aspects of target machine information:
-  //
-  // -- Instruction opcode and operand information
-  // -- Pipelines and scheduling information
-  // -- Stack frame information
-  // -- Selection DAG lowering information
-  // -- Call lowering information
-  //
-  // N.B. These objects may change during compilation. It's not safe to cache
-  // them between functions.
-  virtual const TargetInstrInfo *getInstrInfo() const { return nullptr; }
-  virtual const TargetFrameLowering *getFrameLowering() const {
-    return nullptr;
-  }
-  virtual const TargetLowering *getTargetLowering() const { return nullptr; }
-  virtual const SelectionDAGTargetInfo *getSelectionDAGInfo() const {
-    return nullptr;
-  }
-  virtual const CallLowering *getCallLowering() const { return nullptr; }
-
-  // FIXME: This lets targets specialize the selector by subtarget (which lets
-  // us do things like a dedicated avx512 selector).  However, we might want
-  // to also specialize selectors by MachineFunction, which would let us be
-  // aware of optsize/optnone and such.
-  virtual const InstructionSelector *getInstructionSelector() const {
-    return nullptr;
-  }
-
-  /// Target can subclass this hook to select a different DAG scheduler.
-  virtual RegisterScheduler::FunctionPassCtor
-      getDAGScheduler(CodeGenOpt::Level) const {
-    return nullptr;
-  }
-
-  virtual const LegalizerInfo *getLegalizerInfo() const { return nullptr; }
-
-  /// getRegisterInfo - If register information is available, return it.  If
-  /// not, return null.
-  virtual const TargetRegisterInfo *getRegisterInfo() const { return nullptr; }
-
-  /// If the information for the register banks is available, return it.
-  /// Otherwise return nullptr.
-  virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr; }
-
-  /// getInstrItineraryData - Returns instruction itinerary data for the target
-  /// or specific subtarget.
-  virtual const InstrItineraryData *getInstrItineraryData() const {
-    return nullptr;
-  }
-
-  /// Resolve a SchedClass at runtime, where SchedClass identifies an
-  /// MCSchedClassDesc with the isVariant property. This may return the ID of
-  /// another variant SchedClass, but repeated invocation must quickly terminate
-  /// in a nonvariant SchedClass.
-  virtual unsigned resolveSchedClass(unsigned SchedClass,
-                                     const MachineInstr *MI,
-                                     const TargetSchedModel *SchedModel) const {
-    return 0;
-  }
-
-  /// \brief True if the subtarget should run MachineScheduler after aggressive
-  /// coalescing.
-  ///
-  /// This currently replaces the SelectionDAG scheduler with the "source" order
-  /// scheduler (though see below for an option to turn this off and use the
-  /// TargetLowering preference). It does not yet disable the postRA scheduler.
-  virtual bool enableMachineScheduler() const;
-
-  /// \brief Support printing of [latency:throughput] comment in output .S file.
-  virtual bool supportPrintSchedInfo() const { return false; }
-
-  /// \brief True if the machine scheduler should disable the TLI preference
-  /// for preRA scheduling with the source level scheduler.
-  virtual bool enableMachineSchedDefaultSched() const { return true; }
-
-  /// \brief True if the subtarget should enable joining global copies.
-  ///
-  /// By default this is enabled if the machine scheduler is enabled, but
-  /// can be overridden.
-  virtual bool enableJoinGlobalCopies() const;
-
-  /// True if the subtarget should run a scheduler after register allocation.
-  ///
-  /// By default this queries the PostRAScheduling bit in the scheduling model
-  /// which is the preferred way to influence this.
-  virtual bool enablePostRAScheduler() const;
-
-  /// \brief True if the subtarget should run the atomic expansion pass.
-  virtual bool enableAtomicExpand() const;
-
-  /// \brief Override generic scheduling policy within a region.
-  ///
-  /// This is a convenient way for targets that don't provide any custom
-  /// scheduling heuristics (no custom MachineSchedStrategy) to make
-  /// changes to the generic scheduling policy.
-  virtual void overrideSchedPolicy(MachineSchedPolicy &Policy,
-                                   unsigned NumRegionInstrs) const {}
-
-  // \brief Perform target specific adjustments to the latency of a schedule
-  // dependency.
-  virtual void adjustSchedDependency(SUnit *def, SUnit *use, SDep &dep) const {}
-
-  // For use with PostRAScheduling: get the anti-dependence breaking that should
-  // be performed before post-RA scheduling.
-  virtual AntiDepBreakMode getAntiDepBreakMode() const { return ANTIDEP_NONE; }
-
-  // For use with PostRAScheduling: in CriticalPathRCs, return any register
-  // classes that should only be considered for anti-dependence breaking if they
-  // are on the critical path.
-  virtual void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
-    return CriticalPathRCs.clear();
-  }
-
-  // \brief Provide an ordered list of schedule DAG mutations for the post-RA
-  // scheduler.
-  virtual void getPostRAMutations(
-      std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
-  }
-
-  // \brief Provide an ordered list of schedule DAG mutations for the machine
-  // pipeliner.
-  virtual void getSMSMutations(
-      std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
-  }
-
-  // For use with PostRAScheduling: get the minimum optimization level needed
-  // to enable post-RA scheduling.
-  virtual CodeGenOpt::Level getOptLevelToEnablePostRAScheduler() const {
-    return CodeGenOpt::Default;
-  }
-
-  /// \brief True if the subtarget should run the local reassignment
-  /// heuristic of the register allocator.
-  /// This heuristic may be compile time intensive, \p OptLevel provides
-  /// a finer grain to tune the register allocator.
-  virtual bool enableRALocalReassignment(CodeGenOpt::Level OptLevel) const;
-
-  /// \brief Enable use of alias analysis during code generation (during MI
-  /// scheduling, DAGCombine, etc.).
-  virtual bool useAA() const;
-
-  /// \brief Enable the use of the early if conversion pass.
-  virtual bool enableEarlyIfConversion() const { return false; }
-
-  /// \brief Return PBQPConstraint(s) for the target.
-  ///
-  /// Override to provide custom PBQP constraints.
-  virtual std::unique_ptr<PBQPRAConstraint> getCustomPBQPConstraints() const {
-    return nullptr;
-  }
-
-  /// Enable tracking of subregister liveness in register allocator.
-  /// Please use MachineRegisterInfo::subRegLivenessEnabled() instead where
-  /// possible.
-  virtual bool enableSubRegLiveness() const { return false; }
-
-  /// Returns string representation of scheduler comment
-  std::string getSchedInfoStr(const MachineInstr &MI) const override;
-  std::string getSchedInfoStr(MCInst const &MCI) const override;
-};
-
-} // end namespace llvm
-
-#endif // LLVM_TARGET_TARGETSUBTARGETINFO_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/GCOVProfiler.h b/external/bsd/llvm/dist/llvm/include/llvm/Transforms/GCOVProfiler.h
deleted file mode 100644
index 66bd75c88e24..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/GCOVProfiler.h
+++ /dev/null
@@ -1,31 +0,0 @@
-//===- Transforms/GCOVProfiler.h - GCOVProfiler pass  ----------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-/// \file
-/// This file provides the interface for the GCOV style profiler  pass.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TRANSFORMS_GCOVPROFILER_H
-#define LLVM_TRANSFORMS_GCOVPROFILER_H
-
-#include "llvm/IR/PassManager.h"
-#include "llvm/Transforms/Instrumentation.h"
-
-namespace llvm {
-/// The gcov-style instrumentation pass
-class GCOVProfilerPass : public PassInfoMixin<GCOVProfilerPass> {
-public:
-  GCOVProfilerPass(const GCOVOptions &Options = GCOVOptions::getDefault()) : GCOVOpts(Options) { }
-  PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
-
-private:
-  GCOVOptions GCOVOpts;
-};
-
-} // End llvm namespace
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/InstrProfiling.h b/external/bsd/llvm/dist/llvm/include/llvm/Transforms/InstrProfiling.h
deleted file mode 100644
index 0fe6ad5eeac7..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/InstrProfiling.h
+++ /dev/null
@@ -1,124 +0,0 @@
-//===- Transforms/InstrProfiling.h - Instrumentation passes -----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-/// \file
-/// This file provides the interface for LLVM's PGO Instrumentation lowering
-/// pass.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TRANSFORMS_INSTRPROFILING_H
-#define LLVM_TRANSFORMS_INSTRPROFILING_H
-
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/IR/IntrinsicInst.h"
-#include "llvm/IR/PassManager.h"
-#include "llvm/ProfileData/InstrProf.h"
-#include "llvm/Transforms/Instrumentation.h"
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-#include <vector>
-
-namespace llvm {
-
-class TargetLibraryInfo;
-using LoadStorePair = std::pair<Instruction *, Instruction *>;
-
-/// Instrumentation based profiling lowering pass. This pass lowers
-/// the profile instrumented code generated by FE or the IR based
-/// instrumentation pass.
-class InstrProfiling : public PassInfoMixin<InstrProfiling> {
-public:
-  InstrProfiling() = default;
-  InstrProfiling(const InstrProfOptions &Options) : Options(Options) {}
-
-  PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
-  bool run(Module &M, const TargetLibraryInfo &TLI);
-
-private:
-  InstrProfOptions Options;
-  Module *M;
-  Triple TT;
-  const TargetLibraryInfo *TLI;
-  struct PerFunctionProfileData {
-    uint32_t NumValueSites[IPVK_Last + 1];
-    GlobalVariable *RegionCounters = nullptr;
-    GlobalVariable *DataVar = nullptr;
-
-    PerFunctionProfileData() {
-      memset(NumValueSites, 0, sizeof(uint32_t) * (IPVK_Last + 1));
-    }
-  };
-  DenseMap<GlobalVariable *, PerFunctionProfileData> ProfileDataMap;
-  std::vector<GlobalValue *> UsedVars;
-  std::vector<GlobalVariable *> ReferencedNames;
-  GlobalVariable *NamesVar;
-  size_t NamesSize;
-
-  // vector of counter load/store pairs to be register promoted.
-  std::vector<LoadStorePair> PromotionCandidates;
-
-  // The start value of precise value profile range for memory intrinsic sizes.
-  int64_t MemOPSizeRangeStart;
-  // The end value of precise value profile range for memory intrinsic sizes.
-  int64_t MemOPSizeRangeLast;
-
-  int64_t TotalCountersPromoted = 0;
-
-  /// Lower instrumentation intrinsics in the function. Returns true if there
-  /// any lowering.
-  bool lowerIntrinsics(Function *F);
-
-  /// Register-promote counter loads and stores in loops.
-  void promoteCounterLoadStores(Function *F);
-
-  /// Returns true if profile counter update register promotion is enabled.
-  bool isCounterPromotionEnabled() const;
-
-  /// Count the number of instrumented value sites for the function.
-  void computeNumValueSiteCounts(InstrProfValueProfileInst *Ins);
-
-  /// Replace instrprof_value_profile with a call to runtime library.
-  void lowerValueProfileInst(InstrProfValueProfileInst *Ins);
-
-  /// Replace instrprof_increment with an increment of the appropriate value.
-  void lowerIncrement(InstrProfIncrementInst *Inc);
-
-  /// Force emitting of name vars for unused functions.
-  void lowerCoverageData(GlobalVariable *CoverageNamesVar);
-
-  /// Get the region counters for an increment, creating them if necessary.
-  ///
-  /// If the counter array doesn't yet exist, the profile data variables
-  /// referring to them will also be created.
-  GlobalVariable *getOrCreateRegionCounters(InstrProfIncrementInst *Inc);
-
-  /// Emit the section with compressed function names.
-  void emitNameData();
-
-  /// Emit value nodes section for value profiling.
-  void emitVNodes();
-
-  /// Emit runtime registration functions for each profile data variable.
-  void emitRegistration();
-
-  /// Emit the necessary plumbing to pull in the runtime initialization.
-  void emitRuntimeHook();
-
-  /// Add uses of our data variables and runtime hook.
-  void emitUses();
-
-  /// Create a static initializer for our data, on platforms that need it,
-  /// and for any profile output file that was specified.
-  void emitInitialization();
-};
-
-} // end namespace llvm
-
-#endif // LLVM_TRANSFORMS_INSTRPROFILING_H
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/PGOInstrumentation.h b/external/bsd/llvm/dist/llvm/include/llvm/Transforms/PGOInstrumentation.h
deleted file mode 100644
index 19263f0f8071..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/PGOInstrumentation.h
+++ /dev/null
@@ -1,61 +0,0 @@
-//===- Transforms/PGOInstrumentation.h - PGO gen/use passes  ---*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-/// \file
-/// This file provides the interface for IR based instrumentation passes (
-/// (profile-gen, and profile-use).
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TRANSFORMS_PGOINSTRUMENTATION_H
-#define LLVM_TRANSFORMS_PGOINSTRUMENTATION_H
-
-#include "llvm/IR/PassManager.h"
-#include "llvm/Transforms/Instrumentation.h"
-
-namespace llvm {
-
-/// The instrumentation (profile-instr-gen) pass for IR based PGO.
-class PGOInstrumentationGen : public PassInfoMixin<PGOInstrumentationGen> {
-public:
-  PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
-};
-
-/// The profile annotation (profile-instr-use) pass for IR based PGO.
-class PGOInstrumentationUse : public PassInfoMixin<PGOInstrumentationUse> {
-public:
-  PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
-  PGOInstrumentationUse(std::string Filename = "");
-
-private:
-  std::string ProfileFileName;
-};
-
-/// The indirect function call promotion pass.
-class PGOIndirectCallPromotion : public PassInfoMixin<PGOIndirectCallPromotion> {
-public:
-  PGOIndirectCallPromotion(bool IsInLTO = false, bool SamplePGO = false)
-      : InLTO(IsInLTO), SamplePGO(SamplePGO) {}
-  PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
-
-private:
-  bool InLTO;
-  bool SamplePGO;
-};
-
-/// The profile size based optimization pass for memory intrinsics.
-class PGOMemOPSizeOpt : public PassInfoMixin<PGOMemOPSizeOpt> {
-public:
-  PGOMemOPSizeOpt() {}
-  PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
-};
-
-void setProfMetadata(Module *M, Instruction *TI, ArrayRef<uint64_t> EdgeCounts,
-                     uint64_t MaxCount);
-
-} // End llvm namespace
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/SampleProfile.h b/external/bsd/llvm/dist/llvm/include/llvm/Transforms/SampleProfile.h
deleted file mode 100644
index c984fe74ba93..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/SampleProfile.h
+++ /dev/null
@@ -1,31 +0,0 @@
-//===- Transforms/SampleProfile.h - SamplePGO pass--------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-/// \file
-/// This file provides the interface for the sampled PGO loader pass.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TRANSFORMS_SAMPLEPROFILE_H
-#define LLVM_TRANSFORMS_SAMPLEPROFILE_H
-
-#include "llvm/IR/PassManager.h"
-
-namespace llvm {
-
-/// The sample profiler data loader pass.
-class SampleProfileLoaderPass : public PassInfoMixin<SampleProfileLoaderPass> {
-public:
-  PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
-  SampleProfileLoaderPass(std::string File = "") : ProfileFileName(File) {}
-
-private:
-  std::string ProfileFileName;
-};
-
-} // End llvm namespace
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/Utils/CmpInstAnalysis.h b/external/bsd/llvm/dist/llvm/include/llvm/Transforms/Utils/CmpInstAnalysis.h
deleted file mode 100644
index 5ec3888d4538..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/Utils/CmpInstAnalysis.h
+++ /dev/null
@@ -1,70 +0,0 @@
-//===-- CmpInstAnalysis.h - Utils to help fold compare insts ----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file holds routines to help analyse compare instructions
-// and fold them into constants or other compare instructions
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TRANSFORMS_UTILS_CMPINSTANALYSIS_H
-#define LLVM_TRANSFORMS_UTILS_CMPINSTANALYSIS_H
-
-#include "llvm/IR/InstrTypes.h"
-
-namespace llvm {
-  class ICmpInst;
-  class Value;
-
-  /// Encode a icmp predicate into a three bit mask. These bits are carefully
-  /// arranged to allow folding of expressions such as:
-  ///
-  ///      (A < B) | (A > B) --> (A != B)
-  ///
-  /// Note that this is only valid if the first and second predicates have the
-  /// same sign. It is illegal to do: (A u< B) | (A s> B)
-  ///
-  /// Three bits are used to represent the condition, as follows:
-  ///   0  A > B
-  ///   1  A == B
-  ///   2  A < B
-  ///
-  /// <=>  Value  Definition
-  /// 000     0   Always false
-  /// 001     1   A >  B
-  /// 010     2   A == B
-  /// 011     3   A >= B
-  /// 100     4   A <  B
-  /// 101     5   A != B
-  /// 110     6   A <= B
-  /// 111     7   Always true
-  ///
-  unsigned getICmpCode(const ICmpInst *ICI, bool InvertPred = false);
-
-  /// This is the complement of getICmpCode, which turns an opcode and two
-  /// operands into either a constant true or false, or the predicate for a new
-  /// ICmp instruction. The sign is passed in to determine which kind of
-  /// predicate to use in the new icmp instruction.
-  /// Non-NULL return value will be a true or false constant.
-  /// NULL return means a new ICmp is needed. The predicate for which is output
-  /// in NewICmpPred.
-  Value *getICmpValue(bool Sign, unsigned Code, Value *LHS, Value *RHS,
-                      CmpInst::Predicate &NewICmpPred);
-
-  /// Return true if both predicates match sign or if at least one of them is an
-  /// equality comparison (which is signless).
-  bool PredicatesFoldable(CmpInst::Predicate p1, CmpInst::Predicate p2);
-
-  /// Decompose an icmp into the form ((X & Y) pred Z) if possible. The returned
-  /// predicate is either == or !=. Returns false if decomposition fails.
-  bool decomposeBitTestICmp(const ICmpInst *I, CmpInst::Predicate &Pred,
-                            Value *&X, Value *&Y, Value *&Z);
-
-} // end namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/Utils/SimplifyInstructions.h b/external/bsd/llvm/dist/llvm/include/llvm/Transforms/Utils/SimplifyInstructions.h
deleted file mode 100644
index 3f838611626f..000000000000
--- a/external/bsd/llvm/dist/llvm/include/llvm/Transforms/Utils/SimplifyInstructions.h
+++ /dev/null
@@ -1,31 +0,0 @@
-//===- SimplifyInstructions.h - Remove redundant instructions ---*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This is a utility pass used for testing the InstructionSimplify analysis.
-// The analysis is applied to every instruction, and if it simplifies then the
-// instruction is replaced by the simplification.  If you are looking for a pass
-// that performs serious instruction folding, use the instcombine pass instead.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TRANSFORMS_UTILS_SIMPLIFYINSTRUCTIONS_H
-#define LLVM_TRANSFORMS_UTILS_SIMPLIFYINSTRUCTIONS_H
-
-#include "llvm/IR/PassManager.h"
-
-namespace llvm {
-
-/// This pass removes redundant instructions.
-class InstSimplifierPass : public PassInfoMixin<InstSimplifierPass> {
-public:
-  PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
-};
-} // end namespace llvm
-
-#endif // LLVM_TRANSFORMS_UTILS_SIMPLIFYINSTRUCTIONS_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Analysis/OptimizationDiagnosticInfo.cpp b/external/bsd/llvm/dist/llvm/lib/Analysis/OptimizationDiagnosticInfo.cpp
deleted file mode 100644
index eb259fd7a384..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Analysis/OptimizationDiagnosticInfo.cpp
+++ /dev/null
@@ -1,224 +0,0 @@
-//===- OptimizationDiagnosticInfo.cpp - Optimization Diagnostic -*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Optimization diagnostic interfaces.  It's packaged as an analysis pass so
-// that by using this service passes become dependent on BFI as well.  BFI is
-// used to compute the "hotness" of the diagnostic message.
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Analysis/OptimizationDiagnosticInfo.h"
-#include "llvm/Analysis/BranchProbabilityInfo.h"
-#include "llvm/Analysis/LazyBlockFrequencyInfo.h"
-#include "llvm/Analysis/LoopInfo.h"
-#include "llvm/IR/DebugInfo.h"
-#include "llvm/IR/DiagnosticInfo.h"
-#include "llvm/IR/Dominators.h"
-#include "llvm/IR/LLVMContext.h"
-
-using namespace llvm;
-
-OptimizationRemarkEmitter::OptimizationRemarkEmitter(const Function *F)
-    : F(F), BFI(nullptr) {
-  if (!F->getContext().getDiagnosticsHotnessRequested())
-    return;
-
-  // First create a dominator tree.
-  DominatorTree DT;
-  DT.recalculate(*const_cast<Function *>(F));
-
-  // Generate LoopInfo from it.
-  LoopInfo LI;
-  LI.analyze(DT);
-
-  // Then compute BranchProbabilityInfo.
-  BranchProbabilityInfo BPI;
-  BPI.calculate(*F, LI);
-
-  // Finally compute BFI.
-  OwnedBFI = llvm::make_unique<BlockFrequencyInfo>(*F, BPI, LI);
-  BFI = OwnedBFI.get();
-}
-
-bool OptimizationRemarkEmitter::invalidate(
-    Function &F, const PreservedAnalyses &PA,
-    FunctionAnalysisManager::Invalidator &Inv) {
-  // This analysis has no state and so can be trivially preserved but it needs
-  // a fresh view of BFI if it was constructed with one.
-  if (BFI && Inv.invalidate<BlockFrequencyAnalysis>(F, PA))
-    return true;
-
-  // Otherwise this analysis result remains valid.
-  return false;
-}
-
-Optional<uint64_t> OptimizationRemarkEmitter::computeHotness(const Value *V) {
-  if (!BFI)
-    return None;
-
-  return BFI->getBlockProfileCount(cast<BasicBlock>(V));
-}
-
-namespace llvm {
-namespace yaml {
-
-void MappingTraits<DiagnosticInfoOptimizationBase *>::mapping(
-    IO &io, DiagnosticInfoOptimizationBase *&OptDiag) {
-  assert(io.outputting() && "input not yet implemented");
-
-  if (io.mapTag("!Passed",
-                (OptDiag->getKind() == DK_OptimizationRemark ||
-                 OptDiag->getKind() == DK_MachineOptimizationRemark)))
-    ;
-  else if (io.mapTag(
-               "!Missed",
-               (OptDiag->getKind() == DK_OptimizationRemarkMissed ||
-                OptDiag->getKind() == DK_MachineOptimizationRemarkMissed)))
-    ;
-  else if (io.mapTag(
-               "!Analysis",
-               (OptDiag->getKind() == DK_OptimizationRemarkAnalysis ||
-                OptDiag->getKind() == DK_MachineOptimizationRemarkAnalysis)))
-    ;
-  else if (io.mapTag("!AnalysisFPCommute",
-                     OptDiag->getKind() ==
-                         DK_OptimizationRemarkAnalysisFPCommute))
-    ;
-  else if (io.mapTag("!AnalysisAliasing",
-                     OptDiag->getKind() ==
-                         DK_OptimizationRemarkAnalysisAliasing))
-    ;
-  else if (io.mapTag("!Failure", OptDiag->getKind() == DK_OptimizationFailure))
-    ;
-  else
-    llvm_unreachable("Unknown remark type");
-
-  // These are read-only for now.
-  DiagnosticLocation DL = OptDiag->getLocation();
-  StringRef FN =
-      GlobalValue::dropLLVMManglingEscape(OptDiag->getFunction().getName());
-
-  StringRef PassName(OptDiag->PassName);
-  io.mapRequired("Pass", PassName);
-  io.mapRequired("Name", OptDiag->RemarkName);
-  if (!io.outputting() || DL.isValid())
-    io.mapOptional("DebugLoc", DL);
-  io.mapRequired("Function", FN);
-  io.mapOptional("Hotness", OptDiag->Hotness);
-  io.mapOptional("Args", OptDiag->Args);
-}
-
-template <> struct MappingTraits<DiagnosticLocation> {
-  static void mapping(IO &io, DiagnosticLocation &DL) {
-    assert(io.outputting() && "input not yet implemented");
-
-    StringRef File = DL.getFilename();
-    unsigned Line = DL.getLine();
-    unsigned Col = DL.getColumn();
-
-    io.mapRequired("File", File);
-    io.mapRequired("Line", Line);
-    io.mapRequired("Column", Col);
-  }
-
-  static const bool flow = true;
-};
-
-// Implement this as a mapping for now to get proper quotation for the value.
-template <> struct MappingTraits<DiagnosticInfoOptimizationBase::Argument> {
-  static void mapping(IO &io, DiagnosticInfoOptimizationBase::Argument &A) {
-    assert(io.outputting() && "input not yet implemented");
-    io.mapRequired(A.Key.data(), A.Val);
-    if (A.Loc.isValid())
-      io.mapOptional("DebugLoc", A.Loc);
-  }
-};
-
-} // end namespace yaml
-} // end namespace llvm
-
-LLVM_YAML_IS_SEQUENCE_VECTOR(DiagnosticInfoOptimizationBase::Argument)
-
-void OptimizationRemarkEmitter::computeHotness(
-    DiagnosticInfoIROptimization &OptDiag) {
-  const Value *V = OptDiag.getCodeRegion();
-  if (V)
-    OptDiag.setHotness(computeHotness(V));
-}
-
-void OptimizationRemarkEmitter::emit(
-    DiagnosticInfoOptimizationBase &OptDiagBase) {
-  auto &OptDiag = cast<DiagnosticInfoIROptimization>(OptDiagBase);
-  computeHotness(OptDiag);
-  // If a diagnostic has a hotness value, then only emit it if its hotness
-  // meets the threshold.
-  if (OptDiag.getHotness() &&
-      *OptDiag.getHotness() <
-          F->getContext().getDiagnosticsHotnessThreshold()) {
-    return;
-  }
-
-  yaml::Output *Out = F->getContext().getDiagnosticsOutputFile();
-  if (Out) {
-    auto *P = const_cast<DiagnosticInfoOptimizationBase *>(&OptDiagBase);
-    *Out << P;
-  }
-  // FIXME: now that IsVerbose is part of DI, filtering for this will be moved
-  // from here to clang.
-  if (!OptDiag.isVerbose() || shouldEmitVerbose())
-    F->getContext().diagnose(OptDiag);
-}
-
-OptimizationRemarkEmitterWrapperPass::OptimizationRemarkEmitterWrapperPass()
-    : FunctionPass(ID) {
-  initializeOptimizationRemarkEmitterWrapperPassPass(
-      *PassRegistry::getPassRegistry());
-}
-
-bool OptimizationRemarkEmitterWrapperPass::runOnFunction(Function &Fn) {
-  BlockFrequencyInfo *BFI;
-
-  if (Fn.getContext().getDiagnosticsHotnessRequested())
-    BFI = &getAnalysis<LazyBlockFrequencyInfoPass>().getBFI();
-  else
-    BFI = nullptr;
-
-  ORE = llvm::make_unique<OptimizationRemarkEmitter>(&Fn, BFI);
-  return false;
-}
-
-void OptimizationRemarkEmitterWrapperPass::getAnalysisUsage(
-    AnalysisUsage &AU) const {
-  LazyBlockFrequencyInfoPass::getLazyBFIAnalysisUsage(AU);
-  AU.setPreservesAll();
-}
-
-AnalysisKey OptimizationRemarkEmitterAnalysis::Key;
-
-OptimizationRemarkEmitter
-OptimizationRemarkEmitterAnalysis::run(Function &F,
-                                       FunctionAnalysisManager &AM) {
-  BlockFrequencyInfo *BFI;
-
-  if (F.getContext().getDiagnosticsHotnessRequested())
-    BFI = &AM.getResult<BlockFrequencyAnalysis>(F);
-  else
-    BFI = nullptr;
-
-  return OptimizationRemarkEmitter(&F, BFI);
-}
-
-char OptimizationRemarkEmitterWrapperPass::ID = 0;
-static const char ore_name[] = "Optimization Remark Emitter";
-#define ORE_NAME "opt-remark-emitter"
-
-INITIALIZE_PASS_BEGIN(OptimizationRemarkEmitterWrapperPass, ORE_NAME, ore_name,
-                      false, true)
-INITIALIZE_PASS_DEPENDENCY(LazyBFIPass)
-INITIALIZE_PASS_END(OptimizationRemarkEmitterWrapperPass, ORE_NAME, ore_name,
-                    false, true)
diff --git a/external/bsd/llvm/dist/llvm/lib/Analysis/SparsePropagation.cpp b/external/bsd/llvm/dist/llvm/lib/Analysis/SparsePropagation.cpp
deleted file mode 100644
index 470f4bee1e0a..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Analysis/SparsePropagation.cpp
+++ /dev/null
@@ -1,347 +0,0 @@
-//===- SparsePropagation.cpp - Sparse Conditional Property Propagation ----===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements an abstract sparse conditional propagation algorithm,
-// modeled after SCCP, but with a customizable lattice function.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Analysis/SparsePropagation.h"
-#include "llvm/IR/Constants.h"
-#include "llvm/IR/Function.h"
-#include "llvm/IR/Instructions.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/raw_ostream.h"
-using namespace llvm;
-
-#define DEBUG_TYPE "sparseprop"
-
-//===----------------------------------------------------------------------===//
-//                  AbstractLatticeFunction Implementation
-//===----------------------------------------------------------------------===//
-
-AbstractLatticeFunction::~AbstractLatticeFunction() {}
-
-/// PrintValue - Render the specified lattice value to the specified stream.
-void AbstractLatticeFunction::PrintValue(LatticeVal V, raw_ostream &OS) {
-  if (V == UndefVal)
-    OS << "undefined";
-  else if (V == OverdefinedVal)
-    OS << "overdefined";
-  else if (V == UntrackedVal)
-    OS << "untracked";
-  else
-    OS << "unknown lattice value";
-}
-
-//===----------------------------------------------------------------------===//
-//                          SparseSolver Implementation
-//===----------------------------------------------------------------------===//
-
-/// getOrInitValueState - Return the LatticeVal object that corresponds to the
-/// value, initializing the value's state if it hasn't been entered into the
-/// map yet.   This function is necessary because not all values should start
-/// out in the underdefined state... Arguments should be overdefined, and
-/// constants should be marked as constants.
-///
-SparseSolver::LatticeVal SparseSolver::getOrInitValueState(Value *V) {
-  DenseMap<Value*, LatticeVal>::iterator I = ValueState.find(V);
-  if (I != ValueState.end()) return I->second;  // Common case, in the map
-  
-  LatticeVal LV;
-  if (LatticeFunc->IsUntrackedValue(V))
-    return LatticeFunc->getUntrackedVal();
-  else if (Constant *C = dyn_cast<Constant>(V))
-    LV = LatticeFunc->ComputeConstant(C);
-  else if (Argument *A = dyn_cast<Argument>(V))
-    LV = LatticeFunc->ComputeArgument(A);
-  else if (!isa<Instruction>(V))
-    // All other non-instructions are overdefined.
-    LV = LatticeFunc->getOverdefinedVal();
-  else
-    // All instructions are underdefined by default.
-    LV = LatticeFunc->getUndefVal();
-  
-  // If this value is untracked, don't add it to the map.
-  if (LV == LatticeFunc->getUntrackedVal())
-    return LV;
-  return ValueState[V] = LV;
-}
-
-/// UpdateState - When the state for some instruction is potentially updated,
-/// this function notices and adds I to the worklist if needed.
-void SparseSolver::UpdateState(Instruction &Inst, LatticeVal V) {
-  DenseMap<Value*, LatticeVal>::iterator I = ValueState.find(&Inst);
-  if (I != ValueState.end() && I->second == V)
-    return;  // No change.
-  
-  // An update.  Visit uses of I.
-  ValueState[&Inst] = V;
-  InstWorkList.push_back(&Inst);
-}
-
-/// MarkBlockExecutable - This method can be used by clients to mark all of
-/// the blocks that are known to be intrinsically live in the processed unit.
-void SparseSolver::MarkBlockExecutable(BasicBlock *BB) {
-  DEBUG(dbgs() << "Marking Block Executable: " << BB->getName() << "\n");
-  BBExecutable.insert(BB);   // Basic block is executable!
-  BBWorkList.push_back(BB);  // Add the block to the work list!
-}
-
-/// markEdgeExecutable - Mark a basic block as executable, adding it to the BB
-/// work list if it is not already executable...
-void SparseSolver::markEdgeExecutable(BasicBlock *Source, BasicBlock *Dest) {
-  if (!KnownFeasibleEdges.insert(Edge(Source, Dest)).second)
-    return;  // This edge is already known to be executable!
-  
-  DEBUG(dbgs() << "Marking Edge Executable: " << Source->getName()
-        << " -> " << Dest->getName() << "\n");
-
-  if (BBExecutable.count(Dest)) {
-    // The destination is already executable, but we just made an edge
-    // feasible that wasn't before.  Revisit the PHI nodes in the block
-    // because they have potentially new operands.
-    for (BasicBlock::iterator I = Dest->begin(); isa<PHINode>(I); ++I)
-      visitPHINode(*cast<PHINode>(I));
-    
-  } else {
-    MarkBlockExecutable(Dest);
-  }
-}
-
-
-/// getFeasibleSuccessors - Return a vector of booleans to indicate which
-/// successors are reachable from a given terminator instruction.
-void SparseSolver::getFeasibleSuccessors(TerminatorInst &TI,
-                                         SmallVectorImpl<bool> &Succs,
-                                         bool AggressiveUndef) {
-  Succs.resize(TI.getNumSuccessors());
-  if (TI.getNumSuccessors() == 0) return;
-  
-  if (BranchInst *BI = dyn_cast<BranchInst>(&TI)) {
-    if (BI->isUnconditional()) {
-      Succs[0] = true;
-      return;
-    }
-    
-    LatticeVal BCValue;
-    if (AggressiveUndef)
-      BCValue = getOrInitValueState(BI->getCondition());
-    else
-      BCValue = getLatticeState(BI->getCondition());
-    
-    if (BCValue == LatticeFunc->getOverdefinedVal() ||
-        BCValue == LatticeFunc->getUntrackedVal()) {
-      // Overdefined condition variables can branch either way.
-      Succs[0] = Succs[1] = true;
-      return;
-    }
-
-    // If undefined, neither is feasible yet.
-    if (BCValue == LatticeFunc->getUndefVal())
-      return;
-
-    Constant *C = LatticeFunc->GetConstant(BCValue, BI->getCondition(), *this);
-    if (!C || !isa<ConstantInt>(C)) {
-      // Non-constant values can go either way.
-      Succs[0] = Succs[1] = true;
-      return;
-    }
-
-    // Constant condition variables mean the branch can only go a single way
-    Succs[C->isNullValue()] = true;
-    return;
-  }
-  
-  if (isa<InvokeInst>(TI)) {
-    // Invoke instructions successors are always executable.
-    // TODO: Could ask the lattice function if the value can throw.
-    Succs[0] = Succs[1] = true;
-    return;
-  }
-  
-  if (isa<IndirectBrInst>(TI)) {
-    Succs.assign(Succs.size(), true);
-    return;
-  }
-  
-  SwitchInst &SI = cast<SwitchInst>(TI);
-  LatticeVal SCValue;
-  if (AggressiveUndef)
-    SCValue = getOrInitValueState(SI.getCondition());
-  else
-    SCValue = getLatticeState(SI.getCondition());
-  
-  if (SCValue == LatticeFunc->getOverdefinedVal() ||
-      SCValue == LatticeFunc->getUntrackedVal()) {
-    // All destinations are executable!
-    Succs.assign(TI.getNumSuccessors(), true);
-    return;
-  }
-  
-  // If undefined, neither is feasible yet.
-  if (SCValue == LatticeFunc->getUndefVal())
-    return;
-  
-  Constant *C = LatticeFunc->GetConstant(SCValue, SI.getCondition(), *this);
-  if (!C || !isa<ConstantInt>(C)) {
-    // All destinations are executable!
-    Succs.assign(TI.getNumSuccessors(), true);
-    return;
-  }
-  SwitchInst::CaseHandle Case = *SI.findCaseValue(cast<ConstantInt>(C));
-  Succs[Case.getSuccessorIndex()] = true;
-}
-
-
-/// isEdgeFeasible - Return true if the control flow edge from the 'From'
-/// basic block to the 'To' basic block is currently feasible...
-bool SparseSolver::isEdgeFeasible(BasicBlock *From, BasicBlock *To,
-                                  bool AggressiveUndef) {
-  SmallVector<bool, 16> SuccFeasible;
-  TerminatorInst *TI = From->getTerminator();
-  getFeasibleSuccessors(*TI, SuccFeasible, AggressiveUndef);
-  
-  for (unsigned i = 0, e = TI->getNumSuccessors(); i != e; ++i)
-    if (TI->getSuccessor(i) == To && SuccFeasible[i])
-      return true;
-  
-  return false;
-}
-
-void SparseSolver::visitTerminatorInst(TerminatorInst &TI) {
-  SmallVector<bool, 16> SuccFeasible;
-  getFeasibleSuccessors(TI, SuccFeasible, true);
-  
-  BasicBlock *BB = TI.getParent();
-  
-  // Mark all feasible successors executable...
-  for (unsigned i = 0, e = SuccFeasible.size(); i != e; ++i)
-    if (SuccFeasible[i])
-      markEdgeExecutable(BB, TI.getSuccessor(i));
-}
-
-void SparseSolver::visitPHINode(PHINode &PN) {
-  // The lattice function may store more information on a PHINode than could be
-  // computed from its incoming values.  For example, SSI form stores its sigma
-  // functions as PHINodes with a single incoming value.
-  if (LatticeFunc->IsSpecialCasedPHI(&PN)) {
-    LatticeVal IV = LatticeFunc->ComputeInstructionState(PN, *this);
-    if (IV != LatticeFunc->getUntrackedVal())
-      UpdateState(PN, IV);
-    return;
-  }
-
-  LatticeVal PNIV = getOrInitValueState(&PN);
-  LatticeVal Overdefined = LatticeFunc->getOverdefinedVal();
-  
-  // If this value is already overdefined (common) just return.
-  if (PNIV == Overdefined || PNIV == LatticeFunc->getUntrackedVal())
-    return;  // Quick exit
-  
-  // Super-extra-high-degree PHI nodes are unlikely to ever be interesting,
-  // and slow us down a lot.  Just mark them overdefined.
-  if (PN.getNumIncomingValues() > 64) {
-    UpdateState(PN, Overdefined);
-    return;
-  }
-  
-  // Look at all of the executable operands of the PHI node.  If any of them
-  // are overdefined, the PHI becomes overdefined as well.  Otherwise, ask the
-  // transfer function to give us the merge of the incoming values.
-  for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) {
-    // If the edge is not yet known to be feasible, it doesn't impact the PHI.
-    if (!isEdgeFeasible(PN.getIncomingBlock(i), PN.getParent(), true))
-      continue;
-    
-    // Merge in this value.
-    LatticeVal OpVal = getOrInitValueState(PN.getIncomingValue(i));
-    if (OpVal != PNIV)
-      PNIV = LatticeFunc->MergeValues(PNIV, OpVal);
-    
-    if (PNIV == Overdefined)
-      break;  // Rest of input values don't matter.
-  }
-
-  // Update the PHI with the compute value, which is the merge of the inputs.
-  UpdateState(PN, PNIV);
-}
-
-
-void SparseSolver::visitInst(Instruction &I) {
-  // PHIs are handled by the propagation logic, they are never passed into the
-  // transfer functions.
-  if (PHINode *PN = dyn_cast<PHINode>(&I))
-    return visitPHINode(*PN);
-  
-  // Otherwise, ask the transfer function what the result is.  If this is
-  // something that we care about, remember it.
-  LatticeVal IV = LatticeFunc->ComputeInstructionState(I, *this);
-  if (IV != LatticeFunc->getUntrackedVal())
-    UpdateState(I, IV);
-  
-  if (TerminatorInst *TI = dyn_cast<TerminatorInst>(&I))
-    visitTerminatorInst(*TI);
-}
-
-void SparseSolver::Solve(Function &F) {
-  MarkBlockExecutable(&F.getEntryBlock());
-  
-  // Process the work lists until they are empty!
-  while (!BBWorkList.empty() || !InstWorkList.empty()) {
-    // Process the instruction work list.
-    while (!InstWorkList.empty()) {
-      Instruction *I = InstWorkList.back();
-      InstWorkList.pop_back();
-
-      DEBUG(dbgs() << "\nPopped off I-WL: " << *I << "\n");
-
-      // "I" got into the work list because it made a transition.  See if any
-      // users are both live and in need of updating.
-      for (User *U : I->users()) {
-        Instruction *UI = cast<Instruction>(U);
-        if (BBExecutable.count(UI->getParent()))   // Inst is executable?
-          visitInst(*UI);
-      }
-    }
-
-    // Process the basic block work list.
-    while (!BBWorkList.empty()) {
-      BasicBlock *BB = BBWorkList.back();
-      BBWorkList.pop_back();
-
-      DEBUG(dbgs() << "\nPopped off BBWL: " << *BB);
-
-      // Notify all instructions in this basic block that they are newly
-      // executable.
-      for (Instruction &I : *BB)
-        visitInst(I);
-    }
-  }
-}
-
-void SparseSolver::Print(Function &F, raw_ostream &OS) const {
-  OS << "\nFUNCTION: " << F.getName() << "\n";
-  for (auto &BB : F) {
-    if (!BBExecutable.count(&BB))
-      OS << "INFEASIBLE: ";
-    OS << "\t";
-    if (BB.hasName())
-      OS << BB.getName() << ":\n";
-    else
-      OS << "; anon bb\n";
-    for (auto &I : BB) {
-      LatticeFunc->PrintValue(getLatticeState(&I), OS);
-      OS << I << "\n";
-    }
-    
-    OS << "\n";
-  }
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp b/external/bsd/llvm/dist/llvm/lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp
deleted file mode 100644
index 9c324ea26ac8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp
+++ /dev/null
@@ -1,287 +0,0 @@
-//=-- llvm/CodeGen/DwarfAccelTable.cpp - Dwarf Accelerator Tables -*- C++ -*-=//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains support for writing dwarf accelerator tables.
-//
-//===----------------------------------------------------------------------===//
-
-#include "DwarfAccelTable.h"
-#include "DwarfCompileUnit.h"
-#include "DwarfDebug.h"
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/ADT/Twine.h"
-#include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/CodeGen/DIE.h"
-#include "llvm/MC/MCExpr.h"
-#include "llvm/MC/MCStreamer.h"
-#include "llvm/MC/MCSymbol.h"
-#include "llvm/Support/Debug.h"
-
-using namespace llvm;
-
-// The length of the header data is always going to be 4 + 4 + 4*NumAtoms.
-DwarfAccelTable::DwarfAccelTable(ArrayRef<DwarfAccelTable::Atom> atomList)
-    : Header(8 + (atomList.size() * 4)), HeaderData(atomList),
-      Entries(Allocator) {}
-
-void DwarfAccelTable::AddName(DwarfStringPoolEntryRef Name, const DIE *die,
-                              char Flags) {
-  assert(Data.empty() && "Already finalized!");
-  // If the string is in the list already then add this die to the list
-  // otherwise add a new one.
-  DataArray &DIEs = Entries[Name.getString()];
-  assert(!DIEs.Name || DIEs.Name == Name);
-  DIEs.Name = Name;
-  DIEs.Values.push_back(new (Allocator) HashDataContents(die, Flags));
-}
-
-void DwarfAccelTable::ComputeBucketCount() {
-  // First get the number of unique hashes.
-  std::vector<uint32_t> uniques(Data.size());
-  for (size_t i = 0, e = Data.size(); i < e; ++i)
-    uniques[i] = Data[i]->HashValue;
-  array_pod_sort(uniques.begin(), uniques.end());
-  std::vector<uint32_t>::iterator p =
-      std::unique(uniques.begin(), uniques.end());
-  uint32_t num = std::distance(uniques.begin(), p);
-
-  // Then compute the bucket size, minimum of 1 bucket.
-  if (num > 1024)
-    Header.bucket_count = num / 4;
-  else if (num > 16)
-    Header.bucket_count = num / 2;
-  else
-    Header.bucket_count = num > 0 ? num : 1;
-
-  Header.hashes_count = num;
-}
-
-// compareDIEs - comparison predicate that sorts DIEs by their offset.
-static bool compareDIEs(const DwarfAccelTable::HashDataContents *A,
-                        const DwarfAccelTable::HashDataContents *B) {
-  return A->Die->getOffset() < B->Die->getOffset();
-}
-
-void DwarfAccelTable::FinalizeTable(AsmPrinter *Asm, StringRef Prefix) {
-  // Create the individual hash data outputs.
-  Data.reserve(Entries.size());
-  for (StringMap<DataArray>::iterator EI = Entries.begin(), EE = Entries.end();
-       EI != EE; ++EI) {
-
-    // Unique the entries.
-    std::stable_sort(EI->second.Values.begin(), EI->second.Values.end(), compareDIEs);
-    EI->second.Values.erase(
-        std::unique(EI->second.Values.begin(), EI->second.Values.end()),
-        EI->second.Values.end());
-
-    HashData *Entry = new (Allocator) HashData(EI->getKey(), EI->second);
-    Data.push_back(Entry);
-  }
-
-  // Figure out how many buckets we need, then compute the bucket
-  // contents and the final ordering. We'll emit the hashes and offsets
-  // by doing a walk during the emission phase. We add temporary
-  // symbols to the data so that we can reference them during the offset
-  // later, we'll emit them when we emit the data.
-  ComputeBucketCount();
-
-  // Compute bucket contents and final ordering.
-  Buckets.resize(Header.bucket_count);
-  for (size_t i = 0, e = Data.size(); i < e; ++i) {
-    uint32_t bucket = Data[i]->HashValue % Header.bucket_count;
-    Buckets[bucket].push_back(Data[i]);
-    Data[i]->Sym = Asm->createTempSymbol(Prefix);
-  }
-
-  // Sort the contents of the buckets by hash value so that hash
-  // collisions end up together. Stable sort makes testing easier and
-  // doesn't cost much more.
-  for (size_t i = 0; i < Buckets.size(); ++i)
-    std::stable_sort(Buckets[i].begin(), Buckets[i].end(),
-                     [] (HashData *LHS, HashData *RHS) {
-                       return LHS->HashValue < RHS->HashValue;
-                     });
-}
-
-// Emits the header for the table via the AsmPrinter.
-void DwarfAccelTable::EmitHeader(AsmPrinter *Asm) {
-  Asm->OutStreamer->AddComment("Header Magic");
-  Asm->EmitInt32(Header.magic);
-  Asm->OutStreamer->AddComment("Header Version");
-  Asm->EmitInt16(Header.version);
-  Asm->OutStreamer->AddComment("Header Hash Function");
-  Asm->EmitInt16(Header.hash_function);
-  Asm->OutStreamer->AddComment("Header Bucket Count");
-  Asm->EmitInt32(Header.bucket_count);
-  Asm->OutStreamer->AddComment("Header Hash Count");
-  Asm->EmitInt32(Header.hashes_count);
-  Asm->OutStreamer->AddComment("Header Data Length");
-  Asm->EmitInt32(Header.header_data_len);
-  Asm->OutStreamer->AddComment("HeaderData Die Offset Base");
-  Asm->EmitInt32(HeaderData.die_offset_base);
-  Asm->OutStreamer->AddComment("HeaderData Atom Count");
-  Asm->EmitInt32(HeaderData.Atoms.size());
-  for (size_t i = 0; i < HeaderData.Atoms.size(); i++) {
-    Atom A = HeaderData.Atoms[i];
-    Asm->OutStreamer->AddComment(dwarf::AtomTypeString(A.type));
-    Asm->EmitInt16(A.type);
-    Asm->OutStreamer->AddComment(dwarf::FormEncodingString(A.form));
-    Asm->EmitInt16(A.form);
-  }
-}
-
-// Walk through and emit the buckets for the table. Each index is
-// an offset into the list of hashes.
-void DwarfAccelTable::EmitBuckets(AsmPrinter *Asm) {
-  unsigned index = 0;
-  for (size_t i = 0, e = Buckets.size(); i < e; ++i) {
-    Asm->OutStreamer->AddComment("Bucket " + Twine(i));
-    if (Buckets[i].size() != 0)
-      Asm->EmitInt32(index);
-    else
-      Asm->EmitInt32(UINT32_MAX);
-    // Buckets point in the list of hashes, not to the data. Do not
-    // increment the index multiple times in case of hash collisions.
-    uint64_t PrevHash = UINT64_MAX;
-    for (auto *HD : Buckets[i]) {
-      uint32_t HashValue = HD->HashValue;
-      if (PrevHash != HashValue)
-        ++index;
-      PrevHash = HashValue;
-    }
-  }
-}
-
-// Walk through the buckets and emit the individual hashes for each
-// bucket.
-void DwarfAccelTable::EmitHashes(AsmPrinter *Asm) {
-  uint64_t PrevHash = UINT64_MAX;
-  for (size_t i = 0, e = Buckets.size(); i < e; ++i) {
-    for (HashList::const_iterator HI = Buckets[i].begin(),
-                                  HE = Buckets[i].end();
-         HI != HE; ++HI) {
-      uint32_t HashValue = (*HI)->HashValue;
-      if (PrevHash == HashValue)
-        continue;
-      Asm->OutStreamer->AddComment("Hash in Bucket " + Twine(i));
-      Asm->EmitInt32(HashValue);
-      PrevHash = HashValue;
-    }
-  }
-}
-
-// Walk through the buckets and emit the individual offsets for each
-// element in each bucket. This is done via a symbol subtraction from the
-// beginning of the section. The non-section symbol will be output later
-// when we emit the actual data.
-void DwarfAccelTable::emitOffsets(AsmPrinter *Asm, const MCSymbol *SecBegin) {
-  uint64_t PrevHash = UINT64_MAX;
-  for (size_t i = 0, e = Buckets.size(); i < e; ++i) {
-    for (HashList::const_iterator HI = Buckets[i].begin(),
-                                  HE = Buckets[i].end();
-         HI != HE; ++HI) {
-      uint32_t HashValue = (*HI)->HashValue;
-      if (PrevHash == HashValue)
-        continue;
-      PrevHash = HashValue;
-      Asm->OutStreamer->AddComment("Offset in Bucket " + Twine(i));
-      MCContext &Context = Asm->OutStreamer->getContext();
-      const MCExpr *Sub = MCBinaryExpr::createSub(
-          MCSymbolRefExpr::create((*HI)->Sym, Context),
-          MCSymbolRefExpr::create(SecBegin, Context), Context);
-      Asm->OutStreamer->EmitValue(Sub, sizeof(uint32_t));
-    }
-  }
-}
-
-// Walk through the buckets and emit the full data for each element in
-// the bucket. For the string case emit the dies and the various offsets.
-// Terminate each HashData bucket with 0.
-void DwarfAccelTable::EmitData(AsmPrinter *Asm, DwarfDebug *D) {
-  for (size_t i = 0, e = Buckets.size(); i < e; ++i) {
-    uint64_t PrevHash = UINT64_MAX;
-    for (HashList::const_iterator HI = Buckets[i].begin(),
-                                  HE = Buckets[i].end();
-         HI != HE; ++HI) {
-      // Terminate the previous entry if there is no hash collision
-      // with the current one.
-      if (PrevHash != UINT64_MAX && PrevHash != (*HI)->HashValue)
-        Asm->EmitInt32(0);
-      // Remember to emit the label for our offset.
-      Asm->OutStreamer->EmitLabel((*HI)->Sym);
-      Asm->OutStreamer->AddComment((*HI)->Str);
-      Asm->emitDwarfStringOffset((*HI)->Data.Name);
-      Asm->OutStreamer->AddComment("Num DIEs");
-      Asm->EmitInt32((*HI)->Data.Values.size());
-      for (HashDataContents *HD : (*HI)->Data.Values) {
-        // Emit the DIE offset
-        Asm->EmitInt32(HD->Die->getDebugSectionOffset());
-        // If we have multiple Atoms emit that info too.
-        // FIXME: A bit of a hack, we either emit only one atom or all info.
-        if (HeaderData.Atoms.size() > 1) {
-          Asm->EmitInt16(HD->Die->getTag());
-          Asm->EmitInt8(HD->Flags);
-        }
-      }
-      PrevHash = (*HI)->HashValue;
-    }
-    // Emit the final end marker for the bucket.
-    if (!Buckets[i].empty())
-      Asm->EmitInt32(0);
-  }
-}
-
-// Emit the entire data structure to the output file.
-void DwarfAccelTable::emit(AsmPrinter *Asm, const MCSymbol *SecBegin,
-                           DwarfDebug *D) {
-  // Emit the header.
-  EmitHeader(Asm);
-
-  // Emit the buckets.
-  EmitBuckets(Asm);
-
-  // Emit the hashes.
-  EmitHashes(Asm);
-
-  // Emit the offsets.
-  emitOffsets(Asm, SecBegin);
-
-  // Emit the hash data.
-  EmitData(Asm, D);
-}
-
-#ifndef NDEBUG
-void DwarfAccelTable::print(raw_ostream &O) {
-
-  Header.print(O);
-  HeaderData.print(O);
-
-  O << "Entries: \n";
-  for (StringMap<DataArray>::const_iterator EI = Entries.begin(),
-                                            EE = Entries.end();
-       EI != EE; ++EI) {
-    O << "Name: " << EI->getKeyData() << "\n";
-    for (HashDataContents *HD : EI->second.Values)
-      HD->print(O);
-  }
-
-  O << "Buckets and Hashes: \n";
-  for (size_t i = 0, e = Buckets.size(); i < e; ++i)
-    for (HashList::const_iterator HI = Buckets[i].begin(),
-                                  HE = Buckets[i].end();
-         HI != HE; ++HI)
-      (*HI)->print(O);
-
-  O << "Data: \n";
-  for (std::vector<HashData *>::const_iterator DI = Data.begin(),
-                                               DE = Data.end();
-       DI != DE; ++DI)
-    (*DI)->print(O);
-}
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/CodeGen/AsmPrinter/DwarfAccelTable.h b/external/bsd/llvm/dist/llvm/lib/CodeGen/AsmPrinter/DwarfAccelTable.h
deleted file mode 100644
index b1ef8cfe989d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/CodeGen/AsmPrinter/DwarfAccelTable.h
+++ /dev/null
@@ -1,255 +0,0 @@
-//==-- llvm/CodeGen/DwarfAccelTable.h - Dwarf Accelerator Tables -*- C++ -*-==//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains support for writing dwarf accelerator tables.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFACCELTABLE_H
-#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFACCELTABLE_H
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/StringMap.h"
-#include "llvm/BinaryFormat/Dwarf.h"
-#include "llvm/CodeGen/DIE.h"
-#include "llvm/MC/MCSymbol.h"
-#include "llvm/Support/Compiler.h"
-#include "llvm/Support/DataTypes.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/Format.h"
-#include "llvm/Support/FormattedStream.h"
-#include <vector>
-
-// The dwarf accelerator tables are an indirect hash table optimized
-// for null lookup rather than access to known data. They are output into
-// an on-disk format that looks like this:
-//
-// .-------------.
-// |  HEADER     |
-// |-------------|
-// |  BUCKETS    |
-// |-------------|
-// |  HASHES     |
-// |-------------|
-// |  OFFSETS    |
-// |-------------|
-// |  DATA       |
-// `-------------'
-//
-// where the header contains a magic number, version, type of hash function,
-// the number of buckets, total number of hashes, and room for a special
-// struct of data and the length of that struct.
-//
-// The buckets contain an index (e.g. 6) into the hashes array. The hashes
-// section contains all of the 32-bit hash values in contiguous memory, and
-// the offsets contain the offset into the data area for the particular
-// hash.
-//
-// For a lookup example, we could hash a function name and take it modulo the
-// number of buckets giving us our bucket. From there we take the bucket value
-// as an index into the hashes table and look at each successive hash as long
-// as the hash value is still the same modulo result (bucket value) as earlier.
-// If we have a match we look at that same entry in the offsets table and
-// grab the offset in the data for our final match.
-
-namespace llvm {
-
-class AsmPrinter;
-class DwarfDebug;
-
-class DwarfAccelTable {
-
-  static uint32_t HashDJB(StringRef Str) {
-    uint32_t h = 5381;
-    for (unsigned i = 0, e = Str.size(); i != e; ++i)
-      h = ((h << 5) + h) + Str[i];
-    return h;
-  }
-
-  // Helper function to compute the number of buckets needed based on
-  // the number of unique hashes.
-  void ComputeBucketCount(void);
-
-  struct TableHeader {
-    uint32_t magic;           // 'HASH' magic value to allow endian detection
-    uint16_t version;         // Version number.
-    uint16_t hash_function;   // The hash function enumeration that was used.
-    uint32_t bucket_count;    // The number of buckets in this hash table.
-    uint32_t hashes_count;    // The total number of unique hash values
-                              // and hash data offsets in this table.
-    uint32_t header_data_len; // The bytes to skip to get to the hash
-                              // indexes (buckets) for correct alignment.
-    // Also written to disk is the implementation specific header data.
-
-    static const uint32_t MagicHash = 0x48415348;
-
-    TableHeader(uint32_t data_len)
-        : magic(MagicHash), version(1),
-          hash_function(dwarf::DW_hash_function_djb), bucket_count(0),
-          hashes_count(0), header_data_len(data_len) {}
-
-#ifndef NDEBUG
-    void print(raw_ostream &O) {
-      O << "Magic: " << format("0x%x", magic) << "\n"
-        << "Version: " << version << "\n"
-        << "Hash Function: " << hash_function << "\n"
-        << "Bucket Count: " << bucket_count << "\n"
-        << "Header Data Length: " << header_data_len << "\n";
-    }
-    void dump() { print(dbgs()); }
-#endif
-  };
-
-public:
-  // The HeaderData describes the form of each set of data. In general this
-  // is as a list of atoms (atom_count) where each atom contains a type
-  // (AtomType type) of data, and an encoding form (form). In the case of
-  // data that is referenced via DW_FORM_ref_* the die_offset_base is
-  // used to describe the offset for all forms in the list of atoms.
-  // This also serves as a public interface of sorts.
-  // When written to disk this will have the form:
-  //
-  // uint32_t die_offset_base
-  // uint32_t atom_count
-  // atom_count Atoms
-
-  // Make these public so that they can be used as a general interface to
-  // the class.
-  struct Atom {
-    uint16_t type; // enum AtomType
-    uint16_t form; // DWARF DW_FORM_ defines
-
-    constexpr Atom(uint16_t type, uint16_t form) : type(type), form(form) {}
-#ifndef NDEBUG
-    void print(raw_ostream &O) {
-      O << "Type: " << dwarf::AtomTypeString(type) << "\n"
-        << "Form: " << dwarf::FormEncodingString(form) << "\n";
-    }
-    void dump() { print(dbgs()); }
-#endif
-  };
-
-private:
-  struct TableHeaderData {
-    uint32_t die_offset_base;
-    SmallVector<Atom, 3> Atoms;
-
-    TableHeaderData(ArrayRef<Atom> AtomList, uint32_t offset = 0)
-        : die_offset_base(offset), Atoms(AtomList.begin(), AtomList.end()) {}
-
-#ifndef NDEBUG
-    void print(raw_ostream &O) {
-      O << "die_offset_base: " << die_offset_base << "\n";
-      for (size_t i = 0; i < Atoms.size(); i++)
-        Atoms[i].print(O);
-    }
-    void dump() { print(dbgs()); }
-#endif
-  };
-
-  // The data itself consists of a str_offset, a count of the DIEs in the
-  // hash and the offsets to the DIEs themselves.
-  // On disk each data section is ended with a 0 KeyType as the end of the
-  // hash chain.
-  // On output this looks like:
-  // uint32_t str_offset
-  // uint32_t hash_data_count
-  // HashData[hash_data_count]
-public:
-  struct HashDataContents {
-    const DIE *Die;   // Offsets
-    char Flags; // Specific flags to output
-
-    HashDataContents(const DIE *D, char Flags) : Die(D), Flags(Flags) {}
-#ifndef NDEBUG
-    void print(raw_ostream &O) const {
-      O << "  Offset: " << Die->getOffset() << "\n";
-      O << "  Tag: " << dwarf::TagString(Die->getTag()) << "\n";
-      O << "  Flags: " << Flags << "\n";
-    }
-#endif
-  };
-
-private:
-  // String Data
-  struct DataArray {
-    DwarfStringPoolEntryRef Name;
-    std::vector<HashDataContents *> Values;
-  };
-  friend struct HashData;
-  struct HashData {
-    StringRef Str;
-    uint32_t HashValue;
-    MCSymbol *Sym;
-    DwarfAccelTable::DataArray &Data; // offsets
-    HashData(StringRef S, DwarfAccelTable::DataArray &Data)
-        : Str(S), Data(Data) {
-      HashValue = DwarfAccelTable::HashDJB(S);
-    }
-#ifndef NDEBUG
-    void print(raw_ostream &O) {
-      O << "Name: " << Str << "\n";
-      O << "  Hash Value: " << format("0x%x", HashValue) << "\n";
-      O << "  Symbol: ";
-      if (Sym)
-        O << *Sym;
-      else
-        O << "<none>";
-      O << "\n";
-      for (HashDataContents *C : Data.Values) {
-        O << "  Offset: " << C->Die->getOffset() << "\n";
-        O << "  Tag: " << dwarf::TagString(C->Die->getTag()) << "\n";
-        O << "  Flags: " << C->Flags << "\n";
-      }
-    }
-    void dump() { print(dbgs()); }
-#endif
-  };
-
-  DwarfAccelTable(const DwarfAccelTable &) = delete;
-  void operator=(const DwarfAccelTable &) = delete;
-
-  // Internal Functions
-  void EmitHeader(AsmPrinter *);
-  void EmitBuckets(AsmPrinter *);
-  void EmitHashes(AsmPrinter *);
-  void emitOffsets(AsmPrinter *, const MCSymbol *);
-  void EmitData(AsmPrinter *, DwarfDebug *D);
-
-  // Allocator for HashData and HashDataContents.
-  BumpPtrAllocator Allocator;
-
-  // Output Variables
-  TableHeader Header;
-  TableHeaderData HeaderData;
-  std::vector<HashData *> Data;
-
-  typedef StringMap<DataArray, BumpPtrAllocator &> StringEntries;
-  StringEntries Entries;
-
-  // Buckets/Hashes/Offsets
-  typedef std::vector<HashData *> HashList;
-  typedef std::vector<HashList> BucketList;
-  BucketList Buckets;
-  HashList Hashes;
-
-  // Public Implementation
-public:
-  DwarfAccelTable(ArrayRef<DwarfAccelTable::Atom>);
-  void AddName(DwarfStringPoolEntryRef Name, const DIE *Die, char Flags = 0);
-  void FinalizeTable(AsmPrinter *, StringRef);
-  void emit(AsmPrinter *, const MCSymbol *, DwarfDebug *);
-#ifndef NDEBUG
-  void print(raw_ostream &O);
-  void dump() { print(dbgs()); }
-#endif
-};
-}
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/CodeGen/BranchCoalescing.cpp b/external/bsd/llvm/dist/llvm/lib/CodeGen/BranchCoalescing.cpp
deleted file mode 100644
index 2c41b597843c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/CodeGen/BranchCoalescing.cpp
+++ /dev/null
@@ -1,758 +0,0 @@
-//===-- CoalesceBranches.cpp - Coalesce blocks with the same condition ---===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-///
-/// \file
-/// Coalesce basic blocks guarded by the same branch condition into a single
-/// basic block.
-///
-//===----------------------------------------------------------------------===//
-
-#include "llvm/ADT/BitVector.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/MachineDominators.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachinePostDominators.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Target/TargetFrameLowering.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-
-using namespace llvm;
-
-#define DEBUG_TYPE "branch-coalescing"
-
-static cl::opt<cl::boolOrDefault>
-    EnableBranchCoalescing("enable-branch-coalesce", cl::Hidden,
-                           cl::desc("enable coalescing of duplicate branches"));
-
-STATISTIC(NumBlocksCoalesced, "Number of blocks coalesced");
-STATISTIC(NumPHINotMoved, "Number of PHI Nodes that cannot be merged");
-STATISTIC(NumBlocksNotCoalesced, "Number of blocks not coalesced");
-
-//===----------------------------------------------------------------------===//
-//                               BranchCoalescing
-//===----------------------------------------------------------------------===//
-///
-/// Improve scheduling by coalescing branches that depend on the same condition.
-/// This pass looks for blocks that are guarded by the same branch condition
-/// and attempts to merge the blocks together. Such opportunities arise from
-/// the expansion of select statements in the IR.
-///
-/// For example, consider the following LLVM IR:
-///
-/// %test = icmp eq i32 %x 0
-/// %tmp1 = select i1 %test, double %a, double 2.000000e-03
-/// %tmp2 = select i1 %test, double %b, double 5.000000e-03
-///
-/// This IR expands to the following machine code on PowerPC:
-///
-/// BB#0: derived from LLVM BB %entry
-///    Live Ins: %F1 %F3 %X6
-///        <SNIP1>
-///        %vreg0<def> = COPY %F1; F8RC:%vreg0
-///        %vreg5<def> = CMPLWI %vreg4<kill>, 0; CRRC:%vreg5 GPRC:%vreg4
-///        %vreg8<def> = LXSDX %ZERO8, %vreg7<kill>, %RM<imp-use>;
-///                    mem:LD8[ConstantPool] F8RC:%vreg8 G8RC:%vreg7
-///        BCC 76, %vreg5, <BB#2>; CRRC:%vreg5
-///    Successors according to CFG: BB#1(?%) BB#2(?%)
-///
-/// BB#1: derived from LLVM BB %entry
-///    Predecessors according to CFG: BB#0
-///    Successors according to CFG: BB#2(?%)
-///
-/// BB#2: derived from LLVM BB %entry
-///    Predecessors according to CFG: BB#0 BB#1
-///        %vreg9<def> = PHI %vreg8, <BB#1>, %vreg0, <BB#0>;
-///                    F8RC:%vreg9,%vreg8,%vreg0
-///        <SNIP2>
-///        BCC 76, %vreg5, <BB#4>; CRRC:%vreg5
-///    Successors according to CFG: BB#3(?%) BB#4(?%)
-///
-/// BB#3: derived from LLVM BB %entry
-///    Predecessors according to CFG: BB#2
-///    Successors according to CFG: BB#4(?%)
-///
-/// BB#4: derived from LLVM BB %entry
-///    Predecessors according to CFG: BB#2 BB#3
-///        %vreg13<def> = PHI %vreg12, <BB#3>, %vreg2, <BB#2>;
-///                     F8RC:%vreg13,%vreg12,%vreg2
-///        <SNIP3>
-///        BLR8 %LR8<imp-use>, %RM<imp-use>, %F1<imp-use>
-///
-/// When this pattern is detected, branch coalescing will try to collapse
-/// it by moving code in BB#2 to BB#0 and/or BB#4 and removing BB#3.
-///
-/// If all conditions are meet, IR should collapse to:
-///
-/// BB#0: derived from LLVM BB %entry
-///    Live Ins: %F1 %F3 %X6
-///        <SNIP1>
-///        %vreg0<def> = COPY %F1; F8RC:%vreg0
-///        %vreg5<def> = CMPLWI %vreg4<kill>, 0; CRRC:%vreg5 GPRC:%vreg4
-///        %vreg8<def> = LXSDX %ZERO8, %vreg7<kill>, %RM<imp-use>;
-///                     mem:LD8[ConstantPool] F8RC:%vreg8 G8RC:%vreg7
-///        <SNIP2>
-///        BCC 76, %vreg5, <BB#4>; CRRC:%vreg5
-///    Successors according to CFG: BB#1(0x2aaaaaaa / 0x80000000 = 33.33%)
-///      BB#4(0x55555554 / 0x80000000 = 66.67%)
-///
-/// BB#1: derived from LLVM BB %entry
-///    Predecessors according to CFG: BB#0
-///    Successors according to CFG: BB#4(0x40000000 / 0x80000000 = 50.00%)
-///
-/// BB#4: derived from LLVM BB %entry
-///    Predecessors according to CFG: BB#0 BB#1
-///        %vreg9<def> = PHI %vreg8, <BB#1>, %vreg0, <BB#0>;
-///                    F8RC:%vreg9,%vreg8,%vreg0
-///        %vreg13<def> = PHI %vreg12, <BB#1>, %vreg2, <BB#0>;
-///                     F8RC:%vreg13,%vreg12,%vreg2
-///        <SNIP3>
-///        BLR8 %LR8<imp-use>, %RM<imp-use>, %F1<imp-use>
-///
-/// Branch Coalescing does not split blocks, it moves everything in the same
-/// direction ensuring it does not break use/definition semantics.
-///
-/// PHI nodes and its corresponding use instructions are moved to its successor
-/// block if there are no uses within the successor block PHI nodes.  PHI
-/// node ordering cannot be assumed.
-///
-/// Non-PHI can be moved up to the predecessor basic block or down to the
-/// successor basic block following any PHI instructions. Whether it moves
-/// up or down depends on whether the register(s) defined in the instructions
-/// are used in current block or in any PHI instructions at the beginning of
-/// the successor block.
-
-namespace {
-
-class BranchCoalescing : public MachineFunctionPass {
-  struct CoalescingCandidateInfo {
-    MachineBasicBlock *BranchBlock;       // Block containing the branch
-    MachineBasicBlock *BranchTargetBlock; // Block branched to
-    MachineBasicBlock *FallThroughBlock;  // Fall-through if branch not taken
-    SmallVector<MachineOperand, 4> Cond;
-    bool MustMoveDown;
-    bool MustMoveUp;
-
-    CoalescingCandidateInfo();
-    void clear();
-  };
-
-  MachineDominatorTree *MDT;
-  MachinePostDominatorTree *MPDT;
-  const TargetInstrInfo *TII;
-  MachineRegisterInfo *MRI;
-
-  void initialize(MachineFunction &F);
-  bool canCoalesceBranch(CoalescingCandidateInfo &Cand);
-  bool identicalOperands(ArrayRef<MachineOperand> OperandList1,
-                         ArrayRef<MachineOperand> OperandList2) const;
-  bool validateCandidates(CoalescingCandidateInfo &SourceRegion,
-                          CoalescingCandidateInfo &TargetRegion) const;
-
-  static bool isBranchCoalescingEnabled() {
-    return EnableBranchCoalescing == cl::BOU_TRUE;
-  }
-
-public:
-  static char ID;
-
-  BranchCoalescing() : MachineFunctionPass(ID) {
-    initializeBranchCoalescingPass(*PassRegistry::getPassRegistry());
-  }
-
-  void getAnalysisUsage(AnalysisUsage &AU) const override {
-    AU.addRequired<MachineDominatorTree>();
-    AU.addRequired<MachinePostDominatorTree>();
-    MachineFunctionPass::getAnalysisUsage(AU);
-  }
-
-  StringRef getPassName() const override { return "Branch Coalescing"; }
-
-  bool mergeCandidates(CoalescingCandidateInfo &SourceRegion,
-                       CoalescingCandidateInfo &TargetRegion);
-  bool canMoveToBeginning(const MachineInstr &MI,
-                          const MachineBasicBlock &MBB) const;
-  bool canMoveToEnd(const MachineInstr &MI,
-                    const MachineBasicBlock &MBB) const;
-  bool canMerge(CoalescingCandidateInfo &SourceRegion,
-                CoalescingCandidateInfo &TargetRegion) const;
-  void moveAndUpdatePHIs(MachineBasicBlock *SourceRegionMBB,
-                         MachineBasicBlock *TargetRegionMBB);
-  bool runOnMachineFunction(MachineFunction &MF) override;
-};
-} // End anonymous namespace.
-
-char BranchCoalescing::ID = 0;
-char &llvm::BranchCoalescingID = BranchCoalescing::ID;
-
-INITIALIZE_PASS_BEGIN(BranchCoalescing, DEBUG_TYPE,
-                      "Branch Coalescing", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
-INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
-INITIALIZE_PASS_END(BranchCoalescing, DEBUG_TYPE, "Branch Coalescing",
-                    false, false)
-
-BranchCoalescing::CoalescingCandidateInfo::CoalescingCandidateInfo()
-    : BranchBlock(nullptr), BranchTargetBlock(nullptr),
-      FallThroughBlock(nullptr), MustMoveDown(false), MustMoveUp(false) {}
-
-void BranchCoalescing::CoalescingCandidateInfo::clear() {
-  BranchBlock = nullptr;
-  BranchTargetBlock = nullptr;
-  FallThroughBlock = nullptr;
-  Cond.clear();
-  MustMoveDown = false;
-  MustMoveUp = false;
-}
-
-void BranchCoalescing::initialize(MachineFunction &MF) {
-  MDT = &getAnalysis<MachineDominatorTree>();
-  MPDT = &getAnalysis<MachinePostDominatorTree>();
-  TII = MF.getSubtarget().getInstrInfo();
-  MRI = &MF.getRegInfo();
-}
-
-///
-/// Analyze the branch statement to determine if it can be coalesced. This
-/// method analyses the branch statement for the given candidate to determine
-/// if it can be coalesced. If the branch can be coalesced, then the
-/// BranchTargetBlock and the FallThroughBlock are recorded in the specified
-/// Candidate.
-///
-///\param[in,out] Cand The coalescing candidate to analyze
-///\return true if and only if the branch can be coalesced, false otherwise
-///
-bool BranchCoalescing::canCoalesceBranch(CoalescingCandidateInfo &Cand) {
-  DEBUG(dbgs() << "Determine if branch block " << Cand.BranchBlock->getNumber()
-               << " can be coalesced:");
-  MachineBasicBlock *FalseMBB = nullptr;
-
-  if (TII->analyzeBranch(*Cand.BranchBlock, Cand.BranchTargetBlock, FalseMBB,
-                         Cand.Cond)) {
-    DEBUG(dbgs() << "TII unable to Analyze Branch - skip\n");
-    return false;
-  }
-
-  for (auto &I : Cand.BranchBlock->terminators()) {
-    DEBUG(dbgs() << "Looking at terminator : " << I << "\n");
-    if (!I.isBranch())
-      continue;
-
-    if (I.getNumOperands() != I.getNumExplicitOperands()) {
-      DEBUG(dbgs() << "Terminator contains implicit operands - skip : " << I
-                   << "\n");
-      return false;
-    }
-  }
-
-  if (Cand.BranchBlock->isEHPad() || Cand.BranchBlock->hasEHPadSuccessor()) {
-    DEBUG(dbgs() << "EH Pad - skip\n");
-    return false;
-  }
-
-  // For now only consider triangles (i.e, BranchTargetBlock is set,
-  // FalseMBB is null, and BranchTargetBlock is a successor to BranchBlock)
-  if (!Cand.BranchTargetBlock || FalseMBB ||
-      !Cand.BranchBlock->isSuccessor(Cand.BranchTargetBlock)) {
-    DEBUG(dbgs() << "Does not form a triangle - skip\n");
-    return false;
-  }
-
-  // Ensure there are only two successors
-  if (Cand.BranchBlock->succ_size() != 2) {
-    DEBUG(dbgs() << "Does not have 2 successors - skip\n");
-    return false;
-  }
-
-  // Sanity check - the block must be able to fall through
-  assert(Cand.BranchBlock->canFallThrough() &&
-         "Expecting the block to fall through!");
-
-  // We have already ensured there are exactly two successors to
-  // BranchBlock and that BranchTargetBlock is a successor to BranchBlock.
-  // Ensure the single fall though block is empty.
-  MachineBasicBlock *Succ =
-    (*Cand.BranchBlock->succ_begin() == Cand.BranchTargetBlock)
-    ? *Cand.BranchBlock->succ_rbegin()
-    : *Cand.BranchBlock->succ_begin();
-
-  assert(Succ && "Expecting a valid fall-through block\n");
-
-  if (!Succ->empty()) {
-      DEBUG(dbgs() << "Fall-through block contains code -- skip\n");
-      return false;
-  }
-
-  if (!Succ->isSuccessor(Cand.BranchTargetBlock)) {
-      DEBUG(dbgs()
-            << "Successor of fall through block is not branch taken block\n");
-      return false;
-  }
-
-  Cand.FallThroughBlock = Succ;
-  DEBUG(dbgs() << "Valid Candidate\n");
-  return true;
-}
-
-///
-/// Determine if the two operand lists are identical
-///
-/// \param[in] OpList1 operand list
-/// \param[in] OpList2 operand list
-/// \return true if and only if the operands lists are identical
-///
-bool BranchCoalescing::identicalOperands(
-    ArrayRef<MachineOperand> OpList1, ArrayRef<MachineOperand> OpList2) const {
-
-  if (OpList1.size() != OpList2.size()) {
-    DEBUG(dbgs() << "Operand list is different size\n");
-    return false;
-  }
-
-  for (unsigned i = 0; i < OpList1.size(); ++i) {
-    const MachineOperand &Op1 = OpList1[i];
-    const MachineOperand &Op2 = OpList2[i];
-
-    DEBUG(dbgs() << "Op1: " << Op1 << "\n"
-                 << "Op2: " << Op2 << "\n");
-
-    if (Op1.isIdenticalTo(Op2)) {
-      DEBUG(dbgs() << "Op1 and Op2 are identical!\n");
-      continue;
-    }
-
-    // If the operands are not identical, but are registers, check to see if the
-    // definition of the register produces the same value. If they produce the
-    // same value, consider them to be identical.
-    if (Op1.isReg() && Op2.isReg() &&
-        TargetRegisterInfo::isVirtualRegister(Op1.getReg()) &&
-        TargetRegisterInfo::isVirtualRegister(Op2.getReg())) {
-      MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg());
-      MachineInstr *Op2Def = MRI->getVRegDef(Op2.getReg());
-      if (TII->produceSameValue(*Op1Def, *Op2Def, MRI)) {
-        DEBUG(dbgs() << "Op1Def: " << *Op1Def << " and " << *Op2Def
-                     << " produce the same value!\n");
-      } else {
-        DEBUG(dbgs() << "Operands produce different values\n");
-        return false;
-      }
-    } else {
-      DEBUG(dbgs() << "The operands are not provably identical.\n");
-      return false;
-    }
-  }
-  return true;
-}
-
-///
-/// Moves ALL PHI instructions in SourceMBB to beginning of TargetMBB
-/// and update them to refer to the new block.  PHI node ordering
-/// cannot be assumed so it does not matter where the PHI instructions
-/// are moved to in TargetMBB.
-///
-/// \param[in] SourceMBB block to move PHI instructions from
-/// \param[in] TargetMBB block to move PHI instructions to
-///
-void BranchCoalescing::moveAndUpdatePHIs(MachineBasicBlock *SourceMBB,
-                                         MachineBasicBlock *TargetMBB) {
-
-  MachineBasicBlock::iterator MI = SourceMBB->begin();
-  MachineBasicBlock::iterator ME = SourceMBB->getFirstNonPHI();
-
-  if (MI == ME) {
-    DEBUG(dbgs() << "SourceMBB contains no PHI instructions.\n");
-    return;
-  }
-
-  // Update all PHI instructions in SourceMBB and move to top of TargetMBB
-  for (MachineBasicBlock::iterator Iter = MI; Iter != ME; Iter++) {
-    MachineInstr &PHIInst = *Iter;
-    for (unsigned i = 2, e = PHIInst.getNumOperands() + 1; i != e; i += 2) {
-      MachineOperand &MO = PHIInst.getOperand(i);
-      if (MO.getMBB() == SourceMBB)
-        MO.setMBB(TargetMBB);
-    }
-  }
-  TargetMBB->splice(TargetMBB->begin(), SourceMBB, MI, ME);
-}
-
-///
-/// This function checks if MI can be moved to the beginning of the TargetMBB
-/// following PHI instructions. A MI instruction can be moved to beginning of
-/// the TargetMBB if there are no uses of it within the TargetMBB PHI nodes.
-///
-/// \param[in] MI the machine instruction to move.
-/// \param[in] TargetMBB the machine basic block to move to
-/// \return true if it is safe to move MI to beginning of TargetMBB,
-///         false otherwise.
-///
-bool BranchCoalescing::canMoveToBeginning(const MachineInstr &MI,
-                                          const MachineBasicBlock &TargetMBB
-                                          ) const {
-
-  DEBUG(dbgs() << "Checking if " << MI << " can move to beginning of "
-        << TargetMBB.getNumber() << "\n");
-
-  for (auto &Def : MI.defs()) { // Looking at Def
-    for (auto &Use : MRI->use_instructions(Def.getReg())) {
-      if (Use.isPHI() && Use.getParent() == &TargetMBB) {
-        DEBUG(dbgs() << "    *** used in a PHI -- cannot move ***\n");
-       return false;
-      }
-    }
-  }
-
-  DEBUG(dbgs() << "  Safe to move to the beginning.\n");
-  return true;
-}
-
-///
-/// This function checks if MI can be moved to the end of the TargetMBB,
-/// immediately before the first terminator.  A MI instruction can be moved
-/// to then end of the TargetMBB if no PHI node defines what MI uses within
-/// it's own MBB.
-///
-/// \param[in] MI the machine instruction to move.
-/// \param[in] TargetMBB the machine basic block to move to
-/// \return true if it is safe to move MI to end of TargetMBB,
-///         false otherwise.
-///
-bool BranchCoalescing::canMoveToEnd(const MachineInstr &MI,
-                                    const MachineBasicBlock &TargetMBB
-                                    ) const {
-
-  DEBUG(dbgs() << "Checking if " << MI << " can move to end of "
-        << TargetMBB.getNumber() << "\n");
-
-  for (auto &Use : MI.uses()) {
-    if (Use.isReg() && TargetRegisterInfo::isVirtualRegister(Use.getReg())) {
-      MachineInstr *DefInst = MRI->getVRegDef(Use.getReg());
-      if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) {
-        DEBUG(dbgs() << "    *** Cannot move this instruction ***\n");
-        return false;
-      } else {
-        DEBUG(dbgs() << "    *** def is in another block -- safe to move!\n");
-      }
-    }
-  }
-
-  DEBUG(dbgs() << "  Safe to move to the end.\n");
-  return true;
-}
-
-///
-/// This method checks to ensure the two coalescing candidates follows the
-/// expected pattern required for coalescing.
-///
-/// \param[in] SourceRegion The candidate to move statements from
-/// \param[in] TargetRegion The candidate to move statements to
-/// \return true if all instructions in SourceRegion.BranchBlock can be merged
-/// into a block in TargetRegion; false otherwise.
-///
-bool BranchCoalescing::validateCandidates(
-    CoalescingCandidateInfo &SourceRegion,
-    CoalescingCandidateInfo &TargetRegion) const {
-
-  if (TargetRegion.BranchTargetBlock != SourceRegion.BranchBlock)
-    llvm_unreachable("Expecting SourceRegion to immediately follow TargetRegion");
-  else if (!MDT->dominates(TargetRegion.BranchBlock, SourceRegion.BranchBlock))
-    llvm_unreachable("Expecting TargetRegion to dominate SourceRegion");
-  else if (!MPDT->dominates(SourceRegion.BranchBlock, TargetRegion.BranchBlock))
-    llvm_unreachable("Expecting SourceRegion to post-dominate TargetRegion");
-  else if (!TargetRegion.FallThroughBlock->empty() ||
-           !SourceRegion.FallThroughBlock->empty())
-    llvm_unreachable("Expecting fall-through blocks to be empty");
-
-  return true;
-}
-
-///
-/// This method determines whether the two coalescing candidates can be merged.
-/// In order to be merged, all instructions must be able to
-///   1. Move to the beginning of the SourceRegion.BranchTargetBlock;
-///   2. Move to the end of the TargetRegion.BranchBlock.
-/// Merging involves moving the instructions in the
-/// TargetRegion.BranchTargetBlock (also SourceRegion.BranchBlock).
-///
-/// This function first try to move instructions from the
-/// TargetRegion.BranchTargetBlock down, to the beginning of the
-/// SourceRegion.BranchTargetBlock. This is not possible if any register defined
-/// in TargetRegion.BranchTargetBlock is used in a PHI node in the
-/// SourceRegion.BranchTargetBlock. In this case, check whether the statement
-/// can be moved up, to the end of the TargetRegion.BranchBlock (immediately
-/// before the branch statement). If it cannot move, then these blocks cannot
-/// be merged.
-///
-/// Note that there is no analysis for moving instructions past the fall-through
-/// blocks because they are confirmed to be empty. An assert is thrown if they
-/// are not.
-///
-/// \param[in] SourceRegion The candidate to move statements from
-/// \param[in] TargetRegion The candidate to move statements to
-/// \return true if all instructions in SourceRegion.BranchBlock can be merged
-///         into a block in TargetRegion, false otherwise.
-///
-bool BranchCoalescing::canMerge(CoalescingCandidateInfo &SourceRegion,
-                                CoalescingCandidateInfo &TargetRegion) const {
-  if (!validateCandidates(SourceRegion, TargetRegion))
-    return false;
-
-  // Walk through PHI nodes first and see if they force the merge into the
-  // SourceRegion.BranchTargetBlock.
-  for (MachineBasicBlock::iterator
-           I = SourceRegion.BranchBlock->instr_begin(),
-           E = SourceRegion.BranchBlock->getFirstNonPHI();
-       I != E; ++I) {
-    for (auto &Def : I->defs())
-      for (auto &Use : MRI->use_instructions(Def.getReg())) {
-        if (Use.isPHI() && Use.getParent() == SourceRegion.BranchTargetBlock) {
-          DEBUG(dbgs() << "PHI " << *I << " defines register used in another "
-                          "PHI within branch target block -- can't merge\n");
-          NumPHINotMoved++;
-          return false;
-        }
-        if (Use.getParent() == SourceRegion.BranchBlock) {
-          DEBUG(dbgs() << "PHI " << *I
-                       << " defines register used in this "
-                          "block -- all must move down\n");
-          SourceRegion.MustMoveDown = true;
-        }
-      }
-  }
-
-  // Walk through the MI to see if they should be merged into
-  // TargetRegion.BranchBlock (up) or SourceRegion.BranchTargetBlock (down)
-  for (MachineBasicBlock::iterator
-           I = SourceRegion.BranchBlock->getFirstNonPHI(),
-           E = SourceRegion.BranchBlock->end();
-       I != E; ++I) {
-    if (!canMoveToBeginning(*I, *SourceRegion.BranchTargetBlock)) {
-      DEBUG(dbgs() << "Instruction " << *I
-                   << " cannot move down - must move up!\n");
-      SourceRegion.MustMoveUp = true;
-    }
-    if (!canMoveToEnd(*I, *TargetRegion.BranchBlock)) {
-      DEBUG(dbgs() << "Instruction " << *I
-                   << " cannot move up - must move down!\n");
-      SourceRegion.MustMoveDown = true;
-    }
-  }
-
-  return (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) ? false : true;
-}
-
-/// Merge the instructions from SourceRegion.BranchBlock,
-/// SourceRegion.BranchTargetBlock, and SourceRegion.FallThroughBlock into
-/// TargetRegion.BranchBlock, TargetRegion.BranchTargetBlock and
-/// TargetRegion.FallThroughBlock respectively.
-///
-/// The successors for blocks in TargetRegion will be updated to use the
-/// successors from blocks in SourceRegion. Finally, the blocks in SourceRegion
-/// will be removed from the function.
-///
-/// A region consists of a BranchBlock, a FallThroughBlock, and a
-/// BranchTargetBlock. Branch coalesce works on patterns where the
-/// TargetRegion's BranchTargetBlock must also be the SourceRegions's
-/// BranchBlock.
-///
-///  Before mergeCandidates:
-///
-///  +---------------------------+
-///  |  TargetRegion.BranchBlock |
-///  +---------------------------+
-///     /        |
-///    /   +--------------------------------+
-///   |    |  TargetRegion.FallThroughBlock |
-///    \   +--------------------------------+
-///     \        |
-///  +----------------------------------+
-///  |  TargetRegion.BranchTargetBlock  |
-///  |  SourceRegion.BranchBlock        |
-///  +----------------------------------+
-///     /        |
-///    /   +--------------------------------+
-///   |    |  SourceRegion.FallThroughBlock |
-///    \   +--------------------------------+
-///     \        |
-///  +----------------------------------+
-///  |  SourceRegion.BranchTargetBlock  |
-///  +----------------------------------+
-///
-///  After mergeCandidates:
-///
-///  +-----------------------------+
-///  |  TargetRegion.BranchBlock   |
-///  |  SourceRegion.BranchBlock   |
-///  +-----------------------------+
-///     /        |
-///    /   +---------------------------------+
-///   |    |  TargetRegion.FallThroughBlock  |
-///   |    |  SourceRegion.FallThroughBlock  |
-///    \   +---------------------------------+
-///     \        |
-///  +----------------------------------+
-///  |  SourceRegion.BranchTargetBlock  |
-///  +----------------------------------+
-///
-/// \param[in] SourceRegion The candidate to move blocks from
-/// \param[in] TargetRegion The candidate to move blocks to
-///
-bool BranchCoalescing::mergeCandidates(CoalescingCandidateInfo &SourceRegion,
-                                       CoalescingCandidateInfo &TargetRegion) {
-
-  if (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) {
-    llvm_unreachable("Cannot have both MustMoveDown and MustMoveUp set!");
-    return false;
-  }
-
-  if (!validateCandidates(SourceRegion, TargetRegion))
-    return false;
-
-  // Start the merging process by first handling the BranchBlock.
-  // Move any PHIs in SourceRegion.BranchBlock down to the branch-taken block
-  moveAndUpdatePHIs(SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
-
-  // Move remaining instructions in SourceRegion.BranchBlock into
-  // TargetRegion.BranchBlock
-  MachineBasicBlock::iterator firstInstr =
-      SourceRegion.BranchBlock->getFirstNonPHI();
-  MachineBasicBlock::iterator lastInstr =
-      SourceRegion.BranchBlock->getFirstTerminator();
-
-  MachineBasicBlock *Source = SourceRegion.MustMoveDown
-                                  ? SourceRegion.BranchTargetBlock
-                                  : TargetRegion.BranchBlock;
-
-  MachineBasicBlock::iterator Target =
-      SourceRegion.MustMoveDown
-          ? SourceRegion.BranchTargetBlock->getFirstNonPHI()
-          : TargetRegion.BranchBlock->getFirstTerminator();
-
-  Source->splice(Target, SourceRegion.BranchBlock, firstInstr, lastInstr);
-
-  // Once PHI and instructions have been moved we need to clean up the
-  // control flow.
-
-  // Remove SourceRegion.FallThroughBlock before transferring successors of
-  // SourceRegion.BranchBlock to TargetRegion.BranchBlock.
-  SourceRegion.BranchBlock->removeSuccessor(SourceRegion.FallThroughBlock);
-  TargetRegion.BranchBlock->transferSuccessorsAndUpdatePHIs(
-      SourceRegion.BranchBlock);
-  // Update branch in TargetRegion.BranchBlock to jump to
-  // SourceRegion.BranchTargetBlock
-  // In this case, TargetRegion.BranchTargetBlock == SourceRegion.BranchBlock.
-  TargetRegion.BranchBlock->ReplaceUsesOfBlockWith(
-      SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
-  // Remove the branch statement(s) in SourceRegion.BranchBlock
-  MachineBasicBlock::iterator I =
-      SourceRegion.BranchBlock->terminators().begin();
-  while (I != SourceRegion.BranchBlock->terminators().end()) {
-    MachineInstr &CurrInst = *I;
-    ++I;
-    if (CurrInst.isBranch())
-      CurrInst.eraseFromParent();
-  }
-
-  // Fall-through block should be empty since this is part of the condition
-  // to coalesce the branches.
-  assert(TargetRegion.FallThroughBlock->empty() &&
-         "FallThroughBlocks should be empty!");
-
-  // Transfer successor information and move PHIs down to the
-  // branch-taken block.
-  TargetRegion.FallThroughBlock->transferSuccessorsAndUpdatePHIs(
-      SourceRegion.FallThroughBlock);
-  TargetRegion.FallThroughBlock->removeSuccessor(SourceRegion.BranchBlock);
-
-  // Remove the blocks from the function.
-  assert(SourceRegion.BranchBlock->empty() &&
-         "Expecting branch block to be empty!");
-  SourceRegion.BranchBlock->eraseFromParent();
-
-  assert(SourceRegion.FallThroughBlock->empty() &&
-         "Expecting fall-through block to be empty!\n");
-  SourceRegion.FallThroughBlock->eraseFromParent();
-
-  NumBlocksCoalesced++;
-  return true;
-}
-
-bool BranchCoalescing::runOnMachineFunction(MachineFunction &MF) {
-
-  if (skipFunction(*MF.getFunction()) || MF.empty() ||
-      !isBranchCoalescingEnabled())
-    return false;
-
-  bool didSomething = false;
-
-  DEBUG(dbgs() << "******** Branch Coalescing ********\n");
-  initialize(MF);
-
-  DEBUG(dbgs() << "Function: "; MF.dump(); dbgs() << "\n");
-
-  CoalescingCandidateInfo Cand1, Cand2;
-  // Walk over blocks and find candidates to merge
-  // Continue trying to merge with the first candidate found, as long as merging
-  // is successfull.
-  for (MachineBasicBlock &MBB : MF) {
-    bool MergedCandidates = false;
-    do {
-      MergedCandidates = false;
-      Cand1.clear();
-      Cand2.clear();
-
-      Cand1.BranchBlock = &MBB;
-
-      // If unable to coalesce the branch, then continue to next block
-      if (!canCoalesceBranch(Cand1))
-        break;
-
-      Cand2.BranchBlock = Cand1.BranchTargetBlock;
-      if (!canCoalesceBranch(Cand2))
-        break;
-
-      // Sanity check
-      // The branch-taken block of the second candidate should post-dominate the
-      // first candidate
-      assert(MPDT->dominates(Cand2.BranchTargetBlock, Cand1.BranchBlock) &&
-             "Branch-taken block should post-dominate first candidate");
-
-      if (!identicalOperands(Cand1.Cond, Cand2.Cond)) {
-        DEBUG(dbgs() << "Blocks " << Cand1.BranchBlock->getNumber() << " and "
-                     << Cand2.BranchBlock->getNumber()
-                     << " have different branches\n");
-        break;
-      }
-      if (!canMerge(Cand2, Cand1)) {
-        DEBUG(dbgs() << "Cannot merge blocks " << Cand1.BranchBlock->getNumber()
-                     << " and " << Cand2.BranchBlock->getNumber() << "\n");
-        NumBlocksNotCoalesced++;
-        continue;
-      }
-      DEBUG(dbgs() << "Merging blocks " << Cand1.BranchBlock->getNumber()
-                   << " and " << Cand1.BranchTargetBlock->getNumber() << "\n");
-      MergedCandidates = mergeCandidates(Cand2, Cand1);
-      if (MergedCandidates)
-        didSomething = true;
-
-      DEBUG(dbgs() << "Function after merging: "; MF.dump(); dbgs() << "\n");
-    } while (MergedCandidates);
-  }
-
-#ifndef NDEBUG
-  // Verify MF is still valid after branch coalescing
-  if (didSomething)
-    MF.verify(nullptr, "Error in code produced by branch coalescing");
-#endif // NDEBUG
-
-  DEBUG(dbgs() << "Finished Branch Coalescing\n");
-  return didSomething;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/CodeGen/CountingFunctionInserter.cpp b/external/bsd/llvm/dist/llvm/lib/CodeGen/CountingFunctionInserter.cpp
deleted file mode 100644
index 7f7350f5fb5c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/CodeGen/CountingFunctionInserter.cpp
+++ /dev/null
@@ -1,62 +0,0 @@
-//===- CountingFunctionInserter.cpp - Insert mcount-like function calls ---===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Insert calls to counter functions, such as mcount, intended to be called
-// once per function, at the beginning of each function.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Analysis/GlobalsModRef.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/IR/Function.h"
-#include "llvm/IR/Instructions.h"
-#include "llvm/IR/Module.h"
-#include "llvm/IR/Type.h"
-#include "llvm/Pass.h"
-using namespace llvm;
-
-namespace {
-  struct CountingFunctionInserter : public FunctionPass {
-    static char ID; // Pass identification, replacement for typeid
-    CountingFunctionInserter() : FunctionPass(ID) {
-      initializeCountingFunctionInserterPass(*PassRegistry::getPassRegistry());
-    }
-    
-    void getAnalysisUsage(AnalysisUsage &AU) const override {
-      AU.addPreserved<GlobalsAAWrapperPass>();
-    }
-
-    bool runOnFunction(Function &F) override {
-      std::string CountingFunctionName =
-        F.getFnAttribute("counting-function").getValueAsString();
-      if (CountingFunctionName.empty())
-        return false;
-
-      Type *VoidTy = Type::getVoidTy(F.getContext());
-      Constant *CountingFn =
-        F.getParent()->getOrInsertFunction(CountingFunctionName,
-                                           VoidTy);
-      CallInst::Create(CountingFn, "", &*F.begin()->getFirstInsertionPt());
-      return true;
-    }
-  };
-  
-  char CountingFunctionInserter::ID = 0;
-}
-
-INITIALIZE_PASS(CountingFunctionInserter, "cfinserter", 
-                "Inserts calls to mcount-like functions", false, false)
-
-//===----------------------------------------------------------------------===//
-//
-// CountingFunctionInserter - Give any unnamed non-void instructions "tmp" names.
-//
-FunctionPass *llvm::createCountingFunctionInserterPass() {
-  return new CountingFunctionInserter();
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/CodeGen/ExecutionDepsFix.cpp b/external/bsd/llvm/dist/llvm/lib/CodeGen/ExecutionDepsFix.cpp
deleted file mode 100644
index e272d25047e6..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/CodeGen/ExecutionDepsFix.cpp
+++ /dev/null
@@ -1,755 +0,0 @@
-//===- ExecutionDepsFix.cpp - Fix execution dependecy issues ----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/CodeGen/ExecutionDepsFix.h"
-
-#include "llvm/ADT/PostOrderIterator.h"
-#include "llvm/ADT/iterator_range.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/RegisterClassInfo.h"
-#include "llvm/Support/Allocator.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-
-using namespace llvm;
-
-#define DEBUG_TYPE "execution-deps-fix"
-
-/// Translate TRI register number to a list of indices into our smaller tables
-/// of interesting registers.
-iterator_range<SmallVectorImpl<int>::const_iterator>
-ExecutionDepsFix::regIndices(unsigned Reg) const {
-  assert(Reg < AliasMap.size() && "Invalid register");
-  const auto &Entry = AliasMap[Reg];
-  return make_range(Entry.begin(), Entry.end());
-}
-
-DomainValue *ExecutionDepsFix::alloc(int domain) {
-  DomainValue *dv = Avail.empty() ?
-                      new(Allocator.Allocate()) DomainValue :
-                      Avail.pop_back_val();
-  if (domain >= 0)
-    dv->addDomain(domain);
-  assert(dv->Refs == 0 && "Reference count wasn't cleared");
-  assert(!dv->Next && "Chained DomainValue shouldn't have been recycled");
-  return dv;
-}
-
-/// Release a reference to DV.  When the last reference is released,
-/// collapse if needed.
-void ExecutionDepsFix::release(DomainValue *DV) {
-  while (DV) {
-    assert(DV->Refs && "Bad DomainValue");
-    if (--DV->Refs)
-      return;
-
-    // There are no more DV references. Collapse any contained instructions.
-    if (DV->AvailableDomains && !DV->isCollapsed())
-      collapse(DV, DV->getFirstDomain());
-
-    DomainValue *Next = DV->Next;
-    DV->clear();
-    Avail.push_back(DV);
-    // Also release the next DomainValue in the chain.
-    DV = Next;
-  }
-}
-
-/// Follow the chain of dead DomainValues until a live DomainValue is reached.
-/// Update the referenced pointer when necessary.
-DomainValue *ExecutionDepsFix::resolve(DomainValue *&DVRef) {
-  DomainValue *DV = DVRef;
-  if (!DV || !DV->Next)
-    return DV;
-
-  // DV has a chain. Find the end.
-  do DV = DV->Next;
-  while (DV->Next);
-
-  // Update DVRef to point to DV.
-  retain(DV);
-  release(DVRef);
-  DVRef = DV;
-  return DV;
-}
-
-/// Set LiveRegs[rx] = dv, updating reference counts.
-void ExecutionDepsFix::setLiveReg(int rx, DomainValue *dv) {
-  assert(unsigned(rx) < NumRegs && "Invalid index");
-  assert(LiveRegs && "Must enter basic block first.");
-
-  if (LiveRegs[rx].Value == dv)
-    return;
-  if (LiveRegs[rx].Value)
-    release(LiveRegs[rx].Value);
-  LiveRegs[rx].Value = retain(dv);
-}
-
-// Kill register rx, recycle or collapse any DomainValue.
-void ExecutionDepsFix::kill(int rx) {
-  assert(unsigned(rx) < NumRegs && "Invalid index");
-  assert(LiveRegs && "Must enter basic block first.");
-  if (!LiveRegs[rx].Value)
-    return;
-
-  release(LiveRegs[rx].Value);
-  LiveRegs[rx].Value = nullptr;
-}
-
-/// Force register rx into domain.
-void ExecutionDepsFix::force(int rx, unsigned domain) {
-  assert(unsigned(rx) < NumRegs && "Invalid index");
-  assert(LiveRegs && "Must enter basic block first.");
-  if (DomainValue *dv = LiveRegs[rx].Value) {
-    if (dv->isCollapsed())
-      dv->addDomain(domain);
-    else if (dv->hasDomain(domain))
-      collapse(dv, domain);
-    else {
-      // This is an incompatible open DomainValue. Collapse it to whatever and
-      // force the new value into domain. This costs a domain crossing.
-      collapse(dv, dv->getFirstDomain());
-      assert(LiveRegs[rx].Value && "Not live after collapse?");
-      LiveRegs[rx].Value->addDomain(domain);
-    }
-  } else {
-    // Set up basic collapsed DomainValue.
-    setLiveReg(rx, alloc(domain));
-  }
-}
-
-/// Collapse open DomainValue into given domain. If there are multiple
-/// registers using dv, they each get a unique collapsed DomainValue.
-void ExecutionDepsFix::collapse(DomainValue *dv, unsigned domain) {
-  assert(dv->hasDomain(domain) && "Cannot collapse");
-
-  // Collapse all the instructions.
-  while (!dv->Instrs.empty())
-    TII->setExecutionDomain(*dv->Instrs.pop_back_val(), domain);
-  dv->setSingleDomain(domain);
-
-  // If there are multiple users, give them new, unique DomainValues.
-  if (LiveRegs && dv->Refs > 1)
-    for (unsigned rx = 0; rx != NumRegs; ++rx)
-      if (LiveRegs[rx].Value == dv)
-        setLiveReg(rx, alloc(domain));
-}
-
-/// All instructions and registers in B are moved to A, and B is released.
-bool ExecutionDepsFix::merge(DomainValue *A, DomainValue *B) {
-  assert(!A->isCollapsed() && "Cannot merge into collapsed");
-  assert(!B->isCollapsed() && "Cannot merge from collapsed");
-  if (A == B)
-    return true;
-  // Restrict to the domains that A and B have in common.
-  unsigned common = A->getCommonDomains(B->AvailableDomains);
-  if (!common)
-    return false;
-  A->AvailableDomains = common;
-  A->Instrs.append(B->Instrs.begin(), B->Instrs.end());
-
-  // Clear the old DomainValue so we won't try to swizzle instructions twice.
-  B->clear();
-  // All uses of B are referred to A.
-  B->Next = retain(A);
-
-  for (unsigned rx = 0; rx != NumRegs; ++rx) {
-    assert(LiveRegs && "no space allocated for live registers");
-    if (LiveRegs[rx].Value == B)
-      setLiveReg(rx, A);
-  }
-  return true;
-}
-
-/// Set up LiveRegs by merging predecessor live-out values.
-void ExecutionDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
-  // Reset instruction counter in each basic block.
-  CurInstr = 0;
-
-  // Set up UndefReads to track undefined register reads.
-  UndefReads.clear();
-  LiveRegSet.clear();
-
-  // Set up LiveRegs to represent registers entering MBB.
-  if (!LiveRegs)
-    LiveRegs = new LiveReg[NumRegs];
-
-  // Default values are 'nothing happened a long time ago'.
-  for (unsigned rx = 0; rx != NumRegs; ++rx) {
-    LiveRegs[rx].Value = nullptr;
-    LiveRegs[rx].Def = -(1 << 20);
-  }
-
-  // This is the entry block.
-  if (MBB->pred_empty()) {
-    for (const auto &LI : MBB->liveins()) {
-      for (int rx : regIndices(LI.PhysReg)) {
-        // Treat function live-ins as if they were defined just before the first
-        // instruction.  Usually, function arguments are set up immediately
-        // before the call.
-        LiveRegs[rx].Def = -1;
-      }
-    }
-    DEBUG(dbgs() << "BB#" << MBB->getNumber() << ": entry\n");
-    return;
-  }
-
-  // Try to coalesce live-out registers from predecessors.
-  for (MachineBasicBlock::const_pred_iterator pi = MBB->pred_begin(),
-       pe = MBB->pred_end(); pi != pe; ++pi) {
-    auto fi = MBBInfos.find(*pi);
-    assert(fi != MBBInfos.end() &&
-           "Should have pre-allocated MBBInfos for all MBBs");
-    LiveReg *Incoming = fi->second.OutRegs;
-    // Incoming is null if this is a backedge from a BB
-    // we haven't processed yet
-    if (Incoming == nullptr) {
-      continue;
-    }
-
-    for (unsigned rx = 0; rx != NumRegs; ++rx) {
-      // Use the most recent predecessor def for each register.
-      LiveRegs[rx].Def = std::max(LiveRegs[rx].Def, Incoming[rx].Def);
-
-      DomainValue *pdv = resolve(Incoming[rx].Value);
-      if (!pdv)
-        continue;
-      if (!LiveRegs[rx].Value) {
-        setLiveReg(rx, pdv);
-        continue;
-      }
-
-      // We have a live DomainValue from more than one predecessor.
-      if (LiveRegs[rx].Value->isCollapsed()) {
-        // We are already collapsed, but predecessor is not. Force it.
-        unsigned Domain = LiveRegs[rx].Value->getFirstDomain();
-        if (!pdv->isCollapsed() && pdv->hasDomain(Domain))
-          collapse(pdv, Domain);
-        continue;
-      }
-
-      // Currently open, merge in predecessor.
-      if (!pdv->isCollapsed())
-        merge(LiveRegs[rx].Value, pdv);
-      else
-        force(rx, pdv->getFirstDomain());
-    }
-  }
-  DEBUG(
-      dbgs() << "BB#" << MBB->getNumber()
-             << (!isBlockDone(MBB) ? ": incomplete\n" : ": all preds known\n"));
-}
-
-void ExecutionDepsFix::leaveBasicBlock(MachineBasicBlock *MBB) {
-  assert(LiveRegs && "Must enter basic block first.");
-  LiveReg *OldOutRegs = MBBInfos[MBB].OutRegs;
-  // Save register clearances at end of MBB - used by enterBasicBlock().
-  MBBInfos[MBB].OutRegs = LiveRegs;
-
-  // While processing the basic block, we kept `Def` relative to the start
-  // of the basic block for convenience. However, future use of this information
-  // only cares about the clearance from the end of the block, so adjust
-  // everything to be relative to the end of the basic block.
-  for (unsigned i = 0, e = NumRegs; i != e; ++i)
-    LiveRegs[i].Def -= CurInstr;
-  if (OldOutRegs) {
-    // This must be the second pass.
-    // Release all the DomainValues instead of keeping them.
-    for (unsigned i = 0, e = NumRegs; i != e; ++i)
-      release(OldOutRegs[i].Value);
-    delete[] OldOutRegs;
-  }
-  LiveRegs = nullptr;
-}
-
-bool ExecutionDepsFix::visitInstr(MachineInstr *MI) {
-  // Update instructions with explicit execution domains.
-  std::pair<uint16_t, uint16_t> DomP = TII->getExecutionDomain(*MI);
-  if (DomP.first) {
-    if (DomP.second)
-      visitSoftInstr(MI, DomP.second);
-    else
-      visitHardInstr(MI, DomP.first);
-  }
-
-  return !DomP.first;
-}
-
-/// \brief Helps avoid false dependencies on undef registers by updating the
-/// machine instructions' undef operand to use a register that the instruction
-/// is truly dependent on, or use a register with clearance higher than Pref.
-/// Returns true if it was able to find a true dependency, thus not requiring
-/// a dependency breaking instruction regardless of clearance.
-bool ExecutionDepsFix::pickBestRegisterForUndef(MachineInstr *MI,
-                                                unsigned OpIdx, unsigned Pref) {
-  MachineOperand &MO = MI->getOperand(OpIdx);
-  assert(MO.isUndef() && "Expected undef machine operand");
-
-  unsigned OriginalReg = MO.getReg();
-
-  // Update only undef operands that are mapped to one register.
-  if (AliasMap[OriginalReg].size() != 1)
-    return false;
-
-  // Get the undef operand's register class
-  const TargetRegisterClass *OpRC =
-      TII->getRegClass(MI->getDesc(), OpIdx, TRI, *MF);
-
-  // If the instruction has a true dependency, we can hide the false depdency
-  // behind it.
-  for (MachineOperand &CurrMO : MI->operands()) {
-    if (!CurrMO.isReg() || CurrMO.isDef() || CurrMO.isUndef() ||
-        !OpRC->contains(CurrMO.getReg()))
-      continue;
-    // We found a true dependency - replace the undef register with the true
-    // dependency.
-    MO.setReg(CurrMO.getReg());
-    return true;
-  }
-
-  // Go over all registers in the register class and find the register with
-  // max clearance or clearance higher than Pref.
-  unsigned MaxClearance = 0;
-  unsigned MaxClearanceReg = OriginalReg;
-  ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(OpRC);
-  for (auto Reg : Order) {
-    assert(AliasMap[Reg].size() == 1 &&
-           "Reg is expected to be mapped to a single index");
-    int RCrx = *regIndices(Reg).begin();
-    unsigned Clearance = CurInstr - LiveRegs[RCrx].Def;
-    if (Clearance <= MaxClearance)
-      continue;
-    MaxClearance = Clearance;
-    MaxClearanceReg = Reg;
-
-    if (MaxClearance > Pref)
-      break;
-  }
-
-  // Update the operand if we found a register with better clearance.
-  if (MaxClearanceReg != OriginalReg)
-    MO.setReg(MaxClearanceReg);
-
-  return false;
-}
-
-/// \brief Return true to if it makes sense to break dependence on a partial def
-/// or undef use.
-bool ExecutionDepsFix::shouldBreakDependence(MachineInstr *MI, unsigned OpIdx,
-                                             unsigned Pref) {
-  unsigned reg = MI->getOperand(OpIdx).getReg();
-  for (int rx : regIndices(reg)) {
-    unsigned Clearance = CurInstr - LiveRegs[rx].Def;
-    DEBUG(dbgs() << "Clearance: " << Clearance << ", want " << Pref);
-
-    if (Pref > Clearance) {
-      DEBUG(dbgs() << ": Break dependency.\n");
-      continue;
-    }
-    DEBUG(dbgs() << ": OK .\n");
-    return false;
-  }
-  return true;
-}
-
-// Update def-ages for registers defined by MI.
-// If Kill is set, also kill off DomainValues clobbered by the defs.
-//
-// Also break dependencies on partial defs and undef uses.
-void ExecutionDepsFix::processDefs(MachineInstr *MI, bool breakDependency,
-                                   bool Kill) {
-  assert(!MI->isDebugValue() && "Won't process debug values");
-
-  // Break dependence on undef uses. Do this before updating LiveRegs below.
-  unsigned OpNum;
-  if (breakDependency) {
-    unsigned Pref = TII->getUndefRegClearance(*MI, OpNum, TRI);
-    if (Pref) {
-      bool HadTrueDependency = pickBestRegisterForUndef(MI, OpNum, Pref);
-      // We don't need to bother trying to break a dependency if this
-      // instruction has a true dependency on that register through another
-      // operand - we'll have to wait for it to be available regardless.
-      if (!HadTrueDependency && shouldBreakDependence(MI, OpNum, Pref))
-        UndefReads.push_back(std::make_pair(MI, OpNum));
-    }
-  }
-  const MCInstrDesc &MCID = MI->getDesc();
-  for (unsigned i = 0,
-         e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs();
-         i != e; ++i) {
-    MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg())
-      continue;
-    if (MO.isUse())
-      continue;
-    for (int rx : regIndices(MO.getReg())) {
-      // This instruction explicitly defines rx.
-      DEBUG(dbgs() << TRI->getName(RC->getRegister(rx)) << ":\t" << CurInstr
-                   << '\t' << *MI);
-
-      if (breakDependency) {
-        // Check clearance before partial register updates.
-        // Call breakDependence before setting LiveRegs[rx].Def.
-        unsigned Pref = TII->getPartialRegUpdateClearance(*MI, i, TRI);
-        if (Pref && shouldBreakDependence(MI, i, Pref))
-          TII->breakPartialRegDependency(*MI, i, TRI);
-      }
-
-      // How many instructions since rx was last written?
-      LiveRegs[rx].Def = CurInstr;
-
-      // Kill off domains redefined by generic instructions.
-      if (Kill)
-        kill(rx);
-    }
-  }
-  ++CurInstr;
-}
-
-/// \break Break false dependencies on undefined register reads.
-///
-/// Walk the block backward computing precise liveness. This is expensive, so we
-/// only do it on demand. Note that the occurrence of undefined register reads
-/// that should be broken is very rare, but when they occur we may have many in
-/// a single block.
-void ExecutionDepsFix::processUndefReads(MachineBasicBlock *MBB) {
-  if (UndefReads.empty())
-    return;
-
-  // Collect this block's live out register units.
-  LiveRegSet.init(*TRI);
-  // We do not need to care about pristine registers as they are just preserved
-  // but not actually used in the function.
-  LiveRegSet.addLiveOutsNoPristines(*MBB);
-
-  MachineInstr *UndefMI = UndefReads.back().first;
-  unsigned OpIdx = UndefReads.back().second;
-
-  for (MachineInstr &I : make_range(MBB->rbegin(), MBB->rend())) {
-    // Update liveness, including the current instruction's defs.
-    LiveRegSet.stepBackward(I);
-
-    if (UndefMI == &I) {
-      if (!LiveRegSet.contains(UndefMI->getOperand(OpIdx).getReg()))
-        TII->breakPartialRegDependency(*UndefMI, OpIdx, TRI);
-
-      UndefReads.pop_back();
-      if (UndefReads.empty())
-        return;
-
-      UndefMI = UndefReads.back().first;
-      OpIdx = UndefReads.back().second;
-    }
-  }
-}
-
-// A hard instruction only works in one domain. All input registers will be
-// forced into that domain.
-void ExecutionDepsFix::visitHardInstr(MachineInstr *mi, unsigned domain) {
-  // Collapse all uses.
-  for (unsigned i = mi->getDesc().getNumDefs(),
-                e = mi->getDesc().getNumOperands(); i != e; ++i) {
-    MachineOperand &mo = mi->getOperand(i);
-    if (!mo.isReg()) continue;
-    for (int rx : regIndices(mo.getReg())) {
-      force(rx, domain);
-    }
-  }
-
-  // Kill all defs and force them.
-  for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
-    MachineOperand &mo = mi->getOperand(i);
-    if (!mo.isReg()) continue;
-    for (int rx : regIndices(mo.getReg())) {
-      kill(rx);
-      force(rx, domain);
-    }
-  }
-}
-
-// A soft instruction can be changed to work in other domains given by mask.
-void ExecutionDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
-  // Bitmask of available domains for this instruction after taking collapsed
-  // operands into account.
-  unsigned available = mask;
-
-  // Scan the explicit use operands for incoming domains.
-  SmallVector<int, 4> used;
-  if (LiveRegs)
-    for (unsigned i = mi->getDesc().getNumDefs(),
-                  e = mi->getDesc().getNumOperands(); i != e; ++i) {
-      MachineOperand &mo = mi->getOperand(i);
-      if (!mo.isReg()) continue;
-      for (int rx : regIndices(mo.getReg())) {
-        DomainValue *dv = LiveRegs[rx].Value;
-        if (dv == nullptr)
-          continue;
-        // Bitmask of domains that dv and available have in common.
-        unsigned common = dv->getCommonDomains(available);
-        // Is it possible to use this collapsed register for free?
-        if (dv->isCollapsed()) {
-          // Restrict available domains to the ones in common with the operand.
-          // If there are no common domains, we must pay the cross-domain
-          // penalty for this operand.
-          if (common) available = common;
-        } else if (common)
-          // Open DomainValue is compatible, save it for merging.
-          used.push_back(rx);
-        else
-          // Open DomainValue is not compatible with instruction. It is useless
-          // now.
-          kill(rx);
-      }
-    }
-
-  // If the collapsed operands force a single domain, propagate the collapse.
-  if (isPowerOf2_32(available)) {
-    unsigned domain = countTrailingZeros(available);
-    TII->setExecutionDomain(*mi, domain);
-    visitHardInstr(mi, domain);
-    return;
-  }
-
-  // Kill off any remaining uses that don't match available, and build a list of
-  // incoming DomainValues that we want to merge.
-  SmallVector<const LiveReg *, 4> Regs;
-  for (int rx : used) {
-    assert(LiveRegs && "no space allocated for live registers");
-    const LiveReg &LR = LiveRegs[rx];
-    // This useless DomainValue could have been missed above.
-    if (!LR.Value->getCommonDomains(available)) {
-      kill(rx);
-      continue;
-    }
-    // Sorted insertion.
-    auto I = std::upper_bound(Regs.begin(), Regs.end(), &LR,
-                              [](const LiveReg *LHS, const LiveReg *RHS) {
-                                return LHS->Def < RHS->Def;
-                              });
-    Regs.insert(I, &LR);
-  }
-
-  // doms are now sorted in order of appearance. Try to merge them all, giving
-  // priority to the latest ones.
-  DomainValue *dv = nullptr;
-  while (!Regs.empty()) {
-    if (!dv) {
-      dv = Regs.pop_back_val()->Value;
-      // Force the first dv to match the current instruction.
-      dv->AvailableDomains = dv->getCommonDomains(available);
-      assert(dv->AvailableDomains && "Domain should have been filtered");
-      continue;
-    }
-
-    DomainValue *Latest = Regs.pop_back_val()->Value;
-    // Skip already merged values.
-    if (Latest == dv || Latest->Next)
-      continue;
-    if (merge(dv, Latest))
-      continue;
-
-    // If latest didn't merge, it is useless now. Kill all registers using it.
-    for (int i : used) {
-      assert(LiveRegs && "no space allocated for live registers");
-      if (LiveRegs[i].Value == Latest)
-        kill(i);
-    }
-  }
-
-  // dv is the DomainValue we are going to use for this instruction.
-  if (!dv) {
-    dv = alloc();
-    dv->AvailableDomains = available;
-  }
-  dv->Instrs.push_back(mi);
-
-  // Finally set all defs and non-collapsed uses to dv. We must iterate through
-  // all the operators, including imp-def ones.
-  for (MachineInstr::mop_iterator ii = mi->operands_begin(),
-                                  ee = mi->operands_end();
-                                  ii != ee; ++ii) {
-    MachineOperand &mo = *ii;
-    if (!mo.isReg()) continue;
-    for (int rx : regIndices(mo.getReg())) {
-      if (!LiveRegs[rx].Value || (mo.isDef() && LiveRegs[rx].Value != dv)) {
-        kill(rx);
-        setLiveReg(rx, dv);
-      }
-    }
-  }
-}
-
-void ExecutionDepsFix::processBasicBlock(MachineBasicBlock *MBB,
-                                         bool PrimaryPass) {
-  enterBasicBlock(MBB);
-  // If this block is not done, it makes little sense to make any decisions
-  // based on clearance information. We need to make a second pass anyway,
-  // and by then we'll have better information, so we can avoid doing the work
-  // to try and break dependencies now.
-  bool breakDependency = isBlockDone(MBB);
-  for (MachineInstr &MI : *MBB) {
-    if (!MI.isDebugValue()) {
-      bool Kill = false;
-      if (PrimaryPass)
-        Kill = visitInstr(&MI);
-      processDefs(&MI, breakDependency, Kill);
-    }
-  }
-  if (breakDependency)
-    processUndefReads(MBB);
-  leaveBasicBlock(MBB);
-}
-
-bool ExecutionDepsFix::isBlockDone(MachineBasicBlock *MBB) {
-  return MBBInfos[MBB].PrimaryCompleted &&
-         MBBInfos[MBB].IncomingCompleted == MBBInfos[MBB].PrimaryIncoming &&
-         MBBInfos[MBB].IncomingProcessed == MBB->pred_size();
-}
-
-bool ExecutionDepsFix::runOnMachineFunction(MachineFunction &mf) {
-  if (skipFunction(*mf.getFunction()))
-    return false;
-  MF = &mf;
-  TII = MF->getSubtarget().getInstrInfo();
-  TRI = MF->getSubtarget().getRegisterInfo();
-  RegClassInfo.runOnMachineFunction(mf);
-  LiveRegs = nullptr;
-  assert(NumRegs == RC->getNumRegs() && "Bad regclass");
-
-  DEBUG(dbgs() << "********** FIX EXECUTION DEPENDENCIES: "
-               << TRI->getRegClassName(RC) << " **********\n");
-
-  // If no relevant registers are used in the function, we can skip it
-  // completely.
-  bool anyregs = false;
-  const MachineRegisterInfo &MRI = mf.getRegInfo();
-  for (unsigned Reg : *RC) {
-    if (MRI.isPhysRegUsed(Reg)) {
-      anyregs = true;
-      break;
-    }
-  }
-  if (!anyregs) return false;
-
-  // Initialize the AliasMap on the first use.
-  if (AliasMap.empty()) {
-    // Given a PhysReg, AliasMap[PhysReg] returns a list of indices into RC and
-    // therefore the LiveRegs array.
-    AliasMap.resize(TRI->getNumRegs());
-    for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i)
-      for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true);
-           AI.isValid(); ++AI)
-        AliasMap[*AI].push_back(i);
-  }
-
-  // Initialize the MMBInfos
-  for (auto &MBB : mf) {
-    MBBInfo InitialInfo;
-    MBBInfos.insert(std::make_pair(&MBB, InitialInfo));
-  }
-
-  /*
-   *  We want to visit every instruction in every basic block in order to update
-   *  it's execution domain or break any false dependencies. However, for the
-   *  dependency breaking, we need to know clearances from all predecessors
-   *  (including any backedges). One way to do so would be to do two complete
-   *  passes over all basic blocks/instructions, the first for recording
-   *  clearances, the second to break the dependencies. However, for functions
-   *  without backedges, or functions with a lot of straight-line code, and
-   *  a small loop, that would be a lot of unnecessary work (since only the
-   *  BBs that are part of the loop require two passes). As an example,
-   *  consider the following loop.
-   *
-   *
-   *     PH -> A -> B (xmm<Undef> -> xmm<Def>) -> C -> D -> EXIT
-   *           ^                                  |
-   *           +----------------------------------+
-   *
-   *  The iteration order is as follows:
-   *  Naive: PH A B C D A' B' C' D'
-   *  Optimized: PH A B C A' B' C' D
-   *
-   *  Note that we avoid processing D twice, because we can entirely process
-   *  the predecessors before getting to D. We call a block that is ready
-   *  for its second round of processing `done` (isBlockDone). Once we finish
-   *  processing some block, we update the counters in MBBInfos and re-process
-   *  any successors that are now done.
-   */
-
-  MachineBasicBlock *Entry = &*MF->begin();
-  ReversePostOrderTraversal<MachineBasicBlock*> RPOT(Entry);
-  SmallVector<MachineBasicBlock *, 4> Workqueue;
-  for (ReversePostOrderTraversal<MachineBasicBlock*>::rpo_iterator
-         MBBI = RPOT.begin(), MBBE = RPOT.end(); MBBI != MBBE; ++MBBI) {
-    MachineBasicBlock *MBB = *MBBI;
-    // N.B: IncomingProcessed and IncomingCompleted were already updated while
-    // processing this block's predecessors.
-    MBBInfos[MBB].PrimaryCompleted = true;
-    MBBInfos[MBB].PrimaryIncoming = MBBInfos[MBB].IncomingProcessed;
-    bool Primary = true;
-    Workqueue.push_back(MBB);
-    while (!Workqueue.empty()) {
-      MachineBasicBlock *ActiveMBB = &*Workqueue.back();
-      Workqueue.pop_back();
-      processBasicBlock(ActiveMBB, Primary);
-      bool Done = isBlockDone(ActiveMBB);
-      for (auto *Succ : ActiveMBB->successors()) {
-        if (!isBlockDone(Succ)) {
-          if (Primary) {
-            MBBInfos[Succ].IncomingProcessed++;
-          }
-          if (Done) {
-            MBBInfos[Succ].IncomingCompleted++;
-          }
-          if (isBlockDone(Succ)) {
-            Workqueue.push_back(Succ);
-          }
-        }
-      }
-      Primary = false;
-    }
-  }
-
-  // We need to go through again and finalize any blocks that are not done yet.
-  // This is possible if blocks have dead predecessors, so we didn't visit them
-  // above.
-  for (ReversePostOrderTraversal<MachineBasicBlock *>::rpo_iterator
-           MBBI = RPOT.begin(),
-           MBBE = RPOT.end();
-       MBBI != MBBE; ++MBBI) {
-    MachineBasicBlock *MBB = *MBBI;
-    if (!isBlockDone(MBB)) {
-      processBasicBlock(MBB, false);
-      // Don't update successors here. We'll get to them anyway through this
-      // loop.
-    }
-  }
-
-  // Clear the LiveOuts vectors and collapse any remaining DomainValues.
-  for (ReversePostOrderTraversal<MachineBasicBlock*>::rpo_iterator
-         MBBI = RPOT.begin(), MBBE = RPOT.end(); MBBI != MBBE; ++MBBI) {
-    auto FI = MBBInfos.find(*MBBI);
-    if (FI == MBBInfos.end() || !FI->second.OutRegs)
-      continue;
-    for (unsigned i = 0, e = NumRegs; i != e; ++i)
-      if (FI->second.OutRegs[i].Value)
-        release(FI->second.OutRegs[i].Value);
-    delete[] FI->second.OutRegs;
-  }
-  MBBInfos.clear();
-  UndefReads.clear();
-  Avail.clear();
-  Allocator.DestroyAll();
-
-  return false;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp b/external/bsd/llvm/dist/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
deleted file mode 100644
index 0e240f482a19..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ /dev/null
@@ -1,1592 +0,0 @@
-//===- LiveIntervalAnalysis.cpp - Live Interval Analysis ------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file This file implements the LiveInterval analysis pass which is used
-/// by the Linear Scan Register allocator. This pass linearizes the
-/// basic blocks of the function in DFS order and computes live intervals for
-/// each virtual and physical register.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/CodeGen/LiveIntervalAnalysis.h"
-#include "LiveRangeCalc.h"
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/DepthFirstIterator.h"
-#include "llvm/ADT/SmallPtrSet.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/iterator_range.h"
-#include "llvm/Analysis/AliasAnalysis.h"
-#include "llvm/CodeGen/LiveInterval.h"
-#include "llvm/CodeGen/LiveVariables.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
-#include "llvm/CodeGen/MachineDominators.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineInstrBundle.h"
-#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/CodeGen/SlotIndexes.h"
-#include "llvm/CodeGen/VirtRegMap.h"
-#include "llvm/MC/LaneBitmask.h"
-#include "llvm/MC/MCRegisterInfo.h"
-#include "llvm/Pass.h"
-#include "llvm/Support/BlockFrequency.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Compiler.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/MathExtras.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-#include <algorithm>
-#include <cassert>
-#include <cstdint>
-#include <iterator>
-#include <tuple>
-#include <utility>
-
-using namespace llvm;
-
-#define DEBUG_TYPE "regalloc"
-
-char LiveIntervals::ID = 0;
-char &llvm::LiveIntervalsID = LiveIntervals::ID;
-INITIALIZE_PASS_BEGIN(LiveIntervals, "liveintervals",
-                "Live Interval Analysis", false, false)
-INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
-INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
-INITIALIZE_PASS_END(LiveIntervals, "liveintervals",
-                "Live Interval Analysis", false, false)
-
-#ifndef NDEBUG
-static cl::opt<bool> EnablePrecomputePhysRegs(
-  "precompute-phys-liveness", cl::Hidden,
-  cl::desc("Eagerly compute live intervals for all physreg units."));
-#else
-static bool EnablePrecomputePhysRegs = false;
-#endif // NDEBUG
-
-namespace llvm {
-
-cl::opt<bool> UseSegmentSetForPhysRegs(
-    "use-segment-set-for-physregs", cl::Hidden, cl::init(true),
-    cl::desc(
-        "Use segment set for the computation of the live ranges of physregs."));
-
-} // end namespace llvm
-
-void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
-  AU.setPreservesCFG();
-  AU.addRequired<AAResultsWrapperPass>();
-  AU.addPreserved<AAResultsWrapperPass>();
-  AU.addPreserved<LiveVariables>();
-  AU.addPreservedID(MachineLoopInfoID);
-  AU.addRequiredTransitiveID(MachineDominatorsID);
-  AU.addPreservedID(MachineDominatorsID);
-  AU.addPreserved<SlotIndexes>();
-  AU.addRequiredTransitive<SlotIndexes>();
-  MachineFunctionPass::getAnalysisUsage(AU);
-}
-
-LiveIntervals::LiveIntervals() : MachineFunctionPass(ID) {
-  initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
-}
-
-LiveIntervals::~LiveIntervals() {
-  delete LRCalc;
-}
-
-void LiveIntervals::releaseMemory() {
-  // Free the live intervals themselves.
-  for (unsigned i = 0, e = VirtRegIntervals.size(); i != e; ++i)
-    delete VirtRegIntervals[TargetRegisterInfo::index2VirtReg(i)];
-  VirtRegIntervals.clear();
-  RegMaskSlots.clear();
-  RegMaskBits.clear();
-  RegMaskBlocks.clear();
-
-  for (LiveRange *LR : RegUnitRanges)
-    delete LR;
-  RegUnitRanges.clear();
-
-  // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
-  VNInfoAllocator.Reset();
-}
-
-bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
-  MF = &fn;
-  MRI = &MF->getRegInfo();
-  TRI = MF->getSubtarget().getRegisterInfo();
-  TII = MF->getSubtarget().getInstrInfo();
-  AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
-  Indexes = &getAnalysis<SlotIndexes>();
-  DomTree = &getAnalysis<MachineDominatorTree>();
-
-  if (!LRCalc)
-    LRCalc = new LiveRangeCalc();
-
-  // Allocate space for all virtual registers.
-  VirtRegIntervals.resize(MRI->getNumVirtRegs());
-
-  computeVirtRegs();
-  computeRegMasks();
-  computeLiveInRegUnits();
-
-  if (EnablePrecomputePhysRegs) {
-    // For stress testing, precompute live ranges of all physical register
-    // units, including reserved registers.
-    for (unsigned i = 0, e = TRI->getNumRegUnits(); i != e; ++i)
-      getRegUnit(i);
-  }
-  DEBUG(dump());
-  return true;
-}
-
-void LiveIntervals::print(raw_ostream &OS, const Module* ) const {
-  OS << "********** INTERVALS **********\n";
-
-  // Dump the regunits.
-  for (unsigned Unit = 0, UnitE = RegUnitRanges.size(); Unit != UnitE; ++Unit)
-    if (LiveRange *LR = RegUnitRanges[Unit])
-      OS << PrintRegUnit(Unit, TRI) << ' ' << *LR << '\n';
-
-  // Dump the virtregs.
-  for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
-    unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
-    if (hasInterval(Reg))
-      OS << getInterval(Reg) << '\n';
-  }
-
-  OS << "RegMasks:";
-  for (SlotIndex Idx : RegMaskSlots)
-    OS << ' ' << Idx;
-  OS << '\n';
-
-  printInstrs(OS);
-}
-
-void LiveIntervals::printInstrs(raw_ostream &OS) const {
-  OS << "********** MACHINEINSTRS **********\n";
-  MF->print(OS, Indexes);
-}
-
-#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-LLVM_DUMP_METHOD void LiveIntervals::dumpInstrs() const {
-  printInstrs(dbgs());
-}
-#endif
-
-LiveInterval* LiveIntervals::createInterval(unsigned reg) {
-  float Weight = TargetRegisterInfo::isPhysicalRegister(reg) ? huge_valf : 0.0F;
-  return new LiveInterval(reg, Weight);
-}
-
-/// Compute the live interval of a virtual register, based on defs and uses.
-void LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
-  assert(LRCalc && "LRCalc not initialized.");
-  assert(LI.empty() && "Should only compute empty intervals.");
-  LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
-  LRCalc->calculate(LI, MRI->shouldTrackSubRegLiveness(LI.reg));
-  computeDeadValues(LI, nullptr);
-}
-
-void LiveIntervals::computeVirtRegs() {
-  for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
-    unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
-    if (MRI->reg_nodbg_empty(Reg))
-      continue;
-    createAndComputeVirtRegInterval(Reg);
-  }
-}
-
-void LiveIntervals::computeRegMasks() {
-  RegMaskBlocks.resize(MF->getNumBlockIDs());
-
-  // Find all instructions with regmask operands.
-  for (const MachineBasicBlock &MBB : *MF) {
-    std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB.getNumber()];
-    RMB.first = RegMaskSlots.size();
-
-    // Some block starts, such as EH funclets, create masks.
-    if (const uint32_t *Mask = MBB.getBeginClobberMask(TRI)) {
-      RegMaskSlots.push_back(Indexes->getMBBStartIdx(&MBB));
-      RegMaskBits.push_back(Mask);
-    }
-
-    for (const MachineInstr &MI : MBB) {
-      for (const MachineOperand &MO : MI.operands()) {
-        if (!MO.isRegMask())
-          continue;
-        RegMaskSlots.push_back(Indexes->getInstructionIndex(MI).getRegSlot());
-        RegMaskBits.push_back(MO.getRegMask());
-      }
-    }
-
-    // Some block ends, such as funclet returns, create masks. Put the mask on
-    // the last instruction of the block, because MBB slot index intervals are
-    // half-open.
-    if (const uint32_t *Mask = MBB.getEndClobberMask(TRI)) {
-      assert(!MBB.empty() && "empty return block?");
-      RegMaskSlots.push_back(
-          Indexes->getInstructionIndex(MBB.back()).getRegSlot());
-      RegMaskBits.push_back(Mask);
-    }
-
-    // Compute the number of register mask instructions in this block.
-    RMB.second = RegMaskSlots.size() - RMB.first;
-  }
-}
-
-//===----------------------------------------------------------------------===//
-//                           Register Unit Liveness
-//===----------------------------------------------------------------------===//
-//
-// Fixed interference typically comes from ABI boundaries: Function arguments
-// and return values are passed in fixed registers, and so are exception
-// pointers entering landing pads. Certain instructions require values to be
-// present in specific registers. That is also represented through fixed
-// interference.
-//
-
-/// Compute the live range of a register unit, based on the uses and defs of
-/// aliasing registers.  The range should be empty, or contain only dead
-/// phi-defs from ABI blocks.
-void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) {
-  assert(LRCalc && "LRCalc not initialized.");
-  LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
-
-  // The physregs aliasing Unit are the roots and their super-registers.
-  // Create all values as dead defs before extending to uses. Note that roots
-  // may share super-registers. That's OK because createDeadDefs() is
-  // idempotent. It is very rare for a register unit to have multiple roots, so
-  // uniquing super-registers is probably not worthwhile.
-  bool IsReserved = false;
-  for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
-    bool IsRootReserved = true;
-    for (MCSuperRegIterator Super(*Root, TRI, /*IncludeSelf=*/true);
-         Super.isValid(); ++Super) {
-      unsigned Reg = *Super;
-      if (!MRI->reg_empty(Reg))
-        LRCalc->createDeadDefs(LR, Reg);
-      // A register unit is considered reserved if all its roots and all their
-      // super registers are reserved.
-      if (!MRI->isReserved(Reg))
-        IsRootReserved = false;
-    }
-    IsReserved |= IsRootReserved;
-  }
-  assert(IsReserved == MRI->isReservedRegUnit(Unit) &&
-         "reserved computation mismatch");
-
-  // Now extend LR to reach all uses.
-  // Ignore uses of reserved registers. We only track defs of those.
-  if (!IsReserved) {
-    for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
-      for (MCSuperRegIterator Super(*Root, TRI, /*IncludeSelf=*/true);
-           Super.isValid(); ++Super) {
-        unsigned Reg = *Super;
-        if (!MRI->reg_empty(Reg))
-          LRCalc->extendToUses(LR, Reg);
-      }
-    }
-  }
-
-  // Flush the segment set to the segment vector.
-  if (UseSegmentSetForPhysRegs)
-    LR.flushSegmentSet();
-}
-
-/// Precompute the live ranges of any register units that are live-in to an ABI
-/// block somewhere. Register values can appear without a corresponding def when
-/// entering the entry block or a landing pad.
-void LiveIntervals::computeLiveInRegUnits() {
-  RegUnitRanges.resize(TRI->getNumRegUnits());
-  DEBUG(dbgs() << "Computing live-in reg-units in ABI blocks.\n");
-
-  // Keep track of the live range sets allocated.
-  SmallVector<unsigned, 8> NewRanges;
-
-  // Check all basic blocks for live-ins.
-  for (const MachineBasicBlock &MBB : *MF) {
-    // We only care about ABI blocks: Entry + landing pads.
-    if ((&MBB != &MF->front() && !MBB.isEHPad()) || MBB.livein_empty())
-      continue;
-
-    // Create phi-defs at Begin for all live-in registers.
-    SlotIndex Begin = Indexes->getMBBStartIdx(&MBB);
-    DEBUG(dbgs() << Begin << "\tBB#" << MBB.getNumber());
-    for (const auto &LI : MBB.liveins()) {
-      for (MCRegUnitIterator Units(LI.PhysReg, TRI); Units.isValid(); ++Units) {
-        unsigned Unit = *Units;
-        LiveRange *LR = RegUnitRanges[Unit];
-        if (!LR) {
-          // Use segment set to speed-up initial computation of the live range.
-          LR = RegUnitRanges[Unit] = new LiveRange(UseSegmentSetForPhysRegs);
-          NewRanges.push_back(Unit);
-        }
-        VNInfo *VNI = LR->createDeadDef(Begin, getVNInfoAllocator());
-        (void)VNI;
-        DEBUG(dbgs() << ' ' << PrintRegUnit(Unit, TRI) << '#' << VNI->id);
-      }
-    }
-    DEBUG(dbgs() << '\n');
-  }
-  DEBUG(dbgs() << "Created " << NewRanges.size() << " new intervals.\n");
-
-  // Compute the 'normal' part of the ranges.
-  for (unsigned Unit : NewRanges)
-    computeRegUnitRange(*RegUnitRanges[Unit], Unit);
-}
-
-static void createSegmentsForValues(LiveRange &LR,
-    iterator_range<LiveInterval::vni_iterator> VNIs) {
-  for (VNInfo *VNI : VNIs) {
-    if (VNI->isUnused())
-      continue;
-    SlotIndex Def = VNI->def;
-    LR.addSegment(LiveRange::Segment(Def, Def.getDeadSlot(), VNI));
-  }
-}
-
-using ShrinkToUsesWorkList = SmallVector<std::pair<SlotIndex, VNInfo*>, 16>;
-
-static void extendSegmentsToUses(LiveRange &LR, const SlotIndexes &Indexes,
-                                 ShrinkToUsesWorkList &WorkList,
-                                 const LiveRange &OldRange) {
-  // Keep track of the PHIs that are in use.
-  SmallPtrSet<VNInfo*, 8> UsedPHIs;
-  // Blocks that have already been added to WorkList as live-out.
-  SmallPtrSet<const MachineBasicBlock*, 16> LiveOut;
-
-  // Extend intervals to reach all uses in WorkList.
-  while (!WorkList.empty()) {
-    SlotIndex Idx = WorkList.back().first;
-    VNInfo *VNI = WorkList.back().second;
-    WorkList.pop_back();
-    const MachineBasicBlock *MBB = Indexes.getMBBFromIndex(Idx.getPrevSlot());
-    SlotIndex BlockStart = Indexes.getMBBStartIdx(MBB);
-
-    // Extend the live range for VNI to be live at Idx.
-    if (VNInfo *ExtVNI = LR.extendInBlock(BlockStart, Idx)) {
-      assert(ExtVNI == VNI && "Unexpected existing value number");
-      (void)ExtVNI;
-      // Is this a PHIDef we haven't seen before?
-      if (!VNI->isPHIDef() || VNI->def != BlockStart ||
-          !UsedPHIs.insert(VNI).second)
-        continue;
-      // The PHI is live, make sure the predecessors are live-out.
-      for (const MachineBasicBlock *Pred : MBB->predecessors()) {
-        if (!LiveOut.insert(Pred).second)
-          continue;
-        SlotIndex Stop = Indexes.getMBBEndIdx(Pred);
-        // A predecessor is not required to have a live-out value for a PHI.
-        if (VNInfo *PVNI = OldRange.getVNInfoBefore(Stop))
-          WorkList.push_back(std::make_pair(Stop, PVNI));
-      }
-      continue;
-    }
-
-    // VNI is live-in to MBB.
-    DEBUG(dbgs() << " live-in at " << BlockStart << '\n');
-    LR.addSegment(LiveRange::Segment(BlockStart, Idx, VNI));
-
-    // Make sure VNI is live-out from the predecessors.
-    for (const MachineBasicBlock *Pred : MBB->predecessors()) {
-      if (!LiveOut.insert(Pred).second)
-        continue;
-      SlotIndex Stop = Indexes.getMBBEndIdx(Pred);
-      assert(OldRange.getVNInfoBefore(Stop) == VNI &&
-             "Wrong value out of predecessor");
-      WorkList.push_back(std::make_pair(Stop, VNI));
-    }
-  }
-}
-
-bool LiveIntervals::shrinkToUses(LiveInterval *li,
-                                 SmallVectorImpl<MachineInstr*> *dead) {
-  DEBUG(dbgs() << "Shrink: " << *li << '\n');
-  assert(TargetRegisterInfo::isVirtualRegister(li->reg)
-         && "Can only shrink virtual registers");
-
-  // Shrink subregister live ranges.
-  bool NeedsCleanup = false;
-  for (LiveInterval::SubRange &S : li->subranges()) {
-    shrinkToUses(S, li->reg);
-    if (S.empty())
-      NeedsCleanup = true;
-  }
-  if (NeedsCleanup)
-    li->removeEmptySubRanges();
-
-  // Find all the values used, including PHI kills.
-  ShrinkToUsesWorkList WorkList;
-
-  // Visit all instructions reading li->reg.
-  unsigned Reg = li->reg;
-  for (MachineInstr &UseMI : MRI->reg_instructions(Reg)) {
-    if (UseMI.isDebugValue() || !UseMI.readsVirtualRegister(Reg))
-      continue;
-    SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
-    LiveQueryResult LRQ = li->Query(Idx);
-    VNInfo *VNI = LRQ.valueIn();
-    if (!VNI) {
-      // This shouldn't happen: readsVirtualRegister returns true, but there is
-      // no live value. It is likely caused by a target getting <undef> flags
-      // wrong.
-      DEBUG(dbgs() << Idx << '\t' << UseMI
-                   << "Warning: Instr claims to read non-existent value in "
-                   << *li << '\n');
-      continue;
-    }
-    // Special case: An early-clobber tied operand reads and writes the
-    // register one slot early.
-    if (VNInfo *DefVNI = LRQ.valueDefined())
-      Idx = DefVNI->def;
-
-    WorkList.push_back(std::make_pair(Idx, VNI));
-  }
-
-  // Create new live ranges with only minimal live segments per def.
-  LiveRange NewLR;
-  createSegmentsForValues(NewLR, make_range(li->vni_begin(), li->vni_end()));
-  extendSegmentsToUses(NewLR, *Indexes, WorkList, *li);
-
-  // Move the trimmed segments back.
-  li->segments.swap(NewLR.segments);
-
-  // Handle dead values.
-  bool CanSeparate = computeDeadValues(*li, dead);
-  DEBUG(dbgs() << "Shrunk: " << *li << '\n');
-  return CanSeparate;
-}
-
-bool LiveIntervals::computeDeadValues(LiveInterval &LI,
-                                      SmallVectorImpl<MachineInstr*> *dead) {
-  bool MayHaveSplitComponents = false;
-  for (VNInfo *VNI : LI.valnos) {
-    if (VNI->isUnused())
-      continue;
-    SlotIndex Def = VNI->def;
-    LiveRange::iterator I = LI.FindSegmentContaining(Def);
-    assert(I != LI.end() && "Missing segment for VNI");
-
-    // Is the register live before? Otherwise we may have to add a read-undef
-    // flag for subregister defs.
-    unsigned VReg = LI.reg;
-    if (MRI->shouldTrackSubRegLiveness(VReg)) {
-      if ((I == LI.begin() || std::prev(I)->end < Def) && !VNI->isPHIDef()) {
-        MachineInstr *MI = getInstructionFromIndex(Def);
-        MI->setRegisterDefReadUndef(VReg);
-      }
-    }
-
-    if (I->end != Def.getDeadSlot())
-      continue;
-    if (VNI->isPHIDef()) {
-      // This is a dead PHI. Remove it.
-      VNI->markUnused();
-      LI.removeSegment(I);
-      DEBUG(dbgs() << "Dead PHI at " << Def << " may separate interval\n");
-      MayHaveSplitComponents = true;
-    } else {
-      // This is a dead def. Make sure the instruction knows.
-      MachineInstr *MI = getInstructionFromIndex(Def);
-      assert(MI && "No instruction defining live value");
-      MI->addRegisterDead(LI.reg, TRI);
-      if (dead && MI->allDefsAreDead()) {
-        DEBUG(dbgs() << "All defs dead: " << Def << '\t' << *MI);
-        dead->push_back(MI);
-      }
-    }
-  }
-  return MayHaveSplitComponents;
-}
-
-void LiveIntervals::shrinkToUses(LiveInterval::SubRange &SR, unsigned Reg) {
-  DEBUG(dbgs() << "Shrink: " << SR << '\n');
-  assert(TargetRegisterInfo::isVirtualRegister(Reg)
-         && "Can only shrink virtual registers");
-  // Find all the values used, including PHI kills.
-  ShrinkToUsesWorkList WorkList;
-
-  // Visit all instructions reading Reg.
-  SlotIndex LastIdx;
-  for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
-    // Skip "undef" uses.
-    if (!MO.readsReg())
-      continue;
-    // Maybe the operand is for a subregister we don't care about.
-    unsigned SubReg = MO.getSubReg();
-    if (SubReg != 0) {
-      LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg);
-      if ((LaneMask & SR.LaneMask).none())
-        continue;
-    }
-    // We only need to visit each instruction once.
-    MachineInstr *UseMI = MO.getParent();
-    SlotIndex Idx = getInstructionIndex(*UseMI).getRegSlot();
-    if (Idx == LastIdx)
-      continue;
-    LastIdx = Idx;
-
-    LiveQueryResult LRQ = SR.Query(Idx);
-    VNInfo *VNI = LRQ.valueIn();
-    // For Subranges it is possible that only undef values are left in that
-    // part of the subregister, so there is no real liverange at the use
-    if (!VNI)
-      continue;
-
-    // Special case: An early-clobber tied operand reads and writes the
-    // register one slot early.
-    if (VNInfo *DefVNI = LRQ.valueDefined())
-      Idx = DefVNI->def;
-
-    WorkList.push_back(std::make_pair(Idx, VNI));
-  }
-
-  // Create a new live ranges with only minimal live segments per def.
-  LiveRange NewLR;
-  createSegmentsForValues(NewLR, make_range(SR.vni_begin(), SR.vni_end()));
-  extendSegmentsToUses(NewLR, *Indexes, WorkList, SR);
-
-  // Move the trimmed ranges back.
-  SR.segments.swap(NewLR.segments);
-
-  // Remove dead PHI value numbers
-  for (VNInfo *VNI : SR.valnos) {
-    if (VNI->isUnused())
-      continue;
-    const LiveRange::Segment *Segment = SR.getSegmentContaining(VNI->def);
-    assert(Segment != nullptr && "Missing segment for VNI");
-    if (Segment->end != VNI->def.getDeadSlot())
-      continue;
-    if (VNI->isPHIDef()) {
-      // This is a dead PHI. Remove it.
-      DEBUG(dbgs() << "Dead PHI at " << VNI->def << " may separate interval\n");
-      VNI->markUnused();
-      SR.removeSegment(*Segment);
-    }
-  }
-
-  DEBUG(dbgs() << "Shrunk: " << SR << '\n');
-}
-
-void LiveIntervals::extendToIndices(LiveRange &LR,
-                                    ArrayRef<SlotIndex> Indices,
-                                    ArrayRef<SlotIndex> Undefs) {
-  assert(LRCalc && "LRCalc not initialized.");
-  LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
-  for (SlotIndex Idx : Indices)
-    LRCalc->extend(LR, Idx, /*PhysReg=*/0, Undefs);
-}
-
-void LiveIntervals::pruneValue(LiveRange &LR, SlotIndex Kill,
-                               SmallVectorImpl<SlotIndex> *EndPoints) {
-  LiveQueryResult LRQ = LR.Query(Kill);
-  VNInfo *VNI = LRQ.valueOutOrDead();
-  if (!VNI)
-    return;
-
-  MachineBasicBlock *KillMBB = Indexes->getMBBFromIndex(Kill);
-  SlotIndex MBBEnd = Indexes->getMBBEndIdx(KillMBB);
-
-  // If VNI isn't live out from KillMBB, the value is trivially pruned.
-  if (LRQ.endPoint() < MBBEnd) {
-    LR.removeSegment(Kill, LRQ.endPoint());
-    if (EndPoints) EndPoints->push_back(LRQ.endPoint());
-    return;
-  }
-
-  // VNI is live out of KillMBB.
-  LR.removeSegment(Kill, MBBEnd);
-  if (EndPoints) EndPoints->push_back(MBBEnd);
-
-  // Find all blocks that are reachable from KillMBB without leaving VNI's live
-  // range. It is possible that KillMBB itself is reachable, so start a DFS
-  // from each successor.
-  using VisitedTy = df_iterator_default_set<MachineBasicBlock*,9>;
-  VisitedTy Visited;
-  for (MachineBasicBlock *Succ : KillMBB->successors()) {
-    for (df_ext_iterator<MachineBasicBlock*, VisitedTy>
-         I = df_ext_begin(Succ, Visited), E = df_ext_end(Succ, Visited);
-         I != E;) {
-      MachineBasicBlock *MBB = *I;
-
-      // Check if VNI is live in to MBB.
-      SlotIndex MBBStart, MBBEnd;
-      std::tie(MBBStart, MBBEnd) = Indexes->getMBBRange(MBB);
-      LiveQueryResult LRQ = LR.Query(MBBStart);
-      if (LRQ.valueIn() != VNI) {
-        // This block isn't part of the VNI segment. Prune the search.
-        I.skipChildren();
-        continue;
-      }
-
-      // Prune the search if VNI is killed in MBB.
-      if (LRQ.endPoint() < MBBEnd) {
-        LR.removeSegment(MBBStart, LRQ.endPoint());
-        if (EndPoints) EndPoints->push_back(LRQ.endPoint());
-        I.skipChildren();
-        continue;
-      }
-
-      // VNI is live through MBB.
-      LR.removeSegment(MBBStart, MBBEnd);
-      if (EndPoints) EndPoints->push_back(MBBEnd);
-      ++I;
-    }
-  }
-}
-
-//===----------------------------------------------------------------------===//
-// Register allocator hooks.
-//
-
-void LiveIntervals::addKillFlags(const VirtRegMap *VRM) {
-  // Keep track of regunit ranges.
-  SmallVector<std::pair<const LiveRange*, LiveRange::const_iterator>, 8> RU;
-  // Keep track of subregister ranges.
-  SmallVector<std::pair<const LiveInterval::SubRange*,
-                        LiveRange::const_iterator>, 4> SRs;
-
-  for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
-    unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
-    if (MRI->reg_nodbg_empty(Reg))
-      continue;
-    const LiveInterval &LI = getInterval(Reg);
-    if (LI.empty())
-      continue;
-
-    // Find the regunit intervals for the assigned register. They may overlap
-    // the virtual register live range, cancelling any kills.
-    RU.clear();
-    for (MCRegUnitIterator Unit(VRM->getPhys(Reg), TRI); Unit.isValid();
-         ++Unit) {
-      const LiveRange &RURange = getRegUnit(*Unit);
-      if (RURange.empty())
-        continue;
-      RU.push_back(std::make_pair(&RURange, RURange.find(LI.begin()->end)));
-    }
-
-    if (MRI->subRegLivenessEnabled()) {
-      SRs.clear();
-      for (const LiveInterval::SubRange &SR : LI.subranges()) {
-        SRs.push_back(std::make_pair(&SR, SR.find(LI.begin()->end)));
-      }
-    }
-
-    // Every instruction that kills Reg corresponds to a segment range end
-    // point.
-    for (LiveInterval::const_iterator RI = LI.begin(), RE = LI.end(); RI != RE;
-         ++RI) {
-      // A block index indicates an MBB edge.
-      if (RI->end.isBlock())
-        continue;
-      MachineInstr *MI = getInstructionFromIndex(RI->end);
-      if (!MI)
-        continue;
-
-      // Check if any of the regunits are live beyond the end of RI. That could
-      // happen when a physreg is defined as a copy of a virtreg:
-      //
-      //   %EAX = COPY %vreg5
-      //   FOO %vreg5         <--- MI, cancel kill because %EAX is live.
-      //   BAR %EAX<kill>
-      //
-      // There should be no kill flag on FOO when %vreg5 is rewritten as %EAX.
-      for (auto &RUP : RU) {
-        const LiveRange &RURange = *RUP.first;
-        LiveRange::const_iterator &I = RUP.second;
-        if (I == RURange.end())
-          continue;
-        I = RURange.advanceTo(I, RI->end);
-        if (I == RURange.end() || I->start >= RI->end)
-          continue;
-        // I is overlapping RI.
-        goto CancelKill;
-      }
-
-      if (MRI->subRegLivenessEnabled()) {
-        // When reading a partial undefined value we must not add a kill flag.
-        // The regalloc might have used the undef lane for something else.
-        // Example:
-        //     %vreg1 = ...              ; R32: %vreg1
-        //     %vreg2:high16 = ...       ; R64: %vreg2
-        //        = read %vreg2<kill>    ; R64: %vreg2
-        //        = read %vreg1          ; R32: %vreg1
-        // The <kill> flag is correct for %vreg2, but the register allocator may
-        // assign R0L to %vreg1, and R0 to %vreg2 because the low 32bits of R0
-        // are actually never written by %vreg2. After assignment the <kill>
-        // flag at the read instruction is invalid.
-        LaneBitmask DefinedLanesMask;
-        if (!SRs.empty()) {
-          // Compute a mask of lanes that are defined.
-          DefinedLanesMask = LaneBitmask::getNone();
-          for (auto &SRP : SRs) {
-            const LiveInterval::SubRange &SR = *SRP.first;
-            LiveRange::const_iterator &I = SRP.second;
-            if (I == SR.end())
-              continue;
-            I = SR.advanceTo(I, RI->end);
-            if (I == SR.end() || I->start >= RI->end)
-              continue;
-            // I is overlapping RI
-            DefinedLanesMask |= SR.LaneMask;
-          }
-        } else
-          DefinedLanesMask = LaneBitmask::getAll();
-
-        bool IsFullWrite = false;
-        for (const MachineOperand &MO : MI->operands()) {
-          if (!MO.isReg() || MO.getReg() != Reg)
-            continue;
-          if (MO.isUse()) {
-            // Reading any undefined lanes?
-            LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(MO.getSubReg());
-            if ((UseMask & ~DefinedLanesMask).any())
-              goto CancelKill;
-          } else if (MO.getSubReg() == 0) {
-            // Writing to the full register?
-            assert(MO.isDef());
-            IsFullWrite = true;
-          }
-        }
-
-        // If an instruction writes to a subregister, a new segment starts in
-        // the LiveInterval. But as this is only overriding part of the register
-        // adding kill-flags is not correct here after registers have been
-        // assigned.
-        if (!IsFullWrite) {
-          // Next segment has to be adjacent in the subregister write case.
-          LiveRange::const_iterator N = std::next(RI);
-          if (N != LI.end() && N->start == RI->end)
-            goto CancelKill;
-        }
-      }
-
-      MI->addRegisterKilled(Reg, nullptr);
-      continue;
-CancelKill:
-      MI->clearRegisterKills(Reg, nullptr);
-    }
-  }
-}
-
-MachineBasicBlock*
-LiveIntervals::intervalIsInOneMBB(const LiveInterval &LI) const {
-  // A local live range must be fully contained inside the block, meaning it is
-  // defined and killed at instructions, not at block boundaries. It is not
-  // live in or or out of any block.
-  //
-  // It is technically possible to have a PHI-defined live range identical to a
-  // single block, but we are going to return false in that case.
-
-  SlotIndex Start = LI.beginIndex();
-  if (Start.isBlock())
-    return nullptr;
-
-  SlotIndex Stop = LI.endIndex();
-  if (Stop.isBlock())
-    return nullptr;
-
-  // getMBBFromIndex doesn't need to search the MBB table when both indexes
-  // belong to proper instructions.
-  MachineBasicBlock *MBB1 = Indexes->getMBBFromIndex(Start);
-  MachineBasicBlock *MBB2 = Indexes->getMBBFromIndex(Stop);
-  return MBB1 == MBB2 ? MBB1 : nullptr;
-}
-
-bool
-LiveIntervals::hasPHIKill(const LiveInterval &LI, const VNInfo *VNI) const {
-  for (const VNInfo *PHI : LI.valnos) {
-    if (PHI->isUnused() || !PHI->isPHIDef())
-      continue;
-    const MachineBasicBlock *PHIMBB = getMBBFromIndex(PHI->def);
-    // Conservatively return true instead of scanning huge predecessor lists.
-    if (PHIMBB->pred_size() > 100)
-      return true;
-    for (const MachineBasicBlock *Pred : PHIMBB->predecessors())
-      if (VNI == LI.getVNInfoBefore(Indexes->getMBBEndIdx(Pred)))
-        return true;
-  }
-  return false;
-}
-
-float LiveIntervals::getSpillWeight(bool isDef, bool isUse,
-                                    const MachineBlockFrequencyInfo *MBFI,
-                                    const MachineInstr &MI) {
-  BlockFrequency Freq = MBFI->getBlockFreq(MI.getParent());
-  const float Scale = 1.0f / MBFI->getEntryFreq();
-  return (isDef + isUse) * (Freq.getFrequency() * Scale);
-}
-
-LiveRange::Segment
-LiveIntervals::addSegmentToEndOfBlock(unsigned reg, MachineInstr &startInst) {
-  LiveInterval& Interval = createEmptyInterval(reg);
-  VNInfo *VN = Interval.getNextValue(
-      SlotIndex(getInstructionIndex(startInst).getRegSlot()),
-      getVNInfoAllocator());
-  LiveRange::Segment S(SlotIndex(getInstructionIndex(startInst).getRegSlot()),
-                       getMBBEndIdx(startInst.getParent()), VN);
-  Interval.addSegment(S);
-
-  return S;
-}
-
-//===----------------------------------------------------------------------===//
-//                          Register mask functions
-//===----------------------------------------------------------------------===//
-
-bool LiveIntervals::checkRegMaskInterference(LiveInterval &LI,
-                                             BitVector &UsableRegs) {
-  if (LI.empty())
-    return false;
-  LiveInterval::iterator LiveI = LI.begin(), LiveE = LI.end();
-
-  // Use a smaller arrays for local live ranges.
-  ArrayRef<SlotIndex> Slots;
-  ArrayRef<const uint32_t*> Bits;
-  if (MachineBasicBlock *MBB = intervalIsInOneMBB(LI)) {
-    Slots = getRegMaskSlotsInBlock(MBB->getNumber());
-    Bits = getRegMaskBitsInBlock(MBB->getNumber());
-  } else {
-    Slots = getRegMaskSlots();
-    Bits = getRegMaskBits();
-  }
-
-  // We are going to enumerate all the register mask slots contained in LI.
-  // Start with a binary search of RegMaskSlots to find a starting point.
-  ArrayRef<SlotIndex>::iterator SlotI =
-    std::lower_bound(Slots.begin(), Slots.end(), LiveI->start);
-  ArrayRef<SlotIndex>::iterator SlotE = Slots.end();
-
-  // No slots in range, LI begins after the last call.
-  if (SlotI == SlotE)
-    return false;
-
-  bool Found = false;
-  while (true) {
-    assert(*SlotI >= LiveI->start);
-    // Loop over all slots overlapping this segment.
-    while (*SlotI < LiveI->end) {
-      // *SlotI overlaps LI. Collect mask bits.
-      if (!Found) {
-        // This is the first overlap. Initialize UsableRegs to all ones.
-        UsableRegs.clear();
-        UsableRegs.resize(TRI->getNumRegs(), true);
-        Found = true;
-      }
-      // Remove usable registers clobbered by this mask.
-      UsableRegs.clearBitsNotInMask(Bits[SlotI-Slots.begin()]);
-      if (++SlotI == SlotE)
-        return Found;
-    }
-    // *SlotI is beyond the current LI segment.
-    LiveI = LI.advanceTo(LiveI, *SlotI);
-    if (LiveI == LiveE)
-      return Found;
-    // Advance SlotI until it overlaps.
-    while (*SlotI < LiveI->start)
-      if (++SlotI == SlotE)
-        return Found;
-  }
-}
-
-//===----------------------------------------------------------------------===//
-//                         IntervalUpdate class.
-//===----------------------------------------------------------------------===//
-
-/// Toolkit used by handleMove to trim or extend live intervals.
-class LiveIntervals::HMEditor {
-private:
-  LiveIntervals& LIS;
-  const MachineRegisterInfo& MRI;
-  const TargetRegisterInfo& TRI;
-  SlotIndex OldIdx;
-  SlotIndex NewIdx;
-  SmallPtrSet<LiveRange*, 8> Updated;
-  bool UpdateFlags;
-
-public:
-  HMEditor(LiveIntervals& LIS, const MachineRegisterInfo& MRI,
-           const TargetRegisterInfo& TRI,
-           SlotIndex OldIdx, SlotIndex NewIdx, bool UpdateFlags)
-    : LIS(LIS), MRI(MRI), TRI(TRI), OldIdx(OldIdx), NewIdx(NewIdx),
-      UpdateFlags(UpdateFlags) {}
-
-  // FIXME: UpdateFlags is a workaround that creates live intervals for all
-  // physregs, even those that aren't needed for regalloc, in order to update
-  // kill flags. This is wasteful. Eventually, LiveVariables will strip all kill
-  // flags, and postRA passes will use a live register utility instead.
-  LiveRange *getRegUnitLI(unsigned Unit) {
-    if (UpdateFlags && !MRI.isReservedRegUnit(Unit))
-      return &LIS.getRegUnit(Unit);
-    return LIS.getCachedRegUnit(Unit);
-  }
-
-  /// Update all live ranges touched by MI, assuming a move from OldIdx to
-  /// NewIdx.
-  void updateAllRanges(MachineInstr *MI) {
-    DEBUG(dbgs() << "handleMove " << OldIdx << " -> " << NewIdx << ": " << *MI);
-    bool hasRegMask = false;
-    for (MachineOperand &MO : MI->operands()) {
-      if (MO.isRegMask())
-        hasRegMask = true;
-      if (!MO.isReg())
-        continue;
-      if (MO.isUse()) {
-        if (!MO.readsReg())
-          continue;
-        // Aggressively clear all kill flags.
-        // They are reinserted by VirtRegRewriter.
-        MO.setIsKill(false);
-      }
-
-      unsigned Reg = MO.getReg();
-      if (!Reg)
-        continue;
-      if (TargetRegisterInfo::isVirtualRegister(Reg)) {
-        LiveInterval &LI = LIS.getInterval(Reg);
-        if (LI.hasSubRanges()) {
-          unsigned SubReg = MO.getSubReg();
-          LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg)
-                                        : MRI.getMaxLaneMaskForVReg(Reg);
-          for (LiveInterval::SubRange &S : LI.subranges()) {
-            if ((S.LaneMask & LaneMask).none())
-              continue;
-            updateRange(S, Reg, S.LaneMask);
-          }
-        }
-        updateRange(LI, Reg, LaneBitmask::getNone());
-        continue;
-      }
-
-      // For physregs, only update the regunits that actually have a
-      // precomputed live range.
-      for (MCRegUnitIterator Units(Reg, &TRI); Units.isValid(); ++Units)
-        if (LiveRange *LR = getRegUnitLI(*Units))
-          updateRange(*LR, *Units, LaneBitmask::getNone());
-    }
-    if (hasRegMask)
-      updateRegMaskSlots();
-  }
-
-private:
-  /// Update a single live range, assuming an instruction has been moved from
-  /// OldIdx to NewIdx.
-  void updateRange(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) {
-    if (!Updated.insert(&LR).second)
-      return;
-    DEBUG({
-      dbgs() << "     ";
-      if (TargetRegisterInfo::isVirtualRegister(Reg)) {
-        dbgs() << PrintReg(Reg);
-        if (LaneMask.any())
-          dbgs() << " L" << PrintLaneMask(LaneMask);
-      } else {
-        dbgs() << PrintRegUnit(Reg, &TRI);
-      }
-      dbgs() << ":\t" << LR << '\n';
-    });
-    if (SlotIndex::isEarlierInstr(OldIdx, NewIdx))
-      handleMoveDown(LR);
-    else
-      handleMoveUp(LR, Reg, LaneMask);
-    DEBUG(dbgs() << "        -->\t" << LR << '\n');
-    LR.verify();
-  }
-
-  /// Update LR to reflect an instruction has been moved downwards from OldIdx
-  /// to NewIdx (OldIdx < NewIdx).
-  void handleMoveDown(LiveRange &LR) {
-    LiveRange::iterator E = LR.end();
-    // Segment going into OldIdx.
-    LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex());
-
-    // No value live before or after OldIdx? Nothing to do.
-    if (OldIdxIn == E || SlotIndex::isEarlierInstr(OldIdx, OldIdxIn->start))
-      return;
-
-    LiveRange::iterator OldIdxOut;
-    // Do we have a value live-in to OldIdx?
-    if (SlotIndex::isEarlierInstr(OldIdxIn->start, OldIdx)) {
-      // If the live-in value already extends to NewIdx, there is nothing to do.
-      if (SlotIndex::isEarlierEqualInstr(NewIdx, OldIdxIn->end))
-        return;
-      // Aggressively remove all kill flags from the old kill point.
-      // Kill flags shouldn't be used while live intervals exist, they will be
-      // reinserted by VirtRegRewriter.
-      if (MachineInstr *KillMI = LIS.getInstructionFromIndex(OldIdxIn->end))
-        for (MIBundleOperands MO(*KillMI); MO.isValid(); ++MO)
-          if (MO->isReg() && MO->isUse())
-            MO->setIsKill(false);
-
-      // Is there a def before NewIdx which is not OldIdx?
-      LiveRange::iterator Next = std::next(OldIdxIn);
-      if (Next != E && !SlotIndex::isSameInstr(OldIdx, Next->start) &&
-          SlotIndex::isEarlierInstr(Next->start, NewIdx)) {
-        // If we are here then OldIdx was just a use but not a def. We only have
-        // to ensure liveness extends to NewIdx.
-        LiveRange::iterator NewIdxIn =
-          LR.advanceTo(Next, NewIdx.getBaseIndex());
-        // Extend the segment before NewIdx if necessary.
-        if (NewIdxIn == E ||
-            !SlotIndex::isEarlierInstr(NewIdxIn->start, NewIdx)) {
-          LiveRange::iterator Prev = std::prev(NewIdxIn);
-          Prev->end = NewIdx.getRegSlot();
-        }
-        // Extend OldIdxIn.
-        OldIdxIn->end = Next->start;
-        return;
-      }
-
-      // Adjust OldIdxIn->end to reach NewIdx. This may temporarily make LR
-      // invalid by overlapping ranges.
-      bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end);
-      OldIdxIn->end = NewIdx.getRegSlot(OldIdxIn->end.isEarlyClobber());
-      // If this was not a kill, then there was no def and we're done.
-      if (!isKill)
-        return;
-
-      // Did we have a Def at OldIdx?
-      OldIdxOut = Next;
-      if (OldIdxOut == E || !SlotIndex::isSameInstr(OldIdx, OldIdxOut->start))
-        return;
-    } else {
-      OldIdxOut = OldIdxIn;
-    }
-
-    // If we are here then there is a Definition at OldIdx. OldIdxOut points
-    // to the segment starting there.
-    assert(OldIdxOut != E && SlotIndex::isSameInstr(OldIdx, OldIdxOut->start) &&
-           "No def?");
-    VNInfo *OldIdxVNI = OldIdxOut->valno;
-    assert(OldIdxVNI->def == OldIdxOut->start && "Inconsistent def");
-
-    // If the defined value extends beyond NewIdx, just move the beginning
-    // of the segment to NewIdx.
-    SlotIndex NewIdxDef = NewIdx.getRegSlot(OldIdxOut->start.isEarlyClobber());
-    if (SlotIndex::isEarlierInstr(NewIdxDef, OldIdxOut->end)) {
-      OldIdxVNI->def = NewIdxDef;
-      OldIdxOut->start = OldIdxVNI->def;
-      return;
-    }
-
-    // If we are here then we have a Definition at OldIdx which ends before
-    // NewIdx.
-
-    // Is there an existing Def at NewIdx?
-    LiveRange::iterator AfterNewIdx
-      = LR.advanceTo(OldIdxOut, NewIdx.getRegSlot());
-    bool OldIdxDefIsDead = OldIdxOut->end.isDead();
-    if (!OldIdxDefIsDead &&
-        SlotIndex::isEarlierInstr(OldIdxOut->end, NewIdxDef)) {
-      // OldIdx is not a dead def, and NewIdxDef is inside a new interval.
-      VNInfo *DefVNI;
-      if (OldIdxOut != LR.begin() &&
-          !SlotIndex::isEarlierInstr(std::prev(OldIdxOut)->end,
-                                     OldIdxOut->start)) {
-        // There is no gap between OldIdxOut and its predecessor anymore,
-        // merge them.
-        LiveRange::iterator IPrev = std::prev(OldIdxOut);
-        DefVNI = OldIdxVNI;
-        IPrev->end = OldIdxOut->end;
-      } else {
-        // The value is live in to OldIdx
-        LiveRange::iterator INext = std::next(OldIdxOut);
-        assert(INext != E && "Must have following segment");
-        // We merge OldIdxOut and its successor. As we're dealing with subreg
-        // reordering, there is always a successor to OldIdxOut in the same BB
-        // We don't need INext->valno anymore and will reuse for the new segment
-        // we create later.
-        DefVNI = OldIdxVNI;
-        INext->start = OldIdxOut->end;
-        INext->valno->def = INext->start;
-      }
-      // If NewIdx is behind the last segment, extend that and append a new one.
-      if (AfterNewIdx == E) {
-        // OldIdxOut is undef at this point, Slide (OldIdxOut;AfterNewIdx] up
-        // one position.
-        //    |-  ?/OldIdxOut -| |- X0 -| ... |- Xn -| end
-        // => |- X0/OldIdxOut -| ... |- Xn -| |- undef/NewS -| end
-        std::copy(std::next(OldIdxOut), E, OldIdxOut);
-        // The last segment is undefined now, reuse it for a dead def.
-        LiveRange::iterator NewSegment = std::prev(E);
-        *NewSegment = LiveRange::Segment(NewIdxDef, NewIdxDef.getDeadSlot(),
-                                         DefVNI);
-        DefVNI->def = NewIdxDef;
-
-        LiveRange::iterator Prev = std::prev(NewSegment);
-        Prev->end = NewIdxDef;
-      } else {
-        // OldIdxOut is undef at this point, Slide (OldIdxOut;AfterNewIdx] up
-        // one position.
-        //    |-  ?/OldIdxOut -| |- X0 -| ... |- Xn/AfterNewIdx -| |- Next -|
-        // => |- X0/OldIdxOut -| ... |- Xn -| |- Xn/AfterNewIdx -| |- Next -|
-        std::copy(std::next(OldIdxOut), std::next(AfterNewIdx), OldIdxOut);
-        LiveRange::iterator Prev = std::prev(AfterNewIdx);
-        // We have two cases:
-        if (SlotIndex::isEarlierInstr(Prev->start, NewIdxDef)) {
-          // Case 1: NewIdx is inside a liverange. Split this liverange at
-          // NewIdxDef into the segment "Prev" followed by "NewSegment".
-          LiveRange::iterator NewSegment = AfterNewIdx;
-          *NewSegment = LiveRange::Segment(NewIdxDef, Prev->end, Prev->valno);
-          Prev->valno->def = NewIdxDef;
-
-          *Prev = LiveRange::Segment(Prev->start, NewIdxDef, DefVNI);
-          DefVNI->def = Prev->start;
-        } else {
-          // Case 2: NewIdx is in a lifetime hole. Keep AfterNewIdx as is and
-          // turn Prev into a segment from NewIdx to AfterNewIdx->start.
-          *Prev = LiveRange::Segment(NewIdxDef, AfterNewIdx->start, DefVNI);
-          DefVNI->def = NewIdxDef;
-          assert(DefVNI != AfterNewIdx->valno);
-        }
-      }
-      return;
-    }
-
-    if (AfterNewIdx != E &&
-        SlotIndex::isSameInstr(AfterNewIdx->start, NewIdxDef)) {
-      // There is an existing def at NewIdx. The def at OldIdx is coalesced into
-      // that value.
-      assert(AfterNewIdx->valno != OldIdxVNI && "Multiple defs of value?");
-      LR.removeValNo(OldIdxVNI);
-    } else {
-      // There was no existing def at NewIdx. We need to create a dead def
-      // at NewIdx. Shift segments over the old OldIdxOut segment, this frees
-      // a new segment at the place where we want to construct the dead def.
-      //    |- OldIdxOut -| |- X0 -| ... |- Xn -| |- AfterNewIdx -|
-      // => |- X0/OldIdxOut -| ... |- Xn -| |- undef/NewS. -| |- AfterNewIdx -|
-      assert(AfterNewIdx != OldIdxOut && "Inconsistent iterators");
-      std::copy(std::next(OldIdxOut), AfterNewIdx, OldIdxOut);
-      // We can reuse OldIdxVNI now.
-      LiveRange::iterator NewSegment = std::prev(AfterNewIdx);
-      VNInfo *NewSegmentVNI = OldIdxVNI;
-      NewSegmentVNI->def = NewIdxDef;
-      *NewSegment = LiveRange::Segment(NewIdxDef, NewIdxDef.getDeadSlot(),
-                                       NewSegmentVNI);
-    }
-  }
-
-  /// Update LR to reflect an instruction has been moved upwards from OldIdx
-  /// to NewIdx (NewIdx < OldIdx).
-  void handleMoveUp(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) {
-    LiveRange::iterator E = LR.end();
-    // Segment going into OldIdx.
-    LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex());
-
-    // No value live before or after OldIdx? Nothing to do.
-    if (OldIdxIn == E || SlotIndex::isEarlierInstr(OldIdx, OldIdxIn->start))
-      return;
-
-    LiveRange::iterator OldIdxOut;
-    // Do we have a value live-in to OldIdx?
-    if (SlotIndex::isEarlierInstr(OldIdxIn->start, OldIdx)) {
-      // If the live-in value isn't killed here, then we have no Def at
-      // OldIdx, moreover the value must be live at NewIdx so there is nothing
-      // to do.
-      bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end);
-      if (!isKill)
-        return;
-
-      // At this point we have to move OldIdxIn->end back to the nearest
-      // previous use or (dead-)def but no further than NewIdx.
-      SlotIndex DefBeforeOldIdx
-        = std::max(OldIdxIn->start.getDeadSlot(),
-                   NewIdx.getRegSlot(OldIdxIn->end.isEarlyClobber()));
-      OldIdxIn->end = findLastUseBefore(DefBeforeOldIdx, Reg, LaneMask);
-
-      // Did we have a Def at OldIdx? If not we are done now.
-      OldIdxOut = std::next(OldIdxIn);
-      if (OldIdxOut == E || !SlotIndex::isSameInstr(OldIdx, OldIdxOut->start))
-        return;
-    } else {
-      OldIdxOut = OldIdxIn;
-      OldIdxIn = OldIdxOut != LR.begin() ? std::prev(OldIdxOut) : E;
-    }
-
-    // If we are here then there is a Definition at OldIdx. OldIdxOut points
-    // to the segment starting there.
-    assert(OldIdxOut != E && SlotIndex::isSameInstr(OldIdx, OldIdxOut->start) &&
-           "No def?");
-    VNInfo *OldIdxVNI = OldIdxOut->valno;
-    assert(OldIdxVNI->def == OldIdxOut->start && "Inconsistent def");
-    bool OldIdxDefIsDead = OldIdxOut->end.isDead();
-
-    // Is there an existing def at NewIdx?
-    SlotIndex NewIdxDef = NewIdx.getRegSlot(OldIdxOut->start.isEarlyClobber());
-    LiveRange::iterator NewIdxOut = LR.find(NewIdx.getRegSlot());
-    if (SlotIndex::isSameInstr(NewIdxOut->start, NewIdx)) {
-      assert(NewIdxOut->valno != OldIdxVNI &&
-             "Same value defined more than once?");
-      // If OldIdx was a dead def remove it.
-      if (!OldIdxDefIsDead) {
-        // Remove segment starting at NewIdx and move begin of OldIdxOut to
-        // NewIdx so it can take its place.
-        OldIdxVNI->def = NewIdxDef;
-        OldIdxOut->start = NewIdxDef;
-        LR.removeValNo(NewIdxOut->valno);
-      } else {
-        // Simply remove the dead def at OldIdx.
-        LR.removeValNo(OldIdxVNI);
-      }
-    } else {
-      // Previously nothing was live after NewIdx, so all we have to do now is
-      // move the begin of OldIdxOut to NewIdx.
-      if (!OldIdxDefIsDead) {
-        // Do we have any intermediate Defs between OldIdx and NewIdx?
-        if (OldIdxIn != E &&
-            SlotIndex::isEarlierInstr(NewIdxDef, OldIdxIn->start)) {
-          // OldIdx is not a dead def and NewIdx is before predecessor start.
-          LiveRange::iterator NewIdxIn = NewIdxOut;
-          assert(NewIdxIn == LR.find(NewIdx.getBaseIndex()));
-          const SlotIndex SplitPos = NewIdxDef;
-          OldIdxVNI = OldIdxIn->valno;
-
-          // Merge the OldIdxIn and OldIdxOut segments into OldIdxOut.
-          OldIdxOut->valno->def = OldIdxIn->start;
-          *OldIdxOut = LiveRange::Segment(OldIdxIn->start, OldIdxOut->end,
-                                          OldIdxOut->valno);
-          // OldIdxIn and OldIdxVNI are now undef and can be overridden.
-          // We Slide [NewIdxIn, OldIdxIn) down one position.
-          //    |- X0/NewIdxIn -| ... |- Xn-1 -||- Xn/OldIdxIn -||- OldIdxOut -|
-          // => |- undef/NexIdxIn -| |- X0 -| ... |- Xn-1 -| |- Xn/OldIdxOut -|
-          std::copy_backward(NewIdxIn, OldIdxIn, OldIdxOut);
-          // NewIdxIn is now considered undef so we can reuse it for the moved
-          // value.
-          LiveRange::iterator NewSegment = NewIdxIn;
-          LiveRange::iterator Next = std::next(NewSegment);
-          if (SlotIndex::isEarlierInstr(Next->start, NewIdx)) {
-            // There is no gap between NewSegment and its predecessor.
-            *NewSegment = LiveRange::Segment(Next->start, SplitPos,
-                                             Next->valno);
-            *Next = LiveRange::Segment(SplitPos, Next->end, OldIdxVNI);
-            Next->valno->def = SplitPos;
-          } else {
-            // There is a gap between NewSegment and its predecessor
-            // Value becomes live in.
-            *NewSegment = LiveRange::Segment(SplitPos, Next->start, OldIdxVNI);
-            NewSegment->valno->def = SplitPos;
-          }
-        } else {
-          // Leave the end point of a live def.
-          OldIdxOut->start = NewIdxDef;
-          OldIdxVNI->def = NewIdxDef;
-          if (OldIdxIn != E && SlotIndex::isEarlierInstr(NewIdx, OldIdxIn->end))
-            OldIdxIn->end = NewIdx.getRegSlot();
-        }
-      } else {
-        // OldIdxVNI is a dead def. It may have been moved across other values
-        // in LR, so move OldIdxOut up to NewIdxOut. Slide [NewIdxOut;OldIdxOut)
-        // down one position.
-        //    |- X0/NewIdxOut -| ... |- Xn-1 -| |- Xn/OldIdxOut -| |- next - |
-        // => |- undef/NewIdxOut -| |- X0 -| ... |- Xn-1 -| |- next -|
-        std::copy_backward(NewIdxOut, OldIdxOut, std::next(OldIdxOut));
-        // OldIdxVNI can be reused now to build a new dead def segment.
-        LiveRange::iterator NewSegment = NewIdxOut;
-        VNInfo *NewSegmentVNI = OldIdxVNI;
-        *NewSegment = LiveRange::Segment(NewIdxDef, NewIdxDef.getDeadSlot(),
-                                         NewSegmentVNI);
-        NewSegmentVNI->def = NewIdxDef;
-      }
-    }
-  }
-
-  void updateRegMaskSlots() {
-    SmallVectorImpl<SlotIndex>::iterator RI =
-      std::lower_bound(LIS.RegMaskSlots.begin(), LIS.RegMaskSlots.end(),
-                       OldIdx);
-    assert(RI != LIS.RegMaskSlots.end() && *RI == OldIdx.getRegSlot() &&
-           "No RegMask at OldIdx.");
-    *RI = NewIdx.getRegSlot();
-    assert((RI == LIS.RegMaskSlots.begin() ||
-            SlotIndex::isEarlierInstr(*std::prev(RI), *RI)) &&
-           "Cannot move regmask instruction above another call");
-    assert((std::next(RI) == LIS.RegMaskSlots.end() ||
-            SlotIndex::isEarlierInstr(*RI, *std::next(RI))) &&
-           "Cannot move regmask instruction below another call");
-  }
-
-  // Return the last use of reg between NewIdx and OldIdx.
-  SlotIndex findLastUseBefore(SlotIndex Before, unsigned Reg,
-                              LaneBitmask LaneMask) {
-    if (TargetRegisterInfo::isVirtualRegister(Reg)) {
-      SlotIndex LastUse = Before;
-      for (MachineOperand &MO : MRI.use_nodbg_operands(Reg)) {
-        if (MO.isUndef())
-          continue;
-        unsigned SubReg = MO.getSubReg();
-        if (SubReg != 0 && LaneMask.any()
-            && (TRI.getSubRegIndexLaneMask(SubReg) & LaneMask).none())
-          continue;
-
-        const MachineInstr &MI = *MO.getParent();
-        SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI);
-        if (InstSlot > LastUse && InstSlot < OldIdx)
-          LastUse = InstSlot.getRegSlot();
-      }
-      return LastUse;
-    }
-
-    // This is a regunit interval, so scanning the use list could be very
-    // expensive. Scan upwards from OldIdx instead.
-    assert(Before < OldIdx && "Expected upwards move");
-    SlotIndexes *Indexes = LIS.getSlotIndexes();
-    MachineBasicBlock *MBB = Indexes->getMBBFromIndex(Before);
-
-    // OldIdx may not correspond to an instruction any longer, so set MII to
-    // point to the next instruction after OldIdx, or MBB->end().
-    MachineBasicBlock::iterator MII = MBB->end();
-    if (MachineInstr *MI = Indexes->getInstructionFromIndex(
-                           Indexes->getNextNonNullIndex(OldIdx)))
-      if (MI->getParent() == MBB)
-        MII = MI;
-
-    MachineBasicBlock::iterator Begin = MBB->begin();
-    while (MII != Begin) {
-      if ((--MII)->isDebugValue())
-        continue;
-      SlotIndex Idx = Indexes->getInstructionIndex(*MII);
-
-      // Stop searching when Before is reached.
-      if (!SlotIndex::isEarlierInstr(Before, Idx))
-        return Before;
-
-      // Check if MII uses Reg.
-      for (MIBundleOperands MO(*MII); MO.isValid(); ++MO)
-        if (MO->isReg() && !MO->isUndef() &&
-            TargetRegisterInfo::isPhysicalRegister(MO->getReg()) &&
-            TRI.hasRegUnit(MO->getReg(), Reg))
-          return Idx.getRegSlot();
-    }
-    // Didn't reach Before. It must be the first instruction in the block.
-    return Before;
-  }
-};
-
-void LiveIntervals::handleMove(MachineInstr &MI, bool UpdateFlags) {
-  assert(!MI.isBundled() && "Can't handle bundled instructions yet.");
-  SlotIndex OldIndex = Indexes->getInstructionIndex(MI);
-  Indexes->removeMachineInstrFromMaps(MI);
-  SlotIndex NewIndex = Indexes->insertMachineInstrInMaps(MI);
-  assert(getMBBStartIdx(MI.getParent()) <= OldIndex &&
-         OldIndex < getMBBEndIdx(MI.getParent()) &&
-         "Cannot handle moves across basic block boundaries.");
-
-  HMEditor HME(*this, *MRI, *TRI, OldIndex, NewIndex, UpdateFlags);
-  HME.updateAllRanges(&MI);
-}
-
-void LiveIntervals::handleMoveIntoBundle(MachineInstr &MI,
-                                         MachineInstr &BundleStart,
-                                         bool UpdateFlags) {
-  SlotIndex OldIndex = Indexes->getInstructionIndex(MI);
-  SlotIndex NewIndex = Indexes->getInstructionIndex(BundleStart);
-  HMEditor HME(*this, *MRI, *TRI, OldIndex, NewIndex, UpdateFlags);
-  HME.updateAllRanges(&MI);
-}
-
-void LiveIntervals::repairOldRegInRange(const MachineBasicBlock::iterator Begin,
-                                        const MachineBasicBlock::iterator End,
-                                        const SlotIndex endIdx,
-                                        LiveRange &LR, const unsigned Reg,
-                                        LaneBitmask LaneMask) {
-  LiveInterval::iterator LII = LR.find(endIdx);
-  SlotIndex lastUseIdx;
-  if (LII == LR.begin()) {
-    // This happens when the function is called for a subregister that only
-    // occurs _after_ the range that is to be repaired.
-    return;
-  }
-  if (LII != LR.end() && LII->start < endIdx)
-    lastUseIdx = LII->end;
-  else
-    --LII;
-
-  for (MachineBasicBlock::iterator I = End; I != Begin;) {
-    --I;
-    MachineInstr &MI = *I;
-    if (MI.isDebugValue())
-      continue;
-
-    SlotIndex instrIdx = getInstructionIndex(MI);
-    bool isStartValid = getInstructionFromIndex(LII->start);
-    bool isEndValid = getInstructionFromIndex(LII->end);
-
-    // FIXME: This doesn't currently handle early-clobber or multiple removed
-    // defs inside of the region to repair.
-    for (MachineInstr::mop_iterator OI = MI.operands_begin(),
-                                    OE = MI.operands_end();
-         OI != OE; ++OI) {
-      const MachineOperand &MO = *OI;
-      if (!MO.isReg() || MO.getReg() != Reg)
-        continue;
-
-      unsigned SubReg = MO.getSubReg();
-      LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg);
-      if ((Mask & LaneMask).none())
-        continue;
-
-      if (MO.isDef()) {
-        if (!isStartValid) {
-          if (LII->end.isDead()) {
-            SlotIndex prevStart;
-            if (LII != LR.begin())
-              prevStart = std::prev(LII)->start;
-
-            // FIXME: This could be more efficient if there was a
-            // removeSegment method that returned an iterator.
-            LR.removeSegment(*LII, true);
-            if (prevStart.isValid())
-              LII = LR.find(prevStart);
-            else
-              LII = LR.begin();
-          } else {
-            LII->start = instrIdx.getRegSlot();
-            LII->valno->def = instrIdx.getRegSlot();
-            if (MO.getSubReg() && !MO.isUndef())
-              lastUseIdx = instrIdx.getRegSlot();
-            else
-              lastUseIdx = SlotIndex();
-            continue;
-          }
-        }
-
-        if (!lastUseIdx.isValid()) {
-          VNInfo *VNI = LR.getNextValue(instrIdx.getRegSlot(), VNInfoAllocator);
-          LiveRange::Segment S(instrIdx.getRegSlot(),
-                               instrIdx.getDeadSlot(), VNI);
-          LII = LR.addSegment(S);
-        } else if (LII->start != instrIdx.getRegSlot()) {
-          VNInfo *VNI = LR.getNextValue(instrIdx.getRegSlot(), VNInfoAllocator);
-          LiveRange::Segment S(instrIdx.getRegSlot(), lastUseIdx, VNI);
-          LII = LR.addSegment(S);
-        }
-
-        if (MO.getSubReg() && !MO.isUndef())
-          lastUseIdx = instrIdx.getRegSlot();
-        else
-          lastUseIdx = SlotIndex();
-      } else if (MO.isUse()) {
-        // FIXME: This should probably be handled outside of this branch,
-        // either as part of the def case (for defs inside of the region) or
-        // after the loop over the region.
-        if (!isEndValid && !LII->end.isBlock())
-          LII->end = instrIdx.getRegSlot();
-        if (!lastUseIdx.isValid())
-          lastUseIdx = instrIdx.getRegSlot();
-      }
-    }
-  }
-}
-
-void
-LiveIntervals::repairIntervalsInRange(MachineBasicBlock *MBB,
-                                      MachineBasicBlock::iterator Begin,
-                                      MachineBasicBlock::iterator End,
-                                      ArrayRef<unsigned> OrigRegs) {
-  // Find anchor points, which are at the beginning/end of blocks or at
-  // instructions that already have indexes.
-  while (Begin != MBB->begin() && !Indexes->hasIndex(*Begin))
-    --Begin;
-  while (End != MBB->end() && !Indexes->hasIndex(*End))
-    ++End;
-
-  SlotIndex endIdx;
-  if (End == MBB->end())
-    endIdx = getMBBEndIdx(MBB).getPrevSlot();
-  else
-    endIdx = getInstructionIndex(*End);
-
-  Indexes->repairIndexesInRange(MBB, Begin, End);
-
-  for (MachineBasicBlock::iterator I = End; I != Begin;) {
-    --I;
-    MachineInstr &MI = *I;
-    if (MI.isDebugValue())
-      continue;
-    for (MachineInstr::const_mop_iterator MOI = MI.operands_begin(),
-                                          MOE = MI.operands_end();
-         MOI != MOE; ++MOI) {
-      if (MOI->isReg() &&
-          TargetRegisterInfo::isVirtualRegister(MOI->getReg()) &&
-          !hasInterval(MOI->getReg())) {
-        createAndComputeVirtRegInterval(MOI->getReg());
-      }
-    }
-  }
-
-  for (unsigned Reg : OrigRegs) {
-    if (!TargetRegisterInfo::isVirtualRegister(Reg))
-      continue;
-
-    LiveInterval &LI = getInterval(Reg);
-    // FIXME: Should we support undefs that gain defs?
-    if (!LI.hasAtLeastOneValue())
-      continue;
-
-    for (LiveInterval::SubRange &S : LI.subranges())
-      repairOldRegInRange(Begin, End, endIdx, S, Reg, S.LaneMask);
-
-    repairOldRegInRange(Begin, End, endIdx, LI, Reg);
-  }
-}
-
-void LiveIntervals::removePhysRegDefAt(unsigned Reg, SlotIndex Pos) {
-  for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
-    if (LiveRange *LR = getCachedRegUnit(*Unit))
-      if (VNInfo *VNI = LR->getVNInfoAt(Pos))
-        LR->removeValNo(VNI);
-  }
-}
-
-void LiveIntervals::removeVRegDefAt(LiveInterval &LI, SlotIndex Pos) {
-  // LI may not have the main range computed yet, but its subranges may
-  // be present.
-  VNInfo *VNI = LI.getVNInfoAt(Pos);
-  if (VNI != nullptr) {
-    assert(VNI->def.getBaseIndex() == Pos.getBaseIndex());
-    LI.removeValNo(VNI);
-  }
-
-  // Also remove the value defined in subranges.
-  for (LiveInterval::SubRange &S : LI.subranges()) {
-    if (VNInfo *SVNI = S.getVNInfoAt(Pos))
-      if (SVNI->def.getBaseIndex() == Pos.getBaseIndex())
-        S.removeValNo(SVNI);
-  }
-  LI.removeEmptySubRanges();
-}
-
-void LiveIntervals::splitSeparateComponents(LiveInterval &LI,
-    SmallVectorImpl<LiveInterval*> &SplitLIs) {
-  ConnectedVNInfoEqClasses ConEQ(*this);
-  unsigned NumComp = ConEQ.Classify(LI);
-  if (NumComp <= 1)
-    return;
-  DEBUG(dbgs() << "  Split " << NumComp << " components: " << LI << '\n');
-  unsigned Reg = LI.reg;
-  const TargetRegisterClass *RegClass = MRI->getRegClass(Reg);
-  for (unsigned I = 1; I < NumComp; ++I) {
-    unsigned NewVReg = MRI->createVirtualRegister(RegClass);
-    LiveInterval &NewLI = createEmptyInterval(NewVReg);
-    SplitLIs.push_back(&NewLI);
-  }
-  ConEQ.Distribute(LI, SplitLIs.data(), *MRI);
-}
-
-void LiveIntervals::constructMainRangeFromSubranges(LiveInterval &LI) {
-  assert(LRCalc && "LRCalc not initialized.");
-  LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
-  LRCalc->constructMainRangeFromSubranges(LI);
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/CodeGen/LiveStackAnalysis.cpp b/external/bsd/llvm/dist/llvm/lib/CodeGen/LiveStackAnalysis.cpp
deleted file mode 100644
index b51f8b0aa6bb..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/CodeGen/LiveStackAnalysis.cpp
+++ /dev/null
@@ -1,88 +0,0 @@
-//===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements the live stack slot analysis pass. It is analogous to
-// live interval analysis except it's analyzing liveness of stack slots rather
-// than registers.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/CodeGen/LiveStackAnalysis.h"
-#include "llvm/CodeGen/LiveIntervalAnalysis.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-using namespace llvm;
-
-#define DEBUG_TYPE "livestacks"
-
-char LiveStacks::ID = 0;
-INITIALIZE_PASS_BEGIN(LiveStacks, DEBUG_TYPE,
-                "Live Stack Slot Analysis", false, false)
-INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
-INITIALIZE_PASS_END(LiveStacks, DEBUG_TYPE,
-                "Live Stack Slot Analysis", false, false)
-
-char &llvm::LiveStacksID = LiveStacks::ID;
-
-void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
-  AU.setPreservesAll();
-  AU.addPreserved<SlotIndexes>();
-  AU.addRequiredTransitive<SlotIndexes>();
-  MachineFunctionPass::getAnalysisUsage(AU);
-}
-
-void LiveStacks::releaseMemory() {
-  // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
-  VNInfoAllocator.Reset();
-  S2IMap.clear();
-  S2RCMap.clear();
-}
-
-bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {
-  TRI = MF.getSubtarget().getRegisterInfo();
-  // FIXME: No analysis is being done right now. We are relying on the
-  // register allocators to provide the information.
-  return false;
-}
-
-LiveInterval &
-LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
-  assert(Slot >= 0 && "Spill slot indice must be >= 0");
-  SS2IntervalMap::iterator I = S2IMap.find(Slot);
-  if (I == S2IMap.end()) {
-    I = S2IMap.emplace(std::piecewise_construct, std::forward_as_tuple(Slot),
-                       std::forward_as_tuple(
-                           TargetRegisterInfo::index2StackSlot(Slot), 0.0F))
-            .first;
-    S2RCMap.insert(std::make_pair(Slot, RC));
-  } else {
-    // Use the largest common subclass register class.
-    const TargetRegisterClass *OldRC = S2RCMap[Slot];
-    S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
-  }
-  return I->second;
-}
-
-/// print - Implement the dump method.
-void LiveStacks::print(raw_ostream &OS, const Module*) const {
-
-  OS << "********** INTERVALS **********\n";
-  for (const_iterator I = begin(), E = end(); I != E; ++I) {
-    I->second.print(OS);
-    int Slot = I->first;
-    const TargetRegisterClass *RC = getIntervalRegClass(Slot);
-    if (RC)
-      OS << " [" << TRI->getRegClassName(RC) << "]\n";
-    else
-      OS << " [Unknown]\n";
-  }
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/DebugInfo/CodeView/TypeName.cpp b/external/bsd/llvm/dist/llvm/lib/DebugInfo/CodeView/TypeName.cpp
deleted file mode 100644
index 2eb8b81862f3..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/DebugInfo/CodeView/TypeName.cpp
+++ /dev/null
@@ -1,243 +0,0 @@
-//===- TypeName.cpp ------------------------------------------- *- C++ --*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/DebugInfo/CodeView/TypeName.h"
-
-#include "llvm/ADT/SmallString.h"
-#include "llvm/DebugInfo/CodeView/CVTypeVisitor.h"
-#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"
-#include "llvm/Support/FormatVariadic.h"
-
-using namespace llvm;
-using namespace llvm::codeview;
-
-namespace {
-class TypeNameComputer : public TypeVisitorCallbacks {
-  /// The type collection.  Used to calculate names of nested types.
-  TypeCollection &Types;
-  TypeIndex CurrentTypeIndex = TypeIndex::None();
-
-  /// Name of the current type. Only valid before visitTypeEnd.
-  SmallString<256> Name;
-
-public:
-  explicit TypeNameComputer(TypeCollection &Types) : Types(Types) {}
-
-  StringRef name() const { return Name; }
-
-  /// Paired begin/end actions for all types. Receives all record data,
-  /// including the fixed-length record prefix.
-  Error visitTypeBegin(CVType &Record) override;
-  Error visitTypeBegin(CVType &Record, TypeIndex Index) override;
-  Error visitTypeEnd(CVType &Record) override;
-
-#define TYPE_RECORD(EnumName, EnumVal, Name)                                   \
-  Error visitKnownRecord(CVType &CVR, Name##Record &Record) override;
-#define TYPE_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
-#define MEMBER_RECORD(EnumName, EnumVal, Name)
-#include "llvm/DebugInfo/CodeView/CodeViewTypes.def"
-};
-} // namespace
-
-Error TypeNameComputer::visitTypeBegin(CVType &Record) {
-  llvm_unreachable("Must call visitTypeBegin with a TypeIndex!");
-  return Error::success();
-}
-
-Error TypeNameComputer::visitTypeBegin(CVType &Record, TypeIndex Index) {
-  // Reset Name to the empty string. If the visitor sets it, we know it.
-  Name = "";
-  CurrentTypeIndex = Index;
-  return Error::success();
-}
-
-Error TypeNameComputer::visitTypeEnd(CVType &CVR) { return Error::success(); }
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR,
-                                         FieldListRecord &FieldList) {
-  Name = "<field list>";
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVRecord<TypeLeafKind> &CVR,
-                                         StringIdRecord &String) {
-  Name = String.getString();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, ArgListRecord &Args) {
-  auto Indices = Args.getIndices();
-  uint32_t Size = Indices.size();
-  Name = "(";
-  for (uint32_t I = 0; I < Size; ++I) {
-    assert(Indices[I] < CurrentTypeIndex);
-
-    Name.append(Types.getTypeName(Indices[I]));
-    if (I + 1 != Size)
-      Name.append(", ");
-  }
-  Name.push_back(')');
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR,
-                                         StringListRecord &Strings) {
-  auto Indices = Strings.getIndices();
-  uint32_t Size = Indices.size();
-  Name = "\"";
-  for (uint32_t I = 0; I < Size; ++I) {
-    Name.append(Types.getTypeName(Indices[I]));
-    if (I + 1 != Size)
-      Name.append("\" \"");
-  }
-  Name.push_back('\"');
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, ClassRecord &Class) {
-  Name = Class.getName();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, UnionRecord &Union) {
-  Name = Union.getName();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, EnumRecord &Enum) {
-  Name = Enum.getName();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, ArrayRecord &AT) {
-  Name = AT.getName();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, VFTableRecord &VFT) {
-  Name = VFT.getName();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, MemberFuncIdRecord &Id) {
-  Name = Id.getName();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, ProcedureRecord &Proc) {
-  StringRef Ret = Types.getTypeName(Proc.getReturnType());
-  StringRef Params = Types.getTypeName(Proc.getArgumentList());
-  Name = formatv("{0} {1}", Ret, Params).sstr<256>();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR,
-                                         MemberFunctionRecord &MF) {
-  StringRef Ret = Types.getTypeName(MF.getReturnType());
-  StringRef Class = Types.getTypeName(MF.getClassType());
-  StringRef Params = Types.getTypeName(MF.getArgumentList());
-  Name = formatv("{0} {1}::{2}", Ret, Class, Params).sstr<256>();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, FuncIdRecord &Func) {
-  Name = Func.getName();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, TypeServer2Record &TS) {
-  Name = TS.getName();
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, PointerRecord &Ptr) {
-
-  if (Ptr.isPointerToMember()) {
-    const MemberPointerInfo &MI = Ptr.getMemberInfo();
-
-    StringRef Pointee = Types.getTypeName(Ptr.getReferentType());
-    StringRef Class = Types.getTypeName(MI.getContainingType());
-    Name = formatv("{0} {1}::*", Pointee, Class);
-  } else {
-    if (Ptr.isConst())
-      Name.append("const ");
-    if (Ptr.isVolatile())
-      Name.append("volatile ");
-    if (Ptr.isUnaligned())
-      Name.append("__unaligned ");
-
-    Name.append(Types.getTypeName(Ptr.getReferentType()));
-
-    if (Ptr.getMode() == PointerMode::LValueReference)
-      Name.append("&");
-    else if (Ptr.getMode() == PointerMode::RValueReference)
-      Name.append("&&");
-    else if (Ptr.getMode() == PointerMode::Pointer)
-      Name.append("*");
-  }
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, ModifierRecord &Mod) {
-  uint16_t Mods = static_cast<uint16_t>(Mod.getModifiers());
-
-  SmallString<256> TypeName;
-  if (Mods & uint16_t(ModifierOptions::Const))
-    Name.append("const ");
-  if (Mods & uint16_t(ModifierOptions::Volatile))
-    Name.append("volatile ");
-  if (Mods & uint16_t(ModifierOptions::Unaligned))
-    Name.append("__unaligned ");
-  Name.append(Types.getTypeName(Mod.getModifiedType()));
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR,
-                                         VFTableShapeRecord &Shape) {
-  Name = formatv("<vftable {0} methods>", Shape.getEntryCount());
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(
-    CVType &CVR, UdtModSourceLineRecord &ModSourceLine) {
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR,
-                                         UdtSourceLineRecord &SourceLine) {
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, BitFieldRecord &BF) {
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR,
-                                         MethodOverloadListRecord &Overloads) {
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, BuildInfoRecord &BI) {
-  return Error::success();
-}
-
-Error TypeNameComputer::visitKnownRecord(CVType &CVR, LabelRecord &R) {
-  return Error::success();
-}
-
-std::string llvm::codeview::computeTypeName(TypeCollection &Types,
-                                            TypeIndex Index) {
-  TypeNameComputer Computer(Types);
-  CVType Record = Types.getType(Index);
-  if (auto EC = visitTypeRecord(Record, Index, Computer)) {
-    consumeError(std::move(EC));
-    return "<unknown UDT>";
-  }
-  return Computer.name();
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/DebugInfo/CodeView/TypeSerializer.cpp b/external/bsd/llvm/dist/llvm/lib/DebugInfo/CodeView/TypeSerializer.cpp
deleted file mode 100644
index 003c13b4a20d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/DebugInfo/CodeView/TypeSerializer.cpp
+++ /dev/null
@@ -1,389 +0,0 @@
-//===- TypeSerialzier.cpp -------------------------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/DebugInfo/CodeView/TypeSerializer.h"
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/DenseSet.h"
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/DebugInfo/CodeView/CodeView.h"
-#include "llvm/DebugInfo/CodeView/RecordSerialization.h"
-#include "llvm/DebugInfo/CodeView/TypeIndex.h"
-#include "llvm/Support/Allocator.h"
-#include "llvm/Support/BinaryByteStream.h"
-#include "llvm/Support/BinaryStreamWriter.h"
-#include "llvm/Support/Endian.h"
-#include "llvm/Support/Error.h"
-#include <algorithm>
-#include <cassert>
-#include <cstdint>
-#include <cstring>
-
-using namespace llvm;
-using namespace llvm::codeview;
-
-namespace {
-
-struct HashedType {
-  uint64_t Hash;
-  const uint8_t *Data;
-  unsigned Size; // FIXME: Go to uint16_t?
-  TypeIndex Index;
-};
-
-/// Wrapper around a poitner to a HashedType. Hash and equality operations are
-/// based on data in the pointee.
-struct HashedTypePtr {
-  HashedTypePtr() = default;
-  HashedTypePtr(HashedType *Ptr) : Ptr(Ptr) {}
-
-  HashedType *Ptr = nullptr;
-};
-
-} // end anonymous namespace
-
-namespace llvm {
-
-template <> struct DenseMapInfo<HashedTypePtr> {
-  static inline HashedTypePtr getEmptyKey() { return HashedTypePtr(nullptr); }
-
-  static inline HashedTypePtr getTombstoneKey() {
-    return HashedTypePtr(reinterpret_cast<HashedType *>(1));
-  }
-
-  static unsigned getHashValue(HashedTypePtr Val) {
-    assert(Val.Ptr != getEmptyKey().Ptr && Val.Ptr != getTombstoneKey().Ptr);
-    return Val.Ptr->Hash;
-  }
-
-  static bool isEqual(HashedTypePtr LHSP, HashedTypePtr RHSP) {
-    HashedType *LHS = LHSP.Ptr;
-    HashedType *RHS = RHSP.Ptr;
-    if (RHS == getEmptyKey().Ptr || RHS == getTombstoneKey().Ptr)
-      return LHS == RHS;
-    if (LHS->Hash != RHS->Hash || LHS->Size != RHS->Size)
-      return false;
-    return ::memcmp(LHS->Data, RHS->Data, LHS->Size) == 0;
-  }
-};
-
-} // end namespace llvm
-
-/// Private implementation so that we don't leak our DenseMap instantiations to
-/// users.
-class llvm::codeview::TypeHasher {
-private:
-  /// Storage for type record provided by the caller. Records will outlive the
-  /// hasher object, so they should be allocated here.
-  BumpPtrAllocator &RecordStorage;
-
-  /// Storage for hash keys. These only need to live as long as the hashing
-  /// operation.
-  BumpPtrAllocator KeyStorage;
-
-  /// Hash table. We really want a DenseMap<ArrayRef<uint8_t>, TypeIndex> here,
-  /// but DenseMap is inefficient when the keys are long (like type records)
-  /// because it recomputes the hash value of every key when it grows. This
-  /// value type stores the hash out of line in KeyStorage, so that table
-  /// entries are small and easy to rehash.
-  DenseSet<HashedTypePtr> HashedRecords;
-
-public:
-  TypeHasher(BumpPtrAllocator &RecordStorage) : RecordStorage(RecordStorage) {}
-
-  void reset() { HashedRecords.clear(); }
-
-  /// Takes the bytes of type record, inserts them into the hash table, saves
-  /// them, and returns a pointer to an identical stable type record along with
-  /// its type index in the destination stream.
-  TypeIndex getOrCreateRecord(ArrayRef<uint8_t> &Record, TypeIndex TI);
-};
-
-TypeIndex TypeHasher::getOrCreateRecord(ArrayRef<uint8_t> &Record,
-                                        TypeIndex TI) {
-  assert(Record.size() < UINT32_MAX && "Record too big");
-  assert(Record.size() % 4 == 0 && "Record is not aligned to 4 bytes!");
-
-  // Compute the hash up front so we can store it in the key.
-  HashedType TempHashedType = {hash_value(Record), Record.data(),
-                               unsigned(Record.size()), TI};
-  auto Result = HashedRecords.insert(HashedTypePtr(&TempHashedType));
-  HashedType *&Hashed = Result.first->Ptr;
-
-  if (Result.second) {
-    // This was a new type record. We need stable storage for both the key and
-    // the record. The record should outlive the hashing operation.
-    Hashed = KeyStorage.Allocate<HashedType>();
-    *Hashed = TempHashedType;
-
-    uint8_t *Stable = RecordStorage.Allocate<uint8_t>(Record.size());
-    memcpy(Stable, Record.data(), Record.size());
-    Hashed->Data = Stable;
-    assert(Hashed->Size == Record.size());
-  }
-
-  // Update the caller's copy of Record to point a stable copy.
-  Record = ArrayRef<uint8_t>(Hashed->Data, Hashed->Size);
-  return Hashed->Index;
-}
-
-TypeIndex TypeSerializer::nextTypeIndex() const {
-  return TypeIndex::fromArrayIndex(SeenRecords.size());
-}
-
-bool TypeSerializer::isInFieldList() const {
-  return TypeKind.hasValue() && *TypeKind == TypeLeafKind::LF_FIELDLIST;
-}
-
-MutableArrayRef<uint8_t> TypeSerializer::getCurrentSubRecordData() {
-  assert(isInFieldList());
-  return getCurrentRecordData().drop_front(CurrentSegment.length());
-}
-
-MutableArrayRef<uint8_t> TypeSerializer::getCurrentRecordData() {
-  return MutableArrayRef<uint8_t>(RecordBuffer).take_front(Writer.getOffset());
-}
-
-Error TypeSerializer::writeRecordPrefix(TypeLeafKind Kind) {
-  RecordPrefix Prefix;
-  Prefix.RecordKind = Kind;
-  Prefix.RecordLen = 0;
-  if (auto EC = Writer.writeObject(Prefix))
-    return EC;
-  return Error::success();
-}
-
-Expected<MutableArrayRef<uint8_t>>
-TypeSerializer::addPadding(MutableArrayRef<uint8_t> Record) {
-  uint32_t Align = Record.size() % 4;
-  if (Align == 0)
-    return Record;
-
-  int PaddingBytes = 4 - Align;
-  int N = PaddingBytes;
-  while (PaddingBytes > 0) {
-    uint8_t Pad = static_cast<uint8_t>(LF_PAD0 + PaddingBytes);
-    if (auto EC = Writer.writeInteger(Pad))
-      return std::move(EC);
-    --PaddingBytes;
-  }
-  return MutableArrayRef<uint8_t>(Record.data(), Record.size() + N);
-}
-
-TypeSerializer::TypeSerializer(BumpPtrAllocator &Storage, bool Hash)
-    : RecordStorage(Storage), RecordBuffer(MaxRecordLength * 2),
-      Stream(RecordBuffer, support::little), Writer(Stream),
-      Mapping(Writer) {
-  // RecordBuffer needs to be able to hold enough data so that if we are 1
-  // byte short of MaxRecordLen, and then we try to write MaxRecordLen bytes,
-  // we won't overflow.
-  if (Hash)
-    Hasher = llvm::make_unique<TypeHasher>(Storage);
-}
-
-TypeSerializer::~TypeSerializer() = default;
-
-ArrayRef<ArrayRef<uint8_t>> TypeSerializer::records() const {
-  return SeenRecords;
-}
-
-void TypeSerializer::reset() {
-  if (Hasher)
-    Hasher->reset();
-  Writer.setOffset(0);
-  CurrentSegment = RecordSegment();
-  FieldListSegments.clear();
-  TypeKind.reset();
-  MemberKind.reset();
-  SeenRecords.clear();
-}
-
-TypeIndex TypeSerializer::insertRecordBytes(ArrayRef<uint8_t> &Record) {
-  assert(!TypeKind.hasValue() && "Already in a type mapping!");
-  assert(Writer.getOffset() == 0 && "Stream has data already!");
-
-  if (Hasher) {
-    TypeIndex ActualTI = Hasher->getOrCreateRecord(Record, nextTypeIndex());
-    if (nextTypeIndex() == ActualTI)
-      SeenRecords.push_back(Record);
-    return ActualTI;
-  }
-
-  TypeIndex NewTI = nextTypeIndex();
-  uint8_t *Stable = RecordStorage.Allocate<uint8_t>(Record.size());
-  memcpy(Stable, Record.data(), Record.size());
-  Record = ArrayRef<uint8_t>(Stable, Record.size());
-  SeenRecords.push_back(Record);
-  return NewTI;
-}
-
-TypeIndex TypeSerializer::insertRecord(const RemappedType &Record) {
-  assert(!TypeKind.hasValue() && "Already in a type mapping!");
-  assert(Writer.getOffset() == 0 && "Stream has data already!");
-
-  TypeIndex TI;
-  ArrayRef<uint8_t> OriginalData = Record.OriginalRecord.RecordData;
-  if (Record.Mappings.empty()) {
-    // This record did not remap any type indices.  Just write it.
-    return insertRecordBytes(OriginalData);
-  }
-
-  // At least one type index was remapped.  Before we can hash it we have to
-  // copy the full record bytes, re-write each type index, then hash the copy.
-  // We do this in temporary storage since only the DenseMap can decide whether
-  // this record already exists, and if it does we don't want the memory to
-  // stick around.
-  RemapStorage.resize(OriginalData.size());
-  ::memcpy(&RemapStorage[0], OriginalData.data(), OriginalData.size());
-  uint8_t *ContentBegin = RemapStorage.data() + sizeof(RecordPrefix);
-  for (const auto &M : Record.Mappings) {
-    // First 4 bytes of every record are the record prefix, but the mapping
-    // offset is relative to the content which starts after.
-    *(TypeIndex *)(ContentBegin + M.first) = M.second;
-  }
-  auto RemapRef = makeArrayRef(RemapStorage);
-  return insertRecordBytes(RemapRef);
-}
-
-Error TypeSerializer::visitTypeBegin(CVType &Record) {
-  assert(!TypeKind.hasValue() && "Already in a type mapping!");
-  assert(Writer.getOffset() == 0 && "Stream has data already!");
-
-  if (auto EC = writeRecordPrefix(Record.kind()))
-    return EC;
-
-  TypeKind = Record.kind();
-  if (auto EC = Mapping.visitTypeBegin(Record))
-    return EC;
-
-  return Error::success();
-}
-
-Expected<TypeIndex> TypeSerializer::visitTypeEndGetIndex(CVType &Record) {
-  assert(TypeKind.hasValue() && "Not in a type mapping!");
-  if (auto EC = Mapping.visitTypeEnd(Record))
-    return std::move(EC);
-
-  // Update the record's length and fill out the CVType members to point to
-  // the stable memory holding the record's data.
-  auto ThisRecordData = getCurrentRecordData();
-  auto ExpectedData = addPadding(ThisRecordData);
-  if (!ExpectedData)
-    return ExpectedData.takeError();
-  ThisRecordData = *ExpectedData;
-
-  RecordPrefix *Prefix =
-      reinterpret_cast<RecordPrefix *>(ThisRecordData.data());
-  Prefix->RecordLen = ThisRecordData.size() - sizeof(uint16_t);
-
-  Record.Type = *TypeKind;
-  Record.RecordData = ThisRecordData;
-
-  // insertRecordBytes assumes we're not in a mapping, so do this first.
-  TypeKind.reset();
-  Writer.setOffset(0);
-
-  TypeIndex InsertedTypeIndex = insertRecordBytes(Record.RecordData);
-
-  // Write out each additional segment in reverse order, and update each
-  // record's continuation index to point to the previous one.
-  for (auto X : reverse(FieldListSegments)) {
-    auto CIBytes = X.take_back(sizeof(uint32_t));
-    support::ulittle32_t *CI =
-        reinterpret_cast<support::ulittle32_t *>(CIBytes.data());
-    assert(*CI == 0xB0C0B0C0 && "Invalid TypeIndex placeholder");
-    *CI = InsertedTypeIndex.getIndex();
-    InsertedTypeIndex = insertRecordBytes(X);
-  }
-
-  FieldListSegments.clear();
-  CurrentSegment.SubRecords.clear();
-
-  return InsertedTypeIndex;
-}
-
-Error TypeSerializer::visitTypeEnd(CVType &Record) {
-  auto ExpectedIndex = visitTypeEndGetIndex(Record);
-  if (!ExpectedIndex)
-    return ExpectedIndex.takeError();
-  return Error::success();
-}
-
-Error TypeSerializer::visitMemberBegin(CVMemberRecord &Record) {
-  assert(isInFieldList() && "Not in a field list!");
-  assert(!MemberKind.hasValue() && "Already in a member record!");
-  MemberKind = Record.Kind;
-
-  if (auto EC = Mapping.visitMemberBegin(Record))
-    return EC;
-
-  return Error::success();
-}
-
-Error TypeSerializer::visitMemberEnd(CVMemberRecord &Record) {
-  if (auto EC = Mapping.visitMemberEnd(Record))
-    return EC;
-
-  // Check if this subrecord makes the current segment not fit in 64K minus
-  // the space for a continuation record (8 bytes). If the segment does not
-  // fit, insert a continuation record.
-  if (Writer.getOffset() > MaxRecordLength - ContinuationLength) {
-    MutableArrayRef<uint8_t> Data = getCurrentRecordData();
-    SubRecord LastSubRecord = CurrentSegment.SubRecords.back();
-    uint32_t CopySize = CurrentSegment.length() - LastSubRecord.Size;
-    auto CopyData = Data.take_front(CopySize);
-    auto LeftOverData = Data.drop_front(CopySize);
-    assert(LastSubRecord.Size == LeftOverData.size());
-
-    // Allocate stable storage for the record and copy the old record plus
-    // continuation over.
-    uint16_t LengthWithSize = CopySize + ContinuationLength;
-    assert(LengthWithSize <= MaxRecordLength);
-    RecordPrefix *Prefix = reinterpret_cast<RecordPrefix *>(CopyData.data());
-    Prefix->RecordLen = LengthWithSize - sizeof(uint16_t);
-
-    uint8_t *SegmentBytes = RecordStorage.Allocate<uint8_t>(LengthWithSize);
-    auto SavedSegment = MutableArrayRef<uint8_t>(SegmentBytes, LengthWithSize);
-    MutableBinaryByteStream CS(SavedSegment, support::little);
-    BinaryStreamWriter CW(CS);
-    if (auto EC = CW.writeBytes(CopyData))
-      return EC;
-    if (auto EC = CW.writeEnum(TypeLeafKind::LF_INDEX))
-      return EC;
-    if (auto EC = CW.writeInteger<uint16_t>(0))
-      return EC;
-    if (auto EC = CW.writeInteger<uint32_t>(0xB0C0B0C0))
-      return EC;
-    FieldListSegments.push_back(SavedSegment);
-
-    // Write a new placeholder record prefix to mark the start of this new
-    // top-level record.
-    Writer.setOffset(0);
-    if (auto EC = writeRecordPrefix(TypeLeafKind::LF_FIELDLIST))
-      return EC;
-
-    // Then move over the subrecord that overflowed the old segment to the
-    // beginning of this segment.  Note that we have to use memmove here
-    // instead of Writer.writeBytes(), because the new and old locations
-    // could overlap.
-    ::memmove(Stream.data().data() + sizeof(RecordPrefix), LeftOverData.data(),
-              LeftOverData.size());
-    // And point the segment writer at the end of that subrecord.
-    Writer.setOffset(LeftOverData.size() + sizeof(RecordPrefix));
-
-    CurrentSegment.SubRecords.clear();
-    CurrentSegment.SubRecords.push_back(LastSubRecord);
-  }
-
-  // Update the CVMemberRecord since we may have shifted around or gotten
-  // padded.
-  Record.Data = getCurrentSubRecordData();
-
-  MemberKind.reset();
-  return Error::success();
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/DebugInfo/DWARF/SyntaxHighlighting.cpp b/external/bsd/llvm/dist/llvm/lib/DebugInfo/DWARF/SyntaxHighlighting.cpp
deleted file mode 100644
index d4f44e446954..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/DebugInfo/DWARF/SyntaxHighlighting.cpp
+++ /dev/null
@@ -1,40 +0,0 @@
-//===- SyntaxHighlighting.cpp ---------------------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "SyntaxHighlighting.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/raw_ostream.h"
-
-using namespace llvm;
-using namespace dwarf;
-using namespace syntax;
-
-static cl::opt<cl::boolOrDefault>
-    UseColor("color",
-             cl::desc("use colored syntax highlighting (default=autodetect)"),
-             cl::init(cl::BOU_UNSET));
-
-WithColor::WithColor(raw_ostream &OS, enum HighlightColor Type) : OS(OS) {
-  // Detect color from terminal type unless the user passed the --color option.
-  if (UseColor == cl::BOU_UNSET ? OS.has_colors() : UseColor == cl::BOU_TRUE) {
-    switch (Type) {
-    case Address:    OS.changeColor(raw_ostream::YELLOW);  break;
-    case String:     OS.changeColor(raw_ostream::GREEN);   break;
-    case Tag:        OS.changeColor(raw_ostream::BLUE);    break;
-    case Attribute:  OS.changeColor(raw_ostream::CYAN);    break;
-    case Enumerator: OS.changeColor(raw_ostream::MAGENTA); break;
-    case Macro:      OS.changeColor(raw_ostream::RED);     break;
-    }
-  }
-}
-
-WithColor::~WithColor() {
-  if (UseColor == cl::BOU_UNSET ? OS.has_colors() : UseColor == cl::BOU_TRUE)
-    OS.resetColor();
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/DebugInfo/DWARF/SyntaxHighlighting.h b/external/bsd/llvm/dist/llvm/lib/DebugInfo/DWARF/SyntaxHighlighting.h
deleted file mode 100644
index 277de973dbf0..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/DebugInfo/DWARF/SyntaxHighlighting.h
+++ /dev/null
@@ -1,42 +0,0 @@
-//===- SyntaxHighlighting.h -------------------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_DEBUGINFO_SYNTAXHIGHLIGHTING_H
-#define LLVM_LIB_DEBUGINFO_SYNTAXHIGHLIGHTING_H
-
-namespace llvm {
-
-class raw_ostream;
-
-namespace dwarf {
-namespace syntax {
-
-// Symbolic names for various syntax elements.
-enum HighlightColor { Address, String, Tag, Attribute, Enumerator, Macro };
-
-/// An RAII object that temporarily switches an output stream to a
-/// specific color.
-class WithColor {
-  raw_ostream &OS;
-
-public:
-  /// To be used like this: WithColor(OS, syntax::String) << "text";
-  WithColor(raw_ostream &OS, enum HighlightColor Type);
-  ~WithColor();
-
-  raw_ostream& get() { return OS; }
-  operator raw_ostream& () { return OS; }
-};
-
-} // end namespace syntax
-} // end namespace dwarf
-
-} // end namespace llvm
-
-#endif // LLVM_LIB_DEBUGINFO_SYNTAXHIGHLIGHTING_H
diff --git a/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/GSI.cpp b/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/GSI.cpp
deleted file mode 100644
index b219fe275f73..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/GSI.cpp
+++ /dev/null
@@ -1,93 +0,0 @@
-//===- GSI.cpp - Common Functions for GlobalsStream and PublicsStream  ----===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "GSI.h"
-
-#include "llvm/DebugInfo/PDB/Native/RawError.h"
-#include "llvm/DebugInfo/PDB/Native/RawTypes.h"
-#include "llvm/Support/BinaryStreamArray.h"
-#include "llvm/Support/BinaryStreamReader.h"
-
-#include "llvm/Support/Error.h"
-
-namespace llvm {
-namespace pdb {
-
-static Error checkHashHdrVersion(const GSIHashHeader *HashHdr) {
-  if (HashHdr->VerHdr != GSIHashHeader::HdrVersion)
-    return make_error<RawError>(
-        raw_error_code::feature_unsupported,
-        "Encountered unsupported globals stream version.");
-
-  return Error::success();
-}
-
-Error readGSIHashBuckets(FixedStreamArray<support::ulittle32_t> &HashBuckets,
-                         const GSIHashHeader *HashHdr,
-                         BinaryStreamReader &Reader) {
-  if (auto EC = checkHashHdrVersion(HashHdr))
-    return EC;
-
-  // Before the actual hash buckets, there is a bitmap of length determined by
-  // IPHR_HASH.
-  ArrayRef<uint8_t> Bitmap;
-  size_t BitmapSizeInBits = alignTo(IPHR_HASH + 1, 32);
-  uint32_t NumBitmapEntries = BitmapSizeInBits / 8;
-  if (auto EC = Reader.readBytes(Bitmap, NumBitmapEntries))
-    return joinErrors(std::move(EC),
-                      make_error<RawError>(raw_error_code::corrupt_file,
-                                           "Could not read a bitmap."));
-  uint32_t NumBuckets = 0;
-  for (uint8_t B : Bitmap)
-    NumBuckets += countPopulation(B);
-
-  // Hash buckets follow.
-  if (auto EC = Reader.readArray(HashBuckets, NumBuckets))
-    return joinErrors(std::move(EC),
-                      make_error<RawError>(raw_error_code::corrupt_file,
-                                           "Hash buckets corrupted."));
-
-  return Error::success();
-}
-
-Error readGSIHashHeader(const GSIHashHeader *&HashHdr,
-                        BinaryStreamReader &Reader) {
-  if (Reader.readObject(HashHdr))
-    return make_error<RawError>(raw_error_code::corrupt_file,
-                                "Stream does not contain a GSIHashHeader.");
-
-  if (HashHdr->VerSignature != GSIHashHeader::HdrSignature)
-    return make_error<RawError>(
-        raw_error_code::feature_unsupported,
-        "GSIHashHeader signature (0xffffffff) not found.");
-
-  return Error::success();
-}
-
-Error readGSIHashRecords(FixedStreamArray<PSHashRecord> &HashRecords,
-                         const GSIHashHeader *HashHdr,
-                         BinaryStreamReader &Reader) {
-  if (auto EC = checkHashHdrVersion(HashHdr))
-    return EC;
-
-  // HashHdr->HrSize specifies the number of bytes of PSHashRecords we have.
-  // Verify that we can read them all.
-  if (HashHdr->HrSize % sizeof(PSHashRecord))
-    return make_error<RawError>(raw_error_code::corrupt_file,
-                                "Invalid HR array size.");
-  uint32_t NumHashRecords = HashHdr->HrSize / sizeof(PSHashRecord);
-  if (auto EC = Reader.readArray(HashRecords, NumHashRecords))
-    return joinErrors(std::move(EC),
-                      make_error<RawError>(raw_error_code::corrupt_file,
-                                           "Error reading hash records."));
-
-  return Error::success();
-}
-}
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/GSI.h b/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/GSI.h
deleted file mode 100644
index 9e63bc83548f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/GSI.h
+++ /dev/null
@@ -1,68 +0,0 @@
-//===- GSI.h - Common Declarations for GlobalsStream and PublicsStream ----===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// The data structures defined in this file are based on the reference
-// implementation which is available at
-// https://github.com/Microsoft/microsoft-pdb/blob/master/PDB/dbi/gsi.h
-//
-// When you are reading the reference source code, you'd find the
-// information below useful.
-//
-//  - ppdb1->m_fMinimalDbgInfo seems to be always true.
-//  - SMALLBUCKETS macro is defined.
-//
-// The reference doesn't compile, so I learned just by reading code.
-// It's not guaranteed to be correct.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_DEBUGINFO_PDB_RAW_GSI_H
-#define LLVM_LIB_DEBUGINFO_PDB_RAW_GSI_H
-
-#include "llvm/DebugInfo/PDB/Native/RawTypes.h"
-#include "llvm/Support/BinaryStreamArray.h"
-
-#include "llvm/Support/Endian.h"
-#include "llvm/Support/Error.h"
-
-namespace llvm {
-
-class BinaryStreamReader;
-
-namespace pdb {
-
-/// From https://github.com/Microsoft/microsoft-pdb/blob/master/PDB/dbi/gsi.cpp
-static const unsigned IPHR_HASH = 4096;
-
-/// Header of the hash tables found in the globals and publics sections.
-/// Based on GSIHashHeader in
-/// https://github.com/Microsoft/microsoft-pdb/blob/master/PDB/dbi/gsi.h
-struct GSIHashHeader {
-  enum : unsigned {
-    HdrSignature = ~0U,
-    HdrVersion = 0xeffe0000 + 19990810,
-  };
-  support::ulittle32_t VerSignature;
-  support::ulittle32_t VerHdr;
-  support::ulittle32_t HrSize;
-  support::ulittle32_t NumBuckets;
-};
-
-Error readGSIHashBuckets(FixedStreamArray<support::ulittle32_t> &HashBuckets,
-                         const GSIHashHeader *HashHdr,
-                         BinaryStreamReader &Reader);
-Error readGSIHashHeader(const GSIHashHeader *&HashHdr,
-                        BinaryStreamReader &Reader);
-Error readGSIHashRecords(FixedStreamArray<PSHashRecord> &HashRecords,
-                         const GSIHashHeader *HashHdr,
-                         BinaryStreamReader &Reader);
-}
-}
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/PublicsStreamBuilder.cpp b/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/PublicsStreamBuilder.cpp
deleted file mode 100644
index 28c4a8fc35d9..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/DebugInfo/PDB/Native/PublicsStreamBuilder.cpp
+++ /dev/null
@@ -1,89 +0,0 @@
-//===- DbiStreamBuilder.cpp - PDB Dbi Stream Creation -----------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/DebugInfo/PDB/Native/PublicsStreamBuilder.h"
-
-#include "llvm/DebugInfo/MSF/MSFBuilder.h"
-#include "llvm/DebugInfo/MSF/MSFCommon.h"
-#include "llvm/DebugInfo/MSF/MappedBlockStream.h"
-
-#include "GSI.h"
-
-using namespace llvm;
-using namespace llvm::msf;
-using namespace llvm::pdb;
-
-PublicsStreamBuilder::PublicsStreamBuilder(msf::MSFBuilder &Msf) : Msf(Msf) {}
-
-PublicsStreamBuilder::~PublicsStreamBuilder() {}
-
-uint32_t PublicsStreamBuilder::calculateSerializedLength() const {
-  uint32_t Size = 0;
-  Size += sizeof(PublicsStreamHeader);
-  Size += sizeof(GSIHashHeader);
-  Size += HashRecords.size() * sizeof(PSHashRecord);
-  size_t BitmapSizeInBits = alignTo(IPHR_HASH + 1, 32);
-  uint32_t NumBitmapEntries = BitmapSizeInBits / 8;
-  Size += NumBitmapEntries;
-
-  // FIXME: Account for hash buckets.  For now since we we write a zero-bitmap
-  // indicating that no hash buckets are valid, we also write zero byets of hash
-  // bucket data.
-  Size += 0;
-  return Size;
-}
-
-Error PublicsStreamBuilder::finalizeMsfLayout() {
-  Expected<uint32_t> Idx = Msf.addStream(calculateSerializedLength());
-  if (!Idx)
-    return Idx.takeError();
-  StreamIdx = *Idx;
-
-  Expected<uint32_t> RecordIdx = Msf.addStream(0);
-  if (!RecordIdx)
-    return RecordIdx.takeError();
-  RecordStreamIdx = *RecordIdx;
-  return Error::success();
-}
-
-Error PublicsStreamBuilder::commit(BinaryStreamWriter &PublicsWriter) {
-  PublicsStreamHeader PSH;
-  GSIHashHeader GSH;
-
-  // FIXME: Figure out what to put for these values.
-  PSH.AddrMap = 0;
-  PSH.ISectThunkTable = 0;
-  PSH.NumSections = 0;
-  PSH.NumThunks = 0;
-  PSH.OffThunkTable = 0;
-  PSH.SizeOfThunk = 0;
-  PSH.SymHash = 0;
-
-  GSH.VerSignature = GSIHashHeader::HdrSignature;
-  GSH.VerHdr = GSIHashHeader::HdrVersion;
-  GSH.HrSize = 0;
-  GSH.NumBuckets = 0;
-
-  if (auto EC = PublicsWriter.writeObject(PSH))
-    return EC;
-  if (auto EC = PublicsWriter.writeObject(GSH))
-    return EC;
-  if (auto EC = PublicsWriter.writeArray(makeArrayRef(HashRecords)))
-    return EC;
-
-  size_t BitmapSizeInBits = alignTo(IPHR_HASH + 1, 32);
-  uint32_t NumBitmapEntries = BitmapSizeInBits / 8;
-  std::vector<uint8_t> BitmapData(NumBitmapEntries);
-  // FIXME: Build an actual bitmap
-  if (auto EC = PublicsWriter.writeBytes(makeArrayRef(BitmapData)))
-    return EC;
-
-  // FIXME: Write actual hash buckets.
-  return Error::success();
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/ExecutionEngine/MCJIT/ObjectBuffer.h b/external/bsd/llvm/dist/llvm/lib/ExecutionEngine/MCJIT/ObjectBuffer.h
deleted file mode 100644
index 92310f3eb54a..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/ExecutionEngine/MCJIT/ObjectBuffer.h
+++ /dev/null
@@ -1,48 +0,0 @@
-//===--- ObjectBuffer.h - Utility class to wrap object memory ---*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares a wrapper class to hold the memory into which an
-// object will be generated.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_EXECUTIONENGINE_OBJECTBUFFER_H
-#define LLVM_EXECUTIONENGINE_OBJECTBUFFER_H
-
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/Support/MemoryBuffer.h"
-#include "llvm/Support/raw_ostream.h"
-
-namespace llvm {
-
-class ObjectMemoryBuffer : public MemoryBuffer {
-public:
-  template <unsigned N>
-  ObjectMemoryBuffer(SmallVector<char, N> SV)
-    : SV(SV), BufferName("<in-memory object>") {
-    init(this->SV.begin(), this->SV.end(), false);
-  }
-
-  template <unsigned N>
-  ObjectMemoryBuffer(SmallVector<char, N> SV, StringRef Name)
-    : SV(SV), BufferName(Name) {
-    init(this->SV.begin(), this->SV.end(), false);
-  }
-  const char* getBufferIdentifier() const override { return BufferName.c_str(); }
-
-  BufferKind getBufferKind() const override { return MemoryBuffer_Malloc; }
-
-private:
-  SmallVector<char, 4096> SV;
-  std::string BufferName;
-};
-
-} // namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/CMakeLists.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/CMakeLists.txt
deleted file mode 100644
index bc744890b997..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/CMakeLists.txt
+++ /dev/null
@@ -1,68 +0,0 @@
-include(CheckCXXSourceCompiles)
-
-if( APPLE )
-  CHECK_CXX_SOURCE_COMPILES("
-      static thread_local int blah;
-      int main() {
-        return 0;
-      }
-      " HAS_THREAD_LOCAL)
-
-  if( NOT HAS_THREAD_LOCAL )
-    set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Dthread_local=__thread")
-  endif()
-endif()
-
-set(LIBFUZZER_FLAGS_BASE "${CMAKE_CXX_FLAGS}")
-if( LLVM_USE_SANITIZE_COVERAGE )
-  if(NOT "${LLVM_USE_SANITIZER}" STREQUAL "Address")
-    message(FATAL_ERROR
-      "LibFuzzer and its tests require LLVM_USE_SANITIZER=Address and "
-      "LLVM_USE_SANITIZE_COVERAGE=YES to be set."
-      )
-  endif()
-
-  # Disable the coverage and sanitizer instrumentation for the fuzzer itself.
-  set(CMAKE_CXX_FLAGS "${LIBFUZZER_FLAGS_BASE} -fno-sanitize-coverage=trace-pc-guard,edge,trace-cmp,indirect-calls,8bit-counters -Werror")
-endif()
-
-# Compile libFuzzer if the compilation is specifically requested, OR
-# if the platform is known to be working.
-if ( LLVM_USE_SANITIZE_COVERAGE OR CMAKE_SYSTEM_NAME MATCHES "Darwin|Linux" )
-  add_library(LLVMFuzzerNoMainObjects OBJECT
-      FuzzerCrossOver.cpp
-      FuzzerDriver.cpp
-      FuzzerExtFunctionsDlsym.cpp
-      FuzzerExtFunctionsDlsymWin.cpp
-      FuzzerExtFunctionsWeak.cpp
-      FuzzerExtraCounters.cpp
-      FuzzerIO.cpp
-      FuzzerIOPosix.cpp
-      FuzzerIOWindows.cpp
-      FuzzerLoop.cpp
-      FuzzerMerge.cpp
-      FuzzerMutate.cpp
-      FuzzerSHA1.cpp
-      FuzzerShmemPosix.cpp
-      FuzzerShmemWindows.cpp
-      FuzzerTracePC.cpp
-      FuzzerUtil.cpp
-      FuzzerUtilDarwin.cpp
-      FuzzerUtilLinux.cpp
-      FuzzerUtilPosix.cpp
-      FuzzerUtilWindows.cpp
-      )
-  add_library(LLVMFuzzerNoMain STATIC
-      $<TARGET_OBJECTS:LLVMFuzzerNoMainObjects>
-      )
-  target_link_libraries(LLVMFuzzerNoMain ${LLVM_PTHREAD_LIB})
-  add_library(LLVMFuzzer STATIC
-      FuzzerMain.cpp
-      $<TARGET_OBJECTS:LLVMFuzzerNoMainObjects>
-      )
-  target_link_libraries(LLVMFuzzer ${LLVM_PTHREAD_LIB})
-endif()
-
-if( LLVM_USE_SANITIZE_COVERAGE AND LLVM_INCLUDE_TESTS )
-  add_subdirectory(test)
-endif()
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerCorpus.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerCorpus.h
deleted file mode 100644
index bae0aea78f13..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerCorpus.h
+++ /dev/null
@@ -1,275 +0,0 @@
-//===- FuzzerCorpus.h - Internal header for the Fuzzer ----------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// fuzzer::InputCorpus
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_CORPUS
-#define LLVM_FUZZER_CORPUS
-
-#include "FuzzerDefs.h"
-#include "FuzzerIO.h"
-#include "FuzzerRandom.h"
-#include "FuzzerSHA1.h"
-#include "FuzzerTracePC.h"
-#include <algorithm>
-#include <numeric>
-#include <random>
-#include <unordered_set>
-
-namespace fuzzer {
-
-struct InputInfo {
-  Unit U;  // The actual input data.
-  uint8_t Sha1[kSHA1NumBytes];  // Checksum.
-  // Number of features that this input has and no smaller input has.
-  size_t NumFeatures = 0;
-  size_t Tmp = 0; // Used by ValidateFeatureSet.
-  // Stats.
-  size_t NumExecutedMutations = 0;
-  size_t NumSuccessfullMutations = 0;
-  bool MayDeleteFile = false;
-  bool Reduced = false;
-  std::vector<uint32_t> UniqFeatureSet;
-};
-
-class InputCorpus {
-  static const size_t kFeatureSetSize = 1 << 21;
- public:
-  InputCorpus(const std::string &OutputCorpus) : OutputCorpus(OutputCorpus) {
-    memset(InputSizesPerFeature, 0, sizeof(InputSizesPerFeature));
-    memset(SmallestElementPerFeature, 0, sizeof(SmallestElementPerFeature));
-  }
-  ~InputCorpus() {
-    for (auto II : Inputs)
-      delete II;
-  }
-  size_t size() const { return Inputs.size(); }
-  size_t SizeInBytes() const {
-    size_t Res = 0;
-    for (auto II : Inputs)
-      Res += II->U.size();
-    return Res;
-  }
-  size_t NumActiveUnits() const {
-    size_t Res = 0;
-    for (auto II : Inputs)
-      Res += !II->U.empty();
-    return Res;
-  }
-  size_t MaxInputSize() const {
-    size_t Res = 0;
-    for (auto II : Inputs)
-        Res = std::max(Res, II->U.size());
-    return Res;
-  }
-  bool empty() const { return Inputs.empty(); }
-  const Unit &operator[] (size_t Idx) const { return Inputs[Idx]->U; }
-  void AddToCorpus(const Unit &U, size_t NumFeatures, bool MayDeleteFile,
-                   const std::vector<uint32_t> &FeatureSet) {
-    assert(!U.empty());
-    if (FeatureDebug)
-      Printf("ADD_TO_CORPUS %zd NF %zd\n", Inputs.size(), NumFeatures);
-    Inputs.push_back(new InputInfo());
-    InputInfo &II = *Inputs.back();
-    II.U = U;
-    II.NumFeatures = NumFeatures;
-    II.MayDeleteFile = MayDeleteFile;
-    II.UniqFeatureSet = FeatureSet;
-    std::sort(II.UniqFeatureSet.begin(), II.UniqFeatureSet.end());
-    ComputeSHA1(U.data(), U.size(), II.Sha1);
-    Hashes.insert(Sha1ToString(II.Sha1));
-    UpdateCorpusDistribution();
-    PrintCorpus();
-    // ValidateFeatureSet();
-  }
-
-  // Debug-only
-  void PrintUnit(const Unit &U) {
-    if (!FeatureDebug) return;
-    for (uint8_t C : U) {
-      if (C != 'F' && C != 'U' && C != 'Z')
-        C = '.';
-      Printf("%c", C);
-    }
-  }
-
-  // Debug-only
-  void PrintFeatureSet(const std::vector<uint32_t> &FeatureSet) {
-    if (!FeatureDebug) return;
-    Printf("{");
-    for (uint32_t Feature: FeatureSet)
-      Printf("%u,", Feature);
-    Printf("}");
-  }
-
-  // Debug-only
-  void PrintCorpus() {
-    if (!FeatureDebug) return;
-    Printf("======= CORPUS:\n");
-    int i = 0;
-    for (auto II : Inputs) {
-      if (std::find(II->U.begin(), II->U.end(), 'F') != II->U.end()) {
-        Printf("[%2d] ", i);
-        Printf("%s sz=%zd ", Sha1ToString(II->Sha1).c_str(), II->U.size());
-        PrintUnit(II->U);
-        Printf(" ");
-        PrintFeatureSet(II->UniqFeatureSet);
-        Printf("\n");
-      }
-      i++;
-    }
-  }
-
-  void Replace(InputInfo *II, const Unit &U) {
-    assert(II->U.size() > U.size());
-    Hashes.erase(Sha1ToString(II->Sha1));
-    DeleteFile(*II);
-    ComputeSHA1(U.data(), U.size(), II->Sha1);
-    Hashes.insert(Sha1ToString(II->Sha1));
-    II->U = U;
-    II->Reduced = true;
-  }
-
-  bool HasUnit(const Unit &U) { return Hashes.count(Hash(U)); }
-  bool HasUnit(const std::string &H) { return Hashes.count(H); }
-  InputInfo &ChooseUnitToMutate(Random &Rand) {
-    InputInfo &II = *Inputs[ChooseUnitIdxToMutate(Rand)];
-    assert(!II.U.empty());
-    return II;
-  };
-
-  // Returns an index of random unit from the corpus to mutate.
-  // Hypothesis: units added to the corpus last are more likely to be
-  // interesting. This function gives more weight to the more recent units.
-  size_t ChooseUnitIdxToMutate(Random &Rand) {
-    size_t Idx = static_cast<size_t>(CorpusDistribution(Rand));
-    assert(Idx < Inputs.size());
-    return Idx;
-  }
-
-  void PrintStats() {
-    for (size_t i = 0; i < Inputs.size(); i++) {
-      const auto &II = *Inputs[i];
-      Printf("  [%zd %s]\tsz: %zd\truns: %zd\tsucc: %zd\n", i,
-             Sha1ToString(II.Sha1).c_str(), II.U.size(),
-             II.NumExecutedMutations, II.NumSuccessfullMutations);
-    }
-  }
-
-  void PrintFeatureSet() {
-    for (size_t i = 0; i < kFeatureSetSize; i++) {
-      if(size_t Sz = GetFeature(i))
-        Printf("[%zd: id %zd sz%zd] ", i, SmallestElementPerFeature[i], Sz);
-    }
-    Printf("\n\t");
-    for (size_t i = 0; i < Inputs.size(); i++)
-      if (size_t N = Inputs[i]->NumFeatures)
-        Printf(" %zd=>%zd ", i, N);
-    Printf("\n");
-  }
-
-  void DeleteFile(const InputInfo &II) {
-    if (!OutputCorpus.empty() && II.MayDeleteFile)
-      RemoveFile(DirPlusFile(OutputCorpus, Sha1ToString(II.Sha1)));
-  }
-
-  void DeleteInput(size_t Idx) {
-    InputInfo &II = *Inputs[Idx];
-    DeleteFile(II);
-    Unit().swap(II.U);
-    if (FeatureDebug)
-      Printf("EVICTED %zd\n", Idx);
-  }
-
-  bool AddFeature(size_t Idx, uint32_t NewSize, bool Shrink) {
-    assert(NewSize);
-    Idx = Idx % kFeatureSetSize;
-    uint32_t OldSize = GetFeature(Idx);
-    if (OldSize == 0 || (Shrink && OldSize > NewSize)) {
-      if (OldSize > 0) {
-        size_t OldIdx = SmallestElementPerFeature[Idx];
-        InputInfo &II = *Inputs[OldIdx];
-        assert(II.NumFeatures > 0);
-        II.NumFeatures--;
-        if (II.NumFeatures == 0)
-          DeleteInput(OldIdx);
-      } else {
-        NumAddedFeatures++;
-      }
-      NumUpdatedFeatures++;
-      if (FeatureDebug)
-        Printf("ADD FEATURE %zd sz %d\n", Idx, NewSize);
-      SmallestElementPerFeature[Idx] = Inputs.size();
-      InputSizesPerFeature[Idx] = NewSize;
-      return true;
-    }
-    return false;
-  }
-
-  size_t NumFeatures() const { return NumAddedFeatures; }
-  size_t NumFeatureUpdates() const { return NumUpdatedFeatures; }
-
-  void ResetFeatureSet() {
-    assert(Inputs.empty());
-    memset(InputSizesPerFeature, 0, sizeof(InputSizesPerFeature));
-    memset(SmallestElementPerFeature, 0, sizeof(SmallestElementPerFeature));
-  }
-
-private:
-
-  static const bool FeatureDebug = false;
-
-  size_t GetFeature(size_t Idx) const { return InputSizesPerFeature[Idx]; }
-
-  void ValidateFeatureSet() {
-    if (FeatureDebug)
-      PrintFeatureSet();
-    for (size_t Idx = 0; Idx < kFeatureSetSize; Idx++)
-      if (GetFeature(Idx))
-        Inputs[SmallestElementPerFeature[Idx]]->Tmp++;
-    for (auto II: Inputs) {
-      if (II->Tmp != II->NumFeatures)
-        Printf("ZZZ %zd %zd\n", II->Tmp, II->NumFeatures);
-      assert(II->Tmp == II->NumFeatures);
-      II->Tmp = 0;
-    }
-  }
-
-  // Updates the probability distribution for the units in the corpus.
-  // Must be called whenever the corpus or unit weights are changed.
-  void UpdateCorpusDistribution() {
-    size_t N = Inputs.size();
-    assert(N);
-    Intervals.resize(N + 1);
-    Weights.resize(N);
-    std::iota(Intervals.begin(), Intervals.end(), 0);
-    for (size_t i = 0; i < N; i++)
-      Weights[i] = Inputs[i]->NumFeatures * (i + 1);
-    CorpusDistribution = std::piecewise_constant_distribution<double>(
-        Intervals.begin(), Intervals.end(), Weights.begin());
-  }
-  std::piecewise_constant_distribution<double> CorpusDistribution;
-
-  std::vector<double> Intervals;
-  std::vector<double> Weights;
-
-  std::unordered_set<std::string> Hashes;
-  std::vector<InputInfo*> Inputs;
-
-  size_t NumAddedFeatures = 0;
-  size_t NumUpdatedFeatures = 0;
-  uint32_t InputSizesPerFeature[kFeatureSetSize];
-  uint32_t SmallestElementPerFeature[kFeatureSetSize];
-
-  std::string OutputCorpus;
-};
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_CORPUS
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerCrossOver.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerCrossOver.cpp
deleted file mode 100644
index 8b0fd7d529a8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerCrossOver.cpp
+++ /dev/null
@@ -1,52 +0,0 @@
-//===- FuzzerCrossOver.cpp - Cross over two test inputs -------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Cross over test inputs.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerDefs.h"
-#include "FuzzerMutate.h"
-#include "FuzzerRandom.h"
-#include <cstring>
-
-namespace fuzzer {
-
-// Cross Data1 and Data2, store the result (up to MaxOutSize bytes) in Out.
-size_t MutationDispatcher::CrossOver(const uint8_t *Data1, size_t Size1,
-                                     const uint8_t *Data2, size_t Size2,
-                                     uint8_t *Out, size_t MaxOutSize) {
-  assert(Size1 || Size2);
-  MaxOutSize = Rand(MaxOutSize) + 1;
-  size_t OutPos = 0;
-  size_t Pos1 = 0;
-  size_t Pos2 = 0;
-  size_t *InPos = &Pos1;
-  size_t InSize = Size1;
-  const uint8_t *Data = Data1;
-  bool CurrentlyUsingFirstData = true;
-  while (OutPos < MaxOutSize && (Pos1 < Size1 || Pos2 < Size2)) {
-    // Merge a part of Data into Out.
-    size_t OutSizeLeft = MaxOutSize - OutPos;
-    if (*InPos < InSize) {
-      size_t InSizeLeft = InSize - *InPos;
-      size_t MaxExtraSize = std::min(OutSizeLeft, InSizeLeft);
-      size_t ExtraSize = Rand(MaxExtraSize) + 1;
-      memcpy(Out + OutPos, Data + *InPos, ExtraSize);
-      OutPos += ExtraSize;
-      (*InPos) += ExtraSize;
-    }
-    // Use the other input data on the next iteration.
-    InPos  = CurrentlyUsingFirstData ? &Pos2 : &Pos1;
-    InSize = CurrentlyUsingFirstData ? Size2 : Size1;
-    Data   = CurrentlyUsingFirstData ? Data2 : Data1;
-    CurrentlyUsingFirstData = !CurrentlyUsingFirstData;
-  }
-  return OutPos;
-}
-
-}  // namespace fuzzer
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDefs.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDefs.h
deleted file mode 100644
index 27f5719236dd..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDefs.h
+++ /dev/null
@@ -1,128 +0,0 @@
-//===- FuzzerDefs.h - Internal header for the Fuzzer ------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Basic definitions.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_DEFS_H
-#define LLVM_FUZZER_DEFS_H
-
-#include <cassert>
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-#include <string>
-#include <vector>
-
-// Platform detection.
-#ifdef __linux__
-#define LIBFUZZER_APPLE 0
-#define LIBFUZZER_LINUX 1
-#define LIBFUZZER_WINDOWS 0
-#elif __APPLE__
-#define LIBFUZZER_APPLE 1
-#define LIBFUZZER_LINUX 0
-#define LIBFUZZER_WINDOWS 0
-#elif _WIN32
-#define LIBFUZZER_APPLE 0
-#define LIBFUZZER_LINUX 0
-#define LIBFUZZER_WINDOWS 1
-#else
-#error "Support for your platform has not been implemented"
-#endif
-
-#ifndef __has_attribute
-#  define __has_attribute(x) 0
-#endif
-
-#define LIBFUZZER_POSIX LIBFUZZER_APPLE || LIBFUZZER_LINUX
-
-#ifdef __x86_64
-#  if __has_attribute(target)
-#    define ATTRIBUTE_TARGET_POPCNT __attribute__((target("popcnt")))
-#  else
-#    define ATTRIBUTE_TARGET_POPCNT
-#  endif
-#else
-#  define ATTRIBUTE_TARGET_POPCNT
-#endif
-
-
-#ifdef __clang__  // avoid gcc warning.
-#  if __has_attribute(no_sanitize)
-#    define ATTRIBUTE_NO_SANITIZE_MEMORY __attribute__((no_sanitize("memory")))
-#  else
-#    define ATTRIBUTE_NO_SANITIZE_MEMORY
-#  endif
-#  define ALWAYS_INLINE __attribute__((always_inline))
-#else
-#  define ATTRIBUTE_NO_SANITIZE_MEMORY
-#  define ALWAYS_INLINE
-#endif // __clang__
-
-#define ATTRIBUTE_NO_SANITIZE_ADDRESS __attribute__((no_sanitize_address))
-
-#if defined(__has_feature)
-#  if __has_feature(address_sanitizer)
-#    define ATTRIBUTE_NO_SANITIZE_ALL ATTRIBUTE_NO_SANITIZE_ADDRESS
-#  elif __has_feature(memory_sanitizer)
-#    define ATTRIBUTE_NO_SANITIZE_ALL ATTRIBUTE_NO_SANITIZE_MEMORY
-#  else
-#    define ATTRIBUTE_NO_SANITIZE_ALL
-#  endif
-#else
-#  define ATTRIBUTE_NO_SANITIZE_ALL
-#endif
-
-#if LIBFUZZER_WINDOWS
-#define ATTRIBUTE_INTERFACE __declspec(dllexport)
-#else
-#define ATTRIBUTE_INTERFACE __attribute__((visibility("default")))
-#endif
-
-namespace fuzzer {
-
-template <class T> T Min(T a, T b) { return a < b ? a : b; }
-template <class T> T Max(T a, T b) { return a > b ? a : b; }
-
-class Random;
-class Dictionary;
-class DictionaryEntry;
-class MutationDispatcher;
-struct FuzzingOptions;
-class InputCorpus;
-struct InputInfo;
-struct ExternalFunctions;
-
-// Global interface to functions that may or may not be available.
-extern ExternalFunctions *EF;
-
-typedef std::vector<uint8_t> Unit;
-typedef std::vector<Unit> UnitVector;
-typedef int (*UserCallback)(const uint8_t *Data, size_t Size);
-
-int FuzzerDriver(int *argc, char ***argv, UserCallback Callback);
-
-struct ScopedDoingMyOwnMemOrStr {
-  ScopedDoingMyOwnMemOrStr() { DoingMyOwnMemOrStr++; }
-  ~ScopedDoingMyOwnMemOrStr() { DoingMyOwnMemOrStr--; }
-  static int DoingMyOwnMemOrStr;
-};
-
-inline uint8_t  Bswap(uint8_t x)  { return x; }
-inline uint16_t Bswap(uint16_t x) { return __builtin_bswap16(x); }
-inline uint32_t Bswap(uint32_t x) { return __builtin_bswap32(x); }
-inline uint64_t Bswap(uint64_t x) { return __builtin_bswap64(x); }
-
-uint8_t *ExtraCountersBegin();
-uint8_t *ExtraCountersEnd();
-void ClearExtraCounters();
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_DEFS_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDictionary.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDictionary.h
deleted file mode 100644
index 84cee87b8971..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDictionary.h
+++ /dev/null
@@ -1,127 +0,0 @@
-//===- FuzzerDictionary.h - Internal header for the Fuzzer ------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// fuzzer::Dictionary
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_DICTIONARY_H
-#define LLVM_FUZZER_DICTIONARY_H
-
-#include "FuzzerDefs.h"
-#include "FuzzerIO.h"
-#include "FuzzerUtil.h"
-#include <algorithm>
-#include <limits>
-
-namespace fuzzer {
-// A simple POD sized array of bytes.
-template <size_t kMaxSizeT> class FixedWord {
-public:
-  static const size_t kMaxSize = kMaxSizeT;
-  FixedWord() {}
-  FixedWord(const uint8_t *B, uint8_t S) { Set(B, S); }
-
-  void Set(const uint8_t *B, uint8_t S) {
-    assert(S <= kMaxSize);
-    memcpy(Data, B, S);
-    Size = S;
-  }
-
-  bool operator==(const FixedWord<kMaxSize> &w) const {
-    ScopedDoingMyOwnMemOrStr scoped_doing_my_own_mem_os_str;
-    return Size == w.Size && 0 == memcmp(Data, w.Data, Size);
-  }
-
-  bool operator<(const FixedWord<kMaxSize> &w) const {
-    ScopedDoingMyOwnMemOrStr scoped_doing_my_own_mem_os_str;
-    if (Size != w.Size)
-      return Size < w.Size;
-    return memcmp(Data, w.Data, Size) < 0;
-  }
-
-  static size_t GetMaxSize() { return kMaxSize; }
-  const uint8_t *data() const { return Data; }
-  uint8_t size() const { return Size; }
-
-private:
-  uint8_t Size = 0;
-  uint8_t Data[kMaxSize];
-};
-
-typedef FixedWord<64> Word;
-
-class DictionaryEntry {
- public:
-  DictionaryEntry() {}
-  DictionaryEntry(Word W) : W(W) {}
-  DictionaryEntry(Word W, size_t PositionHint) : W(W), PositionHint(PositionHint) {}
-  const Word &GetW() const { return W; }
-
-  bool HasPositionHint() const { return PositionHint != std::numeric_limits<size_t>::max(); }
-  size_t GetPositionHint() const {
-    assert(HasPositionHint());
-    return PositionHint;
-  }
-  void IncUseCount() { UseCount++; }
-  void IncSuccessCount() { SuccessCount++; }
-  size_t GetUseCount() const { return UseCount; }
-  size_t GetSuccessCount() const {return SuccessCount; }
-
-  void Print(const char *PrintAfter = "\n") {
-    PrintASCII(W.data(), W.size());
-    if (HasPositionHint())
-      Printf("@%zd", GetPositionHint());
-    Printf("%s", PrintAfter);
-  }
-
-private:
-  Word W;
-  size_t PositionHint = std::numeric_limits<size_t>::max();
-  size_t UseCount = 0;
-  size_t SuccessCount = 0;
-};
-
-class Dictionary {
- public:
-  static const size_t kMaxDictSize = 1 << 14;
-
-  bool ContainsWord(const Word &W) const {
-    return std::any_of(begin(), end(), [&](const DictionaryEntry &DE) {
-      return DE.GetW() == W;
-    });
-  }
-  const DictionaryEntry *begin() const { return &DE[0]; }
-  const DictionaryEntry *end() const { return begin() + Size; }
-  DictionaryEntry & operator[] (size_t Idx) {
-    assert(Idx < Size);
-    return DE[Idx];
-  }
-  void push_back(DictionaryEntry DE) {
-    if (Size < kMaxDictSize)
-      this->DE[Size++] = DE;
-  }
-  void clear() { Size = 0; }
-  bool empty() const { return Size == 0; }
-  size_t size() const { return Size; }
-
-private:
-  DictionaryEntry DE[kMaxDictSize];
-  size_t Size = 0;
-};
-
-// Parses one dictionary entry.
-// If successfull, write the enty to Unit and returns true,
-// otherwise returns false.
-bool ParseOneDictionaryEntry(const std::string &Str, Unit *U);
-// Parses the dictionary file, fills Units, returns true iff all lines
-// were parsed succesfully.
-bool ParseDictionaryFile(const std::string &Text, std::vector<Unit> *Units);
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_DICTIONARY_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDriver.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDriver.cpp
deleted file mode 100644
index fd8cab38a7bb..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerDriver.cpp
+++ /dev/null
@@ -1,763 +0,0 @@
-//===- FuzzerDriver.cpp - FuzzerDriver function and flags -----------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// FuzzerDriver and flag parsing.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerCorpus.h"
-#include "FuzzerIO.h"
-#include "FuzzerInterface.h"
-#include "FuzzerInternal.h"
-#include "FuzzerMutate.h"
-#include "FuzzerRandom.h"
-#include "FuzzerShmem.h"
-#include "FuzzerTracePC.h"
-#include <algorithm>
-#include <atomic>
-#include <chrono>
-#include <cstring>
-#include <mutex>
-#include <string>
-#include <thread>
-
-// This function should be present in the libFuzzer so that the client
-// binary can test for its existence.
-extern "C" __attribute__((used)) void __libfuzzer_is_present() {}
-
-namespace fuzzer {
-
-// Program arguments.
-struct FlagDescription {
-  const char *Name;
-  const char *Description;
-  int   Default;
-  int   *IntFlag;
-  const char **StrFlag;
-  unsigned int *UIntFlag;
-};
-
-struct {
-#define FUZZER_DEPRECATED_FLAG(Name)
-#define FUZZER_FLAG_INT(Name, Default, Description) int Name;
-#define FUZZER_FLAG_UNSIGNED(Name, Default, Description) unsigned int Name;
-#define FUZZER_FLAG_STRING(Name, Description) const char *Name;
-#include "FuzzerFlags.def"
-#undef FUZZER_DEPRECATED_FLAG
-#undef FUZZER_FLAG_INT
-#undef FUZZER_FLAG_UNSIGNED
-#undef FUZZER_FLAG_STRING
-} Flags;
-
-static const FlagDescription FlagDescriptions [] {
-#define FUZZER_DEPRECATED_FLAG(Name)                                           \
-  {#Name, "Deprecated; don't use", 0, nullptr, nullptr, nullptr},
-#define FUZZER_FLAG_INT(Name, Default, Description)                            \
-  {#Name, Description, Default, &Flags.Name, nullptr, nullptr},
-#define FUZZER_FLAG_UNSIGNED(Name, Default, Description)                       \
-  {#Name,   Description, static_cast<int>(Default),                            \
-   nullptr, nullptr, &Flags.Name},
-#define FUZZER_FLAG_STRING(Name, Description)                                  \
-  {#Name, Description, 0, nullptr, &Flags.Name, nullptr},
-#include "FuzzerFlags.def"
-#undef FUZZER_DEPRECATED_FLAG
-#undef FUZZER_FLAG_INT
-#undef FUZZER_FLAG_UNSIGNED
-#undef FUZZER_FLAG_STRING
-};
-
-static const size_t kNumFlags =
-    sizeof(FlagDescriptions) / sizeof(FlagDescriptions[0]);
-
-static std::vector<std::string> *Inputs;
-static std::string *ProgName;
-
-static void PrintHelp() {
-  Printf("Usage:\n");
-  auto Prog = ProgName->c_str();
-  Printf("\nTo run fuzzing pass 0 or more directories.\n");
-  Printf("%s [-flag1=val1 [-flag2=val2 ...] ] [dir1 [dir2 ...] ]\n", Prog);
-
-  Printf("\nTo run individual tests without fuzzing pass 1 or more files:\n");
-  Printf("%s [-flag1=val1 [-flag2=val2 ...] ] file1 [file2 ...]\n", Prog);
-
-  Printf("\nFlags: (strictly in form -flag=value)\n");
-  size_t MaxFlagLen = 0;
-  for (size_t F = 0; F < kNumFlags; F++)
-    MaxFlagLen = std::max(strlen(FlagDescriptions[F].Name), MaxFlagLen);
-
-  for (size_t F = 0; F < kNumFlags; F++) {
-    const auto &D = FlagDescriptions[F];
-    if (strstr(D.Description, "internal flag") == D.Description) continue;
-    Printf(" %s", D.Name);
-    for (size_t i = 0, n = MaxFlagLen - strlen(D.Name); i < n; i++)
-      Printf(" ");
-    Printf("\t");
-    Printf("%d\t%s\n", D.Default, D.Description);
-  }
-  Printf("\nFlags starting with '--' will be ignored and "
-            "will be passed verbatim to subprocesses.\n");
-}
-
-static const char *FlagValue(const char *Param, const char *Name) {
-  size_t Len = strlen(Name);
-  if (Param[0] == '-' && strstr(Param + 1, Name) == Param + 1 &&
-      Param[Len + 1] == '=')
-      return &Param[Len + 2];
-  return nullptr;
-}
-
-// Avoid calling stol as it triggers a bug in clang/glibc build.
-static long MyStol(const char *Str) {
-  long Res = 0;
-  long Sign = 1;
-  if (*Str == '-') {
-    Str++;
-    Sign = -1;
-  }
-  for (size_t i = 0; Str[i]; i++) {
-    char Ch = Str[i];
-    if (Ch < '0' || Ch > '9')
-      return Res;
-    Res = Res * 10 + (Ch - '0');
-  }
-  return Res * Sign;
-}
-
-static bool ParseOneFlag(const char *Param) {
-  if (Param[0] != '-') return false;
-  if (Param[1] == '-') {
-    static bool PrintedWarning = false;
-    if (!PrintedWarning) {
-      PrintedWarning = true;
-      Printf("INFO: libFuzzer ignores flags that start with '--'\n");
-    }
-    for (size_t F = 0; F < kNumFlags; F++)
-      if (FlagValue(Param + 1, FlagDescriptions[F].Name))
-        Printf("WARNING: did you mean '%s' (single dash)?\n", Param + 1);
-    return true;
-  }
-  for (size_t F = 0; F < kNumFlags; F++) {
-    const char *Name = FlagDescriptions[F].Name;
-    const char *Str = FlagValue(Param, Name);
-    if (Str)  {
-      if (FlagDescriptions[F].IntFlag) {
-        int Val = MyStol(Str);
-        *FlagDescriptions[F].IntFlag = Val;
-        if (Flags.verbosity >= 2)
-          Printf("Flag: %s %d\n", Name, Val);
-        return true;
-      } else if (FlagDescriptions[F].UIntFlag) {
-        unsigned int Val = std::stoul(Str);
-        *FlagDescriptions[F].UIntFlag = Val;
-        if (Flags.verbosity >= 2)
-          Printf("Flag: %s %u\n", Name, Val);
-        return true;
-      } else if (FlagDescriptions[F].StrFlag) {
-        *FlagDescriptions[F].StrFlag = Str;
-        if (Flags.verbosity >= 2)
-          Printf("Flag: %s %s\n", Name, Str);
-        return true;
-      } else {  // Deprecated flag.
-        Printf("Flag: %s: deprecated, don't use\n", Name);
-        return true;
-      }
-    }
-  }
-  Printf("\n\nWARNING: unrecognized flag '%s'; "
-         "use -help=1 to list all flags\n\n", Param);
-  return true;
-}
-
-// We don't use any library to minimize dependencies.
-static void ParseFlags(const std::vector<std::string> &Args) {
-  for (size_t F = 0; F < kNumFlags; F++) {
-    if (FlagDescriptions[F].IntFlag)
-      *FlagDescriptions[F].IntFlag = FlagDescriptions[F].Default;
-    if (FlagDescriptions[F].UIntFlag)
-      *FlagDescriptions[F].UIntFlag =
-          static_cast<unsigned int>(FlagDescriptions[F].Default);
-    if (FlagDescriptions[F].StrFlag)
-      *FlagDescriptions[F].StrFlag = nullptr;
-  }
-  Inputs = new std::vector<std::string>;
-  for (size_t A = 1; A < Args.size(); A++) {
-    if (ParseOneFlag(Args[A].c_str())) {
-      if (Flags.ignore_remaining_args)
-        break;
-      continue;
-    }
-    Inputs->push_back(Args[A]);
-  }
-}
-
-static std::mutex Mu;
-
-static void PulseThread() {
-  while (true) {
-    SleepSeconds(600);
-    std::lock_guard<std::mutex> Lock(Mu);
-    Printf("pulse...\n");
-  }
-}
-
-static void WorkerThread(const std::string &Cmd, std::atomic<unsigned> *Counter,
-                         unsigned NumJobs, std::atomic<bool> *HasErrors) {
-  while (true) {
-    unsigned C = (*Counter)++;
-    if (C >= NumJobs) break;
-    std::string Log = "fuzz-" + std::to_string(C) + ".log";
-    std::string ToRun = Cmd + " > " + Log + " 2>&1\n";
-    if (Flags.verbosity)
-      Printf("%s", ToRun.c_str());
-    int ExitCode = ExecuteCommand(ToRun);
-    if (ExitCode != 0)
-      *HasErrors = true;
-    std::lock_guard<std::mutex> Lock(Mu);
-    Printf("================== Job %u exited with exit code %d ============\n",
-           C, ExitCode);
-    fuzzer::CopyFileToErr(Log);
-  }
-}
-
-std::string CloneArgsWithoutX(const std::vector<std::string> &Args,
-                              const char *X1, const char *X2) {
-  std::string Cmd;
-  for (auto &S : Args) {
-    if (FlagValue(S.c_str(), X1) || FlagValue(S.c_str(), X2))
-      continue;
-    Cmd += S + " ";
-  }
-  return Cmd;
-}
-
-static int RunInMultipleProcesses(const std::vector<std::string> &Args,
-                                  unsigned NumWorkers, unsigned NumJobs) {
-  std::atomic<unsigned> Counter(0);
-  std::atomic<bool> HasErrors(false);
-  std::string Cmd = CloneArgsWithoutX(Args, "jobs", "workers");
-  std::vector<std::thread> V;
-  std::thread Pulse(PulseThread);
-  Pulse.detach();
-  for (unsigned i = 0; i < NumWorkers; i++)
-    V.push_back(std::thread(WorkerThread, Cmd, &Counter, NumJobs, &HasErrors));
-  for (auto &T : V)
-    T.join();
-  return HasErrors ? 1 : 0;
-}
-
-static void RssThread(Fuzzer *F, size_t RssLimitMb) {
-  while (true) {
-    SleepSeconds(1);
-    size_t Peak = GetPeakRSSMb();
-    if (Peak > RssLimitMb)
-      F->RssLimitCallback();
-  }
-}
-
-static void StartRssThread(Fuzzer *F, size_t RssLimitMb) {
-  if (!RssLimitMb) return;
-  std::thread T(RssThread, F, RssLimitMb);
-  T.detach();
-}
-
-int RunOneTest(Fuzzer *F, const char *InputFilePath, size_t MaxLen) {
-  Unit U = FileToVector(InputFilePath);
-  if (MaxLen && MaxLen < U.size())
-    U.resize(MaxLen);
-  F->ExecuteCallback(U.data(), U.size());
-  F->TryDetectingAMemoryLeak(U.data(), U.size(), true);
-  return 0;
-}
-
-static bool AllInputsAreFiles() {
-  if (Inputs->empty()) return false;
-  for (auto &Path : *Inputs)
-    if (!IsFile(Path))
-      return false;
-  return true;
-}
-
-static std::string GetDedupTokenFromFile(const std::string &Path) {
-  auto S = FileToString(Path);
-  auto Beg = S.find("DEDUP_TOKEN:");
-  if (Beg == std::string::npos)
-    return "";
-  auto End = S.find('\n', Beg);
-  if (End == std::string::npos)
-    return "";
-  return S.substr(Beg, End - Beg);
-}
-
-int CleanseCrashInput(const std::vector<std::string> &Args,
-                       const FuzzingOptions &Options) {
-  if (Inputs->size() != 1 || !Flags.exact_artifact_path) {
-    Printf("ERROR: -cleanse_crash should be given one input file and"
-          " -exact_artifact_path\n");
-    exit(1);
-  }
-  std::string InputFilePath = Inputs->at(0);
-  std::string OutputFilePath = Flags.exact_artifact_path;
-  std::string BaseCmd =
-      CloneArgsWithoutX(Args, "cleanse_crash", "cleanse_crash");
-
-  auto InputPos = BaseCmd.find(" " + InputFilePath + " ");
-  assert(InputPos != std::string::npos);
-  BaseCmd.erase(InputPos, InputFilePath.size() + 1);
-
-  auto LogFilePath = DirPlusFile(
-      TmpDir(), "libFuzzerTemp." + std::to_string(GetPid()) + ".txt");
-  auto TmpFilePath = DirPlusFile(
-      TmpDir(), "libFuzzerTemp." + std::to_string(GetPid()) + ".repro");
-  auto LogFileRedirect = " > " + LogFilePath + " 2>&1 ";
-
-  auto Cmd = BaseCmd + " " + TmpFilePath + LogFileRedirect;
-
-  std::string CurrentFilePath = InputFilePath;
-  auto U = FileToVector(CurrentFilePath);
-  size_t Size = U.size();
-
-  const std::vector<uint8_t> ReplacementBytes = {' ', 0xff};
-  for (int NumAttempts = 0; NumAttempts < 5; NumAttempts++) {
-    bool Changed = false;
-    for (size_t Idx = 0; Idx < Size; Idx++) {
-      Printf("CLEANSE[%d]: Trying to replace byte %zd of %zd\n", NumAttempts,
-             Idx, Size);
-      uint8_t OriginalByte = U[Idx];
-      if (ReplacementBytes.end() != std::find(ReplacementBytes.begin(),
-                                              ReplacementBytes.end(),
-                                              OriginalByte))
-        continue;
-      for (auto NewByte : ReplacementBytes) {
-        U[Idx] = NewByte;
-        WriteToFile(U, TmpFilePath);
-        auto ExitCode = ExecuteCommand(Cmd);
-        RemoveFile(TmpFilePath);
-        if (!ExitCode) {
-          U[Idx] = OriginalByte;
-        } else {
-          Changed = true;
-          Printf("CLEANSE: Replaced byte %zd with 0x%x\n", Idx, NewByte);
-          WriteToFile(U, OutputFilePath);
-          break;
-        }
-      }
-    }
-    if (!Changed) break;
-  }
-  RemoveFile(LogFilePath);
-  return 0;
-}
-
-int MinimizeCrashInput(const std::vector<std::string> &Args,
-                       const FuzzingOptions &Options) {
-  if (Inputs->size() != 1) {
-    Printf("ERROR: -minimize_crash should be given one input file\n");
-    exit(1);
-  }
-  std::string InputFilePath = Inputs->at(0);
-  auto BaseCmd = SplitBefore(
-      "-ignore_remaining_args=1",
-      CloneArgsWithoutX(Args, "minimize_crash", "exact_artifact_path"));
-  auto InputPos = BaseCmd.first.find(" " + InputFilePath + " ");
-  assert(InputPos != std::string::npos);
-  BaseCmd.first.erase(InputPos, InputFilePath.size() + 1);
-  if (Flags.runs <= 0 && Flags.max_total_time == 0) {
-    Printf("INFO: you need to specify -runs=N or "
-           "-max_total_time=N with -minimize_crash=1\n"
-           "INFO: defaulting to -max_total_time=600\n");
-    BaseCmd.first += " -max_total_time=600";
-  }
-
-  auto LogFilePath = DirPlusFile(
-      TmpDir(), "libFuzzerTemp." + std::to_string(GetPid()) + ".txt");
-  auto LogFileRedirect = " > " + LogFilePath + " 2>&1 ";
-
-  std::string CurrentFilePath = InputFilePath;
-  while (true) {
-    Unit U = FileToVector(CurrentFilePath);
-    Printf("CRASH_MIN: minimizing crash input: '%s' (%zd bytes)\n",
-           CurrentFilePath.c_str(), U.size());
-
-    auto Cmd = BaseCmd.first + " " + CurrentFilePath + LogFileRedirect + " " +
-               BaseCmd.second;
-
-    Printf("CRASH_MIN: executing: %s\n", Cmd.c_str());
-    int ExitCode = ExecuteCommand(Cmd);
-    if (ExitCode == 0) {
-      Printf("ERROR: the input %s did not crash\n", CurrentFilePath.c_str());
-      exit(1);
-    }
-    Printf("CRASH_MIN: '%s' (%zd bytes) caused a crash. Will try to minimize "
-           "it further\n",
-           CurrentFilePath.c_str(), U.size());
-    auto DedupToken1 = GetDedupTokenFromFile(LogFilePath);
-    if (!DedupToken1.empty())
-      Printf("CRASH_MIN: DedupToken1: %s\n", DedupToken1.c_str());
-
-    std::string ArtifactPath =
-        Flags.exact_artifact_path
-            ? Flags.exact_artifact_path
-            : Options.ArtifactPrefix + "minimized-from-" + Hash(U);
-    Cmd += " -minimize_crash_internal_step=1 -exact_artifact_path=" +
-        ArtifactPath;
-    Printf("CRASH_MIN: executing: %s\n", Cmd.c_str());
-    ExitCode = ExecuteCommand(Cmd);
-    CopyFileToErr(LogFilePath);
-    if (ExitCode == 0) {
-      if (Flags.exact_artifact_path) {
-        CurrentFilePath = Flags.exact_artifact_path;
-        WriteToFile(U, CurrentFilePath);
-      }
-      Printf("CRASH_MIN: failed to minimize beyond %s (%d bytes), exiting\n",
-             CurrentFilePath.c_str(), U.size());
-      break;
-    }
-    auto DedupToken2 = GetDedupTokenFromFile(LogFilePath);
-    if (!DedupToken2.empty())
-      Printf("CRASH_MIN: DedupToken2: %s\n", DedupToken2.c_str());
-
-    if (DedupToken1 != DedupToken2) {
-      if (Flags.exact_artifact_path) {
-        CurrentFilePath = Flags.exact_artifact_path;
-        WriteToFile(U, CurrentFilePath);
-      }
-      Printf("CRASH_MIN: mismatch in dedup tokens"
-             " (looks like a different bug). Won't minimize further\n");
-      break;
-    }
-
-    CurrentFilePath = ArtifactPath;
-    Printf("*********************************\n");
-  }
-  RemoveFile(LogFilePath);
-  return 0;
-}
-
-int MinimizeCrashInputInternalStep(Fuzzer *F, InputCorpus *Corpus) {
-  assert(Inputs->size() == 1);
-  std::string InputFilePath = Inputs->at(0);
-  Unit U = FileToVector(InputFilePath);
-  Printf("INFO: Starting MinimizeCrashInputInternalStep: %zd\n", U.size());
-  if (U.size() < 2) {
-    Printf("INFO: The input is small enough, exiting\n");
-    exit(0);
-  }
-  F->SetMaxInputLen(U.size());
-  F->SetMaxMutationLen(U.size() - 1);
-  F->MinimizeCrashLoop(U);
-  Printf("INFO: Done MinimizeCrashInputInternalStep, no crashes found\n");
-  exit(0);
-  return 0;
-}
-
-int AnalyzeDictionary(Fuzzer *F, const std::vector<Unit>& Dict,
-                      UnitVector& Corpus) {
-  Printf("Started dictionary minimization (up to %d tests)\n",
-         Dict.size() * Corpus.size() * 2);
-
-  // Scores and usage count for each dictionary unit.
-  std::vector<int> Scores(Dict.size());
-  std::vector<int> Usages(Dict.size());
-
-  std::vector<size_t> InitialFeatures;
-  std::vector<size_t> ModifiedFeatures;
-  for (auto &C : Corpus) {
-    // Get coverage for the testcase without modifications.
-    F->ExecuteCallback(C.data(), C.size());
-    InitialFeatures.clear();
-    TPC.CollectFeatures([&](size_t Feature) -> bool {
-      InitialFeatures.push_back(Feature);
-      return true;
-    });
-
-    for (size_t i = 0; i < Dict.size(); ++i) {
-      auto Data = C;
-      auto StartPos = std::search(Data.begin(), Data.end(),
-                                  Dict[i].begin(), Dict[i].end());
-      // Skip dictionary unit, if the testcase does not contain it.
-      if (StartPos == Data.end())
-        continue;
-
-      ++Usages[i];
-      while (StartPos != Data.end()) {
-        // Replace all occurrences of dictionary unit in the testcase.
-        auto EndPos = StartPos + Dict[i].size();
-        for (auto It = StartPos; It != EndPos; ++It)
-          *It ^= 0xFF;
-
-        StartPos = std::search(EndPos, Data.end(),
-                               Dict[i].begin(), Dict[i].end());
-      }
-
-      // Get coverage for testcase with masked occurrences of dictionary unit.
-      F->ExecuteCallback(Data.data(), Data.size());
-      ModifiedFeatures.clear();
-      TPC.CollectFeatures([&](size_t Feature) -> bool {
-        ModifiedFeatures.push_back(Feature);
-        return true;
-      });
-
-      if (InitialFeatures == ModifiedFeatures)
-        --Scores[i];
-      else
-        Scores[i] += 2;
-    }
-  }
-
-  Printf("###### Useless dictionary elements. ######\n");
-  for (size_t i = 0; i < Dict.size(); ++i) {
-    // Dictionary units with positive score are treated as useful ones.
-    if (Scores[i] > 0)
-       continue;
-
-    Printf("\"");
-    PrintASCII(Dict[i].data(), Dict[i].size(), "\"");
-    Printf(" # Score: %d, Used: %d\n", Scores[i], Usages[i]);
-  }
-  Printf("###### End of useless dictionary elements. ######\n");
-  return 0;
-}
-
-int FuzzerDriver(int *argc, char ***argv, UserCallback Callback) {
-  using namespace fuzzer;
-  assert(argc && argv && "Argument pointers cannot be nullptr");
-  std::string Argv0((*argv)[0]);
-  EF = new ExternalFunctions();
-  if (EF->LLVMFuzzerInitialize)
-    EF->LLVMFuzzerInitialize(argc, argv);
-  const std::vector<std::string> Args(*argv, *argv + *argc);
-  assert(!Args.empty());
-  ProgName = new std::string(Args[0]);
-  if (Argv0 != *ProgName) {
-    Printf("ERROR: argv[0] has been modified in LLVMFuzzerInitialize\n");
-    exit(1);
-  }
-  ParseFlags(Args);
-  if (Flags.help) {
-    PrintHelp();
-    return 0;
-  }
-
-  if (Flags.close_fd_mask & 2)
-    DupAndCloseStderr();
-  if (Flags.close_fd_mask & 1)
-    CloseStdout();
-
-  if (Flags.jobs > 0 && Flags.workers == 0) {
-    Flags.workers = std::min(NumberOfCpuCores() / 2, Flags.jobs);
-    if (Flags.workers > 1)
-      Printf("Running %u workers\n", Flags.workers);
-  }
-
-  if (Flags.workers > 0 && Flags.jobs > 0)
-    return RunInMultipleProcesses(Args, Flags.workers, Flags.jobs);
-
-  const size_t kMaxSaneLen = 1 << 20;
-  const size_t kMinDefaultLen = 4096;
-  FuzzingOptions Options;
-  Options.Verbosity = Flags.verbosity;
-  Options.MaxLen = Flags.max_len;
-  Options.ExperimentalLenControl = Flags.experimental_len_control;
-  if (Flags.experimental_len_control && Flags.max_len == kMinDefaultLen)
-    Options.MaxLen = 1 << 20;
-  Options.UnitTimeoutSec = Flags.timeout;
-  Options.ErrorExitCode = Flags.error_exitcode;
-  Options.TimeoutExitCode = Flags.timeout_exitcode;
-  Options.MaxTotalTimeSec = Flags.max_total_time;
-  Options.DoCrossOver = Flags.cross_over;
-  Options.MutateDepth = Flags.mutate_depth;
-  Options.UseCounters = Flags.use_counters;
-  Options.UseIndirCalls = Flags.use_indir_calls;
-  Options.UseMemmem = Flags.use_memmem;
-  Options.UseCmp = Flags.use_cmp;
-  Options.UseValueProfile = Flags.use_value_profile;
-  Options.Shrink = Flags.shrink;
-  Options.ReduceInputs = Flags.reduce_inputs;
-  Options.ShuffleAtStartUp = Flags.shuffle;
-  Options.PreferSmall = Flags.prefer_small;
-  Options.ReloadIntervalSec = Flags.reload;
-  Options.OnlyASCII = Flags.only_ascii;
-  Options.DetectLeaks = Flags.detect_leaks;
-  Options.TraceMalloc = Flags.trace_malloc;
-  Options.RssLimitMb = Flags.rss_limit_mb;
-  if (Flags.runs >= 0)
-    Options.MaxNumberOfRuns = Flags.runs;
-  if (!Inputs->empty() && !Flags.minimize_crash_internal_step)
-    Options.OutputCorpus = (*Inputs)[0];
-  Options.ReportSlowUnits = Flags.report_slow_units;
-  if (Flags.artifact_prefix)
-    Options.ArtifactPrefix = Flags.artifact_prefix;
-  if (Flags.exact_artifact_path)
-    Options.ExactArtifactPath = Flags.exact_artifact_path;
-  std::vector<Unit> Dictionary;
-  if (Flags.dict)
-    if (!ParseDictionaryFile(FileToString(Flags.dict), &Dictionary))
-      return 1;
-  if (Flags.verbosity > 0 && !Dictionary.empty())
-    Printf("Dictionary: %zd entries\n", Dictionary.size());
-  bool DoPlainRun = AllInputsAreFiles();
-  Options.SaveArtifacts =
-      !DoPlainRun || Flags.minimize_crash_internal_step;
-  Options.PrintNewCovPcs = Flags.print_pcs;
-  Options.PrintFinalStats = Flags.print_final_stats;
-  Options.PrintCorpusStats = Flags.print_corpus_stats;
-  Options.PrintCoverage = Flags.print_coverage;
-  Options.DumpCoverage = Flags.dump_coverage;
-  if (Flags.exit_on_src_pos)
-    Options.ExitOnSrcPos = Flags.exit_on_src_pos;
-  if (Flags.exit_on_item)
-    Options.ExitOnItem = Flags.exit_on_item;
-
-  unsigned Seed = Flags.seed;
-  // Initialize Seed.
-  if (Seed == 0)
-    Seed =
-        std::chrono::system_clock::now().time_since_epoch().count() + GetPid();
-  if (Flags.verbosity)
-    Printf("INFO: Seed: %u\n", Seed);
-
-  Random Rand(Seed);
-  auto *MD = new MutationDispatcher(Rand, Options);
-  auto *Corpus = new InputCorpus(Options.OutputCorpus);
-  auto *F = new Fuzzer(Callback, *Corpus, *MD, Options);
-
-  for (auto &U: Dictionary)
-    if (U.size() <= Word::GetMaxSize())
-      MD->AddWordToManualDictionary(Word(U.data(), U.size()));
-
-  StartRssThread(F, Flags.rss_limit_mb);
-
-  Options.HandleAbrt = Flags.handle_abrt;
-  Options.HandleBus = Flags.handle_bus;
-  Options.HandleFpe = Flags.handle_fpe;
-  Options.HandleIll = Flags.handle_ill;
-  Options.HandleInt = Flags.handle_int;
-  Options.HandleSegv = Flags.handle_segv;
-  Options.HandleTerm = Flags.handle_term;
-  Options.HandleXfsz = Flags.handle_xfsz;
-  SetSignalHandler(Options);
-
-  if (Flags.minimize_crash)
-    return MinimizeCrashInput(Args, Options);
-
-  if (Flags.minimize_crash_internal_step)
-    return MinimizeCrashInputInternalStep(F, Corpus);
-
-  if (Flags.cleanse_crash)
-    return CleanseCrashInput(Args, Options);
-
-  if (auto Name = Flags.run_equivalence_server) {
-    SMR.Destroy(Name);
-    if (!SMR.Create(Name)) {
-       Printf("ERROR: can't create shared memory region\n");
-      return 1;
-    }
-    Printf("INFO: EQUIVALENCE SERVER UP\n");
-    while (true) {
-      SMR.WaitClient();
-      size_t Size = SMR.ReadByteArraySize();
-      SMR.WriteByteArray(nullptr, 0);
-      const Unit tmp(SMR.GetByteArray(), SMR.GetByteArray() + Size);
-      F->ExecuteCallback(tmp.data(), tmp.size());
-      SMR.PostServer();
-    }
-    return 0;
-  }
-
-  if (auto Name = Flags.use_equivalence_server) {
-    if (!SMR.Open(Name)) {
-      Printf("ERROR: can't open shared memory region\n");
-      return 1;
-    }
-    Printf("INFO: EQUIVALENCE CLIENT UP\n");
-  }
-
-  if (DoPlainRun) {
-    Options.SaveArtifacts = false;
-    int Runs = std::max(1, Flags.runs);
-    Printf("%s: Running %zd inputs %d time(s) each.\n", ProgName->c_str(),
-           Inputs->size(), Runs);
-    for (auto &Path : *Inputs) {
-      auto StartTime = system_clock::now();
-      Printf("Running: %s\n", Path.c_str());
-      for (int Iter = 0; Iter < Runs; Iter++)
-        RunOneTest(F, Path.c_str(), Options.MaxLen);
-      auto StopTime = system_clock::now();
-      auto MS = duration_cast<milliseconds>(StopTime - StartTime).count();
-      Printf("Executed %s in %zd ms\n", Path.c_str(), (long)MS);
-    }
-    Printf("***\n"
-           "*** NOTE: fuzzing was not performed, you have only\n"
-           "***       executed the target code on a fixed set of inputs.\n"
-           "***\n");
-    F->PrintFinalStats();
-    exit(0);
-  }
-
-  if (Flags.merge) {
-    if (Options.MaxLen == 0)
-      F->SetMaxInputLen(kMaxSaneLen);
-    if (Flags.merge_control_file)
-      F->CrashResistantMergeInternalStep(Flags.merge_control_file);
-    else
-      F->CrashResistantMerge(Args, *Inputs,
-                             Flags.load_coverage_summary,
-                             Flags.save_coverage_summary);
-    exit(0);
-  }
-
-  size_t TemporaryMaxLen = Options.MaxLen ? Options.MaxLen : kMaxSaneLen;
-
-  UnitVector InitialCorpus;
-  for (auto &Inp : *Inputs) {
-    Printf("Loading corpus dir: %s\n", Inp.c_str());
-    ReadDirToVectorOfUnits(Inp.c_str(), &InitialCorpus, nullptr,
-                           TemporaryMaxLen, /*ExitOnError=*/false);
-  }
-
-  if (Flags.analyze_dict) {
-    if (Dictionary.empty() || Inputs->empty()) {
-      Printf("ERROR: can't analyze dict without dict and corpus provided\n");
-      return 1;
-    }
-    if (AnalyzeDictionary(F, Dictionary, InitialCorpus)) {
-      Printf("Dictionary analysis failed\n");
-      exit(1);
-    }
-    Printf("Dictionary analysis suceeded\n");
-    exit(0);
-  }
-
-  if (Options.MaxLen == 0) {
-    size_t MaxLen = 0;
-    for (auto &U : InitialCorpus)
-      MaxLen = std::max(U.size(), MaxLen);
-    F->SetMaxInputLen(std::min(std::max(kMinDefaultLen, MaxLen), kMaxSaneLen));
-  }
-
-  if (InitialCorpus.empty()) {
-    InitialCorpus.push_back(Unit({'\n'}));  // Valid ASCII input.
-    if (Options.Verbosity)
-      Printf("INFO: A corpus is not provided, starting from an empty corpus\n");
-  }
-  F->ShuffleAndMinimize(&InitialCorpus);
-  InitialCorpus.clear();  // Don't need this memory any more.
-  F->Loop();
-
-  if (Flags.verbosity)
-    Printf("Done %zd runs in %zd second(s)\n", F->getTotalNumberOfRuns(),
-           F->secondsSinceProcessStartUp());
-  F->PrintFinalStats();
-
-  exit(0);  // Don't let F destroy itself.
-}
-
-// Storage for global ExternalFunctions object.
-ExternalFunctions *EF = nullptr;
-
-}  // namespace fuzzer
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctions.def b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctions.def
deleted file mode 100644
index 3bc5302c31c6..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctions.def
+++ /dev/null
@@ -1,46 +0,0 @@
-//===- FuzzerExtFunctions.def - External functions --------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// This defines the external function pointers that
-// ``fuzzer::ExternalFunctions`` should contain and try to initialize.  The
-// EXT_FUNC macro must be defined at the point of inclusion. The signature of
-// the macro is:
-//
-// EXT_FUNC(<name>, <return_type>, <function_signature>, <warn_if_missing>)
-//===----------------------------------------------------------------------===//
-
-// Optional user functions
-EXT_FUNC(LLVMFuzzerInitialize, int, (int *argc, char ***argv), false);
-EXT_FUNC(LLVMFuzzerCustomMutator, size_t,
-         (uint8_t * Data, size_t Size, size_t MaxSize, unsigned int Seed),
-         false);
-EXT_FUNC(LLVMFuzzerCustomCrossOver, size_t,
-         (const uint8_t * Data1, size_t Size1,
-          const uint8_t * Data2, size_t Size2,
-          uint8_t * Out, size_t MaxOutSize, unsigned int Seed),
-         false);
-
-// Sanitizer functions
-EXT_FUNC(__lsan_enable, void, (), false);
-EXT_FUNC(__lsan_disable, void, (), false);
-EXT_FUNC(__lsan_do_recoverable_leak_check, int, (), false);
-EXT_FUNC(__sanitizer_install_malloc_and_free_hooks, int,
-         (void (*malloc_hook)(const volatile void *, size_t),
-          void (*free_hook)(const volatile void *)),
-         false);
-EXT_FUNC(__sanitizer_print_memory_profile, int, (size_t, size_t), false);
-EXT_FUNC(__sanitizer_print_stack_trace, void, (), true);
-EXT_FUNC(__sanitizer_symbolize_pc, void,
-         (void *, const char *fmt, char *out_buf, size_t out_buf_size), false);
-EXT_FUNC(__sanitizer_get_module_and_offset_for_pc, int,
-         (void *pc, char *module_path,
-         size_t module_path_len,void **pc_offset), false);
-EXT_FUNC(__sanitizer_set_death_callback, void, (void (*)(void)), true);
-EXT_FUNC(__sanitizer_set_report_fd, void, (void*), false);
-EXT_FUNC(__sanitizer_dump_coverage, void, (const uintptr_t *, uintptr_t),
-         false);
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctions.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctions.h
deleted file mode 100644
index 2672a385478d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctions.h
+++ /dev/null
@@ -1,35 +0,0 @@
-//===- FuzzerExtFunctions.h - Interface to external functions ---*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Defines an interface to (possibly optional) functions.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_EXT_FUNCTIONS_H
-#define LLVM_FUZZER_EXT_FUNCTIONS_H
-
-#include <stddef.h>
-#include <stdint.h>
-
-namespace fuzzer {
-
-struct ExternalFunctions {
-  // Initialize function pointers. Functions that are not available will be set
-  // to nullptr.  Do not call this constructor  before ``main()`` has been
-  // entered.
-  ExternalFunctions();
-
-#define EXT_FUNC(NAME, RETURN_TYPE, FUNC_SIG, WARN)                            \
-  RETURN_TYPE(*NAME) FUNC_SIG = nullptr
-
-#include "FuzzerExtFunctions.def"
-
-#undef EXT_FUNC
-};
-} // namespace fuzzer
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsDlsym.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsDlsym.cpp
deleted file mode 100644
index 06bddd5de38f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsDlsym.cpp
+++ /dev/null
@@ -1,52 +0,0 @@
-//===- FuzzerExtFunctionsDlsym.cpp - Interface to external functions ------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Implementation for operating systems that support dlsym(). We only use it on
-// Apple platforms for now. We don't use this approach on Linux because it
-// requires that clients of LibFuzzer pass ``--export-dynamic`` to the linker.
-// That is a complication we don't wish to expose to clients right now.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_APPLE
-
-#include "FuzzerExtFunctions.h"
-#include "FuzzerIO.h"
-#include <dlfcn.h>
-
-using namespace fuzzer;
-
-template <typename T>
-static T GetFnPtr(const char *FnName, bool WarnIfMissing) {
-  dlerror(); // Clear any previous errors.
-  void *Fn = dlsym(RTLD_DEFAULT, FnName);
-  if (Fn == nullptr) {
-    if (WarnIfMissing) {
-      const char *ErrorMsg = dlerror();
-      Printf("WARNING: Failed to find function \"%s\".", FnName);
-      if (ErrorMsg)
-        Printf(" Reason %s.", ErrorMsg);
-      Printf("\n");
-    }
-  }
-  return reinterpret_cast<T>(Fn);
-}
-
-namespace fuzzer {
-
-ExternalFunctions::ExternalFunctions() {
-#define EXT_FUNC(NAME, RETURN_TYPE, FUNC_SIG, WARN)                            \
-  this->NAME = GetFnPtr<decltype(ExternalFunctions::NAME)>(#NAME, WARN)
-
-#include "FuzzerExtFunctions.def"
-
-#undef EXT_FUNC
-}
-
-} // namespace fuzzer
-
-#endif // LIBFUZZER_APPLE
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsDlsymWin.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsDlsymWin.cpp
deleted file mode 100644
index 321b3ec5d414..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsDlsymWin.cpp
+++ /dev/null
@@ -1,62 +0,0 @@
-//===- FuzzerExtFunctionsDlsymWin.cpp - Interface to external functions ---===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Implementation using dynamic loading for Windows.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_WINDOWS
-
-#include "FuzzerExtFunctions.h"
-#include "FuzzerIO.h"
-#include "Windows.h"
-
-// This must be included after Windows.h.
-#include "Psapi.h"
-
-namespace fuzzer {
-
-ExternalFunctions::ExternalFunctions() {
-  HMODULE Modules[1024];
-  DWORD BytesNeeded;
-  HANDLE CurrentProcess = GetCurrentProcess();
-
-  if (!EnumProcessModules(CurrentProcess, Modules, sizeof(Modules),
-                          &BytesNeeded)) {
-    Printf("EnumProcessModules failed (error: %d).\n", GetLastError());
-    exit(1);
-  }
-
-  if (sizeof(Modules) < BytesNeeded) {
-    Printf("Error: the array is not big enough to hold all loaded modules.\n");
-    exit(1);
-  }
-
-  for (size_t i = 0; i < (BytesNeeded / sizeof(HMODULE)); i++)
-  {
-    FARPROC Fn;
-#define EXT_FUNC(NAME, RETURN_TYPE, FUNC_SIG, WARN)                            \
-    if (this->NAME == nullptr) {                                               \
-      Fn = GetProcAddress(Modules[i], #NAME);                                  \
-      if (Fn == nullptr)                                                       \
-         Fn = GetProcAddress(Modules[i], #NAME "__dll");                       \
-      this->NAME = (decltype(ExternalFunctions::NAME)) Fn;                     \
-    }
-#include "FuzzerExtFunctions.def"
-#undef EXT_FUNC
-  }
-
-#define EXT_FUNC(NAME, RETURN_TYPE, FUNC_SIG, WARN)                            \
-  if (this->NAME == nullptr && WARN)                                           \
-    Printf("WARNING: Failed to find function \"%s\".\n", #NAME);
-#include "FuzzerExtFunctions.def"
-#undef EXT_FUNC
-}
-
-} // namespace fuzzer
-
-#endif // LIBFUZZER_WINDOWS
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsWeak.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsWeak.cpp
deleted file mode 100644
index 503f0395cf8f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsWeak.cpp
+++ /dev/null
@@ -1,54 +0,0 @@
-//===- FuzzerExtFunctionsWeak.cpp - Interface to external functions -------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Implementation for Linux. This relies on the linker's support for weak
-// symbols. We don't use this approach on Apple platforms because it requires
-// clients of LibFuzzer to pass ``-U _<symbol_name>`` to the linker to allow
-// weak symbols to be undefined. That is a complication we don't want to expose
-// to clients right now.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_LINUX
-
-#include "FuzzerExtFunctions.h"
-#include "FuzzerIO.h"
-
-extern "C" {
-// Declare these symbols as weak to allow them to be optionally defined.
-#define EXT_FUNC(NAME, RETURN_TYPE, FUNC_SIG, WARN)                            \
-  __attribute__((weak)) RETURN_TYPE NAME FUNC_SIG
-
-#include "FuzzerExtFunctions.def"
-
-#undef EXT_FUNC
-}
-
-using namespace fuzzer;
-
-static void CheckFnPtr(void *FnPtr, const char *FnName, bool WarnIfMissing) {
-  if (FnPtr == nullptr && WarnIfMissing) {
-    Printf("WARNING: Failed to find function \"%s\".\n", FnName);
-  }
-}
-
-namespace fuzzer {
-
-ExternalFunctions::ExternalFunctions() {
-#define EXT_FUNC(NAME, RETURN_TYPE, FUNC_SIG, WARN)                            \
-  this->NAME = ::NAME;                                                         \
-  CheckFnPtr(reinterpret_cast<void *>(reinterpret_cast<uintptr_t>(::NAME)),    \
-             #NAME, WARN);
-
-#include "FuzzerExtFunctions.def"
-
-#undef EXT_FUNC
-}
-
-} // namespace fuzzer
-
-#endif // LIBFUZZER_LINUX
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsWeakAlias.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsWeakAlias.cpp
deleted file mode 100644
index e10f7b4dcac2..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtFunctionsWeakAlias.cpp
+++ /dev/null
@@ -1,56 +0,0 @@
-//===- FuzzerExtFunctionsWeakAlias.cpp - Interface to external functions --===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Implementation using weak aliases. Works for Windows.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_WINDOWS
-
-#include "FuzzerExtFunctions.h"
-#include "FuzzerIO.h"
-
-using namespace fuzzer;
-
-extern "C" {
-// Declare these symbols as weak to allow them to be optionally defined.
-#define EXT_FUNC(NAME, RETURN_TYPE, FUNC_SIG, WARN)                            \
-  RETURN_TYPE NAME##Def FUNC_SIG {                                             \
-    Printf("ERROR: Function \"%s\" not defined.\n", #NAME);                    \
-    exit(1);                                                                   \
-  }                                                                            \
-  RETURN_TYPE NAME FUNC_SIG __attribute__((weak, alias(#NAME "Def")));
-
-#include "FuzzerExtFunctions.def"
-
-#undef EXT_FUNC
-}
-
-template <typename T>
-static T *GetFnPtr(T *Fun, T *FunDef, const char *FnName, bool WarnIfMissing) {
-  if (Fun == FunDef) {
-    if (WarnIfMissing)
-      Printf("WARNING: Failed to find function \"%s\".\n", FnName);
-    return nullptr;
-  }
-  return Fun;
-}
-
-namespace fuzzer {
-
-ExternalFunctions::ExternalFunctions() {
-#define EXT_FUNC(NAME, RETURN_TYPE, FUNC_SIG, WARN)                            \
-  this->NAME = GetFnPtr<decltype(::NAME)>(::NAME, ::NAME##Def, #NAME, WARN);
-
-#include "FuzzerExtFunctions.def"
-
-#undef EXT_FUNC
-}
-
-} // namespace fuzzer
-
-#endif // LIBFUZZER_WINDOWS
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtraCounters.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtraCounters.cpp
deleted file mode 100644
index 07dbe0fdee76..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerExtraCounters.cpp
+++ /dev/null
@@ -1,41 +0,0 @@
-//===- FuzzerExtraCounters.cpp - Extra coverage counters ------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Extra coverage counters defined by user code.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerDefs.h"
-
-#if LIBFUZZER_LINUX
-__attribute__((weak)) extern uint8_t __start___libfuzzer_extra_counters;
-__attribute__((weak)) extern uint8_t __stop___libfuzzer_extra_counters;
-
-namespace fuzzer {
-uint8_t *ExtraCountersBegin() { return &__start___libfuzzer_extra_counters; }
-uint8_t *ExtraCountersEnd() { return &__stop___libfuzzer_extra_counters; }
-ATTRIBUTE_NO_SANITIZE_ALL
-void ClearExtraCounters() {  // hand-written memset, don't asan-ify.
-  uintptr_t *Beg = reinterpret_cast<uintptr_t*>(ExtraCountersBegin());
-  uintptr_t *End = reinterpret_cast<uintptr_t*>(ExtraCountersEnd());
-  for (; Beg < End; Beg++) {
-    *Beg = 0;
-    __asm__ __volatile__("" : : : "memory");
-  }
-}
-
-}  // namespace fuzzer
-
-#else
-// TODO: implement for other platforms.
-namespace fuzzer {
-uint8_t *ExtraCountersBegin() { return nullptr; }
-uint8_t *ExtraCountersEnd() { return nullptr; }
-void ClearExtraCounters() {}
-}  // namespace fuzzer
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerFlags.def b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerFlags.def
deleted file mode 100644
index 526805705b20..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerFlags.def
+++ /dev/null
@@ -1,139 +0,0 @@
-//===- FuzzerFlags.def - Run-time flags -------------------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Flags. FUZZER_FLAG_INT/FUZZER_FLAG_STRING macros should be defined at the
-// point of inclusion. We are not using any flag parsing library for better
-// portability and independence.
-//===----------------------------------------------------------------------===//
-FUZZER_FLAG_INT(verbosity, 1, "Verbosity level.")
-FUZZER_FLAG_UNSIGNED(seed, 0, "Random seed. If 0, seed is generated.")
-FUZZER_FLAG_INT(runs, -1,
-            "Number of individual test runs (-1 for infinite runs).")
-FUZZER_FLAG_INT(max_len, 0, "Maximum length of the test input. "
-    "If 0, libFuzzer tries to guess a good value based on the corpus "
-    "and reports it. ")
-FUZZER_FLAG_INT(experimental_len_control, 0, "experimental flag")
-FUZZER_FLAG_INT(cross_over, 1, "If 1, cross over inputs.")
-FUZZER_FLAG_INT(mutate_depth, 5,
-            "Apply this number of consecutive mutations to each input.")
-FUZZER_FLAG_INT(shuffle, 1, "Shuffle inputs at startup")
-FUZZER_FLAG_INT(prefer_small, 1,
-    "If 1, always prefer smaller inputs during the corpus shuffle.")
-FUZZER_FLAG_INT(
-    timeout, 1200,
-    "Timeout in seconds (if positive). "
-    "If one unit runs more than this number of seconds the process will abort.")
-FUZZER_FLAG_INT(error_exitcode, 77, "When libFuzzer itself reports a bug "
-  "this exit code will be used.")
-FUZZER_FLAG_INT(timeout_exitcode, 77, "When libFuzzer reports a timeout "
-  "this exit code will be used.")
-FUZZER_FLAG_INT(max_total_time, 0, "If positive, indicates the maximal total "
-                                   "time in seconds to run the fuzzer.")
-FUZZER_FLAG_INT(help, 0, "Print help.")
-FUZZER_FLAG_INT(merge, 0, "If 1, the 2-nd, 3-rd, etc corpora will be "
-  "merged into the 1-st corpus. Only interesting units will be taken. "
-  "This flag can be used to minimize a corpus.")
-FUZZER_FLAG_STRING(merge_control_file, "internal flag")
-FUZZER_FLAG_STRING(save_coverage_summary, "Experimental:"
-                   " save coverage summary to a given file."
-                   " Used with -merge=1")
-FUZZER_FLAG_STRING(load_coverage_summary, "Experimental:"
-                   " load coverage summary from a given file."
-                   " Treat this coverage as belonging to the first corpus. "
-                   " Used with -merge=1")
-FUZZER_FLAG_INT(minimize_crash, 0, "If 1, minimizes the provided"
-  " crash input. Use with -runs=N or -max_total_time=N to limit "
-  "the number attempts."
-  " Use with -exact_artifact_path to specify the output."
-  " Combine with ASAN_OPTIONS=dedup_token_length=3 (or similar) to ensure that"
-  " the minimized input triggers the same crash."
-  )
-FUZZER_FLAG_INT(cleanse_crash, 0, "If 1, tries to cleanse the provided"
-  " crash input to make it contain fewer original bytes."
-  " Use with -exact_artifact_path to specify the output."
-  )
-FUZZER_FLAG_INT(minimize_crash_internal_step, 0, "internal flag")
-FUZZER_FLAG_INT(use_counters, 1, "Use coverage counters")
-FUZZER_FLAG_INT(use_indir_calls, 1, "Use indirect caller-callee counters")
-FUZZER_FLAG_INT(use_memmem, 1,
-                "Use hints from intercepting memmem, strstr, etc")
-FUZZER_FLAG_INT(use_value_profile, 0,
-                "Experimental. Use value profile to guide fuzzing.")
-FUZZER_FLAG_INT(use_cmp, 1, "Use CMP traces to guide mutations")
-FUZZER_FLAG_INT(shrink, 0, "Experimental. Try to shrink corpus inputs.")
-FUZZER_FLAG_INT(reduce_inputs, 0, "Experimental. "
-  "Try to reduce the size of inputs wile preserving their full feature sets")
-FUZZER_FLAG_UNSIGNED(jobs, 0, "Number of jobs to run. If jobs >= 1 we spawn"
-                          " this number of jobs in separate worker processes"
-                          " with stdout/stderr redirected to fuzz-JOB.log.")
-FUZZER_FLAG_UNSIGNED(workers, 0,
-            "Number of simultaneous worker processes to run the jobs."
-            " If zero, \"min(jobs,NumberOfCpuCores()/2)\" is used.")
-FUZZER_FLAG_INT(reload, 1,
-                "Reload the main corpus every <N> seconds to get new units"
-                " discovered by other processes. If 0, disabled")
-FUZZER_FLAG_INT(report_slow_units, 10,
-    "Report slowest units if they run for more than this number of seconds.")
-FUZZER_FLAG_INT(only_ascii, 0,
-                "If 1, generate only ASCII (isprint+isspace) inputs.")
-FUZZER_FLAG_STRING(dict, "Experimental. Use the dictionary file.")
-FUZZER_FLAG_STRING(artifact_prefix, "Write fuzzing artifacts (crash, "
-                                    "timeout, or slow inputs) as "
-                                    "$(artifact_prefix)file")
-FUZZER_FLAG_STRING(exact_artifact_path,
-                   "Write the single artifact on failure (crash, timeout) "
-                   "as $(exact_artifact_path). This overrides -artifact_prefix "
-                   "and will not use checksum in the file name. Do not "
-                   "use the same path for several parallel processes.")
-FUZZER_FLAG_INT(print_pcs, 0, "If 1, print out newly covered PCs.")
-FUZZER_FLAG_INT(print_final_stats, 0, "If 1, print statistics at exit.")
-FUZZER_FLAG_INT(print_corpus_stats, 0,
-  "If 1, print statistics on corpus elements at exit.")
-FUZZER_FLAG_INT(print_coverage, 0, "If 1, print coverage information as text"
-                                   " at exit.")
-FUZZER_FLAG_INT(dump_coverage, 0, "If 1, dump coverage information as a"
-                                  " .sancov file at exit.")
-FUZZER_FLAG_INT(handle_segv, 1, "If 1, try to intercept SIGSEGV.")
-FUZZER_FLAG_INT(handle_bus, 1, "If 1, try to intercept SIGBUS.")
-FUZZER_FLAG_INT(handle_abrt, 1, "If 1, try to intercept SIGABRT.")
-FUZZER_FLAG_INT(handle_ill, 1, "If 1, try to intercept SIGILL.")
-FUZZER_FLAG_INT(handle_fpe, 1, "If 1, try to intercept SIGFPE.")
-FUZZER_FLAG_INT(handle_int, 1, "If 1, try to intercept SIGINT.")
-FUZZER_FLAG_INT(handle_term, 1, "If 1, try to intercept SIGTERM.")
-FUZZER_FLAG_INT(handle_xfsz, 1, "If 1, try to intercept SIGXFSZ.")
-FUZZER_FLAG_INT(close_fd_mask, 0, "If 1, close stdout at startup; "
-    "if 2, close stderr; if 3, close both. "
-    "Be careful, this will also close e.g. asan's stderr/stdout.")
-FUZZER_FLAG_INT(detect_leaks, 1, "If 1, and if LeakSanitizer is enabled "
-    "try to detect memory leaks during fuzzing (i.e. not only at shut down).")
-FUZZER_FLAG_INT(trace_malloc, 0, "If >= 1 will print all mallocs/frees. "
-    "If >= 2 will also print stack traces.")
-FUZZER_FLAG_INT(rss_limit_mb, 2048, "If non-zero, the fuzzer will exit upon"
-    "reaching this limit of RSS memory usage.")
-FUZZER_FLAG_STRING(exit_on_src_pos, "Exit if a newly found PC originates"
-    " from the given source location. Example: -exit_on_src_pos=foo.cc:123. "
-    "Used primarily for testing libFuzzer itself.")
-FUZZER_FLAG_STRING(exit_on_item, "Exit if an item with a given sha1 sum"
-    " was added to the corpus. "
-    "Used primarily for testing libFuzzer itself.")
-FUZZER_FLAG_INT(ignore_remaining_args, 0, "If 1, ignore all arguments passed "
-                "after this one. Useful for fuzzers that need to do their own "
-                "argument parsing.")
-
-FUZZER_FLAG_STRING(run_equivalence_server, "Experimental")
-FUZZER_FLAG_STRING(use_equivalence_server, "Experimental")
-FUZZER_FLAG_INT(analyze_dict, 0, "Experimental")
-
-FUZZER_DEPRECATED_FLAG(exit_on_first)
-FUZZER_DEPRECATED_FLAG(save_minimized_corpus)
-FUZZER_DEPRECATED_FLAG(sync_command)
-FUZZER_DEPRECATED_FLAG(sync_timeout)
-FUZZER_DEPRECATED_FLAG(test_single_input)
-FUZZER_DEPRECATED_FLAG(drill)
-FUZZER_DEPRECATED_FLAG(truncate_units)
-FUZZER_DEPRECATED_FLAG(output_csv)
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIO.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIO.cpp
deleted file mode 100644
index e3f609ed8a80..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIO.cpp
+++ /dev/null
@@ -1,118 +0,0 @@
-//===- FuzzerIO.cpp - IO utils. -------------------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// IO functions.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerIO.h"
-#include "FuzzerDefs.h"
-#include "FuzzerExtFunctions.h"
-#include <algorithm>
-#include <cstdarg>
-#include <fstream>
-#include <iterator>
-#include <sys/stat.h>
-#include <sys/types.h>
-
-namespace fuzzer {
-
-static FILE *OutputFile = stderr;
-
-long GetEpoch(const std::string &Path) {
-  struct stat St;
-  if (stat(Path.c_str(), &St))
-    return 0;  // Can't stat, be conservative.
-  return St.st_mtime;
-}
-
-Unit FileToVector(const std::string &Path, size_t MaxSize, bool ExitOnError) {
-  std::ifstream T(Path);
-  if (ExitOnError && !T) {
-    Printf("No such directory: %s; exiting\n", Path.c_str());
-    exit(1);
-  }
-
-  T.seekg(0, T.end);
-  size_t FileLen = T.tellg();
-  if (MaxSize)
-    FileLen = std::min(FileLen, MaxSize);
-
-  T.seekg(0, T.beg);
-  Unit Res(FileLen);
-  T.read(reinterpret_cast<char *>(Res.data()), FileLen);
-  return Res;
-}
-
-std::string FileToString(const std::string &Path) {
-  std::ifstream T(Path);
-  return std::string((std::istreambuf_iterator<char>(T)),
-                     std::istreambuf_iterator<char>());
-}
-
-void CopyFileToErr(const std::string &Path) {
-  Printf("%s", FileToString(Path).c_str());
-}
-
-void WriteToFile(const Unit &U, const std::string &Path) {
-  // Use raw C interface because this function may be called from a sig handler.
-  FILE *Out = fopen(Path.c_str(), "w");
-  if (!Out) return;
-  fwrite(U.data(), sizeof(U[0]), U.size(), Out);
-  fclose(Out);
-}
-
-void ReadDirToVectorOfUnits(const char *Path, std::vector<Unit> *V,
-                            long *Epoch, size_t MaxSize, bool ExitOnError) {
-  long E = Epoch ? *Epoch : 0;
-  std::vector<std::string> Files;
-  ListFilesInDirRecursive(Path, Epoch, &Files, /*TopDir*/true);
-  size_t NumLoaded = 0;
-  for (size_t i = 0; i < Files.size(); i++) {
-    auto &X = Files[i];
-    if (Epoch && GetEpoch(X) < E) continue;
-    NumLoaded++;
-    if ((NumLoaded & (NumLoaded - 1)) == 0 && NumLoaded >= 1024)
-      Printf("Loaded %zd/%zd files from %s\n", NumLoaded, Files.size(), Path);
-    auto S = FileToVector(X, MaxSize, ExitOnError);
-    if (!S.empty())
-      V->push_back(S);
-  }
-}
-
-std::string DirPlusFile(const std::string &DirPath,
-                        const std::string &FileName) {
-  return DirPath + GetSeparator() + FileName;
-}
-
-void DupAndCloseStderr() {
-  int OutputFd = DuplicateFile(2);
-  if (OutputFd > 0) {
-    FILE *NewOutputFile = OpenFile(OutputFd, "w");
-    if (NewOutputFile) {
-      OutputFile = NewOutputFile;
-      if (EF->__sanitizer_set_report_fd)
-        EF->__sanitizer_set_report_fd(
-            reinterpret_cast<void *>(GetHandleFromFd(OutputFd)));
-      DiscardOutput(2);
-    }
-  }
-}
-
-void CloseStdout() {
-  DiscardOutput(1);
-}
-
-void Printf(const char *Fmt, ...) {
-  va_list ap;
-  va_start(ap, Fmt);
-  vfprintf(OutputFile, Fmt, ap);
-  va_end(ap);
-  fflush(OutputFile);
-}
-
-}  // namespace fuzzer
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIO.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIO.h
deleted file mode 100644
index 3b66a52d1a64..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIO.h
+++ /dev/null
@@ -1,76 +0,0 @@
-//===- FuzzerIO.h - Internal header for IO utils ----------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// IO interface.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_IO_H
-#define LLVM_FUZZER_IO_H
-
-#include "FuzzerDefs.h"
-
-namespace fuzzer {
-
-long GetEpoch(const std::string &Path);
-
-Unit FileToVector(const std::string &Path, size_t MaxSize = 0,
-                  bool ExitOnError = true);
-
-std::string FileToString(const std::string &Path);
-
-void CopyFileToErr(const std::string &Path);
-
-void WriteToFile(const Unit &U, const std::string &Path);
-
-void ReadDirToVectorOfUnits(const char *Path, std::vector<Unit> *V,
-                            long *Epoch, size_t MaxSize, bool ExitOnError);
-
-// Returns "Dir/FileName" or equivalent for the current OS.
-std::string DirPlusFile(const std::string &DirPath,
-                        const std::string &FileName);
-
-// Returns the name of the dir, similar to the 'dirname' utility.
-std::string DirName(const std::string &FileName);
-
-// Returns path to a TmpDir.
-std::string TmpDir();
-
-bool IsInterestingCoverageFile(const std::string &FileName);
-
-void DupAndCloseStderr();
-
-void CloseStdout();
-
-void Printf(const char *Fmt, ...);
-
-// Print using raw syscalls, useful when printing at early init stages.
-void RawPrint(const char *Str);
-
-// Platform specific functions:
-bool IsFile(const std::string &Path);
-
-void ListFilesInDirRecursive(const std::string &Dir, long *Epoch,
-                             std::vector<std::string> *V, bool TopDir);
-
-char GetSeparator();
-
-FILE* OpenFile(int Fd, const char *Mode);
-
-int CloseFile(int Fd);
-
-int DuplicateFile(int Fd);
-
-void RemoveFile(const std::string &Path);
-
-void DiscardOutput(int Fd);
-
-intptr_t GetHandleFromFd(int fd);
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_IO_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIOPosix.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIOPosix.cpp
deleted file mode 100644
index c5ebdbac467b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIOPosix.cpp
+++ /dev/null
@@ -1,123 +0,0 @@
-//===- FuzzerIOPosix.cpp - IO utils for Posix. ----------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// IO functions implementation using Posix API.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_POSIX
-
-#include "FuzzerExtFunctions.h"
-#include "FuzzerIO.h"
-#include <cstdarg>
-#include <cstdio>
-#include <dirent.h>
-#include <fstream>
-#include <iterator>
-#include <libgen.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <unistd.h>
-
-namespace fuzzer {
-
-bool IsFile(const std::string &Path) {
-  struct stat St;
-  if (stat(Path.c_str(), &St))
-    return false;
-  return S_ISREG(St.st_mode);
-}
-
-void ListFilesInDirRecursive(const std::string &Dir, long *Epoch,
-                             std::vector<std::string> *V, bool TopDir) {
-  auto E = GetEpoch(Dir);
-  if (Epoch)
-    if (E && *Epoch >= E) return;
-
-  DIR *D = opendir(Dir.c_str());
-  if (!D) {
-    Printf("No such directory: %s; exiting\n", Dir.c_str());
-    exit(1);
-  }
-  while (auto E = readdir(D)) {
-    std::string Path = DirPlusFile(Dir, E->d_name);
-    if (E->d_type == DT_REG || E->d_type == DT_LNK)
-      V->push_back(Path);
-    else if (E->d_type == DT_DIR && *E->d_name != '.')
-      ListFilesInDirRecursive(Path, Epoch, V, false);
-  }
-  closedir(D);
-  if (Epoch && TopDir)
-    *Epoch = E;
-}
-
-char GetSeparator() {
-  return '/';
-}
-
-FILE* OpenFile(int Fd, const char* Mode) {
-  return fdopen(Fd, Mode);
-}
-
-int CloseFile(int fd) {
-  return close(fd);
-}
-
-int DuplicateFile(int Fd) {
-  return dup(Fd);
-}
-
-void RemoveFile(const std::string &Path) {
-  unlink(Path.c_str());
-}
-
-void DiscardOutput(int Fd) {
-  FILE* Temp = fopen("/dev/null", "w");
-  if (!Temp)
-    return;
-  dup2(fileno(Temp), Fd);
-  fclose(Temp);
-}
-
-intptr_t GetHandleFromFd(int fd) {
-  return static_cast<intptr_t>(fd);
-}
-
-std::string DirName(const std::string &FileName) {
-  char *Tmp = new char[FileName.size() + 1];
-  memcpy(Tmp, FileName.c_str(), FileName.size() + 1);
-  std::string Res = dirname(Tmp);
-  delete [] Tmp;
-  return Res;
-}
-
-std::string TmpDir() {
-  if (auto Env = getenv("TMPDIR"))
-    return Env;
-  return "/tmp";
-}
-
-bool IsInterestingCoverageFile(const std::string &FileName) {
-  if (FileName.find("compiler-rt/lib/") != std::string::npos)
-    return false; // sanitizer internal.
-  if (FileName.find("/usr/lib/") != std::string::npos)
-    return false;
-  if (FileName.find("/usr/include/") != std::string::npos)
-    return false;
-  if (FileName == "<null>")
-    return false;
-  return true;
-}
-
-
-void RawPrint(const char *Str) {
-  write(2, Str, strlen(Str));
-}
-
-}  // namespace fuzzer
-
-#endif // LIBFUZZER_POSIX
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIOWindows.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIOWindows.cpp
deleted file mode 100644
index 742520267b73..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerIOWindows.cpp
+++ /dev/null
@@ -1,323 +0,0 @@
-//===- FuzzerIOWindows.cpp - IO utils for Windows. ------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// IO functions implementation for Windows.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_WINDOWS
-
-#include "FuzzerExtFunctions.h"
-#include "FuzzerIO.h"
-#include <cstdarg>
-#include <cstdio>
-#include <fstream>
-#include <io.h>
-#include <iterator>
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <windows.h>
-
-namespace fuzzer {
-
-static bool IsFile(const std::string &Path, const DWORD &FileAttributes) {
-
-  if (FileAttributes & FILE_ATTRIBUTE_NORMAL)
-    return true;
-
-  if (FileAttributes & FILE_ATTRIBUTE_DIRECTORY)
-    return false;
-
-  HANDLE FileHandle(
-      CreateFileA(Path.c_str(), 0, FILE_SHARE_READ, NULL, OPEN_EXISTING,
-                  FILE_FLAG_BACKUP_SEMANTICS, 0));
-
-  if (FileHandle == INVALID_HANDLE_VALUE) {
-    Printf("CreateFileA() failed for \"%s\" (Error code: %lu).\n", Path.c_str(),
-        GetLastError());
-    return false;
-  }
-
-  DWORD FileType = GetFileType(FileHandle);
-
-  if (FileType == FILE_TYPE_UNKNOWN) {
-    Printf("GetFileType() failed for \"%s\" (Error code: %lu).\n", Path.c_str(),
-        GetLastError());
-    CloseHandle(FileHandle);
-    return false;
-  }
-
-  if (FileType != FILE_TYPE_DISK) {
-    CloseHandle(FileHandle);
-    return false;
-  }
-
-  CloseHandle(FileHandle);
-  return true;
-}
-
-bool IsFile(const std::string &Path) {
-  DWORD Att = GetFileAttributesA(Path.c_str());
-
-  if (Att == INVALID_FILE_ATTRIBUTES) {
-    Printf("GetFileAttributesA() failed for \"%s\" (Error code: %lu).\n",
-        Path.c_str(), GetLastError());
-    return false;
-  }
-
-  return IsFile(Path, Att);
-}
-
-void ListFilesInDirRecursive(const std::string &Dir, long *Epoch,
-                             std::vector<std::string> *V, bool TopDir) {
-  auto E = GetEpoch(Dir);
-  if (Epoch)
-    if (E && *Epoch >= E) return;
-
-  std::string Path(Dir);
-  assert(!Path.empty());
-  if (Path.back() != '\\')
-      Path.push_back('\\');
-  Path.push_back('*');
-
-  // Get the first directory entry.
-  WIN32_FIND_DATAA FindInfo;
-  HANDLE FindHandle(FindFirstFileA(Path.c_str(), &FindInfo));
-  if (FindHandle == INVALID_HANDLE_VALUE)
-  {
-    if (GetLastError() == ERROR_FILE_NOT_FOUND)
-      return;
-    Printf("No such directory: %s; exiting\n", Dir.c_str());
-    exit(1);
-  }
-
-  do {
-    std::string FileName = DirPlusFile(Dir, FindInfo.cFileName);
-
-    if (FindInfo.dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY) {
-      size_t FilenameLen = strlen(FindInfo.cFileName);
-      if ((FilenameLen == 1 && FindInfo.cFileName[0] == '.') ||
-          (FilenameLen == 2 && FindInfo.cFileName[0] == '.' &&
-                               FindInfo.cFileName[1] == '.'))
-        continue;
-
-      ListFilesInDirRecursive(FileName, Epoch, V, false);
-    }
-    else if (IsFile(FileName, FindInfo.dwFileAttributes))
-      V->push_back(FileName);
-  } while (FindNextFileA(FindHandle, &FindInfo));
-
-  DWORD LastError = GetLastError();
-  if (LastError != ERROR_NO_MORE_FILES)
-    Printf("FindNextFileA failed (Error code: %lu).\n", LastError);
-
-  FindClose(FindHandle);
-
-  if (Epoch && TopDir)
-    *Epoch = E;
-}
-
-char GetSeparator() {
-  return '\\';
-}
-
-FILE* OpenFile(int Fd, const char* Mode) {
-  return _fdopen(Fd, Mode);
-}
-
-int CloseFile(int Fd) {
-  return _close(Fd);
-}
-
-int DuplicateFile(int Fd) {
-  return _dup(Fd);
-}
-
-void RemoveFile(const std::string &Path) {
-  _unlink(Path.c_str());
-}
-
-void DiscardOutput(int Fd) {
-  FILE* Temp = fopen("nul", "w");
-  if (!Temp)
-    return;
-  _dup2(_fileno(Temp), Fd);
-  fclose(Temp);
-}
-
-intptr_t GetHandleFromFd(int fd) {
-  return _get_osfhandle(fd);
-}
-
-static bool IsSeparator(char C) {
-  return C == '\\' || C == '/';
-}
-
-// Parse disk designators, like "C:\". If Relative == true, also accepts: "C:".
-// Returns number of characters considered if successful.
-static size_t ParseDrive(const std::string &FileName, const size_t Offset,
-                         bool Relative = true) {
-  if (Offset + 1 >= FileName.size() || FileName[Offset + 1] != ':')
-    return 0;
-  if (Offset + 2 >= FileName.size() || !IsSeparator(FileName[Offset + 2])) {
-    if (!Relative) // Accept relative path?
-      return 0;
-    else
-      return 2;
-  }
-  return 3;
-}
-
-// Parse a file name, like: SomeFile.txt
-// Returns number of characters considered if successful.
-static size_t ParseFileName(const std::string &FileName, const size_t Offset) {
-  size_t Pos = Offset;
-  const size_t End = FileName.size();
-  for(; Pos < End && !IsSeparator(FileName[Pos]); ++Pos)
-    ;
-  return Pos - Offset;
-}
-
-// Parse a directory ending in separator, like: `SomeDir\`
-// Returns number of characters considered if successful.
-static size_t ParseDir(const std::string &FileName, const size_t Offset) {
-  size_t Pos = Offset;
-  const size_t End = FileName.size();
-  if (Pos >= End || IsSeparator(FileName[Pos]))
-    return 0;
-  for(; Pos < End && !IsSeparator(FileName[Pos]); ++Pos)
-    ;
-  if (Pos >= End)
-    return 0;
-  ++Pos; // Include separator.
-  return Pos - Offset;
-}
-
-// Parse a servername and share, like: `SomeServer\SomeShare\`
-// Returns number of characters considered if successful.
-static size_t ParseServerAndShare(const std::string &FileName,
-                                  const size_t Offset) {
-  size_t Pos = Offset, Res;
-  if (!(Res = ParseDir(FileName, Pos)))
-    return 0;
-  Pos += Res;
-  if (!(Res = ParseDir(FileName, Pos)))
-    return 0;
-  Pos += Res;
-  return Pos - Offset;
-}
-
-// Parse the given Ref string from the position Offset, to exactly match the given
-// string Patt.
-// Returns number of characters considered if successful.
-static size_t ParseCustomString(const std::string &Ref, size_t Offset,
-                                const char *Patt) {
-  size_t Len = strlen(Patt);
-  if (Offset + Len > Ref.size())
-    return 0;
-  return Ref.compare(Offset, Len, Patt) == 0 ? Len : 0;
-}
-
-// Parse a location, like:
-// \\?\UNC\Server\Share\  \\?\C:\  \\Server\Share\  \  C:\  C:
-// Returns number of characters considered if successful.
-static size_t ParseLocation(const std::string &FileName) {
-  size_t Pos = 0, Res;
-
-  if ((Res = ParseCustomString(FileName, Pos, R"(\\?\)"))) {
-    Pos += Res;
-    if ((Res = ParseCustomString(FileName, Pos, R"(UNC\)"))) {
-      Pos += Res;
-      if ((Res = ParseServerAndShare(FileName, Pos)))
-        return Pos + Res;
-      return 0;
-    }
-    if ((Res = ParseDrive(FileName, Pos, false)))
-      return Pos + Res;
-    return 0;
-  }
-
-  if (Pos < FileName.size() && IsSeparator(FileName[Pos])) {
-    ++Pos;
-    if (Pos < FileName.size() && IsSeparator(FileName[Pos])) {
-      ++Pos;
-      if ((Res = ParseServerAndShare(FileName, Pos)))
-        return Pos + Res;
-      return 0;
-    }
-    return Pos;
-  }
-
-  if ((Res = ParseDrive(FileName, Pos)))
-    return Pos + Res;
-
-  return Pos;
-}
-
-std::string DirName(const std::string &FileName) {
-  size_t LocationLen = ParseLocation(FileName);
-  size_t DirLen = 0, Res;
-  while ((Res = ParseDir(FileName, LocationLen + DirLen)))
-    DirLen += Res;
-  size_t FileLen = ParseFileName(FileName, LocationLen + DirLen);
-
-  if (LocationLen + DirLen + FileLen != FileName.size()) {
-    Printf("DirName() failed for \"%s\", invalid path.\n", FileName.c_str());
-    exit(1);
-  }
-
-  if (DirLen) {
-    --DirLen; // Remove trailing separator.
-    if (!FileLen) { // Path ended in separator.
-      assert(DirLen);
-      // Remove file name from Dir.
-      while (DirLen && !IsSeparator(FileName[LocationLen + DirLen - 1]))
-        --DirLen;
-      if (DirLen) // Remove trailing separator.
-        --DirLen;
-    }
-  }
-
-  if (!LocationLen) { // Relative path.
-    if (!DirLen)
-      return ".";
-    return std::string(".\\").append(FileName, 0, DirLen);
-  }
-
-  return FileName.substr(0, LocationLen + DirLen);
-}
-
-std::string TmpDir() {
-  std::string Tmp;
-  Tmp.resize(MAX_PATH + 1);
-  DWORD Size = GetTempPathA(Tmp.size(), &Tmp[0]);
-  if (Size == 0) {
-    Printf("Couldn't get Tmp path.\n");
-    exit(1);
-  }
-  Tmp.resize(Size);
-  return Tmp;
-}
-
-bool IsInterestingCoverageFile(const std::string &FileName) {
-  if (FileName.find("Program Files") != std::string::npos)
-    return false;
-  if (FileName.find("compiler-rt\\lib\\") != std::string::npos)
-    return false; // sanitizer internal.
-  if (FileName == "<null>")
-    return false;
-  return true;
-}
-
-void RawPrint(const char *Str) {
-  // Not tested, may or may not work. Fix if needed.
-  Printf("%s", Str);
-}
-
-}  // namespace fuzzer
-
-#endif // LIBFUZZER_WINDOWS
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerInterface.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerInterface.h
deleted file mode 100644
index c2c0a39843c0..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerInterface.h
+++ /dev/null
@@ -1,67 +0,0 @@
-//===- FuzzerInterface.h - Interface header for the Fuzzer ------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Define the interface between libFuzzer and the library being tested.
-//===----------------------------------------------------------------------===//
-
-// NOTE: the libFuzzer interface is thin and in the majority of cases
-// you should not include this file into your target. In 95% of cases
-// all you need is to define the following function in your file:
-// extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size);
-
-// WARNING: keep the interface in C.
-
-#ifndef LLVM_FUZZER_INTERFACE_H
-#define LLVM_FUZZER_INTERFACE_H
-
-#include <stddef.h>
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-// Mandatory user-provided target function.
-// Executes the code under test with [Data, Data+Size) as the input.
-// libFuzzer will invoke this function *many* times with different inputs.
-// Must return 0.
-int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size);
-
-// Optional user-provided initialization function.
-// If provided, this function will be called by libFuzzer once at startup.
-// It may read and modify argc/argv.
-// Must return 0.
-int LLVMFuzzerInitialize(int *argc, char ***argv);
-
-// Optional user-provided custom mutator.
-// Mutates raw data in [Data, Data+Size) inplace.
-// Returns the new size, which is not greater than MaxSize.
-// Given the same Seed produces the same mutation.
-size_t LLVMFuzzerCustomMutator(uint8_t *Data, size_t Size, size_t MaxSize,
-                               unsigned int Seed);
-
-// Optional user-provided custom cross-over function.
-// Combines pieces of Data1 & Data2 together into Out.
-// Returns the new size, which is not greater than MaxOutSize.
-// Should produce the same mutation given the same Seed.
-size_t LLVMFuzzerCustomCrossOver(const uint8_t *Data1, size_t Size1,
-                                 const uint8_t *Data2, size_t Size2,
-                                 uint8_t *Out, size_t MaxOutSize,
-                                 unsigned int Seed);
-
-// Experimental, may go away in future.
-// libFuzzer-provided function to be used inside LLVMFuzzerCustomMutator.
-// Mutates raw data in [Data, Data+Size) inplace.
-// Returns the new size, which is not greater than MaxSize.
-size_t LLVMFuzzerMutate(uint8_t *Data, size_t Size, size_t MaxSize);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // LLVM_FUZZER_INTERFACE_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerInternal.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerInternal.h
deleted file mode 100644
index 3fc3fe004cef..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerInternal.h
+++ /dev/null
@@ -1,143 +0,0 @@
-//===- FuzzerInternal.h - Internal header for the Fuzzer --------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Define the main class fuzzer::Fuzzer and most functions.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_INTERNAL_H
-#define LLVM_FUZZER_INTERNAL_H
-
-#include "FuzzerDefs.h"
-#include "FuzzerExtFunctions.h"
-#include "FuzzerInterface.h"
-#include "FuzzerOptions.h"
-#include "FuzzerSHA1.h"
-#include "FuzzerValueBitMap.h"
-#include <algorithm>
-#include <atomic>
-#include <chrono>
-#include <climits>
-#include <cstdlib>
-#include <string.h>
-
-namespace fuzzer {
-
-using namespace std::chrono;
-
-class Fuzzer {
-public:
-
-  Fuzzer(UserCallback CB, InputCorpus &Corpus, MutationDispatcher &MD,
-         FuzzingOptions Options);
-  ~Fuzzer();
-  void Loop();
-  void MinimizeCrashLoop(const Unit &U);
-  void ShuffleAndMinimize(UnitVector *V);
-  void RereadOutputCorpus(size_t MaxSize);
-
-  size_t secondsSinceProcessStartUp() {
-    return duration_cast<seconds>(system_clock::now() - ProcessStartTime)
-        .count();
-  }
-
-  bool TimedOut() {
-    return Options.MaxTotalTimeSec > 0 &&
-           secondsSinceProcessStartUp() >
-               static_cast<size_t>(Options.MaxTotalTimeSec);
-  }
-
-  size_t execPerSec() {
-    size_t Seconds = secondsSinceProcessStartUp();
-    return Seconds ? TotalNumberOfRuns / Seconds : 0;
-  }
-
-  size_t getTotalNumberOfRuns() { return TotalNumberOfRuns; }
-
-  static void StaticAlarmCallback();
-  static void StaticCrashSignalCallback();
-  static void StaticInterruptCallback();
-  static void StaticFileSizeExceedCallback();
-
-  void ExecuteCallback(const uint8_t *Data, size_t Size);
-  bool RunOne(const uint8_t *Data, size_t Size, bool MayDeleteFile = false,
-              InputInfo *II = nullptr);
-
-  // Merge Corpora[1:] into Corpora[0].
-  void Merge(const std::vector<std::string> &Corpora);
-  void CrashResistantMerge(const std::vector<std::string> &Args,
-                           const std::vector<std::string> &Corpora,
-                           const char *CoverageSummaryInputPathOrNull,
-                           const char *CoverageSummaryOutputPathOrNull);
-  void CrashResistantMergeInternalStep(const std::string &ControlFilePath);
-  MutationDispatcher &GetMD() { return MD; }
-  void PrintFinalStats();
-  void SetMaxInputLen(size_t MaxInputLen);
-  void SetMaxMutationLen(size_t MaxMutationLen);
-  void RssLimitCallback();
-
-  bool InFuzzingThread() const { return IsMyThread; }
-  size_t GetCurrentUnitInFuzzingThead(const uint8_t **Data) const;
-  void TryDetectingAMemoryLeak(const uint8_t *Data, size_t Size,
-                               bool DuringInitialCorpusExecution);
-
-  void HandleMalloc(size_t Size);
-  void AnnounceOutput(const uint8_t *Data, size_t Size);
-
-private:
-  void AlarmCallback();
-  void CrashCallback();
-  void CrashOnOverwrittenData();
-  void InterruptCallback();
-  void MutateAndTestOne();
-  void ReportNewCoverage(InputInfo *II, const Unit &U);
-  void PrintPulseAndReportSlowInput(const uint8_t *Data, size_t Size);
-  void WriteToOutputCorpus(const Unit &U);
-  void WriteUnitToFileWithPrefix(const Unit &U, const char *Prefix);
-  void PrintStats(const char *Where, const char *End = "\n", size_t Units = 0);
-  void PrintStatusForNewUnit(const Unit &U, const char *Text);
-  void ShuffleCorpus(UnitVector *V);
-  void CheckExitOnSrcPosOrItem();
-
-  static void StaticDeathCallback();
-  void DumpCurrentUnit(const char *Prefix);
-  void DeathCallback();
-
-  void AllocateCurrentUnitData();
-  uint8_t *CurrentUnitData = nullptr;
-  std::atomic<size_t> CurrentUnitSize;
-  uint8_t BaseSha1[kSHA1NumBytes];  // Checksum of the base unit.
-  bool RunningCB = false;
-
-  size_t TotalNumberOfRuns = 0;
-  size_t NumberOfNewUnitsAdded = 0;
-
-  bool HasMoreMallocsThanFrees = false;
-  size_t NumberOfLeakDetectionAttempts = 0;
-
-  UserCallback CB;
-  InputCorpus &Corpus;
-  MutationDispatcher &MD;
-  FuzzingOptions Options;
-
-  system_clock::time_point ProcessStartTime = system_clock::now();
-  system_clock::time_point UnitStartTime, UnitStopTime;
-  long TimeOfLongestUnitInSeconds = 0;
-  long EpochOfLastReadOfOutputCorpus = 0;
-
-  size_t MaxInputLen = 0;
-  size_t MaxMutationLen = 0;
-
-  std::vector<uint32_t> UniqFeatureSetTmp;
-
-  // Need to know our own thread.
-  static thread_local bool IsMyThread;
-};
-
-} // namespace fuzzer
-
-#endif // LLVM_FUZZER_INTERNAL_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerLoop.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerLoop.cpp
deleted file mode 100644
index 8ac7a847aef7..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerLoop.cpp
+++ /dev/null
@@ -1,695 +0,0 @@
-//===- FuzzerLoop.cpp - Fuzzer's main loop --------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Fuzzer's main loop.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerCorpus.h"
-#include "FuzzerIO.h"
-#include "FuzzerInternal.h"
-#include "FuzzerMutate.h"
-#include "FuzzerRandom.h"
-#include "FuzzerShmem.h"
-#include "FuzzerTracePC.h"
-#include <algorithm>
-#include <cstring>
-#include <memory>
-#include <set>
-
-#if defined(__has_include)
-#if __has_include(<sanitizer / lsan_interface.h>)
-#include <sanitizer/lsan_interface.h>
-#endif
-#endif
-
-#define NO_SANITIZE_MEMORY
-#if defined(__has_feature)
-#if __has_feature(memory_sanitizer)
-#undef NO_SANITIZE_MEMORY
-#define NO_SANITIZE_MEMORY __attribute__((no_sanitize_memory))
-#endif
-#endif
-
-namespace fuzzer {
-static const size_t kMaxUnitSizeToPrint = 256;
-
-thread_local bool Fuzzer::IsMyThread;
-
-SharedMemoryRegion SMR;
-
-// Only one Fuzzer per process.
-static Fuzzer *F;
-
-// Leak detection is expensive, so we first check if there were more mallocs
-// than frees (using the sanitizer malloc hooks) and only then try to call lsan.
-struct MallocFreeTracer {
-  void Start(int TraceLevel) {
-    this->TraceLevel = TraceLevel;
-    if (TraceLevel)
-      Printf("MallocFreeTracer: START\n");
-    Mallocs = 0;
-    Frees = 0;
-  }
-  // Returns true if there were more mallocs than frees.
-  bool Stop() {
-    if (TraceLevel)
-      Printf("MallocFreeTracer: STOP %zd %zd (%s)\n", Mallocs.load(),
-             Frees.load(), Mallocs == Frees ? "same" : "DIFFERENT");
-    bool Result = Mallocs > Frees;
-    Mallocs = 0;
-    Frees = 0;
-    TraceLevel = 0;
-    return Result;
-  }
-  std::atomic<size_t> Mallocs;
-  std::atomic<size_t> Frees;
-  int TraceLevel = 0;
-};
-
-static MallocFreeTracer AllocTracer;
-
-ATTRIBUTE_NO_SANITIZE_MEMORY
-void MallocHook(const volatile void *ptr, size_t size) {
-  size_t N = AllocTracer.Mallocs++;
-  F->HandleMalloc(size);
-  if (int TraceLevel = AllocTracer.TraceLevel) {
-    Printf("MALLOC[%zd] %p %zd\n", N, ptr, size);
-    if (TraceLevel >= 2 && EF)
-      EF->__sanitizer_print_stack_trace();
-  }
-}
-
-ATTRIBUTE_NO_SANITIZE_MEMORY
-void FreeHook(const volatile void *ptr) {
-  size_t N = AllocTracer.Frees++;
-  if (int TraceLevel = AllocTracer.TraceLevel) {
-    Printf("FREE[%zd]   %p\n", N, ptr);
-    if (TraceLevel >= 2 && EF)
-      EF->__sanitizer_print_stack_trace();
-  }
-}
-
-// Crash on a single malloc that exceeds the rss limit.
-void Fuzzer::HandleMalloc(size_t Size) {
-  if (!Options.RssLimitMb || (Size >> 20) < (size_t)Options.RssLimitMb)
-    return;
-  Printf("==%d== ERROR: libFuzzer: out-of-memory (malloc(%zd))\n", GetPid(),
-         Size);
-  Printf("   To change the out-of-memory limit use -rss_limit_mb=<N>\n\n");
-  if (EF->__sanitizer_print_stack_trace)
-    EF->__sanitizer_print_stack_trace();
-  DumpCurrentUnit("oom-");
-  Printf("SUMMARY: libFuzzer: out-of-memory\n");
-  PrintFinalStats();
-  _Exit(Options.ErrorExitCode); // Stop right now.
-}
-
-Fuzzer::Fuzzer(UserCallback CB, InputCorpus &Corpus, MutationDispatcher &MD,
-               FuzzingOptions Options)
-    : CB(CB), Corpus(Corpus), MD(MD), Options(Options) {
-  if (EF->__sanitizer_set_death_callback)
-    EF->__sanitizer_set_death_callback(StaticDeathCallback);
-  assert(!F);
-  F = this;
-  TPC.ResetMaps();
-  IsMyThread = true;
-  if (Options.DetectLeaks && EF->__sanitizer_install_malloc_and_free_hooks)
-    EF->__sanitizer_install_malloc_and_free_hooks(MallocHook, FreeHook);
-  TPC.SetUseCounters(Options.UseCounters);
-  TPC.SetUseValueProfile(Options.UseValueProfile);
-  TPC.SetPrintNewPCs(Options.PrintNewCovPcs);
-
-  if (Options.Verbosity)
-    TPC.PrintModuleInfo();
-  if (!Options.OutputCorpus.empty() && Options.ReloadIntervalSec)
-    EpochOfLastReadOfOutputCorpus = GetEpoch(Options.OutputCorpus);
-  MaxInputLen = MaxMutationLen = Options.MaxLen;
-  AllocateCurrentUnitData();
-  CurrentUnitSize = 0;
-  memset(BaseSha1, 0, sizeof(BaseSha1));
-}
-
-Fuzzer::~Fuzzer() { }
-
-void Fuzzer::AllocateCurrentUnitData() {
-  if (CurrentUnitData || MaxInputLen == 0) return;
-  CurrentUnitData = new uint8_t[MaxInputLen];
-}
-
-void Fuzzer::StaticDeathCallback() {
-  assert(F);
-  F->DeathCallback();
-}
-
-void Fuzzer::DumpCurrentUnit(const char *Prefix) {
-  if (!CurrentUnitData) return;  // Happens when running individual inputs.
-  MD.PrintMutationSequence();
-  Printf("; base unit: %s\n", Sha1ToString(BaseSha1).c_str());
-  size_t UnitSize = CurrentUnitSize;
-  if (UnitSize <= kMaxUnitSizeToPrint) {
-    PrintHexArray(CurrentUnitData, UnitSize, "\n");
-    PrintASCII(CurrentUnitData, UnitSize, "\n");
-  }
-  WriteUnitToFileWithPrefix({CurrentUnitData, CurrentUnitData + UnitSize},
-                            Prefix);
-}
-
-NO_SANITIZE_MEMORY
-void Fuzzer::DeathCallback() {
-  DumpCurrentUnit("crash-");
-  PrintFinalStats();
-}
-
-void Fuzzer::StaticAlarmCallback() {
-  assert(F);
-  F->AlarmCallback();
-}
-
-void Fuzzer::StaticCrashSignalCallback() {
-  assert(F);
-  F->CrashCallback();
-}
-
-void Fuzzer::StaticInterruptCallback() {
-  assert(F);
-  F->InterruptCallback();
-}
-
-void Fuzzer::StaticFileSizeExceedCallback() {
-  Printf("==%lu== ERROR: libFuzzer: file size exceeded\n", GetPid());
-  exit(1);
-}
-
-void Fuzzer::CrashCallback() {
-  Printf("==%lu== ERROR: libFuzzer: deadly signal\n", GetPid());
-  if (EF->__sanitizer_print_stack_trace)
-    EF->__sanitizer_print_stack_trace();
-  Printf("NOTE: libFuzzer has rudimentary signal handlers.\n"
-         "      Combine libFuzzer with AddressSanitizer or similar for better "
-         "crash reports.\n");
-  Printf("SUMMARY: libFuzzer: deadly signal\n");
-  DumpCurrentUnit("crash-");
-  PrintFinalStats();
-  _Exit(Options.ErrorExitCode);  // Stop right now.
-}
-
-void Fuzzer::InterruptCallback() {
-  Printf("==%lu== libFuzzer: run interrupted; exiting\n", GetPid());
-  PrintFinalStats();
-  _Exit(0);  // Stop right now, don't perform any at-exit actions.
-}
-
-NO_SANITIZE_MEMORY
-void Fuzzer::AlarmCallback() {
-  assert(Options.UnitTimeoutSec > 0);
-  // In Windows Alarm callback is executed by a different thread.
-#if !LIBFUZZER_WINDOWS
-  if (!InFuzzingThread()) return;
-#endif
-  if (!RunningCB)
-    return; // We have not started running units yet.
-  size_t Seconds =
-      duration_cast<seconds>(system_clock::now() - UnitStartTime).count();
-  if (Seconds == 0)
-    return;
-  if (Options.Verbosity >= 2)
-    Printf("AlarmCallback %zd\n", Seconds);
-  if (Seconds >= (size_t)Options.UnitTimeoutSec) {
-    Printf("ALARM: working on the last Unit for %zd seconds\n", Seconds);
-    Printf("       and the timeout value is %d (use -timeout=N to change)\n",
-           Options.UnitTimeoutSec);
-    DumpCurrentUnit("timeout-");
-    Printf("==%lu== ERROR: libFuzzer: timeout after %d seconds\n", GetPid(),
-           Seconds);
-    if (EF->__sanitizer_print_stack_trace)
-      EF->__sanitizer_print_stack_trace();
-    Printf("SUMMARY: libFuzzer: timeout\n");
-    PrintFinalStats();
-    _Exit(Options.TimeoutExitCode); // Stop right now.
-  }
-}
-
-void Fuzzer::RssLimitCallback() {
-  Printf(
-      "==%lu== ERROR: libFuzzer: out-of-memory (used: %zdMb; limit: %zdMb)\n",
-      GetPid(), GetPeakRSSMb(), Options.RssLimitMb);
-  Printf("   To change the out-of-memory limit use -rss_limit_mb=<N>\n\n");
-  if (EF->__sanitizer_print_memory_profile)
-    EF->__sanitizer_print_memory_profile(95, 8);
-  DumpCurrentUnit("oom-");
-  Printf("SUMMARY: libFuzzer: out-of-memory\n");
-  PrintFinalStats();
-  _Exit(Options.ErrorExitCode); // Stop right now.
-}
-
-void Fuzzer::PrintStats(const char *Where, const char *End, size_t Units) {
-  size_t ExecPerSec = execPerSec();
-  if (!Options.Verbosity)
-    return;
-  Printf("#%zd\t%s", TotalNumberOfRuns, Where);
-  if (size_t N = TPC.GetTotalPCCoverage())
-    Printf(" cov: %zd", N);
-  if (size_t N = Corpus.NumFeatures())
-    Printf( " ft: %zd", N);
-  if (!Corpus.empty()) {
-    Printf(" corp: %zd", Corpus.NumActiveUnits());
-    if (size_t N = Corpus.SizeInBytes()) {
-      if (N < (1<<14))
-        Printf("/%zdb", N);
-      else if (N < (1 << 24))
-        Printf("/%zdKb", N >> 10);
-      else
-        Printf("/%zdMb", N >> 20);
-    }
-  }
-  if (Units)
-    Printf(" units: %zd", Units);
-
-  Printf(" exec/s: %zd", ExecPerSec);
-  Printf(" rss: %zdMb", GetPeakRSSMb());
-  Printf("%s", End);
-}
-
-void Fuzzer::PrintFinalStats() {
-  if (Options.PrintCoverage)
-    TPC.PrintCoverage();
-  if (Options.DumpCoverage)
-    TPC.DumpCoverage();
-  if (Options.PrintCorpusStats)
-    Corpus.PrintStats();
-  if (!Options.PrintFinalStats) return;
-  size_t ExecPerSec = execPerSec();
-  Printf("stat::number_of_executed_units: %zd\n", TotalNumberOfRuns);
-  Printf("stat::average_exec_per_sec:     %zd\n", ExecPerSec);
-  Printf("stat::new_units_added:          %zd\n", NumberOfNewUnitsAdded);
-  Printf("stat::slowest_unit_time_sec:    %zd\n", TimeOfLongestUnitInSeconds);
-  Printf("stat::peak_rss_mb:              %zd\n", GetPeakRSSMb());
-}
-
-void Fuzzer::SetMaxInputLen(size_t MaxInputLen) {
-  assert(this->MaxInputLen == 0); // Can only reset MaxInputLen from 0 to non-0.
-  assert(MaxInputLen);
-  this->MaxInputLen = MaxInputLen;
-  this->MaxMutationLen = MaxInputLen;
-  AllocateCurrentUnitData();
-  Printf("INFO: -max_len is not provided; "
-         "libFuzzer will not generate inputs larger than %zd bytes\n",
-         MaxInputLen);
-}
-
-void Fuzzer::SetMaxMutationLen(size_t MaxMutationLen) {
-  assert(MaxMutationLen && MaxMutationLen <= MaxInputLen);
-  this->MaxMutationLen = MaxMutationLen;
-}
-
-void Fuzzer::CheckExitOnSrcPosOrItem() {
-  if (!Options.ExitOnSrcPos.empty()) {
-    static auto *PCsSet = new std::set<uintptr_t>;
-    for (size_t i = 1, N = TPC.GetNumPCs(); i < N; i++) {
-      uintptr_t PC = TPC.GetPC(i);
-      if (!PC) continue;
-      if (!PCsSet->insert(PC).second) continue;
-      std::string Descr = DescribePC("%L", PC);
-      if (Descr.find(Options.ExitOnSrcPos) != std::string::npos) {
-        Printf("INFO: found line matching '%s', exiting.\n",
-               Options.ExitOnSrcPos.c_str());
-        _Exit(0);
-      }
-    }
-  }
-  if (!Options.ExitOnItem.empty()) {
-    if (Corpus.HasUnit(Options.ExitOnItem)) {
-      Printf("INFO: found item with checksum '%s', exiting.\n",
-             Options.ExitOnItem.c_str());
-      _Exit(0);
-    }
-  }
-}
-
-void Fuzzer::RereadOutputCorpus(size_t MaxSize) {
-  if (Options.OutputCorpus.empty() || !Options.ReloadIntervalSec) return;
-  std::vector<Unit> AdditionalCorpus;
-  ReadDirToVectorOfUnits(Options.OutputCorpus.c_str(), &AdditionalCorpus,
-                         &EpochOfLastReadOfOutputCorpus, MaxSize,
-                         /*ExitOnError*/ false);
-  if (Options.Verbosity >= 2)
-    Printf("Reload: read %zd new units.\n", AdditionalCorpus.size());
-  bool Reloaded = false;
-  for (auto &U : AdditionalCorpus) {
-    if (U.size() > MaxSize)
-      U.resize(MaxSize);
-    if (!Corpus.HasUnit(U)) {
-      if (RunOne(U.data(), U.size()))
-        Reloaded = true;
-    }
-  }
-  if (Reloaded)
-    PrintStats("RELOAD");
-}
-
-void Fuzzer::ShuffleCorpus(UnitVector *V) {
-  std::shuffle(V->begin(), V->end(), MD.GetRand());
-  if (Options.PreferSmall)
-    std::stable_sort(V->begin(), V->end(), [](const Unit &A, const Unit &B) {
-      return A.size() < B.size();
-    });
-}
-
-void Fuzzer::ShuffleAndMinimize(UnitVector *InitialCorpus) {
-  Printf("#0\tREAD units: %zd\n", InitialCorpus->size());
-  if (Options.ShuffleAtStartUp)
-    ShuffleCorpus(InitialCorpus);
-
-  // Test the callback with empty input and never try it again.
-  uint8_t dummy;
-  ExecuteCallback(&dummy, 0);
-
-  for (const auto &U : *InitialCorpus) {
-    RunOne(U.data(), U.size());
-    TryDetectingAMemoryLeak(U.data(), U.size(),
-                            /*DuringInitialCorpusExecution*/ true);
-  }
-  PrintStats("INITED");
-  if (Corpus.empty()) {
-    Printf("ERROR: no interesting inputs were found. "
-           "Is the code instrumented for coverage? Exiting.\n");
-    exit(1);
-  }
-}
-
-void Fuzzer::PrintPulseAndReportSlowInput(const uint8_t *Data, size_t Size) {
-  auto TimeOfUnit =
-      duration_cast<seconds>(UnitStopTime - UnitStartTime).count();
-  if (!(TotalNumberOfRuns & (TotalNumberOfRuns - 1)) &&
-      secondsSinceProcessStartUp() >= 2)
-    PrintStats("pulse ");
-  if (TimeOfUnit > TimeOfLongestUnitInSeconds * 1.1 &&
-      TimeOfUnit >= Options.ReportSlowUnits) {
-    TimeOfLongestUnitInSeconds = TimeOfUnit;
-    Printf("Slowest unit: %zd s:\n", TimeOfLongestUnitInSeconds);
-    WriteUnitToFileWithPrefix({Data, Data + Size}, "slow-unit-");
-  }
-}
-
-bool Fuzzer::RunOne(const uint8_t *Data, size_t Size, bool MayDeleteFile,
-                    InputInfo *II) {
-  if (!Size) return false;
-
-  ExecuteCallback(Data, Size);
-
-  UniqFeatureSetTmp.clear();
-  size_t FoundUniqFeaturesOfII = 0;
-  size_t NumUpdatesBefore = Corpus.NumFeatureUpdates();
-  TPC.CollectFeatures([&](size_t Feature) {
-    if (Corpus.AddFeature(Feature, Size, Options.Shrink))
-      UniqFeatureSetTmp.push_back(Feature);
-    if (Options.ReduceInputs && II)
-      if (std::binary_search(II->UniqFeatureSet.begin(),
-                             II->UniqFeatureSet.end(), Feature))
-        FoundUniqFeaturesOfII++;
-  });
-  PrintPulseAndReportSlowInput(Data, Size);
-  size_t NumNewFeatures = Corpus.NumFeatureUpdates() - NumUpdatesBefore;
-  if (NumNewFeatures) {
-    Corpus.AddToCorpus({Data, Data + Size}, NumNewFeatures, MayDeleteFile,
-                       UniqFeatureSetTmp);
-    CheckExitOnSrcPosOrItem();
-    return true;
-  }
-  if (II && FoundUniqFeaturesOfII &&
-      FoundUniqFeaturesOfII == II->UniqFeatureSet.size() &&
-      II->U.size() > Size) {
-    Corpus.Replace(II, {Data, Data + Size});
-    CheckExitOnSrcPosOrItem();
-    return true;
-  }
-  return false;
-}
-
-size_t Fuzzer::GetCurrentUnitInFuzzingThead(const uint8_t **Data) const {
-  assert(InFuzzingThread());
-  *Data = CurrentUnitData;
-  return CurrentUnitSize;
-}
-
-void Fuzzer::CrashOnOverwrittenData() {
-  Printf("==%d== ERROR: libFuzzer: fuzz target overwrites it's const input\n",
-         GetPid());
-  DumpCurrentUnit("crash-");
-  Printf("SUMMARY: libFuzzer: out-of-memory\n");
-  _Exit(Options.ErrorExitCode); // Stop right now.
-}
-
-// Compare two arrays, but not all bytes if the arrays are large.
-static bool LooseMemeq(const uint8_t *A, const uint8_t *B, size_t Size) {
-  const size_t Limit = 64;
-  if (Size <= 64)
-    return !memcmp(A, B, Size);
-  // Compare first and last Limit/2 bytes.
-  return !memcmp(A, B, Limit / 2) &&
-         !memcmp(A + Size - Limit / 2, B + Size - Limit / 2, Limit / 2);
-}
-
-void Fuzzer::ExecuteCallback(const uint8_t *Data, size_t Size) {
-  TotalNumberOfRuns++;
-  assert(InFuzzingThread());
-  if (SMR.IsClient())
-    SMR.WriteByteArray(Data, Size);
-  // We copy the contents of Unit into a separate heap buffer
-  // so that we reliably find buffer overflows in it.
-  uint8_t *DataCopy = new uint8_t[Size];
-  memcpy(DataCopy, Data, Size);
-  if (CurrentUnitData && CurrentUnitData != Data)
-    memcpy(CurrentUnitData, Data, Size);
-  CurrentUnitSize = Size;
-  AllocTracer.Start(Options.TraceMalloc);
-  UnitStartTime = system_clock::now();
-  TPC.ResetMaps();
-  RunningCB = true;
-  int Res = CB(DataCopy, Size);
-  RunningCB = false;
-  UnitStopTime = system_clock::now();
-  (void)Res;
-  assert(Res == 0);
-  HasMoreMallocsThanFrees = AllocTracer.Stop();
-  if (!LooseMemeq(DataCopy, Data, Size))
-    CrashOnOverwrittenData();
-  CurrentUnitSize = 0;
-  delete[] DataCopy;
-}
-
-void Fuzzer::WriteToOutputCorpus(const Unit &U) {
-  if (Options.OnlyASCII)
-    assert(IsASCII(U));
-  if (Options.OutputCorpus.empty())
-    return;
-  std::string Path = DirPlusFile(Options.OutputCorpus, Hash(U));
-  WriteToFile(U, Path);
-  if (Options.Verbosity >= 2)
-    Printf("Written to %s\n", Path.c_str());
-}
-
-void Fuzzer::WriteUnitToFileWithPrefix(const Unit &U, const char *Prefix) {
-  if (!Options.SaveArtifacts)
-    return;
-  std::string Path = Options.ArtifactPrefix + Prefix + Hash(U);
-  if (!Options.ExactArtifactPath.empty())
-    Path = Options.ExactArtifactPath; // Overrides ArtifactPrefix.
-  WriteToFile(U, Path);
-  Printf("artifact_prefix='%s'; Test unit written to %s\n",
-         Options.ArtifactPrefix.c_str(), Path.c_str());
-  if (U.size() <= kMaxUnitSizeToPrint)
-    Printf("Base64: %s\n", Base64(U).c_str());
-}
-
-void Fuzzer::PrintStatusForNewUnit(const Unit &U, const char *Text) {
-  if (!Options.PrintNEW)
-    return;
-  PrintStats(Text, "");
-  if (Options.Verbosity) {
-    Printf(" L: %zd ", U.size());
-    MD.PrintMutationSequence();
-    Printf("\n");
-  }
-}
-
-void Fuzzer::ReportNewCoverage(InputInfo *II, const Unit &U) {
-  II->NumSuccessfullMutations++;
-  MD.RecordSuccessfulMutationSequence();
-  PrintStatusForNewUnit(U, II->Reduced ? "REDUCE" :
-                                         "NEW   ");
-  WriteToOutputCorpus(U);
-  NumberOfNewUnitsAdded++;
-  TPC.PrintNewPCs();
-}
-
-// Tries detecting a memory leak on the particular input that we have just
-// executed before calling this function.
-void Fuzzer::TryDetectingAMemoryLeak(const uint8_t *Data, size_t Size,
-                                     bool DuringInitialCorpusExecution) {
-  if (!HasMoreMallocsThanFrees) return;  // mallocs==frees, a leak is unlikely.
-  if (!Options.DetectLeaks) return;
-  if (!&(EF->__lsan_enable) || !&(EF->__lsan_disable) ||
-      !(EF->__lsan_do_recoverable_leak_check))
-    return;  // No lsan.
-  // Run the target once again, but with lsan disabled so that if there is
-  // a real leak we do not report it twice.
-  EF->__lsan_disable();
-  ExecuteCallback(Data, Size);
-  EF->__lsan_enable();
-  if (!HasMoreMallocsThanFrees) return;  // a leak is unlikely.
-  if (NumberOfLeakDetectionAttempts++ > 1000) {
-    Options.DetectLeaks = false;
-    Printf("INFO: libFuzzer disabled leak detection after every mutation.\n"
-           "      Most likely the target function accumulates allocated\n"
-           "      memory in a global state w/o actually leaking it.\n"
-           "      You may try running this binary with -trace_malloc=[12]"
-           "      to get a trace of mallocs and frees.\n"
-           "      If LeakSanitizer is enabled in this process it will still\n"
-           "      run on the process shutdown.\n");
-    return;
-  }
-  // Now perform the actual lsan pass. This is expensive and we must ensure
-  // we don't call it too often.
-  if (EF->__lsan_do_recoverable_leak_check()) { // Leak is found, report it.
-    if (DuringInitialCorpusExecution)
-      Printf("\nINFO: a leak has been found in the initial corpus.\n\n");
-    Printf("INFO: to ignore leaks on libFuzzer side use -detect_leaks=0.\n\n");
-    CurrentUnitSize = Size;
-    DumpCurrentUnit("leak-");
-    PrintFinalStats();
-    _Exit(Options.ErrorExitCode);  // not exit() to disable lsan further on.
-  }
-}
-
-static size_t ComputeMutationLen(size_t MaxInputSize, size_t MaxMutationLen,
-                                 Random &Rand) {
-  assert(MaxInputSize <= MaxMutationLen);
-  if (MaxInputSize == MaxMutationLen) return MaxMutationLen;
-  size_t Result = MaxInputSize;
-  size_t R = Rand.Rand();
-  if ((R % (1U << 7)) == 0)
-    Result++;
-  if ((R % (1U << 15)) == 0)
-    Result += 10 + Result / 2;
-  return Min(Result, MaxMutationLen);
-}
-
-void Fuzzer::MutateAndTestOne() {
-  MD.StartMutationSequence();
-
-  auto &II = Corpus.ChooseUnitToMutate(MD.GetRand());
-  const auto &U = II.U;
-  memcpy(BaseSha1, II.Sha1, sizeof(BaseSha1));
-  assert(CurrentUnitData);
-  size_t Size = U.size();
-  assert(Size <= MaxInputLen && "Oversized Unit");
-  memcpy(CurrentUnitData, U.data(), Size);
-
-  assert(MaxMutationLen > 0);
-
-  size_t CurrentMaxMutationLen =
-      Options.ExperimentalLenControl
-          ? ComputeMutationLen(Corpus.MaxInputSize(), MaxMutationLen,
-                               MD.GetRand())
-          : MaxMutationLen;
-
-  for (int i = 0; i < Options.MutateDepth; i++) {
-    if (TotalNumberOfRuns >= Options.MaxNumberOfRuns)
-      break;
-    size_t NewSize = 0;
-    NewSize = MD.Mutate(CurrentUnitData, Size, CurrentMaxMutationLen);
-    assert(NewSize > 0 && "Mutator returned empty unit");
-    assert(NewSize <= CurrentMaxMutationLen && "Mutator return overisized unit");
-    Size = NewSize;
-    II.NumExecutedMutations++;
-    if (RunOne(CurrentUnitData, Size, /*MayDeleteFile=*/true, &II))
-      ReportNewCoverage(&II, {CurrentUnitData, CurrentUnitData + Size});
-
-    TryDetectingAMemoryLeak(CurrentUnitData, Size,
-                            /*DuringInitialCorpusExecution*/ false);
-  }
-}
-
-void Fuzzer::Loop() {
-  TPC.InitializePrintNewPCs();
-  system_clock::time_point LastCorpusReload = system_clock::now();
-  if (Options.DoCrossOver)
-    MD.SetCorpus(&Corpus);
-  while (true) {
-    auto Now = system_clock::now();
-    if (duration_cast<seconds>(Now - LastCorpusReload).count() >=
-        Options.ReloadIntervalSec) {
-      RereadOutputCorpus(MaxInputLen);
-      LastCorpusReload = system_clock::now();
-    }
-    if (TotalNumberOfRuns >= Options.MaxNumberOfRuns)
-      break;
-    if (TimedOut()) break;
-    // Perform several mutations and runs.
-    MutateAndTestOne();
-  }
-
-  PrintStats("DONE  ", "\n");
-  MD.PrintRecommendedDictionary();
-}
-
-void Fuzzer::MinimizeCrashLoop(const Unit &U) {
-  if (U.size() <= 1) return;
-  while (!TimedOut() && TotalNumberOfRuns < Options.MaxNumberOfRuns) {
-    MD.StartMutationSequence();
-    memcpy(CurrentUnitData, U.data(), U.size());
-    for (int i = 0; i < Options.MutateDepth; i++) {
-      size_t NewSize = MD.Mutate(CurrentUnitData, U.size(), MaxMutationLen);
-      assert(NewSize > 0 && NewSize <= MaxMutationLen);
-      ExecuteCallback(CurrentUnitData, NewSize);
-      PrintPulseAndReportSlowInput(CurrentUnitData, NewSize);
-      TryDetectingAMemoryLeak(CurrentUnitData, NewSize,
-                              /*DuringInitialCorpusExecution*/ false);
-    }
-  }
-}
-
-void Fuzzer::AnnounceOutput(const uint8_t *Data, size_t Size) {
-  if (SMR.IsServer()) {
-    SMR.WriteByteArray(Data, Size);
-  } else if (SMR.IsClient()) {
-    SMR.PostClient();
-    SMR.WaitServer();
-    size_t OtherSize = SMR.ReadByteArraySize();
-    uint8_t *OtherData = SMR.GetByteArray();
-    if (Size != OtherSize || memcmp(Data, OtherData, Size) != 0) {
-      size_t i = 0;
-      for (i = 0; i < Min(Size, OtherSize); i++)
-        if (Data[i] != OtherData[i])
-          break;
-      Printf("==%lu== ERROR: libFuzzer: equivalence-mismatch. Sizes: %zd %zd; "
-             "offset %zd\n", GetPid(), Size, OtherSize, i);
-      DumpCurrentUnit("mismatch-");
-      Printf("SUMMARY: libFuzzer: equivalence-mismatch\n");
-      PrintFinalStats();
-      _Exit(Options.ErrorExitCode);
-    }
-  }
-}
-
-} // namespace fuzzer
-
-extern "C" {
-
-size_t LLVMFuzzerMutate(uint8_t *Data, size_t Size, size_t MaxSize) {
-  assert(fuzzer::F);
-  return fuzzer::F->GetMD().DefaultMutate(Data, Size, MaxSize);
-}
-
-// Experimental
-void LLVMFuzzerAnnounceOutput(const uint8_t *Data, size_t Size) {
-  assert(fuzzer::F);
-  fuzzer::F->AnnounceOutput(Data, Size);
-}
-}  // extern "C"
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMain.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMain.cpp
deleted file mode 100644
index af8657200be2..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMain.cpp
+++ /dev/null
@@ -1,21 +0,0 @@
-//===- FuzzerMain.cpp - main() function and flags -------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// main() and flags.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerDefs.h"
-
-extern "C" {
-// This function should be defined by the user.
-int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size);
-}  // extern "C"
-
-int main(int argc, char **argv) {
-  return fuzzer::FuzzerDriver(&argc, &argv, LLVMFuzzerTestOneInput);
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMerge.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMerge.cpp
deleted file mode 100644
index 616c0999aa39..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMerge.cpp
+++ /dev/null
@@ -1,338 +0,0 @@
-//===- FuzzerMerge.cpp - merging corpora ----------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Merging corpora.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerMerge.h"
-#include "FuzzerIO.h"
-#include "FuzzerInternal.h"
-#include "FuzzerTracePC.h"
-#include "FuzzerUtil.h"
-
-#include <fstream>
-#include <iterator>
-#include <set>
-#include <sstream>
-
-namespace fuzzer {
-
-bool Merger::Parse(const std::string &Str, bool ParseCoverage) {
-  std::istringstream SS(Str);
-  return Parse(SS, ParseCoverage);
-}
-
-void Merger::ParseOrExit(std::istream &IS, bool ParseCoverage) {
-  if (!Parse(IS, ParseCoverage)) {
-    Printf("MERGE: failed to parse the control file (unexpected error)\n");
-    exit(1);
-  }
-}
-
-// The control file example:
-//
-// 3 # The number of inputs
-// 1 # The number of inputs in the first corpus, <= the previous number
-// file0
-// file1
-// file2  # One file name per line.
-// STARTED 0 123  # FileID, file size
-// DONE 0 1 4 6 8  # FileID COV1 COV2 ...
-// STARTED 1 456  # If DONE is missing, the input crashed while processing.
-// STARTED 2 567
-// DONE 2 8 9
-bool Merger::Parse(std::istream &IS, bool ParseCoverage) {
-  LastFailure.clear();
-  std::string Line;
-
-  // Parse NumFiles.
-  if (!std::getline(IS, Line, '\n')) return false;
-  std::istringstream L1(Line);
-  size_t NumFiles = 0;
-  L1 >> NumFiles;
-  if (NumFiles == 0 || NumFiles > 10000000) return false;
-
-  // Parse NumFilesInFirstCorpus.
-  if (!std::getline(IS, Line, '\n')) return false;
-  std::istringstream L2(Line);
-  NumFilesInFirstCorpus = NumFiles + 1;
-  L2 >> NumFilesInFirstCorpus;
-  if (NumFilesInFirstCorpus > NumFiles) return false;
-
-  // Parse file names.
-  Files.resize(NumFiles);
-  for (size_t i = 0; i < NumFiles; i++)
-    if (!std::getline(IS, Files[i].Name, '\n'))
-      return false;
-
-  // Parse STARTED and DONE lines.
-  size_t ExpectedStartMarker = 0;
-  const size_t kInvalidStartMarker = -1;
-  size_t LastSeenStartMarker = kInvalidStartMarker;
-  std::vector<uint32_t> TmpFeatures;
-  while (std::getline(IS, Line, '\n')) {
-    std::istringstream ISS1(Line);
-    std::string Marker;
-    size_t N;
-    ISS1 >> Marker;
-    ISS1 >> N;
-    if (Marker == "STARTED") {
-      // STARTED FILE_ID FILE_SIZE
-      if (ExpectedStartMarker != N)
-        return false;
-      ISS1 >> Files[ExpectedStartMarker].Size;
-      LastSeenStartMarker = ExpectedStartMarker;
-      assert(ExpectedStartMarker < Files.size());
-      ExpectedStartMarker++;
-    } else if (Marker == "DONE") {
-      // DONE FILE_ID COV1 COV2 COV3 ...
-      size_t CurrentFileIdx = N;
-      if (CurrentFileIdx != LastSeenStartMarker)
-        return false;
-      LastSeenStartMarker = kInvalidStartMarker;
-      if (ParseCoverage) {
-        TmpFeatures.clear();  // use a vector from outer scope to avoid resizes.
-        while (ISS1 >> std::hex >> N)
-          TmpFeatures.push_back(N);
-        std::sort(TmpFeatures.begin(), TmpFeatures.end());
-        Files[CurrentFileIdx].Features = TmpFeatures;
-      }
-    } else {
-      return false;
-    }
-  }
-  if (LastSeenStartMarker != kInvalidStartMarker)
-    LastFailure = Files[LastSeenStartMarker].Name;
-
-  FirstNotProcessedFile = ExpectedStartMarker;
-  return true;
-}
-
-size_t Merger::ApproximateMemoryConsumption() const  {
-  size_t Res = 0;
-  for (const auto &F: Files)
-    Res += sizeof(F) + F.Features.size() * sizeof(F.Features[0]);
-  return Res;
-}
-
-// Decides which files need to be merged (add thost to NewFiles).
-// Returns the number of new features added.
-size_t Merger::Merge(const std::set<uint32_t> &InitialFeatures,
-                     std::vector<std::string> *NewFiles) {
-  NewFiles->clear();
-  assert(NumFilesInFirstCorpus <= Files.size());
-  std::set<uint32_t> AllFeatures(InitialFeatures);
-
-  // What features are in the initial corpus?
-  for (size_t i = 0; i < NumFilesInFirstCorpus; i++) {
-    auto &Cur = Files[i].Features;
-    AllFeatures.insert(Cur.begin(), Cur.end());
-  }
-  size_t InitialNumFeatures = AllFeatures.size();
-
-  // Remove all features that we already know from all other inputs.
-  for (size_t i = NumFilesInFirstCorpus; i < Files.size(); i++) {
-    auto &Cur = Files[i].Features;
-    std::vector<uint32_t> Tmp;
-    std::set_difference(Cur.begin(), Cur.end(), AllFeatures.begin(),
-                        AllFeatures.end(), std::inserter(Tmp, Tmp.begin()));
-    Cur.swap(Tmp);
-  }
-
-  // Sort. Give preference to
-  //   * smaller files
-  //   * files with more features.
-  std::sort(Files.begin() + NumFilesInFirstCorpus, Files.end(),
-            [&](const MergeFileInfo &a, const MergeFileInfo &b) -> bool {
-              if (a.Size != b.Size)
-                return a.Size < b.Size;
-              return a.Features.size() > b.Features.size();
-            });
-
-  // One greedy pass: add the file's features to AllFeatures.
-  // If new features were added, add this file to NewFiles.
-  for (size_t i = NumFilesInFirstCorpus; i < Files.size(); i++) {
-    auto &Cur = Files[i].Features;
-    // Printf("%s -> sz %zd ft %zd\n", Files[i].Name.c_str(),
-    //       Files[i].Size, Cur.size());
-    size_t OldSize = AllFeatures.size();
-    AllFeatures.insert(Cur.begin(), Cur.end());
-    if (AllFeatures.size() > OldSize)
-      NewFiles->push_back(Files[i].Name);
-  }
-  return AllFeatures.size() - InitialNumFeatures;
-}
-
-void Merger::PrintSummary(std::ostream &OS) {
-  for (auto &File : Files) {
-    OS << std::hex;
-    OS << File.Name << " size: " << File.Size << " features: ";
-    for (auto Feature : File.Features)
-      OS << " " << Feature;
-    OS << "\n";
-  }
-}
-
-std::set<uint32_t> Merger::AllFeatures() const {
-  std::set<uint32_t> S;
-  for (auto &File : Files)
-    S.insert(File.Features.begin(), File.Features.end());
-  return S;
-}
-
-std::set<uint32_t> Merger::ParseSummary(std::istream &IS) {
-  std::string Line, Tmp;
-  std::set<uint32_t> Res;
-  while (std::getline(IS, Line, '\n')) {
-    size_t N;
-    std::istringstream ISS1(Line);
-    ISS1 >> Tmp;  // Name
-    ISS1 >> Tmp;  // size:
-    assert(Tmp == "size:" && "Corrupt summary file");
-    ISS1 >> std::hex;
-    ISS1 >> N;    // File Size
-    ISS1 >> Tmp;  // features:
-    assert(Tmp == "features:" && "Corrupt summary file");
-    while (ISS1 >> std::hex >> N)
-      Res.insert(N);
-  }
-  return Res;
-}
-
-// Inner process. May crash if the target crashes.
-void Fuzzer::CrashResistantMergeInternalStep(const std::string &CFPath) {
-  Printf("MERGE-INNER: using the control file '%s'\n", CFPath.c_str());
-  Merger M;
-  std::ifstream IF(CFPath);
-  M.ParseOrExit(IF, false);
-  IF.close();
-  if (!M.LastFailure.empty())
-    Printf("MERGE-INNER: '%s' caused a failure at the previous merge step\n",
-           M.LastFailure.c_str());
-
-  Printf("MERGE-INNER: %zd total files;"
-         " %zd processed earlier; will process %zd files now\n",
-         M.Files.size(), M.FirstNotProcessedFile,
-         M.Files.size() - M.FirstNotProcessedFile);
-
-  std::ofstream OF(CFPath, std::ofstream::out | std::ofstream::app);
-  for (size_t i = M.FirstNotProcessedFile; i < M.Files.size(); i++) {
-    auto U = FileToVector(M.Files[i].Name);
-    if (U.size() > MaxInputLen) {
-      U.resize(MaxInputLen);
-      U.shrink_to_fit();
-    }
-    std::ostringstream StartedLine;
-    // Write the pre-run marker.
-    OF << "STARTED " << std::dec << i << " " << U.size() << "\n";
-    OF.flush();  // Flush is important since ExecuteCommand may crash.
-    // Run.
-    TPC.ResetMaps();
-    ExecuteCallback(U.data(), U.size());
-    // Collect coverage.
-    std::set<size_t> Features;
-    TPC.CollectFeatures([&](size_t Feature) -> bool {
-      Features.insert(Feature);
-      return true;
-    });
-    // Show stats.
-    if (!(TotalNumberOfRuns & (TotalNumberOfRuns - 1)))
-      PrintStats("pulse ");
-    // Write the post-run marker and the coverage.
-    OF << "DONE " << i;
-    for (size_t F : Features)
-      OF << " " << std::hex << F;
-    OF << "\n";
-  }
-}
-
-// Outer process. Does not call the target code and thus sohuld not fail.
-void Fuzzer::CrashResistantMerge(const std::vector<std::string> &Args,
-                                 const std::vector<std::string> &Corpora,
-                                 const char *CoverageSummaryInputPathOrNull,
-                                 const char *CoverageSummaryOutputPathOrNull) {
-  if (Corpora.size() <= 1) {
-    Printf("Merge requires two or more corpus dirs\n");
-    return;
-  }
-  std::vector<std::string> AllFiles;
-  ListFilesInDirRecursive(Corpora[0], nullptr, &AllFiles, /*TopDir*/true);
-  size_t NumFilesInFirstCorpus = AllFiles.size();
-  for (size_t i = 1; i < Corpora.size(); i++)
-    ListFilesInDirRecursive(Corpora[i], nullptr, &AllFiles, /*TopDir*/true);
-  Printf("MERGE-OUTER: %zd files, %zd in the initial corpus\n",
-         AllFiles.size(), NumFilesInFirstCorpus);
-  auto CFPath = DirPlusFile(TmpDir(),
-                       "libFuzzerTemp." + std::to_string(GetPid()) + ".txt");
-  // Write the control file.
-  RemoveFile(CFPath);
-  std::ofstream ControlFile(CFPath);
-  ControlFile << AllFiles.size() << "\n";
-  ControlFile << NumFilesInFirstCorpus << "\n";
-  for (auto &Path: AllFiles)
-    ControlFile << Path << "\n";
-  if (!ControlFile) {
-    Printf("MERGE-OUTER: failed to write to the control file: %s\n",
-           CFPath.c_str());
-    exit(1);
-  }
-  ControlFile.close();
-
-  // Execute the inner process untill it passes.
-  // Every inner process should execute at least one input.
-  auto BaseCmd = SplitBefore("-ignore_remaining_args=1",
-                             CloneArgsWithoutX(Args, "keep-all-flags"));
-  bool Success = false;
-  for (size_t i = 1; i <= AllFiles.size(); i++) {
-    Printf("MERGE-OUTER: attempt %zd\n", i);
-    auto ExitCode = ExecuteCommand(BaseCmd.first + " -merge_control_file=" +
-                                   CFPath + " " + BaseCmd.second);
-    if (!ExitCode) {
-      Printf("MERGE-OUTER: succesfull in %zd attempt(s)\n", i);
-      Success = true;
-      break;
-    }
-  }
-  if (!Success) {
-    Printf("MERGE-OUTER: zero succesfull attempts, exiting\n");
-    exit(1);
-  }
-  // Read the control file and do the merge.
-  Merger M;
-  std::ifstream IF(CFPath);
-  IF.seekg(0, IF.end);
-  Printf("MERGE-OUTER: the control file has %zd bytes\n", (size_t)IF.tellg());
-  IF.seekg(0, IF.beg);
-  M.ParseOrExit(IF, true);
-  IF.close();
-  Printf("MERGE-OUTER: consumed %zdMb (%zdMb rss) to parse the control file\n",
-         M.ApproximateMemoryConsumption() >> 20, GetPeakRSSMb());
-  if (CoverageSummaryOutputPathOrNull) {
-    Printf("MERGE-OUTER: writing coverage summary for %zd files to %s\n",
-           M.Files.size(), CoverageSummaryOutputPathOrNull);
-    std::ofstream SummaryOut(CoverageSummaryOutputPathOrNull);
-    M.PrintSummary(SummaryOut);
-  }
-  std::vector<std::string> NewFiles;
-  std::set<uint32_t> InitialFeatures;
-  if (CoverageSummaryInputPathOrNull) {
-    std::ifstream SummaryIn(CoverageSummaryInputPathOrNull);
-    InitialFeatures = M.ParseSummary(SummaryIn);
-    Printf("MERGE-OUTER: coverage summary loaded from %s, %zd features found\n",
-           CoverageSummaryInputPathOrNull, InitialFeatures.size());
-  }
-  size_t NumNewFeatures = M.Merge(InitialFeatures, &NewFiles);
-  Printf("MERGE-OUTER: %zd new files with %zd new features added\n",
-         NewFiles.size(), NumNewFeatures);
-  for (auto &F: NewFiles)
-    WriteToOutputCorpus(FileToVector(F));
-  // We are done, delete the control file.
-  RemoveFile(CFPath);
-}
-
-} // namespace fuzzer
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMerge.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMerge.h
deleted file mode 100644
index dd4c37b6e39c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMerge.h
+++ /dev/null
@@ -1,80 +0,0 @@
-//===- FuzzerMerge.h - merging corpa ----------------------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Merging Corpora.
-//
-// The task:
-//   Take the existing corpus (possibly empty) and merge new inputs into
-//   it so that only inputs with new coverage ('features') are added.
-//   The process should tolerate the crashes, OOMs, leaks, etc.
-//
-// Algorithm:
-//   The outter process collects the set of files and writes their names
-//   into a temporary "control" file, then repeatedly launches the inner
-//   process until all inputs are processed.
-//   The outer process does not actually execute the target code.
-//
-//   The inner process reads the control file and sees a) list of all the inputs
-//   and b) the last processed input. Then it starts processing the inputs one
-//   by one. Before processing every input it writes one line to control file:
-//   STARTED INPUT_ID INPUT_SIZE
-//   After processing an input it write another line:
-//   DONE INPUT_ID Feature1 Feature2 Feature3 ...
-//   If a crash happens while processing an input the last line in the control
-//   file will be "STARTED INPUT_ID" and so the next process will know
-//   where to resume.
-//
-//   Once all inputs are processed by the innner process(es) the outer process
-//   reads the control files and does the merge based entirely on the contents
-//   of control file.
-//   It uses a single pass greedy algorithm choosing first the smallest inputs
-//   within the same size the inputs that have more new features.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_MERGE_H
-#define LLVM_FUZZER_MERGE_H
-
-#include "FuzzerDefs.h"
-
-#include <istream>
-#include <ostream>
-#include <set>
-#include <vector>
-
-namespace fuzzer {
-
-struct MergeFileInfo {
-  std::string Name;
-  size_t Size = 0;
-  std::vector<uint32_t> Features;
-};
-
-struct Merger {
-  std::vector<MergeFileInfo> Files;
-  size_t NumFilesInFirstCorpus = 0;
-  size_t FirstNotProcessedFile = 0;
-  std::string LastFailure;
-
-  bool Parse(std::istream &IS, bool ParseCoverage);
-  bool Parse(const std::string &Str, bool ParseCoverage);
-  void ParseOrExit(std::istream &IS, bool ParseCoverage);
-  void PrintSummary(std::ostream &OS);
-  std::set<uint32_t> ParseSummary(std::istream &IS);
-  size_t Merge(const std::set<uint32_t> &InitialFeatures,
-               std::vector<std::string> *NewFiles);
-  size_t Merge(std::vector<std::string> *NewFiles) {
-    return Merge(std::set<uint32_t>{}, NewFiles);
-  }
-  size_t ApproximateMemoryConsumption() const;
-  std::set<uint32_t> AllFeatures() const;
-};
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_MERGE_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMutate.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMutate.cpp
deleted file mode 100644
index 5998ef9d3193..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMutate.cpp
+++ /dev/null
@@ -1,533 +0,0 @@
-//===- FuzzerMutate.cpp - Mutate a test input -----------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Mutate a test input.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerMutate.h"
-#include "FuzzerCorpus.h"
-#include "FuzzerDefs.h"
-#include "FuzzerExtFunctions.h"
-#include "FuzzerIO.h"
-#include "FuzzerOptions.h"
-
-namespace fuzzer {
-
-const size_t Dictionary::kMaxDictSize;
-
-static void PrintASCII(const Word &W, const char *PrintAfter) {
-  PrintASCII(W.data(), W.size(), PrintAfter);
-}
-
-MutationDispatcher::MutationDispatcher(Random &Rand,
-                                       const FuzzingOptions &Options)
-    : Rand(Rand), Options(Options) {
-  DefaultMutators.insert(
-      DefaultMutators.begin(),
-      {
-          {&MutationDispatcher::Mutate_EraseBytes, "EraseBytes"},
-          {&MutationDispatcher::Mutate_InsertByte, "InsertByte"},
-          {&MutationDispatcher::Mutate_InsertRepeatedBytes,
-           "InsertRepeatedBytes"},
-          {&MutationDispatcher::Mutate_ChangeByte, "ChangeByte"},
-          {&MutationDispatcher::Mutate_ChangeBit, "ChangeBit"},
-          {&MutationDispatcher::Mutate_ShuffleBytes, "ShuffleBytes"},
-          {&MutationDispatcher::Mutate_ChangeASCIIInteger, "ChangeASCIIInt"},
-          {&MutationDispatcher::Mutate_ChangeBinaryInteger, "ChangeBinInt"},
-          {&MutationDispatcher::Mutate_CopyPart, "CopyPart"},
-          {&MutationDispatcher::Mutate_CrossOver, "CrossOver"},
-          {&MutationDispatcher::Mutate_AddWordFromManualDictionary,
-           "ManualDict"},
-          {&MutationDispatcher::Mutate_AddWordFromPersistentAutoDictionary,
-           "PersAutoDict"},
-      });
-  if(Options.UseCmp)
-    DefaultMutators.push_back(
-        {&MutationDispatcher::Mutate_AddWordFromTORC, "CMP"});
-
-  if (EF->LLVMFuzzerCustomMutator)
-    Mutators.push_back({&MutationDispatcher::Mutate_Custom, "Custom"});
-  else
-    Mutators = DefaultMutators;
-
-  if (EF->LLVMFuzzerCustomCrossOver)
-    Mutators.push_back(
-        {&MutationDispatcher::Mutate_CustomCrossOver, "CustomCrossOver"});
-}
-
-static char RandCh(Random &Rand) {
-  if (Rand.RandBool()) return Rand(256);
-  const char *Special = "!*'();:@&=+$,/?%#[]012Az-`~.\xff\x00";
-  return Special[Rand(sizeof(Special) - 1)];
-}
-
-size_t MutationDispatcher::Mutate_Custom(uint8_t *Data, size_t Size,
-                                         size_t MaxSize) {
-  return EF->LLVMFuzzerCustomMutator(Data, Size, MaxSize, Rand.Rand());
-}
-
-size_t MutationDispatcher::Mutate_CustomCrossOver(uint8_t *Data, size_t Size,
-                                                  size_t MaxSize) {
-  if (!Corpus || Corpus->size() < 2 || Size == 0)
-    return 0;
-  size_t Idx = Rand(Corpus->size());
-  const Unit &Other = (*Corpus)[Idx];
-  if (Other.empty())
-    return 0;
-  CustomCrossOverInPlaceHere.resize(MaxSize);
-  auto &U = CustomCrossOverInPlaceHere;
-  size_t NewSize = EF->LLVMFuzzerCustomCrossOver(
-      Data, Size, Other.data(), Other.size(), U.data(), U.size(), Rand.Rand());
-  if (!NewSize)
-    return 0;
-  assert(NewSize <= MaxSize && "CustomCrossOver returned overisized unit");
-  memcpy(Data, U.data(), NewSize);
-  return NewSize;
-}
-
-size_t MutationDispatcher::Mutate_ShuffleBytes(uint8_t *Data, size_t Size,
-                                               size_t MaxSize) {
-  if (Size > MaxSize || Size == 0) return 0;
-  size_t ShuffleAmount =
-      Rand(std::min(Size, (size_t)8)) + 1; // [1,8] and <= Size.
-  size_t ShuffleStart = Rand(Size - ShuffleAmount);
-  assert(ShuffleStart + ShuffleAmount <= Size);
-  std::shuffle(Data + ShuffleStart, Data + ShuffleStart + ShuffleAmount, Rand);
-  return Size;
-}
-
-size_t MutationDispatcher::Mutate_EraseBytes(uint8_t *Data, size_t Size,
-                                             size_t MaxSize) {
-  if (Size <= 1) return 0;
-  size_t N = Rand(Size / 2) + 1;
-  assert(N < Size);
-  size_t Idx = Rand(Size - N + 1);
-  // Erase Data[Idx:Idx+N].
-  memmove(Data + Idx, Data + Idx + N, Size - Idx - N);
-  // Printf("Erase: %zd %zd => %zd; Idx %zd\n", N, Size, Size - N, Idx);
-  return Size - N;
-}
-
-size_t MutationDispatcher::Mutate_InsertByte(uint8_t *Data, size_t Size,
-                                             size_t MaxSize) {
-  if (Size >= MaxSize) return 0;
-  size_t Idx = Rand(Size + 1);
-  // Insert new value at Data[Idx].
-  memmove(Data + Idx + 1, Data + Idx, Size - Idx);
-  Data[Idx] = RandCh(Rand);
-  return Size + 1;
-}
-
-size_t MutationDispatcher::Mutate_InsertRepeatedBytes(uint8_t *Data,
-                                                      size_t Size,
-                                                      size_t MaxSize) {
-  const size_t kMinBytesToInsert = 3;
-  if (Size + kMinBytesToInsert >= MaxSize) return 0;
-  size_t MaxBytesToInsert = std::min(MaxSize - Size, (size_t)128);
-  size_t N = Rand(MaxBytesToInsert - kMinBytesToInsert + 1) + kMinBytesToInsert;
-  assert(Size + N <= MaxSize && N);
-  size_t Idx = Rand(Size + 1);
-  // Insert new values at Data[Idx].
-  memmove(Data + Idx + N, Data + Idx, Size - Idx);
-  // Give preference to 0x00 and 0xff.
-  uint8_t Byte = Rand.RandBool() ? Rand(256) : (Rand.RandBool() ? 0 : 255);
-  for (size_t i = 0; i < N; i++)
-    Data[Idx + i] = Byte;
-  return Size + N;
-}
-
-size_t MutationDispatcher::Mutate_ChangeByte(uint8_t *Data, size_t Size,
-                                             size_t MaxSize) {
-  if (Size > MaxSize) return 0;
-  size_t Idx = Rand(Size);
-  Data[Idx] = RandCh(Rand);
-  return Size;
-}
-
-size_t MutationDispatcher::Mutate_ChangeBit(uint8_t *Data, size_t Size,
-                                            size_t MaxSize) {
-  if (Size > MaxSize) return 0;
-  size_t Idx = Rand(Size);
-  Data[Idx] ^= 1 << Rand(8);
-  return Size;
-}
-
-size_t MutationDispatcher::Mutate_AddWordFromManualDictionary(uint8_t *Data,
-                                                              size_t Size,
-                                                              size_t MaxSize) {
-  return AddWordFromDictionary(ManualDictionary, Data, Size, MaxSize);
-}
-
-size_t MutationDispatcher::ApplyDictionaryEntry(uint8_t *Data, size_t Size,
-                                                size_t MaxSize,
-                                                DictionaryEntry &DE) {
-  const Word &W = DE.GetW();
-  bool UsePositionHint = DE.HasPositionHint() &&
-                         DE.GetPositionHint() + W.size() < Size &&
-                         Rand.RandBool();
-  if (Rand.RandBool()) {  // Insert W.
-    if (Size + W.size() > MaxSize) return 0;
-    size_t Idx = UsePositionHint ? DE.GetPositionHint() : Rand(Size + 1);
-    memmove(Data + Idx + W.size(), Data + Idx, Size - Idx);
-    memcpy(Data + Idx, W.data(), W.size());
-    Size += W.size();
-  } else {  // Overwrite some bytes with W.
-    if (W.size() > Size) return 0;
-    size_t Idx = UsePositionHint ? DE.GetPositionHint() : Rand(Size - W.size());
-    memcpy(Data + Idx, W.data(), W.size());
-  }
-  return Size;
-}
-
-// Somewhere in the past we have observed a comparison instructions
-// with arguments Arg1 Arg2. This function tries to guess a dictionary
-// entry that will satisfy that comparison.
-// It first tries to find one of the arguments (possibly swapped) in the
-// input and if it succeeds it creates a DE with a position hint.
-// Otherwise it creates a DE with one of the arguments w/o a position hint.
-DictionaryEntry MutationDispatcher::MakeDictionaryEntryFromCMP(
-    const void *Arg1, const void *Arg2,
-    const void *Arg1Mutation, const void *Arg2Mutation,
-    size_t ArgSize, const uint8_t *Data,
-    size_t Size) {
-  ScopedDoingMyOwnMemOrStr scoped_doing_my_own_mem_os_str;
-  bool HandleFirst = Rand.RandBool();
-  const void *ExistingBytes, *DesiredBytes;
-  Word W;
-  const uint8_t *End = Data + Size;
-  for (int Arg = 0; Arg < 2; Arg++) {
-    ExistingBytes = HandleFirst ? Arg1 : Arg2;
-    DesiredBytes = HandleFirst ? Arg2Mutation : Arg1Mutation;
-    HandleFirst = !HandleFirst;
-    W.Set(reinterpret_cast<const uint8_t*>(DesiredBytes), ArgSize);
-    const size_t kMaxNumPositions = 8;
-    size_t Positions[kMaxNumPositions];
-    size_t NumPositions = 0;
-    for (const uint8_t *Cur = Data;
-         Cur < End && NumPositions < kMaxNumPositions; Cur++) {
-      Cur =
-          (const uint8_t *)SearchMemory(Cur, End - Cur, ExistingBytes, ArgSize);
-      if (!Cur) break;
-      Positions[NumPositions++] = Cur - Data;
-    }
-    if (!NumPositions) continue;
-    return DictionaryEntry(W, Positions[Rand(NumPositions)]);
-  }
-  DictionaryEntry DE(W);
-  return DE;
-}
-
-
-template <class T>
-DictionaryEntry MutationDispatcher::MakeDictionaryEntryFromCMP(
-    T Arg1, T Arg2, const uint8_t *Data, size_t Size) {
-  if (Rand.RandBool()) Arg1 = Bswap(Arg1);
-  if (Rand.RandBool()) Arg2 = Bswap(Arg2);
-  T Arg1Mutation = Arg1 + Rand(-1, 1);
-  T Arg2Mutation = Arg2 + Rand(-1, 1);
-  return MakeDictionaryEntryFromCMP(&Arg1, &Arg2, &Arg1Mutation, &Arg2Mutation,
-                                    sizeof(Arg1), Data, Size);
-}
-
-DictionaryEntry MutationDispatcher::MakeDictionaryEntryFromCMP(
-    const Word &Arg1, const Word &Arg2, const uint8_t *Data, size_t Size) {
-  return MakeDictionaryEntryFromCMP(Arg1.data(), Arg2.data(), Arg1.data(),
-                                    Arg2.data(), Arg1.size(), Data, Size);
-}
-
-size_t MutationDispatcher::Mutate_AddWordFromTORC(
-    uint8_t *Data, size_t Size, size_t MaxSize) {
-  Word W;
-  DictionaryEntry DE;
-  switch (Rand(4)) {
-  case 0: {
-    auto X = TPC.TORC8.Get(Rand.Rand());
-    DE = MakeDictionaryEntryFromCMP(X.A, X.B, Data, Size);
-  } break;
-  case 1: {
-    auto X = TPC.TORC4.Get(Rand.Rand());
-    if ((X.A >> 16) == 0 && (X.B >> 16) == 0 && Rand.RandBool())
-      DE = MakeDictionaryEntryFromCMP((uint16_t)X.A, (uint16_t)X.B, Data, Size);
-    else
-      DE = MakeDictionaryEntryFromCMP(X.A, X.B, Data, Size);
-  } break;
-  case 2: {
-    auto X = TPC.TORCW.Get(Rand.Rand());
-    DE = MakeDictionaryEntryFromCMP(X.A, X.B, Data, Size);
-  } break;
-  case 3: if (Options.UseMemmem) {
-    auto X = TPC.MMT.Get(Rand.Rand());
-    DE = DictionaryEntry(X);
-  } break;
-  default:
-    assert(0);
-  }
-  if (!DE.GetW().size()) return 0;
-  Size = ApplyDictionaryEntry(Data, Size, MaxSize, DE);
-  if (!Size) return 0;
-  DictionaryEntry &DERef =
-      CmpDictionaryEntriesDeque[CmpDictionaryEntriesDequeIdx++ %
-                                kCmpDictionaryEntriesDequeSize];
-  DERef = DE;
-  CurrentDictionaryEntrySequence.push_back(&DERef);
-  return Size;
-}
-
-size_t MutationDispatcher::Mutate_AddWordFromPersistentAutoDictionary(
-    uint8_t *Data, size_t Size, size_t MaxSize) {
-  return AddWordFromDictionary(PersistentAutoDictionary, Data, Size, MaxSize);
-}
-
-size_t MutationDispatcher::AddWordFromDictionary(Dictionary &D, uint8_t *Data,
-                                                 size_t Size, size_t MaxSize) {
-  if (Size > MaxSize) return 0;
-  if (D.empty()) return 0;
-  DictionaryEntry &DE = D[Rand(D.size())];
-  Size = ApplyDictionaryEntry(Data, Size, MaxSize, DE);
-  if (!Size) return 0;
-  DE.IncUseCount();
-  CurrentDictionaryEntrySequence.push_back(&DE);
-  return Size;
-}
-
-// Overwrites part of To[0,ToSize) with a part of From[0,FromSize).
-// Returns ToSize.
-size_t MutationDispatcher::CopyPartOf(const uint8_t *From, size_t FromSize,
-                                      uint8_t *To, size_t ToSize) {
-  // Copy From[FromBeg, FromBeg + CopySize) into To[ToBeg, ToBeg + CopySize).
-  size_t ToBeg = Rand(ToSize);
-  size_t CopySize = Rand(ToSize - ToBeg) + 1;
-  assert(ToBeg + CopySize <= ToSize);
-  CopySize = std::min(CopySize, FromSize);
-  size_t FromBeg = Rand(FromSize - CopySize + 1);
-  assert(FromBeg + CopySize <= FromSize);
-  memmove(To + ToBeg, From + FromBeg, CopySize);
-  return ToSize;
-}
-
-// Inserts part of From[0,ToSize) into To.
-// Returns new size of To on success or 0 on failure.
-size_t MutationDispatcher::InsertPartOf(const uint8_t *From, size_t FromSize,
-                                        uint8_t *To, size_t ToSize,
-                                        size_t MaxToSize) {
-  if (ToSize >= MaxToSize) return 0;
-  size_t AvailableSpace = MaxToSize - ToSize;
-  size_t MaxCopySize = std::min(AvailableSpace, FromSize);
-  size_t CopySize = Rand(MaxCopySize) + 1;
-  size_t FromBeg = Rand(FromSize - CopySize + 1);
-  assert(FromBeg + CopySize <= FromSize);
-  size_t ToInsertPos = Rand(ToSize + 1);
-  assert(ToInsertPos + CopySize <= MaxToSize);
-  size_t TailSize = ToSize - ToInsertPos;
-  if (To == From) {
-    MutateInPlaceHere.resize(MaxToSize);
-    memcpy(MutateInPlaceHere.data(), From + FromBeg, CopySize);
-    memmove(To + ToInsertPos + CopySize, To + ToInsertPos, TailSize);
-    memmove(To + ToInsertPos, MutateInPlaceHere.data(), CopySize);
-  } else {
-    memmove(To + ToInsertPos + CopySize, To + ToInsertPos, TailSize);
-    memmove(To + ToInsertPos, From + FromBeg, CopySize);
-  }
-  return ToSize + CopySize;
-}
-
-size_t MutationDispatcher::Mutate_CopyPart(uint8_t *Data, size_t Size,
-                                           size_t MaxSize) {
-  if (Size > MaxSize || Size == 0) return 0;
-  if (Rand.RandBool())
-    return CopyPartOf(Data, Size, Data, Size);
-  else
-    return InsertPartOf(Data, Size, Data, Size, MaxSize);
-}
-
-size_t MutationDispatcher::Mutate_ChangeASCIIInteger(uint8_t *Data, size_t Size,
-                                                     size_t MaxSize) {
-  if (Size > MaxSize) return 0;
-  size_t B = Rand(Size);
-  while (B < Size && !isdigit(Data[B])) B++;
-  if (B == Size) return 0;
-  size_t E = B;
-  while (E < Size && isdigit(Data[E])) E++;
-  assert(B < E);
-  // now we have digits in [B, E).
-  // strtol and friends don't accept non-zero-teminated data, parse it manually.
-  uint64_t Val = Data[B] - '0';
-  for (size_t i = B + 1; i < E; i++)
-    Val = Val * 10 + Data[i] - '0';
-
-  // Mutate the integer value.
-  switch(Rand(5)) {
-    case 0: Val++; break;
-    case 1: Val--; break;
-    case 2: Val /= 2; break;
-    case 3: Val *= 2; break;
-    case 4: Val = Rand(Val * Val); break;
-    default: assert(0);
-  }
-  // Just replace the bytes with the new ones, don't bother moving bytes.
-  for (size_t i = B; i < E; i++) {
-    size_t Idx = E + B - i - 1;
-    assert(Idx >= B && Idx < E);
-    Data[Idx] = (Val % 10) + '0';
-    Val /= 10;
-  }
-  return Size;
-}
-
-template<class T>
-size_t ChangeBinaryInteger(uint8_t *Data, size_t Size, Random &Rand) {
-  if (Size < sizeof(T)) return 0;
-  size_t Off = Rand(Size - sizeof(T) + 1);
-  assert(Off + sizeof(T) <= Size);
-  T Val;
-  if (Off < 64 && !Rand(4)) {
-    Val = Size;
-    if (Rand.RandBool())
-      Val = Bswap(Val);
-  } else {
-    memcpy(&Val, Data + Off, sizeof(Val));
-    T Add = Rand(21);
-    Add -= 10;
-    if (Rand.RandBool())
-      Val = Bswap(T(Bswap(Val) + Add)); // Add assuming different endiannes.
-    else
-      Val = Val + Add;               // Add assuming current endiannes.
-    if (Add == 0 || Rand.RandBool()) // Maybe negate.
-      Val = -Val;
-  }
-  memcpy(Data + Off, &Val, sizeof(Val));
-  return Size;
-}
-
-size_t MutationDispatcher::Mutate_ChangeBinaryInteger(uint8_t *Data,
-                                                      size_t Size,
-                                                      size_t MaxSize) {
-  if (Size > MaxSize) return 0;
-  switch (Rand(4)) {
-    case 3: return ChangeBinaryInteger<uint64_t>(Data, Size, Rand);
-    case 2: return ChangeBinaryInteger<uint32_t>(Data, Size, Rand);
-    case 1: return ChangeBinaryInteger<uint16_t>(Data, Size, Rand);
-    case 0: return ChangeBinaryInteger<uint8_t>(Data, Size, Rand);
-    default: assert(0);
-  }
-  return 0;
-}
-
-size_t MutationDispatcher::Mutate_CrossOver(uint8_t *Data, size_t Size,
-                                            size_t MaxSize) {
-  if (Size > MaxSize) return 0;
-  if (!Corpus || Corpus->size() < 2 || Size == 0) return 0;
-  size_t Idx = Rand(Corpus->size());
-  const Unit &O = (*Corpus)[Idx];
-  if (O.empty()) return 0;
-  MutateInPlaceHere.resize(MaxSize);
-  auto &U = MutateInPlaceHere;
-  size_t NewSize = 0;
-  switch(Rand(3)) {
-    case 0:
-      NewSize = CrossOver(Data, Size, O.data(), O.size(), U.data(), U.size());
-      break;
-    case 1:
-      NewSize = InsertPartOf(O.data(), O.size(), U.data(), U.size(), MaxSize);
-      if (!NewSize)
-        NewSize = CopyPartOf(O.data(), O.size(), U.data(), U.size());
-      break;
-    case 2:
-      NewSize = CopyPartOf(O.data(), O.size(), U.data(), U.size());
-      break;
-    default: assert(0);
-  }
-  assert(NewSize > 0 && "CrossOver returned empty unit");
-  assert(NewSize <= MaxSize && "CrossOver returned overisized unit");
-  memcpy(Data, U.data(), NewSize);
-  return NewSize;
-}
-
-void MutationDispatcher::StartMutationSequence() {
-  CurrentMutatorSequence.clear();
-  CurrentDictionaryEntrySequence.clear();
-}
-
-// Copy successful dictionary entries to PersistentAutoDictionary.
-void MutationDispatcher::RecordSuccessfulMutationSequence() {
-  for (auto DE : CurrentDictionaryEntrySequence) {
-    // PersistentAutoDictionary.AddWithSuccessCountOne(DE);
-    DE->IncSuccessCount();
-    assert(DE->GetW().size());
-    // Linear search is fine here as this happens seldom.
-    if (!PersistentAutoDictionary.ContainsWord(DE->GetW()))
-      PersistentAutoDictionary.push_back({DE->GetW(), 1});
-  }
-}
-
-void MutationDispatcher::PrintRecommendedDictionary() {
-  std::vector<DictionaryEntry> V;
-  for (auto &DE : PersistentAutoDictionary)
-    if (!ManualDictionary.ContainsWord(DE.GetW()))
-      V.push_back(DE);
-  if (V.empty()) return;
-  Printf("###### Recommended dictionary. ######\n");
-  for (auto &DE: V) {
-    assert(DE.GetW().size());
-    Printf("\"");
-    PrintASCII(DE.GetW(), "\"");
-    Printf(" # Uses: %zd\n", DE.GetUseCount());
-  }
-  Printf("###### End of recommended dictionary. ######\n");
-}
-
-void MutationDispatcher::PrintMutationSequence() {
-  Printf("MS: %zd ", CurrentMutatorSequence.size());
-  for (auto M : CurrentMutatorSequence)
-    Printf("%s-", M.Name);
-  if (!CurrentDictionaryEntrySequence.empty()) {
-    Printf(" DE: ");
-    for (auto DE : CurrentDictionaryEntrySequence) {
-      Printf("\"");
-      PrintASCII(DE->GetW(), "\"-");
-    }
-  }
-}
-
-size_t MutationDispatcher::Mutate(uint8_t *Data, size_t Size, size_t MaxSize) {
-  return MutateImpl(Data, Size, MaxSize, Mutators);
-}
-
-size_t MutationDispatcher::DefaultMutate(uint8_t *Data, size_t Size,
-                                         size_t MaxSize) {
-  return MutateImpl(Data, Size, MaxSize, DefaultMutators);
-}
-
-// Mutates Data in place, returns new size.
-size_t MutationDispatcher::MutateImpl(uint8_t *Data, size_t Size,
-                                      size_t MaxSize,
-                                      const std::vector<Mutator> &Mutators) {
-  assert(MaxSize > 0);
-  // Some mutations may fail (e.g. can't insert more bytes if Size == MaxSize),
-  // in which case they will return 0.
-  // Try several times before returning un-mutated data.
-  for (int Iter = 0; Iter < 100; Iter++) {
-    auto M = Mutators[Rand(Mutators.size())];
-    size_t NewSize = (this->*(M.Fn))(Data, Size, MaxSize);
-    if (NewSize && NewSize <= MaxSize) {
-      if (Options.OnlyASCII)
-        ToASCII(Data, NewSize);
-      CurrentMutatorSequence.push_back(M);
-      return NewSize;
-    }
-  }
-  *Data = ' ';
-  return 1;   // Fallback, should not happen frequently.
-}
-
-void MutationDispatcher::AddWordToManualDictionary(const Word &W) {
-  ManualDictionary.push_back(
-      {W, std::numeric_limits<size_t>::max()});
-}
-
-}  // namespace fuzzer
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMutate.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMutate.h
deleted file mode 100644
index 84b04c0dbf3e..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerMutate.h
+++ /dev/null
@@ -1,150 +0,0 @@
-//===- FuzzerMutate.h - Internal header for the Fuzzer ----------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// fuzzer::MutationDispatcher
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_MUTATE_H
-#define LLVM_FUZZER_MUTATE_H
-
-#include "FuzzerDefs.h"
-#include "FuzzerDictionary.h"
-#include "FuzzerOptions.h"
-#include "FuzzerRandom.h"
-
-namespace fuzzer {
-
-class MutationDispatcher {
-public:
-  MutationDispatcher(Random &Rand, const FuzzingOptions &Options);
-  ~MutationDispatcher() {}
-  /// Indicate that we are about to start a new sequence of mutations.
-  void StartMutationSequence();
-  /// Print the current sequence of mutations.
-  void PrintMutationSequence();
-  /// Indicate that the current sequence of mutations was successfull.
-  void RecordSuccessfulMutationSequence();
-  /// Mutates data by invoking user-provided mutator.
-  size_t Mutate_Custom(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Mutates data by invoking user-provided crossover.
-  size_t Mutate_CustomCrossOver(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Mutates data by shuffling bytes.
-  size_t Mutate_ShuffleBytes(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Mutates data by erasing bytes.
-  size_t Mutate_EraseBytes(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Mutates data by inserting a byte.
-  size_t Mutate_InsertByte(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Mutates data by inserting several repeated bytes.
-  size_t Mutate_InsertRepeatedBytes(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Mutates data by chanding one byte.
-  size_t Mutate_ChangeByte(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Mutates data by chanding one bit.
-  size_t Mutate_ChangeBit(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Mutates data by copying/inserting a part of data into a different place.
-  size_t Mutate_CopyPart(uint8_t *Data, size_t Size, size_t MaxSize);
-
-  /// Mutates data by adding a word from the manual dictionary.
-  size_t Mutate_AddWordFromManualDictionary(uint8_t *Data, size_t Size,
-                                            size_t MaxSize);
-
-  /// Mutates data by adding a word from the TORC.
-  size_t Mutate_AddWordFromTORC(uint8_t *Data, size_t Size, size_t MaxSize);
-
-  /// Mutates data by adding a word from the persistent automatic dictionary.
-  size_t Mutate_AddWordFromPersistentAutoDictionary(uint8_t *Data, size_t Size,
-                                                    size_t MaxSize);
-
-  /// Tries to find an ASCII integer in Data, changes it to another ASCII int.
-  size_t Mutate_ChangeASCIIInteger(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Change a 1-, 2-, 4-, or 8-byte integer in interesting ways.
-  size_t Mutate_ChangeBinaryInteger(uint8_t *Data, size_t Size, size_t MaxSize);
-
-  /// CrossOver Data with some other element of the corpus.
-  size_t Mutate_CrossOver(uint8_t *Data, size_t Size, size_t MaxSize);
-
-  /// Applies one of the configured mutations.
-  /// Returns the new size of data which could be up to MaxSize.
-  size_t Mutate(uint8_t *Data, size_t Size, size_t MaxSize);
-  /// Applies one of the default mutations. Provided as a service
-  /// to mutation authors.
-  size_t DefaultMutate(uint8_t *Data, size_t Size, size_t MaxSize);
-
-  /// Creates a cross-over of two pieces of Data, returns its size.
-  size_t CrossOver(const uint8_t *Data1, size_t Size1, const uint8_t *Data2,
-                   size_t Size2, uint8_t *Out, size_t MaxOutSize);
-
-  void AddWordToManualDictionary(const Word &W);
-
-  void PrintRecommendedDictionary();
-
-  void SetCorpus(const InputCorpus *Corpus) { this->Corpus = Corpus; }
-
-  Random &GetRand() { return Rand; }
-
-private:
-
-  struct Mutator {
-    size_t (MutationDispatcher::*Fn)(uint8_t *Data, size_t Size, size_t Max);
-    const char *Name;
-  };
-
-  size_t AddWordFromDictionary(Dictionary &D, uint8_t *Data, size_t Size,
-                               size_t MaxSize);
-  size_t MutateImpl(uint8_t *Data, size_t Size, size_t MaxSize,
-                    const std::vector<Mutator> &Mutators);
-
-  size_t InsertPartOf(const uint8_t *From, size_t FromSize, uint8_t *To,
-                      size_t ToSize, size_t MaxToSize);
-  size_t CopyPartOf(const uint8_t *From, size_t FromSize, uint8_t *To,
-                    size_t ToSize);
-  size_t ApplyDictionaryEntry(uint8_t *Data, size_t Size, size_t MaxSize,
-                              DictionaryEntry &DE);
-
-  template <class T>
-  DictionaryEntry MakeDictionaryEntryFromCMP(T Arg1, T Arg2,
-                                             const uint8_t *Data, size_t Size);
-  DictionaryEntry MakeDictionaryEntryFromCMP(const Word &Arg1, const Word &Arg2,
-                                             const uint8_t *Data, size_t Size);
-  DictionaryEntry MakeDictionaryEntryFromCMP(const void *Arg1, const void *Arg2,
-                                             const void *Arg1Mutation,
-                                             const void *Arg2Mutation,
-                                             size_t ArgSize,
-                                             const uint8_t *Data, size_t Size);
-
-  Random &Rand;
-  const FuzzingOptions Options;
-
-  // Dictionary provided by the user via -dict=DICT_FILE.
-  Dictionary ManualDictionary;
-  // Temporary dictionary modified by the fuzzer itself,
-  // recreated periodically.
-  Dictionary TempAutoDictionary;
-  // Persistent dictionary modified by the fuzzer, consists of
-  // entries that led to successfull discoveries in the past mutations.
-  Dictionary PersistentAutoDictionary;
-
-  std::vector<Mutator> CurrentMutatorSequence;
-  std::vector<DictionaryEntry *> CurrentDictionaryEntrySequence;
-
-  static const size_t kCmpDictionaryEntriesDequeSize = 16;
-  DictionaryEntry CmpDictionaryEntriesDeque[kCmpDictionaryEntriesDequeSize];
-  size_t CmpDictionaryEntriesDequeIdx = 0;
-
-  const InputCorpus *Corpus = nullptr;
-  std::vector<uint8_t> MutateInPlaceHere;
-  // CustomCrossOver needs its own buffer as a custom implementation may call
-  // LLVMFuzzerMutate, which in turn may resize MutateInPlaceHere.
-  std::vector<uint8_t> CustomCrossOverInPlaceHere;
-
-  std::vector<Mutator> Mutators;
-  std::vector<Mutator> DefaultMutators;
-};
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_MUTATE_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerOptions.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerOptions.h
deleted file mode 100644
index 9500235e2b1f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerOptions.h
+++ /dev/null
@@ -1,68 +0,0 @@
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// fuzzer::FuzzingOptions
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_OPTIONS_H
-#define LLVM_FUZZER_OPTIONS_H
-
-#include "FuzzerDefs.h"
-
-namespace fuzzer {
-
-struct FuzzingOptions {
-  int Verbosity = 1;
-  size_t MaxLen = 0;
-  bool ExperimentalLenControl = false;
-  int UnitTimeoutSec = 300;
-  int TimeoutExitCode = 77;
-  int ErrorExitCode = 77;
-  int MaxTotalTimeSec = 0;
-  int RssLimitMb = 0;
-  bool DoCrossOver = true;
-  int MutateDepth = 5;
-  bool UseCounters = false;
-  bool UseIndirCalls = true;
-  bool UseMemmem = true;
-  bool UseCmp = false;
-  bool UseValueProfile = false;
-  bool Shrink = false;
-  bool ReduceInputs = false;
-  int ReloadIntervalSec = 1;
-  bool ShuffleAtStartUp = true;
-  bool PreferSmall = true;
-  size_t MaxNumberOfRuns = -1L;
-  int ReportSlowUnits = 10;
-  bool OnlyASCII = false;
-  std::string OutputCorpus;
-  std::string ArtifactPrefix = "./";
-  std::string ExactArtifactPath;
-  std::string ExitOnSrcPos;
-  std::string ExitOnItem;
-  bool SaveArtifacts = true;
-  bool PrintNEW = true; // Print a status line when new units are found;
-  bool PrintNewCovPcs = false;
-  bool PrintFinalStats = false;
-  bool PrintCorpusStats = false;
-  bool PrintCoverage = false;
-  bool DumpCoverage = false;
-  bool DetectLeaks = true;
-  int  TraceMalloc = 0;
-  bool HandleAbrt = false;
-  bool HandleBus = false;
-  bool HandleFpe = false;
-  bool HandleIll = false;
-  bool HandleInt = false;
-  bool HandleSegv = false;
-  bool HandleTerm = false;
-  bool HandleXfsz = false;
-};
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_OPTIONS_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerRandom.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerRandom.h
deleted file mode 100644
index 8a1aa3ef5fdc..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerRandom.h
+++ /dev/null
@@ -1,34 +0,0 @@
-//===- FuzzerRandom.h - Internal header for the Fuzzer ----------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// fuzzer::Random
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_RANDOM_H
-#define LLVM_FUZZER_RANDOM_H
-
-#include <random>
-
-namespace fuzzer {
-class Random : public std::mt19937 {
- public:
-  Random(unsigned int seed) : std::mt19937(seed) {}
-  result_type operator()() { return this->std::mt19937::operator()(); }
-  size_t Rand() { return this->operator()(); }
-  size_t RandBool() { return Rand() % 2; }
-  size_t operator()(size_t n) { return n ? Rand() % n : 0; }
-  intptr_t operator()(intptr_t From, intptr_t To) {
-    assert(From < To);
-    intptr_t RangeSize = To - From + 1;
-    return operator()(RangeSize) + From;
-  }
-};
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_RANDOM_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerSHA1.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerSHA1.cpp
deleted file mode 100644
index d2f8e811bbf8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerSHA1.cpp
+++ /dev/null
@@ -1,222 +0,0 @@
-//===- FuzzerSHA1.h - Private copy of the SHA1 implementation ---*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// This code is taken from public domain
-// (http://oauth.googlecode.com/svn/code/c/liboauth/src/sha1.c)
-// and modified by adding anonymous namespace, adding an interface
-// function fuzzer::ComputeSHA1() and removing unnecessary code.
-//
-// lib/Fuzzer can not use SHA1 implementation from openssl because
-// openssl may not be available and because we may be fuzzing openssl itself.
-// For the same reason we do not want to depend on SHA1 from LLVM tree.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerSHA1.h"
-#include "FuzzerDefs.h"
-
-/* This code is public-domain - it is based on libcrypt
- * placed in the public domain by Wei Dai and other contributors.
- */
-
-#include <iomanip>
-#include <sstream>
-#include <stdint.h>
-#include <string.h>
-
-namespace {  // Added for LibFuzzer
-
-#ifdef __BIG_ENDIAN__
-# define SHA_BIG_ENDIAN
-#elif defined __LITTLE_ENDIAN__
-/* override */
-#elif defined __BYTE_ORDER
-# if __BYTE_ORDER__ ==  __ORDER_BIG_ENDIAN__
-# define SHA_BIG_ENDIAN
-# endif
-#else // ! defined __LITTLE_ENDIAN__
-# include <endian.h> // machine/endian.h
-# if __BYTE_ORDER__ ==  __ORDER_BIG_ENDIAN__
-#  define SHA_BIG_ENDIAN
-# endif
-#endif
-
-
-/* header */
-
-#define HASH_LENGTH 20
-#define BLOCK_LENGTH 64
-
-typedef struct sha1nfo {
-	uint32_t buffer[BLOCK_LENGTH/4];
-	uint32_t state[HASH_LENGTH/4];
-	uint32_t byteCount;
-	uint8_t bufferOffset;
-	uint8_t keyBuffer[BLOCK_LENGTH];
-	uint8_t innerHash[HASH_LENGTH];
-} sha1nfo;
-
-/* public API - prototypes - TODO: doxygen*/
-
-/**
- */
-void sha1_init(sha1nfo *s);
-/**
- */
-void sha1_writebyte(sha1nfo *s, uint8_t data);
-/**
- */
-void sha1_write(sha1nfo *s, const char *data, size_t len);
-/**
- */
-uint8_t* sha1_result(sha1nfo *s);
-
-
-/* code */
-#define SHA1_K0  0x5a827999
-#define SHA1_K20 0x6ed9eba1
-#define SHA1_K40 0x8f1bbcdc
-#define SHA1_K60 0xca62c1d6
-
-void sha1_init(sha1nfo *s) {
-	s->state[0] = 0x67452301;
-	s->state[1] = 0xefcdab89;
-	s->state[2] = 0x98badcfe;
-	s->state[3] = 0x10325476;
-	s->state[4] = 0xc3d2e1f0;
-	s->byteCount = 0;
-	s->bufferOffset = 0;
-}
-
-uint32_t sha1_rol32(uint32_t number, uint8_t bits) {
-	return ((number << bits) | (number >> (32-bits)));
-}
-
-void sha1_hashBlock(sha1nfo *s) {
-	uint8_t i;
-	uint32_t a,b,c,d,e,t;
-
-	a=s->state[0];
-	b=s->state[1];
-	c=s->state[2];
-	d=s->state[3];
-	e=s->state[4];
-	for (i=0; i<80; i++) {
-		if (i>=16) {
-			t = s->buffer[(i+13)&15] ^ s->buffer[(i+8)&15] ^ s->buffer[(i+2)&15] ^ s->buffer[i&15];
-			s->buffer[i&15] = sha1_rol32(t,1);
-		}
-		if (i<20) {
-			t = (d ^ (b & (c ^ d))) + SHA1_K0;
-		} else if (i<40) {
-			t = (b ^ c ^ d) + SHA1_K20;
-		} else if (i<60) {
-			t = ((b & c) | (d & (b | c))) + SHA1_K40;
-		} else {
-			t = (b ^ c ^ d) + SHA1_K60;
-		}
-		t+=sha1_rol32(a,5) + e + s->buffer[i&15];
-		e=d;
-		d=c;
-		c=sha1_rol32(b,30);
-		b=a;
-		a=t;
-	}
-	s->state[0] += a;
-	s->state[1] += b;
-	s->state[2] += c;
-	s->state[3] += d;
-	s->state[4] += e;
-}
-
-void sha1_addUncounted(sha1nfo *s, uint8_t data) {
-	uint8_t * const b = (uint8_t*) s->buffer;
-#ifdef SHA_BIG_ENDIAN
-	b[s->bufferOffset] = data;
-#else
-	b[s->bufferOffset ^ 3] = data;
-#endif
-	s->bufferOffset++;
-	if (s->bufferOffset == BLOCK_LENGTH) {
-		sha1_hashBlock(s);
-		s->bufferOffset = 0;
-	}
-}
-
-void sha1_writebyte(sha1nfo *s, uint8_t data) {
-	++s->byteCount;
-	sha1_addUncounted(s, data);
-}
-
-void sha1_write(sha1nfo *s, const char *data, size_t len) {
-	for (;len--;) sha1_writebyte(s, (uint8_t) *data++);
-}
-
-void sha1_pad(sha1nfo *s) {
-	// Implement SHA-1 padding (fips180-2 §5.1.1)
-
-	// Pad with 0x80 followed by 0x00 until the end of the block
-	sha1_addUncounted(s, 0x80);
-	while (s->bufferOffset != 56) sha1_addUncounted(s, 0x00);
-
-	// Append length in the last 8 bytes
-	sha1_addUncounted(s, 0); // We're only using 32 bit lengths
-	sha1_addUncounted(s, 0); // But SHA-1 supports 64 bit lengths
-	sha1_addUncounted(s, 0); // So zero pad the top bits
-	sha1_addUncounted(s, s->byteCount >> 29); // Shifting to multiply by 8
-	sha1_addUncounted(s, s->byteCount >> 21); // as SHA-1 supports bitstreams as well as
-	sha1_addUncounted(s, s->byteCount >> 13); // byte.
-	sha1_addUncounted(s, s->byteCount >> 5);
-	sha1_addUncounted(s, s->byteCount << 3);
-}
-
-uint8_t* sha1_result(sha1nfo *s) {
-	// Pad to complete the last block
-	sha1_pad(s);
-
-#ifndef SHA_BIG_ENDIAN
-	// Swap byte order back
-	int i;
-	for (i=0; i<5; i++) {
-		s->state[i]=
-			  (((s->state[i])<<24)& 0xff000000)
-			| (((s->state[i])<<8) & 0x00ff0000)
-			| (((s->state[i])>>8) & 0x0000ff00)
-			| (((s->state[i])>>24)& 0x000000ff);
-	}
-#endif
-
-	// Return pointer to hash (20 characters)
-	return (uint8_t*) s->state;
-}
-
-}  // namespace; Added for LibFuzzer
-
-namespace fuzzer {
-
-// The rest is added for LibFuzzer
-void ComputeSHA1(const uint8_t *Data, size_t Len, uint8_t *Out) {
-  sha1nfo s;
-  sha1_init(&s);
-  sha1_write(&s, (const char*)Data, Len);
-  memcpy(Out, sha1_result(&s), HASH_LENGTH);
-}
-
-std::string Sha1ToString(const uint8_t Sha1[kSHA1NumBytes]) {
-  std::stringstream SS;
-  for (int i = 0; i < kSHA1NumBytes; i++)
-    SS << std::hex << std::setfill('0') << std::setw(2) << (unsigned)Sha1[i];
-  return SS.str();
-}
-
-std::string Hash(const Unit &U) {
-  uint8_t Hash[kSHA1NumBytes];
-  ComputeSHA1(U.data(), U.size(), Hash);
-  return Sha1ToString(Hash);
-}
-
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerSHA1.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerSHA1.h
deleted file mode 100644
index 3b5e6e807f42..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerSHA1.h
+++ /dev/null
@@ -1,33 +0,0 @@
-//===- FuzzerSHA1.h - Internal header for the SHA1 utils --------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// SHA1 utils.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_SHA1_H
-#define LLVM_FUZZER_SHA1_H
-
-#include "FuzzerDefs.h"
-#include <cstddef>
-#include <stdint.h>
-
-namespace fuzzer {
-
-// Private copy of SHA1 implementation.
-static const int kSHA1NumBytes = 20;
-
-// Computes SHA1 hash of 'Len' bytes in 'Data', writes kSHA1NumBytes to 'Out'.
-void ComputeSHA1(const uint8_t *Data, size_t Len, uint8_t *Out);
-
-std::string Sha1ToString(const uint8_t Sha1[kSHA1NumBytes]);
-
-std::string Hash(const Unit &U);
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_SHA1_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmem.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmem.h
deleted file mode 100644
index 53568e0acb69..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmem.h
+++ /dev/null
@@ -1,69 +0,0 @@
-//===- FuzzerShmem.h - shared memory interface ------------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// SharedMemoryRegion
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_SHMEM_H
-#define LLVM_FUZZER_SHMEM_H
-
-#include <algorithm>
-#include <cstring>
-#include <string>
-
-#include "FuzzerDefs.h"
-
-namespace fuzzer {
-
-class SharedMemoryRegion {
- public:
-  bool Create(const char *Name);
-  bool Open(const char *Name);
-  bool Destroy(const char *Name);
-  uint8_t *GetData() { return Data; }
-  void PostServer() {Post(0);}
-  void WaitServer() {Wait(0);}
-  void PostClient() {Post(1);}
-  void WaitClient() {Wait(1);}
-
-  size_t WriteByteArray(const uint8_t *Bytes, size_t N) {
-    assert(N <= kShmemSize - sizeof(N));
-    memcpy(GetData(), &N, sizeof(N));
-    memcpy(GetData() + sizeof(N), Bytes, N);
-    assert(N == ReadByteArraySize());
-    return N;
-  }
-  size_t ReadByteArraySize() {
-    size_t Res;
-    memcpy(&Res, GetData(), sizeof(Res));
-    return Res;
-  }
-  uint8_t *GetByteArray() { return GetData() + sizeof(size_t); }
-
-  bool IsServer() const { return Data && IAmServer; }
-  bool IsClient() const { return Data && !IAmServer; }
-
-private:
-
-  static const size_t kShmemSize = 1 << 22;
-  bool IAmServer;
-  std::string Path(const char *Name);
-  std::string SemName(const char *Name, int Idx);
-  void Post(int Idx);
-  void Wait(int Idx);
-
-  bool Map(int fd);
-  uint8_t *Data = nullptr;
-  void *Semaphore[2];
-};
-
-extern SharedMemoryRegion SMR;
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_SHMEM_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmemPosix.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmemPosix.cpp
deleted file mode 100644
index 50cdcfb509dc..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmemPosix.cpp
+++ /dev/null
@@ -1,103 +0,0 @@
-//===- FuzzerShmemPosix.cpp - Posix shared memory ---------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// SharedMemoryRegion
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_POSIX
-
-#include "FuzzerIO.h"
-#include "FuzzerShmem.h"
-
-#include <errno.h>
-#include <fcntl.h>
-#include <semaphore.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <sys/mman.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <unistd.h>
-
-namespace fuzzer {
-
-std::string SharedMemoryRegion::Path(const char *Name) {
-  return DirPlusFile(TmpDir(), Name);
-}
-
-std::string SharedMemoryRegion::SemName(const char *Name, int Idx) {
-  std::string Res(Name);
-  return Res + (char)('0' + Idx);
-}
-
-bool SharedMemoryRegion::Map(int fd) {
-  Data =
-      (uint8_t *)mmap(0, kShmemSize, PROT_WRITE | PROT_READ, MAP_SHARED, fd, 0);
-  if (Data == (uint8_t*)-1)
-    return false;
-  return true;
-}
-
-bool SharedMemoryRegion::Create(const char *Name) {
-  int fd = open(Path(Name).c_str(), O_CREAT | O_RDWR, 0777);
-  if (fd < 0) return false;
-  if (ftruncate(fd, kShmemSize) < 0) return false;
-  if (!Map(fd))
-    return false;
-  for (int i = 0; i < 2; i++) {
-    sem_unlink(SemName(Name, i).c_str());
-    Semaphore[i] = sem_open(SemName(Name, i).c_str(), O_CREAT, 0644, 0);
-    if (Semaphore[i] == (void *)-1)
-      return false;
-  }
-  IAmServer = true;
-  return true;
-}
-
-bool SharedMemoryRegion::Open(const char *Name) {
-  int fd = open(Path(Name).c_str(), O_RDWR);
-  if (fd < 0) return false;
-  struct stat stat_res;
-  if (0 != fstat(fd, &stat_res))
-    return false;
-  assert(stat_res.st_size == kShmemSize);
-  if (!Map(fd))
-    return false;
-  for (int i = 0; i < 2; i++) {
-    Semaphore[i] = sem_open(SemName(Name, i).c_str(), 0);
-    if (Semaphore[i] == (void *)-1)
-      return false;
-  }
-  IAmServer = false;
-  return true;
-}
-
-bool SharedMemoryRegion::Destroy(const char *Name) {
-  return 0 == unlink(Path(Name).c_str());
-}
-
-void SharedMemoryRegion::Post(int Idx) {
-  assert(Idx == 0 || Idx == 1);
-  sem_post((sem_t*)Semaphore[Idx]);
-}
-
-void SharedMemoryRegion::Wait(int Idx) {
-  assert(Idx == 0 || Idx == 1);
-  for (int i = 0; i < 10 && sem_wait((sem_t*)Semaphore[Idx]); i++) {
-    // sem_wait may fail if interrupted by a signal.
-    sleep(i);
-    if (i)
-      Printf("%s: sem_wait[%d] failed %s\n", i < 9 ? "WARNING" : "ERROR", i,
-             strerror(errno));
-    if (i == 9) abort();
-  }
-}
-
-}  // namespace fuzzer
-
-#endif  // LIBFUZZER_POSIX
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmemWindows.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmemWindows.cpp
deleted file mode 100644
index d330ebf4fd07..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerShmemWindows.cpp
+++ /dev/null
@@ -1,64 +0,0 @@
-//===- FuzzerShmemWindows.cpp - Posix shared memory -------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// SharedMemoryRegion
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_WINDOWS
-
-#include "FuzzerIO.h"
-#include "FuzzerShmem.h"
-
-#include <fcntl.h>
-#include <stdio.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-
-namespace fuzzer {
-
-std::string SharedMemoryRegion::Path(const char *Name) {
-  return DirPlusFile(TmpDir(), Name);
-}
-
-std::string SharedMemoryRegion::SemName(const char *Name, int Idx) {
-  std::string Res(Name);
-  return Res + (char)('0' + Idx);
-}
-
-bool SharedMemoryRegion::Map(int fd) {
-  assert(0 && "UNIMPLEMENTED");
-  return false;
-}
-
-bool SharedMemoryRegion::Create(const char *Name) {
-  assert(0 && "UNIMPLEMENTED");
-  return false;
-}
-
-bool SharedMemoryRegion::Open(const char *Name) {
-  assert(0 && "UNIMPLEMENTED");
-  return false;
-}
-
-bool SharedMemoryRegion::Destroy(const char *Name) {
-  assert(0 && "UNIMPLEMENTED");
-  return false;
-}
-
-void SharedMemoryRegion::Post(int Idx) {
-  assert(0 && "UNIMPLEMENTED");
-}
-
-void SharedMemoryRegion::Wait(int Idx) {
-  Semaphore[1] = nullptr;
-  assert(0 && "UNIMPLEMENTED");
-}
-
-}  // namespace fuzzer
-
-#endif  // LIBFUZZER_WINDOWS
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerTracePC.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerTracePC.cpp
deleted file mode 100644
index ced0a2133340..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerTracePC.cpp
+++ /dev/null
@@ -1,501 +0,0 @@
-//===- FuzzerTracePC.cpp - PC tracing--------------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Trace PCs.
-// This module implements __sanitizer_cov_trace_pc_guard[_init],
-// the callback required for -fsanitize-coverage=trace-pc-guard instrumentation.
-//
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerTracePC.h"
-#include "FuzzerCorpus.h"
-#include "FuzzerDefs.h"
-#include "FuzzerDictionary.h"
-#include "FuzzerExtFunctions.h"
-#include "FuzzerIO.h"
-#include "FuzzerUtil.h"
-#include "FuzzerValueBitMap.h"
-#include <map>
-#include <set>
-#include <sstream>
-
-// The coverage counters and PCs.
-// These are declared as global variables named "__sancov_*" to simplify
-// experiments with inlined instrumentation.
-alignas(64) ATTRIBUTE_INTERFACE
-uint8_t __sancov_trace_pc_guard_8bit_counters[fuzzer::TracePC::kNumPCs];
-
-ATTRIBUTE_INTERFACE
-uintptr_t __sancov_trace_pc_pcs[fuzzer::TracePC::kNumPCs];
-
-namespace fuzzer {
-
-TracePC TPC;
-
-int ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr;
-
-uint8_t *TracePC::Counters() const {
-  return __sancov_trace_pc_guard_8bit_counters;
-}
-
-uintptr_t *TracePC::PCs() const {
-  return __sancov_trace_pc_pcs;
-}
-
-size_t TracePC::GetTotalPCCoverage() {
-  size_t Res = 0;
-  for (size_t i = 1, N = GetNumPCs(); i < N; i++)
-    if (PCs()[i])
-      Res++;
-  return Res;
-}
-
-
-void TracePC::HandleInline8bitCountersInit(uint8_t *Start, uint8_t *Stop) {
-  if (Start == Stop) return;
-  if (NumModulesWithInline8bitCounters &&
-      ModuleCounters[NumModulesWithInline8bitCounters-1].Start == Start) return;
-  assert(NumModulesWithInline8bitCounters <
-         sizeof(ModuleCounters) / sizeof(ModuleCounters[0]));
-  ModuleCounters[NumModulesWithInline8bitCounters++] = {Start, Stop};
-  NumInline8bitCounters += Stop - Start;
-}
-
-void TracePC::HandleInit(uint32_t *Start, uint32_t *Stop) {
-  if (Start == Stop || *Start) return;
-  assert(NumModules < sizeof(Modules) / sizeof(Modules[0]));
-  for (uint32_t *P = Start; P < Stop; P++) {
-    NumGuards++;
-    if (NumGuards == kNumPCs) {
-      RawPrint(
-          "WARNING: The binary has too many instrumented PCs.\n"
-          "         You may want to reduce the size of the binary\n"
-          "         for more efficient fuzzing and precise coverage data\n");
-    }
-    *P = NumGuards % kNumPCs;
-  }
-  Modules[NumModules].Start = Start;
-  Modules[NumModules].Stop = Stop;
-  NumModules++;
-}
-
-void TracePC::PrintModuleInfo() {
-  Printf("INFO: Loaded %zd modules (%zd guards): ", NumModules, NumGuards);
-  for (size_t i = 0; i < NumModules; i++)
-    Printf("[%p, %p), ", Modules[i].Start, Modules[i].Stop);
-  Printf("\n");
-  if (NumModulesWithInline8bitCounters) {
-    Printf("INFO: Loaded %zd modules with %zd inline 8-bit counters\n",
-           NumModulesWithInline8bitCounters, NumInline8bitCounters);
-    for (size_t i = 0; i < NumModulesWithInline8bitCounters; i++)
-      Printf("[%p, %p), ", ModuleCounters[i].Start, ModuleCounters[i].Stop);
-    Printf("\n");
-  }
-}
-
-ATTRIBUTE_NO_SANITIZE_ALL
-void TracePC::HandleCallerCallee(uintptr_t Caller, uintptr_t Callee) {
-  const uintptr_t kBits = 12;
-  const uintptr_t kMask = (1 << kBits) - 1;
-  uintptr_t Idx = (Caller & kMask) | ((Callee & kMask) << kBits);
-  ValueProfileMap.AddValueModPrime(Idx);
-}
-
-void TracePC::InitializePrintNewPCs() {
-  if (!DoPrintNewPCs) return;
-  assert(!PrintedPCs);
-  PrintedPCs = new std::set<uintptr_t>;
-  for (size_t i = 1; i < GetNumPCs(); i++)
-    if (PCs()[i])
-      PrintedPCs->insert(PCs()[i]);
-}
-
-void TracePC::PrintNewPCs() {
-  if (!DoPrintNewPCs) return;
-  assert(PrintedPCs);
-  for (size_t i = 1; i < GetNumPCs(); i++)
-    if (PCs()[i] && PrintedPCs->insert(PCs()[i]).second)
-      PrintPC("\tNEW_PC: %p %F %L\n", "\tNEW_PC: %p\n", PCs()[i]);
-}
-
-void TracePC::PrintCoverage() {
-  if (!EF->__sanitizer_symbolize_pc ||
-      !EF->__sanitizer_get_module_and_offset_for_pc) {
-    Printf("INFO: __sanitizer_symbolize_pc or "
-           "__sanitizer_get_module_and_offset_for_pc is not available,"
-           " not printing coverage\n");
-    return;
-  }
-  std::map<std::string, std::vector<uintptr_t>> CoveredPCsPerModule;
-  std::map<std::string, uintptr_t> ModuleOffsets;
-  std::set<std::string> CoveredDirs, CoveredFiles, CoveredFunctions,
-      CoveredLines;
-  Printf("COVERAGE:\n");
-  for (size_t i = 1; i < GetNumPCs(); i++) {
-    uintptr_t PC = PCs()[i];
-    if (!PC) continue;
-    std::string FileStr = DescribePC("%s", PC);
-    if (!IsInterestingCoverageFile(FileStr)) continue;
-    std::string FixedPCStr = DescribePC("%p", PC);
-    std::string FunctionStr = DescribePC("%F", PC);
-    std::string LineStr = DescribePC("%l", PC);
-    char ModulePathRaw[4096] = "";  // What's PATH_MAX in portable C++?
-    void *OffsetRaw = nullptr;
-    if (!EF->__sanitizer_get_module_and_offset_for_pc(
-            reinterpret_cast<void *>(PC), ModulePathRaw,
-            sizeof(ModulePathRaw), &OffsetRaw))
-      continue;
-    std::string Module = ModulePathRaw;
-    uintptr_t FixedPC = std::stoull(FixedPCStr, 0, 16);
-    uintptr_t PcOffset = reinterpret_cast<uintptr_t>(OffsetRaw);
-    ModuleOffsets[Module] = FixedPC - PcOffset;
-    CoveredPCsPerModule[Module].push_back(PcOffset);
-    CoveredFunctions.insert(FunctionStr);
-    CoveredFiles.insert(FileStr);
-    CoveredDirs.insert(DirName(FileStr));
-    if (!CoveredLines.insert(FileStr + ":" + LineStr).second)
-      continue;
-    Printf("COVERED: %s %s:%s\n", FunctionStr.c_str(),
-           FileStr.c_str(), LineStr.c_str());
-  }
-
-  std::string CoveredDirsStr;
-  for (auto &Dir : CoveredDirs) {
-    if (!CoveredDirsStr.empty())
-      CoveredDirsStr += ",";
-    CoveredDirsStr += Dir;
-  }
-  Printf("COVERED_DIRS: %s\n", CoveredDirsStr.c_str());
-
-  for (auto &M : CoveredPCsPerModule) {
-    std::set<std::string> UncoveredFiles, UncoveredFunctions;
-    std::map<std::string, std::set<int> > UncoveredLines;  // Func+File => lines
-    auto &ModuleName = M.first;
-    auto &CoveredOffsets = M.second;
-    uintptr_t ModuleOffset = ModuleOffsets[ModuleName];
-    std::sort(CoveredOffsets.begin(), CoveredOffsets.end());
-    Printf("MODULE_WITH_COVERAGE: %s\n", ModuleName.c_str());
-    // sancov does not yet fully support DSOs.
-    // std::string Cmd = "sancov -print-coverage-pcs " + ModuleName;
-    std::string Cmd = DisassembleCmd(ModuleName) + " | " +
-        SearchRegexCmd("call.*__sanitizer_cov_trace_pc_guard");
-    std::string SanCovOutput;
-    if (!ExecuteCommandAndReadOutput(Cmd, &SanCovOutput)) {
-      Printf("INFO: Command failed: %s\n", Cmd.c_str());
-      continue;
-    }
-    std::istringstream ISS(SanCovOutput);
-    std::string S;
-    while (std::getline(ISS, S, '\n')) {
-      size_t PcOffsetEnd = S.find(':');
-      if (PcOffsetEnd == std::string::npos)
-        continue;
-      S.resize(PcOffsetEnd);
-      uintptr_t PcOffset = std::stoull(S, 0, 16);
-      if (!std::binary_search(CoveredOffsets.begin(), CoveredOffsets.end(),
-                              PcOffset)) {
-        uintptr_t PC = ModuleOffset + PcOffset;
-        auto FileStr = DescribePC("%s", PC);
-        if (!IsInterestingCoverageFile(FileStr)) continue;
-        if (CoveredFiles.count(FileStr) == 0) {
-          UncoveredFiles.insert(FileStr);
-          continue;
-        }
-        auto FunctionStr = DescribePC("%F", PC);
-        if (CoveredFunctions.count(FunctionStr) == 0) {
-          UncoveredFunctions.insert(FunctionStr);
-          continue;
-        }
-        std::string LineStr = DescribePC("%l", PC);
-        uintptr_t Line = std::stoi(LineStr);
-        std::string FileLineStr = FileStr + ":" + LineStr;
-        if (CoveredLines.count(FileLineStr) == 0)
-          UncoveredLines[FunctionStr + " " + FileStr].insert(Line);
-      }
-    }
-    for (auto &FileLine: UncoveredLines)
-      for (int Line : FileLine.second)
-        Printf("UNCOVERED_LINE: %s:%d\n", FileLine.first.c_str(), Line);
-    for (auto &Func : UncoveredFunctions)
-      Printf("UNCOVERED_FUNC: %s\n", Func.c_str());
-    for (auto &File : UncoveredFiles)
-      Printf("UNCOVERED_FILE: %s\n", File.c_str());
-  }
-}
-
-inline ALWAYS_INLINE uintptr_t GetPreviousInstructionPc(uintptr_t PC) {
-  // TODO: this implementation is x86 only.
-  // see sanitizer_common GetPreviousInstructionPc for full implementation.
-  return PC - 1;
-}
-
-void TracePC::DumpCoverage() {
-  if (EF->__sanitizer_dump_coverage) {
-    std::vector<uintptr_t> PCsCopy(GetNumPCs());
-    for (size_t i = 0; i < GetNumPCs(); i++)
-      PCsCopy[i] = PCs()[i] ? GetPreviousInstructionPc(PCs()[i]) : 0;
-    EF->__sanitizer_dump_coverage(PCsCopy.data(), PCsCopy.size());
-  }
-}
-
-// Value profile.
-// We keep track of various values that affect control flow.
-// These values are inserted into a bit-set-based hash map.
-// Every new bit in the map is treated as a new coverage.
-//
-// For memcmp/strcmp/etc the interesting value is the length of the common
-// prefix of the parameters.
-// For cmp instructions the interesting value is a XOR of the parameters.
-// The interesting value is mixed up with the PC and is then added to the map.
-
-ATTRIBUTE_NO_SANITIZE_ALL
-void TracePC::AddValueForMemcmp(void *caller_pc, const void *s1, const void *s2,
-                                size_t n, bool StopAtZero) {
-  if (!n) return;
-  size_t Len = std::min(n, Word::GetMaxSize());
-  const uint8_t *A1 = reinterpret_cast<const uint8_t *>(s1);
-  const uint8_t *A2 = reinterpret_cast<const uint8_t *>(s2);
-  uint8_t B1[Word::kMaxSize];
-  uint8_t B2[Word::kMaxSize];
-  // Copy the data into locals in this non-msan-instrumented function
-  // to avoid msan complaining further.
-  size_t Hash = 0;  // Compute some simple hash of both strings.
-  for (size_t i = 0; i < Len; i++) {
-    B1[i] = A1[i];
-    B2[i] = A2[i];
-    size_t T = B1[i];
-    Hash ^= (T << 8) | B2[i];
-  }
-  size_t I = 0;
-  for (; I < Len; I++)
-    if (B1[I] != B2[I] || (StopAtZero && B1[I] == 0))
-      break;
-  size_t PC = reinterpret_cast<size_t>(caller_pc);
-  size_t Idx = (PC & 4095) | (I << 12);
-  ValueProfileMap.AddValue(Idx);
-  TORCW.Insert(Idx ^ Hash, Word(B1, Len), Word(B2, Len));
-}
-
-template <class T>
-ATTRIBUTE_TARGET_POPCNT ALWAYS_INLINE
-ATTRIBUTE_NO_SANITIZE_ALL
-void TracePC::HandleCmp(uintptr_t PC, T Arg1, T Arg2) {
-  uint64_t ArgXor = Arg1 ^ Arg2;
-  uint64_t ArgDistance = __builtin_popcountll(ArgXor) + 1; // [1,65]
-  uintptr_t Idx = ((PC & 4095) + 1) * ArgDistance;
-  if (sizeof(T) == 4)
-      TORC4.Insert(ArgXor, Arg1, Arg2);
-  else if (sizeof(T) == 8)
-      TORC8.Insert(ArgXor, Arg1, Arg2);
-  ValueProfileMap.AddValue(Idx);
-}
-
-static size_t InternalStrnlen(const char *S, size_t MaxLen) {
-  size_t Len = 0;
-  for (; Len < MaxLen && S[Len]; Len++) {}
-  return Len;
-}
-
-// Finds min of (strlen(S1), strlen(S2)).
-// Needed bacause one of these strings may actually be non-zero terminated.
-static size_t InternalStrnlen2(const char *S1, const char *S2) {
-  size_t Len = 0;
-  for (; S1[Len] && S2[Len]; Len++)  {}
-  return Len;
-}
-
-} // namespace fuzzer
-
-extern "C" {
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-void __sanitizer_cov_trace_pc_guard(uint32_t *Guard) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  uint32_t Idx = *Guard;
-  __sancov_trace_pc_pcs[Idx] = PC;
-  __sancov_trace_pc_guard_8bit_counters[Idx]++;
-}
-
-// Best-effort support for -fsanitize-coverage=trace-pc, which is available
-// in both Clang and GCC.
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-void __sanitizer_cov_trace_pc() {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  uintptr_t Idx = PC & (((uintptr_t)1 << fuzzer::TracePC::kTracePcBits) - 1);
-  __sancov_trace_pc_pcs[Idx] = PC;
-  __sancov_trace_pc_guard_8bit_counters[Idx]++;
-}
-
-ATTRIBUTE_INTERFACE
-void __sanitizer_cov_trace_pc_guard_init(uint32_t *Start, uint32_t *Stop) {
-  fuzzer::TPC.HandleInit(Start, Stop);
-}
-
-ATTRIBUTE_INTERFACE
-void __sanitizer_cov_8bit_counters_init(uint8_t *Start, uint8_t *Stop) {
-  fuzzer::TPC.HandleInline8bitCountersInit(Start, Stop);
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-void __sanitizer_cov_trace_pc_indir(uintptr_t Callee) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  fuzzer::TPC.HandleCallerCallee(PC, Callee);
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-ATTRIBUTE_TARGET_POPCNT
-void __sanitizer_cov_trace_cmp8(uint64_t Arg1, uint64_t Arg2) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  fuzzer::TPC.HandleCmp(PC, Arg1, Arg2);
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-ATTRIBUTE_TARGET_POPCNT
-void __sanitizer_cov_trace_cmp4(uint32_t Arg1, uint32_t Arg2) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  fuzzer::TPC.HandleCmp(PC, Arg1, Arg2);
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-ATTRIBUTE_TARGET_POPCNT
-void __sanitizer_cov_trace_cmp2(uint16_t Arg1, uint16_t Arg2) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  fuzzer::TPC.HandleCmp(PC, Arg1, Arg2);
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-ATTRIBUTE_TARGET_POPCNT
-void __sanitizer_cov_trace_cmp1(uint8_t Arg1, uint8_t Arg2) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  fuzzer::TPC.HandleCmp(PC, Arg1, Arg2);
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-ATTRIBUTE_TARGET_POPCNT
-void __sanitizer_cov_trace_switch(uint64_t Val, uint64_t *Cases) {
-  uint64_t N = Cases[0];
-  uint64_t ValSizeInBits = Cases[1];
-  uint64_t *Vals = Cases + 2;
-  // Skip the most common and the most boring case.
-  if (Vals[N - 1]  < 256 && Val < 256)
-    return;
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  size_t i;
-  uint64_t Token = 0;
-  for (i = 0; i < N; i++) {
-    Token = Val ^ Vals[i];
-    if (Val < Vals[i])
-      break;
-  }
-
-  if (ValSizeInBits == 16)
-    fuzzer::TPC.HandleCmp(PC + i, static_cast<uint16_t>(Token), (uint16_t)(0));
-  else if (ValSizeInBits == 32)
-    fuzzer::TPC.HandleCmp(PC + i, static_cast<uint32_t>(Token), (uint32_t)(0));
-  else
-    fuzzer::TPC.HandleCmp(PC + i, Token, (uint64_t)(0));
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-ATTRIBUTE_TARGET_POPCNT
-void __sanitizer_cov_trace_div4(uint32_t Val) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  fuzzer::TPC.HandleCmp(PC, Val, (uint32_t)0);
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-ATTRIBUTE_TARGET_POPCNT
-void __sanitizer_cov_trace_div8(uint64_t Val) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  fuzzer::TPC.HandleCmp(PC, Val, (uint64_t)0);
-}
-
-ATTRIBUTE_INTERFACE
-ATTRIBUTE_NO_SANITIZE_ALL
-ATTRIBUTE_TARGET_POPCNT
-void __sanitizer_cov_trace_gep(uintptr_t Idx) {
-  uintptr_t PC = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
-  fuzzer::TPC.HandleCmp(PC, Idx, (uintptr_t)0);
-}
-
-ATTRIBUTE_INTERFACE ATTRIBUTE_NO_SANITIZE_MEMORY
-void __sanitizer_weak_hook_memcmp(void *caller_pc, const void *s1,
-                                  const void *s2, size_t n, int result) {
-  if (fuzzer::ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr) return;
-  if (result == 0) return;  // No reason to mutate.
-  if (n <= 1) return;  // Not interesting.
-  fuzzer::TPC.AddValueForMemcmp(caller_pc, s1, s2, n, /*StopAtZero*/false);
-}
-
-ATTRIBUTE_INTERFACE ATTRIBUTE_NO_SANITIZE_MEMORY
-void __sanitizer_weak_hook_strncmp(void *caller_pc, const char *s1,
-                                   const char *s2, size_t n, int result) {
-  if (fuzzer::ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr) return;
-  if (result == 0) return;  // No reason to mutate.
-  size_t Len1 = fuzzer::InternalStrnlen(s1, n);
-  size_t Len2 = fuzzer::InternalStrnlen(s2, n);
-  n = std::min(n, Len1);
-  n = std::min(n, Len2);
-  if (n <= 1) return;  // Not interesting.
-  fuzzer::TPC.AddValueForMemcmp(caller_pc, s1, s2, n, /*StopAtZero*/true);
-}
-
-ATTRIBUTE_INTERFACE ATTRIBUTE_NO_SANITIZE_MEMORY
-void __sanitizer_weak_hook_strcmp(void *caller_pc, const char *s1,
-                                   const char *s2, int result) {
-  if (fuzzer::ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr) return;
-  if (result == 0) return;  // No reason to mutate.
-  size_t N = fuzzer::InternalStrnlen2(s1, s2);
-  if (N <= 1) return;  // Not interesting.
-  fuzzer::TPC.AddValueForMemcmp(caller_pc, s1, s2, N, /*StopAtZero*/true);
-}
-
-ATTRIBUTE_INTERFACE ATTRIBUTE_NO_SANITIZE_MEMORY
-void __sanitizer_weak_hook_strncasecmp(void *called_pc, const char *s1,
-                                       const char *s2, size_t n, int result) {
-  if (fuzzer::ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr) return;
-  return __sanitizer_weak_hook_strncmp(called_pc, s1, s2, n, result);
-}
-
-ATTRIBUTE_INTERFACE ATTRIBUTE_NO_SANITIZE_MEMORY
-void __sanitizer_weak_hook_strcasecmp(void *called_pc, const char *s1,
-                                      const char *s2, int result) {
-  if (fuzzer::ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr) return;
-  return __sanitizer_weak_hook_strcmp(called_pc, s1, s2, result);
-}
-
-ATTRIBUTE_INTERFACE ATTRIBUTE_NO_SANITIZE_MEMORY
-void __sanitizer_weak_hook_strstr(void *called_pc, const char *s1,
-                                  const char *s2, char *result) {
-  if (fuzzer::ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr) return;
-  fuzzer::TPC.MMT.Add(reinterpret_cast<const uint8_t *>(s2), strlen(s2));
-}
-
-ATTRIBUTE_INTERFACE ATTRIBUTE_NO_SANITIZE_MEMORY
-void __sanitizer_weak_hook_strcasestr(void *called_pc, const char *s1,
-                                      const char *s2, char *result) {
-  if (fuzzer::ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr) return;
-  fuzzer::TPC.MMT.Add(reinterpret_cast<const uint8_t *>(s2), strlen(s2));
-}
-
-ATTRIBUTE_INTERFACE ATTRIBUTE_NO_SANITIZE_MEMORY
-void __sanitizer_weak_hook_memmem(void *called_pc, const void *s1, size_t len1,
-                                  const void *s2, size_t len2, void *result) {
-  if (fuzzer::ScopedDoingMyOwnMemOrStr::DoingMyOwnMemOrStr) return;
-  fuzzer::TPC.MMT.Add(reinterpret_cast<const uint8_t *>(s2), len2);
-}
-}  // extern "C"
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerTracePC.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerTracePC.h
deleted file mode 100644
index b36c4f54306c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerTracePC.h
+++ /dev/null
@@ -1,210 +0,0 @@
-//===- FuzzerTracePC.h - Internal header for the Fuzzer ---------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// fuzzer::TracePC
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_TRACE_PC
-#define LLVM_FUZZER_TRACE_PC
-
-#include "FuzzerDefs.h"
-#include "FuzzerDictionary.h"
-#include "FuzzerValueBitMap.h"
-
-#include <set>
-
-namespace fuzzer {
-
-// TableOfRecentCompares (TORC) remembers the most recently performed
-// comparisons of type T.
-// We record the arguments of CMP instructions in this table unconditionally
-// because it seems cheaper this way than to compute some expensive
-// conditions inside __sanitizer_cov_trace_cmp*.
-// After the unit has been executed we may decide to use the contents of
-// this table to populate a Dictionary.
-template<class T, size_t kSizeT>
-struct TableOfRecentCompares {
-  static const size_t kSize = kSizeT;
-  struct Pair {
-    T A, B;
-  };
-  ATTRIBUTE_NO_SANITIZE_ALL
-  void Insert(size_t Idx, const T &Arg1, const T &Arg2) {
-    Idx = Idx % kSize;
-    Table[Idx].A = Arg1;
-    Table[Idx].B = Arg2;
-  }
-
-  Pair Get(size_t I) { return Table[I % kSize]; }
-
-  Pair Table[kSize];
-};
-
-template <size_t kSizeT>
-struct MemMemTable {
-  static const size_t kSize = kSizeT;
-  Word MemMemWords[kSize];
-  Word EmptyWord;
-
-  void Add(const uint8_t *Data, size_t Size) {
-    if (Size <= 2) return;
-    Size = std::min(Size, Word::GetMaxSize());
-    size_t Idx = SimpleFastHash(Data, Size) % kSize;
-    MemMemWords[Idx].Set(Data, Size);
-  }
-  const Word &Get(size_t Idx) {
-    for (size_t i = 0; i < kSize; i++) {
-      const Word &W = MemMemWords[(Idx + i) % kSize];
-      if (W.size()) return W;
-    }
-    EmptyWord.Set(nullptr, 0);
-    return EmptyWord;
-  }
-};
-
-class TracePC {
- public:
-  static const size_t kNumPCs = 1 << 21;
-  // How many bits of PC are used from __sanitizer_cov_trace_pc.
-  static const size_t kTracePcBits = 18;
-
-  void HandleInit(uint32_t *Start, uint32_t *Stop);
-  void HandleInline8bitCountersInit(uint8_t *Start, uint8_t *Stop);
-  void HandleCallerCallee(uintptr_t Caller, uintptr_t Callee);
-  template <class T> void HandleCmp(uintptr_t PC, T Arg1, T Arg2);
-  size_t GetTotalPCCoverage();
-  void SetUseCounters(bool UC) { UseCounters = UC; }
-  void SetUseValueProfile(bool VP) { UseValueProfile = VP; }
-  void SetPrintNewPCs(bool P) { DoPrintNewPCs = P; }
-  template <class Callback> void CollectFeatures(Callback CB) const;
-
-  void ResetMaps() {
-    ValueProfileMap.Reset();
-    memset(Counters(), 0, GetNumPCs());
-    ClearExtraCounters();
-  }
-
-  void UpdateFeatureSet(size_t CurrentElementIdx, size_t CurrentElementSize);
-  void PrintFeatureSet();
-
-  void PrintModuleInfo();
-
-  void PrintCoverage();
-  void DumpCoverage();
-
-  void AddValueForMemcmp(void *caller_pc, const void *s1, const void *s2,
-                         size_t n, bool StopAtZero);
-
-  TableOfRecentCompares<uint32_t, 32> TORC4;
-  TableOfRecentCompares<uint64_t, 32> TORC8;
-  TableOfRecentCompares<Word, 32> TORCW;
-  MemMemTable<1024> MMT;
-
-  void PrintNewPCs();
-  void InitializePrintNewPCs();
-  size_t GetNumPCs() const {
-    return NumGuards == 0 ? (1 << kTracePcBits) : Min(kNumPCs, NumGuards + 1);
-  }
-  uintptr_t GetPC(size_t Idx) {
-    assert(Idx < GetNumPCs());
-    return PCs()[Idx];
-  }
-
-private:
-  bool UseCounters = false;
-  bool UseValueProfile = false;
-  bool DoPrintNewPCs = false;
-
-  struct Module {
-    uint32_t *Start, *Stop;
-  };
-
-  Module Modules[4096];
-  size_t NumModules;  // linker-initialized.
-  size_t NumGuards;  // linker-initialized.
-
-  struct { uint8_t *Start, *Stop; } ModuleCounters[4096];
-  size_t NumModulesWithInline8bitCounters;  // linker-initialized.
-  size_t NumInline8bitCounters;
-
-  uint8_t *Counters() const;
-  uintptr_t *PCs() const;
-
-  std::set<uintptr_t> *PrintedPCs;
-
-  ValueBitMap ValueProfileMap;
-};
-
-template <class Callback> // void Callback(size_t Idx, uint8_t Value);
-ATTRIBUTE_NO_SANITIZE_ALL
-void ForEachNonZeroByte(const uint8_t *Begin, const uint8_t *End,
-                        size_t FirstFeature, Callback Handle8bitCounter) {
-  typedef uintptr_t LargeType;
-  const size_t Step = sizeof(LargeType) / sizeof(uint8_t);
-  const size_t StepMask = Step - 1;
-  auto P = Begin;
-  // Iterate by 1 byte until either the alignment boundary or the end.
-  for (; reinterpret_cast<uintptr_t>(P) & StepMask && P < End; P++)
-    if (uint8_t V = *P)
-      Handle8bitCounter(FirstFeature + P - Begin, V);
-
-  // Iterate by Step bytes at a time.
-  for (; P < End; P += Step)
-    if (LargeType Bundle = *reinterpret_cast<const LargeType *>(P))
-      for (size_t I = 0; I < Step; I++, Bundle >>= 8)
-        if (uint8_t V = Bundle & 0xff)
-          Handle8bitCounter(FirstFeature + P - Begin + I, V);
-
-  // Iterate by 1 byte until the end.
-  for (; P < End; P++)
-    if (uint8_t V = *P)
-      Handle8bitCounter(FirstFeature + P - Begin, V);
-}
-
-template <class Callback>  // bool Callback(size_t Feature)
-ATTRIBUTE_NO_SANITIZE_ALL
-__attribute__((noinline))
-void TracePC::CollectFeatures(Callback HandleFeature) const {
-  uint8_t *Counters = this->Counters();
-  size_t N = GetNumPCs();
-  auto Handle8bitCounter = [&](size_t Idx, uint8_t Counter) {
-    assert(Counter);
-    unsigned Bit = 0;
-    /**/ if (Counter >= 128) Bit = 7;
-    else if (Counter >= 32) Bit = 6;
-    else if (Counter >= 16) Bit = 5;
-    else if (Counter >= 8) Bit = 4;
-    else if (Counter >= 4) Bit = 3;
-    else if (Counter >= 3) Bit = 2;
-    else if (Counter >= 2) Bit = 1;
-    HandleFeature(Idx * 8 + Bit);
-  };
-
-  size_t FirstFeature = 0;
-  ForEachNonZeroByte(Counters, Counters + N, FirstFeature, Handle8bitCounter);
-  FirstFeature += N * 8;
-  for (size_t i = 0; i < NumModulesWithInline8bitCounters; i++) {
-    ForEachNonZeroByte(ModuleCounters[i].Start, ModuleCounters[i].Stop,
-                       FirstFeature, Handle8bitCounter);
-    FirstFeature += 8 * (ModuleCounters[i].Stop - ModuleCounters[i].Start);
-  }
-
-  ForEachNonZeroByte(ExtraCountersBegin(), ExtraCountersEnd(), FirstFeature,
-                     Handle8bitCounter);
-
-  if (UseValueProfile)
-    ValueProfileMap.ForEach([&](size_t Idx) {
-      HandleFeature(N * 8 + Idx);
-    });
-}
-
-extern TracePC TPC;
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_TRACE_PC
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtil.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtil.cpp
deleted file mode 100644
index 2d95f40e46a1..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtil.cpp
+++ /dev/null
@@ -1,225 +0,0 @@
-//===- FuzzerUtil.cpp - Misc utils ----------------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Misc utils.
-//===----------------------------------------------------------------------===//
-
-#include "FuzzerUtil.h"
-#include "FuzzerIO.h"
-#include "FuzzerInternal.h"
-#include <cassert>
-#include <chrono>
-#include <cstring>
-#include <errno.h>
-#include <signal.h>
-#include <sstream>
-#include <stdio.h>
-#include <sys/types.h>
-#include <thread>
-
-namespace fuzzer {
-
-void PrintHexArray(const uint8_t *Data, size_t Size,
-                   const char *PrintAfter) {
-  for (size_t i = 0; i < Size; i++)
-    Printf("0x%x,", (unsigned)Data[i]);
-  Printf("%s", PrintAfter);
-}
-
-void Print(const Unit &v, const char *PrintAfter) {
-  PrintHexArray(v.data(), v.size(), PrintAfter);
-}
-
-void PrintASCIIByte(uint8_t Byte) {
-  if (Byte == '\\')
-    Printf("\\\\");
-  else if (Byte == '"')
-    Printf("\\\"");
-  else if (Byte >= 32 && Byte < 127)
-    Printf("%c", Byte);
-  else
-    Printf("\\x%02x", Byte);
-}
-
-void PrintASCII(const uint8_t *Data, size_t Size, const char *PrintAfter) {
-  for (size_t i = 0; i < Size; i++)
-    PrintASCIIByte(Data[i]);
-  Printf("%s", PrintAfter);
-}
-
-void PrintASCII(const Unit &U, const char *PrintAfter) {
-  PrintASCII(U.data(), U.size(), PrintAfter);
-}
-
-bool ToASCII(uint8_t *Data, size_t Size) {
-  bool Changed = false;
-  for (size_t i = 0; i < Size; i++) {
-    uint8_t &X = Data[i];
-    auto NewX = X;
-    NewX &= 127;
-    if (!isspace(NewX) && !isprint(NewX))
-      NewX = ' ';
-    Changed |= NewX != X;
-    X = NewX;
-  }
-  return Changed;
-}
-
-bool IsASCII(const Unit &U) { return IsASCII(U.data(), U.size()); }
-
-bool IsASCII(const uint8_t *Data, size_t Size) {
-  for (size_t i = 0; i < Size; i++)
-    if (!(isprint(Data[i]) || isspace(Data[i]))) return false;
-  return true;
-}
-
-bool ParseOneDictionaryEntry(const std::string &Str, Unit *U) {
-  U->clear();
-  if (Str.empty()) return false;
-  size_t L = 0, R = Str.size() - 1;  // We are parsing the range [L,R].
-  // Skip spaces from both sides.
-  while (L < R && isspace(Str[L])) L++;
-  while (R > L && isspace(Str[R])) R--;
-  if (R - L < 2) return false;
-  // Check the closing "
-  if (Str[R] != '"') return false;
-  R--;
-  // Find the opening "
-  while (L < R && Str[L] != '"') L++;
-  if (L >= R) return false;
-  assert(Str[L] == '\"');
-  L++;
-  assert(L <= R);
-  for (size_t Pos = L; Pos <= R; Pos++) {
-    uint8_t V = (uint8_t)Str[Pos];
-    if (!isprint(V) && !isspace(V)) return false;
-    if (V =='\\') {
-      // Handle '\\'
-      if (Pos + 1 <= R && (Str[Pos + 1] == '\\' || Str[Pos + 1] == '"')) {
-        U->push_back(Str[Pos + 1]);
-        Pos++;
-        continue;
-      }
-      // Handle '\xAB'
-      if (Pos + 3 <= R && Str[Pos + 1] == 'x'
-           && isxdigit(Str[Pos + 2]) && isxdigit(Str[Pos + 3])) {
-        char Hex[] = "0xAA";
-        Hex[2] = Str[Pos + 2];
-        Hex[3] = Str[Pos + 3];
-        U->push_back(strtol(Hex, nullptr, 16));
-        Pos += 3;
-        continue;
-      }
-      return false;  // Invalid escape.
-    } else {
-      // Any other character.
-      U->push_back(V);
-    }
-  }
-  return true;
-}
-
-bool ParseDictionaryFile(const std::string &Text, std::vector<Unit> *Units) {
-  if (Text.empty()) {
-    Printf("ParseDictionaryFile: file does not exist or is empty\n");
-    return false;
-  }
-  std::istringstream ISS(Text);
-  Units->clear();
-  Unit U;
-  int LineNo = 0;
-  std::string S;
-  while (std::getline(ISS, S, '\n')) {
-    LineNo++;
-    size_t Pos = 0;
-    while (Pos < S.size() && isspace(S[Pos])) Pos++;  // Skip spaces.
-    if (Pos == S.size()) continue;  // Empty line.
-    if (S[Pos] == '#') continue;  // Comment line.
-    if (ParseOneDictionaryEntry(S, &U)) {
-      Units->push_back(U);
-    } else {
-      Printf("ParseDictionaryFile: error in line %d\n\t\t%s\n", LineNo,
-             S.c_str());
-      return false;
-    }
-  }
-  return true;
-}
-
-std::string Base64(const Unit &U) {
-  static const char Table[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
-                              "abcdefghijklmnopqrstuvwxyz"
-                              "0123456789+/";
-  std::string Res;
-  size_t i;
-  for (i = 0; i + 2 < U.size(); i += 3) {
-    uint32_t x = (U[i] << 16) + (U[i + 1] << 8) + U[i + 2];
-    Res += Table[(x >> 18) & 63];
-    Res += Table[(x >> 12) & 63];
-    Res += Table[(x >> 6) & 63];
-    Res += Table[x & 63];
-  }
-  if (i + 1 == U.size()) {
-    uint32_t x = (U[i] << 16);
-    Res += Table[(x >> 18) & 63];
-    Res += Table[(x >> 12) & 63];
-    Res += "==";
-  } else if (i + 2 == U.size()) {
-    uint32_t x = (U[i] << 16) + (U[i + 1] << 8);
-    Res += Table[(x >> 18) & 63];
-    Res += Table[(x >> 12) & 63];
-    Res += Table[(x >> 6) & 63];
-    Res += "=";
-  }
-  return Res;
-}
-
-std::string DescribePC(const char *SymbolizedFMT, uintptr_t PC) {
-  if (!EF->__sanitizer_symbolize_pc) return "<can not symbolize>";
-  char PcDescr[1024];
-  EF->__sanitizer_symbolize_pc(reinterpret_cast<void*>(PC),
-                               SymbolizedFMT, PcDescr, sizeof(PcDescr));
-  PcDescr[sizeof(PcDescr) - 1] = 0;  // Just in case.
-  return PcDescr;
-}
-
-void PrintPC(const char *SymbolizedFMT, const char *FallbackFMT, uintptr_t PC) {
-  if (EF->__sanitizer_symbolize_pc)
-    Printf("%s", DescribePC(SymbolizedFMT, PC).c_str());
-  else
-    Printf(FallbackFMT, PC);
-}
-
-unsigned NumberOfCpuCores() {
-  unsigned N = std::thread::hardware_concurrency();
-  if (!N) {
-    Printf("WARNING: std::thread::hardware_concurrency not well defined for "
-           "your platform. Assuming CPU count of 1.\n");
-    N = 1;
-  }
-  return N;
-}
-
-bool ExecuteCommandAndReadOutput(const std::string &Command, std::string *Out) {
-  FILE *Pipe = OpenProcessPipe(Command.c_str(), "r");
-  if (!Pipe) return false;
-  char Buff[1024];
-  size_t N;
-  while ((N = fread(Buff, 1, sizeof(Buff), Pipe)) > 0)
-    Out->append(Buff, N);
-  return true;
-}
-
-size_t SimpleFastHash(const uint8_t *Data, size_t Size) {
-  size_t Res = 0;
-  for (size_t i = 0; i < Size; i++)
-    Res = Res * 11 + Data[i];
-  return Res;
-}
-
-}  // namespace fuzzer
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtil.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtil.h
deleted file mode 100644
index 62d6e61dcf17..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtil.h
+++ /dev/null
@@ -1,86 +0,0 @@
-//===- FuzzerUtil.h - Internal header for the Fuzzer Utils ------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Util functions.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_UTIL_H
-#define LLVM_FUZZER_UTIL_H
-
-#include "FuzzerDefs.h"
-
-namespace fuzzer {
-
-void PrintHexArray(const Unit &U, const char *PrintAfter = "");
-
-void PrintHexArray(const uint8_t *Data, size_t Size,
-                   const char *PrintAfter = "");
-
-void PrintASCII(const uint8_t *Data, size_t Size, const char *PrintAfter = "");
-
-void PrintASCII(const Unit &U, const char *PrintAfter = "");
-
-// Changes U to contain only ASCII (isprint+isspace) characters.
-// Returns true iff U has been changed.
-bool ToASCII(uint8_t *Data, size_t Size);
-
-bool IsASCII(const Unit &U);
-
-bool IsASCII(const uint8_t *Data, size_t Size);
-
-std::string Base64(const Unit &U);
-
-void PrintPC(const char *SymbolizedFMT, const char *FallbackFMT, uintptr_t PC);
-
-std::string DescribePC(const char *SymbolizedFMT, uintptr_t PC);
-
-unsigned NumberOfCpuCores();
-
-bool ExecuteCommandAndReadOutput(const std::string &Command, std::string *Out);
-
-// Platform specific functions.
-void SetSignalHandler(const FuzzingOptions& Options);
-
-void SleepSeconds(int Seconds);
-
-unsigned long GetPid();
-
-size_t GetPeakRSSMb();
-
-int ExecuteCommand(const std::string &Command);
-
-FILE *OpenProcessPipe(const char *Command, const char *Mode);
-
-const void *SearchMemory(const void *haystack, size_t haystacklen,
-                         const void *needle, size_t needlelen);
-
-std::string CloneArgsWithoutX(const std::vector<std::string> &Args,
-                              const char *X1, const char *X2);
-
-inline std::string CloneArgsWithoutX(const std::vector<std::string> &Args,
-                                     const char *X) {
-  return CloneArgsWithoutX(Args, X, X);
-}
-
-inline std::pair<std::string, std::string> SplitBefore(std::string X,
-                                                       std::string S) {
-  auto Pos = S.find(X);
-  if (Pos == std::string::npos)
-    return std::make_pair(S, "");
-  return std::make_pair(S.substr(0, Pos), S.substr(Pos));
-}
-
-std::string DisassembleCmd(const std::string &FileName);
-
-std::string SearchRegexCmd(const std::string &Regex);
-
-size_t SimpleFastHash(const uint8_t *Data, size_t Size);
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_UTIL_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilDarwin.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilDarwin.cpp
deleted file mode 100644
index 2df4872a9206..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilDarwin.cpp
+++ /dev/null
@@ -1,161 +0,0 @@
-//===- FuzzerUtilDarwin.cpp - Misc utils ----------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Misc utils for Darwin.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_APPLE
-
-#include "FuzzerIO.h"
-#include <mutex>
-#include <signal.h>
-#include <spawn.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/wait.h>
-
-// There is no header for this on macOS so declare here
-extern "C" char **environ;
-
-namespace fuzzer {
-
-static std::mutex SignalMutex;
-// Global variables used to keep track of how signal handling should be
-// restored. They should **not** be accessed without holding `SignalMutex`.
-static int ActiveThreadCount = 0;
-static struct sigaction OldSigIntAction;
-static struct sigaction OldSigQuitAction;
-static sigset_t OldBlockedSignalsSet;
-
-// This is a reimplementation of Libc's `system()`. On Darwin the Libc
-// implementation contains a mutex which prevents it from being used
-// concurrently. This implementation **can** be used concurrently. It sets the
-// signal handlers when the first thread enters and restores them when the last
-// thread finishes execution of the function and ensures this is not racey by
-// using a mutex.
-int ExecuteCommand(const std::string &Command) {
-  posix_spawnattr_t SpawnAttributes;
-  if (posix_spawnattr_init(&SpawnAttributes))
-    return -1;
-  // Block and ignore signals of the current process when the first thread
-  // enters.
-  {
-    std::lock_guard<std::mutex> Lock(SignalMutex);
-    if (ActiveThreadCount == 0) {
-      static struct sigaction IgnoreSignalAction;
-      sigset_t BlockedSignalsSet;
-      memset(&IgnoreSignalAction, 0, sizeof(IgnoreSignalAction));
-      IgnoreSignalAction.sa_handler = SIG_IGN;
-
-      if (sigaction(SIGINT, &IgnoreSignalAction, &OldSigIntAction) == -1) {
-        Printf("Failed to ignore SIGINT\n");
-        (void)posix_spawnattr_destroy(&SpawnAttributes);
-        return -1;
-      }
-      if (sigaction(SIGQUIT, &IgnoreSignalAction, &OldSigQuitAction) == -1) {
-        Printf("Failed to ignore SIGQUIT\n");
-        // Try our best to restore the signal handlers.
-        (void)sigaction(SIGINT, &OldSigIntAction, NULL);
-        (void)posix_spawnattr_destroy(&SpawnAttributes);
-        return -1;
-      }
-
-      (void)sigemptyset(&BlockedSignalsSet);
-      (void)sigaddset(&BlockedSignalsSet, SIGCHLD);
-      if (sigprocmask(SIG_BLOCK, &BlockedSignalsSet, &OldBlockedSignalsSet) ==
-          -1) {
-        Printf("Failed to block SIGCHLD\n");
-        // Try our best to restore the signal handlers.
-        (void)sigaction(SIGQUIT, &OldSigQuitAction, NULL);
-        (void)sigaction(SIGINT, &OldSigIntAction, NULL);
-        (void)posix_spawnattr_destroy(&SpawnAttributes);
-        return -1;
-      }
-    }
-    ++ActiveThreadCount;
-  }
-
-  // NOTE: Do not introduce any new `return` statements past this
-  // point. It is important that `ActiveThreadCount` always be decremented
-  // when leaving this function.
-
-  // Make sure the child process uses the default handlers for the
-  // following signals rather than inheriting what the parent has.
-  sigset_t DefaultSigSet;
-  (void)sigemptyset(&DefaultSigSet);
-  (void)sigaddset(&DefaultSigSet, SIGQUIT);
-  (void)sigaddset(&DefaultSigSet, SIGINT);
-  (void)posix_spawnattr_setsigdefault(&SpawnAttributes, &DefaultSigSet);
-  // Make sure the child process doesn't block SIGCHLD
-  (void)posix_spawnattr_setsigmask(&SpawnAttributes, &OldBlockedSignalsSet);
-  short SpawnFlags = POSIX_SPAWN_SETSIGDEF | POSIX_SPAWN_SETSIGMASK;
-  (void)posix_spawnattr_setflags(&SpawnAttributes, SpawnFlags);
-
-  pid_t Pid;
-  char **Environ = environ; // Read from global
-  const char *CommandCStr = Command.c_str();
-  char *const Argv[] = {
-    strdup("sh"),
-    strdup("-c"),
-    strdup(CommandCStr),
-    NULL
-  };
-  int ErrorCode = 0, ProcessStatus = 0;
-  // FIXME: We probably shouldn't hardcode the shell path.
-  ErrorCode = posix_spawn(&Pid, "/bin/sh", NULL, &SpawnAttributes,
-                          Argv, Environ);
-  (void)posix_spawnattr_destroy(&SpawnAttributes);
-  if (!ErrorCode) {
-    pid_t SavedPid = Pid;
-    do {
-      // Repeat until call completes uninterrupted.
-      Pid = waitpid(SavedPid, &ProcessStatus, /*options=*/0);
-    } while (Pid == -1 && errno == EINTR);
-    if (Pid == -1) {
-      // Fail for some other reason.
-      ProcessStatus = -1;
-    }
-  } else if (ErrorCode == ENOMEM || ErrorCode == EAGAIN) {
-    // Fork failure.
-    ProcessStatus = -1;
-  } else {
-    // Shell execution failure.
-    ProcessStatus = W_EXITCODE(127, 0);
-  }
-  for (unsigned i = 0, n = sizeof(Argv) / sizeof(Argv[0]); i < n; ++i)
-    free(Argv[i]);
-
-  // Restore the signal handlers of the current process when the last thread
-  // using this function finishes.
-  {
-    std::lock_guard<std::mutex> Lock(SignalMutex);
-    --ActiveThreadCount;
-    if (ActiveThreadCount == 0) {
-      bool FailedRestore = false;
-      if (sigaction(SIGINT, &OldSigIntAction, NULL) == -1) {
-        Printf("Failed to restore SIGINT handling\n");
-        FailedRestore = true;
-      }
-      if (sigaction(SIGQUIT, &OldSigQuitAction, NULL) == -1) {
-        Printf("Failed to restore SIGQUIT handling\n");
-        FailedRestore = true;
-      }
-      if (sigprocmask(SIG_BLOCK, &OldBlockedSignalsSet, NULL) == -1) {
-        Printf("Failed to unblock SIGCHLD\n");
-        FailedRestore = true;
-      }
-      if (FailedRestore)
-        ProcessStatus = -1;
-    }
-  }
-  return ProcessStatus;
-}
-
-} // namespace fuzzer
-
-#endif // LIBFUZZER_APPLE
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilLinux.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilLinux.cpp
deleted file mode 100644
index dfe7e6f4e18a..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilLinux.cpp
+++ /dev/null
@@ -1,24 +0,0 @@
-//===- FuzzerUtilLinux.cpp - Misc utils for Linux. ------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Misc utils for Linux.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_LINUX
-
-#include <stdlib.h>
-
-namespace fuzzer {
-
-int ExecuteCommand(const std::string &Command) {
-  return system(Command.c_str());
-}
-
-} // namespace fuzzer
-
-#endif // LIBFUZZER_LINUX
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilPosix.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilPosix.cpp
deleted file mode 100644
index bc85264ac187..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilPosix.cpp
+++ /dev/null
@@ -1,144 +0,0 @@
-//===- FuzzerUtilPosix.cpp - Misc utils for Posix. ------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Misc utils implementation using Posix API.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_POSIX
-#include "FuzzerIO.h"
-#include "FuzzerInternal.h"
-#include <cassert>
-#include <chrono>
-#include <cstring>
-#include <errno.h>
-#include <iomanip>
-#include <signal.h>
-#include <sstream>
-#include <stdio.h>
-#include <sys/resource.h>
-#include <sys/syscall.h>
-#include <sys/time.h>
-#include <sys/types.h>
-#include <thread>
-#include <unistd.h>
-
-namespace fuzzer {
-
-static void AlarmHandler(int, siginfo_t *, void *) {
-  Fuzzer::StaticAlarmCallback();
-}
-
-static void CrashHandler(int, siginfo_t *, void *) {
-  Fuzzer::StaticCrashSignalCallback();
-}
-
-static void InterruptHandler(int, siginfo_t *, void *) {
-  Fuzzer::StaticInterruptCallback();
-}
-
-static void FileSizeExceedHandler(int, siginfo_t *, void *) {
-  Fuzzer::StaticFileSizeExceedCallback();
-}
-
-static void SetSigaction(int signum,
-                         void (*callback)(int, siginfo_t *, void *)) {
-  struct sigaction sigact = {};
-  if (sigaction(signum, nullptr, &sigact)) {
-    Printf("libFuzzer: sigaction failed with %d\n", errno);
-    exit(1);
-  }
-  if (sigact.sa_flags & SA_SIGINFO) {
-    if (sigact.sa_sigaction)
-      return;
-  } else {
-    if (sigact.sa_handler != SIG_DFL && sigact.sa_handler != SIG_IGN &&
-        sigact.sa_handler != SIG_ERR)
-      return;
-  }
-
-  sigact = {};
-  sigact.sa_sigaction = callback;
-  if (sigaction(signum, &sigact, 0)) {
-    Printf("libFuzzer: sigaction failed with %d\n", errno);
-    exit(1);
-  }
-}
-
-void SetTimer(int Seconds) {
-  struct itimerval T {
-    {Seconds, 0}, { Seconds, 0 }
-  };
-  if (setitimer(ITIMER_REAL, &T, nullptr)) {
-    Printf("libFuzzer: setitimer failed with %d\n", errno);
-    exit(1);
-  }
-  SetSigaction(SIGALRM, AlarmHandler);
-}
-
-void SetSignalHandler(const FuzzingOptions& Options) {
-  if (Options.UnitTimeoutSec > 0)
-    SetTimer(Options.UnitTimeoutSec / 2 + 1);
-  if (Options.HandleInt)
-    SetSigaction(SIGINT, InterruptHandler);
-  if (Options.HandleTerm)
-    SetSigaction(SIGTERM, InterruptHandler);
-  if (Options.HandleSegv)
-    SetSigaction(SIGSEGV, CrashHandler);
-  if (Options.HandleBus)
-    SetSigaction(SIGBUS, CrashHandler);
-  if (Options.HandleAbrt)
-    SetSigaction(SIGABRT, CrashHandler);
-  if (Options.HandleIll)
-    SetSigaction(SIGILL, CrashHandler);
-  if (Options.HandleFpe)
-    SetSigaction(SIGFPE, CrashHandler);
-  if (Options.HandleXfsz)
-    SetSigaction(SIGXFSZ, FileSizeExceedHandler);
-}
-
-void SleepSeconds(int Seconds) {
-  sleep(Seconds); // Use C API to avoid coverage from instrumented libc++.
-}
-
-unsigned long GetPid() { return (unsigned long)getpid(); }
-
-size_t GetPeakRSSMb() {
-  struct rusage usage;
-  if (getrusage(RUSAGE_SELF, &usage))
-    return 0;
-  if (LIBFUZZER_LINUX) {
-    // ru_maxrss is in KiB
-    return usage.ru_maxrss >> 10;
-  } else if (LIBFUZZER_APPLE) {
-    // ru_maxrss is in bytes
-    return usage.ru_maxrss >> 20;
-  }
-  assert(0 && "GetPeakRSSMb() is not implemented for your platform");
-  return 0;
-}
-
-FILE *OpenProcessPipe(const char *Command, const char *Mode) {
-  return popen(Command, Mode);
-}
-
-const void *SearchMemory(const void *Data, size_t DataLen, const void *Patt,
-                         size_t PattLen) {
-  return memmem(Data, DataLen, Patt, PattLen);
-}
-
-std::string DisassembleCmd(const std::string &FileName) {
-  return "objdump -d " + FileName;
-}
-
-std::string SearchRegexCmd(const std::string &Regex) {
-  return "grep '" + Regex + "'";
-}
-
-}  // namespace fuzzer
-
-#endif // LIBFUZZER_POSIX
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilWindows.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilWindows.cpp
deleted file mode 100644
index 25ac976fc2db..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerUtilWindows.cpp
+++ /dev/null
@@ -1,193 +0,0 @@
-//===- FuzzerUtilWindows.cpp - Misc utils for Windows. --------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Misc utils implementation for Windows.
-//===----------------------------------------------------------------------===//
-#include "FuzzerDefs.h"
-#if LIBFUZZER_WINDOWS
-#include "FuzzerIO.h"
-#include "FuzzerInternal.h"
-#include <cassert>
-#include <chrono>
-#include <cstring>
-#include <errno.h>
-#include <iomanip>
-#include <signal.h>
-#include <sstream>
-#include <stdio.h>
-#include <sys/types.h>
-#include <windows.h>
-
-// This must be included after windows.h.
-#include <Psapi.h>
-
-namespace fuzzer {
-
-static const FuzzingOptions* HandlerOpt = nullptr;
-
-static LONG CALLBACK ExceptionHandler(PEXCEPTION_POINTERS ExceptionInfo) {
-  switch (ExceptionInfo->ExceptionRecord->ExceptionCode) {
-    case EXCEPTION_ACCESS_VIOLATION:
-    case EXCEPTION_ARRAY_BOUNDS_EXCEEDED:
-    case EXCEPTION_STACK_OVERFLOW:
-      if (HandlerOpt->HandleSegv)
-        Fuzzer::StaticCrashSignalCallback();
-      break;
-    case EXCEPTION_DATATYPE_MISALIGNMENT:
-    case EXCEPTION_IN_PAGE_ERROR:
-      if (HandlerOpt->HandleBus)
-        Fuzzer::StaticCrashSignalCallback();
-      break;
-    case EXCEPTION_ILLEGAL_INSTRUCTION:
-    case EXCEPTION_PRIV_INSTRUCTION:
-      if (HandlerOpt->HandleIll)
-        Fuzzer::StaticCrashSignalCallback();
-      break;
-    case EXCEPTION_FLT_DENORMAL_OPERAND:
-    case EXCEPTION_FLT_DIVIDE_BY_ZERO:
-    case EXCEPTION_FLT_INEXACT_RESULT:
-    case EXCEPTION_FLT_INVALID_OPERATION:
-    case EXCEPTION_FLT_OVERFLOW:
-    case EXCEPTION_FLT_STACK_CHECK:
-    case EXCEPTION_FLT_UNDERFLOW:
-    case EXCEPTION_INT_DIVIDE_BY_ZERO:
-    case EXCEPTION_INT_OVERFLOW:
-      if (HandlerOpt->HandleFpe)
-        Fuzzer::StaticCrashSignalCallback();
-      break;
-    // TODO: handle (Options.HandleXfsz)
-  }
-  return EXCEPTION_CONTINUE_SEARCH;
-}
-
-BOOL WINAPI CtrlHandler(DWORD dwCtrlType) {
-  switch (dwCtrlType) {
-    case CTRL_C_EVENT:
-      if (HandlerOpt->HandleInt)
-        Fuzzer::StaticInterruptCallback();
-      return TRUE;
-    case CTRL_BREAK_EVENT:
-      if (HandlerOpt->HandleTerm)
-        Fuzzer::StaticInterruptCallback();
-      return TRUE;
-  }
-  return FALSE;
-}
-
-void CALLBACK AlarmHandler(PVOID, BOOLEAN) {
-  Fuzzer::StaticAlarmCallback();
-}
-
-class TimerQ {
-  HANDLE TimerQueue;
- public:
-  TimerQ() : TimerQueue(NULL) {};
-  ~TimerQ() {
-    if (TimerQueue)
-      DeleteTimerQueueEx(TimerQueue, NULL);
-  };
-  void SetTimer(int Seconds) {
-    if (!TimerQueue) {
-      TimerQueue = CreateTimerQueue();
-      if (!TimerQueue) {
-        Printf("libFuzzer: CreateTimerQueue failed.\n");
-        exit(1);
-      }
-    }
-    HANDLE Timer;
-    if (!CreateTimerQueueTimer(&Timer, TimerQueue, AlarmHandler, NULL,
-        Seconds*1000, Seconds*1000, 0)) {
-      Printf("libFuzzer: CreateTimerQueueTimer failed.\n");
-      exit(1);
-    }
-  };
-};
-
-static TimerQ Timer;
-
-static void CrashHandler(int) { Fuzzer::StaticCrashSignalCallback(); }
-
-void SetSignalHandler(const FuzzingOptions& Options) {
-  HandlerOpt = &Options;
-
-  if (Options.UnitTimeoutSec > 0)
-    Timer.SetTimer(Options.UnitTimeoutSec / 2 + 1);
-
-  if (Options.HandleInt || Options.HandleTerm)
-    if (!SetConsoleCtrlHandler(CtrlHandler, TRUE)) {
-      DWORD LastError = GetLastError();
-      Printf("libFuzzer: SetConsoleCtrlHandler failed (Error code: %lu).\n",
-        LastError);
-      exit(1);
-    }
-
-  if (Options.HandleSegv || Options.HandleBus || Options.HandleIll ||
-      Options.HandleFpe)
-    SetUnhandledExceptionFilter(ExceptionHandler);
-
-  if (Options.HandleAbrt)
-    if (SIG_ERR == signal(SIGABRT, CrashHandler)) {
-      Printf("libFuzzer: signal failed with %d\n", errno);
-      exit(1);
-    }
-}
-
-void SleepSeconds(int Seconds) { Sleep(Seconds * 1000); }
-
-unsigned long GetPid() { return GetCurrentProcessId(); }
-
-size_t GetPeakRSSMb() {
-  PROCESS_MEMORY_COUNTERS info;
-  if (!GetProcessMemoryInfo(GetCurrentProcess(), &info, sizeof(info)))
-    return 0;
-  return info.PeakWorkingSetSize >> 20;
-}
-
-FILE *OpenProcessPipe(const char *Command, const char *Mode) {
-  return _popen(Command, Mode);
-}
-
-int ExecuteCommand(const std::string &Command) {
-  return system(Command.c_str());
-}
-
-const void *SearchMemory(const void *Data, size_t DataLen, const void *Patt,
-                         size_t PattLen) {
-  // TODO: make this implementation more efficient.
-  const char *Cdata = (const char *)Data;
-  const char *Cpatt = (const char *)Patt;
-
-  if (!Data || !Patt || DataLen == 0 || PattLen == 0 || DataLen < PattLen)
-    return NULL;
-
-  if (PattLen == 1)
-    return memchr(Data, *Cpatt, DataLen);
-
-  const char *End = Cdata + DataLen - PattLen + 1;
-
-  for (const char *It = Cdata; It < End; ++It)
-    if (It[0] == Cpatt[0] && memcmp(It, Cpatt, PattLen) == 0)
-      return It;
-
-  return NULL;
-}
-
-std::string DisassembleCmd(const std::string &FileName) {
-  if (ExecuteCommand("dumpbin /summary > nul") == 0)
-    return "dumpbin /disasm " + FileName;
-  Printf("libFuzzer: couldn't find tool to disassemble (dumpbin)\n");
-  exit(1);
-}
-
-std::string SearchRegexCmd(const std::string &Regex) {
-  return "findstr /r \"" + Regex + "\"";
-}
-
-} // namespace fuzzer
-
-#endif // LIBFUZZER_WINDOWS
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerValueBitMap.h b/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerValueBitMap.h
deleted file mode 100644
index 8f7ff74300f4..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/FuzzerValueBitMap.h
+++ /dev/null
@@ -1,94 +0,0 @@
-//===- FuzzerValueBitMap.h - INTERNAL - Bit map -----------------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// ValueBitMap.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_FUZZER_VALUE_BIT_MAP_H
-#define LLVM_FUZZER_VALUE_BIT_MAP_H
-
-#include "FuzzerDefs.h"
-
-namespace fuzzer {
-
-// A bit map containing kMapSizeInWords bits.
-struct ValueBitMap {
-  static const size_t kMapSizeInBits = 1 << 16;
-  static const size_t kMapPrimeMod = 65371;  // Largest Prime < kMapSizeInBits;
-  static const size_t kBitsInWord = (sizeof(uintptr_t) * 8);
-  static const size_t kMapSizeInWords = kMapSizeInBits / kBitsInWord;
- public:
-
-  // Clears all bits.
-  void Reset() { memset(Map, 0, sizeof(Map)); }
-
-  // Computes a hash function of Value and sets the corresponding bit.
-  // Returns true if the bit was changed from 0 to 1.
-  ATTRIBUTE_NO_SANITIZE_ALL
-  inline bool AddValue(uintptr_t Value) {
-    uintptr_t Idx = Value % kMapSizeInBits;
-    uintptr_t WordIdx = Idx / kBitsInWord;
-    uintptr_t BitIdx = Idx % kBitsInWord;
-    uintptr_t Old = Map[WordIdx];
-    uintptr_t New = Old | (1UL << BitIdx);
-    Map[WordIdx] = New;
-    return New != Old;
-  }
-
-  ATTRIBUTE_NO_SANITIZE_ALL
-  inline bool AddValueModPrime(uintptr_t Value) {
-    return AddValue(Value % kMapPrimeMod);
-  }
-
-  inline bool Get(uintptr_t Idx) {
-    assert(Idx < kMapSizeInBits);
-    uintptr_t WordIdx = Idx / kBitsInWord;
-    uintptr_t BitIdx = Idx % kBitsInWord;
-    return Map[WordIdx] & (1UL << BitIdx);
-  }
-
-  size_t GetNumBitsSinceLastMerge() const { return NumBits; }
-
-  // Merges 'Other' into 'this', clears 'Other', updates NumBits,
-  // returns true if new bits were added.
-  ATTRIBUTE_TARGET_POPCNT
-  bool MergeFrom(ValueBitMap &Other) {
-    uintptr_t Res = 0;
-    size_t OldNumBits = NumBits;
-    for (size_t i = 0; i < kMapSizeInWords; i++) {
-      auto O = Other.Map[i];
-      auto M = Map[i];
-      if (O) {
-        Map[i] = (M |= O);
-        Other.Map[i] = 0;
-      }
-      if (M)
-        Res += __builtin_popcountll(M);
-    }
-    NumBits = Res;
-    return OldNumBits < NumBits;
-  }
-
-  template <class Callback>
-  ATTRIBUTE_NO_SANITIZE_ALL
-  void ForEach(Callback CB) const {
-    for (size_t i = 0; i < kMapSizeInWords; i++)
-      if (uintptr_t M = Map[i])
-        for (size_t j = 0; j < sizeof(M) * 8; j++)
-          if (M & ((uintptr_t)1 << j))
-            CB(i * sizeof(M) * 8 + j);
-  }
-
- private:
-  size_t NumBits = 0;
-  uintptr_t Map[kMapSizeInWords] __attribute__((aligned(512)));
-};
-
-}  // namespace fuzzer
-
-#endif  // LLVM_FUZZER_VALUE_BIT_MAP_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/afl/afl_driver.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/afl/afl_driver.cpp
deleted file mode 100644
index 15bceb896e17..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/afl/afl_driver.cpp
+++ /dev/null
@@ -1,335 +0,0 @@
-//===- afl_driver.cpp - a glue between AFL and libFuzzer --------*- C++ -* ===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//===----------------------------------------------------------------------===//
-
-/* This file allows to fuzz libFuzzer-style target functions
- (LLVMFuzzerTestOneInput) with AFL using AFL's persistent (in-process) mode.
-
-Usage:
-################################################################################
-cat << EOF > test_fuzzer.cc
-#include <stddef.h>
-#include <stdint.h>
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *data, size_t size) {
-  if (size > 0 && data[0] == 'H')
-    if (size > 1 && data[1] == 'I')
-       if (size > 2 && data[2] == '!')
-       __builtin_trap();
-  return 0;
-}
-EOF
-# Build your target with -fsanitize-coverage=trace-pc-guard using fresh clang.
-clang -g -fsanitize-coverage=trace-pc-guard test_fuzzer.cc -c
-# Build afl-llvm-rt.o.c from the AFL distribution.
-clang -c -w $AFL_HOME/llvm_mode/afl-llvm-rt.o.c
-# Build this file, link it with afl-llvm-rt.o.o and the target code.
-clang++ afl_driver.cpp test_fuzzer.o afl-llvm-rt.o.o
-# Run AFL:
-rm -rf IN OUT; mkdir IN OUT; echo z > IN/z;
-$AFL_HOME/afl-fuzz -i IN -o OUT ./a.out
-################################################################################
-Environment Variables:
-There are a few environment variables that can be set to use features that
-afl-fuzz doesn't have.
-
-AFL_DRIVER_STDERR_DUPLICATE_FILENAME: Setting this *appends* stderr to the file
-specified. If the file does not exist, it is created. This is useful for getting
-stack traces (when using ASAN for example) or original error messages on hard to
-reproduce bugs.
-
-AFL_DRIVER_EXTRA_STATS_FILENAME: Setting this causes afl_driver to write extra
-statistics to the file specified. Currently these are peak_rss_mb
-(the peak amount of virtual memory used in MB) and slowest_unit_time_secs. If
-the file does not exist it is created. If the file does exist then
-afl_driver assumes it was restarted by afl-fuzz and will try to read old
-statistics from the file. If that fails then the process will quit.
-
-*/
-#include <assert.h>
-#include <errno.h>
-#include <signal.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/resource.h>
-#include <sys/time.h>
-#include <unistd.h>
-
-#include <fstream>
-#include <iostream>
-#include <vector>
-
-// Platform detection. Copied from FuzzerInternal.h
-#ifdef __linux__
-#define LIBFUZZER_LINUX 1
-#define LIBFUZZER_APPLE 0
-#elif __APPLE__
-#define LIBFUZZER_LINUX 0
-#define LIBFUZZER_APPLE 1
-#else
-#error "Support for your platform has not been implemented"
-#endif
-
-// Used to avoid repeating error checking boilerplate. If cond is false, a
-// fatal error has occured in the program. In this event print error_message
-// to stderr and abort(). Otherwise do nothing. Note that setting
-// AFL_DRIVER_STDERR_DUPLICATE_FILENAME may cause error_message to be appended
-// to the file as well, if the error occurs after the duplication is performed.
-#define CHECK_ERROR(cond, error_message)                                       \
-  if (!(cond)) {                                                               \
-    fprintf(stderr, (error_message));                                          \
-    abort();                                                                   \
-  }
-
-// libFuzzer interface is thin, so we don't include any libFuzzer headers.
-extern "C" {
-int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size);
-__attribute__((weak)) int LLVMFuzzerInitialize(int *argc, char ***argv);
-}
-
-// Notify AFL about persistent mode.
-static volatile char AFL_PERSISTENT[] = "##SIG_AFL_PERSISTENT##";
-extern "C" int __afl_persistent_loop(unsigned int);
-static volatile char suppress_warning2 = AFL_PERSISTENT[0];
-
-// Notify AFL about deferred forkserver.
-static volatile char AFL_DEFER_FORKSVR[] = "##SIG_AFL_DEFER_FORKSRV##";
-extern "C" void  __afl_manual_init();
-static volatile char suppress_warning1 = AFL_DEFER_FORKSVR[0];
-
-// Input buffer.
-static const size_t kMaxAflInputSize = 1 << 20;
-static uint8_t AflInputBuf[kMaxAflInputSize];
-
-// Variables we need for writing to the extra stats file.
-static FILE *extra_stats_file = NULL;
-static uint32_t previous_peak_rss = 0;
-static time_t slowest_unit_time_secs = 0;
-static const int kNumExtraStats = 2;
-static const char *kExtraStatsFormatString = "peak_rss_mb            : %u\n"
-                                             "slowest_unit_time_sec  : %u\n";
-
-// Copied from FuzzerUtil.cpp.
-size_t GetPeakRSSMb() {
-  struct rusage usage;
-  if (getrusage(RUSAGE_SELF, &usage))
-    return 0;
-  if (LIBFUZZER_LINUX) {
-    // ru_maxrss is in KiB
-    return usage.ru_maxrss >> 10;
-  } else if (LIBFUZZER_APPLE) {
-    // ru_maxrss is in bytes
-    return usage.ru_maxrss >> 20;
-  }
-  assert(0 && "GetPeakRSSMb() is not implemented for your platform");
-  return 0;
-}
-
-// Based on SetSigaction in FuzzerUtil.cpp
-static void SetSigaction(int signum,
-                         void (*callback)(int, siginfo_t *, void *)) {
-  struct sigaction sigact;
-  memset(&sigact, 0, sizeof(sigact));
-  sigact.sa_sigaction = callback;
-  if (sigaction(signum, &sigact, 0)) {
-    fprintf(stderr, "libFuzzer: sigaction failed with %d\n", errno);
-    exit(1);
-  }
-}
-
-// Write extra stats to the file specified by the user. If none is specified
-// this function will never be called.
-static void write_extra_stats() {
-  uint32_t peak_rss = GetPeakRSSMb();
-
-  if (peak_rss < previous_peak_rss)
-    peak_rss = previous_peak_rss;
-
-  int chars_printed = fprintf(extra_stats_file, kExtraStatsFormatString,
-                              peak_rss, slowest_unit_time_secs);
-
-  CHECK_ERROR(chars_printed != 0, "Failed to write extra_stats_file");
-
-  CHECK_ERROR(fclose(extra_stats_file) == 0,
-              "Failed to close extra_stats_file");
-}
-
-// Call write_extra_stats before we exit.
-static void crash_handler(int, siginfo_t *, void *) {
-  // Make sure we don't try calling write_extra_stats again if we crashed while
-  // trying to call it.
-  static bool first_crash = true;
-  CHECK_ERROR(first_crash,
-              "Crashed in crash signal handler. This is a bug in the fuzzer.");
-
-  first_crash = false;
-  write_extra_stats();
-}
-
-// If the user has specified an extra_stats_file through the environment
-// variable AFL_DRIVER_EXTRA_STATS_FILENAME, then perform necessary set up
-// to write stats to it on exit. If no file is specified, do nothing. Otherwise
-// install signal and exit handlers to write to the file when the process exits.
-// Then if the file doesn't exist create it and set extra stats to 0. But if it
-// does exist then read the initial values of the extra stats from the file
-// and check that the file is writable.
-static void maybe_initialize_extra_stats() {
-  // If AFL_DRIVER_EXTRA_STATS_FILENAME isn't set then we have nothing to do.
-  char *extra_stats_filename = getenv("AFL_DRIVER_EXTRA_STATS_FILENAME");
-  if (!extra_stats_filename)
-    return;
-
-  // Open the file and find the previous peak_rss_mb value.
-  // This is necessary because the fuzzing process is restarted after N
-  // iterations are completed. So we may need to get this value from a previous
-  // process to be accurate.
-  extra_stats_file = fopen(extra_stats_filename, "r");
-
-  // If extra_stats_file already exists: read old stats from it.
-  if (extra_stats_file) {
-    int matches = fscanf(extra_stats_file, kExtraStatsFormatString,
-                         &previous_peak_rss, &slowest_unit_time_secs);
-
-    // Make sure we have read a real extra stats file and that we have used it
-    // to set slowest_unit_time_secs and previous_peak_rss.
-    CHECK_ERROR(matches == kNumExtraStats, "Extra stats file is corrupt");
-
-    CHECK_ERROR(fclose(extra_stats_file) == 0, "Failed to close file");
-
-    // Now open the file for writing.
-    extra_stats_file = fopen(extra_stats_filename, "w");
-    CHECK_ERROR(extra_stats_file,
-                "Failed to open extra stats file for writing");
-  } else {
-    // Looks like this is the first time in a fuzzing job this is being called.
-    extra_stats_file = fopen(extra_stats_filename, "w+");
-    CHECK_ERROR(extra_stats_file, "failed to create extra stats file");
-  }
-
-  // Make sure that crash_handler gets called on any kind of fatal error.
-  int crash_signals[] = {SIGSEGV, SIGBUS, SIGABRT, SIGILL, SIGFPE,  SIGINT,
-                         SIGTERM};
-
-  const size_t num_signals = sizeof(crash_signals) / sizeof(crash_signals[0]);
-
-  for (size_t idx = 0; idx < num_signals; idx++)
-    SetSigaction(crash_signals[idx], crash_handler);
-
-  // Make sure it gets called on other kinds of exits.
-  atexit(write_extra_stats);
-}
-
-// If the user asks us to duplicate stderr, then do it.
-static void maybe_duplicate_stderr() {
-  char* stderr_duplicate_filename =
-      getenv("AFL_DRIVER_STDERR_DUPLICATE_FILENAME");
-
-  if (!stderr_duplicate_filename)
-    return;
-
-  FILE* stderr_duplicate_stream =
-      freopen(stderr_duplicate_filename, "a+", stderr);
-
-  if (!stderr_duplicate_stream) {
-    fprintf(
-        stderr,
-        "Failed to duplicate stderr to AFL_DRIVER_STDERR_DUPLICATE_FILENAME");
-    abort();
-  }
-}
-
-// Define LLVMFuzzerMutate to avoid link failures for targets that use it
-// with libFuzzer's LLVMFuzzerCustomMutator.
-extern "C" size_t LLVMFuzzerMutate(uint8_t *Data, size_t Size, size_t MaxSize) {
-  assert(false && "LLVMFuzzerMutate should not be called from afl_driver");
-  return 0;
-}
-
-// Execute any files provided as parameters.
-int ExecuteFilesOnyByOne(int argc, char **argv) {
-  for (int i = 1; i < argc; i++) {
-    std::ifstream in(argv[i]);
-    in.seekg(0, in.end);
-    size_t length = in.tellg();
-    in.seekg (0, in.beg);
-    std::cout << "Reading " << length << " bytes from " << argv[i] << std::endl;
-    // Allocate exactly length bytes so that we reliably catch buffer overflows.
-    std::vector<char> bytes(length);
-    in.read(bytes.data(), bytes.size());
-    assert(in);
-    LLVMFuzzerTestOneInput(reinterpret_cast<const uint8_t *>(bytes.data()),
-                           bytes.size());
-    std::cout << "Execution successfull" << std::endl;
-  }
-  return 0;
-}
-
-int main(int argc, char **argv) {
-  fprintf(stderr,
-      "======================= INFO =========================\n"
-      "This binary is built for AFL-fuzz.\n"
-      "To run the target function on individual input(s) execute this:\n"
-      "  %s < INPUT_FILE\n"
-      "or\n"
-      "  %s INPUT_FILE1 [INPUT_FILE2 ... ]\n"
-      "To fuzz with afl-fuzz execute this:\n"
-      "  afl-fuzz [afl-flags] %s [-N]\n"
-      "afl-fuzz will run N iterations before "
-      "re-spawning the process (default: 1000)\n"
-      "======================================================\n",
-          argv[0], argv[0], argv[0]);
-  if (LLVMFuzzerInitialize)
-    LLVMFuzzerInitialize(&argc, &argv);
-  // Do any other expensive one-time initialization here.
-
-  maybe_duplicate_stderr();
-  maybe_initialize_extra_stats();
-
-  __afl_manual_init();
-
-  int N = 1000;
-  if (argc == 2 && argv[1][0] == '-')
-      N = atoi(argv[1] + 1);
-  else if(argc == 2 && (N = atoi(argv[1])) > 0)
-      fprintf(stderr, "WARNING: using the deprecated call style `%s %d`\n",
-              argv[0], N);
-  else if (argc > 1)
-    return ExecuteFilesOnyByOne(argc, argv);
-
-  assert(N > 0);
-  time_t unit_time_secs;
-  int num_runs = 0;
-  while (__afl_persistent_loop(N)) {
-    ssize_t n_read = read(0, AflInputBuf, kMaxAflInputSize);
-    if (n_read > 0) {
-      // Copy AflInputBuf into a separate buffer to let asan find buffer
-      // overflows. Don't use unique_ptr/etc to avoid extra dependencies.
-      uint8_t *copy = new uint8_t[n_read];
-      memcpy(copy, AflInputBuf, n_read);
-
-      struct timeval unit_start_time;
-      CHECK_ERROR(gettimeofday(&unit_start_time, NULL) == 0,
-                  "Calling gettimeofday failed");
-
-      num_runs++;
-      LLVMFuzzerTestOneInput(copy, n_read);
-
-      struct timeval unit_stop_time;
-      CHECK_ERROR(gettimeofday(&unit_stop_time, NULL) == 0,
-                  "Calling gettimeofday failed");
-
-      // Update slowest_unit_time_secs if we see a new max.
-      unit_time_secs = unit_stop_time.tv_sec - unit_start_time.tv_sec;
-      if (slowest_unit_time_secs < unit_time_secs)
-        slowest_unit_time_secs = unit_time_secs;
-
-      delete[] copy;
-    }
-  }
-  fprintf(stderr, "%s: successfully executed %d input(s)\n", argv[0], num_runs);
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/build.sh b/external/bsd/llvm/dist/llvm/lib/Fuzzer/build.sh
deleted file mode 100644
index 4556af5daf7d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/build.sh
+++ /dev/null
@@ -1,11 +0,0 @@
-#!/bin/bash
-LIBFUZZER_SRC_DIR=$(dirname $0)
-CXX="${CXX:-clang}"
-for f in $LIBFUZZER_SRC_DIR/*.cpp; do
-  $CXX -g -O2 -fno-omit-frame-pointer -std=c++11 $f -c &
-done
-wait
-rm -f libFuzzer.a
-ar ru libFuzzer.a Fuzzer*.o
-rm -f Fuzzer*.o
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/cxx.dict b/external/bsd/llvm/dist/llvm/lib/Fuzzer/cxx.dict
deleted file mode 100644
index 41350f47558b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/cxx.dict
+++ /dev/null
@@ -1,122 +0,0 @@
-"++"
-"--"
-"<<"
-">>"
-"+="
-"-="
-"*="
-"/="
-">>="
-"<<="
-"&="
-"|="
-"^="
-"%="
-"!="
-"&&"
-"||"
-"=="
-">="
-"<="
-"->"
-"alignas"
-"alignof"
-"and"
-"and_eq"
-"asm"
-"auto"
-"bitand"
-"bitor"
-"bool"
-"break"
-"case"
-"catch"
-"char"
-"char16_t"
-"char32_t"
-"class"
-"compl"
-"concept"
-"const"
-"constexpr"
-"const_cast"
-"continue"
-"decltype"
-"default"
-"delete"
-"do"
-"double"
-"dynamic_cast"
-"else"
-"enum"
-"explicit"
-"export"
-"extern"
-"false"
-"float"
-"for"
-"friend"
-"goto"
-"if"
-"inline"
-"int"
-"long"
-"mutable"
-"namespace"
-"new"
-"noexcept"
-"not"
-"not_eq"
-"nullptr"
-"operator"
-"or"
-"or_eq"
-"private"
-"protected"
-"public"
-"register"
-"reinterpret_cast"
-"requires"
-"return"
-"short"
-"signed"
-"sizeof"
-"static"
-"static_assert"
-"static_cast"
-"struct"
-"switch"
-"template"
-"this"
-"thread_local"
-"throw"
-"true"
-"try"
-"typedef"
-"typeid"
-"typename"
-"union"
-"unsigned"
-"using"
-"virtual"
-"void"
-"volatile"
-"wchar_t"
-"while"
-"xor"
-"xor_eq"
-"if"
-"elif"
-"else"
-"endif"
-"defined"
-"ifdef"
-"ifndef"
-"define"
-"undef"
-"include"
-"line"
-"error"
-"pragma"
-"override"
-"final"
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/standalone/StandaloneFuzzTargetMain.c b/external/bsd/llvm/dist/llvm/lib/Fuzzer/standalone/StandaloneFuzzTargetMain.c
deleted file mode 100644
index 0d76ea49e796..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/standalone/StandaloneFuzzTargetMain.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*===- StandaloneFuzzTargetMain.c - standalone main() for fuzz targets. ---===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// This main() function can be linked to a fuzz target (i.e. a library
-// that exports LLVMFuzzerTestOneInput() and possibly LLVMFuzzerInitialize())
-// instead of libFuzzer. This main() function will not perform any fuzzing
-// but will simply feed all input files one by one to the fuzz target.
-//
-// Use this file to provide reproducers for bugs when linking against libFuzzer
-// or other fuzzing engine is undesirable.
-//===----------------------------------------------------------------------===*/
-#include <assert.h>
-#include <stdio.h>
-#include <stdlib.h>
-
-extern int LLVMFuzzerTestOneInput(const unsigned char *data, size_t size);
-__attribute__((weak)) extern int LLVMFuzzerInitialize(int *argc, char ***argv);
-int main(int argc, char **argv) {
-  fprintf(stderr, "StandaloneFuzzTargetMain: running %d inputs\n", argc - 1);
-  if (LLVMFuzzerInitialize)
-    LLVMFuzzerInitialize(&argc, &argv);
-  for (int i = 1; i < argc; i++) {
-    fprintf(stderr, "Running: %s\n", argv[i]);
-    FILE *f = fopen(argv[i], "r");
-    assert(f);
-    fseek(f, 0, SEEK_END);
-    size_t len = ftell(f);
-    fseek(f, 0, SEEK_SET);
-    unsigned char *buf = (unsigned char*)malloc(len);
-    size_t n_read = fread(buf, 1, len, f);
-    assert(n_read == len);
-    LLVMFuzzerTestOneInput(buf, len);
-    free(buf);
-    fprintf(stderr, "Done:    %s: (%zd bytes)\n", argv[i], n_read);
-  }
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AFLDriverTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AFLDriverTest.cpp
deleted file mode 100644
index b949adc7de15..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AFLDriverTest.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Contains dummy functions used to avoid dependency on AFL.
-#include <stdint.h>
-#include <stdio.h>
-#include <stdlib.h>
-
-extern "C" void __afl_manual_init() {}
-
-extern "C" int __afl_persistent_loop(unsigned int N) {
-  static int Count = N;
-  fprintf(stderr, "__afl_persistent_loop calle, Count = %d\n", Count);
-  if (Count--) return 1;
-  return 0;
-}
-
-// This declaration exists to prevent the Darwin linker
-// from complaining about this being a missing weak symbol.
-extern "C" int LLVMFuzzerInitialize(int *argc, char ***argv) {
-  fprintf(stderr, "LLVMFuzzerInitialize called\n");
-  return 0;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  fprintf(stderr, "LLVMFuzzerTestOneInput called; Size = %zd\n", Size);
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AbsNegAndConstant64Test.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AbsNegAndConstant64Test.cpp
deleted file mode 100644
index b5a61ddca715..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AbsNegAndConstant64Test.cpp
+++ /dev/null
@@ -1,23 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// abs(x) < 0 and y == Const puzzle, 64-bit variant.
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 16 || Size > 64) return 0;
-  int64_t x;
-  uint64_t y;
-  memcpy(&x, Data, sizeof(x));
-  memcpy(&y, Data + sizeof(x), sizeof(y));
-  if (llabs(x) < 0 && y == 0xbaddcafedeadbeefULL) {
-    printf("BINGO; Found the target, exiting; x = 0x%lx y 0x%lx\n", x, y);
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AbsNegAndConstantTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AbsNegAndConstantTest.cpp
deleted file mode 100644
index e9d983ff1ebf..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AbsNegAndConstantTest.cpp
+++ /dev/null
@@ -1,23 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// abs(x) < 0 and y == Const puzzle.
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 8) return 0;
-  int x;
-  unsigned y;
-  memcpy(&x, Data, sizeof(x));
-  memcpy(&y, Data + sizeof(x), sizeof(y));
-  if (abs(x) < 0 && y == 0xbaddcafe) {
-    printf("BINGO; Found the target, exiting; x = 0x%x y 0x%x\n", x, y);
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AccumulateAllocationsTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AccumulateAllocationsTest.cpp
deleted file mode 100644
index e9acd7ccbd30..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/AccumulateAllocationsTest.cpp
+++ /dev/null
@@ -1,17 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test with a more mallocs than frees, but no leak.
-#include <cstddef>
-#include <cstdint>
-
-const int kAllocatedPointersSize = 10000;
-int NumAllocatedPointers = 0;
-int *AllocatedPointers[kAllocatedPointersSize];
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (NumAllocatedPointers < kAllocatedPointersSize)
-    AllocatedPointers[NumAllocatedPointers++] = new int;
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BadStrcmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BadStrcmpTest.cpp
deleted file mode 100644
index ba2b068f741d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BadStrcmpTest.cpp
+++ /dev/null
@@ -1,19 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test that we don't creash in case of bad strcmp params.
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size != 10) return 0;
-  // Data is not zero-terminated, so this call is bad.
-  // Still, there are cases when such calles appear, see e.g.
-  // https://bugs.llvm.org/show_bug.cgi?id=32357
-  Sink = strcmp(reinterpret_cast<const char*>(Data), "123456789");
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BogusInitializeTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BogusInitializeTest.cpp
deleted file mode 100644
index c7e81a5478b2..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BogusInitializeTest.cpp
+++ /dev/null
@@ -1,15 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Make sure LLVMFuzzerInitialize does not change argv[0].
-#include <stddef.h>
-#include <stdint.h>
-
-extern "C" int LLVMFuzzerInitialize(int *argc, char ***argv) {
-  ***argv = 'X';
-  return 0;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BufferOverflowOnInput.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BufferOverflowOnInput.cpp
deleted file mode 100644
index 75e1fb90a19a..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/BufferOverflowOnInput.cpp
+++ /dev/null
@@ -1,23 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the string "Hi!".
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-static volatile bool SeedLargeBuffer;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  assert(Data);
-  if (Size >= 4)
-    SeedLargeBuffer = true;
-  if (Size == 3 && SeedLargeBuffer && Data[3]) {
-    std::cout << "Woops, reading Data[3] w/o crashing\n";
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CMakeLists.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CMakeLists.txt
deleted file mode 100644
index 43aea2b7a186..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CMakeLists.txt
+++ /dev/null
@@ -1,277 +0,0 @@
-# Build all these tests with -O0, otherwise optimizations may merge some
-# basic blocks and we'll fail to discover the targets.
-# We change the flags for every build type because we might be doing
-# a multi-configuration build (e.g. Xcode) where CMAKE_BUILD_TYPE doesn't
-# mean anything.
-set(variables_to_filter
-  CMAKE_CXX_FLAGS_RELEASE
-  CMAKE_CXX_FLAGS_DEBUG
-  CMAKE_CXX_FLAGS_RELWITHDEBINFO
-  CMAKE_CXX_FLAGS_MINSIZEREL
-  LIBFUZZER_FLAGS_BASE
-  )
-foreach (VARNAME ${variables_to_filter})
-  string(REGEX REPLACE "([-/]O)[123s]" "\\10" ${VARNAME} "${${VARNAME}}")
-endforeach()
-
-# Enable the coverage instrumentation (it is disabled for the Fuzzer lib).
-set(CMAKE_CXX_FLAGS "${LIBFUZZER_FLAGS_BASE} -fsanitize-coverage=trace-pc-guard,indirect-calls,trace-cmp,trace-div,trace-gep -gline-tables-only")
-
-if(MSVC)
-  # For tests use the CRT specified for release build
-  # (asan doesn't support MDd and MTd)
-  if ("${LLVM_USE_CRT_RELEASE}" STREQUAL "")
-    set(CRT_FLAG " /MD ")
-  else()
-    set(CRT_FLAG " /${LLVM_USE_CRT_RELEASE} ")
-  endif()
-  # In order to use the sanitizers in Windows, we need to link against many
-  # runtime libraries which will depend on the target being created
-  # (executable or dll) and the c runtime library used (MT/MD).
-  # By default, cmake uses link.exe for linking, which fails because we don't
-  # specify the appropiate dependencies.
-  # As we don't want to consider all of that possible situations which depends
-  # on the implementation of the compiler-rt, the simplest option is to change
-  # the rules for linking executables and shared libraries, using the compiler
-  # instead of link.exe. Clang will consider the sanitizer flags, and
-  # automatically provide the required libraries to the linker.
-  set(CMAKE_CXX_LINK_EXECUTABLE "<CMAKE_CXX_COMPILER> <FLAGS> ${CMAKE_CXX_FLAGS} ${CRT_FLAG} <OBJECTS> -o <TARGET> <LINK_LIBRARIES> /link <CMAKE_CXX_LINK_FLAGS> <LINK_FLAGS>")
-  set(CMAKE_CXX_CREATE_SHARED_LIBRARY "<CMAKE_CXX_COMPILER> ${CMAKE_CXX_FLAGS} ${CRT_FLAG} /LD <CMAKE_SHARED_LIBRARY_CXX_FLAGS> <CMAKE_SHARED_LIBRARY_CREATE_CXX_FLAGS> <CMAKE_SHARED_LIBRARY_SONAME_CXX_FLAG> <TARGET_SONAME> -o <TARGET> <OBJECTS> <LINK_LIBRARIES> /link <LINK_FLAGS>")
-endif()
-
-add_custom_target(TestBinaries)
-
-# add_libfuzzer_test(<name>
-#   SOURCES source0.cpp [source1.cpp ...]
-#   )
-#
-#   Declares a LibFuzzer test executable with target name LLVMFuzzer-<name>.
-#
-#   One or more source files to be compiled into the binary must be declared
-#   after the SOURCES keyword.
-function(add_libfuzzer_test name)
-  set(multi_arg_options "SOURCES")
-  cmake_parse_arguments(
-    "add_libfuzzer_test" "" "" "${multi_arg_options}" ${ARGN})
-  if ("${add_libfuzzer_test_SOURCES}" STREQUAL "")
-    message(FATAL_ERROR "Source files must be specified")
-  endif()
-  add_executable(LLVMFuzzer-${name}
-    ${add_libfuzzer_test_SOURCES}
-    )
-  target_link_libraries(LLVMFuzzer-${name} LLVMFuzzer)
-  # Place binary where llvm-lit expects to find it
-  set_target_properties(LLVMFuzzer-${name}
-    PROPERTIES RUNTIME_OUTPUT_DIRECTORY
-    "${CMAKE_BINARY_DIR}/lib/Fuzzer/test"
-    )
-  add_dependencies(TestBinaries LLVMFuzzer-${name})
-endfunction()
-
-###############################################################################
-# Basic tests
-###############################################################################
-
-set(Tests
-  AbsNegAndConstantTest
-  AbsNegAndConstant64Test
-  AccumulateAllocationsTest
-  BadStrcmpTest
-  BogusInitializeTest
-  BufferOverflowOnInput
-  CallerCalleeTest
-  CleanseTest
-  CounterTest
-  CustomCrossOverAndMutateTest
-  CustomCrossOverTest
-  CustomMutatorTest
-  CxxStringEqTest
-  DivTest
-  EmptyTest
-  EquivalenceATest
-  EquivalenceBTest
-  FlagsTest
-  FourIndependentBranchesTest
-  FullCoverageSetTest
-  InitializeTest
-  Memcmp64BytesTest
-  MemcmpTest
-  LeakTest
-  LeakTimeoutTest
-  LoadTest
-  NullDerefTest
-  NullDerefOnEmptyTest
-  NthRunCrashTest
-  OneHugeAllocTest
-  OutOfMemoryTest
-  OutOfMemorySingleLargeMallocTest
-  OverwriteInputTest
-  RepeatedMemcmp
-  RepeatedBytesTest
-  SimpleCmpTest
-  SimpleDictionaryTest
-  SimpleHashTest
-  SimpleTest
-  SimpleThreadedTest
-  SingleByteInputTest
-  SingleMemcmpTest
-  SingleStrcmpTest
-  SingleStrncmpTest
-  SpamyTest
-  ShrinkControlFlowTest
-  ShrinkControlFlowSimpleTest
-  ShrinkValueProfileTest
-  StrcmpTest
-  StrncmpOOBTest
-  StrncmpTest
-  StrstrTest
-  SwapCmpTest
-  SwitchTest
-  Switch2Test
-  TableLookupTest
-  ThreadedLeakTest
-  ThreadedTest
-  TimeoutTest
-  TimeoutEmptyTest
-  TraceMallocTest
-  TwoDifferentBugsTest
-  )
-
-if(APPLE OR MSVC)
-  # LeakSanitizer is not supported on OSX and Windows right now
-  set(HAS_LSAN 0)
-  message(WARNING "LeakSanitizer is not supported."
-    " Building and running LibFuzzer LeakSanitizer tests is disabled."
-    )
-else()
-  set(HAS_LSAN 1)
-endif()
-
-foreach(Test ${Tests})
-  add_libfuzzer_test(${Test} SOURCES ${Test}.cpp)
-endforeach()
-
-function(test_export_symbol target symbol)
-  if(MSVC)
-    set_target_properties(LLVMFuzzer-${target} PROPERTIES LINK_FLAGS
-        "-export:${symbol}")
-  endif()
-endfunction()
-
-test_export_symbol(InitializeTest "LLVMFuzzerInitialize")
-test_export_symbol(BogusInitializeTest "LLVMFuzzerInitialize")
-test_export_symbol(CustomCrossOverTest "LLVMFuzzerCustomCrossOver")
-test_export_symbol(CustomMutatorTest "LLVMFuzzerCustomMutator")
-
-###############################################################################
-# Unit tests
-###############################################################################
-
-add_executable(LLVMFuzzer-Unittest
-  FuzzerUnittest.cpp
-  )
-
-add_executable(LLVMFuzzer-StandaloneInitializeTest
-  InitializeTest.cpp
-  ../standalone/StandaloneFuzzTargetMain.c
-  )
-
-target_link_libraries(LLVMFuzzer-Unittest
-  gtest
-  gtest_main
-  LLVMFuzzerNoMain
-  )
-
-target_include_directories(LLVMFuzzer-Unittest PRIVATE
-  "${LLVM_MAIN_SRC_DIR}/utils/unittest/googletest/include"
-  )
-
-add_dependencies(TestBinaries LLVMFuzzer-Unittest)
-set_target_properties(LLVMFuzzer-Unittest
-  PROPERTIES RUNTIME_OUTPUT_DIRECTORY
-  "${CMAKE_CURRENT_BINARY_DIR}"
-)
-
-add_dependencies(TestBinaries LLVMFuzzer-StandaloneInitializeTest)
-set_target_properties(LLVMFuzzer-StandaloneInitializeTest
-  PROPERTIES RUNTIME_OUTPUT_DIRECTORY
-  "${CMAKE_CURRENT_BINARY_DIR}"
-)
-
-###############################################################################
-# Additional tests
-###############################################################################
-
-include_directories(..)
-
-# add_subdirectory(uninstrumented)
-add_subdirectory(no-coverage)
-add_subdirectory(trace-pc)
-add_subdirectory(ubsan)
-if (NOT MSVC)
-  add_subdirectory(inline-8bit-counters)
-endif()
-
-add_library(LLVMFuzzer-DSO1 SHARED DSO1.cpp)
-add_library(LLVMFuzzer-DSO2 SHARED DSO2.cpp)
-
-add_executable(LLVMFuzzer-DSOTest
-  DSOTestMain.cpp
-  DSOTestExtra.cpp)
-
-target_link_libraries(LLVMFuzzer-DSOTest
-  LLVMFuzzer-DSO1
-  LLVMFuzzer-DSO2
-  LLVMFuzzer
-  )
-
-set_target_properties(LLVMFuzzer-DSOTest PROPERTIES RUNTIME_OUTPUT_DIRECTORY
-  "${CMAKE_BINARY_DIR}/lib/Fuzzer/test")
-
-if(MSVC)
-  set_output_directory(LLVMFuzzer-DSO1
-    BINARY_DIR "${CMAKE_BINARY_DIR}/lib/Fuzzer/test"
-    LIBRARY_DIR "${CMAKE_BINARY_DIR}/lib/Fuzzer/test")
-  set_output_directory(LLVMFuzzer-DSO2
-    BINARY_DIR "${CMAKE_BINARY_DIR}/lib/Fuzzer/test"
-    LIBRARY_DIR "${CMAKE_BINARY_DIR}/lib/Fuzzer/test")
-else(MSVC)
-  set_output_directory(LLVMFuzzer-DSO1
-    LIBRARY_DIR "${CMAKE_BINARY_DIR}/lib/Fuzzer/lib")
-  set_output_directory(LLVMFuzzer-DSO2
-    LIBRARY_DIR "${CMAKE_BINARY_DIR}/lib/Fuzzer/lib")
-endif()
-
-add_dependencies(TestBinaries LLVMFuzzer-DSOTest)
-
-###############################################################################
-# Configure lit to run the tests
-#
-# Note this is done after declaring all tests so we can inform lit if any tests
-# need to be disabled.
-###############################################################################
-set(LIBFUZZER_POSIX 1)
-if (MSVC)
-  set(LIBFUZZER_POSIX 0)
-endif()
-
-configure_lit_site_cfg(
-  ${CMAKE_CURRENT_SOURCE_DIR}/lit.site.cfg.in
-  ${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg
-  )
-
-configure_lit_site_cfg(
-  ${CMAKE_CURRENT_SOURCE_DIR}/unit/lit.site.cfg.in
-  ${CMAKE_CURRENT_BINARY_DIR}/unit/lit.site.cfg
-  )
-
-add_lit_testsuite(check-fuzzer "Running Fuzzer tests"
-    ${CMAKE_CURRENT_BINARY_DIR}
-    DEPENDS TestBinaries
-    )
-
-# Don't add dependencies on Windows. The linker step would fail on Windows,
-# since cmake will use link.exe for linking and won't include compiler-rt libs.
-if(NOT MSVC)
-  add_dependencies(check-fuzzer FileCheck sancov not)
-endif()
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CallerCalleeTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CallerCalleeTest.cpp
deleted file mode 100644
index ed9f37cc1521..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CallerCalleeTest.cpp
+++ /dev/null
@@ -1,59 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer.
-// Try to find the target using the indirect caller-callee pairs.
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <cstring>
-#include <iostream>
-
-typedef void (*F)();
-static F t[256];
-
-void f34() {
-  std::cerr << "BINGO\n";
-  exit(1);
-}
-void f23() { t[(unsigned)'d'] = f34;}
-void f12() { t[(unsigned)'c'] = f23;}
-void f01() { t[(unsigned)'b'] = f12;}
-void f00() {}
-
-static F t0[256] = {
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-  f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00, f00,
-};
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 4) return 0;
-  // Spoof the counters.
-  for (int i = 0; i < 200; i++) {
-    f23();
-    f12();
-    f01();
-  }
-  memcpy(t, t0, sizeof(t));
-  t[(unsigned)'a'] = f01;
-  t[Data[0]]();
-  t[Data[1]]();
-  t[Data[2]]();
-  t[Data[3]]();
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CleanseTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CleanseTest.cpp
deleted file mode 100644
index ee1845701269..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CleanseTest.cpp
+++ /dev/null
@@ -1,16 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test the the fuzzer is able to 'cleanse' the reproducer
-// by replacing all irrelevant bytes with garbage.
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size >= 20 && Data[1] == '1' && Data[5] == '5' && Data[10] == 'A' &&
-      Data[19] == 'Z')
-    abort();
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CounterTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CounterTest.cpp
deleted file mode 100644
index 4917934c62e5..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CounterTest.cpp
+++ /dev/null
@@ -1,18 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test for a fuzzer: must find the case where a particular basic block is
-// executed many times.
-#include <iostream>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  int Num = 0;
-  for (size_t i = 0; i < Size; i++)
-    if (Data[i] == 'A' + i)
-      Num++;
-  if (Num >= 4) {
-    std::cerr <<  "BINGO!\n";
-    exit(1);
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomCrossOverAndMutateTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomCrossOverAndMutateTest.cpp
deleted file mode 100644
index 74fc939534ca..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomCrossOverAndMutateTest.cpp
+++ /dev/null
@@ -1,34 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test that libFuzzer does not crash when LLVMFuzzerMutate called from
-// LLVMFuzzerCustomCrossOver.
-#include <algorithm>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <string.h>
-#include <string>
-#include <vector>
-
-#include "FuzzerInterface.h"
-
-static volatile int sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  std::string Str(reinterpret_cast<const char *>(Data), Size);
-  if (Size && Data[0] == '0')
-    sink++;
-  return 0;
-}
-
-extern "C" size_t LLVMFuzzerCustomCrossOver(const uint8_t *Data1, size_t Size1,
-                                            const uint8_t *Data2, size_t Size2,
-                                            uint8_t *Out, size_t MaxOutSize,
-                                            unsigned int Seed) {
-  std::vector<uint8_t> Buffer(MaxOutSize * 10);
-  LLVMFuzzerMutate(Buffer.data(), Buffer.size(), Buffer.size());
-  size_t Size = std::min(Size1, MaxOutSize);
-  memcpy(Out, Data1, Size);
-  return Size;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomCrossOverTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomCrossOverTest.cpp
deleted file mode 100644
index b624088b9020..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomCrossOverTest.cpp
+++ /dev/null
@@ -1,63 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a cutom mutator.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-#include <random>
-#include <string.h>
-
-#include "FuzzerInterface.h"
-
-static const char *Separator = "-_^_-";
-static const char *Target = "012-_^_-abc";
-
-static volatile int sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  assert(Data);
-  std::string Str(reinterpret_cast<const char *>(Data), Size);
-
-  // Ensure that two different elements exist in the corpus.
-  if (Size && Data[0] == '0') sink++;
-  if (Size && Data[0] == 'a') sink--;
-
-  if (Str.find(Target) != std::string::npos) {
-    std::cout << "BINGO; Found the target, exiting\n";
-    exit(1);
-  }
-  return 0;
-}
-
-extern "C" size_t LLVMFuzzerCustomCrossOver(const uint8_t *Data1, size_t Size1,
-                                            const uint8_t *Data2, size_t Size2,
-                                            uint8_t *Out, size_t MaxOutSize,
-                                            unsigned int Seed) {
-  static bool Printed;
-  static size_t SeparatorLen = strlen(Separator);
-
-  if (!Printed) {
-    std::cerr << "In LLVMFuzzerCustomCrossover\n";
-    Printed = true;
-  }
-
-  std::mt19937 R(Seed);
-
-  size_t Offset1 = 0;
-  size_t Len1 = R() % (Size1 - Offset1);
-  size_t Offset2 = 0;
-  size_t Len2 = R() % (Size2 - Offset2);
-  size_t Size = Len1 + Len2 + SeparatorLen;
-
-  if (Size > MaxOutSize)
-    return 0;
-
-  memcpy(Out, Data1 + Offset1, Len1);
-  memcpy(Out + Len1, Separator, SeparatorLen);
-  memcpy(Out + Len1 + SeparatorLen, Data2 + Offset2, Len2);
-
-  return Len1 + Len2 + SeparatorLen;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomMutatorTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomMutatorTest.cpp
deleted file mode 100644
index 521d7f506b4d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CustomMutatorTest.cpp
+++ /dev/null
@@ -1,38 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a cutom mutator.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-#include "FuzzerInterface.h"
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  assert(Data);
-  if (Size > 0 && Data[0] == 'H') {
-    Sink = 1;
-    if (Size > 1 && Data[1] == 'i') {
-      Sink = 2;
-      if (Size > 2 && Data[2] == '!') {
-        std::cout << "BINGO; Found the target, exiting\n";
-        exit(1);
-      }
-    }
-  }
-  return 0;
-}
-
-extern "C" size_t LLVMFuzzerCustomMutator(uint8_t *Data, size_t Size,
-                                          size_t MaxSize, unsigned int Seed) {
-  static bool Printed;
-  if (!Printed) {
-    std::cerr << "In LLVMFuzzerCustomMutator\n";
-    Printed = true;
-  }
-  return LLVMFuzzerMutate(Data, Size, MaxSize);
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CxxStringEqTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CxxStringEqTest.cpp
deleted file mode 100644
index 924851c5ad53..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/CxxStringEqTest.cpp
+++ /dev/null
@@ -1,25 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. Must find a specific string
-// used in std::string operator ==.
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-#include <string>
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  std::string Str((const char*)Data, Size);
-  bool Eq = Str == "FooBar";
-  Sink = Str == "123456";   // Try to confuse the fuzzer
-  if (Eq) {
-    std::cout << "BINGO; Found the target, exiting\n";
-    std::cout.flush();
-    abort();
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSO1.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSO1.cpp
deleted file mode 100644
index 72a5ec4a0cde..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSO1.cpp
+++ /dev/null
@@ -1,14 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Source code for a simple DSO.
-#ifdef _WIN32
-__declspec( dllexport )
-#endif
-int DSO1(int a) {
-  if (a < 123456)
-    return 0;
-  return 1;
-}
-
-void Uncovered1() { }
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSO2.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSO2.cpp
deleted file mode 100644
index 2967055dc227..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSO2.cpp
+++ /dev/null
@@ -1,14 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Source code for a simple DSO.
-#ifdef _WIN32
-__declspec( dllexport )
-#endif
-int DSO2(int a) {
-  if (a < 3598235)
-    return 0;
-  return 1;
-}
-
-void Uncovered2() {}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSOTestExtra.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSOTestExtra.cpp
deleted file mode 100644
index a2274d070ebb..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSOTestExtra.cpp
+++ /dev/null
@@ -1,11 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Source code for a simple DSO.
-
-int DSOTestExtra(int a) {
-  if (a < 452345)
-    return 0;
-  return 1;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSOTestMain.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSOTestMain.cpp
deleted file mode 100644
index e0c857d4fdec..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DSOTestMain.cpp
+++ /dev/null
@@ -1,31 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Source code for a simple DSO.
-
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-extern int DSO1(int a);
-extern int DSO2(int a);
-extern int DSOTestExtra(int a);
-
-static volatile int *nil = 0;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  int x, y, z;
-  if (Size < sizeof(int) * 3) {
-    x = y = z = 0;
-  } else {
-    memcpy(&x, Data + 0 * sizeof(int), sizeof(int));
-    memcpy(&y, Data + 1 * sizeof(int), sizeof(int));
-    memcpy(&z, Data + 2 * sizeof(int), sizeof(int));
-  }
-  int sum = DSO1(x) + DSO2(y) + (z ? DSOTestExtra(z) : 0);
-  if (sum == 3) {
-    fprintf(stderr, "BINGO %d %d %d\n", x, y, z);
-    *nil = 0;
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DivTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DivTest.cpp
deleted file mode 100644
index bce13feb790f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/DivTest.cpp
+++ /dev/null
@@ -1,20 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer: find the interesting argument for div.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-#include <iostream>
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 4) return 0;
-  int a;
-  memcpy(&a, Data, 4);
-  Sink = 12345678 / (987654 - a);
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EmptyTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EmptyTest.cpp
deleted file mode 100644
index 5e843308fa57..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EmptyTest.cpp
+++ /dev/null
@@ -1,11 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-// A fuzzer with empty target function.
-
-#include <cstdint>
-#include <cstdlib>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EquivalenceATest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EquivalenceATest.cpp
deleted file mode 100644
index 7d1ebb0f6a4a..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EquivalenceATest.cpp
+++ /dev/null
@@ -1,17 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-#include <stddef.h>
-#include <stdint.h>
-#include <stdio.h>
-
-// Test for libFuzzer's "equivalence" fuzzing, part A.
-extern "C" void LLVMFuzzerAnnounceOutput(const uint8_t *Data, size_t Size);
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  // fprintf(stderr, "A %zd\n", Size);
-  uint8_t Result[50];
-  if (Size > 50) Size = 50;
-  for (size_t i = 0; i < Size; i++)
-    Result[Size - i - 1] = Data[i];
-  LLVMFuzzerAnnounceOutput(Result, Size);
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EquivalenceBTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EquivalenceBTest.cpp
deleted file mode 100644
index b1de208b57f6..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/EquivalenceBTest.cpp
+++ /dev/null
@@ -1,27 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-#include <stddef.h>
-#include <stdint.h>
-#include <stdio.h>
-
-// Test for libFuzzer's "equivalence" fuzzing, part B.
-extern "C" void LLVMFuzzerAnnounceOutput(const uint8_t *Data, size_t Size);
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  // fprintf(stderr, "B %zd\n", Size);
-  uint8_t Result[50];
-  if (Size > 50) Size = 50;
-  for (size_t i = 0; i < Size; i++)
-    Result[Size - i - 1] = Data[i];
-
-  // Be a bit different from EquivalenceATest
-  if (Size > 10 && Data[5] == 'B' && Data[6] == 'C' && Data[7] == 'D') {
-    static int c;
-    if (!c)
-      fprintf(stderr, "ZZZZZZZ\n");
-    c = 1;
-    Result[2]++;
-  }
-
-  LLVMFuzzerAnnounceOutput(Result, Size);
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FlagsTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FlagsTest.cpp
deleted file mode 100644
index ac64b9d48df5..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FlagsTest.cpp
+++ /dev/null
@@ -1,32 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Parse some flags
-#include <string>
-#include <vector>
-
-static std::vector<std::string> Flags;
-
-extern "C" int LLVMFuzzerInitialize(int *Argc, char ***Argv) {
-  // Parse --flags and anything after -ignore_remaining_args=1 is passed.
-  int I = 1;
-  while (I < *Argc) {
-    std::string S((*Argv)[I++]);
-    if (S == "-ignore_remaining_args=1")
-      break;
-    if (S.substr(0, 2) == "--")
-      Flags.push_back(S);
-  }
-  while (I < *Argc)
-    Flags.push_back(std::string((*Argv)[I++]));
-
-  return 0;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  fprintf(stderr, "BINGO ");
-  for (auto Flag : Flags)
-    fprintf(stderr, "%s ", Flag.c_str());
-  fprintf(stderr, "\n");
-  exit(0);
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FourIndependentBranchesTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FourIndependentBranchesTest.cpp
deleted file mode 100644
index ba963d9b1de8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FourIndependentBranchesTest.cpp
+++ /dev/null
@@ -1,23 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the string "FUZZ".
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 64) return 0;
-  int bits = 0;
-  if (Size > 0 && Data[0] == 'F') bits |= 1;
-  if (Size > 1 && Data[1] == 'U') bits |= 2;
-  if (Size > 2 && Data[2] == 'Z') bits |= 4;
-  if (Size > 3 && Data[3] == 'Z') bits |= 8;
-  if (bits == 15) {
-    std::cerr <<  "BINGO!\n";
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FullCoverageSetTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FullCoverageSetTest.cpp
deleted file mode 100644
index 6d7e48fe51f8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FullCoverageSetTest.cpp
+++ /dev/null
@@ -1,24 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the string "FUZZER".
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  int bits = 0;
-  if (Size > 0 && Data[0] == 'F') bits |= 1;
-  if (Size > 1 && Data[1] == 'U') bits |= 2;
-  if (Size > 2 && Data[2] == 'Z') bits |= 4;
-  if (Size > 3 && Data[3] == 'Z') bits |= 8;
-  if (Size > 4 && Data[4] == 'E') bits |= 16;
-  if (Size > 5 && Data[5] == 'R') bits |= 32;
-  if (bits == 63) {
-    std::cerr <<  "BINGO!\n";
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FuzzerUnittest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FuzzerUnittest.cpp
deleted file mode 100644
index eba2663029b2..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/FuzzerUnittest.cpp
+++ /dev/null
@@ -1,761 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Avoid ODR violations (LibFuzzer is built without ASan and this test is built
-// with ASan) involving C++ standard library types when using libcxx.
-#define _LIBCPP_HAS_NO_ASAN
-
-// Do not attempt to use LLVM ostream from gtest.
-#define GTEST_NO_LLVM_RAW_OSTREAM 1
-
-#include "FuzzerCorpus.h"
-#include "FuzzerDictionary.h"
-#include "FuzzerInternal.h"
-#include "FuzzerMerge.h"
-#include "FuzzerMutate.h"
-#include "FuzzerRandom.h"
-#include "FuzzerTracePC.h"
-#include "gtest/gtest.h"
-#include <memory>
-#include <set>
-#include <sstream>
-
-using namespace fuzzer;
-
-// For now, have LLVMFuzzerTestOneInput just to make it link.
-// Later we may want to make unittests that actually call LLVMFuzzerTestOneInput.
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  abort();
-}
-
-TEST(Fuzzer, CrossOver) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  Unit A({0, 1, 2}), B({5, 6, 7});
-  Unit C;
-  Unit Expected[] = {
-       { 0 },
-       { 0, 1 },
-       { 0, 5 },
-       { 0, 1, 2 },
-       { 0, 1, 5 },
-       { 0, 5, 1 },
-       { 0, 5, 6 },
-       { 0, 1, 2, 5 },
-       { 0, 1, 5, 2 },
-       { 0, 1, 5, 6 },
-       { 0, 5, 1, 2 },
-       { 0, 5, 1, 6 },
-       { 0, 5, 6, 1 },
-       { 0, 5, 6, 7 },
-       { 0, 1, 2, 5, 6 },
-       { 0, 1, 5, 2, 6 },
-       { 0, 1, 5, 6, 2 },
-       { 0, 1, 5, 6, 7 },
-       { 0, 5, 1, 2, 6 },
-       { 0, 5, 1, 6, 2 },
-       { 0, 5, 1, 6, 7 },
-       { 0, 5, 6, 1, 2 },
-       { 0, 5, 6, 1, 7 },
-       { 0, 5, 6, 7, 1 },
-       { 0, 1, 2, 5, 6, 7 },
-       { 0, 1, 5, 2, 6, 7 },
-       { 0, 1, 5, 6, 2, 7 },
-       { 0, 1, 5, 6, 7, 2 },
-       { 0, 5, 1, 2, 6, 7 },
-       { 0, 5, 1, 6, 2, 7 },
-       { 0, 5, 1, 6, 7, 2 },
-       { 0, 5, 6, 1, 2, 7 },
-       { 0, 5, 6, 1, 7, 2 },
-       { 0, 5, 6, 7, 1, 2 }
-  };
-  for (size_t Len = 1; Len < 8; Len++) {
-    std::set<Unit> FoundUnits, ExpectedUnitsWitThisLength;
-    for (int Iter = 0; Iter < 3000; Iter++) {
-      C.resize(Len);
-      size_t NewSize = MD.CrossOver(A.data(), A.size(), B.data(), B.size(),
-                                    C.data(), C.size());
-      C.resize(NewSize);
-      FoundUnits.insert(C);
-    }
-    for (const Unit &U : Expected)
-      if (U.size() <= Len)
-        ExpectedUnitsWitThisLength.insert(U);
-    EXPECT_EQ(ExpectedUnitsWitThisLength, FoundUnits);
-  }
-}
-
-TEST(Fuzzer, Hash) {
-  uint8_t A[] = {'a', 'b', 'c'};
-  fuzzer::Unit U(A, A + sizeof(A));
-  EXPECT_EQ("a9993e364706816aba3e25717850c26c9cd0d89d", fuzzer::Hash(U));
-  U.push_back('d');
-  EXPECT_EQ("81fe8bfe87576c3ecb22426f8e57847382917acf", fuzzer::Hash(U));
-}
-
-typedef size_t (MutationDispatcher::*Mutator)(uint8_t *Data, size_t Size,
-                                              size_t MaxSize);
-
-void TestEraseBytes(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  uint8_t REM0[8] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t REM1[8] = {0x00, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t REM2[8] = {0x00, 0x11, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t REM3[8] = {0x00, 0x11, 0x22, 0x44, 0x55, 0x66, 0x77};
-  uint8_t REM4[8] = {0x00, 0x11, 0x22, 0x33, 0x55, 0x66, 0x77};
-  uint8_t REM5[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x66, 0x77};
-  uint8_t REM6[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x77};
-  uint8_t REM7[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
-
-  uint8_t REM8[6] = {0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t REM9[6] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55};
-  uint8_t REM10[6] = {0x00, 0x11, 0x22, 0x55, 0x66, 0x77};
-
-  uint8_t REM11[5] = {0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t REM12[5] = {0x00, 0x11, 0x22, 0x33, 0x44};
-  uint8_t REM13[5] = {0x00, 0x44, 0x55, 0x66, 0x77};
-
-
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  int FoundMask = 0;
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-    size_t NewSize = (MD.*M)(T, sizeof(T), sizeof(T));
-    if (NewSize == 7 && !memcmp(REM0, T, 7)) FoundMask |= 1 << 0;
-    if (NewSize == 7 && !memcmp(REM1, T, 7)) FoundMask |= 1 << 1;
-    if (NewSize == 7 && !memcmp(REM2, T, 7)) FoundMask |= 1 << 2;
-    if (NewSize == 7 && !memcmp(REM3, T, 7)) FoundMask |= 1 << 3;
-    if (NewSize == 7 && !memcmp(REM4, T, 7)) FoundMask |= 1 << 4;
-    if (NewSize == 7 && !memcmp(REM5, T, 7)) FoundMask |= 1 << 5;
-    if (NewSize == 7 && !memcmp(REM6, T, 7)) FoundMask |= 1 << 6;
-    if (NewSize == 7 && !memcmp(REM7, T, 7)) FoundMask |= 1 << 7;
-
-    if (NewSize == 6 && !memcmp(REM8, T, 6)) FoundMask |= 1 << 8;
-    if (NewSize == 6 && !memcmp(REM9, T, 6)) FoundMask |= 1 << 9;
-    if (NewSize == 6 && !memcmp(REM10, T, 6)) FoundMask |= 1 << 10;
-
-    if (NewSize == 5 && !memcmp(REM11, T, 5)) FoundMask |= 1 << 11;
-    if (NewSize == 5 && !memcmp(REM12, T, 5)) FoundMask |= 1 << 12;
-    if (NewSize == 5 && !memcmp(REM13, T, 5)) FoundMask |= 1 << 13;
-  }
-  EXPECT_EQ(FoundMask, (1 << 14) - 1);
-}
-
-TEST(FuzzerMutate, EraseBytes1) {
-  TestEraseBytes(&MutationDispatcher::Mutate_EraseBytes, 200);
-}
-TEST(FuzzerMutate, EraseBytes2) {
-  TestEraseBytes(&MutationDispatcher::Mutate, 2000);
-}
-
-void TestInsertByte(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  int FoundMask = 0;
-  uint8_t INS0[8] = {0xF1, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
-  uint8_t INS1[8] = {0x00, 0xF2, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
-  uint8_t INS2[8] = {0x00, 0x11, 0xF3, 0x22, 0x33, 0x44, 0x55, 0x66};
-  uint8_t INS3[8] = {0x00, 0x11, 0x22, 0xF4, 0x33, 0x44, 0x55, 0x66};
-  uint8_t INS4[8] = {0x00, 0x11, 0x22, 0x33, 0xF5, 0x44, 0x55, 0x66};
-  uint8_t INS5[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0xF6, 0x55, 0x66};
-  uint8_t INS6[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0xF7, 0x66};
-  uint8_t INS7[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0xF8};
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
-    size_t NewSize = (MD.*M)(T, 7, 8);
-    if (NewSize == 8 && !memcmp(INS0, T, 8)) FoundMask |= 1 << 0;
-    if (NewSize == 8 && !memcmp(INS1, T, 8)) FoundMask |= 1 << 1;
-    if (NewSize == 8 && !memcmp(INS2, T, 8)) FoundMask |= 1 << 2;
-    if (NewSize == 8 && !memcmp(INS3, T, 8)) FoundMask |= 1 << 3;
-    if (NewSize == 8 && !memcmp(INS4, T, 8)) FoundMask |= 1 << 4;
-    if (NewSize == 8 && !memcmp(INS5, T, 8)) FoundMask |= 1 << 5;
-    if (NewSize == 8 && !memcmp(INS6, T, 8)) FoundMask |= 1 << 6;
-    if (NewSize == 8 && !memcmp(INS7, T, 8)) FoundMask |= 1 << 7;
-  }
-  EXPECT_EQ(FoundMask, 255);
-}
-
-TEST(FuzzerMutate, InsertByte1) {
-  TestInsertByte(&MutationDispatcher::Mutate_InsertByte, 1 << 15);
-}
-TEST(FuzzerMutate, InsertByte2) {
-  TestInsertByte(&MutationDispatcher::Mutate, 1 << 17);
-}
-
-void TestInsertRepeatedBytes(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  int FoundMask = 0;
-  uint8_t INS0[7] = {0x00, 0x11, 0x22, 0x33, 'a', 'a', 'a'};
-  uint8_t INS1[7] = {0x00, 0x11, 0x22, 'a', 'a', 'a', 0x33};
-  uint8_t INS2[7] = {0x00, 0x11, 'a', 'a', 'a', 0x22, 0x33};
-  uint8_t INS3[7] = {0x00, 'a', 'a', 'a', 0x11, 0x22, 0x33};
-  uint8_t INS4[7] = {'a', 'a', 'a', 0x00, 0x11, 0x22, 0x33};
-
-  uint8_t INS5[8] = {0x00, 0x11, 0x22, 0x33, 'b', 'b', 'b', 'b'};
-  uint8_t INS6[8] = {0x00, 0x11, 0x22, 'b', 'b', 'b', 'b', 0x33};
-  uint8_t INS7[8] = {0x00, 0x11, 'b', 'b', 'b', 'b', 0x22, 0x33};
-  uint8_t INS8[8] = {0x00, 'b', 'b', 'b', 'b', 0x11, 0x22, 0x33};
-  uint8_t INS9[8] = {'b', 'b', 'b', 'b', 0x00, 0x11, 0x22, 0x33};
-
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[8] = {0x00, 0x11, 0x22, 0x33};
-    size_t NewSize = (MD.*M)(T, 4, 8);
-    if (NewSize == 7 && !memcmp(INS0, T, 7)) FoundMask |= 1 << 0;
-    if (NewSize == 7 && !memcmp(INS1, T, 7)) FoundMask |= 1 << 1;
-    if (NewSize == 7 && !memcmp(INS2, T, 7)) FoundMask |= 1 << 2;
-    if (NewSize == 7 && !memcmp(INS3, T, 7)) FoundMask |= 1 << 3;
-    if (NewSize == 7 && !memcmp(INS4, T, 7)) FoundMask |= 1 << 4;
-
-    if (NewSize == 8 && !memcmp(INS5, T, 8)) FoundMask |= 1 << 5;
-    if (NewSize == 8 && !memcmp(INS6, T, 8)) FoundMask |= 1 << 6;
-    if (NewSize == 8 && !memcmp(INS7, T, 8)) FoundMask |= 1 << 7;
-    if (NewSize == 8 && !memcmp(INS8, T, 8)) FoundMask |= 1 << 8;
-    if (NewSize == 8 && !memcmp(INS9, T, 8)) FoundMask |= 1 << 9;
-
-  }
-  EXPECT_EQ(FoundMask, (1 << 10) - 1);
-}
-
-TEST(FuzzerMutate, InsertRepeatedBytes1) {
-  TestInsertRepeatedBytes(&MutationDispatcher::Mutate_InsertRepeatedBytes, 10000);
-}
-TEST(FuzzerMutate, InsertRepeatedBytes2) {
-  TestInsertRepeatedBytes(&MutationDispatcher::Mutate, 300000);
-}
-
-void TestChangeByte(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  int FoundMask = 0;
-  uint8_t CH0[8] = {0xF0, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH1[8] = {0x00, 0xF1, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH2[8] = {0x00, 0x11, 0xF2, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH3[8] = {0x00, 0x11, 0x22, 0xF3, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH4[8] = {0x00, 0x11, 0x22, 0x33, 0xF4, 0x55, 0x66, 0x77};
-  uint8_t CH5[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0xF5, 0x66, 0x77};
-  uint8_t CH6[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0xF5, 0x77};
-  uint8_t CH7[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0xF7};
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[9] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-    size_t NewSize = (MD.*M)(T, 8, 9);
-    if (NewSize == 8 && !memcmp(CH0, T, 8)) FoundMask |= 1 << 0;
-    if (NewSize == 8 && !memcmp(CH1, T, 8)) FoundMask |= 1 << 1;
-    if (NewSize == 8 && !memcmp(CH2, T, 8)) FoundMask |= 1 << 2;
-    if (NewSize == 8 && !memcmp(CH3, T, 8)) FoundMask |= 1 << 3;
-    if (NewSize == 8 && !memcmp(CH4, T, 8)) FoundMask |= 1 << 4;
-    if (NewSize == 8 && !memcmp(CH5, T, 8)) FoundMask |= 1 << 5;
-    if (NewSize == 8 && !memcmp(CH6, T, 8)) FoundMask |= 1 << 6;
-    if (NewSize == 8 && !memcmp(CH7, T, 8)) FoundMask |= 1 << 7;
-  }
-  EXPECT_EQ(FoundMask, 255);
-}
-
-TEST(FuzzerMutate, ChangeByte1) {
-  TestChangeByte(&MutationDispatcher::Mutate_ChangeByte, 1 << 15);
-}
-TEST(FuzzerMutate, ChangeByte2) {
-  TestChangeByte(&MutationDispatcher::Mutate, 1 << 17);
-}
-
-void TestChangeBit(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  int FoundMask = 0;
-  uint8_t CH0[8] = {0x01, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH1[8] = {0x00, 0x13, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH2[8] = {0x00, 0x11, 0x02, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH3[8] = {0x00, 0x11, 0x22, 0x37, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH4[8] = {0x00, 0x11, 0x22, 0x33, 0x54, 0x55, 0x66, 0x77};
-  uint8_t CH5[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x54, 0x66, 0x77};
-  uint8_t CH6[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x76, 0x77};
-  uint8_t CH7[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0xF7};
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[9] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-    size_t NewSize = (MD.*M)(T, 8, 9);
-    if (NewSize == 8 && !memcmp(CH0, T, 8)) FoundMask |= 1 << 0;
-    if (NewSize == 8 && !memcmp(CH1, T, 8)) FoundMask |= 1 << 1;
-    if (NewSize == 8 && !memcmp(CH2, T, 8)) FoundMask |= 1 << 2;
-    if (NewSize == 8 && !memcmp(CH3, T, 8)) FoundMask |= 1 << 3;
-    if (NewSize == 8 && !memcmp(CH4, T, 8)) FoundMask |= 1 << 4;
-    if (NewSize == 8 && !memcmp(CH5, T, 8)) FoundMask |= 1 << 5;
-    if (NewSize == 8 && !memcmp(CH6, T, 8)) FoundMask |= 1 << 6;
-    if (NewSize == 8 && !memcmp(CH7, T, 8)) FoundMask |= 1 << 7;
-  }
-  EXPECT_EQ(FoundMask, 255);
-}
-
-TEST(FuzzerMutate, ChangeBit1) {
-  TestChangeBit(&MutationDispatcher::Mutate_ChangeBit, 1 << 16);
-}
-TEST(FuzzerMutate, ChangeBit2) {
-  TestChangeBit(&MutationDispatcher::Mutate, 1 << 18);
-}
-
-void TestShuffleBytes(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  int FoundMask = 0;
-  uint8_t CH0[7] = {0x00, 0x22, 0x11, 0x33, 0x44, 0x55, 0x66};
-  uint8_t CH1[7] = {0x11, 0x00, 0x33, 0x22, 0x44, 0x55, 0x66};
-  uint8_t CH2[7] = {0x00, 0x33, 0x11, 0x22, 0x44, 0x55, 0x66};
-  uint8_t CH3[7] = {0x00, 0x11, 0x22, 0x44, 0x55, 0x66, 0x33};
-  uint8_t CH4[7] = {0x00, 0x11, 0x22, 0x33, 0x55, 0x44, 0x66};
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[7] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
-    size_t NewSize = (MD.*M)(T, 7, 7);
-    if (NewSize == 7 && !memcmp(CH0, T, 7)) FoundMask |= 1 << 0;
-    if (NewSize == 7 && !memcmp(CH1, T, 7)) FoundMask |= 1 << 1;
-    if (NewSize == 7 && !memcmp(CH2, T, 7)) FoundMask |= 1 << 2;
-    if (NewSize == 7 && !memcmp(CH3, T, 7)) FoundMask |= 1 << 3;
-    if (NewSize == 7 && !memcmp(CH4, T, 7)) FoundMask |= 1 << 4;
-  }
-  EXPECT_EQ(FoundMask, 31);
-}
-
-TEST(FuzzerMutate, ShuffleBytes1) {
-  TestShuffleBytes(&MutationDispatcher::Mutate_ShuffleBytes, 1 << 16);
-}
-TEST(FuzzerMutate, ShuffleBytes2) {
-  TestShuffleBytes(&MutationDispatcher::Mutate, 1 << 20);
-}
-
-void TestCopyPart(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  int FoundMask = 0;
-  uint8_t CH0[7] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x00, 0x11};
-  uint8_t CH1[7] = {0x55, 0x66, 0x22, 0x33, 0x44, 0x55, 0x66};
-  uint8_t CH2[7] = {0x00, 0x55, 0x66, 0x33, 0x44, 0x55, 0x66};
-  uint8_t CH3[7] = {0x00, 0x11, 0x22, 0x00, 0x11, 0x22, 0x66};
-  uint8_t CH4[7] = {0x00, 0x11, 0x11, 0x22, 0x33, 0x55, 0x66};
-
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[7] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};
-    size_t NewSize = (MD.*M)(T, 7, 7);
-    if (NewSize == 7 && !memcmp(CH0, T, 7)) FoundMask |= 1 << 0;
-    if (NewSize == 7 && !memcmp(CH1, T, 7)) FoundMask |= 1 << 1;
-    if (NewSize == 7 && !memcmp(CH2, T, 7)) FoundMask |= 1 << 2;
-    if (NewSize == 7 && !memcmp(CH3, T, 7)) FoundMask |= 1 << 3;
-    if (NewSize == 7 && !memcmp(CH4, T, 7)) FoundMask |= 1 << 4;
-  }
-
-  uint8_t CH5[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x00, 0x11, 0x22};
-  uint8_t CH6[8] = {0x22, 0x33, 0x44, 0x00, 0x11, 0x22, 0x33, 0x44};
-  uint8_t CH7[8] = {0x00, 0x11, 0x22, 0x00, 0x11, 0x22, 0x33, 0x44};
-  uint8_t CH8[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x22, 0x33, 0x44};
-  uint8_t CH9[8] = {0x00, 0x11, 0x22, 0x22, 0x33, 0x44, 0x33, 0x44};
-
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-    size_t NewSize = (MD.*M)(T, 5, 8);
-    if (NewSize == 8 && !memcmp(CH5, T, 8)) FoundMask |= 1 << 5;
-    if (NewSize == 8 && !memcmp(CH6, T, 8)) FoundMask |= 1 << 6;
-    if (NewSize == 8 && !memcmp(CH7, T, 8)) FoundMask |= 1 << 7;
-    if (NewSize == 8 && !memcmp(CH8, T, 8)) FoundMask |= 1 << 8;
-    if (NewSize == 8 && !memcmp(CH9, T, 8)) FoundMask |= 1 << 9;
-  }
-
-  EXPECT_EQ(FoundMask, 1023);
-}
-
-TEST(FuzzerMutate, CopyPart1) {
-  TestCopyPart(&MutationDispatcher::Mutate_CopyPart, 1 << 10);
-}
-TEST(FuzzerMutate, CopyPart2) {
-  TestCopyPart(&MutationDispatcher::Mutate, 1 << 13);
-}
-
-void TestAddWordFromDictionary(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-  uint8_t Word1[4] = {0xAA, 0xBB, 0xCC, 0xDD};
-  uint8_t Word2[3] = {0xFF, 0xEE, 0xEF};
-  MD.AddWordToManualDictionary(Word(Word1, sizeof(Word1)));
-  MD.AddWordToManualDictionary(Word(Word2, sizeof(Word2)));
-  int FoundMask = 0;
-  uint8_t CH0[7] = {0x00, 0x11, 0x22, 0xAA, 0xBB, 0xCC, 0xDD};
-  uint8_t CH1[7] = {0x00, 0x11, 0xAA, 0xBB, 0xCC, 0xDD, 0x22};
-  uint8_t CH2[7] = {0x00, 0xAA, 0xBB, 0xCC, 0xDD, 0x11, 0x22};
-  uint8_t CH3[7] = {0xAA, 0xBB, 0xCC, 0xDD, 0x00, 0x11, 0x22};
-  uint8_t CH4[6] = {0x00, 0x11, 0x22, 0xFF, 0xEE, 0xEF};
-  uint8_t CH5[6] = {0x00, 0x11, 0xFF, 0xEE, 0xEF, 0x22};
-  uint8_t CH6[6] = {0x00, 0xFF, 0xEE, 0xEF, 0x11, 0x22};
-  uint8_t CH7[6] = {0xFF, 0xEE, 0xEF, 0x00, 0x11, 0x22};
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[7] = {0x00, 0x11, 0x22};
-    size_t NewSize = (MD.*M)(T, 3, 7);
-    if (NewSize == 7 && !memcmp(CH0, T, 7)) FoundMask |= 1 << 0;
-    if (NewSize == 7 && !memcmp(CH1, T, 7)) FoundMask |= 1 << 1;
-    if (NewSize == 7 && !memcmp(CH2, T, 7)) FoundMask |= 1 << 2;
-    if (NewSize == 7 && !memcmp(CH3, T, 7)) FoundMask |= 1 << 3;
-    if (NewSize == 6 && !memcmp(CH4, T, 6)) FoundMask |= 1 << 4;
-    if (NewSize == 6 && !memcmp(CH5, T, 6)) FoundMask |= 1 << 5;
-    if (NewSize == 6 && !memcmp(CH6, T, 6)) FoundMask |= 1 << 6;
-    if (NewSize == 6 && !memcmp(CH7, T, 6)) FoundMask |= 1 << 7;
-  }
-  EXPECT_EQ(FoundMask, 255);
-}
-
-TEST(FuzzerMutate, AddWordFromDictionary1) {
-  TestAddWordFromDictionary(
-      &MutationDispatcher::Mutate_AddWordFromManualDictionary, 1 << 15);
-}
-
-TEST(FuzzerMutate, AddWordFromDictionary2) {
-  TestAddWordFromDictionary(&MutationDispatcher::Mutate, 1 << 15);
-}
-
-void TestChangeASCIIInteger(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-
-  uint8_t CH0[8] = {'1', '2', '3', '4', '5', '6', '7', '7'};
-  uint8_t CH1[8] = {'1', '2', '3', '4', '5', '6', '7', '9'};
-  uint8_t CH2[8] = {'2', '4', '6', '9', '1', '3', '5', '6'};
-  uint8_t CH3[8] = {'0', '6', '1', '7', '2', '8', '3', '9'};
-  int FoundMask = 0;
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[8] = {'1', '2', '3', '4', '5', '6', '7', '8'};
-    size_t NewSize = (MD.*M)(T, 8, 8);
-    /**/ if (NewSize == 8 && !memcmp(CH0, T, 8)) FoundMask |= 1 << 0;
-    else if (NewSize == 8 && !memcmp(CH1, T, 8)) FoundMask |= 1 << 1;
-    else if (NewSize == 8 && !memcmp(CH2, T, 8)) FoundMask |= 1 << 2;
-    else if (NewSize == 8 && !memcmp(CH3, T, 8)) FoundMask |= 1 << 3;
-    else if (NewSize == 8)                       FoundMask |= 1 << 4;
-  }
-  EXPECT_EQ(FoundMask, 31);
-}
-
-TEST(FuzzerMutate, ChangeASCIIInteger1) {
-  TestChangeASCIIInteger(&MutationDispatcher::Mutate_ChangeASCIIInteger,
-                         1 << 15);
-}
-
-TEST(FuzzerMutate, ChangeASCIIInteger2) {
-  TestChangeASCIIInteger(&MutationDispatcher::Mutate, 1 << 15);
-}
-
-void TestChangeBinaryInteger(Mutator M, int NumIter) {
-  std::unique_ptr<ExternalFunctions> t(new ExternalFunctions());
-  fuzzer::EF = t.get();
-  Random Rand(0);
-  MutationDispatcher MD(Rand, {});
-
-  uint8_t CH0[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x79};
-  uint8_t CH1[8] = {0x00, 0x11, 0x22, 0x31, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH2[8] = {0xff, 0x10, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH3[8] = {0x00, 0x11, 0x2a, 0x33, 0x44, 0x55, 0x66, 0x77};
-  uint8_t CH4[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x4f, 0x66, 0x77};
-  uint8_t CH5[8] = {0xff, 0xee, 0xdd, 0xcc, 0xbb, 0xaa, 0x99, 0x88};
-  uint8_t CH6[8] = {0x00, 0x11, 0x22, 0x00, 0x00, 0x00, 0x08, 0x77}; // Size
-  uint8_t CH7[8] = {0x00, 0x08, 0x00, 0x33, 0x44, 0x55, 0x66, 0x77}; // Sw(Size)
-
-  int FoundMask = 0;
-  for (int i = 0; i < NumIter; i++) {
-    uint8_t T[8] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77};
-    size_t NewSize = (MD.*M)(T, 8, 8);
-    /**/ if (NewSize == 8 && !memcmp(CH0, T, 8)) FoundMask |= 1 << 0;
-    else if (NewSize == 8 && !memcmp(CH1, T, 8)) FoundMask |= 1 << 1;
-    else if (NewSize == 8 && !memcmp(CH2, T, 8)) FoundMask |= 1 << 2;
-    else if (NewSize == 8 && !memcmp(CH3, T, 8)) FoundMask |= 1 << 3;
-    else if (NewSize == 8 && !memcmp(CH4, T, 8)) FoundMask |= 1 << 4;
-    else if (NewSize == 8 && !memcmp(CH5, T, 8)) FoundMask |= 1 << 5;
-    else if (NewSize == 8 && !memcmp(CH6, T, 8)) FoundMask |= 1 << 6;
-    else if (NewSize == 8 && !memcmp(CH7, T, 8)) FoundMask |= 1 << 7;
-  }
-  EXPECT_EQ(FoundMask, 255);
-}
-
-TEST(FuzzerMutate, ChangeBinaryInteger1) {
-  TestChangeBinaryInteger(&MutationDispatcher::Mutate_ChangeBinaryInteger,
-                         1 << 12);
-}
-
-TEST(FuzzerMutate, ChangeBinaryInteger2) {
-  TestChangeBinaryInteger(&MutationDispatcher::Mutate, 1 << 15);
-}
-
-
-TEST(FuzzerDictionary, ParseOneDictionaryEntry) {
-  Unit U;
-  EXPECT_FALSE(ParseOneDictionaryEntry("", &U));
-  EXPECT_FALSE(ParseOneDictionaryEntry(" ", &U));
-  EXPECT_FALSE(ParseOneDictionaryEntry("\t  ", &U));
-  EXPECT_FALSE(ParseOneDictionaryEntry("  \" ", &U));
-  EXPECT_FALSE(ParseOneDictionaryEntry("  zz\" ", &U));
-  EXPECT_FALSE(ParseOneDictionaryEntry("  \"zz ", &U));
-  EXPECT_FALSE(ParseOneDictionaryEntry("  \"\" ", &U));
-  EXPECT_TRUE(ParseOneDictionaryEntry("\"a\"", &U));
-  EXPECT_EQ(U, Unit({'a'}));
-  EXPECT_TRUE(ParseOneDictionaryEntry("\"abc\"", &U));
-  EXPECT_EQ(U, Unit({'a', 'b', 'c'}));
-  EXPECT_TRUE(ParseOneDictionaryEntry("abc=\"abc\"", &U));
-  EXPECT_EQ(U, Unit({'a', 'b', 'c'}));
-  EXPECT_FALSE(ParseOneDictionaryEntry("\"\\\"", &U));
-  EXPECT_TRUE(ParseOneDictionaryEntry("\"\\\\\"", &U));
-  EXPECT_EQ(U, Unit({'\\'}));
-  EXPECT_TRUE(ParseOneDictionaryEntry("\"\\xAB\"", &U));
-  EXPECT_EQ(U, Unit({0xAB}));
-  EXPECT_TRUE(ParseOneDictionaryEntry("\"\\xABz\\xDE\"", &U));
-  EXPECT_EQ(U, Unit({0xAB, 'z', 0xDE}));
-  EXPECT_TRUE(ParseOneDictionaryEntry("\"#\"", &U));
-  EXPECT_EQ(U, Unit({'#'}));
-  EXPECT_TRUE(ParseOneDictionaryEntry("\"\\\"\"", &U));
-  EXPECT_EQ(U, Unit({'"'}));
-}
-
-TEST(FuzzerDictionary, ParseDictionaryFile) {
-  std::vector<Unit> Units;
-  EXPECT_FALSE(ParseDictionaryFile("zzz\n", &Units));
-  EXPECT_FALSE(ParseDictionaryFile("", &Units));
-  EXPECT_TRUE(ParseDictionaryFile("\n", &Units));
-  EXPECT_EQ(Units.size(), 0U);
-  EXPECT_TRUE(ParseDictionaryFile("#zzzz a b c d\n", &Units));
-  EXPECT_EQ(Units.size(), 0U);
-  EXPECT_TRUE(ParseDictionaryFile(" #zzzz\n", &Units));
-  EXPECT_EQ(Units.size(), 0U);
-  EXPECT_TRUE(ParseDictionaryFile("  #zzzz\n", &Units));
-  EXPECT_EQ(Units.size(), 0U);
-  EXPECT_TRUE(ParseDictionaryFile("  #zzzz\naaa=\"aa\"", &Units));
-  EXPECT_EQ(Units, std::vector<Unit>({Unit({'a', 'a'})}));
-  EXPECT_TRUE(
-      ParseDictionaryFile("  #zzzz\naaa=\"aa\"\n\nabc=\"abc\"", &Units));
-  EXPECT_EQ(Units,
-            std::vector<Unit>({Unit({'a', 'a'}), Unit({'a', 'b', 'c'})}));
-}
-
-TEST(FuzzerUtil, Base64) {
-  EXPECT_EQ("", Base64({}));
-  EXPECT_EQ("YQ==", Base64({'a'}));
-  EXPECT_EQ("eA==", Base64({'x'}));
-  EXPECT_EQ("YWI=", Base64({'a', 'b'}));
-  EXPECT_EQ("eHk=", Base64({'x', 'y'}));
-  EXPECT_EQ("YWJj", Base64({'a', 'b', 'c'}));
-  EXPECT_EQ("eHl6", Base64({'x', 'y', 'z'}));
-  EXPECT_EQ("YWJjeA==", Base64({'a', 'b', 'c', 'x'}));
-  EXPECT_EQ("YWJjeHk=", Base64({'a', 'b', 'c', 'x', 'y'}));
-  EXPECT_EQ("YWJjeHl6", Base64({'a', 'b', 'c', 'x', 'y', 'z'}));
-}
-
-TEST(Corpus, Distribution) {
-  Random Rand(0);
-  std::unique_ptr<InputCorpus> C(new InputCorpus(""));
-  size_t N = 10;
-  size_t TriesPerUnit = 1<<16;
-  for (size_t i = 0; i < N; i++)
-    C->AddToCorpus(Unit{ static_cast<uint8_t>(i) }, 1, false, {});
-
-  std::vector<size_t> Hist(N);
-  for (size_t i = 0; i < N * TriesPerUnit; i++) {
-    Hist[C->ChooseUnitIdxToMutate(Rand)]++;
-  }
-  for (size_t i = 0; i < N; i++) {
-    // A weak sanity check that every unit gets invoked.
-    EXPECT_GT(Hist[i], TriesPerUnit / N / 3);
-  }
-}
-
-TEST(Merge, Bad) {
-  const char *kInvalidInputs[] = {
-    "",
-    "x",
-    "3\nx",
-    "2\n3",
-    "2\n2",
-    "2\n2\nA\n",
-    "2\n2\nA\nB\nC\n",
-    "0\n0\n",
-    "1\n1\nA\nDONE 0",
-    "1\n1\nA\nSTARTED 1",
-  };
-  Merger M;
-  for (auto S : kInvalidInputs) {
-    // fprintf(stderr, "TESTING:\n%s\n", S);
-    EXPECT_FALSE(M.Parse(S, false));
-  }
-}
-
-void EQ(const std::vector<uint32_t> &A, const std::vector<uint32_t> &B) {
-  EXPECT_EQ(A, B);
-}
-
-void EQ(const std::vector<std::string> &A, const std::vector<std::string> &B) {
-  std::set<std::string> a(A.begin(), A.end());
-  std::set<std::string> b(B.begin(), B.end());
-  EXPECT_EQ(a, b);
-}
-
-static void Merge(const std::string &Input,
-                  const std::vector<std::string> Result,
-                  size_t NumNewFeatures) {
-  Merger M;
-  std::vector<std::string> NewFiles;
-  EXPECT_TRUE(M.Parse(Input, true));
-  std::stringstream SS;
-  M.PrintSummary(SS);
-  EXPECT_EQ(NumNewFeatures, M.Merge(&NewFiles));
-  EXPECT_EQ(M.AllFeatures(), M.ParseSummary(SS));
-  EQ(NewFiles, Result);
-}
-
-TEST(Merge, Good) {
-  Merger M;
-
-  EXPECT_TRUE(M.Parse("1\n0\nAA\n", false));
-  EXPECT_EQ(M.Files.size(), 1U);
-  EXPECT_EQ(M.NumFilesInFirstCorpus, 0U);
-  EXPECT_EQ(M.Files[0].Name, "AA");
-  EXPECT_TRUE(M.LastFailure.empty());
-  EXPECT_EQ(M.FirstNotProcessedFile, 0U);
-
-  EXPECT_TRUE(M.Parse("2\n1\nAA\nBB\nSTARTED 0 42\n", false));
-  EXPECT_EQ(M.Files.size(), 2U);
-  EXPECT_EQ(M.NumFilesInFirstCorpus, 1U);
-  EXPECT_EQ(M.Files[0].Name, "AA");
-  EXPECT_EQ(M.Files[1].Name, "BB");
-  EXPECT_EQ(M.LastFailure, "AA");
-  EXPECT_EQ(M.FirstNotProcessedFile, 1U);
-
-  EXPECT_TRUE(M.Parse("3\n1\nAA\nBB\nC\n"
-                        "STARTED 0 1000\n"
-                        "DONE 0 1 2 3\n"
-                        "STARTED 1 1001\n"
-                        "DONE 1 4 5 6 \n"
-                        "STARTED 2 1002\n"
-                        "", true));
-  EXPECT_EQ(M.Files.size(), 3U);
-  EXPECT_EQ(M.NumFilesInFirstCorpus, 1U);
-  EXPECT_EQ(M.Files[0].Name, "AA");
-  EXPECT_EQ(M.Files[0].Size, 1000U);
-  EXPECT_EQ(M.Files[1].Name, "BB");
-  EXPECT_EQ(M.Files[1].Size, 1001U);
-  EXPECT_EQ(M.Files[2].Name, "C");
-  EXPECT_EQ(M.Files[2].Size, 1002U);
-  EXPECT_EQ(M.LastFailure, "C");
-  EXPECT_EQ(M.FirstNotProcessedFile, 3U);
-  EQ(M.Files[0].Features, {1, 2, 3});
-  EQ(M.Files[1].Features, {4, 5, 6});
-
-
-  std::vector<std::string> NewFiles;
-
-  EXPECT_TRUE(M.Parse("3\n2\nAA\nBB\nC\n"
-                        "STARTED 0 1000\nDONE 0 1 2 3\n"
-                        "STARTED 1 1001\nDONE 1 4 5 6 \n"
-                        "STARTED 2 1002\nDONE 2 6 1 3 \n"
-                        "", true));
-  EXPECT_EQ(M.Files.size(), 3U);
-  EXPECT_EQ(M.NumFilesInFirstCorpus, 2U);
-  EXPECT_TRUE(M.LastFailure.empty());
-  EXPECT_EQ(M.FirstNotProcessedFile, 3U);
-  EQ(M.Files[0].Features, {1, 2, 3});
-  EQ(M.Files[1].Features, {4, 5, 6});
-  EQ(M.Files[2].Features, {1, 3, 6});
-  EXPECT_EQ(0U, M.Merge(&NewFiles));
-  EQ(NewFiles, {});
-
-  EXPECT_TRUE(M.Parse("3\n1\nA\nB\nC\n"
-                        "STARTED 0 1000\nDONE 0 1 2 3\n"
-                        "STARTED 1 1001\nDONE 1 4 5 6 \n"
-                        "STARTED 2 1002\nDONE 2 6 1 3\n"
-                        "", true));
-  EQ(M.Files[0].Features, {1, 2, 3});
-  EQ(M.Files[1].Features, {4, 5, 6});
-  EQ(M.Files[2].Features, {1, 3, 6});
-  EXPECT_EQ(3U, M.Merge(&NewFiles));
-  EQ(NewFiles, {"B"});
-
-  // Same as the above, but with InitialFeatures.
-  EXPECT_TRUE(M.Parse("2\n0\nB\nC\n"
-                        "STARTED 0 1001\nDONE 0 4 5 6 \n"
-                        "STARTED 1 1002\nDONE 1 6 1 3\n"
-                        "", true));
-  EQ(M.Files[0].Features, {4, 5, 6});
-  EQ(M.Files[1].Features, {1, 3, 6});
-  EXPECT_EQ(3U, M.Merge({1, 2, 3}, &NewFiles));
-  EQ(NewFiles, {"B"});
-}
-
-TEST(Merge, Merge) {
-
-  Merge("3\n1\nA\nB\nC\n"
-        "STARTED 0 1000\nDONE 0 1 2 3\n"
-        "STARTED 1 1001\nDONE 1 4 5 6 \n"
-        "STARTED 2 1002\nDONE 2 6 1 3 \n",
-        {"B"}, 3);
-
-  Merge("3\n0\nA\nB\nC\n"
-        "STARTED 0 2000\nDONE 0 1 2 3\n"
-        "STARTED 1 1001\nDONE 1 4 5 6 \n"
-        "STARTED 2 1002\nDONE 2 6 1 3 \n",
-        {"A", "B", "C"}, 6);
-
-  Merge("4\n0\nA\nB\nC\nD\n"
-        "STARTED 0 2000\nDONE 0 1 2 3\n"
-        "STARTED 1 1101\nDONE 1 4 5 6 \n"
-        "STARTED 2 1102\nDONE 2 6 1 3 100 \n"
-        "STARTED 3 1000\nDONE 3 1  \n",
-        {"A", "B", "C", "D"}, 7);
-
-  Merge("4\n1\nA\nB\nC\nD\n"
-        "STARTED 0 2000\nDONE 0 4 5 6 7 8\n"
-        "STARTED 1 1100\nDONE 1 1 2 3 \n"
-        "STARTED 2 1100\nDONE 2 2 3 \n"
-        "STARTED 3 1000\nDONE 3 1  \n",
-        {"B", "D"}, 3);
-}
-
-TEST(Fuzzer, ForEachNonZeroByte) {
-  const size_t N = 64;
-  alignas(64) uint8_t Ar[N + 8] = {
-    0, 0, 0, 0, 0, 0, 0, 0,
-    1, 2, 0, 0, 0, 0, 0, 0,
-    0, 0, 3, 0, 4, 0, 0, 0,
-    0, 0, 0, 0, 0, 0, 0, 0,
-    0, 0, 0, 5, 0, 6, 0, 0,
-    0, 0, 0, 0, 0, 0, 7, 0,
-    0, 0, 0, 0, 0, 0, 0, 0,
-    0, 0, 0, 0, 0, 0, 0, 8,
-    9, 9, 9, 9, 9, 9, 9, 9,
-  };
-  typedef std::vector<std::pair<size_t, uint8_t> > Vec;
-  Vec Res, Expected;
-  auto CB = [&](size_t Idx, uint8_t V) { Res.push_back({Idx, V}); };
-  ForEachNonZeroByte(Ar, Ar + N, 100, CB);
-  Expected = {{108, 1}, {109, 2}, {118, 3}, {120, 4},
-              {135, 5}, {137, 6}, {146, 7}, {163, 8}};
-  EXPECT_EQ(Res, Expected);
-
-  Res.clear();
-  ForEachNonZeroByte(Ar + 9, Ar + N, 109, CB);
-  Expected = {          {109, 2}, {118, 3}, {120, 4},
-              {135, 5}, {137, 6}, {146, 7}, {163, 8}};
-  EXPECT_EQ(Res, Expected);
-
-  Res.clear();
-  ForEachNonZeroByte(Ar + 9, Ar + N - 9, 109, CB);
-  Expected = {          {109, 2}, {118, 3}, {120, 4},
-              {135, 5}, {137, 6}, {146, 7}};
-  EXPECT_EQ(Res, Expected);
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/InitializeTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/InitializeTest.cpp
deleted file mode 100644
index 0d6a0fda0930..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/InitializeTest.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Make sure LLVMFuzzerInitialize is called.
-#include <assert.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-static char *argv0;
-
-extern "C" int LLVMFuzzerInitialize(int *argc, char ***argv) {
-  assert(*argc > 0);
-  argv0 = **argv;
-  fprintf(stderr, "LLVMFuzzerInitialize: %s\n", argv0);
-  return 0;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size == strlen(argv0) &&
-      !strncmp(reinterpret_cast<const char *>(Data), argv0, Size)) {
-    fprintf(stderr, "BINGO %s\n", argv0);
-    exit(1);
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LargeTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LargeTest.cpp
deleted file mode 100644
index 83ed61971801..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LargeTest.cpp
+++ /dev/null
@@ -1,37 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// A fuzz target with lots of edges.
-#include <cstdint>
-#include <cstdlib>
-
-static inline void break_optimization(const void *arg) {
-    __asm__ __volatile__("" : : "r" (arg) : "memory");
-}
-
-#define A                                         \
-  do {                                            \
-    i++;                                          \
-    c++;                                          \
-    if (Data[(i + __LINE__) % Size] == (c % 256)) \
-      break_optimization(Data);                   \
-    else                                          \
-      break_optimization(0);                      \
-  } while (0)
-
-// for (int i = 0, n = Data[(__LINE__ - 1) % Size] % 16; i < n; i++)
-
-#define B do{A; A; A; A; A; A; A; A; A; A; A; A; A; A; A; A; A; A; }while(0)
-#define C do{B; B; B; B; B; B; B; B; B; B; B; B; B; B; B; B; B; B; }while(0)
-#define D do{C; C; C; C; C; C; C; C; C; C; C; C; C; C; C; C; C; C; }while(0)
-#define E do{D; D; D; D; D; D; D; D; D; D; D; D; D; D; D; D; D; D; }while(0)
-
-volatile int sink;
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (!Size) return 0;
-  int c = 0;
-  int i = 0;
-  D;
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LeakTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LeakTest.cpp
deleted file mode 100644
index ea89e3901057..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LeakTest.cpp
+++ /dev/null
@@ -1,17 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test with a leak.
-#include <cstddef>
-#include <cstdint>
-
-static volatile void *Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 0 && *Data == 'H') {
-    Sink = new int;
-    Sink = nullptr;
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LeakTimeoutTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LeakTimeoutTest.cpp
deleted file mode 100644
index 92526194a508..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LeakTimeoutTest.cpp
+++ /dev/null
@@ -1,17 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test with a leak.
-#include <cstddef>
-#include <cstdint>
-
-static volatile int *Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (!Size) return 0;
-  Sink = new int;
-  Sink = new int;
-  while (Sink) *Sink = 0;  // Infinite loop.
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LoadTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LoadTest.cpp
deleted file mode 100644
index 67a28c7cb22f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/LoadTest.cpp
+++ /dev/null
@@ -1,22 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer: find interesting value of array index.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-#include <iostream>
-
-static volatile int Sink;
-const int kArraySize = 1234567;
-int array[kArraySize];
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 8) return 0;
-  uint64_t a = 0;
-  memcpy(&a, Data, 8);
-  Sink = array[a % (kArraySize + 1)];
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/Memcmp64BytesTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/Memcmp64BytesTest.cpp
deleted file mode 100644
index 5b6cb707173f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/Memcmp64BytesTest.cpp
+++ /dev/null
@@ -1,20 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find a particular string.
-#include <cassert>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  const char kString64Bytes[] =
-      "123456789 123456789 123456789 123456789 123456789 123456789 1234";
-  assert(sizeof(kString64Bytes) == 65);
-  if (Size >= 64 && memcmp(Data, kString64Bytes, 64) == 0) {
-    fprintf(stderr, "BINGO\n");
-    exit(1);
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/MemcmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/MemcmpTest.cpp
deleted file mode 100644
index 8dbb7d84fbba..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/MemcmpTest.cpp
+++ /dev/null
@@ -1,31 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find a particular string.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  // TODO: check other sizes.
-  if (Size >= 8 && memcmp(Data, "01234567", 8) == 0) {
-    if (Size >= 12 && memcmp(Data + 8, "ABCD", 4) == 0) {
-      if (Size >= 14 && memcmp(Data + 12, "XY", 2) == 0) {
-        if (Size >= 17 && memcmp(Data + 14, "KLM", 3) == 0) {
-          if (Size >= 27 && memcmp(Data + 17, "ABCDE-GHIJ", 10) == 0){
-            fprintf(stderr, "BINGO %zd\n", Size);
-            for (size_t i = 0; i < Size; i++) {
-              uint8_t C = Data[i];
-              if (C >= 32 && C < 127)
-                fprintf(stderr, "%c", C);
-            }
-            fprintf(stderr, "\n");
-            exit(1);
-          }
-        }
-      }
-    }
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NotinstrumentedTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NotinstrumentedTest.cpp
deleted file mode 100644
index 91418990b192..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NotinstrumentedTest.cpp
+++ /dev/null
@@ -1,11 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// This test should not be instrumented.
-#include <cstddef>
-#include <cstdint>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NthRunCrashTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NthRunCrashTest.cpp
deleted file mode 100644
index da5fbd33e962..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NthRunCrashTest.cpp
+++ /dev/null
@@ -1,18 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Crash on the N-th execution.
-#include <cstddef>
-#include <cstdint>
-#include <iostream>
-
-static int Counter;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Counter++ == 1000) {
-    std::cout << "BINGO; Found the target, exiting\n";
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NullDerefOnEmptyTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NullDerefOnEmptyTest.cpp
deleted file mode 100644
index 459db51f8a3b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NullDerefOnEmptyTest.cpp
+++ /dev/null
@@ -1,19 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the empty string.
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-static volatile int *Null = 0;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size == 0) {
-    std::cout << "Found the target, dereferencing NULL\n";
-    *Null = 1;
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NullDerefTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NullDerefTest.cpp
deleted file mode 100644
index 1b44b682ace6..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/NullDerefTest.cpp
+++ /dev/null
@@ -1,26 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the string "Hi!".
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-static volatile int Sink;
-static volatile int *Null = 0;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 0 && Data[0] == 'H') {
-    Sink = 1;
-    if (Size > 1 && Data[1] == 'i') {
-      Sink = 2;
-      if (Size > 2 && Data[2] == '!') {
-        std::cout << "Found the target, dereferencing NULL\n";
-        *Null = 1;
-      }
-    }
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OneHugeAllocTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OneHugeAllocTest.cpp
deleted file mode 100644
index 32a557871000..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OneHugeAllocTest.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Tests OOM handling when there is a single large allocation.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <cstring>
-#include <iostream>
-
-static volatile char *SinkPtr;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 0 && Data[0] == 'H') {
-    if (Size > 1 && Data[1] == 'i') {
-      if (Size > 2 && Data[2] == '!') {
-        size_t kSize = (size_t)1 << 31;
-        char *p = new char[kSize];
-        memset(p, 0, kSize);
-        SinkPtr = p;
-        delete [] p;
-      }
-    }
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OutOfMemorySingleLargeMallocTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OutOfMemorySingleLargeMallocTest.cpp
deleted file mode 100644
index a07795a08dff..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OutOfMemorySingleLargeMallocTest.cpp
+++ /dev/null
@@ -1,27 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Tests OOM handling.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <cstring>
-#include <iostream>
-
-static volatile char *SinkPtr;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 0 && Data[0] == 'H') {
-    if (Size > 1 && Data[1] == 'i') {
-      if (Size > 2 && Data[2] == '!') {
-          size_t kSize = 0x20000000U;
-          char *p = new char[kSize];
-          SinkPtr = p;
-          delete [] p;
-      }
-    }
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OutOfMemoryTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OutOfMemoryTest.cpp
deleted file mode 100644
index 5e59bde09853..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OutOfMemoryTest.cpp
+++ /dev/null
@@ -1,31 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Tests OOM handling.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <cstring>
-#include <iostream>
-#include <thread>
-
-static volatile char *SinkPtr;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 0 && Data[0] == 'H') {
-    if (Size > 1 && Data[1] == 'i') {
-      if (Size > 2 && Data[2] == '!') {
-        while (true) {
-          size_t kSize = 1 << 28;
-          char *p = new char[kSize];
-          memset(p, 0, kSize);
-          SinkPtr = p;
-          std::this_thread::sleep_for(std::chrono::seconds(1));
-        }
-      }
-    }
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OverwriteInputTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OverwriteInputTest.cpp
deleted file mode 100644
index e688682346a6..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/OverwriteInputTest.cpp
+++ /dev/null
@@ -1,13 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. Make sure we abort if Data is overwritten.
-#include <cstdint>
-#include <iostream>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size)
-    *const_cast<uint8_t*>(Data) = 1;
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/RepeatedBytesTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/RepeatedBytesTest.cpp
deleted file mode 100644
index 14222f284747..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/RepeatedBytesTest.cpp
+++ /dev/null
@@ -1,29 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find repeated bytes.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  assert(Data);
-  // Looking for AAAAAAAAAAAAAAAAAAAAAA or some such.
-  size_t CurA = 0, MaxA = 0;
-  for (size_t i = 0; i < Size; i++) {
-    // Make sure there are no conditionals in the loop so that
-    // coverage can't help the fuzzer.
-    int EQ = Data[i] == 'A';
-    CurA = EQ * (CurA + 1);
-    int GT = CurA > MaxA;
-    MaxA = GT * CurA + (!GT) * MaxA;
-  }
-  if (MaxA >= 20) {
-    std::cout << "BINGO; Found the target (Max: " << MaxA << "), exiting\n";
-    exit(0);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/RepeatedMemcmp.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/RepeatedMemcmp.cpp
deleted file mode 100644
index 18369deac3b0..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/RepeatedMemcmp.cpp
+++ /dev/null
@@ -1,24 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  int Matches1 = 0;
-  for (size_t i = 0; i + 2 < Size; i += 3)
-    if (!memcmp(Data + i, "foo", 3))
-      Matches1++;
-  int Matches2 = 0;
-  for (size_t i = 0; i + 2 < Size; i += 3)
-    if (!memcmp(Data + i, "bar", 3))
-      Matches2++;
-
-  if (Matches1 > 10 && Matches2 > 10) {
-    fprintf(stderr, "BINGO!\n");
-    exit(1);
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkControlFlowSimpleTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkControlFlowSimpleTest.cpp
deleted file mode 100644
index 0afd26df23a0..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkControlFlowSimpleTest.cpp
+++ /dev/null
@@ -1,19 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test that we can find the minimal item in the corpus (3 bytes: "FUZ").
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 2) return 0;
-  if (Data[0] == 'F' && Data[Size / 2] == 'U' && Data[Size - 1] == 'Z')
-    Sink++;
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkControlFlowTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkControlFlowTest.cpp
deleted file mode 100644
index 37eeede7cbff..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkControlFlowTest.cpp
+++ /dev/null
@@ -1,29 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test that we can find the minimal item in the corpus (3 bytes: "FUZ").
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 64) return 0;
-  int8_t Ids[256];
-  memset(Ids, -1, sizeof(Ids));
-  for (size_t i = 0; i < Size; i++)
-    if (Ids[Data[i]] == -1)
-      Ids[Data[i]] = i;
-  int F = Ids[(unsigned char)'F'];
-  int U = Ids[(unsigned char)'U'];
-  int Z = Ids[(unsigned char)'Z'];
-  if (F >= 0 && U > F && Z > U) {
-    Sink++;
-    //fprintf(stderr, "IDS: %d %d %d\n", F, U, Z);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkValueProfileTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkValueProfileTest.cpp
deleted file mode 100644
index 86e4e3cb0d9a..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ShrinkValueProfileTest.cpp
+++ /dev/null
@@ -1,22 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test that we can find the minimal item in the corpus (3 bytes: "FUZ").
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-static volatile uint32_t Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < sizeof(uint32_t)) return 0;
-  uint32_t X, Y;
-  size_t Offset = Size < 8 ? 0 : Size / 2;
-  memcpy(&X, Data + Offset, sizeof(uint32_t));
-  memcpy(&Y, "FUZZ", sizeof(uint32_t));
-  Sink = X == Y;
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SignedIntOverflowTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SignedIntOverflowTest.cpp
deleted file mode 100644
index d80060207dee..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SignedIntOverflowTest.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test for signed-integer-overflow.
-#include <assert.h>
-#include <climits>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-static volatile int Sink;
-static int Large = INT_MAX;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  assert(Data);
-  if (Size > 0 && Data[0] == 'H') {
-    Sink = 1;
-    if (Size > 1 && Data[1] == 'i') {
-      Sink = 2;
-      if (Size > 2 && Data[2] == '!') {
-        Large++;  // int overflow.
-      }
-    }
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleCmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleCmpTest.cpp
deleted file mode 100644
index 8acad4ac77e8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleCmpTest.cpp
+++ /dev/null
@@ -1,47 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find several narrow ranges.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern int AllLines[];
-
-bool PrintOnce(int Line) {
-  if (!AllLines[Line])
-    fprintf(stderr, "Seen line %d\n", Line);
-  AllLines[Line] = 1;
-  return true;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size != 22) return 0;
-  uint64_t x = 0;
-  int64_t  y = 0;
-  int32_t z = 0;
-  uint16_t a = 0;
-  memcpy(&x, Data, 8);  // 8
-  memcpy(&y, Data + 8, 8);  // 16
-  memcpy(&z, Data + 16, sizeof(z));  // 20
-  memcpy(&a, Data + 20, sizeof(a));  // 22
-  const bool k32bit = sizeof(void*) == 4;
-
-  if ((k32bit || x > 1234567890) && PrintOnce(__LINE__) &&
-      (k32bit || x < 1234567895) && PrintOnce(__LINE__) &&
-      a == 0x4242 && PrintOnce(__LINE__) &&
-      (k32bit || y >= 987654321) && PrintOnce(__LINE__) &&
-      (k32bit || y <= 987654325) && PrintOnce(__LINE__) &&
-      z < -10000 && PrintOnce(__LINE__) &&
-      z >= -10005 && PrintOnce(__LINE__) &&
-      z != -10003 && PrintOnce(__LINE__) &&
-      true) {
-    fprintf(stderr, "BINGO; Found the target: size %zd (%zd, %zd, %d, %d), exiting.\n",
-            Size, x, y, z, a);
-    exit(1);
-  }
-  return 0;
-}
-
-int AllLines[__LINE__ + 1];  // Must be the last line.
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleDictionaryTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleDictionaryTest.cpp
deleted file mode 100644
index a1cd20047224..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleDictionaryTest.cpp
+++ /dev/null
@@ -1,29 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer.
-// The fuzzer must find a string based on dictionary words:
-//   "Elvis"
-//   "Presley"
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <cstring>
-#include <iostream>
-
-static volatile int Zero = 0;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  const char *Expected = "ElvisPresley";
-  if (Size < strlen(Expected)) return 0;
-  size_t Match = 0;
-  for (size_t i = 0; Expected[i]; i++)
-    if (Expected[i] + Zero == Data[i])
-      Match++;
-  if (Match == strlen(Expected)) {
-    std::cout << "BINGO; Found the target, exiting\n";
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleHashTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleHashTest.cpp
deleted file mode 100644
index a3f4211ebeef..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleHashTest.cpp
+++ /dev/null
@@ -1,40 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// This test computes a checksum of the data (all but the last 4 bytes),
-// and then compares the last 4 bytes with the computed value.
-// A fuzzer with cmp traces is expected to defeat this check.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-// A modified jenkins_one_at_a_time_hash initialized by non-zero,
-// so that simple_hash(0) != 0. See also
-// https://en.wikipedia.org/wiki/Jenkins_hash_function
-static uint32_t simple_hash(const uint8_t *Data, size_t Size) {
-  uint32_t Hash = 0x12039854;
-  for (uint32_t i = 0; i < Size; i++) {
-    Hash += Data[i];
-    Hash += (Hash << 10);
-    Hash ^= (Hash >> 6);
-  }
-  Hash += (Hash << 3);
-  Hash ^= (Hash >> 11);
-  Hash += (Hash << 15);
-  return Hash;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 14 || Size > 64)
-    return 0;
-
-  uint32_t Hash = simple_hash(&Data[0], Size - 4);
-  uint32_t Want = reinterpret_cast<const uint32_t *>(&Data[Size - 4])[0];
-  if (Hash != Want)
-    return 0;
-  fprintf(stderr, "BINGO; simple_hash defeated: %x == %x\n", (unsigned int)Hash,
-          (unsigned int)Want);
-  exit(1);
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleTest.cpp
deleted file mode 100644
index a8b4988dff10..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleTest.cpp
+++ /dev/null
@@ -1,27 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the string "Hi!".
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  assert(Data);
-  if (Size > 0 && Data[0] == 'H') {
-    Sink = 1;
-    if (Size > 1 && Data[1] == 'i') {
-      Sink = 2;
-      if (Size > 2 && Data[2] == '!') {
-        std::cout << "BINGO; Found the target, exiting\n";
-        exit(0);
-      }
-    }
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleThreadedTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleThreadedTest.cpp
deleted file mode 100644
index 1abdc3fc6d6b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SimpleThreadedTest.cpp
+++ /dev/null
@@ -1,25 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Threaded test for a fuzzer. The fuzzer should find "H"
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-#include <iostream>
-#include <thread>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  auto C = [&] {
-    if (Size >= 2 && Data[0] == 'H') {
-        std::cout << "BINGO; Found the target, exiting\n";
-        abort();
-    }
-  };
-  std::thread T[] = {std::thread(C), std::thread(C), std::thread(C),
-                     std::thread(C), std::thread(C), std::thread(C)};
-  for (auto &X : T)
-    X.join();
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleByteInputTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleByteInputTest.cpp
deleted file mode 100644
index 72b58ba912eb..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleByteInputTest.cpp
+++ /dev/null
@@ -1,17 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer, need just one byte to crash.
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 0 && Data[Size/2] == 42) {
-    fprintf(stderr, "BINGO\n");
-    abort();
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleMemcmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleMemcmpTest.cpp
deleted file mode 100644
index 83c09e0428ec..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleMemcmpTest.cpp
+++ /dev/null
@@ -1,17 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find a particular string.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  char *S = (char*)Data;
-  if (Size >= 6 && !memcmp(S, "qwerty", 6)) {
-    fprintf(stderr, "BINGO\n");
-    exit(1);
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleStrcmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleStrcmpTest.cpp
deleted file mode 100644
index 149073444c9c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleStrcmpTest.cpp
+++ /dev/null
@@ -1,21 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find a particular string.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size >= 7) {
-    char Copy[7];
-    memcpy(Copy, Data, 6);
-    Copy[6] = 0;
-    if (!strcmp(Copy, "qwerty")) {
-      fprintf(stderr, "BINGO\n");
-      exit(1);
-    }
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleStrncmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleStrncmpTest.cpp
deleted file mode 100644
index b38c7995d8ff..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SingleStrncmpTest.cpp
+++ /dev/null
@@ -1,19 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find a particular string.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 64) return 0;
-  char *S = (char*)Data;
-  volatile auto Strncmp = &(strncmp);   // Make sure strncmp is not inlined.
-  if (Size >= 6 && !Strncmp(S, "qwerty", 6)) {
-    fprintf(stderr, "BINGO\n");
-    exit(1);
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SpamyTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SpamyTest.cpp
deleted file mode 100644
index 721134e1841c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SpamyTest.cpp
+++ /dev/null
@@ -1,21 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// The test spams to stderr and stdout.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <iostream>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  assert(Data);
-  printf("PRINTF_STDOUT\n");
-  fflush(stdout);
-  fprintf(stderr, "PRINTF_STDERR\n");
-  std::cout << "STREAM_COUT\n";
-  std::cout.flush();
-  std::cerr << "STREAM_CERR\n";
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrcmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrcmpTest.cpp
deleted file mode 100644
index e7636e8812fc..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrcmpTest.cpp
+++ /dev/null
@@ -1,32 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Break through a series of strcmp.
-#include <cassert>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-bool Eq(const uint8_t *Data, size_t Size, const char *Str) {
-  char Buff[1024];
-  size_t Len = strlen(Str);
-  if (Size < Len) return false;
-  if (Len >= sizeof(Buff)) return false;
-  memcpy(Buff, (char*)Data, Len);
-  Buff[Len] = 0;
-  int res = strcmp(Buff, Str);
-  return res == 0;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Eq(Data, Size, "ABC") &&
-      Size >= 3 && Eq(Data + 3, Size - 3, "QWER") &&
-      Size >= 7 && Eq(Data + 7, Size - 7, "ZXCVN") &&
-      Size >= 14 && Data[13] == 42
-    ) {
-    fprintf(stderr, "BINGO\n");
-    exit(1);
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrncmpOOBTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrncmpOOBTest.cpp
deleted file mode 100644
index 4ed71d9d021d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrncmpOOBTest.cpp
+++ /dev/null
@@ -1,21 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test that libFuzzer itself does not read out of bounds.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <cstring>
-#include <iostream>
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 5) return 0;
-  const char *Ch = reinterpret_cast<const char *>(Data);
-  if (Ch[Size - 3] == 'a')
-    Sink = strncmp(Ch + Size - 3, "abcdefg", 6);
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrncmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrncmpTest.cpp
deleted file mode 100644
index f71f01ee3098..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrncmpTest.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find a particular string.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-static volatile int sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  // TODO: check other sizes.
-  char *S = (char*)Data;
-  if (Size >= 8 && strncmp(S, "123", 8))
-    sink = 1;
-  if (Size >= 8 && strncmp(S, "01234567", 8) == 0) {
-    if (Size >= 12 && strncmp(S + 8, "ABCD", 4) == 0) {
-      if (Size >= 14 && strncmp(S + 12, "XY", 2) == 0) {
-        if (Size >= 17 && strncmp(S + 14, "KLM", 3) == 0) {
-          fprintf(stderr, "BINGO\n");
-          exit(1);
-        }
-      }
-    }
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrstrTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrstrTest.cpp
deleted file mode 100644
index a3ea4e03b3d2..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/StrstrTest.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Test strstr and strcasestr hooks.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <string.h>
-#include <string>
-
-// Windows does not have strcasestr and memmem, so we are not testing them.
-#ifdef _WIN32
-#define strcasestr strstr
-#define memmem(a, b, c, d) true
-#endif
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 4) return 0;
-  std::string s(reinterpret_cast<const char*>(Data), Size);
-  if (strstr(s.c_str(), "FUZZ") &&
-      strcasestr(s.c_str(), "aBcD") &&
-      memmem(s.data(), s.size(), "kuku", 4)
-      ) {
-    fprintf(stderr, "BINGO\n");
-    exit(1);
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SwapCmpTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SwapCmpTest.cpp
deleted file mode 100644
index bbfbefe6ab71..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SwapCmpTest.cpp
+++ /dev/null
@@ -1,35 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// The fuzzer must find several constants with swapped bytes.
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 14) return 0;
-  uint64_t x = 0;
-  uint32_t y = 0;
-  uint16_t z = 0;
-  memcpy(&x, Data, sizeof(x));
-  memcpy(&y, Data + Size / 2, sizeof(y));
-  memcpy(&z, Data + Size - sizeof(z), sizeof(z));
-
-  x = __builtin_bswap64(x);
-  y = __builtin_bswap32(y);
-  z = __builtin_bswap16(z);
-  const bool k32bit = sizeof(void*) == 4;
-
-  if ((k32bit || x == 0x46555A5A5A5A5546ULL) &&
-      z == 0x4F4B &&
-      y == 0x66757A7A &&
-      true
-      ) {
-    if (Data[Size - 3] == 'z') {
-      fprintf(stderr, "BINGO; Found the target\n");
-      exit(1);
-    }
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/Switch2Test.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/Switch2Test.cpp
deleted file mode 100644
index 5f66ac8b499e..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/Switch2Test.cpp
+++ /dev/null
@@ -1,35 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the interesting switch value.
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-int Switch(int a) {
-  switch(a) {
-    case 100001: return 1;
-    case 100002: return 2;
-    case 100003: return 4;
-  }
-  return 0;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  const int N = 3;
-  if (Size < N * sizeof(int)) return 0;
-  int Res = 0;
-  for (int i = 0; i < N; i++) {
-    int X;
-    memcpy(&X, Data + i * sizeof(int), sizeof(int));
-    Res += Switch(X);
-  }
-  if (Res == 5 || Res == 3 || Res == 6 || Res == 7) {
-    fprintf(stderr, "BINGO; Found the target, exiting; Res=%d\n", Res);
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SwitchTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SwitchTest.cpp
deleted file mode 100644
index 86944cad21c5..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/SwitchTest.cpp
+++ /dev/null
@@ -1,58 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the interesting switch value.
-#include <cstddef>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-
-static volatile int Sink;
-
-template<class T>
-bool Switch(const uint8_t *Data, size_t Size) {
-  T X;
-  if (Size < sizeof(X)) return false;
-  memcpy(&X, Data, sizeof(X));
-  switch (X) {
-    case 1: Sink = __LINE__; break;
-    case 101: Sink = __LINE__; break;
-    case 1001: Sink = __LINE__; break;
-    case 10001: Sink = __LINE__; break;
-    case 100001: Sink = __LINE__; break;
-    case 1000001: Sink = __LINE__; break;
-    case 10000001: Sink = __LINE__; break;
-    case 100000001: return true;
-  }
-  return false;
-}
-
-bool ShortSwitch(const uint8_t *Data, size_t Size) {
-  short X;
-  if (Size < sizeof(short)) return false;
-  memcpy(&X, Data, sizeof(short));
-  switch(X) {
-    case 42: Sink = __LINE__; break;
-    case 402: Sink = __LINE__; break;
-    case 4002: Sink = __LINE__; break;
-    case 5002: Sink = __LINE__; break;
-    case 7002: Sink = __LINE__; break;
-    case 9002: Sink = __LINE__; break;
-    case 14002: Sink = __LINE__; break;
-    case 21402: return true;
-  }
-  return false;
-}
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size >= 4  && Switch<int>(Data, Size) &&
-      Size >= 12 && Switch<uint64_t>(Data + 4, Size - 4) &&
-      Size >= 14 && ShortSwitch(Data + 12, 2)
-    ) {
-    fprintf(stderr, "BINGO; Found the target, exiting\n");
-    exit(1);
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TableLookupTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TableLookupTest.cpp
deleted file mode 100644
index 4d8ab0611cde..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TableLookupTest.cpp
+++ /dev/null
@@ -1,44 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Make sure the fuzzer eventually finds all possible values of a variable
-// within a range.
-#include <cassert>
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <cstring>
-#include <set>
-
-const size_t N = 1 << 12;
-
-// Define an array of counters that will be understood by libFuzzer
-// as extra coverage signal. The array must be:
-//  * uint8_t
-//  * in the section named __libfuzzer_extra_counters.
-// The target code may declare more than one such array.
-//
-// Use either `Counters[Idx] = 1` or `Counters[Idx]++;`
-// depending on whether multiple occurrences of the event 'Idx'
-// is important to distinguish from one occurrence.
-#ifdef __linux__
-__attribute__((section("__libfuzzer_extra_counters")))
-#endif
-static uint8_t Counters[N];
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  static std::set<uint16_t> SeenIdx;
-  if (Size != 4) return 0;
-  uint32_t Idx;
-  memcpy(&Idx, Data, 4);
-  Idx %= N;
-  assert(Counters[Idx] == 0);  // libFuzzer should reset these between the runs.
-  // Or Counters[Idx]=1 if we don't care how many times this happened.
-  Counters[Idx]++;
-  SeenIdx.insert(Idx);
-  if (SeenIdx.size() == N) {
-    fprintf(stderr, "BINGO: found all values\n");
-    abort();
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ThreadedLeakTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ThreadedLeakTest.cpp
deleted file mode 100644
index 538d3b434808..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ThreadedLeakTest.cpp
+++ /dev/null
@@ -1,18 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// The fuzzer should find a leak in a non-main thread.
-#include <cstddef>
-#include <cstdint>
-#include <thread>
-
-static volatile int *Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size == 0) return 0;
-  if (Data[0] != 'F') return 0;
-  std::thread T([&] { Sink = new int; });
-  T.join();
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ThreadedTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ThreadedTest.cpp
deleted file mode 100644
index bb51ba764eba..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ThreadedTest.cpp
+++ /dev/null
@@ -1,26 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Threaded test for a fuzzer. The fuzzer should not crash.
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstring>
-#include <thread>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 8) return 0;
-  assert(Data);
-  auto C = [&] {
-    size_t Res = 0;
-    for (size_t i = 0; i < Size / 2; i++)
-      Res += memcmp(Data, Data + Size / 2, 4);
-    return Res;
-  };
-  std::thread T[] = {std::thread(C), std::thread(C), std::thread(C),
-                     std::thread(C), std::thread(C), std::thread(C)};
-  for (auto &X : T)
-    X.join();
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TimeoutEmptyTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TimeoutEmptyTest.cpp
deleted file mode 100644
index 1ddf1fa34589..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TimeoutEmptyTest.cpp
+++ /dev/null
@@ -1,14 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the empty string.
-#include <cstddef>
-#include <cstdint>
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  static volatile int Zero = 0;
-  if (!Size)
-    while(!Zero)
-      ;
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TimeoutTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TimeoutTest.cpp
deleted file mode 100644
index e3cdba3eec38..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TimeoutTest.cpp
+++ /dev/null
@@ -1,26 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. The fuzzer must find the string "Hi!".
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-static volatile int Sink;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size > 0 && Data[0] == 'H') {
-    Sink = 1;
-    if (Size > 1 && Data[1] == 'i') {
-      Sink = 2;
-      if (Size > 2 && Data[2] == '!') {
-        Sink = 2;
-        while (Sink)
-          ;
-      }
-    }
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TraceMallocTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TraceMallocTest.cpp
deleted file mode 100644
index af9975603aa1..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TraceMallocTest.cpp
+++ /dev/null
@@ -1,27 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Tests -trace_malloc
-#include <assert.h>
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-int *Ptr;
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (!Size) return 0;
-  if (*Data == 1) {
-    delete Ptr;
-    Ptr = nullptr;
-  } else if (*Data == 2) {
-    delete Ptr;
-    Ptr = new int;
-  } else if (*Data == 3) {
-    if (!Ptr)
-      Ptr = new int;
-  }
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TwoDifferentBugsTest.cpp b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TwoDifferentBugsTest.cpp
deleted file mode 100644
index 77d2cb1a25f9..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/TwoDifferentBugsTest.cpp
+++ /dev/null
@@ -1,22 +0,0 @@
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-
-// Simple test for a fuzzer. This test may trigger two different bugs.
-#include <cstddef>
-#include <cstdint>
-#include <cstdlib>
-#include <iostream>
-
-static volatile int *Null = 0;
-
-void Foo() { Null[1] = 0; }
-void Bar() { Null[2] = 0; }
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
-  if (Size < 10 && Data[0] == 'H')
-    Foo();
-  if (Size >= 10 && Data[0] == 'H')
-    Bar();
-  return 0;
-}
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver-extra-stats.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver-extra-stats.test
deleted file mode 100644
index 1b0818e55ea5..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver-extra-stats.test
+++ /dev/null
@@ -1,30 +0,0 @@
-REQUIRES: posix
-
-; Test that not specifying an extra stats file isn't broken.
-RUN: unset AFL_DRIVER_EXTRA_STATS_FILENAME
-RUN: AFLDriverTest
-
-; Test that specifying an invalid extra stats file causes a crash.
-RUN: ASAN_OPTIONS= AFL_DRIVER_EXTRA_STATS_FILENAME=%T not --crash AFLDriverTest
-
-; Test that specifying a corrupted stats file causes a crash.
-echo "peak_rss_mb :0" > %t
-ASAN_OPTIONS= AFL_DRIVER_EXTRA_STATS_FILENAME=%t not --crash AFLDriverTest
-
-; Test that specifying a valid nonexistent stats file works.
-RUN: rm -f %t
-RUN: AFL_DRIVER_EXTRA_STATS_FILENAME=%t AFLDriverTest
-RUN: [[ $(grep "peak_rss_mb\|slowest_unit_time_sec" %t | wc -l) -eq 2 ]]
-
-; Test that specifying a valid preexisting stats file works.
-RUN: printf "peak_rss_mb : 0\nslowest_unit_time_sec: 0\n" > %t
-RUN: AFL_DRIVER_EXTRA_STATS_FILENAME=%t AFLDriverTest
-; Check that both lines were printed.
-RUN: [[ $(grep "peak_rss_mb\|slowest_unit_time_sec" %t | wc -l) -eq 2 ]]
-
-; Test that peak_rss_mb and slowest_unit_time_in_secs are only updated when necessary.
-; Check that both lines have 9999 since there's no way we have exceeded that
-; amount of time or virtual memory.
-RUN: printf "peak_rss_mb : 9999\nslowest_unit_time_sec: 9999\n" > %t
-RUN: AFL_DRIVER_EXTRA_STATS_FILENAME=%t AFLDriverTest
-RUN: [[ $(grep "9999" %t | wc -l) -eq 2 ]]
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver-stderr.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver-stderr.test
deleted file mode 100644
index e835acd4275b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver-stderr.test
+++ /dev/null
@@ -1,12 +0,0 @@
-REQUIRES: posix
-
-; Test that not specifying a stderr file isn't broken.
-RUN: unset AFL_DRIVER_STDERR_DUPLICATE_FILENAME
-RUN: AFLDriverTest
-
-; Test that specifying an invalid file causes a crash.
-RUN: ASAN_OPTIONS= AFL_DRIVER_STDERR_DUPLICATE_FILENAME="%T" not --crash AFLDriverTest
-
-; Test that a file is created when specified as the duplicate stderr.
-RUN: AFL_DRIVER_STDERR_DUPLICATE_FILENAME=%t AFLDriverTest
-RUN: stat %t
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver.test
deleted file mode 100644
index 6eab23cc3636..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/afl-driver.test
+++ /dev/null
@@ -1,26 +0,0 @@
-REQUIRES: linux
-RUN: echo -n "abc" > %t.file3
-RUN: echo -n "abcd" > %t.file4
-
-RUN: AFLDriverTest < %t.file3 2>&1 | FileCheck %s --check-prefix=CHECK1
-CHECK1: __afl_persistent_loop calle, Count = 1000
-CHECK1: LLVMFuzzerTestOneInput called; Size = 3
-
-
-RUN: AFLDriverTest < %t.file3 -42 2>&1 | FileCheck %s --check-prefix=CHECK2
-CHECK2: __afl_persistent_loop calle, Count = 42
-CHECK2: LLVMFuzzerTestOneInput called; Size = 3
-
-
-RUN: AFLDriverTest < %t.file3 666 2>&1 | FileCheck %s --check-prefix=CHECK3
-CHECK3: WARNING: using the deprecated call style
-CHECK3: __afl_persistent_loop calle, Count = 666
-CHECK3: LLVMFuzzerTestOneInput called; Size = 3
-
-
-RUN: AFLDriverTest %t.file3 2>&1 | FileCheck %s --check-prefix=CHECK4
-CHECK4: LLVMFuzzerTestOneInput called; Size = 3
-
-RUN: AFLDriverTest %t.file3 %t.file4  2>&1 | FileCheck %s --check-prefix=CHECK5
-CHECK5: LLVMFuzzerTestOneInput called; Size = 3
-CHECK5: LLVMFuzzerTestOneInput called; Size = 4
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/bad-strcmp.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/bad-strcmp.test
deleted file mode 100644
index 9a2f3742a5f4..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/bad-strcmp.test
+++ /dev/null
@@ -1 +0,0 @@
-RUN: LLVMFuzzer-BadStrcmpTest -runs=100000
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/caller-callee.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/caller-callee.test
deleted file mode 100644
index 76a951c5e0ea..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/caller-callee.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-CallerCalleeTest          -use_value_profile=1 -cross_over=0 -max_len=6 -seed=1 -runs=10000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/cleanse.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/cleanse.test
deleted file mode 100644
index ad08591d2fa3..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/cleanse.test
+++ /dev/null
@@ -1,3 +0,0 @@
-RUN: echo -n 0123456789ABCDEFGHIZ > %t-in
-RUN: LLVMFuzzer-CleanseTest -cleanse_crash=1 %t-in -exact_artifact_path=%t-out
-RUN: echo -n ' 1   5    A        Z' | diff - %t-out
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/coverage.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/coverage.test
deleted file mode 100644
index ff3fdff57a3d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/coverage.test
+++ /dev/null
@@ -1,21 +0,0 @@
-XFAIL: darwin
-
-CHECK: COVERAGE:
-CHECK-DAG: COVERED: {{.*}}in LLVMFuzzerTestOneInput {{.*}}NullDerefTest.cpp:13
-CHECK-DAG: COVERED: {{.*}}in LLVMFuzzerTestOneInput {{.*}}NullDerefTest.cpp:14
-CHECK-DAG: COVERED: {{.*}}in LLVMFuzzerTestOneInput {{.*}}NullDerefTest.cpp:16
-CHECK-DAG: COVERED: {{.*}}in LLVMFuzzerTestOneInput {{.*}}NullDerefTest.cpp:19
-CHECK: COVERED_DIRS: {{.*}}lib{{[/\\]}}Fuzzer{{[/\\]}}test
-RUN: not LLVMFuzzer-NullDerefTest -print_coverage=1 2>&1 | FileCheck %s
-
-RUN: LLVMFuzzer-DSOTest -print_coverage=1 -runs=0 2>&1 | FileCheck %s --check-prefix=DSO
-DSO: COVERAGE:
-DSO-DAG: COVERED:{{.*}}DSO1{{.*}}DSO1.cpp
-DSO-DAG: COVERED:{{.*}}DSO2{{.*}}DSO2.cpp
-DSO-DAG: COVERED:{{.*}}LLVMFuzzerTestOneInput{{.*}}DSOTestMain
-DSO-DAG: UNCOVERED_LINE:{{.*}}DSO1{{.*}}DSO1.cpp
-DSO-DAG: UNCOVERED_LINE:{{.*}}DSO2{{.*}}DSO2.cpp
-DSO-DAG: UNCOVERED_FUNC: in Uncovered1
-DSO-DAG: UNCOVERED_FUNC: in Uncovered2
-DSO-DAG: UNCOVERED_LINE: in LLVMFuzzerTestOneInput
-DSO-DAG: UNCOVERED_FILE:{{.*}}DSOTestExtra.cpp
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/cxxstring.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/cxxstring.test
deleted file mode 100644
index 52168fc8c822..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/cxxstring.test
+++ /dev/null
@@ -1,4 +0,0 @@
-UNSUPPORTED: windows
-
-RUN: not LLVMFuzzer-CxxStringEqTest -seed=1 -runs=1000000 2>&1 | FileCheck %s
-CHECK: BINGO
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/dict1.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/dict1.txt
deleted file mode 100644
index 520d0cc7b7d8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/dict1.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-# Dictionary for SimpleDictionaryTest
-
-a="Elvis"
-b="Presley"
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/disable-leaks.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/disable-leaks.test
deleted file mode 100644
index 467b64ccc6f4..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/disable-leaks.test
+++ /dev/null
@@ -1,4 +0,0 @@
-REQUIRES: lsan
-RUN: LLVMFuzzer-AccumulateAllocationsTest -detect_leaks=1 -runs=100000 2>&1 | FileCheck %s --check-prefix=ACCUMULATE_ALLOCS
-ACCUMULATE_ALLOCS: INFO: libFuzzer disabled leak detection after every mutation
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/dump_coverage.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/dump_coverage.test
deleted file mode 100644
index bd85ed718e19..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/dump_coverage.test
+++ /dev/null
@@ -1,14 +0,0 @@
-RUN: rm -rf %t_workdir && mkdir -p %t_workdir
-RUN: env ASAN_OPTIONS=coverage_dir='"%t_workdir"' not LLVMFuzzer-NullDerefTest -dump_coverage=1 2>&1 | FileCheck %s
-RUN: sancov -covered-functions LLVMFuzzer-NullDerefTest* %t_workdir/*.sancov | FileCheck %s --check-prefix=SANCOV
-RUN: env ASAN_OPTIONS=coverage_dir='"%t_workdir"' LLVMFuzzer-DSOTest -dump_coverage=1 -runs=0 2>&1 | FileCheck %s --check-prefix=DSO
-RUN: env ASAN_OPTIONS=coverage_dir='"%t_workdir"' not LLVMFuzzer-NullDerefTest -dump_coverage=0 2>&1 | FileCheck %s --check-prefix=NOCOV
-
-CHECK: SanitizerCoverage: {{.*}}LLVMFuzzer-NullDerefTest.{{.*}}.sancov: {{.*}} PCs written
-SANCOV: LLVMFuzzerTestOneInput
-
-DSO: SanitizerCoverage: {{.*}}LLVMFuzzer-DSOTest.{{.*}}.sancov: {{.*}} PCs written
-DSO-DAG: SanitizerCoverage: {{.*}}LLVMFuzzer-DSO1.{{.*}}.sancov: {{.*}} PCs written
-DSO-DAG: SanitizerCoverage: {{.*}}LLVMFuzzer-DSO2.{{.*}}.sancov: {{.*}} PCs written
-
-NOCOV-NOT: SanitizerCoverage: {{.*}} PCs written
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/equivalence-signals.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/equivalence-signals.test
deleted file mode 100644
index 81a7f37602cc..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/equivalence-signals.test
+++ /dev/null
@@ -1,9 +0,0 @@
-REQUIRES: posix
-# Run EquivalenceATest against itself with a small timeout
-# to stress the signal handling and ensure that shmem doesn't mind
-# the signals.
-
-RUN: LLVMFuzzer-EquivalenceATest -timeout=1 -run_equivalence_server=EQUIV_SIG_TEST & export APID=$!
-RUN: sleep 3
-RUN: LLVMFuzzer-EquivalenceATest -timeout=1 -use_equivalence_server=EQUIV_SIG_TEST -runs=500000 2>&1
-RUN: kill -9 $APID
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/equivalence.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/equivalence.test
deleted file mode 100644
index 015ba855c600..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/equivalence.test
+++ /dev/null
@@ -1,8 +0,0 @@
-REQUIRES: posix
-
-RUN: LLVMFuzzer-EquivalenceATest -run_equivalence_server=EQUIV_TEST & export APID=$!
-RUN: sleep 3
-RUN: not LLVMFuzzer-EquivalenceBTest -use_equivalence_server=EQUIV_TEST -max_len=4096 2>&1 | FileCheck %s
-CHECK: ERROR: libFuzzer: equivalence-mismatch. Sizes: {{.*}}; offset 2
-CHECK: SUMMARY: libFuzzer: equivalence-mismatch
-RUN: kill -9 $APID
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/extra-counters.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/extra-counters.test
deleted file mode 100644
index 61fce44784b7..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/extra-counters.test
+++ /dev/null
@@ -1,6 +0,0 @@
-REQUIRES: linux
-
-RUN: not LLVMFuzzer-TableLookupTest -print_final_stats=1 2>&1 | FileCheck %s
-CHECK: BINGO
-// Expecting >= 4096 new_units_added
-CHECK: stat::new_units_added:{{.*[4][0-9][0-9][0-9]}}
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-customcrossover.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-customcrossover.test
deleted file mode 100644
index ccf8261af8ad..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-customcrossover.test
+++ /dev/null
@@ -1,10 +0,0 @@
-RUN: rm -rf %t/CustomCrossover
-RUN: mkdir -p %t/CustomCrossover
-RUN: echo "0123456789" > %t/CustomCrossover/digits
-RUN: echo "abcdefghij" > %t/CustomCrossover/chars
-RUN: not LLVMFuzzer-CustomCrossOverTest -seed=1 -runs=100000 %t/CustomCrossover 2>&1 | FileCheck %s --check-prefix=LLVMFuzzerCustomCrossover
-RUN: rm -rf %t/CustomCrossover
-
-LLVMFuzzerCustomCrossover: In LLVMFuzzerCustomCrossover
-LLVMFuzzerCustomCrossover: BINGO
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-customcrossoverandmutate.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-customcrossoverandmutate.test
deleted file mode 100644
index 1e322ec0da63..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-customcrossoverandmutate.test
+++ /dev/null
@@ -1 +0,0 @@
-RUN: LLVMFuzzer-CustomCrossOverAndMutateTest -seed=1 -runs=100000
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-custommutator.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-custommutator.test
deleted file mode 100644
index fcd740bf5457..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-custommutator.test
+++ /dev/null
@@ -1,4 +0,0 @@
-RUN: not LLVMFuzzer-CustomMutatorTest 2>&1 | FileCheck %s --check-prefix=LLVMFuzzerCustomMutator
-LLVMFuzzerCustomMutator: In LLVMFuzzerCustomMutator
-LLVMFuzzerCustomMutator: BINGO
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-dict.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-dict.test
deleted file mode 100644
index dec002f6a377..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-dict.test
+++ /dev/null
@@ -1,6 +0,0 @@
-CHECK: BINGO
-Done1000000: Done 1000000 runs in
-
-RUN: not LLVMFuzzer-SimpleDictionaryTest -dict=%S/dict1.txt -seed=1 -runs=1000003  2>&1 | FileCheck %s
-RUN:     LLVMFuzzer-SimpleDictionaryTest                    -seed=1 -runs=1000000  2>&1 | FileCheck %s --check-prefix=Done1000000
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-dirs.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-dirs.test
deleted file mode 100644
index 622ff5da3a29..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-dirs.test
+++ /dev/null
@@ -1,19 +0,0 @@
-RUN: rm -rf %t/SUB1
-RUN: mkdir -p %t/SUB1/SUB2/SUB3
-RUN: echo a > %t/SUB1/a
-RUN: echo b > %t/SUB1/SUB2/b
-RUN: echo c > %t/SUB1/SUB2/SUB3/c
-RUN: LLVMFuzzer-SimpleTest %t/SUB1 -runs=0 2>&1 | FileCheck %s --check-prefix=SUBDIRS
-SUBDIRS: READ   units: 3
-RUN: echo -n zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz > %t/SUB1/f64
-RUN: cat %t/SUB1/f64 %t/SUB1/f64 %t/SUB1/f64 %t/SUB1/f64 > %t/SUB1/f256
-RUN: cat %t/SUB1/f256 %t/SUB1/f256 %t/SUB1/f256 %t/SUB1/f256 > %t/SUB1/f1024
-RUN: cat %t/SUB1/f1024 %t/SUB1/f1024 %t/SUB1/f1024 %t/SUB1/f1024 > %t/SUB1/f4096
-RUN: cat %t/SUB1/f4096 %t/SUB1/f4096 > %t/SUB1/f8192
-RUN: LLVMFuzzer-SimpleTest %t/SUB1 -runs=0 2>&1 | FileCheck %s --check-prefix=LONG
-LONG: INFO: -max_len is not provided; libFuzzer will not generate inputs larger than 8192 bytes
-RUN: rm -rf %t/SUB1
-
-RUN: not LLVMFuzzer-SimpleTest NONEXISTENT_DIR 2>&1 | FileCheck %s --check-prefix=NONEXISTENT_DIR
-NONEXISTENT_DIR: No such directory: NONEXISTENT_DIR; exiting
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-fdmask.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-fdmask.test
deleted file mode 100644
index abbc4bd6412f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-fdmask.test
+++ /dev/null
@@ -1,30 +0,0 @@
-RUN: LLVMFuzzer-SpamyTest -runs=1                  2>&1 | FileCheck %s --check-prefix=FD_MASK_0
-RUN: LLVMFuzzer-SpamyTest -runs=1 -close_fd_mask=0 2>&1 | FileCheck %s --check-prefix=FD_MASK_0
-RUN: LLVMFuzzer-SpamyTest -runs=1 -close_fd_mask=1 2>&1 | FileCheck %s --check-prefix=FD_MASK_1
-RUN: LLVMFuzzer-SpamyTest -runs=1 -close_fd_mask=2 2>&1 | FileCheck %s --check-prefix=FD_MASK_2
-RUN: LLVMFuzzer-SpamyTest -runs=1 -close_fd_mask=3 2>&1 | FileCheck %s --check-prefix=FD_MASK_3
-
-FD_MASK_0: PRINTF_STDOUT
-FD_MASK_0: PRINTF_STDERR
-FD_MASK_0: STREAM_COUT
-FD_MASK_0: STREAM_CERR
-FD_MASK_0: INITED
-
-FD_MASK_1-NOT: PRINTF_STDOUT
-FD_MASK_1: PRINTF_STDERR
-FD_MASK_1-NOT: STREAM_COUT
-FD_MASK_1: STREAM_CERR
-FD_MASK_1: INITED
-
-FD_MASK_2: PRINTF_STDOUT
-FD_MASK_2-NOT: PRINTF_STDERR
-FD_MASK_2: STREAM_COUT
-FD_MASK_2-NOTE: STREAM_CERR
-FD_MASK_2: INITED
-
-FD_MASK_3-NOT: PRINTF_STDOUT
-FD_MASK_3-NOT: PRINTF_STDERR
-FD_MASK_3-NOT: STREAM_COUT
-FD_MASK_3-NOT: STREAM_CERR
-FD_MASK_3: INITED
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-finalstats.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-finalstats.test
deleted file mode 100644
index 1cbcd10f0498..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-finalstats.test
+++ /dev/null
@@ -1,11 +0,0 @@
-RUN: LLVMFuzzer-SimpleTest -seed=1 -runs=77 -print_final_stats=1 2>&1 | FileCheck %s --check-prefix=FINAL_STATS
-FINAL_STATS: stat::number_of_executed_units: 77
-FINAL_STATS: stat::average_exec_per_sec:     0
-FINAL_STATS: stat::new_units_added:
-FINAL_STATS: stat::slowest_unit_time_sec:    0
-FINAL_STATS: stat::peak_rss_mb:
-
-RUN: LLVMFuzzer-SimpleTest %S/dict1.txt -runs=33 -print_final_stats=1 2>&1 | FileCheck %s --check-prefix=FINAL_STATS1
-FINAL_STATS1: stat::number_of_executed_units: 33
-FINAL_STATS1: stat::peak_rss_mb:
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-flags.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-flags.test
deleted file mode 100644
index 976da2906d7c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-flags.test
+++ /dev/null
@@ -1,21 +0,0 @@
-# Does not work on windows for unknown reason.
-UNSUPPORTED: windows
-
-RUN: LLVMFuzzer-FlagsTest -foo_bar=1 2>&1 | FileCheck %s --check-prefix=FOO_BAR
-FOO_BAR: WARNING: unrecognized flag '-foo_bar=1'; use -help=1 to list all flags
-FOO_BAR: BINGO
-
-RUN: LLVMFuzzer-FlagsTest -runs=10 --max_len=100 2>&1 | FileCheck %s --check-prefix=DASH_DASH
-DASH_DASH: WARNING: did you mean '-max_len=100' (single dash)?
-DASH_DASH: INFO: A corpus is not provided, starting from an empty corpus
-
-RUN: LLVMFuzzer-FlagsTest -help=1 2>&1 | FileCheck %s --check-prefix=NO_INTERNAL
-NO_INTERNAL-NOT: internal flag
-
-RUN: LLVMFuzzer-FlagsTest --foo-bar -runs=10 -ignore_remaining_args=1 --baz -help=1 test 2>&1 | FileCheck %s --check-prefix=PASSTHRU
-PASSTHRU: BINGO --foo-bar --baz -help=1 test
-
-RUN: mkdir -p %t/T0 %t/T1
-RUN: touch %t/T1/empty
-RUN: LLVMFuzzer-FlagsTest --foo-bar -merge=1 %t/T0 %t/T1 -ignore_remaining_args=1 --baz -help=1 test 2>&1 | FileCheck %s --check-prefix=PASSTHRU-MERGE
-PASSTHRU-MERGE: BINGO --foo-bar --baz -help=1 test
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-leak.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-leak.test
deleted file mode 100644
index 13e3ad740e6d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-leak.test
+++ /dev/null
@@ -1,33 +0,0 @@
-REQUIRES: lsan
-RUN: not LLVMFuzzer-LeakTest -runs=100000 -detect_leaks=1 2>&1 | FileCheck %s --check-prefix=LEAK_DURING
-LEAK_DURING: ERROR: LeakSanitizer: detected memory leaks
-LEAK_DURING: Direct leak of 4 byte(s) in 1 object(s) allocated from:
-LEAK_DURING: INFO: to ignore leaks on libFuzzer side use -detect_leaks=0
-LEAK_DURING: Test unit written to ./leak-
-LEAK_DURING-NOT: DONE
-LEAK_DURING-NOT: Done
-
-RUN: not LLVMFuzzer-LeakTest -runs=0 -detect_leaks=1 %S 2>&1 | FileCheck %s --check-prefix=LEAK_IN_CORPUS
-LEAK_IN_CORPUS: ERROR: LeakSanitizer: detected memory leaks
-LEAK_IN_CORPUS: INFO: a leak has been found in the initial corpus.
-
-RUN: not LLVMFuzzer-LeakTest -runs=100000000 %S/hi.txt 2>&1 | FileCheck %s --check-prefix=MULTI_RUN_LEAK
-MULTI_RUN_LEAK-NOT: pulse
-MULTI_RUN_LEAK: LeakSanitizer: detected memory leaks
-
-RUN: not LLVMFuzzer-LeakTest -runs=100000 -detect_leaks=0 2>&1 | FileCheck %s --check-prefix=LEAK_AFTER
-RUN: not LLVMFuzzer-LeakTest -runs=100000                 2>&1 | FileCheck %s --check-prefix=LEAK_DURING
-RUN: not LLVMFuzzer-ThreadedLeakTest -runs=100000 -detect_leaks=0 2>&1 | FileCheck %s --check-prefix=LEAK_AFTER
-RUN: not LLVMFuzzer-ThreadedLeakTest -runs=100000                 2>&1 | FileCheck %s --check-prefix=LEAK_DURING
-LEAK_AFTER: Done 100000 runs in
-LEAK_AFTER: ERROR: LeakSanitizer: detected memory leaks
-
-RUN: not LLVMFuzzer-LeakTest -runs=100000 -max_len=1 2>&1 | FileCheck %s --check-prefix=MAX_LEN_1
-MAX_LEN_1: Test unit written to ./leak-7cf184f4c67ad58283ecb19349720b0cae756829
-
-RUN: not LLVMFuzzer-LeakTimeoutTest -timeout=1 2>&1 | FileCheck %s --check-prefix=LEAK_TIMEOUT
-LEAK_TIMEOUT: ERROR: libFuzzer: timeout after
-LEAK_TIMEOUT-NOT: LeakSanitizer
-
-
-RUN: LLVMFuzzer-LeakTest -error_exitcode=0
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-oom-with-profile.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-oom-with-profile.test
deleted file mode 100644
index 2b2b0b9d5dae..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-oom-with-profile.test
+++ /dev/null
@@ -1,6 +0,0 @@
-REQUIRES: linux
-RUN: not LLVMFuzzer-OutOfMemoryTest -rss_limit_mb=300 2>&1 | FileCheck %s
-CHECK: ERROR: libFuzzer: out-of-memory (used: {{.*}}; limit: 300Mb)
-CHECK: Live Heap Allocations
-CHECK: Test unit written to ./oom-
-SUMMARY: libFuzzer: out-of-memory
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-oom.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-oom.test
deleted file mode 100644
index 2db91915876e..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-oom.test
+++ /dev/null
@@ -1,12 +0,0 @@
-RUN: not LLVMFuzzer-OutOfMemoryTest -rss_limit_mb=300 2>&1 | FileCheck %s
-
-CHECK: ERROR: libFuzzer: out-of-memory (used: {{.*}}; limit: 300Mb)
-CHECK: Test unit written to ./oom-
-SUMMARY: libFuzzer: out-of-memory
-
-RUN: not LLVMFuzzer-OutOfMemorySingleLargeMallocTest -rss_limit_mb=300 2>&1 | FileCheck %s --check-prefix=SINGLE_LARGE_MALLOC
-SINGLE_LARGE_MALLOC: libFuzzer: out-of-memory (malloc(53{{.*}}))
-SINGLE_LARGE_MALLOC: in LLVMFuzzerTestOneInput
-
-# Check that -rss_limit_mb=0 means no limit.
-RUN: LLVMFuzzer-AccumulateAllocationsTest -runs=1000 -rss_limit_mb=0
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-printcovpcs.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-printcovpcs.test
deleted file mode 100644
index e4c6f0ed1df4..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-printcovpcs.test
+++ /dev/null
@@ -1,8 +0,0 @@
-RUN: LLVMFuzzer-SimpleTest -print_pcs=1 -seed=1 2>&1 | FileCheck %s --check-prefix=PCS
-PCS-NOT: NEW_PC
-PCS:INITED
-PCS:NEW_PC: {{0x[a-f0-9]+}}
-PCS:NEW_PC: {{0x[a-f0-9]+}}
-PCS:NEW
-PCS:BINGO
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-runs.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-runs.test
deleted file mode 100644
index 056c44782a15..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-runs.test
+++ /dev/null
@@ -1,8 +0,0 @@
-RUN: mkdir -p %t
-RUN: echo abcd > %t/NthRunCrashTest.in
-RUN: LLVMFuzzer-NthRunCrashTest %t/NthRunCrashTest.in
-RUN: LLVMFuzzer-NthRunCrashTest %t/NthRunCrashTest.in -runs=10
-RUN: not LLVMFuzzer-NthRunCrashTest %t/NthRunCrashTest.in -runs=10000 2>&1 | FileCheck %s
-RUN: rm %t/NthRunCrashTest.in
-CHECK: BINGO
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-seed.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-seed.test
deleted file mode 100644
index f1bdf9e4ae94..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-seed.test
+++ /dev/null
@@ -1,3 +0,0 @@
-RUN: LLVMFuzzer-SimpleCmpTest -seed=-1 -runs=0 2>&1 | FileCheck %s --check-prefix=CHECK_SEED_MINUS_ONE
-CHECK_SEED_MINUS_ONE: Seed: 4294967295
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-segv.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-segv.test
deleted file mode 100644
index 90f01932f652..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-segv.test
+++ /dev/null
@@ -1,7 +0,0 @@
-RUN: env ASAN_OPTIONS=handle_segv=0 not LLVMFuzzer-NullDerefTest 2>&1 | FileCheck %s --check-prefix=LIBFUZZER_OWN_SEGV_HANDLER
-LIBFUZZER_OWN_SEGV_HANDLER: == ERROR: libFuzzer: deadly signal
-LIBFUZZER_OWN_SEGV_HANDLER: SUMMARY: libFuzzer: deadly signal
-LIBFUZZER_OWN_SEGV_HANDLER: Test unit written to ./crash-
-
-RUN: env ASAN_OPTIONS=handle_segv=1 not LLVMFuzzer-NullDerefTest 2>&1 | FileCheck %s --check-prefix=LIBFUZZER_ASAN_SEGV_HANDLER
-LIBFUZZER_ASAN_SEGV_HANDLER: ERROR: AddressSanitizer: {{SEGV|access-violation}} on unknown address
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-singleinputs.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-singleinputs.test
deleted file mode 100644
index 500e5da8faa9..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-singleinputs.test
+++ /dev/null
@@ -1,16 +0,0 @@
-RUN: not LLVMFuzzer-NullDerefTest %S/hi.txt 2>&1 | FileCheck %s --check-prefix=SingleInput
-SingleInput-NOT: Test unit written to ./crash-
-
-RUN: rm -rf  %tmp/SINGLE_INPUTS
-RUN: mkdir -p  %tmp/SINGLE_INPUTS
-RUN: echo aaa > %tmp/SINGLE_INPUTS/aaa
-RUN: echo bbb > %tmp/SINGLE_INPUTS/bbb
-RUN: LLVMFuzzer-SimpleTest            %tmp/SINGLE_INPUTS/aaa %tmp/SINGLE_INPUTS/bbb 2>&1 | FileCheck %s --check-prefix=SINGLE_INPUTS
-RUN: LLVMFuzzer-SimpleTest -max_len=2 %tmp/SINGLE_INPUTS/aaa %tmp/SINGLE_INPUTS/bbb 2>&1 | FileCheck %s --check-prefix=SINGLE_INPUTS
-RUN: rm -rf  %tmp/SINGLE_INPUTS
-SINGLE_INPUTS: LLVMFuzzer-SimpleTest{{.*}}: Running 2 inputs 1 time(s) each.
-SINGLE_INPUTS: aaa in
-SINGLE_INPUTS: bbb in
-SINGLE_INPUTS: NOTE: fuzzing was not performed, you have only
-SINGLE_INPUTS: executed the target code on a fixed set of inputs.
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-threaded.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-threaded.test
deleted file mode 100644
index c58a33456ccb..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-threaded.test
+++ /dev/null
@@ -1,7 +0,0 @@
-CHECK: Done 1000 runs in
-
-RUN: LLVMFuzzer-ThreadedTest -use_traces=1 -runs=1000  2>&1 | FileCheck %s
-RUN: LLVMFuzzer-ThreadedTest -use_traces=1 -runs=1000  2>&1 | FileCheck %s
-RUN: LLVMFuzzer-ThreadedTest -use_traces=1 -runs=1000  2>&1 | FileCheck %s
-RUN: LLVMFuzzer-ThreadedTest -use_traces=1 -runs=1000  2>&1 | FileCheck %s
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-timeout.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-timeout.test
deleted file mode 100644
index beb086711834..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-timeout.test
+++ /dev/null
@@ -1,19 +0,0 @@
-RUN: not LLVMFuzzer-TimeoutTest -timeout=1 2>&1 | FileCheck %s --check-prefix=TimeoutTest
-TimeoutTest: ALARM: working on the last Unit for
-TimeoutTest: Test unit written to ./timeout-
-TimeoutTest: == ERROR: libFuzzer: timeout after
-TimeoutTest: #0
-TimeoutTest: #1
-TimeoutTest: #2
-TimeoutTest: SUMMARY: libFuzzer: timeout
-
-RUN: not LLVMFuzzer-TimeoutTest -timeout=1 %S/hi.txt 2>&1 | FileCheck %s --check-prefix=SingleInputTimeoutTest
-SingleInputTimeoutTest: ALARM: working on the last Unit for {{[1-3]}} seconds
-SingleInputTimeoutTest-NOT: Test unit written to ./timeout-
-
-RUN: LLVMFuzzer-TimeoutTest -timeout=1 -timeout_exitcode=0
-
-RUN: not LLVMFuzzer-TimeoutEmptyTest -timeout=1 2>&1 | FileCheck %s --check-prefix=TimeoutEmptyTest
-TimeoutEmptyTest: ALARM: working on the last Unit for
-TimeoutEmptyTest: == ERROR: libFuzzer: timeout after
-TimeoutEmptyTest: SUMMARY: libFuzzer: timeout
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-traces-hooks.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-traces-hooks.test
deleted file mode 100644
index 77ca4b47bd01..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-traces-hooks.test
+++ /dev/null
@@ -1,17 +0,0 @@
-// FIXME: Support for sanitizer hooks for memcmp and strcmp needs to
-// be implemented in the sanitizer runtime for this test
-UNSUPPORTED: windows
-CHECK: BINGO
-
-RUN: not LLVMFuzzer-MemcmpTest               -seed=1 -runs=2000000   2>&1 | FileCheck %s
-RUN: not LLVMFuzzer-StrncmpTest              -seed=1 -runs=2000000   2>&1 | FileCheck %s
-RUN: not LLVMFuzzer-StrcmpTest               -seed=1 -runs=2000000   2>&1 | FileCheck %s
-RUN: not LLVMFuzzer-StrstrTest               -seed=1 -runs=2000000   2>&1 | FileCheck %s
-
-RUN: not LLVMFuzzer-Memcmp64BytesTest        -seed=1 -runs=1000000   2>&1 | FileCheck %s
-
-RUN: LLVMFuzzer-RepeatedMemcmp -seed=11 -runs=100000 -max_len=20 2>&1 | FileCheck %s --check-prefix=RECOMMENDED_DICT
-RECOMMENDED_DICT:###### Recommended dictionary. ######
-RECOMMENDED_DICT-DAG: "foo"
-RECOMMENDED_DICT-DAG: "bar"
-RECOMMENDED_DICT:###### End of recommended dictionary. ######
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-ubsan.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-ubsan.test
deleted file mode 100644
index 0e8ad6c94a1b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer-ubsan.test
+++ /dev/null
@@ -1,4 +0,0 @@
-RUN: not LLVMFuzzer-SignedIntOverflowTest-Ubsan 2>&1 | FileCheck %s
-CHECK: runtime error: signed integer overflow: 2147483647 + 1 cannot be represented in type 'int'
-CHECK: Test unit written to ./crash-
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer.test
deleted file mode 100644
index ff46d32b387d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/fuzzer.test
+++ /dev/null
@@ -1,60 +0,0 @@
-CHECK: BINGO
-Done1000000: Done 1000000 runs in
-
-RUN: LLVMFuzzer-SimpleTest 2>&1 | FileCheck %s
-
-# only_ascii mode. Will perform some minimal self-validation.
-RUN: LLVMFuzzer-SimpleTest -only_ascii=1 2>&1
-
-RUN: LLVMFuzzer-SimpleCmpTest -max_total_time=1 -use_cmp=0 2>&1 | FileCheck %s --check-prefix=MaxTotalTime
-MaxTotalTime: Done {{.*}} runs in {{.}} second(s)
-
-RUN: not LLVMFuzzer-NullDerefTest                  2>&1 | FileCheck %s --check-prefix=NullDerefTest
-RUN: not LLVMFuzzer-NullDerefTest -close_fd_mask=3 2>&1 | FileCheck %s --check-prefix=NullDerefTest
-NullDerefTest: ERROR: AddressSanitizer: {{SEGV|access-violation}} on unknown address
-NullDerefTest: Test unit written to ./crash-
-RUN: not LLVMFuzzer-NullDerefTest  -artifact_prefix=ZZZ 2>&1 | FileCheck %s --check-prefix=NullDerefTestPrefix
-NullDerefTestPrefix: Test unit written to ZZZcrash-
-RUN: not LLVMFuzzer-NullDerefTest  -artifact_prefix=ZZZ -exact_artifact_path=FOOBAR 2>&1 | FileCheck %s --check-prefix=NullDerefTestExactPath
-NullDerefTestExactPath: Test unit written to FOOBAR
-
-RUN: not LLVMFuzzer-NullDerefOnEmptyTest -print_final_stats=1 2>&1 | FileCheck %s --check-prefix=NULL_DEREF_ON_EMPTY
-NULL_DEREF_ON_EMPTY: stat::number_of_executed_units:
-
-#not LLVMFuzzer-FullCoverageSetTest -timeout=15 -seed=1 -mutate_depth=2 -use_full_coverage_set=1 2>&1 | FileCheck %s
-
-RUN: not LLVMFuzzer-CounterTest  -max_len=6 -seed=1 -timeout=15 2>&1 | FileCheck %s --check-prefix=COUNTERS
-
-COUNTERS: INITED {{.*}} {{bits:|ft:}}
-COUNTERS: NEW {{.*}} {{bits:|ft:}} {{[1-9]*}}
-COUNTERS: NEW {{.*}} {{bits:|ft:}} {{[1-9]*}}
-COUNTERS: BINGO
-
-# Don't run UninstrumentedTest for now since we build libFuzzer itself with asan.
-DISABLED: not LLVMFuzzer-UninstrumentedTest-Uninstrumented 2>&1 | FileCheck %s --check-prefix=UNINSTRUMENTED
-UNINSTRUMENTED: ERROR: __sanitizer_set_death_callback is not defined. Exiting.
-
-RUN: not LLVMFuzzer-NotinstrumentedTest-NoCoverage 2>&1 | FileCheck %s --check-prefix=NO_COVERAGE
-NO_COVERAGE: ERROR: no interesting inputs were found. Is the code instrumented for coverage? Exiting
-
-RUN: not LLVMFuzzer-BufferOverflowOnInput 2>&1 | FileCheck %s --check-prefix=OOB
-OOB: AddressSanitizer: heap-buffer-overflow
-OOB: is located 0 bytes to the right of 3-byte region
-
-RUN: not LLVMFuzzer-InitializeTest -use_value_profile=1 2>&1 | FileCheck %s
-
-RUN: not LLVMFuzzer-DSOTest 2>&1 | FileCheck %s --check-prefix=DSO
-DSO: INFO: Loaded 3 modules
-DSO: BINGO
-
-RUN: LLVMFuzzer-SimpleTest  -exit_on_src_pos=SimpleTest.cpp:17                 2>&1 | FileCheck %s --check-prefix=EXIT_ON_SRC_POS
-RUN: LLVMFuzzer-ShrinkControlFlowTest  -exit_on_src_pos=ShrinkControlFlowTest.cpp:23 2>&1 | FileCheck %s --check-prefix=EXIT_ON_SRC_POS
-EXIT_ON_SRC_POS: INFO: found line matching '{{.*}}', exiting.
-
-RUN: env ASAN_OPTIONS=strict_string_checks=1 not LLVMFuzzer-StrncmpOOBTest -seed=1 -runs=1000000 2>&1 | FileCheck %s --check-prefix=STRNCMP
-STRNCMP: AddressSanitizer: heap-buffer-overflow
-STRNCMP-NOT: __sanitizer_weak_hook_strncmp
-STRNCMP: in LLVMFuzzerTestOneInput
-
-RUN: not LLVMFuzzer-BogusInitializeTest 2>&1 | FileCheck %s --check-prefix=BOGUS_INITIALIZE
-BOGUS_INITIALIZE: argv[0] has been modified in LLVMFuzzerInitialize
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/hi.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/hi.txt
deleted file mode 100644
index 2f9031f0ec7b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/hi.txt
+++ /dev/null
@@ -1 +0,0 @@
-Hi!
\ No newline at end of file
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/inline-8bit-counters.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/inline-8bit-counters.test
deleted file mode 100644
index 8747af81451f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/inline-8bit-counters.test
+++ /dev/null
@@ -1,4 +0,0 @@
-REQUIRES: linux
-CHECK: INFO: Loaded 1 modules with {{.*}} inline 8-bit counters
-CHECK: BINGO
-RUN: LLVMFuzzer-SimpleTest-Inline8bitCounters -runs=1000000 -seed=1 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/inline-8bit-counters/CMakeLists.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/inline-8bit-counters/CMakeLists.txt
deleted file mode 100644
index 088ab04fe6a0..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/inline-8bit-counters/CMakeLists.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-# These tests are instrumented with -fsanitize-coverage=inline-8bit-counters
-
-set(CMAKE_CXX_FLAGS
-  "${LIBFUZZER_FLAGS_BASE} -fno-sanitize-coverage=trace-pc-guard -fsanitize-coverage=inline-8bit-counters")
-
-set(Inline8bitCounterTests
-  SimpleTest
-  )
-
-foreach(Test ${Inline8bitCounterTests})
-  add_libfuzzer_test(${Test}-Inline8bitCounters SOURCES ../${Test}.cpp)
-endforeach()
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/lit.cfg b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/lit.cfg
deleted file mode 100644
index 85c95b42d1ea..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/lit.cfg
+++ /dev/null
@@ -1,55 +0,0 @@
-import lit.formats
-import sys
-
-config.name = "LLVMFuzzer"
-config.test_format = lit.formats.ShTest(True)
-config.suffixes = ['.test']
-config.test_source_root = os.path.dirname(__file__)
-
-# Choose between lit's internal shell pipeline runner and a real shell.  If
-# LIT_USE_INTERNAL_SHELL is in the environment, we use that as an override.
-use_lit_shell = os.environ.get("LIT_USE_INTERNAL_SHELL")
-if use_lit_shell:
-    # 0 is external, "" is default, and everything else is internal.
-    execute_external = (use_lit_shell == "0")
-else:
-    # Otherwise we default to internal on Windows and external elsewhere, as
-    # bash on Windows is usually very slow.
-    execute_external = (not sys.platform in ['win32'])
-
-# testFormat: The test format to use to interpret tests.
-#
-# For now we require '&&' between commands, until they get globally killed and
-# the test runner updated.
-config.test_format = lit.formats.ShTest(execute_external)
-
-# Tweak PATH to include llvm tools dir and current exec dir.
-llvm_tools_dir = getattr(config, 'llvm_tools_dir', None)
-if (not llvm_tools_dir) or (not os.path.exists(llvm_tools_dir)):
-  lit_config.fatal("Invalid llvm_tools_dir config attribute: %r" % llvm_tools_dir)
-path = os.path.pathsep.join((llvm_tools_dir, config.test_exec_root,
-                             config.environment['PATH']))
-config.environment['PATH'] = path
-
-if config.has_lsan:
-  lit_config.note('lsan feature available')
-  config.available_features.add('lsan')
-else:
-  lit_config.note('lsan feature unavailable')
-
-if sys.platform.startswith('win') or sys.platform.startswith('cygwin'):
-  config.available_features.add('windows')
-
-if sys.platform.startswith('darwin'):
-  config.available_features.add('darwin')
-
-if config.is_posix:
-  config.available_features.add('posix')
-
-if sys.platform.startswith('linux'):
-  # Note the value of ``sys.platform`` is not consistent
-  # between python 2 and 3, hence the use of ``.startswith()``.
-  lit_config.note('linux feature available')
-  config.available_features.add('linux')
-else:
-  lit_config.note('linux feature unavailable')
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/lit.site.cfg.in b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/lit.site.cfg.in
deleted file mode 100644
index 069f2b72c0d9..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/lit.site.cfg.in
+++ /dev/null
@@ -1,5 +0,0 @@
-config.test_exec_root = "@CMAKE_CURRENT_BINARY_DIR@"
-config.llvm_tools_dir = "@LLVM_TOOLS_DIR@"
-config.has_lsan = True if @HAS_LSAN@ == 1 else False
-config.is_posix = @LIBFUZZER_POSIX@
-lit_config.load_config(config, "@CMAKE_CURRENT_SOURCE_DIR@/lit.cfg")
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge-posix.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge-posix.test
deleted file mode 100644
index 47b90b986791..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge-posix.test
+++ /dev/null
@@ -1,23 +0,0 @@
-REQUIRES: posix
-
-RUN: rm -rf  %tmp/T1 %tmp/T2
-RUN: mkdir -p %tmp/T1 %tmp/T2
-
-RUN: echo F..... > %tmp/T1/1
-RUN: echo .U.... > %tmp/T1/2
-RUN: echo ..Z... > %tmp/T1/3
-
-RUN: echo .....F > %tmp/T2/1
-RUN: echo ....U. > %tmp/T2/2
-RUN: echo ...Z.. > %tmp/T2/3
-RUN: echo ...Z.. > %tmp/T2/4
-RUN: echo ....E. > %tmp/T2/5
-RUN: echo .....R > %tmp/T2/6
-
-# Check that we can report an error if file size exceeded
-RUN: (ulimit -f 1; not LLVMFuzzer-FullCoverageSetTest -merge=1 %tmp/T1 %tmp/T2 2>&1 | FileCheck %s --check-prefix=SIGXFSZ)
-SIGXFSZ: ERROR: libFuzzer: file size exceeded
-
-# Check that we honor TMPDIR
-RUN: TMPDIR=DIR_DOES_NOT_EXIST not LLVMFuzzer-FullCoverageSetTest -merge=1 %tmp/T1 %tmp/T2 2>&1 | FileCheck %s --check-prefix=TMPDIR
-TMPDIR: MERGE-OUTER: failed to write to the control file: DIR_DOES_NOT_EXIST/libFuzzerTemp
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge-summary.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge-summary.test
deleted file mode 100644
index df9d62dec636..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge-summary.test
+++ /dev/null
@@ -1,15 +0,0 @@
-RUN: rm -rf %t/T1 %t/T2
-RUN: mkdir -p %t/T0 %t/T1 %t/T2
-RUN: echo ...Z.. > %t/T2/1
-RUN: echo ....E. > %t/T2/2
-RUN: echo .....R > %t/T2/3
-RUN: echo F..... > %t/T2/a
-RUN: echo .U.... > %t/T2/b
-RUN: echo ..Z... > %t/T2/c
-
-RUN: LLVMFuzzer-FullCoverageSetTest -merge=1 %t/T1 %t/T2 -save_coverage_summary=%t/SUMMARY 2>&1 | FileCheck %s --check-prefix=SAVE_SUMMARY
-SAVE_SUMMARY: MERGE-OUTER: writing coverage summary for 6 files to {{.*}}SUMMARY
-RUN: rm %t/T1/*
-RUN: LLVMFuzzer-FullCoverageSetTest -merge=1 %t/T1 %t/T2 -load_coverage_summary=%t/SUMMARY 2>&1 | FileCheck %s --check-prefix=LOAD_SUMMARY
-LOAD_SUMMARY: MERGE-OUTER: coverage summary loaded from {{.*}}SUMMAR
-LOAD_SUMMARY: MERGE-OUTER: 0 new files with 0 new features added
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge.test
deleted file mode 100644
index e59da8c3e091..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/merge.test
+++ /dev/null
@@ -1,53 +0,0 @@
-CHECK: BINGO
-
-RUN: rm -rf %tmp/T0 %tmp/T1 %tmp/T2
-RUN: mkdir -p %tmp/T0 %tmp/T1 %tmp/T2
-RUN: echo F..... > %tmp/T0/1
-RUN: echo .U.... > %tmp/T0/2
-RUN: echo ..Z... > %tmp/T0/3
-
-# T1 has 3 elements, T2 is empty.
-RUN: cp %tmp/T0/* %tmp/T1/
-RUN: LLVMFuzzer-FullCoverageSetTest         -merge=1 %tmp/T1 %tmp/T2 2>&1 | FileCheck %s --check-prefix=CHECK1
-CHECK1: MERGE-OUTER: 3 files, 3 in the initial corpus
-CHECK1: MERGE-OUTER: 0 new files with 0 new features added
-
-RUN: echo ...Z.. > %tmp/T2/1
-RUN: echo ....E. > %tmp/T2/2
-RUN: echo .....R > %tmp/T2/3
-RUN: echo F..... > %tmp/T2/a
-RUN: echo .U.... > %tmp/T2/b
-RUN: echo ..Z... > %tmp/T2/c
-
-# T1 has 3 elements, T2 has 6 elements, only 3 are new.
-RUN: LLVMFuzzer-FullCoverageSetTest         -merge=1 %tmp/T1 %tmp/T2 2>&1 | FileCheck %s --check-prefix=CHECK2
-CHECK2: MERGE-OUTER: 9 files, 3 in the initial corpus
-CHECK2: MERGE-OUTER: 3 new files with 3 new features added
-
-# Now, T1 has 6 units and T2 has no new interesting units.
-RUN: LLVMFuzzer-FullCoverageSetTest         -merge=1 %tmp/T1 %tmp/T2 2>&1 | FileCheck %s --check-prefix=CHECK3
-CHECK3: MERGE-OUTER: 12 files, 6 in the initial corpus
-CHECK3: MERGE-OUTER: 0 new files with 0 new features added
-
-# Check that we respect max_len during the merge and don't crash.
-RUN: rm %tmp/T1/*
-RUN: cp %tmp/T0/* %tmp/T1/
-RUN: echo looooooooong > %tmp/T2/looooooooong
-RUN: LLVMFuzzer-FullCoverageSetTest         -merge=1 %tmp/T1 %tmp/T2 -max_len=6 2>&1 | FileCheck %s --check-prefix=MAX_LEN
-MAX_LEN: MERGE-OUTER: 3 new files
-
-# Check that merge tolerates failures.
-RUN: rm %tmp/T1/*
-RUN: cp %tmp/T0/* %tmp/T1/
-RUN: echo 'FUZZER' > %tmp/T2/FUZZER
-RUN: LLVMFuzzer-FullCoverageSetTest -merge=1 %tmp/T1 %tmp/T2 2>&1 | FileCheck %s --check-prefix=MERGE_WITH_CRASH
-MERGE_WITH_CRASH: MERGE-OUTER: succesfull in 2 attempt(s)
-MERGE_WITH_CRASH: MERGE-OUTER: 3 new files
-
-# Check that we actually limit the size with max_len
-RUN: LLVMFuzzer-FullCoverageSetTest -merge=1 %tmp/T1 %tmp/T2  -max_len=5 2>&1 | FileCheck %s --check-prefix=MERGE_LEN5
-MERGE_LEN5: MERGE-OUTER: succesfull in 1 attempt(s)
-
-RUN: rm -rf  %tmp/T1/* %tmp/T2/*
-RUN: not LLVMFuzzer-FullCoverageSetTest -merge=1 %tmp/T1 %tmp/T2 2>&1 | FileCheck %s --check-prefix=EMPTY
-EMPTY: MERGE-OUTER: zero succesfull attempts, exiting
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/minimize_crash.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/minimize_crash.test
deleted file mode 100644
index 5643c6bacb09..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/minimize_crash.test
+++ /dev/null
@@ -1,13 +0,0 @@
-RUN: echo 'Hi!rv349f34t3gg' > not_minimal_crash
-RUN: LLVMFuzzer-NullDerefTest -minimize_crash=1 not_minimal_crash -max_total_time=2 2>&1 | FileCheck %s
-CHECK: CRASH_MIN: failed to minimize beyond ./minimized-from-{{.*}} (3 bytes), exiting
-RUN: LLVMFuzzer-NullDerefTest -minimize_crash=1 not_minimal_crash -max_total_time=2 -exact_artifact_path=exact_minimized_path 2>&1 | FileCheck %s --check-prefix=CHECK_EXACT
-CHECK_EXACT: CRASH_MIN: failed to minimize beyond exact_minimized_path (3 bytes), exiting
-RUN: rm not_minimal_crash minimized-from-* exact_minimized_path
-
-RUN: echo -n 'abcd*xyz' > not_minimal_crash
-RUN: LLVMFuzzer-SingleByteInputTest -minimize_crash=1 not_minimal_crash -exact_artifact_path=exact_minimized_path 2>&1 | FileCheck %s --check-prefix=MIN1
-MIN1: Test unit written to exact_minimized_path
-MIN1: Test unit written to exact_minimized_path
-MIN1: INFO: The input is small enough, exiting
-MIN1: CRASH_MIN: failed to minimize beyond exact_minimized_path (1 bytes), exiting
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/minimize_two_crashes.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/minimize_two_crashes.test
deleted file mode 100644
index 2358d8c2a92e..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/minimize_two_crashes.test
+++ /dev/null
@@ -1,16 +0,0 @@
-# Test that the minimizer stops when it sees a differe bug.
-
-RUN: rm -rf %t && mkdir %t
-RUN: echo H12345678901234667888090 > %t/long_crash
-RUN: env ASAN_OPTIONS=dedup_token_length=3 LLVMFuzzer-TwoDifferentBugsTest -seed=1 -minimize_crash=1 %t/long_crash -exact_artifact_path=%t/result 2>&1 | FileCheck %s
-
-CHECK: DedupToken1: DEDUP_TOKEN: Bar
-CHECK: DedupToken2: DEDUP_TOKEN: Bar
-CHECK: DedupToken1: DEDUP_TOKEN: Bar
-CHECK: DedupToken2: DEDUP_TOKEN: Foo
-CHECK: CRASH_MIN: mismatch in dedup tokens
-
-RUN: not  LLVMFuzzer-TwoDifferentBugsTest %t/result 2>&1 | FileCheck %s --check-prefix=VERIFY
-
-VERIFY: ERROR: AddressSanitizer:
-VERIFY: in Bar
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/no-coverage/CMakeLists.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/no-coverage/CMakeLists.txt
deleted file mode 100644
index 52e7240333ee..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/no-coverage/CMakeLists.txt
+++ /dev/null
@@ -1,29 +0,0 @@
-# These tests are not instrumented with coverage,
-# but have coverage rt in the binary.
-
-set(CMAKE_CXX_FLAGS
-  "${LIBFUZZER_FLAGS_BASE} -fno-sanitize-coverage=edge,trace-cmp,indirect-calls,8bit-counters,trace-pc-guard")
-
-set(NoCoverageTests
-  NotinstrumentedTest
-  )
-
-foreach(Test ${NoCoverageTests})
-  add_libfuzzer_test(${Test}-NoCoverage SOURCES ../${Test}.cpp)
-endforeach()
-
-
-###############################################################################
-# AFL Driver test
-###############################################################################
-if(NOT MSVC)
-  add_executable(AFLDriverTest
-    ../AFLDriverTest.cpp ../../afl/afl_driver.cpp)
-
-  set_target_properties(AFLDriverTest
-      PROPERTIES RUNTIME_OUTPUT_DIRECTORY
-      "${CMAKE_BINARY_DIR}/lib/Fuzzer/test"
-      )
-
-  add_dependencies(TestBinaries AFLDriverTest)
-endif()
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/overwrite-input.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/overwrite-input.test
deleted file mode 100644
index 81c27909e8df..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/overwrite-input.test
+++ /dev/null
@@ -1,2 +0,0 @@
-RUN: not LLVMFuzzer-OverwriteInputTest 2>&1 | FileCheck %s
-CHECK: ERROR: libFuzzer: fuzz target overwrites it's const input
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/reduce_inputs.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/reduce_inputs.test
deleted file mode 100644
index 5ce4440788f4..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/reduce_inputs.test
+++ /dev/null
@@ -1,14 +0,0 @@
-# Test -reduce_inputs=1
-
-RUN: rm -rf %t/C
-RUN: mkdir -p %t/C
-RUN: LLVMFuzzer-ShrinkControlFlowSimpleTest  -exit_on_item=0eb8e4ed029b774d80f2b66408203801cb982a60   -reduce_inputs=1 -runs=1000000 %t/C 2>&1 | FileCheck %s
-CHECK: INFO: found item with checksum '0eb8e4ed029b774d80f2b66408203801cb982a60'
-
-# Test that reduce_inputs deletes redundant files in the corpus.
-RUN: LLVMFuzzer-ShrinkControlFlowSimpleTest -runs=0 %t/C 2>&1 | FileCheck %s --check-prefix=COUNT
-COUNT: READ units: 3
-
-# a bit longer test
-RUN: LLVMFuzzer-ShrinkControlFlowTest  -exit_on_item=0eb8e4ed029b774d80f2b66408203801cb982a60  -seed=1 -reduce_inputs=1 -runs=1000000  2>&1 | FileCheck %s
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/repeated-bytes.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/repeated-bytes.test
deleted file mode 100644
index 713940879397..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/repeated-bytes.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: LLVMFuzzer-RepeatedBytesTest -seed=1 -runs=1000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/shrink.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/shrink.test
deleted file mode 100644
index edb86cb19385..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/shrink.test
+++ /dev/null
@@ -1,7 +0,0 @@
-RUN: LLVMFuzzer-ShrinkControlFlowTest -seed=1 -exit_on_item=0eb8e4ed029b774d80f2b66408203801cb982a60 -runs=1000000  -shrink=1 2>&1 | FileCheck %s --check-prefix=SHRINK1
-RUN: LLVMFuzzer-ShrinkControlFlowTest -seed=1 -exit_on_item=0eb8e4ed029b774d80f2b66408203801cb982a60 -runs=1000000 -shrink=0 2>&1 | FileCheck %s --check-prefix=SHRINK0
-RUN: LLVMFuzzer-ShrinkValueProfileTest -seed=1 -exit_on_item=aea2e3923af219a8956f626558ef32f30a914ebc -runs=100000 -shrink=1 -use_value_profile=1 2>&1 | FileCheck %s --check-prefix=SHRINK1_VP
-
-SHRINK0: Done 1000000 runs in
-SHRINK1: INFO: found item with checksum '0eb8e4ed029b774d80f2b66408203801cb982a60', exiting.
-SHRINK1_VP: INFO: found item with checksum 'aea2e3923af219a8956f626558ef32f30a914ebc', exiting
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/simple-cmp.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/simple-cmp.test
deleted file mode 100644
index 145a036652eb..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/simple-cmp.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-SimpleCmpTest -seed=1 -runs=100000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/standalone.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/standalone.test
deleted file mode 100644
index 3097b3ff357a..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/standalone.test
+++ /dev/null
@@ -1,4 +0,0 @@
-RUN: LLVMFuzzer-StandaloneInitializeTest %S/hi.txt %S/dict1.txt 2>&1 | FileCheck %s
-CHECK: StandaloneFuzzTargetMain: running 2 inputs
-CHECK: Done:    {{.*}}hi.txt: (3 bytes)
-CHECK: Done:    {{.*}}dict1.txt: (61 bytes)
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/swap-cmp.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/swap-cmp.test
deleted file mode 100644
index 908b798664b1..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/swap-cmp.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-SwapCmpTest -seed=1 -runs=10000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-malloc-2.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-malloc-2.test
deleted file mode 100644
index 7719b650c791..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-malloc-2.test
+++ /dev/null
@@ -1,8 +0,0 @@
-// FIXME: This test infinite loops on darwin because it crashes
-// printing a stack trace repeatedly
-UNSUPPORTED: darwin
-
-RUN: LLVMFuzzer-TraceMallocTest -seed=1 -trace_malloc=2 -runs=1000 2>&1 | FileCheck %s --check-prefix=TRACE2
-TRACE2-DAG: FREE[0]
-TRACE2-DAG: MALLOC[0]
-TRACE2-DAG: in LLVMFuzzerTestOneInput
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-malloc.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-malloc.test
deleted file mode 100644
index 25694cc2de5c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-malloc.test
+++ /dev/null
@@ -1,5 +0,0 @@
-RUN: LLVMFuzzer-TraceMallocTest -seed=1 -trace_malloc=1 -runs=10000 2>&1 | FileCheck %s
-CHECK-DAG: MallocFreeTracer: STOP 0 0 (same)
-CHECK-DAG: MallocFreeTracer: STOP 0 1 (DIFFERENT)
-CHECK-DAG: MallocFreeTracer: STOP 1 0 (DIFFERENT)
-CHECK-DAG: MallocFreeTracer: STOP 1 1 (same)
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-pc.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-pc.test
deleted file mode 100644
index 3709677b71b6..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-pc.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: LLVMFuzzer-SimpleTest-TracePC -runs=100000 -seed=1 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-pc/CMakeLists.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-pc/CMakeLists.txt
deleted file mode 100644
index 572fcc983654..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/trace-pc/CMakeLists.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-# These tests are instrumented with -fsanitize-coverage=trace-pc
-
-set(CMAKE_CXX_FLAGS
-  "${LIBFUZZER_FLAGS_BASE} -fno-sanitize-coverage=edge,trace-cmp,indirect-calls,8bit-counters,trace-pc-guard -fsanitize-coverage=trace-pc")
-
-set(TracePCTests
-  SimpleTest
-  )
-
-foreach(Test ${TracePCTests})
-  add_libfuzzer_test(${Test}-TracePC SOURCES ../${Test}.cpp)
-endforeach()
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ubsan/CMakeLists.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ubsan/CMakeLists.txt
deleted file mode 100644
index 55e0a118186b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ubsan/CMakeLists.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-# These tests are instrumented with ubsan in non-recovery mode.
-
-set(CMAKE_CXX_FLAGS
-  "${LIBFUZZER_FLAGS_BASE} -fsanitize=undefined -fno-sanitize-recover=all")
-
-set(UbsanTests
-  SignedIntOverflowTest
-  )
-
-foreach(Test ${UbsanTests})
-  add_libfuzzer_test(${Test}-Ubsan SOURCES ../${Test}.cpp)
-endforeach()
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ulimit.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ulimit.test
deleted file mode 100644
index c2faca13f728..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/ulimit.test
+++ /dev/null
@@ -1,4 +0,0 @@
-REQUIRES: posix
-
-RUN: ulimit -s 1000
-RUN: LLVMFuzzer-SimpleTest
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/uninstrumented/CMakeLists.txt b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/uninstrumented/CMakeLists.txt
deleted file mode 100644
index f4ab59e5b18d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/uninstrumented/CMakeLists.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-# These tests are not instrumented with coverage and don't
-# have coverage rt in the binary.
-
-set(CMAKE_CXX_FLAGS
-  "${LIBFUZZER_FLAGS_BASE} -fno-sanitize=all -fno-sanitize-coverage=edge,trace-cmp,indirect-calls,8bit-counters,trace-pc-guard")
-
-set(UninstrumentedTests
-  UninstrumentedTest
-  )
-
-foreach(Test ${UninstrumentedTests})
-  add_libfuzzer_test(${Test}-Uninstrumented SOURCES ../${Test}.cpp)
-endforeach()
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/unit/lit.cfg b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/unit/lit.cfg
deleted file mode 100644
index 0cc31939c559..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/unit/lit.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-import lit.formats
-
-config.name = "LLVMFuzzer-Unittest"
-print config.test_exec_root
-config.test_format = lit.formats.GoogleTest(".", "Unittest")
-config.suffixes = []
-config.test_source_root = config.test_exec_root
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/unit/lit.site.cfg.in b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/unit/lit.site.cfg.in
deleted file mode 100644
index 114daf474b6d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/unit/lit.site.cfg.in
+++ /dev/null
@@ -1,2 +0,0 @@
-config.test_exec_root = "@CMAKE_CURRENT_BINARY_DIR@"
-lit_config.load_config(config, "@CMAKE_CURRENT_SOURCE_DIR@/unit/lit.cfg")
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp.test
deleted file mode 100644
index 48edba4f5ce7..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-SimpleCmpTest -seed=1 -use_cmp=0 -use_value_profile=1 -runs=100000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp2.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp2.test
deleted file mode 100644
index 43d62400d97b..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp2.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-SimpleHashTest -seed=1 -use_cmp=0 -use_value_profile=1 -runs=100000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp3.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp3.test
deleted file mode 100644
index 8a962763f39c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp3.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-AbsNegAndConstantTest -seed=1 -use_cmp=0 -use_value_profile=1 -runs=100000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp4.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp4.test
deleted file mode 100644
index 1e7131e5b5ba..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-cmp4.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-AbsNegAndConstant64Test -seed=1 -use_cmp=0 -use_value_profile=1 -runs=100000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-div.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-div.test
deleted file mode 100644
index b966a8916512..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-div.test
+++ /dev/null
@@ -1,3 +0,0 @@
-CHECK: AddressSanitizer: {{FPE|int-divide-by-zero}}
-RUN: not LLVMFuzzer-DivTest -seed=1 -use_value_profile=1 -runs=10000000 2>&1 | FileCheck %s
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-load.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-load.test
deleted file mode 100644
index 14d3109a24e1..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-load.test
+++ /dev/null
@@ -1,3 +0,0 @@
-CHECK: AddressSanitizer: global-buffer-overflow
-RUN: not LLVMFuzzer-LoadTest -seed=1 -use_cmp=0 -use_value_profile=1 -runs=10000000 2>&1 | FileCheck %s
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-mem.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-mem.test
deleted file mode 100644
index 880b2692910a..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-mem.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-SingleMemcmpTest -seed=1  -use_cmp=0 -use_value_profile=1 -runs=10000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-set.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-set.test
deleted file mode 100644
index 9d06c3656334..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-set.test
+++ /dev/null
@@ -1,3 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-FourIndependentBranchesTest -seed=1 -use_cmp=0 -use_value_profile=1 -runs=100000000 2>&1 | FileCheck %s
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-strcmp.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-strcmp.test
deleted file mode 100644
index 7f1047594548..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-strcmp.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-SingleStrcmpTest -seed=1  -use_cmp=0 -use_value_profile=1 -runs=10000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-strncmp.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-strncmp.test
deleted file mode 100644
index 84a74c4f0ad2..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-strncmp.test
+++ /dev/null
@@ -1,2 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-SingleStrncmpTest -seed=1 -use_cmp=0 -use_value_profile=1 -runs=100000000 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-switch.test b/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-switch.test
deleted file mode 100644
index 1947f56830b2..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Fuzzer/test/value-profile-switch.test
+++ /dev/null
@@ -1,3 +0,0 @@
-CHECK: BINGO
-RUN: not LLVMFuzzer-SwitchTest  -use_cmp=0 -use_value_profile=1 -runs=100000000 -seed=1 2>&1 | FileCheck %s
-RUN: not LLVMFuzzer-Switch2Test -use_cmp=0 -use_value_profile=1 -runs=100000000 -seed=1 2>&1 | FileCheck %s
diff --git a/external/bsd/llvm/dist/llvm/lib/IR/GCOV.cpp b/external/bsd/llvm/dist/llvm/lib/IR/GCOV.cpp
deleted file mode 100644
index d4b455228225..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/IR/GCOV.cpp
+++ /dev/null
@@ -1,821 +0,0 @@
-//===- GCOV.cpp - LLVM coverage tool --------------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// GCOV implements the interface to read and write coverage files that use
-// 'gcov' format.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Support/GCOV.h"
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/FileSystem.h"
-#include "llvm/Support/Format.h"
-#include "llvm/Support/Path.h"
-#include "llvm/Support/raw_ostream.h"
-#include <algorithm>
-#include <system_error>
-
-using namespace llvm;
-
-//===----------------------------------------------------------------------===//
-// GCOVFile implementation.
-
-/// readGCNO - Read GCNO buffer.
-bool GCOVFile::readGCNO(GCOVBuffer &Buffer) {
-  if (!Buffer.readGCNOFormat())
-    return false;
-  if (!Buffer.readGCOVVersion(Version))
-    return false;
-
-  if (!Buffer.readInt(Checksum))
-    return false;
-  while (true) {
-    if (!Buffer.readFunctionTag())
-      break;
-    auto GFun = make_unique<GCOVFunction>(*this);
-    if (!GFun->readGCNO(Buffer, Version))
-      return false;
-    Functions.push_back(std::move(GFun));
-  }
-
-  GCNOInitialized = true;
-  return true;
-}
-
-/// readGCDA - Read GCDA buffer. It is required that readGCDA() can only be
-/// called after readGCNO().
-bool GCOVFile::readGCDA(GCOVBuffer &Buffer) {
-  assert(GCNOInitialized && "readGCDA() can only be called after readGCNO()");
-  if (!Buffer.readGCDAFormat())
-    return false;
-  GCOV::GCOVVersion GCDAVersion;
-  if (!Buffer.readGCOVVersion(GCDAVersion))
-    return false;
-  if (Version != GCDAVersion) {
-    errs() << "GCOV versions do not match.\n";
-    return false;
-  }
-
-  uint32_t GCDAChecksum;
-  if (!Buffer.readInt(GCDAChecksum))
-    return false;
-  if (Checksum != GCDAChecksum) {
-    errs() << "File checksums do not match: " << Checksum
-           << " != " << GCDAChecksum << ".\n";
-    return false;
-  }
-  for (size_t i = 0, e = Functions.size(); i < e; ++i) {
-    if (!Buffer.readFunctionTag()) {
-      errs() << "Unexpected number of functions.\n";
-      return false;
-    }
-    if (!Functions[i]->readGCDA(Buffer, Version))
-      return false;
-  }
-  if (Buffer.readObjectTag()) {
-    uint32_t Length;
-    uint32_t Dummy;
-    if (!Buffer.readInt(Length))
-      return false;
-    if (!Buffer.readInt(Dummy))
-      return false; // checksum
-    if (!Buffer.readInt(Dummy))
-      return false; // num
-    if (!Buffer.readInt(RunCount))
-      return false;
-    Buffer.advanceCursor(Length - 3);
-  }
-  while (Buffer.readProgramTag()) {
-    uint32_t Length;
-    if (!Buffer.readInt(Length))
-      return false;
-    Buffer.advanceCursor(Length);
-    ++ProgramCount;
-  }
-
-  return true;
-}
-
-void GCOVFile::print(raw_ostream &OS) const {
-  for (const auto &FPtr : Functions)
-    FPtr->print(OS);
-}
-
-#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-/// dump - Dump GCOVFile content to dbgs() for debugging purposes.
-LLVM_DUMP_METHOD void GCOVFile::dump() const {
-  print(dbgs());
-}
-#endif
-
-/// collectLineCounts - Collect line counts. This must be used after
-/// reading .gcno and .gcda files.
-void GCOVFile::collectLineCounts(FileInfo &FI) {
-  for (const auto &FPtr : Functions)
-    FPtr->collectLineCounts(FI);
-  FI.setRunCount(RunCount);
-  FI.setProgramCount(ProgramCount);
-}
-
-//===----------------------------------------------------------------------===//
-// GCOVFunction implementation.
-
-/// readGCNO - Read a function from the GCNO buffer. Return false if an error
-/// occurs.
-bool GCOVFunction::readGCNO(GCOVBuffer &Buff, GCOV::GCOVVersion Version) {
-  uint32_t Dummy;
-  if (!Buff.readInt(Dummy))
-    return false; // Function header length
-  if (!Buff.readInt(Ident))
-    return false;
-  if (!Buff.readInt(Checksum))
-    return false;
-  if (Version != GCOV::V402) {
-    uint32_t CfgChecksum;
-    if (!Buff.readInt(CfgChecksum))
-      return false;
-    if (Parent.getChecksum() != CfgChecksum) {
-      errs() << "File checksums do not match: " << Parent.getChecksum()
-             << " != " << CfgChecksum << " in (" << Name << ").\n";
-      return false;
-    }
-  }
-  if (!Buff.readString(Name))
-    return false;
-  if (!Buff.readString(Filename))
-    return false;
-  if (!Buff.readInt(LineNumber))
-    return false;
-
-  // read blocks.
-  if (!Buff.readBlockTag()) {
-    errs() << "Block tag not found.\n";
-    return false;
-  }
-  uint32_t BlockCount;
-  if (!Buff.readInt(BlockCount))
-    return false;
-  for (uint32_t i = 0, e = BlockCount; i != e; ++i) {
-    if (!Buff.readInt(Dummy))
-      return false; // Block flags;
-    Blocks.push_back(make_unique<GCOVBlock>(*this, i));
-  }
-
-  // read edges.
-  while (Buff.readEdgeTag()) {
-    uint32_t EdgeCount;
-    if (!Buff.readInt(EdgeCount))
-      return false;
-    EdgeCount = (EdgeCount - 1) / 2;
-    uint32_t BlockNo;
-    if (!Buff.readInt(BlockNo))
-      return false;
-    if (BlockNo >= BlockCount) {
-      errs() << "Unexpected block number: " << BlockNo << " (in " << Name
-             << ").\n";
-      return false;
-    }
-    for (uint32_t i = 0, e = EdgeCount; i != e; ++i) {
-      uint32_t Dst;
-      if (!Buff.readInt(Dst))
-        return false;
-      Edges.push_back(make_unique<GCOVEdge>(*Blocks[BlockNo], *Blocks[Dst]));
-      GCOVEdge *Edge = Edges.back().get();
-      Blocks[BlockNo]->addDstEdge(Edge);
-      Blocks[Dst]->addSrcEdge(Edge);
-      if (!Buff.readInt(Dummy))
-        return false; // Edge flag
-    }
-  }
-
-  // read line table.
-  while (Buff.readLineTag()) {
-    uint32_t LineTableLength;
-    // Read the length of this line table.
-    if (!Buff.readInt(LineTableLength))
-      return false;
-    uint32_t EndPos = Buff.getCursor() + LineTableLength * 4;
-    uint32_t BlockNo;
-    // Read the block number this table is associated with.
-    if (!Buff.readInt(BlockNo))
-      return false;
-    if (BlockNo >= BlockCount) {
-      errs() << "Unexpected block number: " << BlockNo << " (in " << Name
-             << ").\n";
-      return false;
-    }
-    GCOVBlock &Block = *Blocks[BlockNo];
-    // Read the word that pads the beginning of the line table. This may be a
-    // flag of some sort, but seems to always be zero.
-    if (!Buff.readInt(Dummy))
-      return false;
-
-    // Line information starts here and continues up until the last word.
-    if (Buff.getCursor() != (EndPos - sizeof(uint32_t))) {
-      StringRef F;
-      // Read the source file name.
-      if (!Buff.readString(F))
-        return false;
-      if (Filename != F) {
-        errs() << "Multiple sources for a single basic block: " << Filename
-               << " != " << F << " (in " << Name << ").\n";
-        return false;
-      }
-      // Read lines up to, but not including, the null terminator.
-      while (Buff.getCursor() < (EndPos - 2 * sizeof(uint32_t))) {
-        uint32_t Line;
-        if (!Buff.readInt(Line))
-          return false;
-        // Line 0 means this instruction was injected by the compiler. Skip it.
-        if (!Line)
-          continue;
-        Block.addLine(Line);
-      }
-      // Read the null terminator.
-      if (!Buff.readInt(Dummy))
-        return false;
-    }
-    // The last word is either a flag or padding, it isn't clear which. Skip
-    // over it.
-    if (!Buff.readInt(Dummy))
-      return false;
-  }
-  return true;
-}
-
-/// readGCDA - Read a function from the GCDA buffer. Return false if an error
-/// occurs.
-bool GCOVFunction::readGCDA(GCOVBuffer &Buff, GCOV::GCOVVersion Version) {
-  uint32_t HeaderLength;
-  if (!Buff.readInt(HeaderLength))
-    return false; // Function header length
-
-  uint64_t EndPos = Buff.getCursor() + HeaderLength * sizeof(uint32_t);
-
-  uint32_t GCDAIdent;
-  if (!Buff.readInt(GCDAIdent))
-    return false;
-  if (Ident != GCDAIdent) {
-    errs() << "Function identifiers do not match: " << Ident
-           << " != " << GCDAIdent << " (in " << Name << ").\n";
-    return false;
-  }
-
-  uint32_t GCDAChecksum;
-  if (!Buff.readInt(GCDAChecksum))
-    return false;
-  if (Checksum != GCDAChecksum) {
-    errs() << "Function checksums do not match: " << Checksum
-           << " != " << GCDAChecksum << " (in " << Name << ").\n";
-    return false;
-  }
-
-  uint32_t CfgChecksum;
-  if (Version != GCOV::V402) {
-    if (!Buff.readInt(CfgChecksum))
-      return false;
-    if (Parent.getChecksum() != CfgChecksum) {
-      errs() << "File checksums do not match: " << Parent.getChecksum()
-             << " != " << CfgChecksum << " (in " << Name << ").\n";
-      return false;
-    }
-  }
-
-  if (Buff.getCursor() < EndPos) {
-    StringRef GCDAName;
-    if (!Buff.readString(GCDAName))
-      return false;
-    if (Name != GCDAName) {
-      errs() << "Function names do not match: " << Name << " != " << GCDAName
-             << ".\n";
-      return false;
-    }
-  }
-
-  if (!Buff.readArcTag()) {
-    errs() << "Arc tag not found (in " << Name << ").\n";
-    return false;
-  }
-
-  uint32_t Count;
-  if (!Buff.readInt(Count))
-    return false;
-  Count /= 2;
-
-  // This for loop adds the counts for each block. A second nested loop is
-  // required to combine the edge counts that are contained in the GCDA file.
-  for (uint32_t BlockNo = 0; Count > 0; ++BlockNo) {
-    // The last block is always reserved for exit block
-    if (BlockNo >= Blocks.size()) {
-      errs() << "Unexpected number of edges (in " << Name << ").\n";
-      return false;
-    }
-    if (BlockNo == Blocks.size() - 1)
-      errs() << "(" << Name << ") has arcs from exit block.\n";
-    GCOVBlock &Block = *Blocks[BlockNo];
-    for (size_t EdgeNo = 0, End = Block.getNumDstEdges(); EdgeNo < End;
-         ++EdgeNo) {
-      if (Count == 0) {
-        errs() << "Unexpected number of edges (in " << Name << ").\n";
-        return false;
-      }
-      uint64_t ArcCount;
-      if (!Buff.readInt64(ArcCount))
-        return false;
-      Block.addCount(EdgeNo, ArcCount);
-      --Count;
-    }
-    Block.sortDstEdges();
-  }
-  return true;
-}
-
-/// getEntryCount - Get the number of times the function was called by
-/// retrieving the entry block's count.
-uint64_t GCOVFunction::getEntryCount() const {
-  return Blocks.front()->getCount();
-}
-
-/// getExitCount - Get the number of times the function returned by retrieving
-/// the exit block's count.
-uint64_t GCOVFunction::getExitCount() const {
-  return Blocks.back()->getCount();
-}
-
-void GCOVFunction::print(raw_ostream &OS) const {
-  OS << "===== " << Name << " (" << Ident << ") @ " << Filename << ":"
-     << LineNumber << "\n";
-  for (const auto &Block : Blocks)
-    Block->print(OS);
-}
-
-#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-/// dump - Dump GCOVFunction content to dbgs() for debugging purposes.
-LLVM_DUMP_METHOD void GCOVFunction::dump() const {
-  print(dbgs());
-}
-#endif
-
-/// collectLineCounts - Collect line counts. This must be used after
-/// reading .gcno and .gcda files.
-void GCOVFunction::collectLineCounts(FileInfo &FI) {
-  // If the line number is zero, this is a function that doesn't actually appear
-  // in the source file, so there isn't anything we can do with it.
-  if (LineNumber == 0)
-    return;
-
-  for (const auto &Block : Blocks)
-    Block->collectLineCounts(FI);
-  FI.addFunctionLine(Filename, LineNumber, this);
-}
-
-//===----------------------------------------------------------------------===//
-// GCOVBlock implementation.
-
-/// ~GCOVBlock - Delete GCOVBlock and its content.
-GCOVBlock::~GCOVBlock() {
-  SrcEdges.clear();
-  DstEdges.clear();
-  Lines.clear();
-}
-
-/// addCount - Add to block counter while storing the edge count. If the
-/// destination has no outgoing edges, also update that block's count too.
-void GCOVBlock::addCount(size_t DstEdgeNo, uint64_t N) {
-  assert(DstEdgeNo < DstEdges.size()); // up to caller to ensure EdgeNo is valid
-  DstEdges[DstEdgeNo]->Count = N;
-  Counter += N;
-  if (!DstEdges[DstEdgeNo]->Dst.getNumDstEdges())
-    DstEdges[DstEdgeNo]->Dst.Counter += N;
-}
-
-/// sortDstEdges - Sort destination edges by block number, nop if already
-/// sorted. This is required for printing branch info in the correct order.
-void GCOVBlock::sortDstEdges() {
-  if (!DstEdgesAreSorted) {
-    SortDstEdgesFunctor SortEdges;
-    std::stable_sort(DstEdges.begin(), DstEdges.end(), SortEdges);
-  }
-}
-
-/// collectLineCounts - Collect line counts. This must be used after
-/// reading .gcno and .gcda files.
-void GCOVBlock::collectLineCounts(FileInfo &FI) {
-  for (uint32_t N : Lines)
-    FI.addBlockLine(Parent.getFilename(), N, this);
-}
-
-void GCOVBlock::print(raw_ostream &OS) const {
-  OS << "Block : " << Number << " Counter : " << Counter << "\n";
-  if (!SrcEdges.empty()) {
-    OS << "\tSource Edges : ";
-    for (const GCOVEdge *Edge : SrcEdges)
-      OS << Edge->Src.Number << " (" << Edge->Count << "), ";
-    OS << "\n";
-  }
-  if (!DstEdges.empty()) {
-    OS << "\tDestination Edges : ";
-    for (const GCOVEdge *Edge : DstEdges)
-      OS << Edge->Dst.Number << " (" << Edge->Count << "), ";
-    OS << "\n";
-  }
-  if (!Lines.empty()) {
-    OS << "\tLines : ";
-    for (uint32_t N : Lines)
-      OS << (N) << ",";
-    OS << "\n";
-  }
-}
-
-#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-/// dump - Dump GCOVBlock content to dbgs() for debugging purposes.
-LLVM_DUMP_METHOD void GCOVBlock::dump() const {
-  print(dbgs());
-}
-#endif
-
-//===----------------------------------------------------------------------===//
-// FileInfo implementation.
-
-// Safe integer division, returns 0 if numerator is 0.
-static uint32_t safeDiv(uint64_t Numerator, uint64_t Divisor) {
-  if (!Numerator)
-    return 0;
-  return Numerator / Divisor;
-}
-
-// This custom division function mimics gcov's branch ouputs:
-//   - Round to closest whole number
-//   - Only output 0% or 100% if it's exactly that value
-static uint32_t branchDiv(uint64_t Numerator, uint64_t Divisor) {
-  if (!Numerator)
-    return 0;
-  if (Numerator == Divisor)
-    return 100;
-
-  uint8_t Res = (Numerator * 100 + Divisor / 2) / Divisor;
-  if (Res == 0)
-    return 1;
-  if (Res == 100)
-    return 99;
-  return Res;
-}
-
-namespace {
-struct formatBranchInfo {
-  formatBranchInfo(const GCOV::Options &Options, uint64_t Count, uint64_t Total)
-      : Options(Options), Count(Count), Total(Total) {}
-
-  void print(raw_ostream &OS) const {
-    if (!Total)
-      OS << "never executed";
-    else if (Options.BranchCount)
-      OS << "taken " << Count;
-    else
-      OS << "taken " << branchDiv(Count, Total) << "%";
-  }
-
-  const GCOV::Options &Options;
-  uint64_t Count;
-  uint64_t Total;
-};
-
-static raw_ostream &operator<<(raw_ostream &OS, const formatBranchInfo &FBI) {
-  FBI.print(OS);
-  return OS;
-}
-
-class LineConsumer {
-  std::unique_ptr<MemoryBuffer> Buffer;
-  StringRef Remaining;
-
-public:
-  LineConsumer(StringRef Filename) {
-    ErrorOr<std::unique_ptr<MemoryBuffer>> BufferOrErr =
-        MemoryBuffer::getFileOrSTDIN(Filename);
-    if (std::error_code EC = BufferOrErr.getError()) {
-      errs() << Filename << ": " << EC.message() << "\n";
-      Remaining = "";
-    } else {
-      Buffer = std::move(BufferOrErr.get());
-      Remaining = Buffer->getBuffer();
-    }
-  }
-  bool empty() { return Remaining.empty(); }
-  void printNext(raw_ostream &OS, uint32_t LineNum) {
-    StringRef Line;
-    if (empty())
-      Line = "/*EOF*/";
-    else
-      std::tie(Line, Remaining) = Remaining.split("\n");
-    OS << format("%5u:", LineNum) << Line << "\n";
-  }
-};
-} // end anonymous namespace
-
-/// Convert a path to a gcov filename. If PreservePaths is true, this
-/// translates "/" to "#", ".." to "^", and drops ".", to match gcov.
-static std::string mangleCoveragePath(StringRef Filename, bool PreservePaths) {
-  if (!PreservePaths)
-    return sys::path::filename(Filename).str();
-
-  // This behaviour is defined by gcov in terms of text replacements, so it's
-  // not likely to do anything useful on filesystems with different textual
-  // conventions.
-  llvm::SmallString<256> Result("");
-  StringRef::iterator I, S, E;
-  for (I = S = Filename.begin(), E = Filename.end(); I != E; ++I) {
-    if (*I != '/')
-      continue;
-
-    if (I - S == 1 && *S == '.') {
-      // ".", the current directory, is skipped.
-    } else if (I - S == 2 && *S == '.' && *(S + 1) == '.') {
-      // "..", the parent directory, is replaced with "^".
-      Result.append("^#");
-    } else {
-      if (S < I)
-        // Leave other components intact,
-        Result.append(S, I);
-      // And separate with "#".
-      Result.push_back('#');
-    }
-    S = I + 1;
-  }
-
-  if (S < I)
-    Result.append(S, I);
-  return Result.str();
-}
-
-std::string FileInfo::getCoveragePath(StringRef Filename,
-                                      StringRef MainFilename) {
-  if (Options.NoOutput)
-    // This is probably a bug in gcov, but when -n is specified, paths aren't
-    // mangled at all, and the -l and -p options are ignored. Here, we do the
-    // same.
-    return Filename;
-
-  std::string CoveragePath;
-  if (Options.LongFileNames && !Filename.equals(MainFilename))
-    CoveragePath =
-        mangleCoveragePath(MainFilename, Options.PreservePaths) + "##";
-  CoveragePath += mangleCoveragePath(Filename, Options.PreservePaths) + ".gcov";
-  return CoveragePath;
-}
-
-std::unique_ptr<raw_ostream>
-FileInfo::openCoveragePath(StringRef CoveragePath) {
-  if (Options.NoOutput)
-    return llvm::make_unique<raw_null_ostream>();
-
-  std::error_code EC;
-  auto OS = llvm::make_unique<raw_fd_ostream>(CoveragePath, EC,
-                                              sys::fs::F_Text);
-  if (EC) {
-    errs() << EC.message() << "\n";
-    return llvm::make_unique<raw_null_ostream>();
-  }
-  return std::move(OS);
-}
-
-/// print -  Print source files with collected line count information.
-void FileInfo::print(raw_ostream &InfoOS, StringRef MainFilename,
-                     StringRef GCNOFile, StringRef GCDAFile) {
-  SmallVector<StringRef, 4> Filenames;
-  for (const auto &LI : LineInfo)
-    Filenames.push_back(LI.first());
-  std::sort(Filenames.begin(), Filenames.end());
-
-  for (StringRef Filename : Filenames) {
-    auto AllLines = LineConsumer(Filename);
-
-    std::string CoveragePath = getCoveragePath(Filename, MainFilename);
-    std::unique_ptr<raw_ostream> CovStream = openCoveragePath(CoveragePath);
-    raw_ostream &CovOS = *CovStream;
-
-    CovOS << "        -:    0:Source:" << Filename << "\n";
-    CovOS << "        -:    0:Graph:" << GCNOFile << "\n";
-    CovOS << "        -:    0:Data:" << GCDAFile << "\n";
-    CovOS << "        -:    0:Runs:" << RunCount << "\n";
-    CovOS << "        -:    0:Programs:" << ProgramCount << "\n";
-
-    const LineData &Line = LineInfo[Filename];
-    GCOVCoverage FileCoverage(Filename);
-    for (uint32_t LineIndex = 0; LineIndex < Line.LastLine || !AllLines.empty();
-         ++LineIndex) {
-      if (Options.BranchInfo) {
-        FunctionLines::const_iterator FuncsIt = Line.Functions.find(LineIndex);
-        if (FuncsIt != Line.Functions.end())
-          printFunctionSummary(CovOS, FuncsIt->second);
-      }
-
-      BlockLines::const_iterator BlocksIt = Line.Blocks.find(LineIndex);
-      if (BlocksIt == Line.Blocks.end()) {
-        // No basic blocks are on this line. Not an executable line of code.
-        CovOS << "        -:";
-        AllLines.printNext(CovOS, LineIndex + 1);
-      } else {
-        const BlockVector &Blocks = BlocksIt->second;
-
-        // Add up the block counts to form line counts.
-        DenseMap<const GCOVFunction *, bool> LineExecs;
-        uint64_t LineCount = 0;
-        for (const GCOVBlock *Block : Blocks) {
-          if (Options.AllBlocks) {
-            // Only take the highest block count for that line.
-            uint64_t BlockCount = Block->getCount();
-            LineCount = LineCount > BlockCount ? LineCount : BlockCount;
-          } else {
-            // Sum up all of the block counts.
-            LineCount += Block->getCount();
-          }
-
-          if (Options.FuncCoverage) {
-            // This is a slightly convoluted way to most accurately gather line
-            // statistics for functions. Basically what is happening is that we
-            // don't want to count a single line with multiple blocks more than
-            // once. However, we also don't simply want to give the total line
-            // count to every function that starts on the line. Thus, what is
-            // happening here are two things:
-            // 1) Ensure that the number of logical lines is only incremented
-            //    once per function.
-            // 2) If there are multiple blocks on the same line, ensure that the
-            //    number of lines executed is incremented as long as at least
-            //    one of the blocks are executed.
-            const GCOVFunction *Function = &Block->getParent();
-            if (FuncCoverages.find(Function) == FuncCoverages.end()) {
-              std::pair<const GCOVFunction *, GCOVCoverage> KeyValue(
-                  Function, GCOVCoverage(Function->getName()));
-              FuncCoverages.insert(KeyValue);
-            }
-            GCOVCoverage &FuncCoverage = FuncCoverages.find(Function)->second;
-
-            if (LineExecs.find(Function) == LineExecs.end()) {
-              if (Block->getCount()) {
-                ++FuncCoverage.LinesExec;
-                LineExecs[Function] = true;
-              } else {
-                LineExecs[Function] = false;
-              }
-              ++FuncCoverage.LogicalLines;
-            } else if (!LineExecs[Function] && Block->getCount()) {
-              ++FuncCoverage.LinesExec;
-              LineExecs[Function] = true;
-            }
-          }
-        }
-
-        if (LineCount == 0)
-          CovOS << "    #####:";
-        else {
-          CovOS << format("%9" PRIu64 ":", LineCount);
-          ++FileCoverage.LinesExec;
-        }
-        ++FileCoverage.LogicalLines;
-
-        AllLines.printNext(CovOS, LineIndex + 1);
-
-        uint32_t BlockNo = 0;
-        uint32_t EdgeNo = 0;
-        for (const GCOVBlock *Block : Blocks) {
-          // Only print block and branch information at the end of the block.
-          if (Block->getLastLine() != LineIndex + 1)
-            continue;
-          if (Options.AllBlocks)
-            printBlockInfo(CovOS, *Block, LineIndex, BlockNo);
-          if (Options.BranchInfo) {
-            size_t NumEdges = Block->getNumDstEdges();
-            if (NumEdges > 1)
-              printBranchInfo(CovOS, *Block, FileCoverage, EdgeNo);
-            else if (Options.UncondBranch && NumEdges == 1)
-              printUncondBranchInfo(CovOS, EdgeNo,
-                                    (*Block->dst_begin())->Count);
-          }
-        }
-      }
-    }
-    FileCoverages.push_back(std::make_pair(CoveragePath, FileCoverage));
-  }
-
-  // FIXME: There is no way to detect calls given current instrumentation.
-  if (Options.FuncCoverage)
-    printFuncCoverage(InfoOS);
-  printFileCoverage(InfoOS);
-}
-
-/// printFunctionSummary - Print function and block summary.
-void FileInfo::printFunctionSummary(raw_ostream &OS,
-                                    const FunctionVector &Funcs) const {
-  for (const GCOVFunction *Func : Funcs) {
-    uint64_t EntryCount = Func->getEntryCount();
-    uint32_t BlocksExec = 0;
-    for (const GCOVBlock &Block : Func->blocks())
-      if (Block.getNumDstEdges() && Block.getCount())
-        ++BlocksExec;
-
-    OS << "function " << Func->getName() << " called " << EntryCount
-       << " returned " << safeDiv(Func->getExitCount() * 100, EntryCount)
-       << "% blocks executed "
-       << safeDiv(BlocksExec * 100, Func->getNumBlocks() - 1) << "%\n";
-  }
-}
-
-/// printBlockInfo - Output counts for each block.
-void FileInfo::printBlockInfo(raw_ostream &OS, const GCOVBlock &Block,
-                              uint32_t LineIndex, uint32_t &BlockNo) const {
-  if (Block.getCount() == 0)
-    OS << "    $$$$$:";
-  else
-    OS << format("%9" PRIu64 ":", Block.getCount());
-  OS << format("%5u-block %2u\n", LineIndex + 1, BlockNo++);
-}
-
-/// printBranchInfo - Print conditional branch probabilities.
-void FileInfo::printBranchInfo(raw_ostream &OS, const GCOVBlock &Block,
-                               GCOVCoverage &Coverage, uint32_t &EdgeNo) {
-  SmallVector<uint64_t, 16> BranchCounts;
-  uint64_t TotalCounts = 0;
-  for (const GCOVEdge *Edge : Block.dsts()) {
-    BranchCounts.push_back(Edge->Count);
-    TotalCounts += Edge->Count;
-    if (Block.getCount())
-      ++Coverage.BranchesExec;
-    if (Edge->Count)
-      ++Coverage.BranchesTaken;
-    ++Coverage.Branches;
-
-    if (Options.FuncCoverage) {
-      const GCOVFunction *Function = &Block.getParent();
-      GCOVCoverage &FuncCoverage = FuncCoverages.find(Function)->second;
-      if (Block.getCount())
-        ++FuncCoverage.BranchesExec;
-      if (Edge->Count)
-        ++FuncCoverage.BranchesTaken;
-      ++FuncCoverage.Branches;
-    }
-  }
-
-  for (uint64_t N : BranchCounts)
-    OS << format("branch %2u ", EdgeNo++)
-       << formatBranchInfo(Options, N, TotalCounts) << "\n";
-}
-
-/// printUncondBranchInfo - Print unconditional branch probabilities.
-void FileInfo::printUncondBranchInfo(raw_ostream &OS, uint32_t &EdgeNo,
-                                     uint64_t Count) const {
-  OS << format("unconditional %2u ", EdgeNo++)
-     << formatBranchInfo(Options, Count, Count) << "\n";
-}
-
-// printCoverage - Print generic coverage info used by both printFuncCoverage
-// and printFileCoverage.
-void FileInfo::printCoverage(raw_ostream &OS,
-                             const GCOVCoverage &Coverage) const {
-  OS << format("Lines executed:%.2f%% of %u\n",
-               double(Coverage.LinesExec) * 100 / Coverage.LogicalLines,
-               Coverage.LogicalLines);
-  if (Options.BranchInfo) {
-    if (Coverage.Branches) {
-      OS << format("Branches executed:%.2f%% of %u\n",
-                   double(Coverage.BranchesExec) * 100 / Coverage.Branches,
-                   Coverage.Branches);
-      OS << format("Taken at least once:%.2f%% of %u\n",
-                   double(Coverage.BranchesTaken) * 100 / Coverage.Branches,
-                   Coverage.Branches);
-    } else {
-      OS << "No branches\n";
-    }
-    OS << "No calls\n"; // to be consistent with gcov
-  }
-}
-
-// printFuncCoverage - Print per-function coverage info.
-void FileInfo::printFuncCoverage(raw_ostream &OS) const {
-  for (const auto &FC : FuncCoverages) {
-    const GCOVCoverage &Coverage = FC.second;
-    OS << "Function '" << Coverage.Name << "'\n";
-    printCoverage(OS, Coverage);
-    OS << "\n";
-  }
-}
-
-// printFileCoverage - Print per-file coverage info.
-void FileInfo::printFileCoverage(raw_ostream &OS) const {
-  for (const auto &FC : FileCoverages) {
-    const std::string &Filename = FC.first;
-    const GCOVCoverage &Coverage = FC.second;
-    OS << "File '" << Coverage.Name << "'\n";
-    printCoverage(OS, Coverage);
-    if (!Options.NoOutput)
-      OS << Coverage.Name << ":creating '" << Filename << "'\n";
-    OS << "\n";
-  }
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/IR/ValueTypes.cpp b/external/bsd/llvm/dist/llvm/lib/IR/ValueTypes.cpp
deleted file mode 100644
index cf6ee063c2d5..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/IR/ValueTypes.cpp
+++ /dev/null
@@ -1,323 +0,0 @@
-//===----------- ValueTypes.cpp - Implementation of EVT methods -----------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements methods in the CodeGen/ValueTypes.h header.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/IR/DerivedTypes.h"
-#include "llvm/IR/LLVMContext.h"
-#include "llvm/IR/Type.h"
-#include "llvm/Support/ErrorHandling.h"
-using namespace llvm;
-
-EVT EVT::changeExtendedTypeToInteger() const {
-  LLVMContext &Context = LLVMTy->getContext();
-  return getIntegerVT(Context, getSizeInBits());
-}
-
-EVT EVT::changeExtendedVectorElementTypeToInteger() const {
-  LLVMContext &Context = LLVMTy->getContext();
-  EVT IntTy = getIntegerVT(Context, getScalarSizeInBits());
-  return getVectorVT(Context, IntTy, getVectorNumElements());
-}
-
-EVT EVT::getExtendedIntegerVT(LLVMContext &Context, unsigned BitWidth) {
-  EVT VT;
-  VT.LLVMTy = IntegerType::get(Context, BitWidth);
-  assert(VT.isExtended() && "Type is not extended!");
-  return VT;
-}
-
-EVT EVT::getExtendedVectorVT(LLVMContext &Context, EVT VT,
-                             unsigned NumElements) {
-  EVT ResultVT;
-  ResultVT.LLVMTy = VectorType::get(VT.getTypeForEVT(Context), NumElements);
-  assert(ResultVT.isExtended() && "Type is not extended!");
-  return ResultVT;
-}
-
-bool EVT::isExtendedFloatingPoint() const {
-  assert(isExtended() && "Type is not extended!");
-  return LLVMTy->isFPOrFPVectorTy();
-}
-
-bool EVT::isExtendedInteger() const {
-  assert(isExtended() && "Type is not extended!");
-  return LLVMTy->isIntOrIntVectorTy();
-}
-
-bool EVT::isExtendedScalarInteger() const {
-  assert(isExtended() && "Type is not extended!");
-  return LLVMTy->isIntegerTy();
-}
-
-bool EVT::isExtendedVector() const {
-  assert(isExtended() && "Type is not extended!");
-  return LLVMTy->isVectorTy();
-}
-
-bool EVT::isExtended16BitVector() const {
-  return isExtendedVector() && getExtendedSizeInBits() == 16;
-}
-
-bool EVT::isExtended32BitVector() const {
-  return isExtendedVector() && getExtendedSizeInBits() == 32;
-}
-
-bool EVT::isExtended64BitVector() const {
-  return isExtendedVector() && getExtendedSizeInBits() == 64;
-}
-
-bool EVT::isExtended128BitVector() const {
-  return isExtendedVector() && getExtendedSizeInBits() == 128;
-}
-
-bool EVT::isExtended256BitVector() const {
-  return isExtendedVector() && getExtendedSizeInBits() == 256;
-}
-
-bool EVT::isExtended512BitVector() const {
-  return isExtendedVector() && getExtendedSizeInBits() == 512;
-}
-
-bool EVT::isExtended1024BitVector() const {
-  return isExtendedVector() && getExtendedSizeInBits() == 1024;
-}
-
-bool EVT::isExtended2048BitVector() const {
-  return isExtendedVector() && getExtendedSizeInBits() == 2048;
-}
-
-EVT EVT::getExtendedVectorElementType() const {
-  assert(isExtended() && "Type is not extended!");
-  return EVT::getEVT(cast<VectorType>(LLVMTy)->getElementType());
-}
-
-unsigned EVT::getExtendedVectorNumElements() const {
-  assert(isExtended() && "Type is not extended!");
-  return cast<VectorType>(LLVMTy)->getNumElements();
-}
-
-unsigned EVT::getExtendedSizeInBits() const {
-  assert(isExtended() && "Type is not extended!");
-  if (IntegerType *ITy = dyn_cast<IntegerType>(LLVMTy))
-    return ITy->getBitWidth();
-  if (VectorType *VTy = dyn_cast<VectorType>(LLVMTy))
-    return VTy->getBitWidth();
-  llvm_unreachable("Unrecognized extended type!");
-}
-
-/// getEVTString - This function returns value type as a string, e.g. "i32".
-std::string EVT::getEVTString() const {
-  switch (V.SimpleTy) {
-  default:
-    if (isVector())
-      return "v" + utostr(getVectorNumElements()) +
-             getVectorElementType().getEVTString();
-    if (isInteger())
-      return "i" + utostr(getSizeInBits());
-    llvm_unreachable("Invalid EVT!");
-  case MVT::i1:      return "i1";
-  case MVT::i8:      return "i8";
-  case MVT::i16:     return "i16";
-  case MVT::i32:     return "i32";
-  case MVT::i64:     return "i64";
-  case MVT::i128:    return "i128";
-  case MVT::f16:     return "f16";
-  case MVT::f32:     return "f32";
-  case MVT::f64:     return "f64";
-  case MVT::f80:     return "f80";
-  case MVT::f128:    return "f128";
-  case MVT::ppcf128: return "ppcf128";
-  case MVT::isVoid:  return "isVoid";
-  case MVT::Other:   return "ch";
-  case MVT::Glue:    return "glue";
-  case MVT::x86mmx:  return "x86mmx";
-  case MVT::v1i1:    return "v1i1";
-  case MVT::v2i1:    return "v2i1";
-  case MVT::v4i1:    return "v4i1";
-  case MVT::v8i1:    return "v8i1";
-  case MVT::v16i1:   return "v16i1";
-  case MVT::v32i1:   return "v32i1";
-  case MVT::v64i1:   return "v64i1";
-  case MVT::v512i1:  return "v512i1";
-  case MVT::v1024i1: return "v1024i1";
-  case MVT::v1i8:    return "v1i8";
-  case MVT::v2i8:    return "v2i8";
-  case MVT::v4i8:    return "v4i8";
-  case MVT::v8i8:    return "v8i8";
-  case MVT::v16i8:   return "v16i8";
-  case MVT::v32i8:   return "v32i8";
-  case MVT::v64i8:   return "v64i8";
-  case MVT::v128i8:  return "v128i8";
-  case MVT::v256i8:  return "v256i8";
-  case MVT::v1i16:   return "v1i16";
-  case MVT::v2i16:   return "v2i16";
-  case MVT::v4i16:   return "v4i16";
-  case MVT::v8i16:   return "v8i16";
-  case MVT::v16i16:  return "v16i16";
-  case MVT::v32i16:  return "v32i16";
-  case MVT::v64i16:  return "v64i16";
-  case MVT::v128i16: return "v128i16";
-  case MVT::v1i32:   return "v1i32";
-  case MVT::v2i32:   return "v2i32";
-  case MVT::v4i32:   return "v4i32";
-  case MVT::v8i32:   return "v8i32";
-  case MVT::v16i32:  return "v16i32";
-  case MVT::v32i32:  return "v32i32";
-  case MVT::v64i32:  return "v64i32";
-  case MVT::v1i64:   return "v1i64";
-  case MVT::v2i64:   return "v2i64";
-  case MVT::v4i64:   return "v4i64";
-  case MVT::v8i64:   return "v8i64";
-  case MVT::v16i64:  return "v16i64";
-  case MVT::v32i64:  return "v32i64";
-  case MVT::v1i128:  return "v1i128";
-  case MVT::v1f32:   return "v1f32";
-  case MVT::v2f32:   return "v2f32";
-  case MVT::v2f16:   return "v2f16";
-  case MVT::v4f16:   return "v4f16";
-  case MVT::v8f16:   return "v8f16";
-  case MVT::v4f32:   return "v4f32";
-  case MVT::v8f32:   return "v8f32";
-  case MVT::v16f32:  return "v16f32";
-  case MVT::v1f64:   return "v1f64";
-  case MVT::v2f64:   return "v2f64";
-  case MVT::v4f64:   return "v4f64";
-  case MVT::v8f64:   return "v8f64";
-  case MVT::Metadata:return "Metadata";
-  case MVT::Untyped: return "Untyped";
-  }
-}
-
-/// getTypeForEVT - This method returns an LLVM type corresponding to the
-/// specified EVT.  For integer types, this returns an unsigned type.  Note
-/// that this will abort for types that cannot be represented.
-Type *EVT::getTypeForEVT(LLVMContext &Context) const {
-  switch (V.SimpleTy) {
-  default:
-    assert(isExtended() && "Type is not extended!");
-    return LLVMTy;
-  case MVT::isVoid:  return Type::getVoidTy(Context);
-  case MVT::i1:      return Type::getInt1Ty(Context);
-  case MVT::i8:      return Type::getInt8Ty(Context);
-  case MVT::i16:     return Type::getInt16Ty(Context);
-  case MVT::i32:     return Type::getInt32Ty(Context);
-  case MVT::i64:     return Type::getInt64Ty(Context);
-  case MVT::i128:    return IntegerType::get(Context, 128);
-  case MVT::f16:     return Type::getHalfTy(Context);
-  case MVT::f32:     return Type::getFloatTy(Context);
-  case MVT::f64:     return Type::getDoubleTy(Context);
-  case MVT::f80:     return Type::getX86_FP80Ty(Context);
-  case MVT::f128:    return Type::getFP128Ty(Context);
-  case MVT::ppcf128: return Type::getPPC_FP128Ty(Context);
-  case MVT::x86mmx:  return Type::getX86_MMXTy(Context);
-  case MVT::v1i1:    return VectorType::get(Type::getInt1Ty(Context), 1);
-  case MVT::v2i1:    return VectorType::get(Type::getInt1Ty(Context), 2);
-  case MVT::v4i1:    return VectorType::get(Type::getInt1Ty(Context), 4);
-  case MVT::v8i1:    return VectorType::get(Type::getInt1Ty(Context), 8);
-  case MVT::v16i1:   return VectorType::get(Type::getInt1Ty(Context), 16);
-  case MVT::v32i1:   return VectorType::get(Type::getInt1Ty(Context), 32);
-  case MVT::v64i1:   return VectorType::get(Type::getInt1Ty(Context), 64);
-  case MVT::v512i1:  return VectorType::get(Type::getInt1Ty(Context), 512);
-  case MVT::v1024i1: return VectorType::get(Type::getInt1Ty(Context), 1024);
-  case MVT::v1i8:    return VectorType::get(Type::getInt8Ty(Context), 1);
-  case MVT::v2i8:    return VectorType::get(Type::getInt8Ty(Context), 2);
-  case MVT::v4i8:    return VectorType::get(Type::getInt8Ty(Context), 4);
-  case MVT::v8i8:    return VectorType::get(Type::getInt8Ty(Context), 8);
-  case MVT::v16i8:   return VectorType::get(Type::getInt8Ty(Context), 16);
-  case MVT::v32i8:   return VectorType::get(Type::getInt8Ty(Context), 32);
-  case MVT::v64i8:   return VectorType::get(Type::getInt8Ty(Context), 64);
-  case MVT::v128i8:  return VectorType::get(Type::getInt8Ty(Context), 128);
-  case MVT::v256i8:  return VectorType::get(Type::getInt8Ty(Context), 256);
-  case MVT::v1i16:   return VectorType::get(Type::getInt16Ty(Context), 1);
-  case MVT::v2i16:   return VectorType::get(Type::getInt16Ty(Context), 2);
-  case MVT::v4i16:   return VectorType::get(Type::getInt16Ty(Context), 4);
-  case MVT::v8i16:   return VectorType::get(Type::getInt16Ty(Context), 8);
-  case MVT::v16i16:  return VectorType::get(Type::getInt16Ty(Context), 16);
-  case MVT::v32i16:  return VectorType::get(Type::getInt16Ty(Context), 32);
-  case MVT::v64i16:  return VectorType::get(Type::getInt16Ty(Context), 64);
-  case MVT::v128i16: return VectorType::get(Type::getInt16Ty(Context), 128);
-  case MVT::v1i32:   return VectorType::get(Type::getInt32Ty(Context), 1);
-  case MVT::v2i32:   return VectorType::get(Type::getInt32Ty(Context), 2);
-  case MVT::v4i32:   return VectorType::get(Type::getInt32Ty(Context), 4);
-  case MVT::v8i32:   return VectorType::get(Type::getInt32Ty(Context), 8);
-  case MVT::v16i32:  return VectorType::get(Type::getInt32Ty(Context), 16);
-  case MVT::v32i32:  return VectorType::get(Type::getInt32Ty(Context), 32);
-  case MVT::v64i32:  return VectorType::get(Type::getInt32Ty(Context), 64);
-  case MVT::v1i64:   return VectorType::get(Type::getInt64Ty(Context), 1);
-  case MVT::v2i64:   return VectorType::get(Type::getInt64Ty(Context), 2);
-  case MVT::v4i64:   return VectorType::get(Type::getInt64Ty(Context), 4);
-  case MVT::v8i64:   return VectorType::get(Type::getInt64Ty(Context), 8);
-  case MVT::v16i64:  return VectorType::get(Type::getInt64Ty(Context), 16);
-  case MVT::v32i64:  return VectorType::get(Type::getInt64Ty(Context), 32);
-  case MVT::v1i128:  return VectorType::get(Type::getInt128Ty(Context), 1);
-  case MVT::v2f16:   return VectorType::get(Type::getHalfTy(Context), 2);
-  case MVT::v4f16:   return VectorType::get(Type::getHalfTy(Context), 4);
-  case MVT::v8f16:   return VectorType::get(Type::getHalfTy(Context), 8);
-  case MVT::v1f32:   return VectorType::get(Type::getFloatTy(Context), 1);
-  case MVT::v2f32:   return VectorType::get(Type::getFloatTy(Context), 2);
-  case MVT::v4f32:   return VectorType::get(Type::getFloatTy(Context), 4);
-  case MVT::v8f32:   return VectorType::get(Type::getFloatTy(Context), 8);
-  case MVT::v16f32:   return VectorType::get(Type::getFloatTy(Context), 16);
-  case MVT::v1f64:   return VectorType::get(Type::getDoubleTy(Context), 1);
-  case MVT::v2f64:   return VectorType::get(Type::getDoubleTy(Context), 2);
-  case MVT::v4f64:   return VectorType::get(Type::getDoubleTy(Context), 4); 
-  case MVT::v8f64:   return VectorType::get(Type::getDoubleTy(Context), 8); 
-  case MVT::Metadata: return Type::getMetadataTy(Context);
- }
-}
-
-/// Return the value type corresponding to the specified type.  This returns all
-/// pointers as MVT::iPTR.  If HandleUnknown is true, unknown types are returned
-/// as Other, otherwise they are invalid.
-MVT MVT::getVT(Type *Ty, bool HandleUnknown){
-  switch (Ty->getTypeID()) {
-  default:
-    if (HandleUnknown) return MVT(MVT::Other);
-    llvm_unreachable("Unknown type!");
-  case Type::VoidTyID:
-    return MVT::isVoid;
-  case Type::IntegerTyID:
-    return getIntegerVT(cast<IntegerType>(Ty)->getBitWidth());
-  case Type::HalfTyID:      return MVT(MVT::f16);
-  case Type::FloatTyID:     return MVT(MVT::f32);
-  case Type::DoubleTyID:    return MVT(MVT::f64);
-  case Type::X86_FP80TyID:  return MVT(MVT::f80);
-  case Type::X86_MMXTyID:   return MVT(MVT::x86mmx);
-  case Type::FP128TyID:     return MVT(MVT::f128);
-  case Type::PPC_FP128TyID: return MVT(MVT::ppcf128);
-  case Type::PointerTyID:   return MVT(MVT::iPTR);
-  case Type::VectorTyID: {
-    VectorType *VTy = cast<VectorType>(Ty);
-    return getVectorVT(
-      getVT(VTy->getElementType(), false), VTy->getNumElements());
-  }
-  }
-}
-
-/// getEVT - Return the value type corresponding to the specified type.  This
-/// returns all pointers as MVT::iPTR.  If HandleUnknown is true, unknown types
-/// are returned as Other, otherwise they are invalid.
-EVT EVT::getEVT(Type *Ty, bool HandleUnknown){
-  switch (Ty->getTypeID()) {
-  default:
-    return MVT::getVT(Ty, HandleUnknown);
-  case Type::IntegerTyID:
-    return getIntegerVT(Ty->getContext(), cast<IntegerType>(Ty)->getBitWidth());
-  case Type::VectorTyID: {
-    VectorType *VTy = cast<VectorType>(Ty);
-    return getVectorVT(Ty->getContext(), getEVT(VTy->getElementType(), false),
-                       VTy->getNumElements());
-  }
-  }
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Support/AMDGPUCodeObjectMetadata.cpp b/external/bsd/llvm/dist/llvm/lib/Support/AMDGPUCodeObjectMetadata.cpp
deleted file mode 100644
index 863093ab7def..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Support/AMDGPUCodeObjectMetadata.cpp
+++ /dev/null
@@ -1,216 +0,0 @@
-//===--- AMDGPUCodeObjectMetadata.cpp ---------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// \brief AMDGPU Code Object Metadata definitions and in-memory
-/// representations.
-///
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Support/AMDGPUCodeObjectMetadata.h"
-#include "llvm/Support/YAMLTraits.h"
-
-using namespace llvm::AMDGPU;
-using namespace llvm::AMDGPU::CodeObject;
-
-LLVM_YAML_IS_SEQUENCE_VECTOR(Kernel::Arg::Metadata)
-LLVM_YAML_IS_SEQUENCE_VECTOR(Kernel::Metadata)
-
-namespace llvm {
-namespace yaml {
-
-template <>
-struct ScalarEnumerationTraits<AccessQualifier> {
-  static void enumeration(IO &YIO, AccessQualifier &EN) {
-    YIO.enumCase(EN, "Default", AccessQualifier::Default);
-    YIO.enumCase(EN, "ReadOnly", AccessQualifier::ReadOnly);
-    YIO.enumCase(EN, "WriteOnly", AccessQualifier::WriteOnly);
-    YIO.enumCase(EN, "ReadWrite", AccessQualifier::ReadWrite);
-  }
-};
-
-template <>
-struct ScalarEnumerationTraits<AddressSpaceQualifier> {
-  static void enumeration(IO &YIO, AddressSpaceQualifier &EN) {
-    YIO.enumCase(EN, "Private", AddressSpaceQualifier::Private);
-    YIO.enumCase(EN, "Global", AddressSpaceQualifier::Global);
-    YIO.enumCase(EN, "Constant", AddressSpaceQualifier::Constant);
-    YIO.enumCase(EN, "Local", AddressSpaceQualifier::Local);
-    YIO.enumCase(EN, "Generic", AddressSpaceQualifier::Generic);
-    YIO.enumCase(EN, "Region", AddressSpaceQualifier::Region);
-  }
-};
-
-template <>
-struct ScalarEnumerationTraits<ValueKind> {
-  static void enumeration(IO &YIO, ValueKind &EN) {
-    YIO.enumCase(EN, "ByValue", ValueKind::ByValue);
-    YIO.enumCase(EN, "GlobalBuffer", ValueKind::GlobalBuffer);
-    YIO.enumCase(EN, "DynamicSharedPointer", ValueKind::DynamicSharedPointer);
-    YIO.enumCase(EN, "Sampler", ValueKind::Sampler);
-    YIO.enumCase(EN, "Image", ValueKind::Image);
-    YIO.enumCase(EN, "Pipe", ValueKind::Pipe);
-    YIO.enumCase(EN, "Queue", ValueKind::Queue);
-    YIO.enumCase(EN, "HiddenGlobalOffsetX", ValueKind::HiddenGlobalOffsetX);
-    YIO.enumCase(EN, "HiddenGlobalOffsetY", ValueKind::HiddenGlobalOffsetY);
-    YIO.enumCase(EN, "HiddenGlobalOffsetZ", ValueKind::HiddenGlobalOffsetZ);
-    YIO.enumCase(EN, "HiddenNone", ValueKind::HiddenNone);
-    YIO.enumCase(EN, "HiddenPrintfBuffer", ValueKind::HiddenPrintfBuffer);
-    YIO.enumCase(EN, "HiddenDefaultQueue", ValueKind::HiddenDefaultQueue);
-    YIO.enumCase(EN, "HiddenCompletionAction",
-                 ValueKind::HiddenCompletionAction);
-  }
-};
-
-template <>
-struct ScalarEnumerationTraits<ValueType> {
-  static void enumeration(IO &YIO, ValueType &EN) {
-    YIO.enumCase(EN, "Struct", ValueType::Struct);
-    YIO.enumCase(EN, "I8", ValueType::I8);
-    YIO.enumCase(EN, "U8", ValueType::U8);
-    YIO.enumCase(EN, "I16", ValueType::I16);
-    YIO.enumCase(EN, "U16", ValueType::U16);
-    YIO.enumCase(EN, "F16", ValueType::F16);
-    YIO.enumCase(EN, "I32", ValueType::I32);
-    YIO.enumCase(EN, "U32", ValueType::U32);
-    YIO.enumCase(EN, "F32", ValueType::F32);
-    YIO.enumCase(EN, "I64", ValueType::I64);
-    YIO.enumCase(EN, "U64", ValueType::U64);
-    YIO.enumCase(EN, "F64", ValueType::F64);
-  }
-};
-
-template <>
-struct MappingTraits<Kernel::Attrs::Metadata> {
-  static void mapping(IO &YIO, Kernel::Attrs::Metadata &MD) {
-    YIO.mapOptional(Kernel::Attrs::Key::ReqdWorkGroupSize,
-                    MD.mReqdWorkGroupSize, std::vector<uint32_t>());
-    YIO.mapOptional(Kernel::Attrs::Key::WorkGroupSizeHint,
-                    MD.mWorkGroupSizeHint, std::vector<uint32_t>());
-    YIO.mapOptional(Kernel::Attrs::Key::VecTypeHint,
-                    MD.mVecTypeHint, std::string());
-  }
-};
-
-template <>
-struct MappingTraits<Kernel::Arg::Metadata> {
-  static void mapping(IO &YIO, Kernel::Arg::Metadata &MD) {
-    YIO.mapRequired(Kernel::Arg::Key::Size, MD.mSize);
-    YIO.mapRequired(Kernel::Arg::Key::Align, MD.mAlign);
-    YIO.mapRequired(Kernel::Arg::Key::ValueKind, MD.mValueKind);
-    YIO.mapRequired(Kernel::Arg::Key::ValueType, MD.mValueType);
-    YIO.mapOptional(Kernel::Arg::Key::PointeeAlign, MD.mPointeeAlign,
-                    uint32_t(0));
-    YIO.mapOptional(Kernel::Arg::Key::AccQual, MD.mAccQual,
-                    AccessQualifier::Unknown);
-    YIO.mapOptional(Kernel::Arg::Key::AddrSpaceQual, MD.mAddrSpaceQual,
-                    AddressSpaceQualifier::Unknown);
-    YIO.mapOptional(Kernel::Arg::Key::IsConst, MD.mIsConst, false);
-    YIO.mapOptional(Kernel::Arg::Key::IsPipe, MD.mIsPipe, false);
-    YIO.mapOptional(Kernel::Arg::Key::IsRestrict, MD.mIsRestrict, false);
-    YIO.mapOptional(Kernel::Arg::Key::IsVolatile, MD.mIsVolatile, false);
-    YIO.mapOptional(Kernel::Arg::Key::Name, MD.mName, std::string());
-    YIO.mapOptional(Kernel::Arg::Key::TypeName, MD.mTypeName, std::string());
-  }
-};
-
-template <>
-struct MappingTraits<Kernel::CodeProps::Metadata> {
-  static void mapping(IO &YIO, Kernel::CodeProps::Metadata &MD) {
-    YIO.mapOptional(Kernel::CodeProps::Key::KernargSegmentSize,
-                    MD.mKernargSegmentSize, uint64_t(0));
-    YIO.mapOptional(Kernel::CodeProps::Key::WorkgroupGroupSegmentSize,
-                    MD.mWorkgroupGroupSegmentSize, uint32_t(0));
-    YIO.mapOptional(Kernel::CodeProps::Key::WorkitemPrivateSegmentSize,
-                    MD.mWorkitemPrivateSegmentSize, uint32_t(0));
-    YIO.mapOptional(Kernel::CodeProps::Key::WavefrontNumSGPRs,
-                    MD.mWavefrontNumSGPRs, uint16_t(0));
-    YIO.mapOptional(Kernel::CodeProps::Key::WorkitemNumVGPRs,
-                    MD.mWorkitemNumVGPRs, uint16_t(0));
-    YIO.mapOptional(Kernel::CodeProps::Key::KernargSegmentAlign,
-                    MD.mKernargSegmentAlign, uint8_t(0));
-    YIO.mapOptional(Kernel::CodeProps::Key::GroupSegmentAlign,
-                    MD.mGroupSegmentAlign, uint8_t(0));
-    YIO.mapOptional(Kernel::CodeProps::Key::PrivateSegmentAlign,
-                    MD.mPrivateSegmentAlign, uint8_t(0));
-    YIO.mapOptional(Kernel::CodeProps::Key::WavefrontSize,
-                    MD.mWavefrontSize, uint8_t(0));
-  }
-};
-
-template <>
-struct MappingTraits<Kernel::DebugProps::Metadata> {
-  static void mapping(IO &YIO, Kernel::DebugProps::Metadata &MD) {
-    YIO.mapOptional(Kernel::DebugProps::Key::DebuggerABIVersion,
-                    MD.mDebuggerABIVersion, std::vector<uint32_t>());
-    YIO.mapOptional(Kernel::DebugProps::Key::ReservedNumVGPRs,
-                    MD.mReservedNumVGPRs, uint16_t(0));
-    YIO.mapOptional(Kernel::DebugProps::Key::ReservedFirstVGPR,
-                    MD.mReservedFirstVGPR, uint16_t(-1));
-    YIO.mapOptional(Kernel::DebugProps::Key::PrivateSegmentBufferSGPR,
-                    MD.mPrivateSegmentBufferSGPR, uint16_t(-1));
-    YIO.mapOptional(Kernel::DebugProps::Key::WavefrontPrivateSegmentOffsetSGPR,
-                    MD.mWavefrontPrivateSegmentOffsetSGPR, uint16_t(-1));
-  }
-};
-
-template <>
-struct MappingTraits<Kernel::Metadata> {
-  static void mapping(IO &YIO, Kernel::Metadata &MD) {
-    YIO.mapRequired(Kernel::Key::Name, MD.mName);
-    YIO.mapOptional(Kernel::Key::Language, MD.mLanguage, std::string());
-    YIO.mapOptional(Kernel::Key::LanguageVersion, MD.mLanguageVersion,
-                    std::vector<uint32_t>());
-    if (!MD.mAttrs.empty() || !YIO.outputting())
-      YIO.mapOptional(Kernel::Key::Attrs, MD.mAttrs);
-    if (!MD.mArgs.empty() || !YIO.outputting())
-      YIO.mapOptional(Kernel::Key::Args, MD.mArgs);
-    if (!MD.mCodeProps.empty() || !YIO.outputting())
-      YIO.mapOptional(Kernel::Key::CodeProps, MD.mCodeProps);
-    if (!MD.mDebugProps.empty() || !YIO.outputting())
-      YIO.mapOptional(Kernel::Key::DebugProps, MD.mDebugProps);
-  }
-};
-
-template <>
-struct MappingTraits<CodeObject::Metadata> {
-  static void mapping(IO &YIO, CodeObject::Metadata &MD) {
-    YIO.mapRequired(Key::Version, MD.mVersion);
-    YIO.mapOptional(Key::Printf, MD.mPrintf, std::vector<std::string>());
-    if (!MD.mKernels.empty() || !YIO.outputting())
-      YIO.mapOptional(Key::Kernels, MD.mKernels);
-  }
-};
-
-} // end namespace yaml
-
-namespace AMDGPU {
-namespace CodeObject {
-
-/* static */
-std::error_code Metadata::fromYamlString(
-    std::string YamlString, Metadata &CodeObjectMetadata) {
-  yaml::Input YamlInput(YamlString);
-  YamlInput >> CodeObjectMetadata;
-  return YamlInput.error();
-}
-
-/* static */
-std::error_code Metadata::toYamlString(
-    Metadata CodeObjectMetadata, std::string &YamlString) {
-  raw_string_ostream YamlStream(YamlString);
-  yaml::Output YamlOutput(YamlStream, nullptr, std::numeric_limits<int>::max());
-  YamlOutput << CodeObjectMetadata;
-  return std::error_code();
-}
-
-} // end namespace CodeObject
-} // end namespace AMDGPU
-} // end namespace llvm
diff --git a/external/bsd/llvm/dist/llvm/lib/Support/regcclass.h b/external/bsd/llvm/dist/llvm/lib/Support/regcclass.h
deleted file mode 100644
index 7fd66046cd87..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Support/regcclass.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*-
- * This code is derived from OpenBSD's libc/regex, original license follows:
- *
- * This code is derived from OpenBSD's libc/regex, original license follows:
- *
- * Copyright (c) 1992, 1993, 1994 Henry Spencer.
- * Copyright (c) 1992, 1993, 1994
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Henry Spencer.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)cclass.h	8.3 (Berkeley) 3/20/94
- */
-
-#ifndef LLVM_SUPPORT_REGCCLASS_H
-#define LLVM_SUPPORT_REGCCLASS_H
-
-/* character-class table */
-static struct cclass {
-	const char *name;
-	const char *chars;
-	const char *multis;
-} cclasses[] = {
-	{ "alnum",	"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz\
-0123456789",				""} ,
-	{ "alpha",	"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz",
-					""} ,
-	{ "blank",	" \t",		""} ,
-	{ "cntrl",	"\007\b\t\n\v\f\r\1\2\3\4\5\6\16\17\20\21\22\23\24\
-\25\26\27\30\31\32\33\34\35\36\37\177",	""} ,
-	{ "digit",	"0123456789",	""} ,
-	{ "graph",	"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz\
-0123456789!\"#$%&'()*+,-./:;<=>?@[\\]^_`{|}~",
-					""} ,
-	{ "lower",	"abcdefghijklmnopqrstuvwxyz",
-					""} ,
-	{ "print",	"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz\
-0123456789!\"#$%&'()*+,-./:;<=>?@[\\]^_`{|}~ ",
-					""} ,
-	{ "punct",	"!\"#$%&'()*+,-./:;<=>?@[\\]^_`{|}~",
-					""} ,
-	{ "space",	"\t\n\v\f\r ",	""} ,
-	{ "upper",	"ABCDEFGHIJKLMNOPQRSTUVWXYZ",
-					""} ,
-	{ "xdigit",	"0123456789ABCDEFabcdef",
-					""} ,
-	{ NULL,		0,		"" }
-};
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/Support/regcname.h b/external/bsd/llvm/dist/llvm/lib/Support/regcname.h
deleted file mode 100644
index 891d25573e8c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Support/regcname.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/*-
- * This code is derived from OpenBSD's libc/regex, original license follows:
- *
- * Copyright (c) 1992, 1993, 1994 Henry Spencer.
- * Copyright (c) 1992, 1993, 1994
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Henry Spencer.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)cname.h	8.3 (Berkeley) 3/20/94
- */
-
-#ifndef LLVM_SUPPORT_REGCNAME_H
-#define LLVM_SUPPORT_REGCNAME_H
-
-/* character-name table */
-static struct cname {
-	const char *name;
-	char code;
-} cnames[] = {
-	{ "NUL",			'\0' },
-	{ "SOH",			'\001' },
-	{ "STX",			'\002' },
-	{ "ETX",			'\003' },
-	{ "EOT",			'\004' },
-	{ "ENQ",			'\005' },
-	{ "ACK",			'\006' },
-	{ "BEL",			'\007' },
-	{ "alert",			'\007' },
-	{ "BS",				'\010' },
-	{ "backspace",			'\b' },
-	{ "HT",				'\011' },
-	{ "tab",			'\t' },
-	{ "LF",				'\012' },
-	{ "newline",			'\n' },
-	{ "VT",				'\013' },
-	{ "vertical-tab",		'\v' },
-	{ "FF",				'\014' },
-	{ "form-feed",			'\f' },
-	{ "CR",				'\015' },
-	{ "carriage-return",		'\r' },
-	{ "SO",				'\016' },
-	{ "SI",				'\017' },
-	{ "DLE",			'\020' },
-	{ "DC1",			'\021' },
-	{ "DC2",			'\022' },
-	{ "DC3",			'\023' },
-	{ "DC4",			'\024' },
-	{ "NAK",			'\025' },
-	{ "SYN",			'\026' },
-	{ "ETB",			'\027' },
-	{ "CAN",			'\030' },
-	{ "EM",				'\031' },
-	{ "SUB",			'\032' },
-	{ "ESC",			'\033' },
-	{ "IS4",			'\034' },
-	{ "FS",				'\034' },
-	{ "IS3",			'\035' },
-	{ "GS",				'\035' },
-	{ "IS2",			'\036' },
-	{ "RS",				'\036' },
-	{ "IS1",			'\037' },
-	{ "US",				'\037' },
-	{ "space",			' ' },
-	{ "exclamation-mark",		'!' },
-	{ "quotation-mark",		'"' },
-	{ "number-sign",		'#' },
-	{ "dollar-sign",		'$' },
-	{ "percent-sign",		'%' },
-	{ "ampersand",			'&' },
-	{ "apostrophe",			'\'' },
-	{ "left-parenthesis",		'(' },
-	{ "right-parenthesis",		')' },
-	{ "asterisk",			'*' },
-	{ "plus-sign",			'+' },
-	{ "comma",			',' },
-	{ "hyphen",			'-' },
-	{ "hyphen-minus",		'-' },
-	{ "period",			'.' },
-	{ "full-stop",			'.' },
-	{ "slash",			'/' },
-	{ "solidus",			'/' },
-	{ "zero",			'0' },
-	{ "one",			'1' },
-	{ "two",			'2' },
-	{ "three",			'3' },
-	{ "four",			'4' },
-	{ "five",			'5' },
-	{ "six",			'6' },
-	{ "seven",			'7' },
-	{ "eight",			'8' },
-	{ "nine",			'9' },
-	{ "colon",			':' },
-	{ "semicolon",			';' },
-	{ "less-than-sign",		'<' },
-	{ "equals-sign",		'=' },
-	{ "greater-than-sign",		'>' },
-	{ "question-mark",		'?' },
-	{ "commercial-at",		'@' },
-	{ "left-square-bracket",	'[' },
-	{ "backslash",			'\\' },
-	{ "reverse-solidus",		'\\' },
-	{ "right-square-bracket",	']' },
-	{ "circumflex",			'^' },
-	{ "circumflex-accent",		'^' },
-	{ "underscore",			'_' },
-	{ "low-line",			'_' },
-	{ "grave-accent",		'`' },
-	{ "left-brace",			'{' },
-	{ "left-curly-bracket",		'{' },
-	{ "vertical-line",		'|' },
-	{ "right-brace",		'}' },
-	{ "right-curly-bracket",	'}' },
-	{ "tilde",			'~' },
-	{ "DEL",			'\177' },
-	{ NULL,				0 }
-};
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64SchedM1.td b/external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64SchedM1.td
deleted file mode 100644
index 3b71cf8399a0..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64SchedM1.td
+++ /dev/null
@@ -1,711 +0,0 @@
-//=- AArch64SchedM1.td - Samsung Exynos-M1 Scheduling Defs ---*- tablegen -*-=//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the machine model for Samsung Exynos-M1 to support
-// instruction scheduling and other instruction cost heuristics.
-//
-//===----------------------------------------------------------------------===//
-
-//===----------------------------------------------------------------------===//
-// The Exynos-M1 is a traditional superscalar microprocessor with a
-// 4-wide in-order stage for decode and dispatch and a wider issue stage.
-// The execution units and loads and stores are out-of-order.
-
-def ExynosM1Model : SchedMachineModel {
-  let IssueWidth            =  4; // Up to 4 uops per cycle.
-  let MicroOpBufferSize     = 96; // ROB size.
-  let LoopMicroOpBufferSize = 24; // Based on the instruction queue size.
-  let LoadLatency           =  4; // Optimistic load cases.
-  let MispredictPenalty     = 14; // Minimum branch misprediction penalty.
-  let CompleteModel         =  1; // Use the default model otherwise.
-}
-
-//===----------------------------------------------------------------------===//
-// Define each kind of processor resource and number available on the Exynos-M1,
-// which has 9 pipelines, each with its own queue with out-of-order dispatch.
-
-def M1UnitA  : ProcResource<2>; // Simple integer
-def M1UnitC  : ProcResource<1>; // Simple and complex integer
-def M1UnitD  : ProcResource<1>; // Integer division (inside C, serialized)
-def M1UnitB  : ProcResource<2>; // Branch
-def M1UnitL  : ProcResource<1>; // Load
-def M1UnitS  : ProcResource<1>; // Store
-def M1PipeF0 : ProcResource<1>; // FP #0
-let Super = M1PipeF0 in {
-  def M1UnitFMAC   : ProcResource<1>; // FP multiplication
-  def M1UnitNAL0   : ProcResource<1>; // Simple vector
-  def M1UnitNMISC  : ProcResource<1>; // Miscellanea
-  def M1UnitFCVT   : ProcResource<1>; // FP conversion
-  def M1UnitNCRYPT : ProcResource<1>; // Cryptographic
-}
-def M1PipeF1 : ProcResource<1>; // FP #1
-let Super = M1PipeF1 in {
-  def M1UnitFADD : ProcResource<1>; // Simple FP
-  def M1UnitNAL1 : ProcResource<1>; // Simple vector
-  def M1UnitFVAR : ProcResource<1>; // FP division & square root (serialized)
-  def M1UnitFST  : ProcResource<1>; // FP store
-}
-
-let SchedModel = ExynosM1Model in {
-  def M1UnitALU  : ProcResGroup<[M1UnitA,
-                                 M1UnitC]>;    // All integer
-  def M1UnitNALU : ProcResGroup<[M1UnitNAL0,
-                                 M1UnitNAL1]>; // All simple vector
-}
-
-let SchedModel = ExynosM1Model in {
-
-//===----------------------------------------------------------------------===//
-// Coarse scheduling model for the Exynos-M1.
-
-def M1WriteA1 : SchedWriteRes<[M1UnitALU]> { let Latency = 1; }
-def M1WriteA2 : SchedWriteRes<[M1UnitALU]> { let Latency = 2; }
-def M1WriteC1 : SchedWriteRes<[M1UnitC]>   { let Latency = 1; }
-def M1WriteC2 : SchedWriteRes<[M1UnitC]>   { let Latency = 2; }
-
-def M1WriteB1 : SchedWriteRes<[M1UnitB]>      { let Latency = 1; }
-
-def M1WriteL5 : SchedWriteRes<[M1UnitL]>   { let Latency = 5; }
-def M1WriteLX : SchedWriteVariant<[SchedVar<ScaledIdxPred, [M1WriteL5,
-                                                            M1WriteA1]>,
-                                   SchedVar<NoSchedPred,   [M1WriteL5]>]>;
-
-def M1WriteS1 : SchedWriteRes<[M1UnitS]> { let Latency = 1; }
-def M1WriteS2 : SchedWriteRes<[M1UnitS]> { let Latency = 2; }
-def M1WriteS4 : SchedWriteRes<[M1UnitS]> { let Latency = 4; }
-def M1WriteSX : SchedWriteVariant<[SchedVar<ScaledIdxPred, [M1WriteS2,
-                                                            M1WriteA1]>,
-                                   SchedVar<NoSchedPred,   [M1WriteS1]>]>;
-
-def M1ReadAdrBase : SchedReadVariant<[SchedVar<ScaledIdxPred, [ReadDefault]>,
-                                      SchedVar<NoSchedPred,   [ReadDefault]>]>;
-def : SchedAlias<ReadAdrBase, M1ReadAdrBase>;
-
-// Branch instructions.
-// NOTE: Unconditional direct branches actually take neither cycles nor units.
-def : WriteRes<WriteBr,    [M1UnitB]> { let Latency = 1; }
-def : WriteRes<WriteBrReg, [M1UnitC]> { let Latency = 1; }
-
-// Arithmetic and logical integer instructions.
-def : WriteRes<WriteI,     [M1UnitALU]> { let Latency = 1; }
-// TODO: Shift over 3 and some extensions take 2 cycles.
-def : WriteRes<WriteISReg, [M1UnitALU]> { let Latency = 1; }
-def : WriteRes<WriteIEReg, [M1UnitALU]> { let Latency = 1; }
-def : WriteRes<WriteIS,    [M1UnitALU]> { let Latency = 1; }
-
-// Move instructions.
-def : WriteRes<WriteImm, [M1UnitALU]> { let Latency = 1; }
-
-// Divide and multiply instructions.
-def : WriteRes<WriteID32, [M1UnitC,
-                           M1UnitD]> { let Latency = 13;
-                                       let ResourceCycles = [1, 13]; }
-def : WriteRes<WriteID64, [M1UnitC,
-                           M1UnitD]> { let Latency = 21;
-                                       let ResourceCycles = [1, 21]; }
-// TODO: Long multiplication take 5 cycles and also the ALU.
-// TODO: Multiplication with accumulation can be advanced.
-def : WriteRes<WriteIM32, [M1UnitC]> { let Latency = 3; }
-// TODO: 64-bit multiplication has a throughput of 1/2.
-def : WriteRes<WriteIM64, [M1UnitC]> { let Latency = 4; }
-
-// Miscellaneous instructions.
-def : WriteRes<WriteExtr, [M1UnitALU,
-                           M1UnitALU]> { let Latency = 2; }
-
-// TODO: The latency for the post or pre register is 1 cycle.
-def : WriteRes<WriteAdr, []> { let Latency = 0; }
-
-// Load instructions.
-def : WriteRes<WriteLD,    [M1UnitL]>   { let Latency = 4; }
-def : WriteRes<WriteLDHi,  [M1UnitALU]> { let Latency = 4; }
-def : SchedAlias<WriteLDIdx, M1WriteLX>;
-
-// Store instructions.
-def : WriteRes<WriteST,    [M1UnitS]> { let Latency = 1; }
-def : WriteRes<WriteSTP,   [M1UnitS]> { let Latency = 1; }
-def : WriteRes<WriteSTX,   [M1UnitS]> { let Latency = 1; }
-def : SchedAlias<WriteSTIdx, M1WriteSX>;
-
-// FP data instructions.
-def : WriteRes<WriteF,    [M1UnitFADD]>  { let Latency = 3; }
-// TODO: FCCMP is much different.
-def : WriteRes<WriteFCmp, [M1UnitNMISC]> { let Latency = 4; }
-def : WriteRes<WriteFDiv, [M1UnitFVAR]>  { let Latency = 15;
-                                           let ResourceCycles = [15]; }
-def : WriteRes<WriteFMul, [M1UnitFMAC]>  { let Latency = 4; }
-
-// FP miscellaneous instructions.
-// TODO: Conversion between register files is much different.
-def : WriteRes<WriteFCvt,  [M1UnitFCVT]> { let Latency = 3; }
-def : WriteRes<WriteFImm,  [M1UnitNALU]> { let Latency = 1; }
-def : WriteRes<WriteFCopy, [M1UnitS]>    { let Latency = 4; }
-
-// FP load instructions.
-// TODO: ASIMD loads are much different.
-def : WriteRes<WriteVLD, [M1UnitL]> { let Latency = 5; }
-
-// FP store instructions.
-// TODO: ASIMD stores are much different.
-def : WriteRes<WriteVST, [M1UnitS, M1UnitFST]> { let Latency = 1; }
-
-// ASIMD FP instructions.
-def : WriteRes<WriteV, [M1UnitFADD]> { let Latency = 3; }
-
-// Other miscellaneous instructions.
-def : WriteRes<WriteAtomic,  []> { let Unsupported = 1; }
-def : WriteRes<WriteBarrier, []> { let Latency = 1; }
-def : WriteRes<WriteHint,    []> { let Latency = 1; }
-def : WriteRes<WriteSys,     []> { let Latency = 1; }
-
-//===----------------------------------------------------------------------===//
-// Generic fast forwarding.
-
-// TODO: Add FP register forwarding rules.
-
-def : ReadAdvance<ReadI,       0>;
-def : ReadAdvance<ReadISReg,   0>;
-def : ReadAdvance<ReadIEReg,   0>;
-def : ReadAdvance<ReadIM,      0>;
-// Integer multiply-accumulate.
-// TODO: The forwarding for WriteIM64 saves actually 3 cycles.
-def : ReadAdvance<ReadIMA,     2, [WriteIM32, WriteIM64]>;
-def : ReadAdvance<ReadID,      0>;
-def : ReadAdvance<ReadExtrHi,  0>;
-def : ReadAdvance<ReadAdrBase, 0>;
-def : ReadAdvance<ReadVLD,     0>;
-
-//===----------------------------------------------------------------------===//
-// Finer scheduling model for the Exynos-M1.
-
-def M1WriteNEONA   : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitNALU,
-                                    M1UnitFADD]>   { let Latency = 9; }
-def M1WriteNEONB   : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitFST]>    { let Latency = 5; }
-def M1WriteNEONC   : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitFST]>    { let Latency = 6; }
-def M1WriteNEOND   : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitFST,
-                                    M1UnitL]>      { let Latency = 10; }
-def M1WriteNEONE   : SchedWriteRes<[M1UnitFCVT,
-                                    M1UnitFST]>    { let Latency = 8; }
-def M1WriteNEONF   : SchedWriteRes<[M1UnitFCVT,
-                                    M1UnitFST,
-                                    M1UnitL]>      { let Latency = 13; }
-def M1WriteNEONG   : SchedWriteRes<[M1UnitNMISC,
-                                    M1UnitFST]>    { let Latency = 6; }
-def M1WriteNEONH   : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitFST]>    { let Latency = 3; }
-def M1WriteNEONI   : SchedWriteRes<[M1UnitFST,
-                                    M1UnitL]>      { let Latency = 9; }
-def M1WriteNEONJ   : SchedWriteRes<[M1UnitNMISC,
-                                    M1UnitFMAC]>   { let Latency = 6; }
-def M1WriteNEONK   : SchedWriteRes<[M1UnitNMISC,
-                                    M1UnitFMAC]>   { let Latency = 7; }
-def M1WriteFADD3   : SchedWriteRes<[M1UnitFADD]>   { let Latency = 3; }
-def M1WriteFCVT3   : SchedWriteRes<[M1UnitFCVT]>   { let Latency = 3; }
-def M1WriteFCVT4   : SchedWriteRes<[M1UnitFCVT]>   { let Latency = 4; }
-def M1WriteFMAC4   : SchedWriteRes<[M1UnitFMAC]>   { let Latency = 4; }
-def M1WriteFMAC5   : SchedWriteRes<[M1UnitFMAC]>   { let Latency = 5; }
-def M1WriteFVAR15  : SchedWriteRes<[M1UnitFVAR]>   { let Latency = 15;
-                                                     let ResourceCycles = [15]; }
-def M1WriteFVAR23  : SchedWriteRes<[M1UnitFVAR]>   { let Latency = 23;
-                                                     let ResourceCycles = [23]; }
-def M1WriteNALU1   : SchedWriteRes<[M1UnitNALU]>   { let Latency = 1; }
-def M1WriteNALU2   : SchedWriteRes<[M1UnitNALU]>   { let Latency = 2; }
-def M1WriteNAL11   : SchedWriteRes<[M1UnitNAL1]>   { let Latency = 1; }
-def M1WriteNAL12   : SchedWriteRes<[M1UnitNAL1]>   { let Latency = 2; }
-def M1WriteNAL13   : SchedWriteRes<[M1UnitNAL1]>   { let Latency = 3; }
-def M1WriteNCRYPT1 : SchedWriteRes<[M1UnitNCRYPT]> { let Latency = 1; }
-def M1WriteNCRYPT5 : SchedWriteRes<[M1UnitNCRYPT]> { let Latency = 5; }
-def M1WriteNMISC1  : SchedWriteRes<[M1UnitNMISC]>  { let Latency = 1; }
-def M1WriteNMISC2  : SchedWriteRes<[M1UnitNMISC]>  { let Latency = 2; }
-def M1WriteNMISC3  : SchedWriteRes<[M1UnitNMISC]>  { let Latency = 3; }
-def M1WriteNMISC4  : SchedWriteRes<[M1UnitNMISC]>  { let Latency = 4; }
-def M1WriteTB      : SchedWriteRes<[M1UnitC,
-                                    M1UnitALU]>    { let Latency = 2; }
-def M1WriteVLDA    : SchedWriteRes<[M1UnitL,
-                                    M1UnitL]>      { let Latency = 6; }
-def M1WriteVLDB    : SchedWriteRes<[M1UnitL,
-                                    M1UnitL,
-                                    M1UnitL]>      { let Latency = 7; }
-def M1WriteVLDC    : SchedWriteRes<[M1UnitL,
-                                    M1UnitL,
-                                    M1UnitL,
-                                    M1UnitL]>      { let Latency = 8; }
-def M1WriteVLDD    : SchedWriteRes<[M1UnitL,
-                                    M1UnitNALU]>   { let Latency = 7;
-                                                     let ResourceCycles = [2]; }
-def M1WriteVLDE    : SchedWriteRes<[M1UnitL,
-                                    M1UnitNALU]>   { let Latency = 6; }
-def M1WriteVLDF    : SchedWriteRes<[M1UnitL,
-                                    M1UnitL]>      { let Latency = 10;
-                                                     let ResourceCycles = [5]; }
-def M1WriteVLDG    : SchedWriteRes<[M1UnitL,
-                                    M1UnitNALU,
-                                    M1UnitNALU]>   { let Latency = 7;
-                                                     let ResourceCycles = [2]; }
-def M1WriteVLDH    : SchedWriteRes<[M1UnitL,
-                                    M1UnitNALU,
-                                    M1UnitNALU]>   { let Latency = 6; }
-def M1WriteVLDI    : SchedWriteRes<[M1UnitL,
-                                    M1UnitL,
-                                    M1UnitL]>      { let Latency = 12;
-                                                     let ResourceCycles = [6]; }
-def M1WriteVLDJ    : SchedWriteRes<[M1UnitL,
-                                    M1UnitNALU,
-                                    M1UnitNALU,
-                                    M1UnitNALU]>   { let Latency = 9;
-                                                     let ResourceCycles = [4]; }
-def M1WriteVLDK    : SchedWriteRes<[M1UnitL,
-                                    M1UnitNALU,
-                                    M1UnitNALU,
-                                    M1UnitNALU,
-                                    M1UnitNALU]>   { let Latency = 9;
-                                                     let ResourceCycles = [4]; }
-def M1WriteVLDL    : SchedWriteRes<[M1UnitL,
-                                    M1UnitNALU,
-                                    M1UnitNALU,
-                                    M1UnitNALU]>   { let Latency = 7;
-                                                     let ResourceCycles = [2]; }
-def M1WriteVLDM    : SchedWriteRes<[M1UnitL,
-                                    M1UnitNALU,
-                                    M1UnitNALU,
-                                    M1UnitNALU,
-                                    M1UnitNALU]>   { let Latency = 7;
-                                                     let ResourceCycles = [2]; }
-def M1WriteVLDN    : SchedWriteRes<[M1UnitL,
-                                    M1UnitL,
-                                    M1UnitL,
-                                    M1UnitL]>      { let Latency = 14;
-                                                     let ResourceCycles = [7]; }
-
-def M1WriteVSTA    : WriteSequence<[WriteVST], 2>;
-def M1WriteVSTB    : WriteSequence<[WriteVST], 3>;
-def M1WriteVSTC    : WriteSequence<[WriteVST], 4>;
-def M1WriteVSTD    : SchedWriteRes<[M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitFST]>    { let Latency = 7;
-                                                     let ResourceCycles = [7]; }
-def M1WriteVSTE    : SchedWriteRes<[M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitFST]>    { let Latency = 8;
-                                                     let ResourceCycles = [8]; }
-def M1WriteVSTF    : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitFST,
-                                    M1UnitFST]>     { let Latency = 15;
-                                                      let ResourceCycles = [15]; }
-def M1WriteVSTG    : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitFST,
-                                    M1UnitFST]>     { let Latency = 16;
-                                                      let ResourceCycles = [16]; }
-def M1WriteVSTH    : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitFST,
-                                    M1UnitFST]>      { let Latency = 14;
-                                                       let ResourceCycles = [14]; }
-def M1WriteVSTI    : SchedWriteRes<[M1UnitNALU,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitS,
-                                    M1UnitFST,
-                                    M1UnitFST,
-                                    M1UnitFST]>      { let Latency = 17;
-                                                       let ResourceCycles = [17]; }
-
-// Branch instructions
-def : InstRW<[M1WriteB1], (instrs Bcc)>;
-// NOTE: Conditional branch and link adds a B uop.
-def : InstRW<[M1WriteA1], (instrs BL)>;
-// NOTE: Indirect branch and link with LR adds an ALU uop.
-def : InstRW<[M1WriteA1,
-              M1WriteC1], (instrs BLR)>;
-def : InstRW<[M1WriteC1], (instregex "^CBN?Z[WX]")>;
-def : InstRW<[M1WriteC1,
-              M1WriteA2], (instregex "^TBN?Z[WX]")>;
-
-// Arithmetic and logical integer instructions.
-def : InstRW<[M1WriteA1], (instrs COPY)>;
-
-// Divide and multiply instructions.
-
-// Miscellaneous instructions.
-
-// Load instructions.
-
-// Store instructions.
-
-// FP data instructions.
-def : InstRW<[M1WriteNALU1],  (instregex "^F(ABS|NEG)[DS]r")>;
-def : InstRW<[M1WriteFADD3],  (instregex "^F(ADD|SUB)[DS]rr")>;
-def : InstRW<[M1WriteNEONG],  (instregex "^FCCMPE?[DS]rr")>;
-def : InstRW<[M1WriteNMISC4], (instregex "^FCMPE?[DS]r")>;
-def : InstRW<[M1WriteFVAR15], (instrs FDIVSrr)>;
-def : InstRW<[M1WriteFVAR23], (instrs FDIVDrr)>;
-def : InstRW<[M1WriteNMISC2], (instregex "^F(MAX|MIN).+rr")>;
-def : InstRW<[M1WriteFMAC4],  (instregex "^FN?MUL[DS]rr")>;
-def : InstRW<[M1WriteFMAC5],  (instregex "^FN?M(ADD|SUB)[DS]rrr")>;
-def : InstRW<[M1WriteFCVT3],  (instregex "^FRINT.+r")>;
-def : InstRW<[M1WriteNEONH],  (instregex "^FCSEL[DS]rrr")>;
-def : InstRW<[M1WriteFVAR15], (instrs FSQRTSr)>;
-def : InstRW<[M1WriteFVAR23], (instrs FSQRTDr)>;
-
-// FP miscellaneous instructions.
-def : InstRW<[M1WriteFCVT3], (instregex "^FCVT[DS][DS]r")>;
-def : InstRW<[M1WriteNEONF], (instregex "^[FSU]CVT[AMNPZ][SU](_Int)?[SU]?[XW]?[DS]?[rds]i?")>;
-def : InstRW<[M1WriteNEONE], (instregex "^[SU]CVTF[SU]")>;
-def : InstRW<[M1WriteNALU1], (instregex "^FMOV[DS][ir]")>;
-def : InstRW<[M1WriteS4],    (instregex "^FMOV[WX][DS](High)?r")>;
-def : InstRW<[M1WriteNEONI], (instregex "^FMOV[DS][WX](High)?r")>;
-
-// FP load instructions.
-
-// FP store instructions.
-
-// ASIMD instructions.
-def : InstRW<[M1WriteNMISC3], (instregex "^[SU]ABAL?v")>;
-def : InstRW<[M1WriteNMISC1], (instregex "^[SU]ABDL?v")>;
-def : InstRW<[M1WriteNMISC1], (instregex "^(SQ)?ABSv")>;
-def : InstRW<[M1WriteNMISC1], (instregex "^SQNEGv")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^(ADD|NEG|SUB)v")>;
-def : InstRW<[M1WriteNMISC3], (instregex "^[SU]?H(ADD|SUB)v")>;
-def : InstRW<[M1WriteNMISC3], (instregex "^[SU]?AD[AD](L|LP|P|W)V?2?v")>;
-def : InstRW<[M1WriteNMISC3], (instregex "^[SU]?SUB[LW]2?v")>;
-def : InstRW<[M1WriteNMISC3], (instregex "^R?(ADD|SUB)HN?2?v")>;
-def : InstRW<[M1WriteNMISC3], (instregex "^[SU]+Q(ADD|SUB)v")>;
-def : InstRW<[M1WriteNMISC3], (instregex "^[SU]RHADDv")>;
-def : InstRW<[M1WriteNMISC1], (instregex "^CM(EQ|GE|GT|HI|HS|LE|LT)v")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^CMTSTv")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^(AND|BIC|EOR|MVNI|NOT|ORN|ORR)v")>;
-def : InstRW<[M1WriteNMISC1], (instregex "^[SU](MIN|MAX)v")>;
-def : InstRW<[M1WriteNMISC2], (instregex "^[SU](MIN|MAX)Pv")>;
-def : InstRW<[M1WriteNMISC3], (instregex "^[SU](MIN|MAX)Vv")>;
-def : InstRW<[M1WriteNMISC4], (instregex "^(MUL|SQR?DMULH)v")>;
-def : InstRW<[M1WriteNMISC4], (instregex "^ML[AS]v")>;
-def : InstRW<[M1WriteNMISC4], (instregex "^(S|U|SQD|SQRD)ML[AS][HL]v")>;
-def : InstRW<[M1WriteNMISC4], (instregex "^(S|U|SQD)MULLv")>;
-def : InstRW<[M1WriteNAL13],  (instregex "^(S|SR|U|UR)SRAv")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^[SU]?SH(L|LL|R)2?v")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^S[LR]Iv")>;
-def : InstRW<[M1WriteNAL13],  (instregex "^[SU]?(Q|QR|R)?SHR(N|U|UN)?2?v")>;
-def : InstRW<[M1WriteNAL13],  (instregex "^[SU](Q|QR|R)SHLU?v")>;
-
-// ASIMD FP instructions.
-def : InstRW<[M1WriteNALU1],  (instregex "^F(ABS|NEG)v")>;
-def : InstRW<[M1WriteNMISC3], (instregex "^F(ABD|ADD|SUB)v")>;
-def : InstRW<[M1WriteNEONA],  (instregex "^FADDP")>;
-def : InstRW<[M1WriteNMISC1], (instregex "^F(AC|CM)(EQ|GE|GT|LE|LT)v[^1]")>;
-def : InstRW<[M1WriteFCVT3],  (instregex "^[FVSU]CVTX?[AFLMNPZ][SU]?(_Int)?v")>;
-def : InstRW<[M1WriteFVAR15], (instregex "FDIVv.f32")>;
-def : InstRW<[M1WriteFVAR23], (instregex "FDIVv2f64")>;
-def : InstRW<[M1WriteFVAR15], (instregex "FSQRTv.f32")>;
-def : InstRW<[M1WriteFVAR23], (instregex "FSQRTv2f64")>;
-def : InstRW<[M1WriteNMISC1], (instregex "^F(MAX|MIN)(NM)?V?v")>;
-def : InstRW<[M1WriteNMISC2], (instregex "^F(MAX|MIN)(NM)?Pv")>;
-def : InstRW<[M1WriteNEONJ],  (instregex "^FMULX?v.i")>;
-def : InstRW<[M1WriteFMAC4],  (instregex "^FMULX?v.f")>;
-def : InstRW<[M1WriteNEONK],  (instregex "^FML[AS]v.i")>;
-def : InstRW<[M1WriteFMAC5],  (instregex "^FML[AS]v.f")>;
-def : InstRW<[M1WriteFCVT3],  (instregex "^FRINT[AIMNPXZ]v")>;
-
-// ASIMD miscellaneous instructions.
-def : InstRW<[M1WriteNALU1],  (instregex "^RBITv")>;
-def : InstRW<[M1WriteNAL11],  (instregex "^(BIF|BIT|BSL)v")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^CPY")>;
-def : InstRW<[M1WriteNEONB],  (instregex "^DUPv.+gpr")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^DUPv.+lane")>;
-def : InstRW<[M1WriteNAL13],  (instregex "^[SU]?Q?XTU?Nv")>;
-def : InstRW<[M1WriteNEONC],  (instregex "^INSv.+gpr")>;
-def : InstRW<[M1WriteFCVT4],  (instregex "^[FU](RECP|RSQRT)Ev")>;
-def : InstRW<[M1WriteNMISC1], (instregex "^[FU](RECP|RSQRT)Xv")>;
-def : InstRW<[M1WriteFMAC5],  (instregex "^F(RECP|RSQRT)Sv")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^REV(16|32|64)v")>;
-def : InstRW<[M1WriteNAL11],  (instregex "^TB[LX]v8i8One")>;
-def : InstRW<[WriteSequence<[M1WriteNAL11], 2>],
-                              (instregex "^TB[LX]v8i8Two")>;
-def : InstRW<[WriteSequence<[M1WriteNAL11], 3>],
-                              (instregex "^TB[LX]v8i8Three")>;
-def : InstRW<[WriteSequence<[M1WriteNAL11], 4>],
-                              (instregex "^TB[LX]v8i8Four")>;
-def : InstRW<[M1WriteNAL12],  (instregex "^TB[LX]v16i8One")>;
-def : InstRW<[WriteSequence<[M1WriteNAL12], 2>],
-                              (instregex "^TB[LX]v16i8Two")>;
-def : InstRW<[WriteSequence<[M1WriteNAL12], 3>],
-                              (instregex "^TB[LX]v16i8Three")>;
-def : InstRW<[WriteSequence<[M1WriteNAL12], 4>],
-                              (instregex "^TB[LX]v16i8Four")>;
-def : InstRW<[M1WriteNEOND],  (instregex "^[SU]MOVv")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^INSv.+lane")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^(TRN|UZP)[12](v8i8|v4i16|v2i32)")>;
-def : InstRW<[M1WriteNALU2],  (instregex "^(TRN|UZP)[12](v16i8|v8i16|v4i32|v2i64)")>;
-def : InstRW<[M1WriteNALU1],  (instregex "^ZIP[12]v")>;
-
-// ASIMD load instructions.
-def : InstRW<[M1WriteVLDD],   (instregex "LD1i(8|16|32)$")>;
-def : InstRW<[M1WriteVLDD,
-              WriteAdr],      (instregex "LD1i(8|16|32)_POST$")>;
-def : InstRW<[M1WriteVLDE],   (instregex "LD1i(64)$")>;
-def : InstRW<[M1WriteVLDE,
-              WriteAdr],      (instregex "LD1i(64)_POST$")>;
-
-def : InstRW<[M1WriteL5],     (instregex "LD1Rv(8b|4h|2s)$")>;
-def : InstRW<[M1WriteL5,
-              WriteAdr],      (instregex "LD1Rv(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteL5],     (instregex "LD1Rv(1d)$")>;
-def : InstRW<[M1WriteL5,
-              WriteAdr],      (instregex "LD1Rv(1d)_POST$")>;
-def : InstRW<[M1WriteL5],     (instregex "LD1Rv(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteL5,
-              WriteAdr],      (instregex "LD1Rv(16b|8h|4s|2d)_POST$")>;
-
-def : InstRW<[M1WriteL5],     (instregex "LD1Onev(8b|4h|2s|1d)$")>;
-def : InstRW<[M1WriteL5,
-              WriteAdr],      (instregex "LD1Onev(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[M1WriteL5],     (instregex "LD1Onev(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteL5,
-              WriteAdr],      (instregex "LD1Onev(16b|8h|4s|2d)_POST$")>;
-def : InstRW<[M1WriteVLDA],   (instregex "LD1Twov(8b|4h|2s|1d)$")>;
-def : InstRW<[M1WriteVLDA,
-              WriteAdr],      (instregex "LD1Twov(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[M1WriteVLDA],   (instregex "LD1Twov(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteVLDA,
-              WriteAdr],      (instregex "LD1Twov(16b|8h|4s|2d)_POST$")>;
-def : InstRW<[M1WriteVLDB],   (instregex "LD1Threev(8b|4h|2s|1d)$")>;
-def : InstRW<[M1WriteVLDB,
-              WriteAdr],      (instregex "LD1Threev(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[M1WriteVLDB],   (instregex "LD1Threev(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteVLDB,
-              WriteAdr],      (instregex "LD1Threev(16b|8h|4s|2d)_POST$")>;
-def : InstRW<[M1WriteVLDC],   (instregex "LD1Fourv(8b|4h|2s|1d)$")>;
-def : InstRW<[M1WriteVLDC,
-              WriteAdr],      (instregex "LD1Fourv(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[M1WriteVLDC],   (instregex "LD1Fourv(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteVLDC,
-              WriteAdr],      (instregex "LD1Fourv(16b|8h|4s|2d)_POST$")>;
-
-def : InstRW<[M1WriteVLDG],   (instregex "LD2i(8|16)$")>;
-def : InstRW<[M1WriteVLDG,
-              WriteAdr],      (instregex "LD2i(8|16)_POST$")>;
-def : InstRW<[M1WriteVLDG],   (instregex "LD2i(32)$")>;
-def : InstRW<[M1WriteVLDG,
-              WriteAdr],      (instregex "LD2i(32)_POST$")>;
-def : InstRW<[M1WriteVLDH],   (instregex "LD2i(64)$")>;
-def : InstRW<[M1WriteVLDH,
-              WriteAdr],      (instregex "LD2i(64)_POST$")>;
-
-def : InstRW<[M1WriteVLDA],   (instregex "LD2Rv(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVLDA,
-              WriteAdr],      (instregex "LD2Rv(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVLDA],   (instregex "LD2Rv(1d)$")>;
-def : InstRW<[M1WriteVLDA,
-              WriteAdr],      (instregex "LD2Rv(1d)_POST$")>;
-def : InstRW<[M1WriteVLDA],   (instregex "LD2Rv(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteVLDA,
-              WriteAdr],      (instregex "LD2Rv(16b|8h|4s|2d)_POST$")>;
-
-def : InstRW<[M1WriteVLDF],   (instregex "LD2Twov(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVLDF,
-              WriteAdr],      (instregex "LD2Twov(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVLDF],   (instregex "LD2Twov(16b|8h|4s)$")>;
-def : InstRW<[M1WriteVLDF,
-              WriteAdr],      (instregex "LD2Twov(16b|8h|4s)_POST$")>;
-def : InstRW<[M1WriteVLDF],   (instregex "LD2Twov(2d)$")>;
-def : InstRW<[M1WriteVLDF,
-              WriteAdr],      (instregex "LD2Twov(2d)_POST$")>;
-
-def : InstRW<[M1WriteVLDJ],   (instregex "LD3i(8|16)$")>;
-def : InstRW<[M1WriteVLDJ,
-              WriteAdr],      (instregex "LD3i(8|16)_POST$")>;
-def : InstRW<[M1WriteVLDJ],   (instregex "LD3i(32)$")>;
-def : InstRW<[M1WriteVLDJ,
-              WriteAdr],      (instregex "LD3i(32)_POST$")>;
-def : InstRW<[M1WriteVLDL],   (instregex "LD3i(64)$")>;
-def : InstRW<[M1WriteVLDL,
-              WriteAdr],      (instregex "LD3i(64)_POST$")>;
-
-def : InstRW<[M1WriteVLDB],   (instregex "LD3Rv(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVLDB,
-              WriteAdr],      (instregex "LD3Rv(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVLDB],   (instregex "LD3Rv(1d)$")>;
-def : InstRW<[M1WriteVLDB,
-              WriteAdr],      (instregex "LD3Rv(1d)_POST$")>;
-def : InstRW<[M1WriteVLDB],   (instregex "LD3Rv(16b|8h|4s)$")>;
-def : InstRW<[M1WriteVLDB,
-              WriteAdr],      (instregex "LD3Rv(16b|8h|4s)_POST$")>;
-def : InstRW<[M1WriteVLDB],   (instregex "LD3Rv(2d)$")>;
-def : InstRW<[M1WriteVLDB,
-              WriteAdr],      (instregex "LD3Rv(2d)_POST$")>;
-
-def : InstRW<[M1WriteVLDI],   (instregex "LD3Threev(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVLDI,
-              WriteAdr],      (instregex "LD3Threev(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVLDI],   (instregex "LD3Threev(16b|8h|4s)$")>;
-def : InstRW<[M1WriteVLDI,
-              WriteAdr],      (instregex "LD3Threev(16b|8h|4s)_POST$")>;
-def : InstRW<[M1WriteVLDI],   (instregex "LD3Threev(2d)$")>;
-def : InstRW<[M1WriteVLDI,
-              WriteAdr],      (instregex "LD3Threev(2d)_POST$")>;
-
-def : InstRW<[M1WriteVLDK],   (instregex "LD4i(8|16)$")>;
-def : InstRW<[M1WriteVLDK,
-              WriteAdr],      (instregex "LD4i(8|16)_POST$")>;
-def : InstRW<[M1WriteVLDK],   (instregex "LD4i(32)$")>;
-def : InstRW<[M1WriteVLDK,
-              WriteAdr],      (instregex "LD4i(32)_POST$")>;
-def : InstRW<[M1WriteVLDM],   (instregex "LD4i(64)$")>;
-def : InstRW<[M1WriteVLDM,
-              WriteAdr],      (instregex "LD4i(64)_POST$")>;
-
-def : InstRW<[M1WriteVLDC],   (instregex "LD4Rv(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVLDC,
-              WriteAdr],      (instregex "LD4Rv(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVLDC],   (instregex "LD4Rv(1d)$")>;
-def : InstRW<[M1WriteVLDC,
-              WriteAdr],      (instregex "LD4Rv(1d)_POST$")>;
-def : InstRW<[M1WriteVLDC],   (instregex "LD4Rv(16b|8h|4s)$")>;
-def : InstRW<[M1WriteVLDC,
-              WriteAdr],      (instregex "LD4Rv(16b|8h|4s)_POST$")>;
-def : InstRW<[M1WriteVLDC],   (instregex "LD4Rv(2d)$")>;
-def : InstRW<[M1WriteVLDC,
-              WriteAdr],      (instregex "LD4Rv(2d)_POST$")>;
-
-def : InstRW<[M1WriteVLDN],   (instregex "LD4Fourv(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVLDN,
-              WriteAdr],      (instregex "LD4Fourv(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVLDN],   (instregex "LD4Fourv(16b|8h|4s)$")>;
-def : InstRW<[M1WriteVLDN,
-              WriteAdr],      (instregex "LD4Fourv(16b|8h|4s)_POST$")>;
-def : InstRW<[M1WriteVLDN],   (instregex "LD4Fourv(2d)$")>;
-def : InstRW<[M1WriteVLDN,
-              WriteAdr],      (instregex "LD4Fourv(2d)_POST$")>;
-
-// ASIMD store instructions.
-def : InstRW<[M1WriteVSTD],   (instregex "ST1i(8|16|32)$")>;
-def : InstRW<[M1WriteVSTD,
-              WriteAdr],      (instregex "ST1i(8|16|32)_POST$")>;
-def : InstRW<[M1WriteVSTD],   (instregex "ST1i(64)$")>;
-def : InstRW<[M1WriteVSTD,
-              WriteAdr],      (instregex "ST1i(64)_POST$")>;
-
-def : InstRW<[WriteVST],      (instregex "ST1Onev(8b|4h|2s|1d)$")>;
-def : InstRW<[WriteVST,
-              WriteAdr],      (instregex "ST1Onev(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[WriteVST],      (instregex "ST1Onev(16b|8h|4s|2d)$")>;
-def : InstRW<[WriteVST,
-              WriteAdr],      (instregex "ST1Onev(16b|8h|4s|2d)_POST$")>;
-def : InstRW<[M1WriteVSTA],   (instregex "ST1Twov(8b|4h|2s|1d)$")>;
-def : InstRW<[M1WriteVSTA,
-              WriteAdr],      (instregex "ST1Twov(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[M1WriteVSTA],   (instregex "ST1Twov(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteVSTA,
-              WriteAdr],      (instregex "ST1Twov(16b|8h|4s|2d)_POST$")>;
-def : InstRW<[M1WriteVSTB],   (instregex "ST1Threev(8b|4h|2s|1d)$")>;
-def : InstRW<[M1WriteVSTB,
-              WriteAdr],      (instregex "ST1Threev(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[M1WriteVSTB],   (instregex "ST1Threev(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteVSTB,
-              WriteAdr],      (instregex "ST1Threev(16b|8h|4s|2d)_POST$")>;
-def : InstRW<[M1WriteVSTC],   (instregex "ST1Fourv(8b|4h|2s|1d)$")>;
-def : InstRW<[M1WriteVSTC,
-              WriteAdr],      (instregex "ST1Fourv(8b|4h|2s|1d)_POST$")>;
-def : InstRW<[M1WriteVSTC],   (instregex "ST1Fourv(16b|8h|4s|2d)$")>;
-def : InstRW<[M1WriteVSTC,
-              WriteAdr], (instregex "ST1Fourv(16b|8h|4s|2d)_POST$")>;
-
-def : InstRW<[M1WriteVSTD],   (instregex "ST2i(8|16|32)$")>;
-def : InstRW<[M1WriteVSTD,
-              WriteAdr],      (instregex "ST2i(8|16|32)_POST$")>;
-def : InstRW<[M1WriteVSTD],   (instregex "ST2i(64)$")>;
-def : InstRW<[M1WriteVSTD,
-              WriteAdr],      (instregex "ST2i(64)_POST$")>;
-
-def : InstRW<[M1WriteVSTD],   (instregex "ST2Twov(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVSTD,
-              WriteAdr],      (instregex "ST2Twov(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVSTE],   (instregex "ST2Twov(16b|8h|4s)$")>;
-def : InstRW<[M1WriteVSTE,
-              WriteAdr],      (instregex "ST2Twov(16b|8h|4s)_POST$")>;
-def : InstRW<[M1WriteVSTE],   (instregex "ST2Twov(2d)$")>;
-def : InstRW<[M1WriteVSTE,
-              WriteAdr],      (instregex "ST2Twov(2d)_POST$")>;
-
-def : InstRW<[M1WriteVSTH],   (instregex "ST3i(8|16)$")>;
-def : InstRW<[M1WriteVSTH,
-              WriteAdr],      (instregex "ST3i(8|16)_POST$")>;
-def : InstRW<[M1WriteVSTH],   (instregex "ST3i(32)$")>;
-def : InstRW<[M1WriteVSTH,
-              WriteAdr],      (instregex "ST3i(32)_POST$")>;
-def : InstRW<[M1WriteVSTF],   (instregex "ST3i(64)$")>;
-def : InstRW<[M1WriteVSTF,
-              WriteAdr],      (instregex "ST3i(64)_POST$")>;
-
-def : InstRW<[M1WriteVSTF],   (instregex "ST3Threev(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVSTF,
-              WriteAdr],      (instregex "ST3Threev(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVSTG],   (instregex "ST3Threev(16b|8h|4s)$")>;
-def : InstRW<[M1WriteVSTG,
-              WriteAdr],      (instregex "ST3Threev(16b|8h|4s)_POST$")>;
-def : InstRW<[M1WriteVSTG],   (instregex "ST3Threev(2d)$")>;
-def : InstRW<[M1WriteVSTG,
-              WriteAdr],      (instregex "ST3Threev(2d)_POST$")>;
-
-def : InstRW<[M1WriteVSTH],   (instregex "ST4i(8|16)$")>;
-def : InstRW<[M1WriteVSTH,
-              WriteAdr],      (instregex "ST4i(8|16)_POST$")>;
-def : InstRW<[M1WriteVSTH],   (instregex "ST4i(32)$")>;
-def : InstRW<[M1WriteVSTH,
-              WriteAdr],      (instregex "ST4i(32)_POST$")>;
-def : InstRW<[M1WriteVSTF],   (instregex "ST4i(64)$")>;
-def : InstRW<[M1WriteVSTF,
-              WriteAdr],      (instregex "ST4i(64)_POST$")>;
-
-def : InstRW<[M1WriteVSTF],   (instregex "ST4Fourv(8b|4h|2s)$")>;
-def : InstRW<[M1WriteVSTF,
-              WriteAdr],      (instregex "ST4Fourv(8b|4h|2s)_POST$")>;
-def : InstRW<[M1WriteVSTI],   (instregex "ST4Fourv(16b|8h|4s)$")>;
-def : InstRW<[M1WriteVSTI,
-              WriteAdr],      (instregex "ST4Fourv(16b|8h|4s)_POST$")>;
-def : InstRW<[M1WriteVSTI],   (instregex "ST4Fourv(2d)$")>;
-def : InstRW<[M1WriteVSTI,
-              WriteAdr],      (instregex "ST4Fourv(2d)_POST$")>;
-
-// Cryptography instructions.
-def M1WriteAES : SchedWriteRes<[M1UnitNCRYPT]> { let Latency = 1; }
-def M1ReadAES  : SchedReadAdvance<1, [M1WriteAES]>;
-def : InstRW<[M1WriteAES], (instregex "^AES[DE]")>;
-def : InstRW<[M1WriteAES, M1ReadAES], (instregex "^AESI?MC")>;
-
-def : InstRW<[M1WriteNCRYPT1], (instregex "^PMUL")>;
-def : InstRW<[M1WriteNCRYPT1], (instregex "^SHA1(H|SU)")>;
-def : InstRW<[M1WriteNCRYPT5], (instregex "^SHA1[CMP]")>;
-def : InstRW<[M1WriteNCRYPT1], (instregex "^SHA256SU0")>;
-def : InstRW<[M1WriteNCRYPT5], (instregex "^SHA256(H|SU1)")>;
-
-// CRC instructions.
-def : InstRW<[M1WriteC2], (instregex "^CRC32")>;
-
-} // SchedModel = ExynosM1Model
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64VectorByElementOpt.cpp b/external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64VectorByElementOpt.cpp
deleted file mode 100644
index f53af2315ec9..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64VectorByElementOpt.cpp
+++ /dev/null
@@ -1,388 +0,0 @@
-//=- AArch64VectorByElementOpt.cpp - AArch64 vector by element inst opt pass =//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains a pass that performs optimization for vector by element
-// SIMD instructions.
-//
-// Certain SIMD instructions with vector element operand are not efficient.
-// Rewrite them into SIMD instructions with vector operands. This rewrite
-// is driven by the latency of the instructions.
-//
-// Example:
-//    fmla v0.4s, v1.4s, v2.s[1]
-//    is rewritten into
-//    dup v3.4s, v2.s[1]
-//    fmla v0.4s, v1.4s, v3.4s
-//
-//===----------------------------------------------------------------------===//
-
-#include "AArch64InstrInfo.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/TargetSchedule.h"
-#include "llvm/MC/MCInstrDesc.h"
-#include "llvm/MC/MCSchedule.h"
-#include "llvm/Pass.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-#include <map>
-
-using namespace llvm;
-
-#define DEBUG_TYPE "aarch64-vectorbyelement-opt"
-
-STATISTIC(NumModifiedInstr,
-          "Number of vector by element instructions modified");
-
-#define AARCH64_VECTOR_BY_ELEMENT_OPT_NAME                                     \
-  "AArch64 vector by element instruction optimization pass"
-
-namespace {
-
-struct AArch64VectorByElementOpt : public MachineFunctionPass {
-  static char ID;
-
-  const TargetInstrInfo *TII;
-  MachineRegisterInfo *MRI;
-  TargetSchedModel SchedModel;
-
-  AArch64VectorByElementOpt() : MachineFunctionPass(ID) {
-    initializeAArch64VectorByElementOptPass(*PassRegistry::getPassRegistry());
-  }
-
-  /// Based only on latency of instructions, determine if it is cost efficient
-  /// to replace the instruction InstDesc by the two instructions InstDescRep1
-  /// and InstDescRep2.
-  /// Return true if replacement is recommended.
-  bool
-  shouldReplaceInstruction(MachineFunction *MF, const MCInstrDesc *InstDesc,
-                           const MCInstrDesc *InstDescRep1,
-                           const MCInstrDesc *InstDescRep2,
-                           std::map<unsigned, bool> &VecInstElemTable) const;
-
-  /// Determine if we need to exit the vector by element instruction
-  /// optimization pass early. This makes sure that Targets with no need
-  /// for this optimization do not spent any compile time on this pass.
-  /// This check is done by comparing the latency of an indexed FMLA
-  /// instruction to the latency of the DUP + the latency of a vector
-  /// FMLA instruction. We do not check on other related instructions such
-  /// as FMLS as we assume that if the situation shows up for one
-  /// instruction, then it is likely to show up for the related ones.
-  /// Return true if early exit of the pass is recommended.
-  bool earlyExitVectElement(MachineFunction *MF);
-
-  /// Check whether an equivalent DUP instruction has already been
-  /// created or not.
-  /// Return true when the dup instruction already exists. In this case,
-  /// DestReg will point to the destination of the already created DUP.
-  bool reuseDUP(MachineInstr &MI, unsigned DupOpcode, unsigned SrcReg,
-                unsigned LaneNumber, unsigned *DestReg) const;
-
-  /// Certain SIMD instructions with vector element operand are not efficient.
-  /// Rewrite them into SIMD instructions with vector operands. This rewrite
-  /// is driven by the latency of the instructions.
-  /// Return true if the SIMD instruction is modified.
-  bool optimizeVectElement(MachineInstr &MI,
-                           std::map<unsigned, bool> *VecInstElemTable) const;
-
-  bool runOnMachineFunction(MachineFunction &Fn) override;
-
-  StringRef getPassName() const override {
-    return AARCH64_VECTOR_BY_ELEMENT_OPT_NAME;
-  }
-};
-
-char AArch64VectorByElementOpt::ID = 0;
-
-} // end anonymous namespace
-
-INITIALIZE_PASS(AArch64VectorByElementOpt, "aarch64-vectorbyelement-opt",
-                AARCH64_VECTOR_BY_ELEMENT_OPT_NAME, false, false)
-
-/// Based only on latency of instructions, determine if it is cost efficient
-/// to replace the instruction InstDesc by the two instructions InstDescRep1
-/// and InstDescRep2. Note that it is assumed in this fuction that an
-/// instruction of type InstDesc is always replaced by the same two
-/// instructions as results are cached here.
-/// Return true if replacement is recommended.
-bool AArch64VectorByElementOpt::shouldReplaceInstruction(
-    MachineFunction *MF, const MCInstrDesc *InstDesc,
-    const MCInstrDesc *InstDescRep1, const MCInstrDesc *InstDescRep2,
-    std::map<unsigned, bool> &VecInstElemTable) const {
-  // Check if replacment decision is alredy available in the cached table.
-  // if so, return it.
-  if (!VecInstElemTable.empty() &&
-      VecInstElemTable.find(InstDesc->getOpcode()) != VecInstElemTable.end())
-    return VecInstElemTable[InstDesc->getOpcode()];
-
-  unsigned SCIdx = InstDesc->getSchedClass();
-  unsigned SCIdxRep1 = InstDescRep1->getSchedClass();
-  unsigned SCIdxRep2 = InstDescRep2->getSchedClass();
-  const MCSchedClassDesc *SCDesc =
-      SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx);
-  const MCSchedClassDesc *SCDescRep1 =
-      SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdxRep1);
-  const MCSchedClassDesc *SCDescRep2 =
-      SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdxRep2);
-
-  // If a subtarget does not define resources for any of the instructions
-  // of interest, then return false for no replacement.
-  if (!SCDesc->isValid() || SCDesc->isVariant() || !SCDescRep1->isValid() ||
-      SCDescRep1->isVariant() || !SCDescRep2->isValid() ||
-      SCDescRep2->isVariant()) {
-    VecInstElemTable[InstDesc->getOpcode()] = false;
-    return false;
-  }
-
-  if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) >
-      SchedModel.computeInstrLatency(InstDescRep1->getOpcode()) +
-          SchedModel.computeInstrLatency(InstDescRep2->getOpcode())) {
-    VecInstElemTable[InstDesc->getOpcode()] = true;
-    return true;
-  }
-  VecInstElemTable[InstDesc->getOpcode()] = false;
-  return false;
-}
-
-/// Determine if we need to exit the vector by element instruction
-/// optimization pass early. This makes sure that Targets with no need
-/// for this optimization do not spent any compile time on this pass.
-/// This check is done by comparing the latency of an indexed FMLA
-/// instruction to the latency of the DUP + the latency of a vector
-/// FMLA instruction. We do not check on other related instructions such
-/// as FMLS as we assume that if the situation shows up for one
-/// instruction, then it is likely to show up for the related ones.
-/// Return true if early exit of the pass is recommended.
-bool AArch64VectorByElementOpt::earlyExitVectElement(MachineFunction *MF) {
-  std::map<unsigned, bool> VecInstElemTable;
-  const MCInstrDesc *IndexMulMCID = &TII->get(AArch64::FMLAv4i32_indexed);
-  const MCInstrDesc *DupMCID = &TII->get(AArch64::DUPv4i32lane);
-  const MCInstrDesc *MulMCID = &TII->get(AArch64::FMULv4f32);
-
-  if (!shouldReplaceInstruction(MF, IndexMulMCID, DupMCID, MulMCID,
-                                VecInstElemTable))
-    return true;
-  return false;
-}
-
-/// Check whether an equivalent DUP instruction has already been
-/// created or not.
-/// Return true when the dup instruction already exists. In this case,
-/// DestReg will point to the destination of the already created DUP.
-bool AArch64VectorByElementOpt::reuseDUP(MachineInstr &MI, unsigned DupOpcode,
-                                         unsigned SrcReg, unsigned LaneNumber,
-                                         unsigned *DestReg) const {
-  for (MachineBasicBlock::iterator MII = MI, MIE = MI.getParent()->begin();
-       MII != MIE;) {
-    MII--;
-    MachineInstr *CurrentMI = &*MII;
-
-    if (CurrentMI->getOpcode() == DupOpcode &&
-        CurrentMI->getNumOperands() == 3 &&
-        CurrentMI->getOperand(1).getReg() == SrcReg &&
-        CurrentMI->getOperand(2).getImm() == LaneNumber) {
-      *DestReg = CurrentMI->getOperand(0).getReg();
-      return true;
-    }
-  }
-
-  return false;
-}
-
-/// Certain SIMD instructions with vector element operand are not efficient.
-/// Rewrite them into SIMD instructions with vector operands. This rewrite
-/// is driven by the latency of the instructions.
-/// The instruction of concerns are for the time being fmla, fmls, fmul,
-/// and fmulx and hence they are hardcoded.
-///
-/// Example:
-///    fmla v0.4s, v1.4s, v2.s[1]
-///    is rewritten into
-///    dup v3.4s, v2.s[1]           // dup not necessary if redundant
-///    fmla v0.4s, v1.4s, v3.4s
-/// Return true if the SIMD instruction is modified.
-bool AArch64VectorByElementOpt::optimizeVectElement(
-    MachineInstr &MI, std::map<unsigned, bool> *VecInstElemTable) const {
-  const MCInstrDesc *MulMCID, *DupMCID;
-  const TargetRegisterClass *RC = &AArch64::FPR128RegClass;
-
-  switch (MI.getOpcode()) {
-  default:
-    return false;
-
-  // 4X32 instructions
-  case AArch64::FMLAv4i32_indexed:
-    DupMCID = &TII->get(AArch64::DUPv4i32lane);
-    MulMCID = &TII->get(AArch64::FMLAv4f32);
-    break;
-  case AArch64::FMLSv4i32_indexed:
-    DupMCID = &TII->get(AArch64::DUPv4i32lane);
-    MulMCID = &TII->get(AArch64::FMLSv4f32);
-    break;
-  case AArch64::FMULXv4i32_indexed:
-    DupMCID = &TII->get(AArch64::DUPv4i32lane);
-    MulMCID = &TII->get(AArch64::FMULXv4f32);
-    break;
-  case AArch64::FMULv4i32_indexed:
-    DupMCID = &TII->get(AArch64::DUPv4i32lane);
-    MulMCID = &TII->get(AArch64::FMULv4f32);
-    break;
-
-  // 2X64 instructions
-  case AArch64::FMLAv2i64_indexed:
-    DupMCID = &TII->get(AArch64::DUPv2i64lane);
-    MulMCID = &TII->get(AArch64::FMLAv2f64);
-    break;
-  case AArch64::FMLSv2i64_indexed:
-    DupMCID = &TII->get(AArch64::DUPv2i64lane);
-    MulMCID = &TII->get(AArch64::FMLSv2f64);
-    break;
-  case AArch64::FMULXv2i64_indexed:
-    DupMCID = &TII->get(AArch64::DUPv2i64lane);
-    MulMCID = &TII->get(AArch64::FMULXv2f64);
-    break;
-  case AArch64::FMULv2i64_indexed:
-    DupMCID = &TII->get(AArch64::DUPv2i64lane);
-    MulMCID = &TII->get(AArch64::FMULv2f64);
-    break;
-
-  // 2X32 instructions
-  case AArch64::FMLAv2i32_indexed:
-    RC = &AArch64::FPR64RegClass;
-    DupMCID = &TII->get(AArch64::DUPv2i32lane);
-    MulMCID = &TII->get(AArch64::FMLAv2f32);
-    break;
-  case AArch64::FMLSv2i32_indexed:
-    RC = &AArch64::FPR64RegClass;
-    DupMCID = &TII->get(AArch64::DUPv2i32lane);
-    MulMCID = &TII->get(AArch64::FMLSv2f32);
-    break;
-  case AArch64::FMULXv2i32_indexed:
-    RC = &AArch64::FPR64RegClass;
-    DupMCID = &TII->get(AArch64::DUPv2i32lane);
-    MulMCID = &TII->get(AArch64::FMULXv2f32);
-    break;
-  case AArch64::FMULv2i32_indexed:
-    RC = &AArch64::FPR64RegClass;
-    DupMCID = &TII->get(AArch64::DUPv2i32lane);
-    MulMCID = &TII->get(AArch64::FMULv2f32);
-    break;
-  }
-
-  if (!shouldReplaceInstruction(MI.getParent()->getParent(),
-                                &TII->get(MI.getOpcode()), DupMCID, MulMCID,
-                                *VecInstElemTable))
-    return false;
-
-  const DebugLoc &DL = MI.getDebugLoc();
-  MachineBasicBlock &MBB = *MI.getParent();
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
-  // get the operands of the current SIMD arithmetic instruction.
-  unsigned MulDest = MI.getOperand(0).getReg();
-  unsigned SrcReg0 = MI.getOperand(1).getReg();
-  unsigned Src0IsKill = getKillRegState(MI.getOperand(1).isKill());
-  unsigned SrcReg1 = MI.getOperand(2).getReg();
-  unsigned Src1IsKill = getKillRegState(MI.getOperand(2).isKill());
-  unsigned DupDest;
-
-  // Instructions of interest have either 4 or 5 operands.
-  if (MI.getNumOperands() == 5) {
-    unsigned SrcReg2 = MI.getOperand(3).getReg();
-    unsigned Src2IsKill = getKillRegState(MI.getOperand(3).isKill());
-    unsigned LaneNumber = MI.getOperand(4).getImm();
-
-    // Create a new DUP instruction. Note that if an equivalent DUP instruction
-    // has already been created before, then use that one instread of creating
-    // a new one.
-    if (!reuseDUP(MI, DupMCID->getOpcode(), SrcReg2, LaneNumber, &DupDest)) {
-      DupDest = MRI.createVirtualRegister(RC);
-      BuildMI(MBB, MI, DL, *DupMCID, DupDest)
-          .addReg(SrcReg2, Src2IsKill)
-          .addImm(LaneNumber);
-    }
-    BuildMI(MBB, MI, DL, *MulMCID, MulDest)
-        .addReg(SrcReg0, Src0IsKill)
-        .addReg(SrcReg1, Src1IsKill)
-        .addReg(DupDest, Src2IsKill);
-  } else if (MI.getNumOperands() == 4) {
-    unsigned LaneNumber = MI.getOperand(3).getImm();
-    if (!reuseDUP(MI, DupMCID->getOpcode(), SrcReg1, LaneNumber, &DupDest)) {
-      DupDest = MRI.createVirtualRegister(RC);
-      BuildMI(MBB, MI, DL, *DupMCID, DupDest)
-          .addReg(SrcReg1, Src1IsKill)
-          .addImm(LaneNumber);
-    }
-    BuildMI(MBB, MI, DL, *MulMCID, MulDest)
-        .addReg(SrcReg0, Src0IsKill)
-        .addReg(DupDest, Src1IsKill);
-  } else {
-    return false;
-  }
-
-  ++NumModifiedInstr;
-  return true;
-}
-
-bool AArch64VectorByElementOpt::runOnMachineFunction(MachineFunction &MF) {
-  if (skipFunction(*MF.getFunction()))
-    return false;
-
-  TII = MF.getSubtarget().getInstrInfo();
-  MRI = &MF.getRegInfo();
-  const TargetSubtargetInfo &ST = MF.getSubtarget();
-  const AArch64InstrInfo *AAII =
-      static_cast<const AArch64InstrInfo *>(ST.getInstrInfo());
-  if (!AAII)
-    return false;
-  SchedModel.init(ST.getSchedModel(), &ST, AAII);
-  if (!SchedModel.hasInstrSchedModel())
-    return false;
-
-  // A simple check to exit this pass early for targets that do not need it.
-  if (earlyExitVectElement(&MF))
-    return false;
-
-  bool Changed = false;
-  std::map<unsigned, bool> VecInstElemTable;
-  SmallVector<MachineInstr *, 8> RemoveMIs;
-
-  for (MachineBasicBlock &MBB : MF) {
-    for (MachineBasicBlock::iterator MII = MBB.begin(), MIE = MBB.end();
-         MII != MIE;) {
-      MachineInstr &MI = *MII;
-      if (optimizeVectElement(MI, &VecInstElemTable)) {
-        // Add MI to the list of instructions to be removed given that it has
-        // been replaced.
-        RemoveMIs.push_back(&MI);
-        Changed = true;
-      }
-      ++MII;
-    }
-  }
-
-  for (MachineInstr *MI : RemoveMIs)
-    MI->eraseFromParent();
-
-  return Changed;
-}
-
-/// createAArch64VectorByElementOptPass - returns an instance of the
-/// vector by element optimization pass.
-FunctionPass *llvm::createAArch64VectorByElementOptPass() {
-  return new AArch64VectorByElementOpt();
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.h b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.h
deleted file mode 100644
index 57d2d85daecd..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.h
+++ /dev/null
@@ -1,46 +0,0 @@
-//===- AMDGPUMCInstLower.h MachineInstr Lowering Interface ------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMCINSTLOWER_H
-#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMCINSTLOWER_H
-
-namespace llvm {
-
-class AMDGPUSubtarget;
-class AsmPrinter;
-class MachineBasicBlock;
-class MachineInstr;
-class MachineOperand;
-class MCContext;
-class MCExpr;
-class MCInst;
-class MCOperand;
-
-class AMDGPUMCInstLower {
-  MCContext &Ctx;
-  const AMDGPUSubtarget &ST;
-  const AsmPrinter &AP;
-
-  const MCExpr *getLongBranchBlockExpr(const MachineBasicBlock &SrcBB,
-                                       const MachineOperand &MO) const;
-
-public:
-  AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &ST,
-                    const AsmPrinter &AP);
-
-  bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
-
-  /// \brief Lower a MachineInstr to an MCInst
-  void lower(const MachineInstr *MI, MCInst &OutMI) const;
-
-};
-
-} // End namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp
deleted file mode 100644
index 410bd52d9c21..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp
+++ /dev/null
@@ -1,372 +0,0 @@
-//===-- AMDGPUOpenCLImageTypeLoweringPass.cpp -----------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// This pass resolves calls to OpenCL image attribute, image resource ID and
-/// sampler resource ID getter functions.
-///
-/// Image attributes (size and format) are expected to be passed to the kernel
-/// as kernel arguments immediately following the image argument itself,
-/// therefore this pass adds image size and format arguments to the kernel
-/// functions in the module. The kernel functions with image arguments are
-/// re-created using the new signature. The new arguments are added to the
-/// kernel metadata with kernel_arg_type set to "image_size" or "image_format".
-/// Note: this pass may invalidate pointers to functions.
-///
-/// Resource IDs of read-only images, write-only images and samplers are
-/// defined to be their index among the kernel arguments of the same
-/// type and access qualifier.
-//===----------------------------------------------------------------------===//
-
-#include "AMDGPU.h"
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/Analysis/Passes.h"
-#include "llvm/IR/Constants.h"
-#include "llvm/IR/Function.h"
-#include "llvm/IR/Instructions.h"
-#include "llvm/IR/Module.h"
-#include "llvm/Transforms/Utils/Cloning.h"
-
-using namespace llvm;
-
-namespace {
-
-StringRef GetImageSizeFunc =         "llvm.OpenCL.image.get.size";
-StringRef GetImageFormatFunc =       "llvm.OpenCL.image.get.format";
-StringRef GetImageResourceIDFunc =   "llvm.OpenCL.image.get.resource.id";
-StringRef GetSamplerResourceIDFunc = "llvm.OpenCL.sampler.get.resource.id";
-
-StringRef ImageSizeArgMDType =   "__llvm_image_size";
-StringRef ImageFormatArgMDType = "__llvm_image_format";
-
-StringRef KernelsMDNodeName = "opencl.kernels";
-StringRef KernelArgMDNodeNames[] = {
-  "kernel_arg_addr_space",
-  "kernel_arg_access_qual",
-  "kernel_arg_type",
-  "kernel_arg_base_type",
-  "kernel_arg_type_qual"};
-const unsigned NumKernelArgMDNodes = 5;
-
-typedef SmallVector<Metadata *, 8> MDVector;
-struct KernelArgMD {
-  MDVector ArgVector[NumKernelArgMDNodes];
-};
-
-} // end anonymous namespace
-
-static inline bool
-IsImageType(StringRef TypeString) {
-  return TypeString == "image2d_t" || TypeString == "image3d_t";
-}
-
-static inline bool
-IsSamplerType(StringRef TypeString) {
-  return TypeString == "sampler_t";
-}
-
-static Function *
-GetFunctionFromMDNode(MDNode *Node) {
-  if (!Node)
-    return nullptr;
-
-  size_t NumOps = Node->getNumOperands();
-  if (NumOps != NumKernelArgMDNodes + 1)
-    return nullptr;
-
-  auto F = mdconst::dyn_extract<Function>(Node->getOperand(0));
-  if (!F)
-    return nullptr;
-
-  // Sanity checks.
-  size_t ExpectNumArgNodeOps = F->arg_size() + 1;
-  for (size_t i = 0; i < NumKernelArgMDNodes; ++i) {
-    MDNode *ArgNode = dyn_cast_or_null<MDNode>(Node->getOperand(i + 1));
-    if (ArgNode->getNumOperands() != ExpectNumArgNodeOps)
-      return nullptr;
-    if (!ArgNode->getOperand(0))
-      return nullptr;
-
-    // FIXME: It should be possible to do image lowering when some metadata
-    // args missing or not in the expected order.
-    MDString *StringNode = dyn_cast<MDString>(ArgNode->getOperand(0));
-    if (!StringNode || StringNode->getString() != KernelArgMDNodeNames[i])
-      return nullptr;
-  }
-
-  return F;
-}
-
-static StringRef
-AccessQualFromMD(MDNode *KernelMDNode, unsigned ArgIdx) {
-  MDNode *ArgAQNode = cast<MDNode>(KernelMDNode->getOperand(2));
-  return cast<MDString>(ArgAQNode->getOperand(ArgIdx + 1))->getString();
-}
-
-static StringRef
-ArgTypeFromMD(MDNode *KernelMDNode, unsigned ArgIdx) {
-  MDNode *ArgTypeNode = cast<MDNode>(KernelMDNode->getOperand(3));
-  return cast<MDString>(ArgTypeNode->getOperand(ArgIdx + 1))->getString();
-}
-
-static MDVector
-GetArgMD(MDNode *KernelMDNode, unsigned OpIdx) {
-  MDVector Res;
-  for (unsigned i = 0; i < NumKernelArgMDNodes; ++i) {
-    MDNode *Node = cast<MDNode>(KernelMDNode->getOperand(i + 1));
-    Res.push_back(Node->getOperand(OpIdx));
-  }
-  return Res;
-}
-
-static void
-PushArgMD(KernelArgMD &MD, const MDVector &V) {
-  assert(V.size() == NumKernelArgMDNodes);
-  for (unsigned i = 0; i < NumKernelArgMDNodes; ++i) {
-    MD.ArgVector[i].push_back(V[i]);
-  }
-}
-
-namespace {
-
-class AMDGPUOpenCLImageTypeLoweringPass : public ModulePass {
-  static char ID;
-
-  LLVMContext *Context;
-  Type *Int32Type;
-  Type *ImageSizeType;
-  Type *ImageFormatType;
-  SmallVector<Instruction *, 4> InstsToErase;
-
-  bool replaceImageUses(Argument &ImageArg, uint32_t ResourceID,
-                        Argument &ImageSizeArg,
-                        Argument &ImageFormatArg) {
-    bool Modified = false;
-
-    for (auto &Use : ImageArg.uses()) {
-      auto Inst = dyn_cast<CallInst>(Use.getUser());
-      if (!Inst) {
-        continue;
-      }
-
-      Function *F = Inst->getCalledFunction();
-      if (!F)
-        continue;
-
-      Value *Replacement = nullptr;
-      StringRef Name = F->getName();
-      if (Name.startswith(GetImageResourceIDFunc)) {
-        Replacement = ConstantInt::get(Int32Type, ResourceID);
-      } else if (Name.startswith(GetImageSizeFunc)) {
-        Replacement = &ImageSizeArg;
-      } else if (Name.startswith(GetImageFormatFunc)) {
-        Replacement = &ImageFormatArg;
-      } else {
-        continue;
-      }
-
-      Inst->replaceAllUsesWith(Replacement);
-      InstsToErase.push_back(Inst);
-      Modified = true;
-    }
-
-    return Modified;
-  }
-
-  bool replaceSamplerUses(Argument &SamplerArg, uint32_t ResourceID) {
-    bool Modified = false;
-
-    for (const auto &Use : SamplerArg.uses()) {
-      auto Inst = dyn_cast<CallInst>(Use.getUser());
-      if (!Inst) {
-        continue;
-      }
-
-      Function *F = Inst->getCalledFunction();
-      if (!F)
-        continue;
-
-      Value *Replacement = nullptr;
-      StringRef Name = F->getName();
-      if (Name == GetSamplerResourceIDFunc) {
-        Replacement = ConstantInt::get(Int32Type, ResourceID);
-      } else {
-        continue;
-      }
-
-      Inst->replaceAllUsesWith(Replacement);
-      InstsToErase.push_back(Inst);
-      Modified = true;
-    }
-
-    return Modified;
-  }
-
-  bool replaceImageAndSamplerUses(Function *F, MDNode *KernelMDNode) {
-    uint32_t NumReadOnlyImageArgs = 0;
-    uint32_t NumWriteOnlyImageArgs = 0;
-    uint32_t NumSamplerArgs = 0;
-
-    bool Modified = false;
-    InstsToErase.clear();
-    for (auto ArgI = F->arg_begin(); ArgI != F->arg_end(); ++ArgI) {
-      Argument &Arg = *ArgI;
-      StringRef Type = ArgTypeFromMD(KernelMDNode, Arg.getArgNo());
-
-      // Handle image types.
-      if (IsImageType(Type)) {
-        StringRef AccessQual = AccessQualFromMD(KernelMDNode, Arg.getArgNo());
-        uint32_t ResourceID;
-        if (AccessQual == "read_only") {
-          ResourceID = NumReadOnlyImageArgs++;
-        } else if (AccessQual == "write_only") {
-          ResourceID = NumWriteOnlyImageArgs++;
-        } else {
-          llvm_unreachable("Wrong image access qualifier.");
-        }
-
-        Argument &SizeArg = *(++ArgI);
-        Argument &FormatArg = *(++ArgI);
-        Modified |= replaceImageUses(Arg, ResourceID, SizeArg, FormatArg);
-
-      // Handle sampler type.
-      } else if (IsSamplerType(Type)) {
-        uint32_t ResourceID = NumSamplerArgs++;
-        Modified |= replaceSamplerUses(Arg, ResourceID);
-      }
-    }
-    for (unsigned i = 0; i < InstsToErase.size(); ++i) {
-      InstsToErase[i]->eraseFromParent();
-    }
-
-    return Modified;
-  }
-
-  std::tuple<Function *, MDNode *>
-  addImplicitArgs(Function *F, MDNode *KernelMDNode) {
-    bool Modified = false;
-
-    FunctionType *FT = F->getFunctionType();
-    SmallVector<Type *, 8> ArgTypes;
-
-    // Metadata operands for new MDNode.
-    KernelArgMD NewArgMDs;
-    PushArgMD(NewArgMDs, GetArgMD(KernelMDNode, 0));
-
-    // Add implicit arguments to the signature.
-    for (unsigned i = 0; i < FT->getNumParams(); ++i) {
-      ArgTypes.push_back(FT->getParamType(i));
-      MDVector ArgMD = GetArgMD(KernelMDNode, i + 1);
-      PushArgMD(NewArgMDs, ArgMD);
-
-      if (!IsImageType(ArgTypeFromMD(KernelMDNode, i)))
-        continue;
-
-      // Add size implicit argument.
-      ArgTypes.push_back(ImageSizeType);
-      ArgMD[2] = ArgMD[3] = MDString::get(*Context, ImageSizeArgMDType);
-      PushArgMD(NewArgMDs, ArgMD);
-
-      // Add format implicit argument.
-      ArgTypes.push_back(ImageFormatType);
-      ArgMD[2] = ArgMD[3] = MDString::get(*Context, ImageFormatArgMDType);
-      PushArgMD(NewArgMDs, ArgMD);
-
-      Modified = true;
-    }
-    if (!Modified) {
-      return std::make_tuple(nullptr, nullptr);
-    }
-
-    // Create function with new signature and clone the old body into it.
-    auto NewFT = FunctionType::get(FT->getReturnType(), ArgTypes, false);
-    auto NewF = Function::Create(NewFT, F->getLinkage(), F->getName());
-    ValueToValueMapTy VMap;
-    auto NewFArgIt = NewF->arg_begin();
-    for (auto &Arg: F->args()) {
-      auto ArgName = Arg.getName();
-      NewFArgIt->setName(ArgName);
-      VMap[&Arg] = &(*NewFArgIt++);
-      if (IsImageType(ArgTypeFromMD(KernelMDNode, Arg.getArgNo()))) {
-        (NewFArgIt++)->setName(Twine("__size_") + ArgName);
-        (NewFArgIt++)->setName(Twine("__format_") + ArgName);
-      }
-    }
-    SmallVector<ReturnInst*, 8> Returns;
-    CloneFunctionInto(NewF, F, VMap, /*ModuleLevelChanges=*/false, Returns);
-
-    // Build new MDNode.
-    SmallVector<llvm::Metadata *, 6> KernelMDArgs;
-    KernelMDArgs.push_back(ConstantAsMetadata::get(NewF));
-    for (unsigned i = 0; i < NumKernelArgMDNodes; ++i)
-      KernelMDArgs.push_back(MDNode::get(*Context, NewArgMDs.ArgVector[i]));
-    MDNode *NewMDNode = MDNode::get(*Context, KernelMDArgs);
-
-    return std::make_tuple(NewF, NewMDNode);
-  }
-
-  bool transformKernels(Module &M) {
-    NamedMDNode *KernelsMDNode = M.getNamedMetadata(KernelsMDNodeName);
-    if (!KernelsMDNode)
-      return false;
-
-    bool Modified = false;
-    for (unsigned i = 0; i < KernelsMDNode->getNumOperands(); ++i) {
-      MDNode *KernelMDNode = KernelsMDNode->getOperand(i);
-      Function *F = GetFunctionFromMDNode(KernelMDNode);
-      if (!F)
-        continue;
-
-      Function *NewF;
-      MDNode *NewMDNode;
-      std::tie(NewF, NewMDNode) = addImplicitArgs(F, KernelMDNode);
-      if (NewF) {
-        // Replace old function and metadata with new ones.
-        F->eraseFromParent();
-        M.getFunctionList().push_back(NewF);
-        M.getOrInsertFunction(NewF->getName(), NewF->getFunctionType(),
-                              NewF->getAttributes());
-        KernelsMDNode->setOperand(i, NewMDNode);
-
-        F = NewF;
-        KernelMDNode = NewMDNode;
-        Modified = true;
-      }
-
-      Modified |= replaceImageAndSamplerUses(F, KernelMDNode);
-    }
-
-    return Modified;
-  }
-
- public:
-  AMDGPUOpenCLImageTypeLoweringPass() : ModulePass(ID) {}
-
-  bool runOnModule(Module &M) override {
-    Context = &M.getContext();
-    Int32Type = Type::getInt32Ty(M.getContext());
-    ImageSizeType = ArrayType::get(Int32Type, 3);
-    ImageFormatType = ArrayType::get(Int32Type, 2);
-
-    return transformKernels(M);
-  }
-
-  StringRef getPassName() const override {
-    return "AMDGPU OpenCL Image Type Pass";
-  }
-};
-
-char AMDGPUOpenCLImageTypeLoweringPass::ID = 0;
-
-} // end anonymous namespace
-
-ModulePass *llvm::createAMDGPUOpenCLImageTypeLoweringPass() {
-  return new AMDGPUOpenCLImageTypeLoweringPass();
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/CIInstructions.td b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/CIInstructions.td
deleted file mode 100644
index 26a483a8abf6..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/CIInstructions.td
+++ /dev/null
@@ -1,15 +0,0 @@
-//===-- CIInstructions.td - CI Instruction Defintions ---------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-// Instruction definitions for CI and newer.
-//===----------------------------------------------------------------------===//
-// Remaining instructions:
-// S_CBRANCH_CDBGUSER
-// S_CBRANCH_CDBGSYS
-// S_CBRANCH_CDBGSYS_OR_USER
-// S_CBRANCH_CDBGSYS_AND_USER
\ No newline at end of file
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.cpp b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.cpp
deleted file mode 100644
index 4e828a791e09..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.cpp
+++ /dev/null
@@ -1,432 +0,0 @@
-//===--- AMDGPUCodeObjectMetadataStreamer.cpp -------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// \brief AMDGPU Code Object Metadata Streamer.
-///
-//
-//===----------------------------------------------------------------------===//
-
-#include "AMDGPUCodeObjectMetadataStreamer.h"
-#include "AMDGPU.h"
-#include "llvm/ADT/StringSwitch.h"
-#include "llvm/IR/Constants.h"
-#include "llvm/IR/Module.h"
-#include "llvm/Support/raw_ostream.h"
-
-namespace llvm {
-
-static cl::opt<bool> DumpCodeObjectMetadata(
-    "amdgpu-dump-comd",
-    cl::desc("Dump AMDGPU Code Object Metadata"));
-static cl::opt<bool> VerifyCodeObjectMetadata(
-    "amdgpu-verify-comd",
-    cl::desc("Verify AMDGPU Code Object Metadata"));
-
-namespace AMDGPU {
-namespace CodeObject {
-
-void MetadataStreamer::dump(StringRef YamlString) const {
-  errs() << "AMDGPU Code Object Metadata:\n" << YamlString << '\n';
-}
-
-void MetadataStreamer::verify(StringRef YamlString) const {
-  errs() << "AMDGPU Code Object Metadata Parser Test: ";
-
-  CodeObject::Metadata FromYamlString;
-  if (Metadata::fromYamlString(YamlString, FromYamlString)) {
-    errs() << "FAIL\n";
-    return;
-  }
-
-  std::string ToYamlString;
-  if (Metadata::toYamlString(FromYamlString, ToYamlString)) {
-    errs() << "FAIL\n";
-    return;
-  }
-
-  errs() << (YamlString == ToYamlString ? "PASS" : "FAIL") << '\n';
-  if (YamlString != ToYamlString) {
-    errs() << "Original input: " << YamlString << '\n'
-           << "Produced output: " << ToYamlString << '\n';
-  }
-}
-
-AccessQualifier MetadataStreamer::getAccessQualifier(StringRef AccQual) const {
-  if (AccQual.empty())
-    return AccessQualifier::Unknown;
-
-  return StringSwitch<AccessQualifier>(AccQual)
-             .Case("read_only",  AccessQualifier::ReadOnly)
-             .Case("write_only", AccessQualifier::WriteOnly)
-             .Case("read_write", AccessQualifier::ReadWrite)
-             .Default(AccessQualifier::Default);
-}
-
-AddressSpaceQualifier MetadataStreamer::getAddressSpaceQualifer(
-    unsigned AddressSpace) const {
-  if (AddressSpace == AMDGPUASI.PRIVATE_ADDRESS)
-    return AddressSpaceQualifier::Private;
-  if (AddressSpace == AMDGPUASI.GLOBAL_ADDRESS)
-    return AddressSpaceQualifier::Global;
-  if (AddressSpace == AMDGPUASI.CONSTANT_ADDRESS)
-    return AddressSpaceQualifier::Constant;
-  if (AddressSpace == AMDGPUASI.LOCAL_ADDRESS)
-    return AddressSpaceQualifier::Local;
-  if (AddressSpace == AMDGPUASI.FLAT_ADDRESS)
-    return AddressSpaceQualifier::Generic;
-  if (AddressSpace == AMDGPUASI.REGION_ADDRESS)
-    return AddressSpaceQualifier::Region;
-
-  llvm_unreachable("Unknown address space qualifier");
-}
-
-ValueKind MetadataStreamer::getValueKind(Type *Ty, StringRef TypeQual,
-                                         StringRef BaseTypeName) const {
-  if (TypeQual.find("pipe") != StringRef::npos)
-    return ValueKind::Pipe;
-
-  return StringSwitch<ValueKind>(BaseTypeName)
-             .Case("image1d_t", ValueKind::Image)
-             .Case("image1d_array_t", ValueKind::Image)
-             .Case("image1d_buffer_t", ValueKind::Image)
-             .Case("image2d_t", ValueKind::Image)
-             .Case("image2d_array_t", ValueKind::Image)
-             .Case("image2d_array_depth_t", ValueKind::Image)
-             .Case("image2d_array_msaa_t", ValueKind::Image)
-             .Case("image2d_array_msaa_depth_t", ValueKind::Image)
-             .Case("image2d_depth_t", ValueKind::Image)
-             .Case("image2d_msaa_t", ValueKind::Image)
-             .Case("image2d_msaa_depth_t", ValueKind::Image)
-             .Case("image3d_t", ValueKind::Image)
-             .Case("sampler_t", ValueKind::Sampler)
-             .Case("queue_t", ValueKind::Queue)
-             .Default(isa<PointerType>(Ty) ?
-                          (Ty->getPointerAddressSpace() ==
-                           AMDGPUASI.LOCAL_ADDRESS ?
-                           ValueKind::DynamicSharedPointer :
-                           ValueKind::GlobalBuffer) :
-                      ValueKind::ByValue);
-}
-
-ValueType MetadataStreamer::getValueType(Type *Ty, StringRef TypeName) const {
-  switch (Ty->getTypeID()) {
-  case Type::IntegerTyID: {
-    auto Signed = !TypeName.startswith("u");
-    switch (Ty->getIntegerBitWidth()) {
-    case 8:
-      return Signed ? ValueType::I8 : ValueType::U8;
-    case 16:
-      return Signed ? ValueType::I16 : ValueType::U16;
-    case 32:
-      return Signed ? ValueType::I32 : ValueType::U32;
-    case 64:
-      return Signed ? ValueType::I64 : ValueType::U64;
-    default:
-      return ValueType::Struct;
-    }
-  }
-  case Type::HalfTyID:
-    return ValueType::F16;
-  case Type::FloatTyID:
-    return ValueType::F32;
-  case Type::DoubleTyID:
-    return ValueType::F64;
-  case Type::PointerTyID:
-    return getValueType(Ty->getPointerElementType(), TypeName);
-  case Type::VectorTyID:
-    return getValueType(Ty->getVectorElementType(), TypeName);
-  default:
-    return ValueType::Struct;
-  }
-}
-
-std::string MetadataStreamer::getTypeName(Type *Ty, bool Signed) const {
-  switch (Ty->getTypeID()) {
-  case Type::IntegerTyID: {
-    if (!Signed)
-      return (Twine('u') + getTypeName(Ty, true)).str();
-
-    auto BitWidth = Ty->getIntegerBitWidth();
-    switch (BitWidth) {
-    case 8:
-      return "char";
-    case 16:
-      return "short";
-    case 32:
-      return "int";
-    case 64:
-      return "long";
-    default:
-      return (Twine('i') + Twine(BitWidth)).str();
-    }
-  }
-  case Type::HalfTyID:
-    return "half";
-  case Type::FloatTyID:
-    return "float";
-  case Type::DoubleTyID:
-    return "double";
-  case Type::VectorTyID: {
-    auto VecTy = cast<VectorType>(Ty);
-    auto ElTy = VecTy->getElementType();
-    auto NumElements = VecTy->getVectorNumElements();
-    return (Twine(getTypeName(ElTy, Signed)) + Twine(NumElements)).str();
-  }
-  default:
-    return "unknown";
-  }
-}
-
-std::vector<uint32_t> MetadataStreamer::getWorkGroupDimensions(
-    MDNode *Node) const {
-  std::vector<uint32_t> Dims;
-  if (Node->getNumOperands() != 3)
-    return Dims;
-
-  for (auto &Op : Node->operands())
-    Dims.push_back(mdconst::extract<ConstantInt>(Op)->getZExtValue());
-  return Dims;
-}
-
-void MetadataStreamer::emitVersion() {
-  auto &Version = CodeObjectMetadata.mVersion;
-
-  Version.push_back(MetadataVersionMajor);
-  Version.push_back(MetadataVersionMinor);
-}
-
-void MetadataStreamer::emitPrintf(const Module &Mod) {
-  auto &Printf = CodeObjectMetadata.mPrintf;
-
-  auto Node = Mod.getNamedMetadata("llvm.printf.fmts");
-  if (!Node)
-    return;
-
-  for (auto Op : Node->operands())
-    if (Op->getNumOperands())
-      Printf.push_back(cast<MDString>(Op->getOperand(0))->getString());
-}
-
-void MetadataStreamer::emitKernelLanguage(const Function &Func) {
-  auto &Kernel = CodeObjectMetadata.mKernels.back();
-
-  // TODO: What about other languages?
-  auto Node = Func.getParent()->getNamedMetadata("opencl.ocl.version");
-  if (!Node || !Node->getNumOperands())
-    return;
-  auto Op0 = Node->getOperand(0);
-  if (Op0->getNumOperands() <= 1)
-    return;
-
-  Kernel.mLanguage = "OpenCL C";
-  Kernel.mLanguageVersion.push_back(
-      mdconst::extract<ConstantInt>(Op0->getOperand(0))->getZExtValue());
-  Kernel.mLanguageVersion.push_back(
-      mdconst::extract<ConstantInt>(Op0->getOperand(1))->getZExtValue());
-}
-
-void MetadataStreamer::emitKernelAttrs(const Function &Func) {
-  auto &Attrs = CodeObjectMetadata.mKernels.back().mAttrs;
-
-  if (auto Node = Func.getMetadata("reqd_work_group_size"))
-    Attrs.mReqdWorkGroupSize = getWorkGroupDimensions(Node);
-  if (auto Node = Func.getMetadata("work_group_size_hint"))
-    Attrs.mWorkGroupSizeHint = getWorkGroupDimensions(Node);
-  if (auto Node = Func.getMetadata("vec_type_hint")) {
-    Attrs.mVecTypeHint = getTypeName(
-        cast<ValueAsMetadata>(Node->getOperand(0))->getType(),
-        mdconst::extract<ConstantInt>(Node->getOperand(1))->getZExtValue());
-  }
-}
-
-void MetadataStreamer::emitKernelArgs(const Function &Func) {
-  for (auto &Arg : Func.args())
-    emitKernelArg(Arg);
-
-  // TODO: What about other languages?
-  if (!Func.getParent()->getNamedMetadata("opencl.ocl.version"))
-    return;
-
-  auto &DL = Func.getParent()->getDataLayout();
-  auto Int64Ty = Type::getInt64Ty(Func.getContext());
-
-  emitKernelArg(DL, Int64Ty, ValueKind::HiddenGlobalOffsetX);
-  emitKernelArg(DL, Int64Ty, ValueKind::HiddenGlobalOffsetY);
-  emitKernelArg(DL, Int64Ty, ValueKind::HiddenGlobalOffsetZ);
-
-  if (!Func.getParent()->getNamedMetadata("llvm.printf.fmts"))
-    return;
-
-  auto Int8PtrTy = Type::getInt8PtrTy(Func.getContext(),
-                                      AMDGPUASI.GLOBAL_ADDRESS);
-  emitKernelArg(DL, Int8PtrTy, ValueKind::HiddenPrintfBuffer);
-}
-
-void MetadataStreamer::emitKernelArg(const Argument &Arg) {
-  auto Func = Arg.getParent();
-  auto ArgNo = Arg.getArgNo();
-  const MDNode *Node;
-
-  StringRef TypeQual;
-  Node = Func->getMetadata("kernel_arg_type_qual");
-  if (Node && ArgNo < Node->getNumOperands())
-    TypeQual = cast<MDString>(Node->getOperand(ArgNo))->getString();
-
-  StringRef BaseTypeName;
-  Node = Func->getMetadata("kernel_arg_base_type");
-  if (Node && ArgNo < Node->getNumOperands())
-    BaseTypeName = cast<MDString>(Node->getOperand(ArgNo))->getString();
-
-  StringRef AccQual;
-  if (Arg.getType()->isPointerTy() && Arg.onlyReadsMemory() &&
-      Arg.hasNoAliasAttr()) {
-    AccQual = "read_only";
-  } else {
-    Node = Func->getMetadata("kernel_arg_access_qual");
-    if (Node && ArgNo < Node->getNumOperands())
-      AccQual = cast<MDString>(Node->getOperand(ArgNo))->getString();
-  }
-
-  StringRef Name;
-  Node = Func->getMetadata("kernel_arg_name");
-  if (Node && ArgNo < Node->getNumOperands())
-    Name = cast<MDString>(Node->getOperand(ArgNo))->getString();
-
-  StringRef TypeName;
-  Node = Func->getMetadata("kernel_arg_type");
-  if (Node && ArgNo < Node->getNumOperands())
-    TypeName = cast<MDString>(Node->getOperand(ArgNo))->getString();
-
-  emitKernelArg(Func->getParent()->getDataLayout(), Arg.getType(),
-                getValueKind(Arg.getType(), TypeQual, BaseTypeName), TypeQual,
-                BaseTypeName, AccQual, Name, TypeName);
-}
-
-void MetadataStreamer::emitKernelArg(const DataLayout &DL, Type *Ty,
-                                     ValueKind ValueKind, StringRef TypeQual,
-                                     StringRef BaseTypeName, StringRef AccQual,
-                                     StringRef Name, StringRef TypeName) {
-  CodeObjectMetadata.mKernels.back().mArgs.push_back(Kernel::Arg::Metadata());
-  auto &Arg = CodeObjectMetadata.mKernels.back().mArgs.back();
-
-  Arg.mSize = DL.getTypeAllocSize(Ty);
-  Arg.mAlign = DL.getABITypeAlignment(Ty);
-  Arg.mValueKind = ValueKind;
-  Arg.mValueType = getValueType(Ty, BaseTypeName);
-
-  if (auto PtrTy = dyn_cast<PointerType>(Ty)) {
-    auto ElTy = PtrTy->getElementType();
-    if (PtrTy->getAddressSpace() == AMDGPUASI.LOCAL_ADDRESS && ElTy->isSized())
-      Arg.mPointeeAlign = DL.getABITypeAlignment(ElTy);
-  }
-
-  Arg.mAccQual = getAccessQualifier(AccQual);
-
-  if (auto PtrTy = dyn_cast<PointerType>(Ty))
-    Arg.mAddrSpaceQual = getAddressSpaceQualifer(PtrTy->getAddressSpace());
-
-  SmallVector<StringRef, 1> SplitTypeQuals;
-  TypeQual.split(SplitTypeQuals, " ", -1, false);
-  for (StringRef Key : SplitTypeQuals) {
-    auto P = StringSwitch<bool*>(Key)
-                 .Case("const",    &Arg.mIsConst)
-                 .Case("pipe",     &Arg.mIsPipe)
-                 .Case("restrict", &Arg.mIsRestrict)
-                 .Case("volatile", &Arg.mIsVolatile)
-                 .Default(nullptr);
-    if (P)
-      *P = true;
-  }
-
-  Arg.mName = Name;
-  Arg.mTypeName = TypeName;
-}
-
-void MetadataStreamer::emitKernelCodeProps(
-    const amd_kernel_code_t &KernelCode) {
-  auto &CodeProps = CodeObjectMetadata.mKernels.back().mCodeProps;
-
-  CodeProps.mKernargSegmentSize = KernelCode.kernarg_segment_byte_size;
-  CodeProps.mWorkgroupGroupSegmentSize =
-      KernelCode.workgroup_group_segment_byte_size;
-  CodeProps.mWorkitemPrivateSegmentSize =
-      KernelCode.workitem_private_segment_byte_size;
-  CodeProps.mWavefrontNumSGPRs = KernelCode.wavefront_sgpr_count;
-  CodeProps.mWorkitemNumVGPRs = KernelCode.workitem_vgpr_count;
-  CodeProps.mKernargSegmentAlign = KernelCode.kernarg_segment_alignment;
-  CodeProps.mGroupSegmentAlign = KernelCode.group_segment_alignment;
-  CodeProps.mPrivateSegmentAlign = KernelCode.private_segment_alignment;
-  CodeProps.mWavefrontSize = KernelCode.wavefront_size;
-}
-
-void MetadataStreamer::emitKernelDebugProps(
-    const amd_kernel_code_t &KernelCode) {
-  if (!(KernelCode.code_properties & AMD_CODE_PROPERTY_IS_DEBUG_SUPPORTED))
-    return;
-
-  auto &DebugProps = CodeObjectMetadata.mKernels.back().mDebugProps;
-
-  // FIXME: Need to pass down debugger ABI version through features. This is ok
-  // for now because we only have one version.
-  DebugProps.mDebuggerABIVersion.push_back(1);
-  DebugProps.mDebuggerABIVersion.push_back(0);
-  DebugProps.mReservedNumVGPRs = KernelCode.reserved_vgpr_count;
-  DebugProps.mReservedFirstVGPR = KernelCode.reserved_vgpr_first;
-  DebugProps.mPrivateSegmentBufferSGPR =
-      KernelCode.debug_private_segment_buffer_sgpr;
-  DebugProps.mWavefrontPrivateSegmentOffsetSGPR =
-      KernelCode.debug_wavefront_private_segment_offset_sgpr;
-}
-
-void MetadataStreamer::begin(const Module &Mod) {
-  AMDGPUASI = getAMDGPUAS(Mod);
-  emitVersion();
-  emitPrintf(Mod);
-}
-
-void MetadataStreamer::emitKernel(const Function &Func,
-                                  const amd_kernel_code_t &KernelCode) {
-  if (Func.getCallingConv() != CallingConv::AMDGPU_KERNEL)
-    return;
-
-  CodeObjectMetadata.mKernels.push_back(Kernel::Metadata());
-  auto &Kernel = CodeObjectMetadata.mKernels.back();
-
-  Kernel.mName = Func.getName();
-  emitKernelLanguage(Func);
-  emitKernelAttrs(Func);
-  emitKernelArgs(Func);
-  emitKernelCodeProps(KernelCode);
-  emitKernelDebugProps(KernelCode);
-}
-
-ErrorOr<std::string> MetadataStreamer::toYamlString() {
-  std::string YamlString;
-  if (auto Error = Metadata::toYamlString(CodeObjectMetadata, YamlString))
-    return Error;
-
-  if (DumpCodeObjectMetadata)
-    dump(YamlString);
-  if (VerifyCodeObjectMetadata)
-    verify(YamlString);
-
-  return YamlString;
-}
-
-ErrorOr<std::string> MetadataStreamer::toYamlString(StringRef YamlString) {
-  if (auto Error = Metadata::fromYamlString(YamlString, CodeObjectMetadata))
-    return Error;
-
-  return toYamlString();
-}
-
-} // end namespace CodeObject
-} // end namespace AMDGPU
-} // end namespace llvm
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.h b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.h
deleted file mode 100644
index c6681431d74d..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.h
+++ /dev/null
@@ -1,99 +0,0 @@
-//===--- AMDGPUCodeObjectMetadataStreamer.h ---------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// \brief AMDGPU Code Object Metadata Streamer.
-///
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUCODEOBJECTMETADATASTREAMER_H
-#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUCODEOBJECTMETADATASTREAMER_H
-
-#include "AMDGPU.h"
-#include "AMDKernelCodeT.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/Support/AMDGPUCodeObjectMetadata.h"
-#include "llvm/Support/ErrorOr.h"
-
-namespace llvm {
-
-class Argument;
-class DataLayout;
-class Function;
-class MDNode;
-class Module;
-class Type;
-
-namespace AMDGPU {
-namespace CodeObject {
-
-class MetadataStreamer final {
-private:
-  Metadata CodeObjectMetadata;
-  AMDGPUAS AMDGPUASI;
-
-  void dump(StringRef YamlString) const;
-
-  void verify(StringRef YamlString) const;
-
-  AccessQualifier getAccessQualifier(StringRef AccQual) const;
-
-  AddressSpaceQualifier getAddressSpaceQualifer(unsigned AddressSpace) const;
-
-  ValueKind getValueKind(Type *Ty, StringRef TypeQual,
-                         StringRef BaseTypeName) const;
-
-  ValueType getValueType(Type *Ty, StringRef TypeName) const;
-
-  std::string getTypeName(Type *Ty, bool Signed) const;
-
-  std::vector<uint32_t> getWorkGroupDimensions(MDNode *Node) const;
-
-  void emitVersion();
-
-  void emitPrintf(const Module &Mod);
-
-  void emitKernelLanguage(const Function &Func);
-
-  void emitKernelAttrs(const Function &Func);
-
-  void emitKernelArgs(const Function &Func);
-
-  void emitKernelArg(const Argument &Arg);
-
-  void emitKernelArg(const DataLayout &DL, Type *Ty, ValueKind ValueKind,
-                     StringRef TypeQual = "", StringRef BaseTypeName = "",
-                     StringRef AccQual = "", StringRef Name = "",
-                     StringRef TypeName = "");
-
-  void emitKernelCodeProps(const amd_kernel_code_t &KernelCode);
-
-  void emitKernelDebugProps(const amd_kernel_code_t &KernelCode);
-
-public:
-  MetadataStreamer() = default;
-  ~MetadataStreamer() = default;
-
-  void begin(const Module &Mod);
-
-  void end() {}
-
-  void emitKernel(const Function &Func, const amd_kernel_code_t &KernelCode);
-
-  ErrorOr<std::string> toYamlString();
-
-  ErrorOr<std::string> toYamlString(StringRef YamlString);
-};
-
-} // end namespace CodeObject
-} // end namespace AMDGPU
-} // end namespace llvm
-
-#endif // LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUCODEOBJECTMETADATASTREAMER_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/Processors.td b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/Processors.td
deleted file mode 100644
index d30d1d382588..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/Processors.td
+++ /dev/null
@@ -1,223 +0,0 @@
-//===-- Processors.td - R600 Processor definitions ------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-class Proc<string Name, ProcessorItineraries itin, list<SubtargetFeature> Features>
-: Processor<Name, itin, Features>;
-
-//===----------------------------------------------------------------------===//
-// R600
-//===----------------------------------------------------------------------===//
-def : Proc<"r600",       R600_VLIW5_Itin,
-    [FeatureR600, FeatureVertexCache, FeatureWavefrontSize64]>;
-
-def : Proc<"r630",       R600_VLIW5_Itin,
-    [FeatureR600, FeatureVertexCache, FeatureWavefrontSize32]>;
-
-def : Proc<"rs880",      R600_VLIW5_Itin,
-    [FeatureR600, FeatureWavefrontSize16]>;
-
-def : Proc<"rv670",      R600_VLIW5_Itin,
-    [FeatureR600, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
-
-//===----------------------------------------------------------------------===//
-// R700
-//===----------------------------------------------------------------------===//
-
-def : Proc<"rv710",      R600_VLIW5_Itin,
-    [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
-
-def : Proc<"rv730",      R600_VLIW5_Itin,
-    [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>;
-
-def : Proc<"rv770",      R600_VLIW5_Itin,
-    [FeatureR700, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>;
-
-//===----------------------------------------------------------------------===//
-// Evergreen
-//===----------------------------------------------------------------------===//
-
-def : Proc<"cedar",      R600_VLIW5_Itin,
-    [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize32,
-     FeatureCFALUBug]>;
-
-def : Proc<"redwood",    R600_VLIW5_Itin,
-    [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64,
-     FeatureCFALUBug]>;
-
-def : Proc<"sumo",       R600_VLIW5_Itin,
-    [FeatureEvergreen, FeatureWavefrontSize64, FeatureCFALUBug]>;
-
-def : Proc<"juniper",    R600_VLIW5_Itin,
-    [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64]>;
-
-def : Proc<"cypress",    R600_VLIW5_Itin,
-    [FeatureEvergreen, FeatureFP64, FeatureVertexCache,
-     FeatureWavefrontSize64]>;
-
-//===----------------------------------------------------------------------===//
-// Northern Islands
-//===----------------------------------------------------------------------===//
-
-def : Proc<"barts",      R600_VLIW5_Itin,
-    [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
-
-def : Proc<"turks",      R600_VLIW5_Itin,
-    [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>;
-
-def : Proc<"caicos",     R600_VLIW5_Itin,
-    [FeatureNorthernIslands, FeatureCFALUBug]>;
-
-def : Proc<"cayman",     R600_VLIW4_Itin,
-    [FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>;
-
-//===----------------------------------------------------------------------===//
-// Southern Islands
-//===----------------------------------------------------------------------===//
-
-def : ProcessorModel<"gfx600",     SIFullSpeedModel,
-  [FeatureISAVersion6_0_0]>;
-
-def : ProcessorModel<"SI",         SIFullSpeedModel,
-  [FeatureISAVersion6_0_0]
->;
-
-def : ProcessorModel<"tahiti",     SIFullSpeedModel,
-  [FeatureISAVersion6_0_0]
->;
-
-def : ProcessorModel<"gfx601",     SIQuarterSpeedModel,
-  [FeatureISAVersion6_0_1]
->;
-
-def : ProcessorModel<"pitcairn",   SIQuarterSpeedModel,
-  [FeatureISAVersion6_0_1]>;
-
-def : ProcessorModel<"verde",      SIQuarterSpeedModel,
-  [FeatureISAVersion6_0_1]>;
-
-def : ProcessorModel<"oland",      SIQuarterSpeedModel,
-  [FeatureISAVersion6_0_1]>;
-
-def : ProcessorModel<"hainan",     SIQuarterSpeedModel, [FeatureISAVersion6_0_1]>;
-
-//===----------------------------------------------------------------------===//
-// Sea Islands
-//===----------------------------------------------------------------------===//
-
-def : ProcessorModel<"gfx700",     SIQuarterSpeedModel,
-  [FeatureISAVersion7_0_0]
->;
-
-def : ProcessorModel<"bonaire",    SIQuarterSpeedModel,
-  [FeatureISAVersion7_0_0]
->;
-
-def : ProcessorModel<"kaveri",     SIQuarterSpeedModel,
-  [FeatureISAVersion7_0_0]
->;
-
-def : ProcessorModel<"gfx701",     SIFullSpeedModel,
-  [FeatureISAVersion7_0_1]
->;
-
-def : ProcessorModel<"hawaii",     SIFullSpeedModel,
-  [FeatureISAVersion7_0_1]
->;
-
-def : ProcessorModel<"gfx702",     SIQuarterSpeedModel,
-  [FeatureISAVersion7_0_2]
->;
-
-def : ProcessorModel<"gfx703",     SIQuarterSpeedModel,
-  [FeatureISAVersion7_0_3]
->;
-
-def : ProcessorModel<"kabini",     SIQuarterSpeedModel,
-  [FeatureISAVersion7_0_3]
->;
-
-def : ProcessorModel<"mullins",    SIQuarterSpeedModel,
-  [FeatureISAVersion7_0_3]>;
-
-//===----------------------------------------------------------------------===//
-// Volcanic Islands
-//===----------------------------------------------------------------------===//
-
-def : ProcessorModel<"tonga",   SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_2]
->;
-
-def : ProcessorModel<"iceland", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_0]
->;
-
-def : ProcessorModel<"carrizo", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_1]
->;
-
-def : ProcessorModel<"fiji",    SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_3]
->;
-
-def : ProcessorModel<"stoney",  SIQuarterSpeedModel,
-  [FeatureISAVersion8_1_0]
->;
-
-def : ProcessorModel<"polaris10", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_3]
->;
-
-def : ProcessorModel<"polaris11", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_3]
->;
-
-def : ProcessorModel<"gfx800", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_0]
->;
-
-def : ProcessorModel<"gfx801", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_1]
->;
-
-def : ProcessorModel<"gfx802", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_2]
->;
-
-def : ProcessorModel<"gfx803", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_3]
->;
-
-def : ProcessorModel<"gfx804", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_4]
->;
-
-def : ProcessorModel<"gfx810", SIQuarterSpeedModel,
-  [FeatureISAVersion8_1_0]
->;
-
-//===----------------------------------------------------------------------===//
-// GFX9
-//===----------------------------------------------------------------------===//
-
-def : ProcessorModel<"gfx900", SIQuarterSpeedModel,
-  [FeatureISAVersion9_0_0]
->;
-
-def : ProcessorModel<"gfx901", SIQuarterSpeedModel,
-  [FeatureISAVersion9_0_1]
->;
-
-def : ProcessorModel<"gfx902", SIQuarterSpeedModel,
-  [FeatureISAVersion9_0_2]
->;
-
-def : ProcessorModel<"gfx903", SIQuarterSpeedModel,
-  [FeatureISAVersion9_0_3]
->;
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600Intrinsics.td b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600Intrinsics.td
deleted file mode 100644
index 4c9e1e8a5434..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600Intrinsics.td
+++ /dev/null
@@ -1,67 +0,0 @@
-//===-- R600Intrinsics.td - R600 Instrinsic defs -------*- tablegen -*-----===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// R600 Intrinsic Definitions
-//
-//===----------------------------------------------------------------------===//
-
-class TextureIntrinsicFloatInput : Intrinsic<[llvm_v4f32_ty], [
-  llvm_v4f32_ty, // Coord
-  llvm_i32_ty,   // offset_x
-  llvm_i32_ty,   // offset_y,
-  llvm_i32_ty,   // offset_z,
-  llvm_i32_ty,   // resource_id
-  llvm_i32_ty,   // samplerid
-  llvm_i32_ty,   // coord_type_x
-  llvm_i32_ty,   // coord_type_y
-  llvm_i32_ty,   // coord_type_z
-  llvm_i32_ty],  // coord_type_w
-  [IntrNoMem]
->;
-
-class TextureIntrinsicInt32Input : Intrinsic<[llvm_v4i32_ty], [
-    llvm_v4i32_ty, // Coord
-    llvm_i32_ty,   // offset_x
-    llvm_i32_ty,   // offset_y,
-    llvm_i32_ty,   // offset_z,
-    llvm_i32_ty,   // resource_id
-    llvm_i32_ty,   // samplerid
-    llvm_i32_ty,   // coord_type_x
-    llvm_i32_ty,   // coord_type_y
-    llvm_i32_ty,   // coord_type_z
-    llvm_i32_ty],  // coord_type_w
-    [IntrNoMem]
->;
-
-let TargetPrefix = "r600", isTarget = 1 in {
-
-def int_r600_store_swizzle :
-  Intrinsic<[], [llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty], []
->;
-
-def int_r600_store_stream_output : Intrinsic<
-  [], [llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []
->;
-
-def int_r600_tex : TextureIntrinsicFloatInput;
-def int_r600_texc : TextureIntrinsicFloatInput;
-def int_r600_txl : TextureIntrinsicFloatInput;
-def int_r600_txlc : TextureIntrinsicFloatInput;
-def int_r600_txb : TextureIntrinsicFloatInput;
-def int_r600_txbc : TextureIntrinsicFloatInput;
-def int_r600_txf : TextureIntrinsicInt32Input;
-def int_r600_txq : TextureIntrinsicInt32Input;
-def int_r600_ddx : TextureIntrinsicFloatInput;
-def int_r600_ddy : TextureIntrinsicFloatInput;
-
-def int_r600_dot4 : Intrinsic<[llvm_float_ty],
-  [llvm_v4f32_ty, llvm_v4f32_ty], [IntrNoMem, IntrSpeculatable]
->;
-
-} // End TargetPrefix = "r600", isTarget = 1
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp
deleted file mode 100644
index d4d3959658e7..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp
+++ /dev/null
@@ -1,88 +0,0 @@
-//===-- SIFixControlFlowLiveIntervals.cpp - Fix CF live intervals ---------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// \brief Spilling of EXEC masks used for control flow messes up control flow
-/// lowering, so mark all live intervals associated with CF instructions as
-/// non-spillable.
-///
-//===----------------------------------------------------------------------===//
-
-#include "AMDGPU.h"
-#include "SIInstrInfo.h"
-#include "llvm/CodeGen/LiveIntervalAnalysis.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-
-using namespace llvm;
-
-#define DEBUG_TYPE "si-fix-cf-live-intervals"
-
-namespace {
-
-class SIFixControlFlowLiveIntervals : public MachineFunctionPass {
-public:
-  static char ID;
-
-public:
-  SIFixControlFlowLiveIntervals() : MachineFunctionPass(ID) {
-    initializeSIFixControlFlowLiveIntervalsPass(*PassRegistry::getPassRegistry());
-  }
-
-  bool runOnMachineFunction(MachineFunction &MF) override;
-
-  StringRef getPassName() const override { return "SI Fix CF Live Intervals"; }
-
-  void getAnalysisUsage(AnalysisUsage &AU) const override {
-    AU.addRequired<LiveIntervals>();
-    AU.setPreservesAll();
-    MachineFunctionPass::getAnalysisUsage(AU);
-  }
-};
-
-} // End anonymous namespace.
-
-INITIALIZE_PASS_BEGIN(SIFixControlFlowLiveIntervals, DEBUG_TYPE,
-                      "SI Fix CF Live Intervals", false, false)
-INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
-INITIALIZE_PASS_END(SIFixControlFlowLiveIntervals, DEBUG_TYPE,
-                    "SI Fix CF Live Intervals", false, false)
-
-char SIFixControlFlowLiveIntervals::ID = 0;
-
-char &llvm::SIFixControlFlowLiveIntervalsID = SIFixControlFlowLiveIntervals::ID;
-
-FunctionPass *llvm::createSIFixControlFlowLiveIntervalsPass() {
-  return new SIFixControlFlowLiveIntervals();
-}
-
-bool SIFixControlFlowLiveIntervals::runOnMachineFunction(MachineFunction &MF) {
-  LiveIntervals *LIS = &getAnalysis<LiveIntervals>();
-
-  for (const MachineBasicBlock &MBB : MF) {
-    for (const MachineInstr &MI : MBB) {
-      switch (MI.getOpcode()) {
-        case AMDGPU::SI_IF:
-        case AMDGPU::SI_ELSE:
-        case AMDGPU::SI_BREAK:
-        case AMDGPU::SI_IF_BREAK:
-        case AMDGPU::SI_ELSE_BREAK:
-        case AMDGPU::SI_END_CF: {
-          unsigned Reg = MI.getOperand(0).getReg();
-          LIS->getInterval(Reg).markNotSpillable();
-          break;
-        }
-        default:
-          break;
-      }
-    }
-  }
-
-  return false;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp b/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp
deleted file mode 100644
index bc86515d8b1f..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp
+++ /dev/null
@@ -1,708 +0,0 @@
-//===-- SILowerControlFlow.cpp - Use predicates for control flow ----------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// \brief Insert wait instructions for memory reads and writes.
-///
-/// Memory reads and writes are issued asynchronously, so we need to insert
-/// S_WAITCNT instructions when we want to access any of their results or
-/// overwrite any register that's used asynchronously.
-//
-//===----------------------------------------------------------------------===//
-
-#include "AMDGPU.h"
-#include "AMDGPUSubtarget.h"
-#include "SIDefines.h"
-#include "SIInstrInfo.h"
-#include "SIMachineFunctionInfo.h"
-#include "SIRegisterInfo.h"
-#include "Utils/AMDGPUBaseInfo.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/IR/DebugLoc.h"
-#include "llvm/Pass.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetRegisterInfo.h"
-#include <algorithm>
-#include <cassert>
-#include <cstdint>
-#include <cstring>
-#include <new>
-#include <utility>
-
-#define DEBUG_TYPE "si-insert-waits"
-
-using namespace llvm;
-
-namespace {
-
-/// \brief One variable for each of the hardware counters
-typedef union {
-  struct {
-    unsigned VM;
-    unsigned EXP;
-    unsigned LGKM;
-  } Named;
-  unsigned Array[3];
-} Counters;
-
-typedef enum {
-  OTHER,
-  SMEM,
-  VMEM
-} InstType;
-
-typedef Counters RegCounters[512];
-typedef std::pair<unsigned, unsigned> RegInterval;
-
-class SIInsertWaits : public MachineFunctionPass {
-private:
-  const SISubtarget *ST = nullptr;
-  const SIInstrInfo *TII = nullptr;
-  const SIRegisterInfo *TRI = nullptr;
-  const MachineRegisterInfo *MRI;
-  AMDGPU::IsaInfo::IsaVersion ISA;
-
-  /// \brief Constant zero value
-  static const Counters ZeroCounts;
-
-  /// \brief Hardware limits
-  Counters HardwareLimits;
-
-  /// \brief Counter values we have already waited on.
-  Counters WaitedOn;
-
-  /// \brief Counter values that we must wait on before the next counter
-  /// increase.
-  Counters DelayedWaitOn;
-
-  /// \brief Counter values for last instruction issued.
-  Counters LastIssued;
-
-  /// \brief Registers used by async instructions.
-  RegCounters UsedRegs;
-
-  /// \brief Registers defined by async instructions.
-  RegCounters DefinedRegs;
-
-  /// \brief Different export instruction types seen since last wait.
-  unsigned ExpInstrTypesSeen = 0;
-
-  /// \brief Type of the last opcode.
-  InstType LastOpcodeType;
-
-  bool LastInstWritesM0;
-
-  /// Whether or not we have flat operations outstanding.
-  bool IsFlatOutstanding;
-
-  /// \brief Whether the machine function returns void
-  bool ReturnsVoid;
-
-  /// Whether the VCCZ bit is possibly corrupt
-  bool VCCZCorrupt = false;
-
-  /// \brief Get increment/decrement amount for this instruction.
-  Counters getHwCounts(MachineInstr &MI);
-
-  /// \brief Is operand relevant for async execution?
-  bool isOpRelevant(MachineOperand &Op);
-
-  /// \brief Get register interval an operand affects.
-  RegInterval getRegInterval(const TargetRegisterClass *RC,
-                             const MachineOperand &Reg) const;
-
-  /// \brief Handle instructions async components
-  void pushInstruction(MachineBasicBlock &MBB,
-                       MachineBasicBlock::iterator I,
-                       const Counters& Increment);
-
-  /// \brief Insert the actual wait instruction
-  bool insertWait(MachineBasicBlock &MBB,
-                  MachineBasicBlock::iterator I,
-                  const Counters &Counts);
-
-  /// \brief Handle existing wait instructions (from intrinsics)
-  void handleExistingWait(MachineBasicBlock::iterator I);
-
-  /// \brief Do we need def2def checks?
-  bool unorderedDefines(MachineInstr &MI);
-
-  /// \brief Resolve all operand dependencies to counter requirements
-  Counters handleOperands(MachineInstr &MI);
-
-  /// \brief Insert S_NOP between an instruction writing M0 and S_SENDMSG.
-  void handleSendMsg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I);
-
-  /// Return true if there are LGKM instrucitons that haven't been waited on
-  /// yet.
-  bool hasOutstandingLGKM() const;
-
-public:
-  static char ID;
-
-  SIInsertWaits() : MachineFunctionPass(ID) {}
-
-  bool runOnMachineFunction(MachineFunction &MF) override;
-
-  StringRef getPassName() const override {
-    return "SI insert wait instructions";
-  }
-
-  void getAnalysisUsage(AnalysisUsage &AU) const override {
-    AU.setPreservesCFG();
-    MachineFunctionPass::getAnalysisUsage(AU);
-  }
-};
-
-} // end anonymous namespace
-
-INITIALIZE_PASS_BEGIN(SIInsertWaits, DEBUG_TYPE,
-                      "SI Insert Waits", false, false)
-INITIALIZE_PASS_END(SIInsertWaits, DEBUG_TYPE,
-                    "SI Insert Waits", false, false)
-
-char SIInsertWaits::ID = 0;
-
-char &llvm::SIInsertWaitsID = SIInsertWaits::ID;
-
-FunctionPass *llvm::createSIInsertWaitsPass() {
-  return new SIInsertWaits();
-}
-
-const Counters SIInsertWaits::ZeroCounts = { { 0, 0, 0 } };
-
-static bool readsVCCZ(const MachineInstr &MI) {
-  unsigned Opc = MI.getOpcode();
-  return (Opc == AMDGPU::S_CBRANCH_VCCNZ || Opc == AMDGPU::S_CBRANCH_VCCZ) &&
-         !MI.getOperand(1).isUndef();
-}
-
-bool SIInsertWaits::hasOutstandingLGKM() const {
-  return WaitedOn.Named.LGKM != LastIssued.Named.LGKM;
-}
-
-Counters SIInsertWaits::getHwCounts(MachineInstr &MI) {
-  uint64_t TSFlags = MI.getDesc().TSFlags;
-  Counters Result = { { 0, 0, 0 } };
-
-  Result.Named.VM = !!(TSFlags & SIInstrFlags::VM_CNT);
-
-  // Only consider stores or EXP for EXP_CNT
-  Result.Named.EXP = !!(TSFlags & SIInstrFlags::EXP_CNT) && MI.mayStore();
-
-  // LGKM may uses larger values
-  if (TSFlags & SIInstrFlags::LGKM_CNT) {
-
-    if (TII->isSMRD(MI)) {
-
-      if (MI.getNumOperands() != 0) {
-        assert(MI.getOperand(0).isReg() &&
-               "First LGKM operand must be a register!");
-
-        // XXX - What if this is a write into a super register?
-        const TargetRegisterClass *RC = TII->getOpRegClass(MI, 0);
-        unsigned Size = TRI->getRegSizeInBits(*RC);
-        Result.Named.LGKM = Size > 32 ? 2 : 1;
-      } else {
-        // s_dcache_inv etc. do not have a a destination register. Assume we
-        // want a wait on these.
-        // XXX - What is the right value?
-        Result.Named.LGKM = 1;
-      }
-    } else {
-      // DS
-      Result.Named.LGKM = 1;
-    }
-
-  } else {
-    Result.Named.LGKM = 0;
-  }
-
-  return Result;
-}
-
-bool SIInsertWaits::isOpRelevant(MachineOperand &Op) {
-  // Constants are always irrelevant
-  if (!Op.isReg() || !TRI->isInAllocatableClass(Op.getReg()))
-    return false;
-
-  // Defines are always relevant
-  if (Op.isDef())
-    return true;
-
-  // For exports all registers are relevant.
-  // TODO: Skip undef/disabled registers.
-  MachineInstr &MI = *Op.getParent();
-  if (TII->isEXP(MI))
-    return true;
-
-  // For stores the stored value is also relevant
-  if (!MI.getDesc().mayStore())
-    return false;
-
-  // Check if this operand is the value being stored.
-  // Special case for DS/FLAT instructions, since the address
-  // operand comes before the value operand and it may have
-  // multiple data operands.
-
-  if (TII->isDS(MI)) {
-    MachineOperand *Data0 = TII->getNamedOperand(MI, AMDGPU::OpName::data0);
-    if (Data0 && Op.isIdenticalTo(*Data0))
-      return true;
-
-    MachineOperand *Data1 = TII->getNamedOperand(MI, AMDGPU::OpName::data1);
-    return Data1 && Op.isIdenticalTo(*Data1);
-  }
-
-  if (TII->isFLAT(MI)) {
-    MachineOperand *Data = TII->getNamedOperand(MI, AMDGPU::OpName::vdata);
-    if (Data && Op.isIdenticalTo(*Data))
-      return true;
-  }
-
-  // NOTE: This assumes that the value operand is before the
-  // address operand, and that there is only one value operand.
-  for (MachineInstr::mop_iterator I = MI.operands_begin(),
-       E = MI.operands_end(); I != E; ++I) {
-
-    if (I->isReg() && I->isUse())
-      return Op.isIdenticalTo(*I);
-  }
-
-  return false;
-}
-
-RegInterval SIInsertWaits::getRegInterval(const TargetRegisterClass *RC,
-                                          const MachineOperand &Reg) const {
-  unsigned Size = TRI->getRegSizeInBits(*RC);
-  assert(Size >= 32);
-
-  RegInterval Result;
-  Result.first = TRI->getEncodingValue(Reg.getReg());
-  Result.second = Result.first + Size / 32;
-
-  return Result;
-}
-
-void SIInsertWaits::pushInstruction(MachineBasicBlock &MBB,
-                                    MachineBasicBlock::iterator I,
-                                    const Counters &Increment) {
-  // Get the hardware counter increments and sum them up
-  Counters Limit = ZeroCounts;
-  unsigned Sum = 0;
-
-  if (TII->mayAccessFlatAddressSpace(*I))
-    IsFlatOutstanding = true;
-
-  for (unsigned i = 0; i < 3; ++i) {
-    LastIssued.Array[i] += Increment.Array[i];
-    if (Increment.Array[i])
-      Limit.Array[i] = LastIssued.Array[i];
-    Sum += Increment.Array[i];
-  }
-
-  // If we don't increase anything then that's it
-  if (Sum == 0) {
-    LastOpcodeType = OTHER;
-    return;
-  }
-
-  if (ST->getGeneration() >= SISubtarget::VOLCANIC_ISLANDS) {
-    // Any occurrence of consecutive VMEM or SMEM instructions forms a VMEM
-    // or SMEM clause, respectively.
-    //
-    // The temporary workaround is to break the clauses with S_NOP.
-    //
-    // The proper solution would be to allocate registers such that all source
-    // and destination registers don't overlap, e.g. this is illegal:
-    //   r0 = load r2
-    //   r2 = load r0
-    if (LastOpcodeType == VMEM && Increment.Named.VM) {
-      // Insert a NOP to break the clause.
-      BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_NOP))
-          .addImm(0);
-      LastInstWritesM0 = false;
-    }
-
-    if (TII->isSMRD(*I))
-      LastOpcodeType = SMEM;
-    else if (Increment.Named.VM)
-      LastOpcodeType = VMEM;
-  }
-
-  // Remember which export instructions we have seen
-  if (Increment.Named.EXP) {
-    ExpInstrTypesSeen |= TII->isEXP(*I) ? 1 : 2;
-  }
-
-  for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
-    MachineOperand &Op = I->getOperand(i);
-    if (!isOpRelevant(Op))
-      continue;
-
-    const TargetRegisterClass *RC = TII->getOpRegClass(*I, i);
-    RegInterval Interval = getRegInterval(RC, Op);
-    for (unsigned j = Interval.first; j < Interval.second; ++j) {
-
-      // Remember which registers we define
-      if (Op.isDef())
-        DefinedRegs[j] = Limit;
-
-      // and which one we are using
-      if (Op.isUse())
-        UsedRegs[j] = Limit;
-    }
-  }
-}
-
-bool SIInsertWaits::insertWait(MachineBasicBlock &MBB,
-                               MachineBasicBlock::iterator I,
-                               const Counters &Required) {
-  // End of program? No need to wait on anything
-  // A function not returning void needs to wait, because other bytecode will
-  // be appended after it and we don't know what it will be.
-  if (I != MBB.end() && I->getOpcode() == AMDGPU::S_ENDPGM && ReturnsVoid)
-    return false;
-
-  // Figure out if the async instructions execute in order
-  bool Ordered[3];
-
-  // VM_CNT is always ordered except when there are flat instructions, which
-  // can return out of order.
-  Ordered[0] = !IsFlatOutstanding;
-
-  // EXP_CNT is unordered if we have both EXP & VM-writes
-  Ordered[1] = ExpInstrTypesSeen == 3;
-
-  // LGKM_CNT is handled as always unordered. TODO: Handle LDS and GDS
-  Ordered[2] = false;
-
-  // The values we are going to put into the S_WAITCNT instruction
-  Counters Counts = HardwareLimits;
-
-  // Do we really need to wait?
-  bool NeedWait = false;
-
-  for (unsigned i = 0; i < 3; ++i) {
-    if (Required.Array[i] <= WaitedOn.Array[i])
-      continue;
-
-    NeedWait = true;
-
-    if (Ordered[i]) {
-      unsigned Value = LastIssued.Array[i] - Required.Array[i];
-
-      // Adjust the value to the real hardware possibilities.
-      Counts.Array[i] = std::min(Value, HardwareLimits.Array[i]);
-
-    } else
-      Counts.Array[i] = 0;
-
-    // Remember on what we have waited on.
-    WaitedOn.Array[i] = LastIssued.Array[i] - Counts.Array[i];
-  }
-
-  if (!NeedWait)
-    return false;
-
-  // Reset EXP_CNT instruction types
-  if (Counts.Named.EXP == 0)
-    ExpInstrTypesSeen = 0;
-
-  // Build the wait instruction
-  BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
-    .addImm(AMDGPU::encodeWaitcnt(ISA,
-                                  Counts.Named.VM,
-                                  Counts.Named.EXP,
-                                  Counts.Named.LGKM));
-
-  LastOpcodeType = OTHER;
-  LastInstWritesM0 = false;
-  IsFlatOutstanding = false;
-  return true;
-}
-
-/// \brief helper function for handleOperands
-static void increaseCounters(Counters &Dst, const Counters &Src) {
-  for (unsigned i = 0; i < 3; ++i)
-    Dst.Array[i] = std::max(Dst.Array[i], Src.Array[i]);
-}
-
-/// \brief check whether any of the counters is non-zero
-static bool countersNonZero(const Counters &Counter) {
-  for (unsigned i = 0; i < 3; ++i)
-    if (Counter.Array[i])
-      return true;
-  return false;
-}
-
-void SIInsertWaits::handleExistingWait(MachineBasicBlock::iterator I) {
-  assert(I->getOpcode() == AMDGPU::S_WAITCNT);
-
-  unsigned Imm = I->getOperand(0).getImm();
-  Counters Counts, WaitOn;
-
-  Counts.Named.VM = AMDGPU::decodeVmcnt(ISA, Imm);
-  Counts.Named.EXP = AMDGPU::decodeExpcnt(ISA, Imm);
-  Counts.Named.LGKM = AMDGPU::decodeLgkmcnt(ISA, Imm);
-
-  for (unsigned i = 0; i < 3; ++i) {
-    if (Counts.Array[i] <= LastIssued.Array[i])
-      WaitOn.Array[i] = LastIssued.Array[i] - Counts.Array[i];
-    else
-      WaitOn.Array[i] = 0;
-  }
-
-  increaseCounters(DelayedWaitOn, WaitOn);
-}
-
-Counters SIInsertWaits::handleOperands(MachineInstr &MI) {
-  Counters Result = ZeroCounts;
-
-  // For each register affected by this instruction increase the result
-  // sequence.
-  //
-  // TODO: We could probably just look at explicit operands if we removed VCC /
-  // EXEC from SMRD dest reg classes.
-  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
-    MachineOperand &Op = MI.getOperand(i);
-    if (!Op.isReg() || !TRI->isInAllocatableClass(Op.getReg()))
-      continue;
-
-    const TargetRegisterClass *RC = TII->getOpRegClass(MI, i);
-    RegInterval Interval = getRegInterval(RC, Op);
-    for (unsigned j = Interval.first; j < Interval.second; ++j) {
-      if (Op.isDef()) {
-        increaseCounters(Result, UsedRegs[j]);
-        increaseCounters(Result, DefinedRegs[j]);
-      }
-
-      if (Op.isUse())
-        increaseCounters(Result, DefinedRegs[j]);
-    }
-  }
-
-  return Result;
-}
-
-void SIInsertWaits::handleSendMsg(MachineBasicBlock &MBB,
-                                  MachineBasicBlock::iterator I) {
-  if (ST->getGeneration() < SISubtarget::VOLCANIC_ISLANDS)
-    return;
-
-  // There must be "S_NOP 0" between an instruction writing M0 and S_SENDMSG.
-  if (LastInstWritesM0 && (I->getOpcode() == AMDGPU::S_SENDMSG || I->getOpcode() == AMDGPU::S_SENDMSGHALT)) {
-    BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_NOP)).addImm(0);
-    LastInstWritesM0 = false;
-    return;
-  }
-
-  // Set whether this instruction sets M0
-  LastInstWritesM0 = false;
-
-  unsigned NumOperands = I->getNumOperands();
-  for (unsigned i = 0; i < NumOperands; i++) {
-    const MachineOperand &Op = I->getOperand(i);
-
-    if (Op.isReg() && Op.isDef() && Op.getReg() == AMDGPU::M0)
-      LastInstWritesM0 = true;
-  }
-}
-
-/// Return true if \p MBB has one successor immediately following, and is its
-/// only predecessor
-static bool hasTrivialSuccessor(const MachineBasicBlock &MBB) {
-  if (MBB.succ_size() != 1)
-    return false;
-
-  const MachineBasicBlock *Succ = *MBB.succ_begin();
-  return (Succ->pred_size() == 1) && MBB.isLayoutSuccessor(Succ);
-}
-
-// FIXME: Insert waits listed in Table 4.2 "Required User-Inserted Wait States"
-// around other non-memory instructions.
-bool SIInsertWaits::runOnMachineFunction(MachineFunction &MF) {
-  bool Changes = false;
-
-  ST = &MF.getSubtarget<SISubtarget>();
-  TII = ST->getInstrInfo();
-  TRI = &TII->getRegisterInfo();
-  MRI = &MF.getRegInfo();
-  ISA = AMDGPU::IsaInfo::getIsaVersion(ST->getFeatureBits());
-  const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
-
-  HardwareLimits.Named.VM = AMDGPU::getVmcntBitMask(ISA);
-  HardwareLimits.Named.EXP = AMDGPU::getExpcntBitMask(ISA);
-  HardwareLimits.Named.LGKM = AMDGPU::getLgkmcntBitMask(ISA);
-
-  WaitedOn = ZeroCounts;
-  DelayedWaitOn = ZeroCounts;
-  LastIssued = ZeroCounts;
-  LastOpcodeType = OTHER;
-  LastInstWritesM0 = false;
-  IsFlatOutstanding = false;
-  ReturnsVoid = MFI->returnsVoid();
-
-  memset(&UsedRegs, 0, sizeof(UsedRegs));
-  memset(&DefinedRegs, 0, sizeof(DefinedRegs));
-
-  SmallVector<MachineInstr *, 4> RemoveMI;
-  SmallVector<MachineBasicBlock *, 4> EndPgmBlocks;
-
-  bool HaveScalarStores = false;
-
-  for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
-       BI != BE; ++BI) {
-
-    MachineBasicBlock &MBB = *BI;
-
-    for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
-         I != E; ++I) {
-
-      if (!HaveScalarStores && TII->isScalarStore(*I))
-        HaveScalarStores = true;
-
-      if (ST->getGeneration() <= SISubtarget::SEA_ISLANDS) {
-        // There is a hardware bug on CI/SI where SMRD instruction may corrupt
-        // vccz bit, so when we detect that an instruction may read from a
-        // corrupt vccz bit, we need to:
-        // 1. Insert s_waitcnt lgkm(0) to wait for all outstanding SMRD operations to
-        //    complete.
-        // 2. Restore the correct value of vccz by writing the current value
-        //    of vcc back to vcc.
-
-        if (TII->isSMRD(I->getOpcode())) {
-          VCCZCorrupt = true;
-        } else if (!hasOutstandingLGKM() && I->modifiesRegister(AMDGPU::VCC, TRI)) {
-          // FIXME: We only care about SMRD instructions here, not LDS or GDS.
-          // Whenever we store a value in vcc, the correct value of vccz is
-          // restored.
-          VCCZCorrupt = false;
-        }
-
-        // Check if we need to apply the bug work-around
-        if (VCCZCorrupt && readsVCCZ(*I)) {
-          DEBUG(dbgs() << "Inserting vccz bug work-around before: " << *I << '\n');
-
-          // Wait on everything, not just LGKM.  vccz reads usually come from
-          // terminators, and we always wait on everything at the end of the
-          // block, so if we only wait on LGKM here, we might end up with
-          // another s_waitcnt inserted right after this if there are non-LGKM
-          // instructions still outstanding.
-          insertWait(MBB, I, LastIssued);
-
-          // Restore the vccz bit.  Any time a value is written to vcc, the vcc
-          // bit is updated, so we can restore the bit by reading the value of
-          // vcc and then writing it back to the register.
-          BuildMI(MBB, I, I->getDebugLoc(), TII->get(AMDGPU::S_MOV_B64),
-                  AMDGPU::VCC)
-            .addReg(AMDGPU::VCC);
-        }
-      }
-
-      // Record pre-existing, explicitly requested waits
-      if (I->getOpcode() == AMDGPU::S_WAITCNT) {
-        handleExistingWait(*I);
-        RemoveMI.push_back(&*I);
-        continue;
-      }
-
-      Counters Required;
-
-      // Wait for everything before a barrier.
-      //
-      // S_SENDMSG implicitly waits for all outstanding LGKM transfers to finish,
-      // but we also want to wait for any other outstanding transfers before
-      // signalling other hardware blocks
-      if ((I->getOpcode() == AMDGPU::S_BARRIER &&
-               !ST->hasAutoWaitcntBeforeBarrier()) ||
-           I->getOpcode() == AMDGPU::S_SENDMSG ||
-           I->getOpcode() == AMDGPU::S_SENDMSGHALT)
-        Required = LastIssued;
-      else
-        Required = handleOperands(*I);
-
-      Counters Increment = getHwCounts(*I);
-
-      if (countersNonZero(Required) || countersNonZero(Increment))
-        increaseCounters(Required, DelayedWaitOn);
-
-      Changes |= insertWait(MBB, I, Required);
-
-      pushInstruction(MBB, I, Increment);
-      handleSendMsg(MBB, I);
-
-      if (I->getOpcode() == AMDGPU::S_ENDPGM ||
-          I->getOpcode() == AMDGPU::SI_RETURN_TO_EPILOG)
-        EndPgmBlocks.push_back(&MBB);
-    }
-
-    // Wait for everything at the end of the MBB. If there is only one
-    // successor, we can defer this until the uses there.
-    if (!hasTrivialSuccessor(MBB))
-      Changes |= insertWait(MBB, MBB.getFirstTerminator(), LastIssued);
-  }
-
-  if (HaveScalarStores) {
-    // If scalar writes are used, the cache must be flushed or else the next
-    // wave to reuse the same scratch memory can be clobbered.
-    //
-    // Insert s_dcache_wb at wave termination points if there were any scalar
-    // stores, and only if the cache hasn't already been flushed. This could be
-    // improved by looking across blocks for flushes in postdominating blocks
-    // from the stores but an explicitly requested flush is probably very rare.
-    for (MachineBasicBlock *MBB : EndPgmBlocks) {
-      bool SeenDCacheWB = false;
-
-      for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
-           I != E; ++I) {
-
-        if (I->getOpcode() == AMDGPU::S_DCACHE_WB)
-          SeenDCacheWB = true;
-        else if (TII->isScalarStore(*I))
-          SeenDCacheWB = false;
-
-        // FIXME: It would be better to insert this before a waitcnt if any.
-        if ((I->getOpcode() == AMDGPU::S_ENDPGM ||
-             I->getOpcode() == AMDGPU::SI_RETURN_TO_EPILOG) && !SeenDCacheWB) {
-          Changes = true;
-          BuildMI(*MBB, I, I->getDebugLoc(), TII->get(AMDGPU::S_DCACHE_WB));
-        }
-      }
-    }
-  }
-
-  for (MachineInstr *I : RemoveMI)
-    I->eraseFromParent();
-
-  if (!MFI->isEntryFunction()) {
-    // Wait for any outstanding memory operations that the input registers may
-    // depend on. We can't track them and it's better to to the wait after the
-    // costly call sequence.
-
-    // TODO: Could insert earlier and schedule more liberally with operations
-    // that only use caller preserved registers.
-    MachineBasicBlock &EntryBB = MF.front();
-    BuildMI(EntryBB, EntryBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
-      .addImm(0);
-
-    Changes = true;
-  }
-
-  return Changes;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRInstrumentFunctions.cpp b/external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRInstrumentFunctions.cpp
deleted file mode 100644
index e7fca74e1701..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRInstrumentFunctions.cpp
+++ /dev/null
@@ -1,222 +0,0 @@
-//===-- AVRInstrumentFunctions.cpp - Insert instrumentation for testing ---===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This pass takes a function and inserts calls to hook functions which are
-// told the name, arguments, and results of function calls.
-//
-// The hooks can do anything with the information given. It is possible to
-// send the data through a serial connection in order to runs tests on
-// bare metal.
-//
-//===----------------------------------------------------------------------===//
-
-#include "AVR.h"
-
-#include <llvm/IR/Function.h>
-#include <llvm/IR/Module.h>
-
-using namespace llvm;
-
-#define AVR_INSTRUMENT_FUNCTIONS_NAME "AVR function instrumentation pass"
-
-namespace {
-
-// External symbols that we emit calls to.
-namespace symbols {
-
-#define SYMBOL_PREFIX "avr_instrumentation"
-
-  const StringRef PREFIX = SYMBOL_PREFIX;
-
-  // void (i16 argCount);
-  const StringRef BEGIN_FUNCTION_SIGNATURE = SYMBOL_PREFIX "_begin_signature";
-  // void(i16 argCount);
-  const StringRef END_FUNCTION_SIGNATURE = SYMBOL_PREFIX "_end_signature";
-
-#undef SYMBOL_PREFIX
-}
-
-class AVRInstrumentFunctions : public FunctionPass {
-public:
-  static char ID;
-
-  AVRInstrumentFunctions() : FunctionPass(ID) {
-    initializeAVRInstrumentFunctionsPass(*PassRegistry::getPassRegistry());
-  }
-
-  bool runOnFunction(Function &F) override;
-
-  StringRef getPassName() const override { return AVR_INSTRUMENT_FUNCTIONS_NAME; }
-};
-
-char AVRInstrumentFunctions::ID = 0;
-
-/// Creates a pointer to a string.
-static Value *CreateStringPtr(BasicBlock &BB, StringRef Str) {
-  LLVMContext &Ctx = BB.getContext();
-  IntegerType *I8 = Type::getInt8Ty(Ctx);
-
-  Constant *ConstantStr = ConstantDataArray::getString(Ctx, Str);
-  GlobalVariable *GlobalStr = new GlobalVariable(*BB.getParent()->getParent(),
-                                                 ConstantStr->getType(),
-                                                 true, /* is a constant */
-                                                 GlobalValue::PrivateLinkage,
-                                                 ConstantStr);
-  return GetElementPtrInst::CreateInBounds(GlobalStr,
-    {ConstantInt::get(I8, 0), ConstantInt::get(I8, 0)}, "", &BB);
-}
-
-static std::string GetTypeName(Type &Ty) {
-  if (auto *IntTy = dyn_cast<IntegerType>(&Ty)) {
-    return std::string("i") + std::to_string(IntTy->getBitWidth());
-  }
-
-  if (Ty.isFloatingPointTy()) {
-    return std::string("f") + std::to_string(Ty.getPrimitiveSizeInBits());
-  }
-
-  llvm_unreachable("unknown return type");
-}
-
-/// Builds a call to one of the signature begin/end hooks.
-static void BuildSignatureCall(StringRef SymName, BasicBlock &BB, Function &F) {
-  LLVMContext &Ctx = F.getContext();
-  IntegerType *I16 = Type::getInt16Ty(Ctx);
-
-  FunctionType *FnType = FunctionType::get(Type::getVoidTy(Ctx),
-    {Type::getInt8PtrTy(Ctx), I16}, false);
-
-  Constant *Fn = F.getParent()->getOrInsertFunction(SymName, FnType);
-  Value *FunctionName = CreateStringPtr(BB, F.getName());
-
-  Value *Args[] = {FunctionName,
-                   ConstantInt::get(I16, F.arg_size())};
-  CallInst::Create(Fn, Args, "", &BB);
-}
-
-/// Builds instructions to call into an external function to
-/// notify about a function signature beginning.
-static void BuildBeginSignature(BasicBlock &BB, Function &F) {
-  return BuildSignatureCall(symbols::BEGIN_FUNCTION_SIGNATURE, BB, F);
-}
-
-/// Builds instructions to call into an external function to
-/// notify about a function signature ending.
-static void BuildEndSignature(BasicBlock &BB, Function &F) {
-  return BuildSignatureCall(symbols::END_FUNCTION_SIGNATURE, BB, F);
-}
-
-/// Get the name of the external symbol that we need to call
-/// to notify about this argument.
-static std::string GetArgumentSymbolName(Argument &Arg) {
-  return (symbols::PREFIX + "_argument_" + GetTypeName(*Arg.getType())).str();
-}
-
-/// Builds a call to one of the argument hooks.
-static void BuildArgument(BasicBlock &BB, Argument &Arg) {
-  Function &F = *Arg.getParent();
-  LLVMContext &Ctx = F.getContext();
-
-  Type *I8 = Type::getInt8Ty(Ctx);
-
-  FunctionType *FnType = FunctionType::get(Type::getVoidTy(Ctx),
-    {Type::getInt8PtrTy(Ctx), I8, Arg.getType()}, false);
-
-  Constant *Fn = F.getParent()->getOrInsertFunction(
-    GetArgumentSymbolName(Arg), FnType);
-  Value *ArgName = CreateStringPtr(BB, Arg.getName());
-
-  Value *Args[] = {ArgName, ConstantInt::get(I8, Arg.getArgNo()), &Arg};
-  CallInst::Create(Fn, Args, "", &BB);
-}
-
-/// Builds a call to all of the function signature hooks.
-static void BuildSignature(BasicBlock &BB, Function &F) {
-  BuildBeginSignature(BB, F);
-  for (Argument &Arg : F.args()) { BuildArgument(BB, Arg); }
-  BuildEndSignature(BB, F);
-}
-
-/// Builds the instrumentation entry block.
-static void BuildEntryBlock(Function &F) {
-  BasicBlock &EntryBlock = F.getEntryBlock();
-
-  // Create a new basic block at the start of the existing entry block.
-  BasicBlock *BB = BasicBlock::Create(F.getContext(),
-                                      "instrumentation_entry",
-                                      &F, &EntryBlock);
-
-  BuildSignature(*BB, F);
-
-  // Jump to the actual entry block.
-  BranchInst::Create(&EntryBlock, BB);
-}
-
-static std::string GetReturnSymbolName(Value &Val) {
-  return (symbols::PREFIX + "_result_" + GetTypeName(*Val.getType())).str();
-}
-
-static void BuildExitHook(Instruction &I) {
-  Function &F = *I.getParent()->getParent();
-  LLVMContext &Ctx = F.getContext();
-
-  if (auto *Ret = dyn_cast<ReturnInst>(&I)) {
-    Value *RetVal = Ret->getReturnValue();
-    assert(RetVal && "should only be instrumenting functions with return values");
-
-    FunctionType *FnType = FunctionType::get(Type::getVoidTy(Ctx),
-      {RetVal->getType()}, false);
-
-    Constant *Fn = F.getParent()->getOrInsertFunction(
-      GetReturnSymbolName(*RetVal), FnType);
-
-    // Call the result hook just before the return.
-    CallInst::Create(Fn, {RetVal}, "", &I);
-  }
-}
-
-/// Runs return hooks before all returns in a function.
-static void BuildExitHooks(Function &F) {
-  for (BasicBlock &BB : F) {
-    auto BBI = BB.begin(), E = BB.end();
-    while (BBI != E) {
-      auto NBBI = std::next(BBI);
-
-      BuildExitHook(*BBI);
-
-      // Modified |= expandMI(BB, MBBI);
-      BBI = NBBI;
-    }
-  }
-}
-
-static bool ShouldInstrument(Function &F) {
-  // No point reporting results if there are none.
-  return !F.getReturnType()->isVoidTy();
-}
-
-bool AVRInstrumentFunctions::runOnFunction(Function &F) {
-  if (ShouldInstrument(F)) {
-    BuildEntryBlock(F);
-    BuildExitHooks(F);
-  }
-
-  return true;
-}
-
-} // end of anonymous namespace
-
-INITIALIZE_PASS(AVRInstrumentFunctions, "avr-instrument-functions",
-                AVR_INSTRUMENT_FUNCTIONS_NAME, false, false)
-
-namespace llvm {
-
-FunctionPass *createAVRInstrumentFunctionsPass() { return new AVRInstrumentFunctions(); }
-
-} // end of namespace llvm
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonDepDecoders.h b/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonDepDecoders.h
deleted file mode 100644
index aa9787ecf0c8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonDepDecoders.h
+++ /dev/null
@@ -1,64 +0,0 @@
-//===--- HexagonDepDecoders.h ---------------------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-static DecodeStatus s4_0ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<4>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s29_3ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<14>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s8_0ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<8>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s4_3ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<7>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s31_1ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<12>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s3_0ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<3>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s30_2ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<13>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s6_0ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<6>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s6_3ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<9>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s4_1ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<5>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
-static DecodeStatus s4_2ImmDecoder(MCInst &MI, unsigned tmp,
-    uint64_t, const void *Decoder) {
-  signedDecoder<6>(MI, tmp, Decoder);
-  return MCDisassembler::Success;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td b/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td
deleted file mode 100644
index 400c17333f73..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonIntrinsicsDerived.td
+++ /dev/null
@@ -1,40 +0,0 @@
-//===-- HexagonIntrinsicsDerived.td - Derived intrinsics ---*- tablegen -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Multiply 64-bit and use lower result
-//
-// Optimized with intrinisics accumulates
-//
-def : Pat <(mul DoubleRegs:$src1, DoubleRegs:$src2),
-      (i64
-       (A2_combinew
-        (M2_maci
-         (M2_maci
-          (i32
-           (EXTRACT_SUBREG
-            (i64
-             (M2_dpmpyuu_s0 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1),
-                                          isub_lo)),
-                     (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2),
-                                          isub_lo)))),
-            isub_hi)),
-          (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), isub_lo)),
-          (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), isub_hi))),
-         (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), isub_lo)),
-         (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), isub_hi))),
-        (i32
-         (EXTRACT_SUBREG
-          (i64
-           (M2_dpmpyuu_s0 
-             (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), isub_lo)),
-                   (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2),
-                                        isub_lo)))), isub_lo))))>;
-
-
-
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/Mips/MicroMips64r6InstrFormats.td b/external/bsd/llvm/dist/llvm/lib/Target/Mips/MicroMips64r6InstrFormats.td
deleted file mode 100644
index 26062bfb2b8e..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/Mips/MicroMips64r6InstrFormats.td
+++ /dev/null
@@ -1,267 +0,0 @@
-//=-   MicroMips64r6InstrFormats.td - Instruction Formats  -*- tablegen -*  -=//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes microMIPS64r6 instruction formats.
-//
-//===----------------------------------------------------------------------===//
-
-class DAUI_FM_MMR6 {
-  bits<5> rt;
-  bits<5> rs;
-  bits<16> imm;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b111100;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-0}  = imm;
-}
-
-class POOL32I_ADD_IMM_FM_MMR6<bits<5> funct> {
-  bits<5> rs;
-  bits<16> imm;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010000;
-  let Inst{25-21} = funct;
-  let Inst{20-16} = rs;
-  let Inst{15-0} = imm;
-}
-
-class POOL32S_EXTBITS_FM_MMR6<bits<6> funct> {
-  bits<5> rt;
-  bits<5> rs;
-  bits<5> size;
-  bits<5> pos;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-11} = size;
-  let Inst{10-6}  = pos;
-  let Inst{5-0}   = funct;
-}
-
-class POOL32S_DALIGN_FM_MMR6 {
-  bits<5> rs;
-  bits<5> rt;
-  bits<5> rd;
-  bits<3> bp;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rs;
-  let Inst{20-16} = rt;
-  let Inst{15-11} = rd;
-  let Inst{10-8}  = bp;
-  let Inst{7-6}   = 0b00;
-  let Inst{5-0}   = 0b011100;
-}
-
-class POOL32A_DIVMOD_FM_MMR6<string instr_asm, bits<9> funct>
-    : MMR6Arch<instr_asm> {
-  bits<5> rt;
-  bits<5> rs;
-  bits<5> rd;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-11} = rd;
-  let Inst{10-9}  = 0b00;
-  let Inst{8-0}  = funct;
-}
-
-class POOL32S_DMFTC0_FM_MMR6<string instr_asm, bits<5> funct>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  bits<5> rt;
-  bits<5> rs;
-  bits<3> sel;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-14} = 0;
-  let Inst{13-11} = sel;
-  let Inst{10-6}  = funct;
-  let Inst{5-0}   = 0b111100;
-}
-
-class POOL32S_ARITH_FM_MMR6<string opstr, bits<9> funct>
-    : MMR6Arch<opstr> {
-  bits<5> rt;
-  bits<5> rs;
-  bits<5> rd;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-11} = rd;
-  let Inst{10-9}  = 0b00;
-  let Inst{8-0}   = funct;
-}
-
-class DADDIU_FM_MMR6<string opstr> : MMR6Arch<opstr> {
-  bits<5> rt;
-  bits<5> rs;
-  bits<16> imm16;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010111;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-0}  = imm16;
-}
-
-class PCREL18_FM_MMR6<bits<3> funct> : MipsR6Inst {
-  bits<5> rt;
-  bits<18> imm;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b011110;
-  let Inst{25-21} = rt;
-  let Inst{20-18} = funct;
-  let Inst{17-0} = imm;
-}
-
-class POOL32S_2R_FM_MMR6<string instr_asm, bits<10> funct>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  bits<5> rt;
-  bits<5> rs;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-6} = funct;
-  let Inst{5-0} = 0b111100;
-}
-
-class POOL32S_2RSA5B0_FM_MMR6<string instr_asm, bits<9> funct>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  bits<5> rt;
-  bits<5> rs;
-  bits<5> sa;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-11} = sa;
-  let Inst{10-9} = 0b00;
-  let Inst{8-0} = funct;
-}
-
-class LD_SD_32_2R_OFFSET16_FM_MMR6<string instr_asm, bits<6> op>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  bits<5> rt;
-  bits<21> addr;
-  bits<5> base = addr{20-16};
-  bits<16> offset = addr{15-0};
-
-  bits<32> Inst;
-
-  let Inst{31-26} = op;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = base;
-  let Inst{15-0}  = offset;
-}
-
-class POOL32C_2R_OFFSET12_FM_MMR6<string instr_asm, bits<4> funct>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  bits<5> rt;
-  bits<21> addr;
-  bits<5> base = addr{20-16};
-  bits<12> offset = addr{11-0};
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b011000;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = base;
-  let Inst{15-12} = funct;
-  let Inst{11-0}  = offset;
-}
-
-class POOL32S_3R_FM_MMR6<string instr_asm, bits<9> funct>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  bits<5> rt;
-  bits<5> rs;
-  bits<5> rd;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-11} = rd;
-  let Inst{10-9}  = 0b00;
-  let Inst{8-0}   = funct;
-}
-
-class POOL32S_DBITSWAP_FM_MMR6<string instr_asm> : MMR6Arch<instr_asm>,
-      MipsR6Inst {
-  bits<5> rt;
-  bits<5> rd;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rd;
-  let Inst{15-12}  = 0b0000;
-  let Inst{11-6}  = 0b101100;
-  let Inst{5-0}   = 0b111100;
-}
-
-class POOL32S_3RSA_FM_MMR6<string instr_asm> : MMR6Arch<instr_asm>,
-      MipsR6Inst {
-  bits<5> rt;
-  bits<5> rs;
-  bits<5> rd;
-  bits<2> sa;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b010110;
-  let Inst{25-21} = rt;
-  let Inst{20-16} = rs;
-  let Inst{15-11} = rd;
-  let Inst{10-9} = sa;
-  let Inst{8-6} = 0b100;
-  let Inst{5-0} = 0b000100;
-}
-
-class PCREL_1ROFFSET19_FM_MMR6<string instr_asm> : MMR6Arch<instr_asm>,
-      MipsR6Inst {
-  bits<5> rt;
-  bits<19> offset;
-
-  bits<32> Inst;
-
-  let Inst{31-26} = 0b011110;
-  let Inst{25-21} = rt;
-  let Inst{20-19} = 0b10;
-  let Inst{18-0} = offset;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/Mips/MicroMips64r6InstrInfo.td b/external/bsd/llvm/dist/llvm/lib/Target/Mips/MicroMips64r6InstrInfo.td
deleted file mode 100644
index 38b09d105ddd..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/Mips/MicroMips64r6InstrInfo.td
+++ /dev/null
@@ -1,562 +0,0 @@
-//=-  MicroMips64r6InstrInfo.td - Instruction Information  -*- tablegen -*- -=//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes MicroMips64r6 instructions.
-//
-//===----------------------------------------------------------------------===//
-
-//===----------------------------------------------------------------------===//
-//
-// Instruction Encodings
-//
-//===----------------------------------------------------------------------===//
-
-class DAUI_MMR6_ENC : DAUI_FM_MMR6;
-class DAHI_MMR6_ENC : POOL32I_ADD_IMM_FM_MMR6<0b10001>;
-class DATI_MMR6_ENC : POOL32I_ADD_IMM_FM_MMR6<0b10000>;
-class DEXT_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b101100>;
-class DEXTM_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b100100>;
-class DEXTU_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b010100>;
-class DALIGN_MMR6_ENC : POOL32S_DALIGN_FM_MMR6;
-class DDIV_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"ddiv", 0b100011000>;
-class DMOD_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"dmod", 0b101011000>;
-class DDIVU_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"ddivu", 0b110011000>;
-class DMODU_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"dmodu", 0b111011000>;
-class DINSU_MM64R6_ENC : POOL32S_EXTBITS_FM_MMR6<0b110100>;
-class DINSM_MM64R6_ENC : POOL32S_EXTBITS_FM_MMR6<0b000100>;
-class DINS_MM64R6_ENC : POOL32S_EXTBITS_FM_MMR6<0b001100>;
-class DMTC0_MM64R6_ENC : POOL32S_DMFTC0_FM_MMR6<"dmtc0", 0b01011>;
-class DMTC1_MM64R6_ENC : POOL32F_MFTC1_FM_MMR6<"dmtc1", 0b10110000>;
-class DMTC2_MM64R6_ENC : POOL32A_MFTC2_FM_MMR6<"dmtc2", 0b0111110100>;
-class DMFC0_MM64R6_ENC : POOL32S_DMFTC0_FM_MMR6<"dmfc0", 0b00011>;
-class DMFC1_MM64R6_ENC : POOL32F_MFTC1_FM_MMR6<"dmfc1", 0b10010000>;
-class DMFC2_MM64R6_ENC : POOL32A_MFTC2_FM_MMR6<"dmfc2", 0b0110110100>;
-class DADD_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dadd", 0b100010000>;
-class DADDIU_MM64R6_ENC : DADDIU_FM_MMR6<"daddiu">;
-class DADDU_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"daddu", 0b101010000>;
-class LDPC_MMR646_ENC : PCREL18_FM_MMR6<0b110>;
-class DSUB_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dsub", 0b110010000>;
-class DSUBU_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dsubu", 0b111010000>;
-class DMUL_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dmul", 0b000011000>;
-class DMUH_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dmuh", 0b001011000>;
-class DMULU_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dmulu", 0b010011000>;
-class DMUHU_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dmuhu", 0b011011000>;
-class DSBH_MM64R6_ENC : POOL32S_2R_FM_MMR6<"dsbh", 0b0111101100>;
-class DSHD_MM64R6_ENC : POOL32S_2R_FM_MMR6<"dshd", 0b1111101100>;
-class DSLL_MM64R6_ENC : POOL32S_2RSA5B0_FM_MMR6<"dsll", 0b000000000>;
-class DSLL32_MM64R6_ENC : POOL32S_2RSA5B0_FM_MMR6<"dsll32", 0b000001000>;
-class DSLLV_MM64R6_ENC : POOL32S_3R_FM_MMR6<"dsllv", 0b000010000>;
-class DSRAV_MM64R6_ENC : POOL32S_3R_FM_MMR6<"dsrav", 0b010010000>;
-class DSRA_MM64R6_ENC : POOL32S_2RSA5B0_FM_MMR6<"dsra", 0b010000000>;
-class DSRA32_MM64R6_ENC : POOL32S_2RSA5B0_FM_MMR6<"dsra32", 0b010000100>;
-class DCLO_MM64R6_ENC : POOL32S_2R_FM_MMR6<"dclo", 0b0100101100>;
-class DCLZ_MM64R6_ENC : POOL32S_2R_FM_MMR6<"dclz", 0b0101101100>;
-class DROTR_MM64R6_ENC : POOL32S_2RSA5B0_FM_MMR6<"drotr", 0b011000000>;
-class DROTR32_MM64R6_ENC : POOL32S_2RSA5B0_FM_MMR6<"drotr32", 0b011001000>;
-class DROTRV_MM64R6_ENC : POOL32S_3R_FM_MMR6<"drotrv", 0b011010000>;
-class LD_MM64R6_ENC : LD_SD_32_2R_OFFSET16_FM_MMR6<"ld", 0b110111>;
-class LLD_MM64R6_ENC : POOL32C_2R_OFFSET12_FM_MMR6<"lld", 0b0111>;
-class LWU_MM64R6_ENC : POOL32C_2R_OFFSET12_FM_MMR6<"lwu", 0b1110>;
-class SD_MM64R6_ENC : LD_SD_32_2R_OFFSET16_FM_MMR6<"sd", 0b110110>;
-class DSRL_MM64R6_ENC : POOL32S_2RSA5B0_FM_MMR6<"dsrl", 0b001000000>;
-class DSRL32_MM64R6_ENC : POOL32S_2RSA5B0_FM_MMR6<"dsrl32", 0b001001000>;
-class DSRLV_MM64R6_ENC : POOL32S_3R_FM_MMR6<"dsrlv", 0b001010000>;
-class DBITSWAP_MM64R6_ENC : POOL32S_DBITSWAP_FM_MMR6<"dbitswap">;
-class DLSA_MM64R6_ENC : POOL32S_3RSA_FM_MMR6<"dlsa">;
-class LWUPC_MM64R6_ENC : PCREL_1ROFFSET19_FM_MMR6<"lwupc">;
-
-//===----------------------------------------------------------------------===//
-//
-// Instruction Descriptions
-//
-//===----------------------------------------------------------------------===//
-
-class DAUI_MMR6_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
-                          InstrItinClass Itin>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  dag OutOperandList = (outs GPROpnd:$rt);
-  dag InOperandList = (ins GPROpnd:$rs, uimm16:$imm);
-  string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $imm");
-  list<dag> Pattern = [];
-  InstrItinClass Itinerary = Itin;
-}
-class DAUI_MMR6_DESC : DAUI_MMR6_DESC_BASE<"daui", GPR64Opnd, II_DAUI>;
-
-class DAHI_DATI_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
-                          InstrItinClass Itin>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  dag OutOperandList = (outs GPROpnd:$rs);
-  dag InOperandList = (ins GPROpnd:$rt, uimm16:$imm);
-  string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $imm");
-  string Constraints = "$rs = $rt";
-  InstrItinClass Itinerary = Itin;
-}
-class DAHI_MMR6_DESC : DAHI_DATI_DESC_BASE<"dahi", GPR64Opnd, II_DAHI>;
-class DATI_MMR6_DESC : DAHI_DATI_DESC_BASE<"dati", GPR64Opnd, II_DATI>;
-
-class EXTBITS_DESC_BASE<string instr_asm, RegisterOperand RO, Operand PosOpnd,
-                        Operand SizeOpnd, SDPatternOperator Op = null_frag>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  dag OutOperandList = (outs RO:$rt);
-  dag InOperandList = (ins RO:$rs, PosOpnd:$pos, SizeOpnd:$size);
-  string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $pos, $size");
-  list<dag> Pattern = [(set RO:$rt, (Op RO:$rs, imm:$pos, imm:$size))];
-  InstrItinClass Itinerary = II_EXT;
-  Format Form = FrmR;
-  string BaseOpcode = instr_asm;
-}
-// TODO: Add 'pos + size' constraint check to dext* instructions
-//       DEXT: 0 < pos + size <= 63
-//       DEXTM, DEXTU: 32 < pos + size <= 64
-class DEXT_MMR6_DESC : EXTBITS_DESC_BASE<"dext", GPR64Opnd, uimm5_report_uimm6,
-                                         uimm5_plus1, MipsExt>;
-class DEXTM_MMR6_DESC : EXTBITS_DESC_BASE<"dextm", GPR64Opnd, uimm5,
-                                          uimm5_plus33, MipsExt>;
-class DEXTU_MMR6_DESC : EXTBITS_DESC_BASE<"dextu", GPR64Opnd, uimm5_plus32,
-                                          uimm5_plus1, MipsExt>;
-
-class DALIGN_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
-                      Operand ImmOpnd, InstrItinClass itin>
-    : MMR6Arch<instr_asm>, MipsR6Inst {
-  dag OutOperandList = (outs GPROpnd:$rd);
-  dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
-  string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $bp");
-  list<dag> Pattern = [];
-  InstrItinClass Itinerary = itin;
-}
-
-class DALIGN_MMR6_DESC : DALIGN_DESC_BASE<"dalign", GPR64Opnd, uimm3,
-                                          II_DALIGN>;
-
-class DDIV_MM64R6_DESC : DIVMOD_MMR6_DESC_BASE<"ddiv", GPR64Opnd, II_DDIV,
-                                               sdiv>;
-class DMOD_MM64R6_DESC : DIVMOD_MMR6_DESC_BASE<"dmod", GPR64Opnd, II_DMOD,
-                                               srem>;
-class DDIVU_MM64R6_DESC : DIVMOD_MMR6_DESC_BASE<"ddivu", GPR64Opnd, II_DDIVU,
-                                                udiv>;
-class DMODU_MM64R6_DESC : DIVMOD_MMR6_DESC_BASE<"dmodu", GPR64Opnd, II_DMODU,
-                                                urem>;
-
-class DCLO_MM64R6_DESC {
-  dag OutOperandList = (outs GPR64Opnd:$rt);
-  dag InOperandList = (ins GPR64Opnd:$rs);
-  string AsmString = !strconcat("dclo", "\t$rt, $rs");
-  list<dag> Pattern = [(set GPR64Opnd:$rt, (ctlz (not GPR64Opnd:$rs)))];
-  InstrItinClass Itinerary = II_DCLO;
-  Format Form = FrmR;
-  string BaseOpcode = "dclo";
-}
-
-class DCLZ_MM64R6_DESC {
-  dag OutOperandList = (outs GPR64Opnd:$rt);
-  dag InOperandList = (ins GPR64Opnd:$rs);
-  string AsmString = !strconcat("dclz", "\t$rt, $rs");
-  list<dag> Pattern = [(set GPR64Opnd:$rt, (ctlz GPR64Opnd:$rs))];
-  InstrItinClass Itinerary = II_DCLZ;
-  Format Form = FrmR;
-  string BaseOpcode = "dclz";
-}
-
-class DINSU_MM64R6_DESC : InsBase<"dinsu", GPR64Opnd, uimm5_plus32,
-                                  uimm5_inssize_plus1, MipsIns>;
-class DINSM_MM64R6_DESC : InsBase<"dinsm", GPR64Opnd, uimm5, uimm_range_2_64>;
-class DINS_MM64R6_DESC : InsBase<"dins", GPR64Opnd, uimm5, uimm5_inssize_plus1,
-                                 MipsIns>;
-class DMTC0_MM64R6_DESC : MTC0_MMR6_DESC_BASE<"dmtc0", COP0Opnd, GPR64Opnd,
-                                              II_DMTC0>;
-class DMTC1_MM64R6_DESC : MTC1_MMR6_DESC_BASE<"dmtc1", FGR64Opnd, GPR64Opnd,
-                                              II_DMTC1, bitconvert>;
-class DMTC2_MM64R6_DESC : MTC2_MMR6_DESC_BASE<"dmtc2", COP2Opnd, GPR64Opnd,
-                                              II_DMTC2>;
-class DMFC0_MM64R6_DESC : MFC0_MMR6_DESC_BASE<"dmfc0", GPR64Opnd, COP0Opnd,
-                                              II_DMFC0>;
-class DMFC1_MM64R6_DESC : MFC1_MMR6_DESC_BASE<"dmfc1", GPR64Opnd, FGR64Opnd,
-                                              II_DMFC1, bitconvert>;
-class DMFC2_MM64R6_DESC : MFC2_MMR6_DESC_BASE<"dmfc2", GPR64Opnd, COP2Opnd,
-                                              II_DMFC2>;
-class DADD_MM64R6_DESC : ArithLogicR<"dadd", GPR64Opnd, 1, II_DADD>;
-class DADDIU_MM64R6_DESC : ArithLogicI<"daddiu", simm16_64, GPR64Opnd,
-                                       II_DADDIU, immSExt16, add>,
-                           IsAsCheapAsAMove;
-class DADDU_MM64R6_DESC : ArithLogicR<"daddu", GPR64Opnd, 1, II_DADDU, add>;
-
-class DSUB_DESC_BASE<string instr_asm, RegisterOperand RO,
-                     InstrItinClass Itin = NoItinerary,
-                     SDPatternOperator OpNode = null_frag>
-                     : MipsR6Inst {
-  dag OutOperandList = (outs RO:$rd);
-  dag InOperandList = (ins RO:$rs, RO:$rt);
-  string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt");
-  list<dag> Pattern = [(set RO:$rd, (OpNode RO:$rs, RO:$rt))];
-  InstrItinClass Itinerary = Itin;
-  Format Form = FrmR;
-  string BaseOpcode = instr_asm;
-  let isCommutable = 0;
-  let isReMaterializable = 1;
-  let TwoOperandAliasConstraint = "$rd = $rs";
-}
-class DSUB_MM64R6_DESC : DSUB_DESC_BASE<"dsub", GPR64Opnd, II_DSUB>;
-class DSUBU_MM64R6_DESC : DSUB_DESC_BASE<"dsubu", GPR64Opnd, II_DSUBU, sub>;
-
-class LDPC_MM64R6_DESC : PCREL_MMR6_DESC_BASE<"ldpc", GPR64Opnd, simm18_lsl3,
-                                              II_LDPC>;
-
-class MUL_MM64R6_DESC_BASE<string opstr, RegisterOperand GPROpnd,
-                           InstrItinClass Itin = NoItinerary,
-                           SDPatternOperator Op = null_frag> : MipsR6Inst {
-  dag OutOperandList = (outs GPROpnd:$rd);
-  dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt);
-  string AsmString = !strconcat(opstr, "\t$rd, $rs, $rt");
-  InstrItinClass Itinerary = Itin;
-  list<dag> Pattern = [(set GPROpnd:$rd, (Op GPROpnd:$rs, GPROpnd:$rt))];
-}
-
-class DMUL_MM64R6_DESC : MUL_MM64R6_DESC_BASE<"dmul", GPR64Opnd, II_DMUL, mul>;
-class DMUH_MM64R6_DESC : MUL_MM64R6_DESC_BASE<"dmuh", GPR64Opnd, II_DMUH,
-                                              mulhs>;
-class DMULU_MM64R6_DESC : MUL_MM64R6_DESC_BASE<"dmulu", GPR64Opnd, II_DMULU>;
-class DMUHU_MM64R6_DESC : MUL_MM64R6_DESC_BASE<"dmuhu", GPR64Opnd, II_DMUHU,
-                                               mulhu>;
-
-class DSBH_DSHD_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
-                          InstrItinClass Itin> {
-  dag OutOperandList = (outs GPROpnd:$rt);
-  dag InOperandList = (ins GPROpnd:$rs);
-  string AsmString = !strconcat(instr_asm, "\t$rt, $rs");
-  bit hasSideEffects = 0;
-  list<dag> Pattern = [];
-  InstrItinClass Itinerary = Itin;
-  Format Form = FrmR;
-  string BaseOpcode = instr_asm;
-}
-
-class DSBH_MM64R6_DESC : DSBH_DSHD_DESC_BASE<"dsbh", GPR64Opnd, II_DSBH>;
-class DSHD_MM64R6_DESC : DSBH_DSHD_DESC_BASE<"dshd", GPR64Opnd, II_DSHD>;
-
-class SHIFT_ROTATE_IMM_MM64R6<string instr_asm, Operand ImmOpnd,
-                              InstrItinClass itin,
-                              SDPatternOperator OpNode = null_frag,
-                              SDPatternOperator PO = null_frag> {
-  dag OutOperandList = (outs GPR64Opnd:$rt);
-  dag InOperandList = (ins GPR64Opnd:$rs, ImmOpnd:$sa);
-  string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $sa");
-  list<dag> Pattern = [(set GPR64Opnd:$rt, (OpNode GPR64Opnd:$rs, PO:$sa))];
-  InstrItinClass Itinerary = itin;
-  Format Form = FrmR;
-  string TwoOperandAliasConstraint = "$rs = $rt";
-  string BaseOpcode = instr_asm;
-}
-
-class SHIFT_ROTATE_REG_MM64R6<string instr_asm, InstrItinClass itin,
-                              SDPatternOperator OpNode = null_frag> {
-  dag OutOperandList = (outs GPR64Opnd:$rd);
-  dag InOperandList = (ins GPR64Opnd:$rt, GPR32Opnd:$rs);
-  string AsmString = !strconcat(instr_asm, "\t$rd, $rt, $rs");
-  list<dag> Pattern = [(set GPR64Opnd:$rd,
-                       (OpNode GPR64Opnd:$rt, GPR32Opnd:$rs))];
-  InstrItinClass Itinerary = itin;
-  Format Form = FrmR;
-  string BaseOpcode = instr_asm;
-}
-
-class DSLL_MM64R6_DESC : SHIFT_ROTATE_IMM_MM64R6<"dsll", uimm6, II_DSLL, shl,
-                                                 immZExt6>;
-class DSLL32_MM64R6_DESC : SHIFT_ROTATE_IMM_MM64R6<"dsll32", uimm5, II_DSLL32>;
-class DSLLV_MM64R6_DESC : SHIFT_ROTATE_REG_MM64R6<"dsllv", II_DSLLV, shl>;
-class DSRAV_MM64R6_DESC : SHIFT_ROTATE_REG_MM64R6<"dsrav", II_DSRAV, sra>;
-class DSRA_MM64R6_DESC : SHIFT_ROTATE_IMM_MM64R6<"dsra", uimm6, II_DSRA, sra,
-                                                 immZExt6>;
-class DSRA32_MM64R6_DESC : SHIFT_ROTATE_IMM_MM64R6<"dsra32", uimm5, II_DSRA32>;
-class DROTR_MM64R6_DESC : SHIFT_ROTATE_IMM_MM64R6<"drotr", uimm6, II_DROTR,
-                                                  rotr, immZExt6>;
-class DROTR32_MM64R6_DESC : SHIFT_ROTATE_IMM_MM64R6<"drotr32", uimm5,
-                                                    II_DROTR32>;
-class DROTRV_MM64R6_DESC : SHIFT_ROTATE_REG_MM64R6<"drotrv", II_DROTRV, rotr>;
-class DSRL_MM64R6_DESC : SHIFT_ROTATE_IMM_MM64R6<"dsrl", uimm6, II_DSRL, srl,
-                                                 immZExt6>;
-class DSRL32_MM64R6_DESC : SHIFT_ROTATE_IMM_MM64R6<"dsrl32", uimm5, II_DSRL32>;
-class DSRLV_MM64R6_DESC : SHIFT_ROTATE_REG_MM64R6<"dsrlv", II_DSRLV, srl>;
-
-class Load_MM64R6<string instr_asm, Operand MemOpnd, InstrItinClass itin,
-                  SDPatternOperator OpNode = null_frag> {
-  dag OutOperandList = (outs GPR64Opnd:$rt);
-  dag InOperandList = (ins MemOpnd:$addr);
-  string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
-  list<dag> Pattern = [(set GPR64Opnd:$rt, (OpNode addr:$addr))];
-  InstrItinClass Itinerary = itin;
-  Format Form = FrmI;
-  bit mayLoad = 1;
-  bit canFoldAsLoad = 1;
-  string BaseOpcode = instr_asm;
-}
-
-class LD_MM64R6_DESC : Load_MM64R6<"ld", mem_simm16, II_LD, load> {
-  string DecoderMethod = "DecodeMemMMImm16";
-}
-class LWU_MM64R6_DESC : Load_MM64R6<"lwu", mem_simm12, II_LWU, zextloadi32>{
-  string DecoderMethod = "DecodeMemMMImm12";
-}
-
-class LLD_MM64R6_DESC {
-  dag OutOperandList = (outs GPR64Opnd:$rt);
-  dag InOperandList = (ins mem_simm12:$addr);
-  string AsmString = "lld\t$rt, $addr";
-  list<dag> Pattern = [];
-  bit mayLoad = 1;
-  InstrItinClass Itinerary = II_LLD;
-  string BaseOpcode = "lld";
-  string DecoderMethod = "DecodeMemMMImm12";
-}
-
-class SD_MM64R6_DESC {
-  dag OutOperandList = (outs);
-  dag InOperandList = (ins GPR64Opnd:$rt, mem_simm16:$addr);
-  string AsmString = "sd\t$rt, $addr";
-  list<dag> Pattern = [(store GPR64Opnd:$rt, addr:$addr)];
-  InstrItinClass Itinerary = II_SD;
-  Format Form = FrmI;
-  bit mayStore = 1;
-  string BaseOpcode = "sd";
-  string DecoderMethod = "DecodeMemMMImm16";
-}
-
-class DBITSWAP_MM64R6_DESC {
-  dag OutOperandList = (outs GPR64Opnd:$rd);
-  dag InOperandList = (ins GPR64Opnd:$rt);
-  string AsmString = !strconcat("dbitswap", "\t$rd, $rt");
-  list<dag> Pattern = [];
-  InstrItinClass Itinerary = II_DBITSWAP;
-}
-
-class DLSA_MM64R6_DESC {
-  dag OutOperandList = (outs GPR64Opnd:$rd);
-  dag InOperandList = (ins GPR64Opnd:$rt, GPR64Opnd:$rs, uimm2_plus1:$sa);
-  string AsmString = "dlsa\t$rt, $rs, $rd, $sa";
-  list<dag> Pattern = [];
-  InstrItinClass Itinerary = II_DLSA;
-}
-
-class LWUPC_MM64R6_DESC {
-  dag OutOperandList = (outs GPR64Opnd:$rt);
-  dag InOperandList = (ins simm19_lsl2:$offset);
-  string AsmString = "lwupc\t$rt, $offset";
-  list<dag> Pattern = [];
-  InstrItinClass Itinerary = II_LWUPC;
-  bit mayLoad = 1;
-  bit IsPCRelativeLoad = 1;
-}
-
-//===----------------------------------------------------------------------===//
-//
-// Instruction Definitions
-//
-//===----------------------------------------------------------------------===//
-
-let DecoderNamespace = "MicroMipsR6" in {
-  def DAUI_MM64R6 : StdMMR6Rel, DAUI_MMR6_DESC, DAUI_MMR6_ENC, ISA_MICROMIPS64R6;
-  let DecoderMethod = "DecodeDAHIDATIMMR6" in {
-    def DAHI_MM64R6 : StdMMR6Rel, DAHI_MMR6_DESC, DAHI_MMR6_ENC, ISA_MICROMIPS64R6;
-    def DATI_MM64R6 : StdMMR6Rel, DATI_MMR6_DESC, DATI_MMR6_ENC, ISA_MICROMIPS64R6;
-  }
-  def DEXT_MM64R6 : StdMMR6Rel, DEXT_MMR6_DESC, DEXT_MMR6_ENC,
-                    ISA_MICROMIPS64R6;
-  def DEXTM_MM64R6 : StdMMR6Rel, DEXTM_MMR6_DESC, DEXTM_MMR6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DEXTU_MM64R6 : StdMMR6Rel, DEXTU_MMR6_DESC, DEXTU_MMR6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DALIGN_MM64R6 : StdMMR6Rel, DALIGN_MMR6_DESC, DALIGN_MMR6_ENC,
-                      ISA_MICROMIPS64R6;
-  def DDIV_MM64R6 : R6MMR6Rel, DDIV_MM64R6_DESC, DDIV_MM64R6_ENC,
-                    ISA_MICROMIPS64R6;
-  def DMOD_MM64R6 : R6MMR6Rel, DMOD_MM64R6_DESC, DMOD_MM64R6_ENC,
-                    ISA_MICROMIPS64R6;
-  def DDIVU_MM64R6 : R6MMR6Rel, DDIVU_MM64R6_DESC, DDIVU_MM64R6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DMODU_MM64R6 : R6MMR6Rel, DMODU_MM64R6_DESC, DMODU_MM64R6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DINSU_MM64R6: R6MMR6Rel, DINSU_MM64R6_DESC, DINSU_MM64R6_ENC,
-                    ISA_MICROMIPS64R6;
-  def DINSM_MM64R6: R6MMR6Rel, DINSM_MM64R6_DESC, DINSM_MM64R6_ENC,
-                    ISA_MICROMIPS64R6;
-  def DINS_MM64R6: R6MMR6Rel, DINS_MM64R6_DESC, DINS_MM64R6_ENC,
-                   ISA_MICROMIPS64R6;
-  def DMTC0_MM64R6 : StdMMR6Rel, DMTC0_MM64R6_ENC, DMTC0_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-  def DMTC1_MM64R6 : StdMMR6Rel, DMTC1_MM64R6_DESC, DMTC1_MM64R6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DMTC2_MM64R6 : StdMMR6Rel, DMTC2_MM64R6_ENC, DMTC2_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-  def DMFC0_MM64R6 : StdMMR6Rel, DMFC0_MM64R6_ENC, DMFC0_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-  def DMFC1_MM64R6 : StdMMR6Rel, DMFC1_MM64R6_DESC, DMFC1_MM64R6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DMFC2_MM64R6 : StdMMR6Rel, DMFC2_MM64R6_ENC, DMFC2_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-  def DADD_MM64R6: StdMMR6Rel, DADD_MM64R6_DESC, DADD_MM64R6_ENC,
-                   ISA_MICROMIPS64R6;
-  def DADDIU_MM64R6: StdMMR6Rel, DADDIU_MM64R6_DESC, DADDIU_MM64R6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DADDU_MM64R6: StdMMR6Rel, DADDU_MM64R6_DESC, DADDU_MM64R6_ENC,
-                    ISA_MICROMIPS64R6;
-  def LDPC_MM64R6 :  R6MMR6Rel, LDPC_MMR646_ENC, LDPC_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-  def DSUB_MM64R6 : StdMMR6Rel, DSUB_MM64R6_DESC, DSUB_MM64R6_ENC,
-                    ISA_MICROMIPS64R6;
-  def DSUBU_MM64R6 : StdMMR6Rel, DSUBU_MM64R6_DESC, DSUBU_MM64R6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DMUL_MM64R6 : R6MMR6Rel, DMUL_MM64R6_DESC, DMUL_MM64R6_ENC,
-                    ISA_MICROMIPS64R6;
-  def DMUH_MM64R6 : R6MMR6Rel, DMUH_MM64R6_DESC, DMUH_MM64R6_ENC,
-                    ISA_MICROMIPS64R6;
-  def DMULU_MM64R6 : R6MMR6Rel, DMULU_MM64R6_DESC, DMULU_MM64R6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DMUHU_MM64R6 : R6MMR6Rel, DMUHU_MM64R6_DESC, DMUHU_MM64R6_ENC,
-                     ISA_MICROMIPS64R6;
-  def DSBH_MM64R6 : R6MMR6Rel, DSBH_MM64R6_ENC, DSBH_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DSHD_MM64R6 : R6MMR6Rel, DSHD_MM64R6_ENC, DSHD_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DSLL_MM64R6 : StdMMR6Rel, DSLL_MM64R6_ENC, DSLL_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DSLL32_MM64R6 : StdMMR6Rel, DSLL32_MM64R6_ENC, DSLL32_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DSLLV_MM64R6 : StdMMR6Rel, DSLLV_MM64R6_ENC, DSLLV_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-  def DSRAV_MM64R6 : StdMMR6Rel, DSRAV_MM64R6_ENC, DSRAV_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DSRA_MM64R6 : StdMMR6Rel, DSRA_MM64R6_ENC, DSRA_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DSRA32_MM64R6 : StdMMR6Rel, DSRA32_MM64R6_ENC, DSRA32_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DCLO_MM64R6 : StdMMR6Rel, R6MMR6Rel, DCLO_MM64R6_ENC, DCLO_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DCLZ_MM64R6 : StdMMR6Rel, R6MMR6Rel, DCLZ_MM64R6_ENC, DCLZ_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DROTR_MM64R6 : StdMMR6Rel, DROTR_MM64R6_ENC, DROTR_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-  def DROTR32_MM64R6 : StdMMR6Rel, DROTR32_MM64R6_ENC, DROTR32_MM64R6_DESC,
-                       ISA_MICROMIPS64R6;
-  def DROTRV_MM64R6 : StdMMR6Rel, DROTRV_MM64R6_ENC, DROTRV_MM64R6_DESC,
-                      ISA_MICROMIPS64R6;
-  def LD_MM64R6 : StdMMR6Rel, LD_MM64R6_ENC, LD_MM64R6_DESC,
-                  ISA_MICROMIPS64R6;
-  def LLD_MM64R6 : StdMMR6Rel, R6MMR6Rel, LLD_MM64R6_ENC, LLD_MM64R6_DESC,
-                   ISA_MICROMIPS64R6;
-  def LWU_MM64R6 : StdMMR6Rel, LWU_MM64R6_ENC, LWU_MM64R6_DESC,
-                   ISA_MICROMIPS64R6;
-  def SD_MM64R6 : StdMMR6Rel, SD_MM64R6_ENC, SD_MM64R6_DESC,
-                  ISA_MICROMIPS64R6;
-  def DSRL_MM64R6 : StdMMR6Rel, DSRL_MM64R6_ENC, DSRL_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def DSRL32_MM64R6 : StdMMR6Rel, DSRL32_MM64R6_ENC, DSRL32_MM64R6_DESC,
-                      ISA_MICROMIPS64R6;
-  def DSRLV_MM64R6 : StdMMR6Rel, DSRLV_MM64R6_ENC, DSRLV_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-  def DBITSWAP_MM64R6 : R6MMR6Rel, DBITSWAP_MM64R6_ENC, DBITSWAP_MM64R6_DESC,
-                        ISA_MICROMIPS64R6;
-  def DLSA_MM64R6 : R6MMR6Rel, DLSA_MM64R6_ENC, DLSA_MM64R6_DESC,
-                    ISA_MICROMIPS64R6;
-  def LWUPC_MM64R6 : R6MMR6Rel, LWUPC_MM64R6_ENC, LWUPC_MM64R6_DESC,
-                     ISA_MICROMIPS64R6;
-}
-
-let AdditionalPredicates = [InMicroMips] in
-defm : MaterializeImms<i64, ZERO_64, DADDIU_MM64R6, LUi64, ORi64>;
-
-//===----------------------------------------------------------------------===//
-//
-// Arbitrary patterns that map to one or more instructions
-//
-//===----------------------------------------------------------------------===//
-
-defm : MipsHiLoRelocs<LUi64, DADDIU_MM64R6, ZERO_64, GPR64Opnd>, SYM_32,
-                      ISA_MICROMIPS64R6;
-
-defm : MipsHighestHigherHiLoRelocs<LUi64, DADDIU_MM64R6>, SYM_64,
-                                   ISA_MICROMIPS64R6;
-
-def : MipsPat<(addc GPR64:$lhs, GPR64:$rhs),
-              (DADDU_MM64R6 GPR64:$lhs, GPR64:$rhs)>, ISA_MICROMIPS64R6;
-def : MipsPat<(addc GPR64:$lhs, immSExt16:$imm),
-              (DADDIU_MM64R6 GPR64:$lhs, imm:$imm)>, ISA_MICROMIPS64R6;
-
-
-def : MipsPat<(rotr GPR64:$rt, (i32 (trunc GPR64:$rs))),
-              (DROTRV_MM64R6 GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>,
-              ISA_MICROMIPS64R6;
-
-
-def : WrapperPat<tglobaladdr, DADDIU_MM64R6, GPR64>, ISA_MICROMIPS64R6;
-def : WrapperPat<tconstpool, DADDIU_MM64R6, GPR64>, ISA_MICROMIPS64R6;
-def : WrapperPat<texternalsym, DADDIU_MM64R6, GPR64>, ISA_MICROMIPS64R6;
-def : WrapperPat<tblockaddress, DADDIU_MM64R6, GPR64>, ISA_MICROMIPS64R6;
-def : WrapperPat<tjumptable, DADDIU_MM64R6, GPR64>, ISA_MICROMIPS64R6;
-def : WrapperPat<tglobaltlsaddr, DADDIU_MM64R6, GPR64>, ISA_MICROMIPS64R6;
-
-// Carry pattern
-def : MipsPat<(subc GPR64:$lhs, GPR64:$rhs),
-              (DSUBU_MM64R6 GPR64:$lhs, GPR64:$rhs)>, ISA_MICROMIPS64R6;
-
-def : MipsPat<(atomic_load_64 addr:$a), (LD_MM64R6 addr:$a)>, ISA_MICROMIPS64R6;
-
-//===----------------------------------------------------------------------===//
-//
-// Instruction aliases
-//
-//===----------------------------------------------------------------------===//
-
-def : MipsInstAlias<"dmtc0 $rt, $rd",
-                    (DMTC0_MM64R6 COP0Opnd:$rd, GPR64Opnd:$rt, 0), 0>;
-def : MipsInstAlias<"dmfc0 $rt, $rd",
-                    (DMFC0_MM64R6 GPR64Opnd:$rt, COP0Opnd:$rd, 0), 0>,
-                    ISA_MICROMIPS64R6;
-def : MipsInstAlias<"daddu $rs, $rt, $imm",
-                    (DADDIU_MM64R6 GPR64Opnd:$rs,
-                                   GPR64Opnd:$rt,
-                                   simm16_64:$imm),
-                    0>, ISA_MICROMIPS64R6;
-def : MipsInstAlias<"daddu $rs, $imm",
-                    (DADDIU_MM64R6 GPR64Opnd:$rs,
-                                   GPR64Opnd:$rs,
-                                   simm16_64:$imm),
-                    0>, ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dsubu $rt, $rs, $imm",
-                    (DADDIU_MM64R6 GPR64Opnd:$rt,
-                                   GPR64Opnd:$rs,
-                                   InvertedImOperand64:$imm),
-                    0>, ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dsubu $rs, $imm",
-                    (DADDIU_MM64R6 GPR64Opnd:$rs,
-                                   GPR64Opnd:$rs,
-                                   InvertedImOperand64:$imm),
-                    0>, ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dneg $rt, $rs",
-                    (DSUB_MM64R6 GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs), 1>,
-                    ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dneg $rt",
-                    (DSUB_MM64R6 GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt), 1>,
-                    ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dnegu $rt, $rs",
-                    (DSUBU_MM64R6 GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs), 1>,
-                    ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dnegu $rt",
-                    (DSUBU_MM64R6 GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt), 1>,
-                    ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dsll $rd, $rt, $rs",
-                    (DSLLV_MM64R6 GPR64Opnd:$rd, GPR64Opnd:$rt,
-                                  GPR32Opnd:$rs), 0>, ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dsrl $rd, $rt, $rs",
-                    (DSRLV_MM64R6 GPR64Opnd:$rd, GPR64Opnd:$rt,
-                                  GPR32Opnd:$rs), 0>, ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dsrl $rd, $rt",
-                    (DSRLV_MM64R6 GPR64Opnd:$rd, GPR64Opnd:$rd,
-                                  GPR32Opnd:$rt), 0>, ISA_MICROMIPS64R6;
-def : MipsInstAlias<"dsll $rd, $rt",
-                    (DSLLV_MM64R6 GPR64Opnd:$rd, GPR64Opnd:$rd,
-                                  GPR32Opnd:$rt), 0>, ISA_MICROMIPS64R6;
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsHazardSchedule.cpp b/external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
deleted file mode 100644
index f6fcf6ec9385..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
+++ /dev/null
@@ -1,163 +0,0 @@
-//===-- MipsHazardSchedule.cpp - Workaround pipeline hazards --------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-/// \file
-/// This pass is used to workaround certain pipeline hazards. For now, this
-/// covers compact branch hazards. In future this pass can be extended to other
-/// pipeline hazards, such as various MIPS1 hazards, processor errata that
-/// require instruction reorganization, etc.
-///
-/// This pass has to run after the delay slot filler as that pass can introduce
-/// pipeline hazards, hence the existing hazard recognizer is not suitable.
-///
-/// Hazards handled: forbidden slots for MIPSR6.
-///
-/// A forbidden slot hazard occurs when a compact branch instruction is executed
-/// and the adjacent instruction in memory is a control transfer instruction
-/// such as a branch or jump, ERET, ERETNC, DERET, WAIT and PAUSE.
-///
-/// For example:
-///
-/// 0x8004      bnec    a1,v0,<P+0x18>
-/// 0x8008      beqc    a1,a2,<P+0x54>
-///
-/// In such cases, the processor is required to signal a Reserved Instruction
-/// exception.
-///
-/// Here, if the instruction at 0x8004 is executed, the processor will raise an
-/// exception as there is a control transfer instruction at 0x8008.
-///
-/// There are two sources of forbidden slot hazards:
-///
-/// A) A previous pass has created a compact branch directly.
-/// B) Transforming a delay slot branch into compact branch. This case can be
-///    difficult to process as lookahead for hazards is insufficient, as
-///    backwards delay slot fillling can also produce hazards in previously
-///    processed instuctions.
-///
-//===----------------------------------------------------------------------===//
-
-#include "Mips.h"
-#include "MipsInstrInfo.h"
-#include "MipsSEInstrInfo.h"
-#include "MipsTargetMachine.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/IR/Function.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetRegisterInfo.h"
-
-using namespace llvm;
-
-#define DEBUG_TYPE "mips-hazard-schedule"
-
-STATISTIC(NumInsertedNops, "Number of nops inserted");
-
-namespace {
-
-typedef MachineBasicBlock::iterator Iter;
-typedef MachineBasicBlock::reverse_iterator ReverseIter;
-
-class MipsHazardSchedule : public MachineFunctionPass {
-
-public:
-  MipsHazardSchedule() : MachineFunctionPass(ID) {}
-
-  StringRef getPassName() const override { return "Mips Hazard Schedule"; }
-
-  bool runOnMachineFunction(MachineFunction &F) override;
-
-  MachineFunctionProperties getRequiredProperties() const override {
-    return MachineFunctionProperties().set(
-        MachineFunctionProperties::Property::NoVRegs);
-  }
-
-private:
-  static char ID;
-};
-
-char MipsHazardSchedule::ID = 0;
-} // end of anonymous namespace
-
-/// Returns a pass that clears pipeline hazards.
-FunctionPass *llvm::createMipsHazardSchedule() {
-  return new MipsHazardSchedule();
-}
-
-// Find the next real instruction from the current position in current basic
-// block.
-static Iter getNextMachineInstrInBB(Iter Position) {
-  Iter I = Position, E = Position->getParent()->end();
-  I = std::find_if_not(I, E,
-                       [](const Iter &Insn) { return Insn->isTransient(); });
-
-  return I;
-}
-
-// Find the next real instruction from the current position, looking through
-// basic block boundaries.
-static std::pair<Iter, bool> getNextMachineInstr(Iter Position, MachineBasicBlock * Parent) {
-  if (Position == Parent->end()) {
-    do {
-      MachineBasicBlock *Succ = Parent->getNextNode();
-      if (Succ != nullptr && Parent->isSuccessor(Succ)) {
-        Position = Succ->begin();
-        Parent = Succ;
-      } else {
-        return std::make_pair(Position, true);
-      }
-    } while (Parent->empty());
-  }
-
-  Iter Instr = getNextMachineInstrInBB(Position);
-  if (Instr == Parent->end()) {
-    return getNextMachineInstr(Instr, Parent);
-  }
-  return std::make_pair(Instr, false);
-}
-
-bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
-
-  const MipsSubtarget *STI =
-      &static_cast<const MipsSubtarget &>(MF.getSubtarget());
-
-  // Forbidden slot hazards are only defined for MIPSR6 but not microMIPSR6.
-  if (!STI->hasMips32r6() || STI->inMicroMipsMode())
-    return false;
-
-  bool Changed = false;
-  const MipsInstrInfo *TII = STI->getInstrInfo();
-
-  for (MachineFunction::iterator FI = MF.begin(); FI != MF.end(); ++FI) {
-    for (Iter I = FI->begin(); I != FI->end(); ++I) {
-
-      // Forbidden slot hazard handling. Use lookahead over state.
-      if (!TII->HasForbiddenSlot(*I))
-        continue;
-
-      Iter Inst;
-      bool LastInstInFunction =
-          std::next(I) == FI->end() && std::next(FI) == MF.end();
-      if (!LastInstInFunction) {
-        std::pair<Iter, bool> Res = getNextMachineInstr(std::next(I), &*FI);
-        LastInstInFunction |= Res.second;
-        Inst = Res.first;
-      }
-
-      if (LastInstInFunction || !TII->SafeInForbiddenSlot(*Inst)) {
-        Changed = true;
-        MIBundleBuilder(&*I)
-            .append(BuildMI(MF, I->getDebugLoc(), TII->get(Mips::NOP)));
-        NumInsertedNops++;
-      }
-    }
-  }
-  return Changed;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsLongBranch.cpp b/external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsLongBranch.cpp
deleted file mode 100644
index b95f1158fa56..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsLongBranch.cpp
+++ /dev/null
@@ -1,548 +0,0 @@
-//===-- MipsLongBranch.cpp - Emit long branches ---------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This pass expands a branch or jump instruction into a long branch if its
-// offset is too large to fit into its immediate field.
-//
-// FIXME: Fix pc-region jump instructions which cross 256MB segment boundaries.
-//===----------------------------------------------------------------------===//
-
-#include "MCTargetDesc/MipsABIInfo.h"
-#include "MCTargetDesc/MipsBaseInfo.h"
-#include "MCTargetDesc/MipsMCNaCl.h"
-#include "Mips.h"
-#include "MipsInstrInfo.h"
-#include "MipsMachineFunction.h"
-#include "MipsSubtarget.h"
-#include "MipsTargetMachine.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/IR/DebugLoc.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/MathExtras.h"
-#include "llvm/Target/TargetMachine.h"
-#include <cassert>
-#include <cstdint>
-#include <iterator>
-
-using namespace llvm;
-
-#define DEBUG_TYPE "mips-long-branch"
-
-STATISTIC(LongBranches, "Number of long branches.");
-
-static cl::opt<bool> SkipLongBranch(
-  "skip-mips-long-branch",
-  cl::init(false),
-  cl::desc("MIPS: Skip long branch pass."),
-  cl::Hidden);
-
-static cl::opt<bool> ForceLongBranch(
-  "force-mips-long-branch",
-  cl::init(false),
-  cl::desc("MIPS: Expand all branches to long format."),
-  cl::Hidden);
-
-namespace {
-
-  typedef MachineBasicBlock::iterator Iter;
-  typedef MachineBasicBlock::reverse_iterator ReverseIter;
-
-  struct MBBInfo {
-    uint64_t Size = 0;
-    uint64_t Address;
-    bool HasLongBranch = false;
-    MachineInstr *Br = nullptr;
-
-    MBBInfo() = default;
-  };
-
-  class MipsLongBranch : public MachineFunctionPass {
-  public:
-    static char ID;
-
-    MipsLongBranch()
-        : MachineFunctionPass(ID), ABI(MipsABIInfo::Unknown()) {}
-
-    StringRef getPassName() const override { return "Mips Long Branch"; }
-
-    bool runOnMachineFunction(MachineFunction &F) override;
-
-    MachineFunctionProperties getRequiredProperties() const override {
-      return MachineFunctionProperties().set(
-          MachineFunctionProperties::Property::NoVRegs);
-    }
-
-  private:
-    void splitMBB(MachineBasicBlock *MBB);
-    void initMBBInfo();
-    int64_t computeOffset(const MachineInstr *Br);
-    void replaceBranch(MachineBasicBlock &MBB, Iter Br, const DebugLoc &DL,
-                       MachineBasicBlock *MBBOpnd);
-    void expandToLongBranch(MBBInfo &Info);
-
-    MachineFunction *MF;
-    SmallVector<MBBInfo, 16> MBBInfos;
-    bool IsPIC;
-    MipsABIInfo ABI;
-    unsigned LongBranchSeqSize;
-  };
-
-  char MipsLongBranch::ID = 0;
-
-} // end anonymous namespace
-
-/// Iterate over list of Br's operands and search for a MachineBasicBlock
-/// operand.
-static MachineBasicBlock *getTargetMBB(const MachineInstr &Br) {
-  for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
-    const MachineOperand &MO = Br.getOperand(I);
-
-    if (MO.isMBB())
-      return MO.getMBB();
-  }
-
-  llvm_unreachable("This instruction does not have an MBB operand.");
-}
-
-// Traverse the list of instructions backwards until a non-debug instruction is
-// found or it reaches E.
-static ReverseIter getNonDebugInstr(ReverseIter B, const ReverseIter &E) {
-  for (; B != E; ++B)
-    if (!B->isDebugValue())
-      return B;
-
-  return E;
-}
-
-// Split MBB if it has two direct jumps/branches.
-void MipsLongBranch::splitMBB(MachineBasicBlock *MBB) {
-  ReverseIter End = MBB->rend();
-  ReverseIter LastBr = getNonDebugInstr(MBB->rbegin(), End);
-
-  // Return if MBB has no branch instructions.
-  if ((LastBr == End) ||
-      (!LastBr->isConditionalBranch() && !LastBr->isUnconditionalBranch()))
-    return;
-
-  ReverseIter FirstBr = getNonDebugInstr(std::next(LastBr), End);
-
-  // MBB has only one branch instruction if FirstBr is not a branch
-  // instruction.
-  if ((FirstBr == End) ||
-      (!FirstBr->isConditionalBranch() && !FirstBr->isUnconditionalBranch()))
-    return;
-
-  assert(!FirstBr->isIndirectBranch() && "Unexpected indirect branch found.");
-
-  // Create a new MBB. Move instructions in MBB to the newly created MBB.
-  MachineBasicBlock *NewMBB =
-    MF->CreateMachineBasicBlock(MBB->getBasicBlock());
-
-  // Insert NewMBB and fix control flow.
-  MachineBasicBlock *Tgt = getTargetMBB(*FirstBr);
-  NewMBB->transferSuccessors(MBB);
-  NewMBB->removeSuccessor(Tgt, true);
-  MBB->addSuccessor(NewMBB);
-  MBB->addSuccessor(Tgt);
-  MF->insert(std::next(MachineFunction::iterator(MBB)), NewMBB);
-
-  NewMBB->splice(NewMBB->end(), MBB, LastBr.getReverse(), MBB->end());
-}
-
-// Fill MBBInfos.
-void MipsLongBranch::initMBBInfo() {
-  // Split the MBBs if they have two branches. Each basic block should have at
-  // most one branch after this loop is executed.
-  for (auto &MBB : *MF)
-    splitMBB(&MBB);
-
-  MF->RenumberBlocks();
-  MBBInfos.clear();
-  MBBInfos.resize(MF->size());
-
-  const MipsInstrInfo *TII =
-      static_cast<const MipsInstrInfo *>(MF->getSubtarget().getInstrInfo());
-  for (unsigned I = 0, E = MBBInfos.size(); I < E; ++I) {
-    MachineBasicBlock *MBB = MF->getBlockNumbered(I);
-
-    // Compute size of MBB.
-    for (MachineBasicBlock::instr_iterator MI = MBB->instr_begin();
-         MI != MBB->instr_end(); ++MI)
-      MBBInfos[I].Size += TII->getInstSizeInBytes(*MI);
-
-    // Search for MBB's branch instruction.
-    ReverseIter End = MBB->rend();
-    ReverseIter Br = getNonDebugInstr(MBB->rbegin(), End);
-
-    if ((Br != End) && !Br->isIndirectBranch() &&
-        (Br->isConditionalBranch() || (Br->isUnconditionalBranch() && IsPIC)))
-      MBBInfos[I].Br = &*Br;
-  }
-}
-
-// Compute offset of branch in number of bytes.
-int64_t MipsLongBranch::computeOffset(const MachineInstr *Br) {
-  int64_t Offset = 0;
-  int ThisMBB = Br->getParent()->getNumber();
-  int TargetMBB = getTargetMBB(*Br)->getNumber();
-
-  // Compute offset of a forward branch.
-  if (ThisMBB < TargetMBB) {
-    for (int N = ThisMBB + 1; N < TargetMBB; ++N)
-      Offset += MBBInfos[N].Size;
-
-    return Offset + 4;
-  }
-
-  // Compute offset of a backward branch.
-  for (int N = ThisMBB; N >= TargetMBB; --N)
-    Offset += MBBInfos[N].Size;
-
-  return -Offset + 4;
-}
-
-// Replace Br with a branch which has the opposite condition code and a
-// MachineBasicBlock operand MBBOpnd.
-void MipsLongBranch::replaceBranch(MachineBasicBlock &MBB, Iter Br,
-                                   const DebugLoc &DL,
-                                   MachineBasicBlock *MBBOpnd) {
-  const MipsInstrInfo *TII = static_cast<const MipsInstrInfo *>(
-      MBB.getParent()->getSubtarget().getInstrInfo());
-  unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode());
-  const MCInstrDesc &NewDesc = TII->get(NewOpc);
-
-  MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc);
-
-  for (unsigned I = 0, E = Br->getDesc().getNumOperands(); I < E; ++I) {
-    MachineOperand &MO = Br->getOperand(I);
-
-    if (!MO.isReg()) {
-      assert(MO.isMBB() && "MBB operand expected.");
-      break;
-    }
-
-    MIB.addReg(MO.getReg());
-  }
-
-  MIB.addMBB(MBBOpnd);
-
-  if (Br->hasDelaySlot()) {
-    // Bundle the instruction in the delay slot to the newly created branch
-    // and erase the original branch.
-    assert(Br->isBundledWithSucc());
-    MachineBasicBlock::instr_iterator II = Br.getInstrIterator();
-    MIBundleBuilder(&*MIB).append((++II)->removeFromBundle());
-  }
-  Br->eraseFromParent();
-}
-
-// Expand branch instructions to long branches.
-// TODO: This function has to be fixed for beqz16 and bnez16, because it
-// currently assumes that all branches have 16-bit offsets, and will produce
-// wrong code if branches whose allowed offsets are [-128, -126, ..., 126]
-// are present.
-void MipsLongBranch::expandToLongBranch(MBBInfo &I) {
-  MachineBasicBlock::iterator Pos;
-  MachineBasicBlock *MBB = I.Br->getParent(), *TgtMBB = getTargetMBB(*I.Br);
-  DebugLoc DL = I.Br->getDebugLoc();
-  const BasicBlock *BB = MBB->getBasicBlock();
-  MachineFunction::iterator FallThroughMBB = ++MachineFunction::iterator(MBB);
-  MachineBasicBlock *LongBrMBB = MF->CreateMachineBasicBlock(BB);
-  const MipsSubtarget &Subtarget =
-      static_cast<const MipsSubtarget &>(MF->getSubtarget());
-  const MipsInstrInfo *TII =
-      static_cast<const MipsInstrInfo *>(Subtarget.getInstrInfo());
-
-  MF->insert(FallThroughMBB, LongBrMBB);
-  MBB->replaceSuccessor(TgtMBB, LongBrMBB);
-
-  if (IsPIC) {
-    MachineBasicBlock *BalTgtMBB = MF->CreateMachineBasicBlock(BB);
-    MF->insert(FallThroughMBB, BalTgtMBB);
-    LongBrMBB->addSuccessor(BalTgtMBB);
-    BalTgtMBB->addSuccessor(TgtMBB);
-
-    // We must select between the MIPS32r6/MIPS64r6 BAL (which is a normal
-    // instruction) and the pre-MIPS32r6/MIPS64r6 definition (which is an
-    // pseudo-instruction wrapping BGEZAL).
-    unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR;
-
-    if (!ABI.IsN64()) {
-      // $longbr:
-      //  addiu $sp, $sp, -8
-      //  sw $ra, 0($sp)
-      //  lui $at, %hi($tgt - $baltgt)
-      //  bal $baltgt
-      //  addiu $at, $at, %lo($tgt - $baltgt)
-      // $baltgt:
-      //  addu $at, $ra, $at
-      //  lw $ra, 0($sp)
-      //  jr $at
-      //  addiu $sp, $sp, 8
-      // $fallthrough:
-      //
-
-      Pos = LongBrMBB->begin();
-
-      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
-        .addReg(Mips::SP).addImm(-8);
-      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA)
-        .addReg(Mips::SP).addImm(0);
-
-      // LUi and ADDiu instructions create 32-bit offset of the target basic
-      // block from the target of BAL instruction.  We cannot use immediate
-      // value for this offset because it cannot be determined accurately when
-      // the program has inline assembly statements.  We therefore use the
-      // relocation expressions %hi($tgt-$baltgt) and %lo($tgt-$baltgt) which
-      // are resolved during the fixup, so the values will always be correct.
-      //
-      // Since we cannot create %hi($tgt-$baltgt) and %lo($tgt-$baltgt)
-      // expressions at this point (it is possible only at the MC layer),
-      // we replace LUi and ADDiu with pseudo instructions
-      // LONG_BRANCH_LUi and LONG_BRANCH_ADDiu, and add both basic
-      // blocks as operands to these instructions.  When lowering these pseudo
-      // instructions to LUi and ADDiu in the MC layer, we will create
-      // %hi($tgt-$baltgt) and %lo($tgt-$baltgt) expressions and add them as
-      // operands to lowered instructions.
-
-      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT)
-        .addMBB(TgtMBB).addMBB(BalTgtMBB);
-      MIBundleBuilder(*LongBrMBB, Pos)
-          .append(BuildMI(*MF, DL, TII->get(BalOp)).addMBB(BalTgtMBB))
-          .append(BuildMI(*MF, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT)
-                      .addReg(Mips::AT)
-                      .addMBB(TgtMBB)
-                      .addMBB(BalTgtMBB));
-
-      Pos = BalTgtMBB->begin();
-
-      BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT)
-        .addReg(Mips::RA).addReg(Mips::AT);
-      BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA)
-        .addReg(Mips::SP).addImm(0);
-
-      // In NaCl, modifying the sp is not allowed in branch delay slot.
-      if (Subtarget.isTargetNaCl())
-        BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
-          .addReg(Mips::SP).addImm(8);
-
-      if (Subtarget.hasMips32r6())
-        BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::JALR))
-          .addReg(Mips::ZERO).addReg(Mips::AT);
-      else
-        BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::JR)).addReg(Mips::AT);
-
-      if (Subtarget.isTargetNaCl()) {
-        BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::NOP));
-        // Bundle-align the target of indirect branch JR.
-        TgtMBB->setAlignment(MIPS_NACL_BUNDLE_ALIGN);
-      } else
-        BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
-          .addReg(Mips::SP).addImm(8);
-
-      BalTgtMBB->rbegin()->bundleWithPred();
-    } else {
-      // $longbr:
-      //  daddiu $sp, $sp, -16
-      //  sd $ra, 0($sp)
-      //  daddiu $at, $zero, %hi($tgt - $baltgt)
-      //  dsll $at, $at, 16
-      //  bal $baltgt
-      //  daddiu $at, $at, %lo($tgt - $baltgt)
-      // $baltgt:
-      //  daddu $at, $ra, $at
-      //  ld $ra, 0($sp)
-      //  jr64 $at
-      //  daddiu $sp, $sp, 16
-      // $fallthrough:
-      //
-
-      // We assume the branch is within-function, and that offset is within
-      // +/- 2GB.  High 32 bits will therefore always be zero.
-
-      // Note that this will work even if the offset is negative, because
-      // of the +1 modification that's added in that case.  For example, if the
-      // offset is -1MB (0xFFFFFFFFFFF00000), the computation for %higher is
-      //
-      // 0xFFFFFFFFFFF00000 + 0x80008000 = 0x000000007FF08000
-      //
-      // and the bits [47:32] are zero.  For %highest
-      //
-      // 0xFFFFFFFFFFF00000 + 0x800080008000 = 0x000080007FF08000
-      //
-      // and the bits [63:48] are zero.
-
-      Pos = LongBrMBB->begin();
-
-      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64)
-        .addReg(Mips::SP_64).addImm(-16);
-      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD)).addReg(Mips::RA_64)
-        .addReg(Mips::SP_64).addImm(0);
-      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu),
-              Mips::AT_64).addReg(Mips::ZERO_64)
-                          .addMBB(TgtMBB, MipsII::MO_ABS_HI).addMBB(BalTgtMBB);
-      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64)
-        .addReg(Mips::AT_64).addImm(16);
-
-      MIBundleBuilder(*LongBrMBB, Pos)
-          .append(BuildMI(*MF, DL, TII->get(BalOp)).addMBB(BalTgtMBB))
-          .append(
-              BuildMI(*MF, DL, TII->get(Mips::LONG_BRANCH_DADDiu), Mips::AT_64)
-                  .addReg(Mips::AT_64)
-                  .addMBB(TgtMBB, MipsII::MO_ABS_LO)
-                  .addMBB(BalTgtMBB));
-
-      Pos = BalTgtMBB->begin();
-
-      BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64)
-        .addReg(Mips::RA_64).addReg(Mips::AT_64);
-      BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64)
-        .addReg(Mips::SP_64).addImm(0);
-
-      if (Subtarget.hasMips64r6())
-        BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::JALR64))
-          .addReg(Mips::ZERO_64).addReg(Mips::AT_64);
-      else
-        BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::JR64)).addReg(Mips::AT_64);
-
-      BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64)
-        .addReg(Mips::SP_64).addImm(16);
-      BalTgtMBB->rbegin()->bundleWithPred();
-    }
-
-    assert(LongBrMBB->size() + BalTgtMBB->size() == LongBranchSeqSize);
-  } else {
-    // $longbr:
-    //  j $tgt
-    //  nop
-    // $fallthrough:
-    //
-    Pos = LongBrMBB->begin();
-    LongBrMBB->addSuccessor(TgtMBB);
-    MIBundleBuilder(*LongBrMBB, Pos)
-      .append(BuildMI(*MF, DL, TII->get(Mips::J)).addMBB(TgtMBB))
-      .append(BuildMI(*MF, DL, TII->get(Mips::NOP)));
-
-    assert(LongBrMBB->size() == LongBranchSeqSize);
-  }
-
-  if (I.Br->isUnconditionalBranch()) {
-    // Change branch destination.
-    assert(I.Br->getDesc().getNumOperands() == 1);
-    I.Br->RemoveOperand(0);
-    I.Br->addOperand(MachineOperand::CreateMBB(LongBrMBB));
-  } else
-    // Change branch destination and reverse condition.
-    replaceBranch(*MBB, I.Br, DL, &*FallThroughMBB);
-}
-
-static void emitGPDisp(MachineFunction &F, const MipsInstrInfo *TII) {
-  MachineBasicBlock &MBB = F.front();
-  MachineBasicBlock::iterator I = MBB.begin();
-  DebugLoc DL = MBB.findDebugLoc(MBB.begin());
-  BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0)
-    .addExternalSymbol("_gp_disp", MipsII::MO_ABS_HI);
-  BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0)
-    .addReg(Mips::V0).addExternalSymbol("_gp_disp", MipsII::MO_ABS_LO);
-  MBB.removeLiveIn(Mips::V0);
-}
-
-bool MipsLongBranch::runOnMachineFunction(MachineFunction &F) {
-  const MipsSubtarget &STI =
-      static_cast<const MipsSubtarget &>(F.getSubtarget());
-  const MipsInstrInfo *TII =
-      static_cast<const MipsInstrInfo *>(STI.getInstrInfo());
-
-
-  const TargetMachine& TM = F.getTarget();
-  IsPIC = TM.isPositionIndependent();
-  ABI = static_cast<const MipsTargetMachine &>(TM).getABI();
-
-  LongBranchSeqSize =
-      !IsPIC ? 2 : (ABI.IsN64() ? 10 : (!STI.isTargetNaCl() ? 9 : 10));
-
-  if (STI.inMips16Mode() || !STI.enableLongBranchPass())
-    return false;
-  if (IsPIC && static_cast<const MipsTargetMachine &>(TM).getABI().IsO32() &&
-      F.getInfo<MipsFunctionInfo>()->globalBaseRegSet())
-    emitGPDisp(F, TII);
-
-  if (SkipLongBranch)
-    return true;
-
-  MF = &F;
-  initMBBInfo();
-
-  SmallVectorImpl<MBBInfo>::iterator I, E = MBBInfos.end();
-  bool EverMadeChange = false, MadeChange = true;
-
-  while (MadeChange) {
-    MadeChange = false;
-
-    for (I = MBBInfos.begin(); I != E; ++I) {
-      // Skip if this MBB doesn't have a branch or the branch has already been
-      // converted to a long branch.
-      if (!I->Br || I->HasLongBranch)
-        continue;
-
-      int ShVal = STI.inMicroMipsMode() ? 2 : 4;
-      int64_t Offset = computeOffset(I->Br) / ShVal;
-
-      if (STI.isTargetNaCl()) {
-        // The offset calculation does not include sandboxing instructions
-        // that will be added later in the MC layer.  Since at this point we
-        // don't know the exact amount of code that "sandboxing" will add, we
-        // conservatively estimate that code will not grow more than 100%.
-        Offset *= 2;
-      }
-
-      // Check if offset fits into 16-bit immediate field of branches.
-      if (!ForceLongBranch && isInt<16>(Offset))
-        continue;
-
-      I->HasLongBranch = true;
-      I->Size += LongBranchSeqSize * 4;
-      ++LongBranches;
-      EverMadeChange = MadeChange = true;
-    }
-  }
-
-  if (!EverMadeChange)
-    return true;
-
-  // Compute basic block addresses.
-  if (IsPIC) {
-    uint64_t Address = 0;
-
-    for (I = MBBInfos.begin(); I != E; Address += I->Size, ++I)
-      I->Address = Address;
-  }
-
-  // Do the expansion.
-  for (I = MBBInfos.begin(); I != E; ++I)
-    if (I->HasLongBranch)
-      expandToLongBranch(*I);
-
-  MF->RenumberBlocks();
-
-  return true;
-}
-
-/// createMipsLongBranchPass - Returns a pass that converts branches to long
-/// branches.
-FunctionPass *llvm::createMipsLongBranchPass() { return new MipsLongBranch(); }
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXSection.h b/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXSection.h
deleted file mode 100644
index d736eaa41301..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXSection.h
+++ /dev/null
@@ -1,45 +0,0 @@
-//===- NVPTXSection.h - NVPTX-specific section representation ---*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares the NVPTXSection class.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXSECTION_H
-#define LLVM_LIB_TARGET_NVPTX_NVPTXSECTION_H
-
-#include "llvm/MC/MCSection.h"
-#include "llvm/MC/SectionKind.h"
-
-namespace llvm {
-
-/// Represents a section in PTX PTX does not have sections. We create this class
-/// in order to use the ASMPrint interface.
-///
-class NVPTXSection final : public MCSection {
-  virtual void anchor();
-
-public:
-  NVPTXSection(SectionVariant V, SectionKind K) : MCSection(V, K, nullptr) {}
-  ~NVPTXSection() = default;
-
-  /// Override this as NVPTX has its own way of printing switching
-  /// to a section.
-  void PrintSwitchToSection(const MCAsmInfo &MAI, const Triple &T,
-                            raw_ostream &OS,
-                            const MCExpr *Subsection) const override {}
-
-  /// Base address of PTX sections is zero.
-  bool UseCodeAlign() const override { return false; }
-  bool isVirtualSection() const override { return false; }
-};
-
-} // end namespace llvm
-
-#endif // LLVM_LIB_TARGET_NVPTX_NVPTXSECTION_H
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXVector.td b/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXVector.td
deleted file mode 100644
index e69bbba9f193..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXVector.td
+++ /dev/null
@@ -1,1479 +0,0 @@
-//===- NVPTXVector.td - NVPTX Vector Specific Instruction defs -*- tblgen-*-==//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-//-----------------------------------
-// Vector Specific
-//-----------------------------------
-
-//
-// All vector instructions derive from NVPTXVecInst
-//
-
-class NVPTXVecInst<dag outs, dag ins, string asmstr, list<dag> pattern,
-  NVPTXInst sInst=NOP>
-  : NVPTXInst<outs, ins, asmstr, pattern> {
-  NVPTXInst scalarInst=sInst;
-}
-
-let isAsCheapAsAMove=1, VecInstType=isVecExtract.Value in {
-// Extract v2i16
-def V2i16Extract : NVPTXVecInst<(outs Int16Regs:$dst),
-  (ins V2I16Regs:$src, i8imm:$c),
-                         "mov.u16 \t$dst, $src${c:vecelem};",
-                         [(set Int16Regs:$dst, (extractelt
-                           (v2i16 V2I16Regs:$src), imm:$c))],
-                         IMOV16rr>;
-
-// Extract v4i16
-def V4i16Extract : NVPTXVecInst<(outs Int16Regs:$dst),
-  (ins V4I16Regs:$src, i8imm:$c),
-                         "mov.u16 \t$dst, $src${c:vecelem};",
-                         [(set Int16Regs:$dst, (extractelt
-                           (v4i16 V4I16Regs:$src), imm:$c))],
-                         IMOV16rr>;
-
-// Extract v2i8
-def V2i8Extract : NVPTXVecInst<(outs Int8Regs:$dst),
-  (ins V2I8Regs:$src, i8imm:$c),
-                         "mov.u16 \t$dst, $src${c:vecelem};",
-                         [(set Int8Regs:$dst, (extractelt
-                           (v2i8 V2I8Regs:$src), imm:$c))],
-                         IMOV8rr>;
-
-// Extract v4i8
-def V4i8Extract : NVPTXVecInst<(outs Int8Regs:$dst),
-  (ins V4I8Regs:$src, i8imm:$c),
-                         "mov.u16 \t$dst, $src${c:vecelem};",
-                         [(set Int8Regs:$dst, (extractelt
-                           (v4i8 V4I8Regs:$src), imm:$c))],
-                         IMOV8rr>;
-
-// Extract v2i32
-def V2i32Extract : NVPTXVecInst<(outs Int32Regs:$dst),
-  (ins V2I32Regs:$src, i8imm:$c),
-                         "mov.u32 \t$dst, $src${c:vecelem};",
-                         [(set Int32Regs:$dst, (extractelt
-                           (v2i32 V2I32Regs:$src), imm:$c))],
-                         IMOV32rr>;
-
-// Extract v2f32
-def V2f32Extract : NVPTXVecInst<(outs Float32Regs:$dst),
-  (ins V2F32Regs:$src, i8imm:$c),
-                         "mov.f32 \t$dst, $src${c:vecelem};",
-                         [(set Float32Regs:$dst, (extractelt
-                           (v2f32 V2F32Regs:$src), imm:$c))],
-                         FMOV32rr>;
-
-// Extract v2i64
-def V2i64Extract : NVPTXVecInst<(outs Int64Regs:$dst),
-  (ins V2I64Regs:$src, i8imm:$c),
-                         "mov.u64 \t$dst, $src${c:vecelem};",
-                         [(set Int64Regs:$dst, (extractelt
-                           (v2i64 V2I64Regs:$src), imm:$c))],
-                         IMOV64rr>;
-
-// Extract v2f64
-def V2f64Extract : NVPTXVecInst<(outs Float64Regs:$dst),
-  (ins V2F64Regs:$src, i8imm:$c),
-                         "mov.f64 \t$dst, $src${c:vecelem};",
-                         [(set Float64Regs:$dst, (extractelt
-                           (v2f64 V2F64Regs:$src), imm:$c))],
-                         FMOV64rr>;
-
-// Extract v4i32
-def V4i32Extract : NVPTXVecInst<(outs Int32Regs:$dst),
-  (ins V4I32Regs:$src, i8imm:$c),
-                         "mov.u32 \t$dst, $src${c:vecelem};",
-                         [(set Int32Regs:$dst, (extractelt
-                           (v4i32 V4I32Regs:$src), imm:$c))],
-                         IMOV32rr>;
-
-// Extract v4f32
-def V4f32Extract : NVPTXVecInst<(outs Float32Regs:$dst),
-  (ins V4F32Regs:$src, i8imm:$c),
-                         "mov.f32 \t$dst, $src${c:vecelem};",
-                         [(set Float32Regs:$dst, (extractelt
-                           (v4f32 V4F32Regs:$src), imm:$c))],
-                         FMOV32rr>;
-}
-
-let isAsCheapAsAMove=1, VecInstType=isVecInsert.Value in {
-// Insert v2i8
-def V2i8Insert : NVPTXVecInst<(outs V2I8Regs:$dst),
-  (ins V2I8Regs:$src, Int8Regs:$val, i8imm:$c),
-        "mov.v2.u16 \t${dst:vecfull}, ${src:vecfull};"
-        "\n\tmov.u16 \t$dst${c:vecelem}, $val;",
-       [(set V2I8Regs:$dst,
-         (insertelt V2I8Regs:$src, Int8Regs:$val, imm:$c))], IMOV8rr>;
-
-// Insert v4i8
-def V4i8Insert : NVPTXVecInst<(outs V4I8Regs:$dst),
-  (ins V4I8Regs:$src, Int8Regs:$val, i8imm:$c),
-                       "mov.v4.u16 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.u16 \t$dst${c:vecelem}, $val;",
-       [(set V4I8Regs:$dst,
-         (insertelt V4I8Regs:$src, Int8Regs:$val, imm:$c))], IMOV8rr>;
-
-// Insert v2i16
-def V2i16Insert : NVPTXVecInst<(outs V2I16Regs:$dst),
-  (ins V2I16Regs:$src, Int16Regs:$val, i8imm:$c),
-                       "mov.v2.u16 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.u16 \t$dst${c:vecelem}, $val;",
-       [(set V2I16Regs:$dst,
-         (insertelt V2I16Regs:$src, Int16Regs:$val, imm:$c))],
-                    IMOV16rr>;
-
-// Insert v4i16
-def V4i16Insert : NVPTXVecInst<(outs V4I16Regs:$dst),
-  (ins V4I16Regs:$src, Int16Regs:$val, i8imm:$c),
-                       "mov.v4.u16 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.u16 \t$dst${c:vecelem}, $val;",
-       [(set V4I16Regs:$dst,
-         (insertelt V4I16Regs:$src, Int16Regs:$val, imm:$c))],
-                    IMOV16rr>;
-
-// Insert v2i32
-def V2i32Insert : NVPTXVecInst<(outs V2I32Regs:$dst),
-  (ins V2I32Regs:$src, Int32Regs:$val, i8imm:$c),
-                       "mov.v2.u32 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.u32 \t$dst${c:vecelem}, $val;",
-       [(set V2I32Regs:$dst,
-         (insertelt V2I32Regs:$src, Int32Regs:$val, imm:$c))],
-                    IMOV32rr>;
-
-// Insert v2f32
-def V2f32Insert : NVPTXVecInst<(outs V2F32Regs:$dst),
-  (ins V2F32Regs:$src, Float32Regs:$val, i8imm:$c),
-                       "mov.v2.f32 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.f32 \t$dst${c:vecelem}, $val;",
-       [(set V2F32Regs:$dst,
-         (insertelt V2F32Regs:$src, Float32Regs:$val, imm:$c))],
-                    FMOV32rr>;
-
-// Insert v2i64
-def V2i64Insert : NVPTXVecInst<(outs V2I64Regs:$dst),
-  (ins V2I64Regs:$src, Int64Regs:$val, i8imm:$c),
-                       "mov.v2.u64 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.u64 \t$dst${c:vecelem}, $val;",
-       [(set V2I64Regs:$dst,
-         (insertelt V2I64Regs:$src, Int64Regs:$val, imm:$c))],
-                    IMOV64rr>;
-
-// Insert v2f64
-def V2f64Insert : NVPTXVecInst<(outs V2F64Regs:$dst),
-  (ins V2F64Regs:$src, Float64Regs:$val, i8imm:$c),
-                       "mov.v2.f64 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.f64 \t$dst${c:vecelem}, $val;",
-       [(set V2F64Regs:$dst,
-         (insertelt V2F64Regs:$src, Float64Regs:$val, imm:$c))],
-                    FMOV64rr>;
-
-// Insert v4i32
-def V4i32Insert : NVPTXVecInst<(outs V4I32Regs:$dst),
-  (ins V4I32Regs:$src, Int32Regs:$val, i8imm:$c),
-                       "mov.v4.u32 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.u32 \t$dst${c:vecelem}, $val;",
-       [(set V4I32Regs:$dst,
-         (insertelt V4I32Regs:$src, Int32Regs:$val, imm:$c))],
-                    IMOV32rr>;
-
-// Insert v4f32
-def V4f32Insert : NVPTXVecInst<(outs V4F32Regs:$dst),
-  (ins V4F32Regs:$src, Float32Regs:$val, i8imm:$c),
-                       "mov.v4.f32 \t${dst:vecfull}, ${src:vecfull};"
-                       "\n\tmov.f32 \t$dst${c:vecelem}, $val;",
-       [(set V4F32Regs:$dst,
-         (insertelt V4F32Regs:$src, Float32Regs:$val, imm:$c))],
-                    FMOV32rr>;
-}
-
-class BinOpAsmString<string c> {
-  string s = c;
-}
-
-class V4AsmStr<string opcode> : BinOpAsmString<
-                          !strconcat(!strconcat(!strconcat(!strconcat(
-                            !strconcat(!strconcat(!strconcat(
-                          opcode,  " \t${dst}_0, ${a}_0, ${b}_0;\n\t"),
-                          opcode), " \t${dst}_1, ${a}_1, ${b}_1;\n\t"),
-                          opcode), " \t${dst}_2, ${a}_2, ${b}_2;\n\t"),
-                          opcode), " \t${dst}_3, ${a}_3, ${b}_3;")>;
-
-class V2AsmStr<string opcode> : BinOpAsmString<
-                           !strconcat(!strconcat(!strconcat(
-                           opcode,  " \t${dst}_0, ${a}_0, ${b}_0;\n\t"),
-                           opcode), " \t${dst}_1, ${a}_1, ${b}_1;")>;
-
-class V4MADStr<string opcode> : BinOpAsmString<
-                          !strconcat(!strconcat(!strconcat(!strconcat(
-                            !strconcat(!strconcat(!strconcat(
-                          opcode,  " \t${dst}_0, ${a}_0, ${b}_0, ${c}_0;\n\t"),
-                          opcode), " \t${dst}_1, ${a}_1, ${b}_1, ${c}_1;\n\t"),
-                          opcode), " \t${dst}_2, ${a}_2, ${b}_2, ${c}_2;\n\t"),
-                          opcode), " \t${dst}_3, ${a}_3, ${b}_3, ${c}_3;")>;
-
-class V2MADStr<string opcode> : BinOpAsmString<
-                           !strconcat(!strconcat(!strconcat(
-                           opcode,  " \t${dst}_0, ${a}_0, ${b}_0, ${c}_0;\n\t"),
-                           opcode), " \t${dst}_1, ${a}_1, ${b}_1, ${c}_1;")>;
-
-class V4UnaryStr<string opcode> : BinOpAsmString<
-                          !strconcat(!strconcat(!strconcat(!strconcat(
-                            !strconcat(!strconcat(!strconcat(
-                          opcode,  " \t${dst}_0, ${a}_0;\n\t"),
-                          opcode), " \t${dst}_1, ${a}_1;\n\t"),
-                          opcode), " \t${dst}_2, ${a}_2;\n\t"),
-                          opcode), " \t${dst}_3, ${a}_3;")>;
-
-class V2UnaryStr<string opcode> : BinOpAsmString<
-                           !strconcat(!strconcat(!strconcat(
-                           opcode,  " \t${dst}_0, ${a}_0;\n\t"),
-                           opcode), " \t${dst}_1, ${a}_1;")>;
-
-class VecBinaryOp<BinOpAsmString asmstr, SDNode OpNode, NVPTXRegClass regclass,
-  NVPTXInst sInst=NOP> :
-      NVPTXVecInst<(outs regclass:$dst), (ins regclass:$a, regclass:$b),
-                 asmstr.s,
-                 [(set regclass:$dst, (OpNode regclass:$a, regclass:$b))],
-                 sInst>;
-
-class VecShiftOp<BinOpAsmString asmstr, SDNode OpNode, NVPTXRegClass regclass1,
-                 NVPTXRegClass regclass2, NVPTXInst sInst=NOP> :
-      NVPTXVecInst<(outs regclass1:$dst), (ins regclass1:$a, regclass2:$b),
-                 asmstr.s,
-                 [(set regclass1:$dst, (OpNode regclass1:$a, regclass2:$b))],
-                 sInst>;
-
-class VecUnaryOp<BinOpAsmString asmstr, PatFrag OpNode, NVPTXRegClass regclass,
-  NVPTXInst sInst=NOP> :
-      NVPTXVecInst<(outs regclass:$dst), (ins regclass:$a),
-                 asmstr.s,
-                 [(set regclass:$dst, (OpNode regclass:$a))], sInst>;
-
-multiclass IntBinVOp<string asmstr, SDNode OpNode,
-                     NVPTXInst i64op=NOP, NVPTXInst i32op=NOP, NVPTXInst
-                     i16op=NOP, NVPTXInst i8op=NOP> {
-  def V2I64 : VecBinaryOp<V2AsmStr<!strconcat(asmstr, "64")>, OpNode, V2I64Regs,
-    i64op>;
-  def V4I32 : VecBinaryOp<V4AsmStr<!strconcat(asmstr, "32")>, OpNode, V4I32Regs,
-    i32op>;
-  def V2I32 : VecBinaryOp<V2AsmStr<!strconcat(asmstr, "32")>, OpNode, V2I32Regs,
-    i32op>;
-  def V4I16 : VecBinaryOp<V4AsmStr<!strconcat(asmstr, "16")>, OpNode, V4I16Regs,
-    i16op>;
-  def V2I16 : VecBinaryOp<V2AsmStr<!strconcat(asmstr, "16")>, OpNode, V2I16Regs,
-    i16op>;
-  def V4I8 : VecBinaryOp<V4AsmStr<!strconcat(asmstr, "16")>, OpNode, V4I8Regs,
-    i8op>;
-  def V2I8 : VecBinaryOp<V2AsmStr<!strconcat(asmstr, "16")>, OpNode, V2I8Regs,
-    i8op>;
-}
-
-multiclass FloatBinVOp<string asmstr, SDNode OpNode,
-                       NVPTXInst f64=NOP, NVPTXInst f32=NOP,
-                       NVPTXInst f32_ftz=NOP> {
-  def V2F64 : VecBinaryOp<V2AsmStr<!strconcat(asmstr, "f64")>, OpNode,
-    V2F64Regs, f64>;
-  def V4F32_ftz : VecBinaryOp<V4AsmStr<!strconcat(asmstr, "ftz.f32")>, OpNode,
-    V4F32Regs, f32_ftz>, Requires<[doF32FTZ]>;
-  def V2F32_ftz : VecBinaryOp<V2AsmStr<!strconcat(asmstr, "ftz.f32")>, OpNode,
-    V2F32Regs, f32_ftz>, Requires<[doF32FTZ]>;
-  def V4F32 : VecBinaryOp<V4AsmStr<!strconcat(asmstr, "f32")>, OpNode,
-    V4F32Regs, f32>;
-  def V2F32 : VecBinaryOp<V2AsmStr<!strconcat(asmstr, "f32")>, OpNode,
-    V2F32Regs, f32>;
-}
-
-multiclass IntUnaryVOp<string asmstr, PatFrag OpNode,
-                       NVPTXInst i64op=NOP, NVPTXInst i32op=NOP,
-                       NVPTXInst i16op=NOP, NVPTXInst i8op=NOP> {
-  def V2I64 : VecUnaryOp<V2UnaryStr<!strconcat(asmstr, "64")>, OpNode,
-    V2I64Regs, i64op>;
-  def V4I32 : VecUnaryOp<V4UnaryStr<!strconcat(asmstr, "32")>, OpNode,
-    V4I32Regs, i32op>;
-  def V2I32 : VecUnaryOp<V2UnaryStr<!strconcat(asmstr, "32")>, OpNode,
-    V2I32Regs, i32op>;
-  def V4I16 : VecUnaryOp<V4UnaryStr<!strconcat(asmstr, "16")>, OpNode,
-    V4I16Regs, i16op>;
-  def V2I16 : VecUnaryOp<V2UnaryStr<!strconcat(asmstr, "16")>, OpNode,
-    V2I16Regs, i16op>;
-  def V4I8  : VecUnaryOp<V4UnaryStr<!strconcat(asmstr, "16")>, OpNode,
-    V4I8Regs,   i8op>;
-  def V2I8  : VecUnaryOp<V2UnaryStr<!strconcat(asmstr, "16")>, OpNode,
-    V2I8Regs,   i8op>;
-}
-
-
-// Integer Arithmetic
-let VecInstType=isVecOther.Value in {
-defm VAdd : IntBinVOp<"add.s", add, ADDi64rr, ADDi32rr, ADDi16rr, ADDi8rr>;
-defm VSub : IntBinVOp<"sub.s", sub, SUBi64rr, SUBi32rr, SUBi16rr, SUBi8rr>;
-
-def AddCCV4I32 : VecBinaryOp<V4AsmStr<"add.cc.s32">, addc, V4I32Regs,
-  ADDCCi32rr>;
-def AddCCV2I32 : VecBinaryOp<V2AsmStr<"add.cc.s32">, addc, V2I32Regs,
-  ADDCCi32rr>;
-def SubCCV4I32 : VecBinaryOp<V4AsmStr<"sub.cc.s32">, subc, V4I32Regs,
-  SUBCCi32rr>;
-def SubCCV2I32 : VecBinaryOp<V2AsmStr<"sub.cc.s32">, subc, V2I32Regs,
-  SUBCCi32rr>;
-def AddCCCV4I32 : VecBinaryOp<V4AsmStr<"addc.cc.s32">, adde, V4I32Regs,
-  ADDCCCi32rr>;
-def AddCCCV2I32 : VecBinaryOp<V2AsmStr<"addc.cc.s32">, adde, V2I32Regs,
-  ADDCCCi32rr>;
-def SubCCCV4I32 : VecBinaryOp<V4AsmStr<"subc.cc.s32">, sube, V4I32Regs,
-  SUBCCCi32rr>;
-def SubCCCV2I32 : VecBinaryOp<V2AsmStr<"subc.cc.s32">, sube, V2I32Regs,
-  SUBCCCi32rr>;
-
-def ShiftLV2I64 : VecShiftOp<V2AsmStr<"shl.b64">, shl, V2I64Regs, V2I32Regs,
-  SHLi64rr>;
-def ShiftLV2I32 : VecShiftOp<V2AsmStr<"shl.b32">, shl, V2I32Regs, V2I32Regs,
-  SHLi32rr>;
-def ShiftLV4I32 : VecShiftOp<V4AsmStr<"shl.b32">, shl, V4I32Regs, V4I32Regs,
-  SHLi32rr>;
-def ShiftLV2I16 : VecShiftOp<V2AsmStr<"shl.b16">, shl, V2I16Regs, V2I32Regs,
-  SHLi16rr>;
-def ShiftLV4I16 : VecShiftOp<V4AsmStr<"shl.b16">, shl, V4I16Regs, V4I32Regs,
-  SHLi16rr>;
-def ShiftLV2I8  : VecShiftOp<V2AsmStr<"shl.b16">, shl, V2I8Regs,  V2I32Regs,
-  SHLi8rr>;
-def ShiftLV4I8  : VecShiftOp<V4AsmStr<"shl.b16">, shl, V4I8Regs,  V4I32Regs,
-  SHLi8rr>;
-}
-
-// cvt to v*i32, helpers for shift
-class CVTtoVeci32<NVPTXRegClass inclass, NVPTXRegClass outclass, string asmstr,
-  NVPTXInst sInst=NOP> :
-      NVPTXVecInst<(outs outclass:$d), (ins inclass:$s), asmstr, [], sInst>;
-
-class VecCVTStrHelper<string op, string dest, string src> {
-  string s=!strconcat(op, !strconcat("\t",
-           !strconcat(dest, !strconcat(", ", !strconcat(src, ";")))));
-}
-
-class Vec2CVTStr<string op> {
-  string s=!strconcat(VecCVTStrHelper<op, "${d}_0", "${s}_0">.s,
-           !strconcat("\n\t", VecCVTStrHelper<op, "${d}_1", "${s}_1">.s));
-}
-
-class Vec4CVTStr<string op> {
-  string s=!strconcat(VecCVTStrHelper<op, "${d}_0", "${s}_0">.s,
-           !strconcat("\n\t",
-           !strconcat(VecCVTStrHelper<op, "${d}_1", "${s}_1">.s,
-           !strconcat("\n\t",
-           !strconcat(VecCVTStrHelper<op, "${d}_2", "${s}_2">.s,
-           !strconcat("\n\t", VecCVTStrHelper<op, "${d}_3", "${s}_3">.s))))));
-}
-
-let VecInstType=isVecOther.Value in {
-def CVTv2i8tov2i32 : CVTtoVeci32<V2I8Regs, V2I32Regs,
-  Vec2CVTStr<"cvt.u32.u16">.s, Zint_extendext8to32>;
-def CVTv2i16tov2i32 : CVTtoVeci32<V2I16Regs, V2I32Regs,
-  Vec2CVTStr<"cvt.u32.u16">.s, Zint_extendext16to32>;
-def CVTv4i8tov4i32 : CVTtoVeci32<V4I8Regs, V4I32Regs,
-  Vec4CVTStr<"cvt.u32.u16">.s, Zint_extendext8to32>;
-def CVTv4i16tov4i32 : CVTtoVeci32<V4I16Regs, V4I32Regs,
-  Vec4CVTStr<"cvt.u32.u16">.s, Zint_extendext16to32>;
-def CVTv2i64tov2i32 : CVTtoVeci32<V2I64Regs, V2I32Regs,
-  Vec2CVTStr<"cvt.u32.u64">.s, TRUNC_64to32>;
-}
-
-def : Pat<(shl V2I16Regs:$src1, V2I16Regs:$src2),
-          (ShiftLV2I16 V2I16Regs:$src1, (CVTv2i16tov2i32 V2I16Regs:$src2))>;
-def : Pat<(shl V2I8Regs:$src1, V2I8Regs:$src2),
-          (ShiftLV2I8 V2I8Regs:$src1, (CVTv2i8tov2i32 V2I8Regs:$src2))>;
-def : Pat<(shl V2I64Regs:$src1, V2I64Regs:$src2),
-          (ShiftLV2I64 V2I64Regs:$src1, (CVTv2i64tov2i32 V2I64Regs:$src2))>;
-
-def : Pat<(shl V4I16Regs:$src1, V4I16Regs:$src2),
-          (ShiftLV4I16 V4I16Regs:$src1, (CVTv4i16tov4i32 V4I16Regs:$src2))>;
-def : Pat<(shl V4I8Regs:$src1, V4I8Regs:$src2),
-          (ShiftLV4I8 V4I8Regs:$src1, (CVTv4i8tov4i32 V4I8Regs:$src2))>;
-
-let VecInstType=isVecOther.Value in {
-def ShiftRAV2I64 : VecShiftOp<V2AsmStr<"shr.s64">, sra, V2I64Regs, V2I32Regs,
-  SRAi64rr>;
-def ShiftRAV2I32 : VecShiftOp<V2AsmStr<"shr.s32">, sra, V2I32Regs, V2I32Regs,
-  SRAi32rr>;
-def ShiftRAV4I32 : VecShiftOp<V4AsmStr<"shr.s32">, sra, V4I32Regs, V4I32Regs,
-  SRAi32rr>;
-def ShiftRAV2I16 : VecShiftOp<V2AsmStr<"shr.s16">, sra, V2I16Regs, V2I32Regs,
-  SRAi16rr>;
-def ShiftRAV4I16 : VecShiftOp<V4AsmStr<"shr.s16">, sra, V4I16Regs, V4I32Regs,
-  SRAi16rr>;
-def ShiftRAV2I8  : VecShiftOp<V2AsmStr<"shr.s16">, sra, V2I8Regs,  V2I32Regs,
-  SRAi8rr>;
-def ShiftRAV4I8  : VecShiftOp<V4AsmStr<"shr.s16">, sra, V4I8Regs,  V4I32Regs,
-  SRAi8rr>;
-
-def ShiftRLV2I64 : VecShiftOp<V2AsmStr<"shr.u64">, srl, V2I64Regs, V2I32Regs,
-  SRLi64rr>;
-def ShiftRLV2I32 : VecShiftOp<V2AsmStr<"shr.u32">, srl, V2I32Regs, V2I32Regs,
-  SRLi32rr>;
-def ShiftRLV4I32 : VecShiftOp<V4AsmStr<"shr.u32">, srl, V4I32Regs, V4I32Regs,
-  SRLi32rr>;
-def ShiftRLV2I16 : VecShiftOp<V2AsmStr<"shr.u16">, srl, V2I16Regs, V2I32Regs,
-  SRLi16rr>;
-def ShiftRLV4I16 : VecShiftOp<V4AsmStr<"shr.u16">, srl, V4I16Regs, V4I32Regs,
-  SRLi16rr>;
-def ShiftRLV2I8  : VecShiftOp<V2AsmStr<"shr.u16">, srl, V2I8Regs,  V2I32Regs,
-  SRLi8rr>;
-def ShiftRLV4I8  : VecShiftOp<V4AsmStr<"shr.u16">, srl, V4I8Regs,  V4I32Regs,
-  SRLi8rr>;
-
-defm VMult   : IntBinVOp<"mul.lo.s", mul, MULTi64rr, MULTi32rr, MULTi16rr,
-  MULTi8rr>;
-defm VMultHS : IntBinVOp<"mul.hi.s", mulhs, MULTHSi64rr, MULTHSi32rr,
-  MULTHSi16rr,
-  MULTHSi8rr>;
-defm VMultHU : IntBinVOp<"mul.hi.u", mulhu, MULTHUi64rr, MULTHUi32rr,
-  MULTHUi16rr,
-  MULTHUi8rr>;
-defm VSDiv   : IntBinVOp<"div.s", sdiv, SDIVi64rr, SDIVi32rr, SDIVi16rr,
-  SDIVi8rr>;
-defm VUDiv   : IntBinVOp<"div.u", udiv, UDIVi64rr, UDIVi32rr, UDIVi16rr,
-  UDIVi8rr>;
-defm VSRem   : IntBinVOp<"rem.s", srem, SREMi64rr, SREMi32rr, SREMi16rr,
-  SREMi8rr>;
-defm VURem   : IntBinVOp<"rem.u", urem, UREMi64rr, UREMi32rr, UREMi16rr,
-  UREMi8rr>;
-}
-
-def : Pat<(sra V2I16Regs:$src1, V2I16Regs:$src2),
-          (ShiftRAV2I16 V2I16Regs:$src1, (CVTv2i16tov2i32 V2I16Regs:$src2))>;
-def : Pat<(sra V2I8Regs:$src1, V2I8Regs:$src2),
-          (ShiftRAV2I8 V2I8Regs:$src1, (CVTv2i8tov2i32 V2I8Regs:$src2))>;
-def : Pat<(sra V2I64Regs:$src1, V2I64Regs:$src2),
-          (ShiftRAV2I64 V2I64Regs:$src1, (CVTv2i64tov2i32 V2I64Regs:$src2))>;
-
-def : Pat<(sra V4I16Regs:$src1, V4I16Regs:$src2),
-          (ShiftRAV4I16 V4I16Regs:$src1, (CVTv4i16tov4i32 V4I16Regs:$src2))>;
-def : Pat<(sra V4I8Regs:$src1, V4I8Regs:$src2),
-          (ShiftRAV4I8 V4I8Regs:$src1, (CVTv4i8tov4i32 V4I8Regs:$src2))>;
-
-def : Pat<(srl V2I16Regs:$src1, V2I16Regs:$src2),
-          (ShiftRLV2I16 V2I16Regs:$src1, (CVTv2i16tov2i32 V2I16Regs:$src2))>;
-def : Pat<(srl V2I8Regs:$src1, V2I8Regs:$src2),
-          (ShiftRLV2I8 V2I8Regs:$src1, (CVTv2i8tov2i32 V2I8Regs:$src2))>;
-def : Pat<(srl V2I64Regs:$src1, V2I64Regs:$src2),
-          (ShiftRLV2I64 V2I64Regs:$src1, (CVTv2i64tov2i32 V2I64Regs:$src2))>;
-
-def : Pat<(srl V4I16Regs:$src1, V4I16Regs:$src2),
-          (ShiftRLV4I16 V4I16Regs:$src1, (CVTv4i16tov4i32 V4I16Regs:$src2))>;
-def : Pat<(srl V4I8Regs:$src1, V4I8Regs:$src2),
-          (ShiftRLV4I8 V4I8Regs:$src1, (CVTv4i8tov4i32 V4I8Regs:$src2))>;
-
-multiclass VMAD<string asmstr, NVPTXRegClass regclassv4,
-  NVPTXRegClass regclassv2,
-                SDNode an=add, SDNode mn=mul, NVPTXInst sop=NOP,
-                Predicate Pred> {
-  def V4 : NVPTXVecInst<(outs regclassv4:$dst),
-    (ins regclassv4:$a, regclassv4:$b, regclassv4:$c),
-                      V4MADStr<asmstr>.s,
-                      [(set regclassv4:$dst,
-                        (an (mn regclassv4:$a, regclassv4:$b), regclassv4:$c))],
-                      sop>,
-           Requires<[Pred]>;
-  def V2 : NVPTXVecInst<(outs regclassv2:$dst),
-    (ins regclassv2:$a, regclassv2:$b, regclassv2:$c),
-                      V2MADStr<asmstr>.s,
-                      [(set regclassv2:$dst,
-                        (an (mn regclassv2:$a, regclassv2:$b), regclassv2:$c))],
-                      sop>,
-           Requires<[Pred]>;
-}
-
-multiclass VMADV2Only<string asmstr, NVPTXRegClass regclass, NVPTXInst sop=NOP,
-  Predicate Pred> {
-  def V2 : NVPTXVecInst<(outs regclass:$dst),
-    (ins regclass:$a, regclass:$b, regclass:$c),
-                      V2MADStr<asmstr>.s,
-                      [(set regclass:$dst, (add
-                        (mul regclass:$a, regclass:$b), regclass:$c))], sop>,
-           Requires<[Pred]>;
-}
-multiclass VFMADV2Only<string asmstr, NVPTXRegClass regclass, NVPTXInst sop=NOP,
-  Predicate Pred> {
-  def V2 : NVPTXVecInst<(outs regclass:$dst),
-    (ins regclass:$a, regclass:$b, regclass:$c),
-                      V2MADStr<asmstr>.s,
-                      [(set regclass:$dst, (fadd
-                        (fmul regclass:$a, regclass:$b), regclass:$c))], sop>,
-           Requires<[Pred]>;
-}
-
-let VecInstType=isVecOther.Value in {
-defm I8MAD  : VMAD<"mad.lo.s16", V4I8Regs, V2I8Regs, add, mul, MAD8rrr, true>;
-defm I16MAD : VMAD<"mad.lo.s16", V4I16Regs, V2I16Regs, add, mul, MAD16rrr,
-  true>;
-defm I32MAD : VMAD<"mad.lo.s32", V4I32Regs, V2I32Regs, add, mul, MAD32rrr,
-  true>;
-defm I64MAD : VMADV2Only<"mad.lo.s64", V2I64Regs, MAD64rrr, true>;
-
-defm VNeg : IntUnaryVOp<"neg.s", ineg, INEG64, INEG32, INEG16, INEG8>;
-
-defm VAddf : FloatBinVOp<"add.", fadd, FADDf64rr, FADDf32rr, FADDf32rr_ftz>;
-defm VSubf : FloatBinVOp<"sub.", fsub, FSUBf64rr, FSUBf32rr, FSUBf32rr_ftz>;
-defm VMulf : FloatBinVOp<"mul.", fmul, FMULf64rr, FMULf32rr, FMULf32rr_ftz>;
-
-defm F32MAD_ftz : VMAD<"mad.ftz.f32", V4F32Regs, V2F32Regs, fadd, fmul,
-  FMAD32_ftzrrr, doFMADF32_ftz>;
-defm F32FMA_ftz : VMAD<"fma.rn.ftz.f32", V4F32Regs, V2F32Regs, fadd, fmul,
-  FMA32_ftzrrr, doFMAF32_ftz>;
-defm F32MAD : VMAD<"mad.f32", V4F32Regs, V2F32Regs, fadd, fmul, FMAD32rrr,
-  doFMADF32>;
-defm F32FMA : VMAD<"fma.rn.f32", V4F32Regs, V2F32Regs, fadd, fmul, FMA32rrr,
-  doFMAF32>;
-defm F64FMA : VFMADV2Only<"fma.rn.f64", V2F64Regs, FMA64rrr, doFMAF64>;
-}
-
-let VecInstType=isVecOther.Value in {
-def V4F32Div_prec_ftz : VecBinaryOp<V4AsmStr<"div.rn.ftz.f32">, fdiv, V4F32Regs,
-  FDIV32rr_prec_ftz>, Requires<[doF32FTZ, reqPTX20]>;
-def V2F32Div_prec_ftz : VecBinaryOp<V2AsmStr<"div.rn.ftz.f32">, fdiv, V2F32Regs,
-  FDIV32rr_prec_ftz>, Requires<[doF32FTZ, reqPTX20]>;
-def V4F32Div_prec : VecBinaryOp<V4AsmStr<"div.rn.f32">, fdiv, V4F32Regs,
-  FDIV32rr_prec>, Requires<[reqPTX20]>;
-def V2F32Div_prec : VecBinaryOp<V2AsmStr<"div.rn.f32">, fdiv, V2F32Regs,
-  FDIV32rr_prec>, Requires<[reqPTX20]>;
-def V2F32Div_ftz : VecBinaryOp<V2AsmStr<"div.full.ftz.f32">, fdiv, V2F32Regs,
-  FDIV32rr_ftz>, Requires<[doF32FTZ]>;
-def V4F32Div_ftz : VecBinaryOp<V4AsmStr<"div.full.ftz.f32">, fdiv, V4F32Regs,
-  FDIV32rr_ftz>, Requires<[doF32FTZ]>;
-def V2F32Div : VecBinaryOp<V2AsmStr<"div.full.f32">, fdiv, V2F32Regs, FDIV32rr>;
-def V4F32Div : VecBinaryOp<V4AsmStr<"div.full.f32">, fdiv, V4F32Regs, FDIV32rr>;
-def V2F64Div : VecBinaryOp<V2AsmStr<"div.rn.f64">, fdiv, V2F64Regs, FDIV64rr>;
-}
-
-def fnegpat : PatFrag<(ops node:$in), (fneg node:$in)>;
-
-let VecInstType=isVecOther.Value in {
-def VNegv2f32_ftz : VecUnaryOp<V2UnaryStr<"neg.ftz.f32">, fnegpat, V2F32Regs,
-  FNEGf32_ftz>, Requires<[doF32FTZ]>;
-def VNegv4f32_ftz : VecUnaryOp<V4UnaryStr<"neg.ftz.f32">, fnegpat, V4F32Regs,
-  FNEGf32_ftz>, Requires<[doF32FTZ]>;
-def VNegv2f32 : VecUnaryOp<V2UnaryStr<"neg.f32">, fnegpat, V2F32Regs, FNEGf32>;
-def VNegv4f32 : VecUnaryOp<V4UnaryStr<"neg.f32">, fnegpat, V4F32Regs, FNEGf32>;
-def VNegv2f64 : VecUnaryOp<V2UnaryStr<"neg.f64">, fnegpat, V2F64Regs, FNEGf64>;
-
-// Logical Arithmetic
-defm VAnd : IntBinVOp<"and.b", and, ANDb64rr, ANDb32rr, ANDb16rr, ANDb8rr>;
-defm VOr  : IntBinVOp<"or.b", or, ORb64rr, ORb32rr, ORb16rr, ORb8rr>;
-defm VXor : IntBinVOp<"xor.b", xor, XORb64rr, XORb32rr, XORb16rr, XORb8rr>;
-
-defm VNot : IntUnaryVOp<"not.b", not, NOT64, NOT32, NOT16, NOT8>;
-}
-
-
-multiclass V2FPCONTRACT32_SUB_PAT<NVPTXInst Inst, Predicate Pred> {
-  def : Pat<(fsub V2F32Regs:$a, (fmul V2F32Regs:$b, V2F32Regs:$c)),
-          (Inst (VNegv2f32 V2F32Regs:$b), V2F32Regs:$c,  V2F32Regs:$a)>,
-          Requires<[Pred]>;
-
-  def : Pat<(fsub (fmul V2F32Regs:$a, V2F32Regs:$b), V2F32Regs:$c),
-          (Inst V2F32Regs:$a, V2F32Regs:$b, (VNegv2f32 V2F32Regs:$c))>,
-          Requires<[Pred]>;
-}
-
-defm V2FMAF32ext_ftz  : V2FPCONTRACT32_SUB_PAT<F32FMA_ftzV2, doFMAF32AGG_ftz>;
-defm V2FMADF32ext_ftz : V2FPCONTRACT32_SUB_PAT<F32MAD_ftzV2, doFMADF32_ftz>;
-defm V2FMAF32ext  : V2FPCONTRACT32_SUB_PAT<F32FMAV2, doFMAF32AGG>;
-defm V2FMADF32ext : V2FPCONTRACT32_SUB_PAT<F32MADV2, doFMADF32>;
-
-multiclass V4FPCONTRACT32_SUB_PAT<NVPTXInst Inst, Predicate Pred> {
-  def : Pat<(fsub V4F32Regs:$a, (fmul V4F32Regs:$b, V4F32Regs:$c)),
-          (Inst (VNegv4f32 V4F32Regs:$b), V4F32Regs:$c,  V4F32Regs:$a)>,
-          Requires<[Pred]>;
-
-  def : Pat<(fsub (fmul V4F32Regs:$a, V4F32Regs:$b), V4F32Regs:$c),
-          (Inst V4F32Regs:$a, V4F32Regs:$b, (VNegv4f32 V4F32Regs:$c))>,
-          Requires<[Pred]>;
-}
-
-defm V4FMAF32ext_ftz  : V4FPCONTRACT32_SUB_PAT<F32FMA_ftzV4, doFMAF32AGG_ftz>;
-defm V4FMADF32ext_ftz : V4FPCONTRACT32_SUB_PAT<F32MAD_ftzV4, doFMADF32_ftz>;
-defm V4FMAF32ext  : V4FPCONTRACT32_SUB_PAT<F32FMAV4, doFMAF32AGG>;
-defm V4FMADF32ext : V4FPCONTRACT32_SUB_PAT<F32MADV4, doFMADF32>;
-
-multiclass V2FPCONTRACT64_SUB_PAT<NVPTXInst Inst, Predicate Pred> {
-  def : Pat<(fsub V2F64Regs:$a, (fmul V2F64Regs:$b, V2F64Regs:$c)),
-          (Inst (VNegv2f64 V2F64Regs:$b), V2F64Regs:$c, V2F64Regs:$a)>,
-          Requires<[Pred]>;
-
-  def : Pat<(fsub (fmul V2F64Regs:$a, V2F64Regs:$b), V2F64Regs:$c),
-          (Inst V2F64Regs:$a, V2F64Regs:$b, (VNegv2f64 V2F64Regs:$c))>,
-          Requires<[Pred]>;
-}
-
-defm V2FMAF64ext : V2FPCONTRACT64_SUB_PAT<F64FMAV2, doFMAF64AGG>;
-
-class VecModStr<string vecsize, string elem, string extra, string l="">
-{
-  string t1 = !strconcat("${c", elem);
-  string t2 = !strconcat(t1, ":vecv");
-  string t3 = !strconcat(t2, vecsize);
-  string t4 = !strconcat(t3, extra);
-  string t5 = !strconcat(t4, l);
-  string s =  !strconcat(t5, "}");
-}
-class ShuffleOneLine<string vecsize, string elem, string type>
-{
-  string t1 = VecModStr<vecsize, elem, "comm", "1">.s;
-  string t2 = !strconcat(t1, "mov.");
-  string t3 = !strconcat(t2, type);
-  string t4 = !strconcat(t3, " \t${dst}_");
-  string t5 = !strconcat(t4, elem);
-  string t6 = !strconcat(t5, ", $src1");
-  string t7 = !strconcat(t6, VecModStr<vecsize, elem, "pos">.s);
-  string t8 = !strconcat(t7, ";\n\t");
-  string t9 = !strconcat(t8, VecModStr<vecsize, elem, "comm", "2">.s);
-  string t10 = !strconcat(t9, "mov.");
-  string t11 = !strconcat(t10, type);
-  string t12 = !strconcat(t11, " \t${dst}_");
-  string t13 = !strconcat(t12, elem);
-  string t14 = !strconcat(t13, ", $src2");
-  string t15 = !strconcat(t14, VecModStr<vecsize, elem, "pos">.s);
-  string s =   !strconcat(t15, ";");
-}
-class ShuffleAsmStr2<string type>
-{
-  string t1 = ShuffleOneLine<"2", "0", type>.s;
-  string t2 = !strconcat(t1, "\n\t");
-  string s  = !strconcat(t2, ShuffleOneLine<"2", "1", type>.s);
-}
-class ShuffleAsmStr4<string type>
-{
-  string t1 = ShuffleOneLine<"4", "0", type>.s;
-  string t2 = !strconcat(t1, "\n\t");
-  string t3 = !strconcat(t2, ShuffleOneLine<"4", "1", type>.s);
-  string t4 = !strconcat(t3, "\n\t");
-  string t5 = !strconcat(t4, ShuffleOneLine<"4", "2", type>.s);
-  string t6 = !strconcat(t5, "\n\t");
-  string s  = !strconcat(t6, ShuffleOneLine<"4", "3", type>.s);
-}
-
-let hasSideEffects=0, VecInstType=isVecShuffle.Value in {
-def VecShuffle_v4f32 : NVPTXVecInst<(outs V4F32Regs:$dst),
-                       (ins  V4F32Regs:$src1, V4F32Regs:$src2,
-                             i8imm:$c0, i8imm:$c1, i8imm:$c2, i8imm:$c3),
-                 !strconcat("//Mov $dst, $src1, $src2, $c0, $c1, $c2, $c3;\n\t",
-                                 ShuffleAsmStr4<"f32">.s),
-                       [], FMOV32rr>;
-
-def VecShuffle_v4i32 : NVPTXVecInst<(outs V4I32Regs:$dst),
-                       (ins  V4I32Regs:$src1, V4I32Regs:$src2,
-                             i8imm:$c0, i8imm:$c1, i8imm:$c2, i8imm:$c3),
-                 !strconcat("//Mov $dst, $src1, $src2, $c0, $c1, $c2, $c3;\n\t",
-                                 ShuffleAsmStr4<"u32">.s),
-                       [], IMOV32rr>;
-
-def VecShuffle_v4i16 : NVPTXVecInst<(outs V4I16Regs:$dst),
-                       (ins  V4I16Regs:$src1, V4I16Regs:$src2,
-                             i8imm:$c0, i8imm:$c1, i8imm:$c2, i8imm:$c3),
-                 !strconcat("//Mov $dst, $src1, $src2, $c0, $c1, $c2, $c3;\n\t",
-                                 ShuffleAsmStr4<"u16">.s),
-                       [], IMOV16rr>;
-
-def VecShuffle_v4i8 : NVPTXVecInst<(outs V4I8Regs:$dst),
-                       (ins  V4I8Regs:$src1, V4I8Regs:$src2,
-                             i8imm:$c0, i8imm:$c1, i8imm:$c2, i8imm:$c3),
-                 !strconcat("//Mov $dst, $src1, $src2, $c0, $c1, $c2, $c3;\n\t",
-                                 ShuffleAsmStr4<"u16">.s),
-                       [], IMOV8rr>;
-
-def VecShuffle_v2f32 : NVPTXVecInst<(outs V2F32Regs:$dst),
-                       (ins  V2F32Regs:$src1, V2F32Regs:$src2,
-                             i8imm:$c0, i8imm:$c1),
-                       !strconcat("//Mov $dst, $src1, $src2, $c0, $c1;\n\t",
-                                 ShuffleAsmStr2<"f32">.s),
-                       [], FMOV32rr>;
-
-def VecShuffle_v2i32 : NVPTXVecInst<(outs V2I32Regs:$dst),
-                       (ins  V2I32Regs:$src1, V2I32Regs:$src2,
-                             i8imm:$c0, i8imm:$c1),
-                       !strconcat("//Mov $dst, $src1, $src2, $c0, $c1;\n\t",
-                                 ShuffleAsmStr2<"u32">.s),
-                       [], IMOV32rr>;
-
-def VecShuffle_v2i8 : NVPTXVecInst<(outs V2I8Regs:$dst),
-                       (ins  V2I8Regs:$src1, V2I8Regs:$src2,
-                             i8imm:$c0, i8imm:$c1),
-                       !strconcat("//Mov $dst, $src1, $src2, $c0, $c1;\n\t",
-                                 ShuffleAsmStr2<"u16">.s),
-                       [], IMOV8rr>;
-
-def VecShuffle_v2i16 : NVPTXVecInst<(outs V2I16Regs:$dst),
-                       (ins  V2I16Regs:$src1, V2I16Regs:$src2,
-                             i8imm:$c0, i8imm:$c1),
-                       !strconcat("//Mov $dst, $src1, $src2, $c0, $c1;\n\t",
-                                 ShuffleAsmStr2<"u16">.s),
-                       [], IMOV16rr>;
-
-def VecShuffle_v2f64 : NVPTXVecInst<(outs V2F64Regs:$dst),
-                       (ins  V2F64Regs:$src1, V2F64Regs:$src2,
-                             i8imm:$c0, i8imm:$c1),
-                       !strconcat("//Mov $dst, $src1, $src2, $c0, $c1;\n\t",
-                                 ShuffleAsmStr2<"f64">.s),
-                       [], FMOV64rr>;
-
-def VecShuffle_v2i64 : NVPTXVecInst<(outs V2I64Regs:$dst),
-                       (ins  V2I64Regs:$src1, V2I64Regs:$src2,
-                             i8imm:$c0, i8imm:$c1),
-                       !strconcat("//Mov $dst, $src1, $src2, $c0, $c1;\n\t",
-                                 ShuffleAsmStr2<"u64">.s),
-                       [], IMOV64rr>;
-}
-
-def ShuffleMask0 : SDNodeXForm<vector_shuffle, [{
-  ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(N);
-  return CurDAG->getTargetConstant(SVOp->getMaskElt(0), SDLoc(N), MVT::i32);
-}]>;
-def ShuffleMask1 : SDNodeXForm<vector_shuffle, [{
-  ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(N);
-  return CurDAG->getTargetConstant(SVOp->getMaskElt(1), SDLoc(N), MVT::i32);
-}]>;
-def ShuffleMask2 : SDNodeXForm<vector_shuffle, [{
-  ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(N);
-  return CurDAG->getTargetConstant(SVOp->getMaskElt(2), SDLoc(N), MVT::i32);
-}]>;
-def ShuffleMask3 : SDNodeXForm<vector_shuffle, [{
-  ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(N);
-  return CurDAG->getTargetConstant(SVOp->getMaskElt(3), SDLoc(N), MVT::i32);
-}]>;
-
-// The spurious call is here to silence a compiler warning about N being
-// unused.
-def vec_shuf : PatFrag<(ops node:$lhs, node:$rhs),
-                       (vector_shuffle node:$lhs, node:$rhs),
-                       [{ N->getGluedNode(); return true; }]>;
-
-def : Pat<(v2f64 (vec_shuf:$op V2F64Regs:$src1, V2F64Regs:$src2)),
-          (VecShuffle_v2f64 V2F64Regs:$src1, V2F64Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op))>;
-
-def : Pat<(v4f32 (vec_shuf:$op V4F32Regs:$src1, V4F32Regs:$src2)),
-          (VecShuffle_v4f32 V4F32Regs:$src1, V4F32Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op),
-                            (ShuffleMask2 node:$op), (ShuffleMask3 node:$op))>;
-
-def : Pat<(v2f32 (vec_shuf:$op V2F32Regs:$src1, V2F32Regs:$src2)),
-          (VecShuffle_v2f32 V2F32Regs:$src1, V2F32Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op))>;
-
-def : Pat<(v2i64 (vec_shuf:$op V2I64Regs:$src1, V2I64Regs:$src2)),
-          (VecShuffle_v2i64 V2I64Regs:$src1, V2I64Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op))>;
-
-def : Pat<(v4i32 (vec_shuf:$op V4I32Regs:$src1, V4I32Regs:$src2)),
-          (VecShuffle_v4i32 V4I32Regs:$src1, V4I32Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op),
-                            (ShuffleMask2 node:$op), (ShuffleMask3 node:$op))>;
-
-def : Pat<(v2i32 (vec_shuf:$op V2I32Regs:$src1, V2I32Regs:$src2)),
-          (VecShuffle_v2i32 V2I32Regs:$src1, V2I32Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op))>;
-
-def : Pat<(v4i16 (vec_shuf:$op V4I16Regs:$src1, V4I16Regs:$src2)),
-          (VecShuffle_v4i16 V4I16Regs:$src1, V4I16Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op),
-                            (ShuffleMask2 node:$op), (ShuffleMask3 node:$op))>;
-
-def : Pat<(v2i16 (vec_shuf:$op V2I16Regs:$src1, V2I16Regs:$src2)),
-          (VecShuffle_v2i16 V2I16Regs:$src1, V2I16Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op))>;
-
-def : Pat<(v4i8 (vec_shuf:$op V4I8Regs:$src1, V4I8Regs:$src2)),
-          (VecShuffle_v4i8 V4I8Regs:$src1, V4I8Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op),
-                            (ShuffleMask2 node:$op), (ShuffleMask3 node:$op))>;
-
-def : Pat<(v2i8 (vec_shuf:$op V2I8Regs:$src1, V2I8Regs:$src2)),
-          (VecShuffle_v2i8 V2I8Regs:$src1, V2I8Regs:$src2,
-                            (ShuffleMask0 node:$op), (ShuffleMask1 node:$op))>;
-
-class Build_Vector2<string asmstr, NVPTXRegClass vclass, NVPTXRegClass sclass,
-  NVPTXInst si>
-                   : NVPTXVecInst<(outs vclass:$dst),
-                   (ins  sclass:$a1, sclass:$a2),
-                   !strconcat(asmstr, "\t${dst:vecfull}, {{$a1, $a2}};"),
-                   [(set vclass:$dst, (build_vector sclass:$a1, sclass:$a2))],
-                   si>;
-class Build_Vector4<string asmstr, NVPTXRegClass vclass, NVPTXRegClass sclass,
-  NVPTXInst si>
-                   : NVPTXVecInst<(outs vclass:$dst),
-                   (ins  sclass:$a1, sclass:$a2, sclass:$a3, sclass:$a4),
-               !strconcat(asmstr, "\t${dst:vecfull}, {{$a1, $a2, $a3, $a4}};"),
-                   [(set vclass:$dst,
-                     (build_vector sclass:$a1, sclass:$a2,
-                       sclass:$a3, sclass:$a4))], si>;
-
-let isAsCheapAsAMove=1, VecInstType=isVecBuild.Value in {
-def Build_Vector2_f32 : Build_Vector2<"mov.v2.f32", V2F32Regs, Float32Regs,
-  FMOV32rr>;
-def Build_Vector2_f64 : Build_Vector2<"mov.v2.f64", V2F64Regs, Float64Regs,
-  FMOV64rr>;
-
-def Build_Vector2_i32 : Build_Vector2<"mov.v2.u32", V2I32Regs, Int32Regs,
-  IMOV32rr>;
-def Build_Vector2_i64 : Build_Vector2<"mov.v2.u64", V2I64Regs, Int64Regs,
-  IMOV64rr>;
-def Build_Vector2_i16 : Build_Vector2<"mov.v2.u16", V2I16Regs, Int16Regs,
-  IMOV16rr>;
-def Build_Vector2_i8  : Build_Vector2<"mov.v2.u16",  V2I8Regs,  Int8Regs,
-  IMOV8rr>;
-
-def Build_Vector4_f32 : Build_Vector4<"mov.v4.f32", V4F32Regs, Float32Regs,
-  FMOV32rr>;
-
-def Build_Vector4_i32 : Build_Vector4<"mov.v4.u32", V4I32Regs, Int32Regs,
-  IMOV32rr>;
-def Build_Vector4_i16 : Build_Vector4<"mov.v4.u16", V4I16Regs, Int16Regs,
-  IMOV16rr>;
-def Build_Vector4_i8  : Build_Vector4<"mov.v4.u16", V4I8Regs, Int8Regs,
-  IMOV8rr>;
-}
-
-class Vec_Move<string asmstr, NVPTXRegClass vclass, NVPTXInst sop=NOP>
-                 : NVPTXVecInst<(outs vclass:$dst), (ins vclass:$src),
-                   !strconcat(asmstr, "\t${dst:vecfull}, ${src:vecfull};"),
-                   [], sop>;
-
-let isAsCheapAsAMove=1, hasSideEffects=0, IsSimpleMove=1,
-  VecInstType=isVecOther.Value in {
-def V4f32Mov : Vec_Move<"mov.v4.f32", V4F32Regs, FMOV32rr>;
-def V2f32Mov : Vec_Move<"mov.v2.f32", V2F32Regs, FMOV32rr>;
-
-def V4i32Mov : Vec_Move<"mov.v4.u32", V4I32Regs, IMOV32rr>;
-def V2i32Mov : Vec_Move<"mov.v2.u32", V2I32Regs, IMOV32rr>;
-
-def V4i16Mov : Vec_Move<"mov.v4.u16", V4I16Regs, IMOV16rr>;
-def V2i16Mov : Vec_Move<"mov.v2.u16", V2I16Regs, IMOV16rr>;
-
-def V4i8Mov : Vec_Move<"mov.v4.u16", V4I8Regs, IMOV8rr>;
-def V2i8Mov : Vec_Move<"mov.v2.u16", V2I8Regs, IMOV8rr>;
-
-def V2f64Mov : Vec_Move<"mov.v2.f64", V2F64Regs, FMOV64rr>;
-def V2i64Mov : Vec_Move<"mov.v2.u64", V2I64Regs, IMOV64rr>;
-}
-
-// extract subvector patterns
-def extract_subvec : SDNode<"ISD::EXTRACT_SUBVECTOR",
-                        SDTypeProfile<1, 2, [SDTCisPtrTy<2>]>>;
-
-def : Pat<(v2f32 (extract_subvec V4F32Regs:$src, 0)),
-                 (Build_Vector2_f32 (V4f32Extract V4F32Regs:$src, 0),
-                                    (V4f32Extract V4F32Regs:$src, 1))>;
-def : Pat<(v2f32 (extract_subvec V4F32Regs:$src, 2)),
-                 (Build_Vector2_f32 (V4f32Extract V4F32Regs:$src, 2),
-                                    (V4f32Extract V4F32Regs:$src, 3))>;
-def : Pat<(v2i32 (extract_subvec V4I32Regs:$src, 0)),
-                 (Build_Vector2_i32 (V4i32Extract V4I32Regs:$src, 0),
-                                    (V4i32Extract V4I32Regs:$src, 1))>;
-def : Pat<(v2i32 (extract_subvec V4I32Regs:$src, 2)),
-                 (Build_Vector2_i32 (V4i32Extract V4I32Regs:$src, 2),
-                                    (V4i32Extract V4I32Regs:$src, 3))>;
-def : Pat<(v2i16 (extract_subvec V4I16Regs:$src, 0)),
-                 (Build_Vector2_i16 (V4i16Extract V4I16Regs:$src, 0),
-                                    (V4i16Extract V4I16Regs:$src, 1))>;
-def : Pat<(v2i16 (extract_subvec V4I16Regs:$src, 2)),
-                 (Build_Vector2_i16 (V4i16Extract V4I16Regs:$src, 2),
-                                    (V4i16Extract V4I16Regs:$src, 3))>;
-def : Pat<(v2i8 (extract_subvec V4I8Regs:$src, 0)),
-                 (Build_Vector2_i8 (V4i8Extract V4I8Regs:$src, 0),
-                                    (V4i8Extract V4I8Regs:$src, 1))>;
-def : Pat<(v2i8 (extract_subvec V4I8Regs:$src, 2)),
-                 (Build_Vector2_i8 (V4i8Extract V4I8Regs:$src, 2),
-                                    (V4i8Extract V4I8Regs:$src, 3))>;
-
-// Select instructions
-class Select_OneLine<string type, string pos> {
-  string t1 = !strconcat("selp.", type);
-  string t2 = !strconcat(t1, " \t${dst}_");
-  string t3 = !strconcat(t2, pos);
-  string t4 = !strconcat(t3, ", ${src1}_");
-  string t5 = !strconcat(t4, pos);
-  string t6 = !strconcat(t5, ", ${src2}_");
-  string t7 = !strconcat(t6, pos);
-  string s  = !strconcat(t7, ", $p;");
-}
-
-class Select_Str2<string type> {
-  string t1 = Select_OneLine<type, "0">.s;
-  string t2 = !strconcat(t1, "\n\t");
-  string s  = !strconcat(t2, Select_OneLine<type, "1">.s);
-}
-
-class Select_Str4<string type> {
-  string t1 = Select_OneLine<type, "0">.s;
-  string t2 = !strconcat(t1, "\n\t");
-  string t3 = !strconcat(t2, Select_OneLine<type, "1">.s);
-  string t4 = !strconcat(t3, "\n\t");
-  string t5 = !strconcat(t4, Select_OneLine<type, "2">.s);
-  string t6 = !strconcat(t5, "\n\t");
-  string s  = !strconcat(t6, Select_OneLine<type, "3">.s);
-
-}
-
-class Vec_Select<NVPTXRegClass vclass, string asmstr, NVPTXInst sop>
-      : NVPTXVecInst<(outs vclass:$dst),
-                     (ins  vclass:$src1, vclass:$src2, Int1Regs:$p),
-                     asmstr,
-                     [(set vclass:$dst, (select Int1Regs:$p, vclass:$src1,
-                       vclass:$src2))],
-                     sop>;
-
-let VecInstType=isVecOther.Value in {
-def V2I64_Select : Vec_Select<V2I64Regs, Select_Str2<"b64">.s, SELECTi64rr>;
-def V4I32_Select : Vec_Select<V4I32Regs, Select_Str4<"b32">.s, SELECTi32rr>;
-def V2I32_Select : Vec_Select<V2I32Regs, Select_Str2<"b32">.s, SELECTi32rr>;
-def V4I16_Select : Vec_Select<V4I16Regs, Select_Str4<"b16">.s, SELECTi16rr>;
-def V2I16_Select : Vec_Select<V2I16Regs, Select_Str2<"b16">.s, SELECTi16rr>;
-def V4I8_Select  : Vec_Select<V4I8Regs,  Select_Str4<"b16">.s, SELECTi8rr>;
-def V2I8_Select  : Vec_Select<V2I8Regs,  Select_Str2<"b16">.s, SELECTi8rr>;
-
-def V2F64_Select : Vec_Select<V2F64Regs, Select_Str2<"f64">.s, SELECTf64rr>;
-def V4F32_Select : Vec_Select<V4F32Regs, Select_Str4<"f32">.s, SELECTf32rr>;
-def V2F32_Select : Vec_Select<V2F32Regs, Select_Str2<"f32">.s, SELECTf32rr>;
-}
-
-// Comparison instructions
-
-// setcc convenience fragments.
-def vsetoeq : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETOEQ)>;
-def vsetogt : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETOGT)>;
-def vsetoge : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETOGE)>;
-def vsetolt : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETOLT)>;
-def vsetole : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETOLE)>;
-def vsetone : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETONE)>;
-def vseto   : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETO)>;
-def vsetuo  : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETUO)>;
-def vsetueq : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETUEQ)>;
-def vsetugt : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETUGT)>;
-def vsetuge : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETUGE)>;
-def vsetult : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETULT)>;
-def vsetule : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETULE)>;
-def vsetune : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETUNE)>;
-def vseteq  : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETEQ)>;
-def vsetgt  : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETGT)>;
-def vsetge  : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETGE)>;
-def vsetlt  : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETLT)>;
-def vsetle  : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETLE)>;
-def vsetne  : PatFrag<(ops node:$lhs, node:$rhs),
-                      (setcc node:$lhs, node:$rhs, SETNE)>;
-
-class Vec_Compare<PatFrag op, NVPTXRegClass outrclass, NVPTXRegClass inrclass,
-  NVPTXInst sop>
-    : NVPTXVecInst<(outs outrclass:$dst),
-                   (ins  inrclass:$a, inrclass:$b),
-                   "Unsupported",
-                   [(set outrclass:$dst, (op inrclass:$a, inrclass:$b))],
-                   sop>;
-
-multiclass Vec_Compare_All<PatFrag op,
-                           NVPTXInst inst8,
-                           NVPTXInst inst16,
-                           NVPTXInst inst32,
-                           NVPTXInst inst64>
-{
-  def  V2I8 : Vec_Compare<op, V2I8Regs,  V2I8Regs,  inst8>;
-  def  V4I8 : Vec_Compare<op, V4I8Regs,  V4I8Regs,  inst8>;
-  def V2I16 : Vec_Compare<op, V2I16Regs, V2I16Regs, inst16>;
-  def V4I16 : Vec_Compare<op, V4I16Regs, V4I16Regs, inst16>;
-  def V2I32 : Vec_Compare<op, V2I32Regs, V2I32Regs, inst32>;
-  def V4I32 : Vec_Compare<op, V4I32Regs, V4I32Regs, inst32>;
-  def V2I64 : Vec_Compare<op, V2I64Regs, V2I64Regs, inst64>;
-}
-
-let VecInstType=isVecOther.Value in {
-  defm VecSGT : Vec_Compare_All<vsetgt,  ISetSGTi8rr_toi8, ISetSGTi16rr_toi16,
-    ISetSGTi32rr_toi32, ISetSGTi64rr_toi64>;
-  defm VecUGT : Vec_Compare_All<vsetugt, ISetUGTi8rr_toi8, ISetUGTi16rr_toi16,
-    ISetUGTi32rr_toi32, ISetUGTi64rr_toi64>;
-  defm VecSLT : Vec_Compare_All<vsetlt,  ISetSLTi8rr_toi8, ISetSLTi16rr_toi16,
-    ISetSLTi32rr_toi32, ISetSLTi64rr_toi64>;
-  defm VecULT : Vec_Compare_All<vsetult, ISetULTi8rr_toi8, ISetULTi16rr_toi16,
-    ISetULTi32rr_toi32, ISetULTi64rr_toi64>;
-  defm VecSGE : Vec_Compare_All<vsetge,  ISetSGEi8rr_toi8, ISetSGEi16rr_toi16,
-    ISetSGEi32rr_toi32, ISetSGEi64rr_toi64>;
-  defm VecUGE : Vec_Compare_All<vsetuge, ISetUGEi8rr_toi8, ISetUGEi16rr_toi16,
-    ISetUGEi32rr_toi32, ISetUGEi64rr_toi64>;
-  defm VecSLE : Vec_Compare_All<vsetle,  ISetSLEi8rr_toi8, ISetSLEi16rr_toi16,
-    ISetSLEi32rr_toi32, ISetSLEi64rr_toi64>;
-  defm VecULE : Vec_Compare_All<vsetule, ISetULEi8rr_toi8, ISetULEi16rr_toi16,
-    ISetULEi32rr_toi32, ISetULEi64rr_toi64>;
-  defm VecSEQ : Vec_Compare_All<vseteq,  ISetSEQi8rr_toi8, ISetSEQi16rr_toi16,
-    ISetSEQi32rr_toi32, ISetSEQi64rr_toi64>;
-  defm VecUEQ : Vec_Compare_All<vsetueq, ISetUEQi8rr_toi8, ISetUEQi16rr_toi16,
-    ISetUEQi32rr_toi32, ISetUEQi64rr_toi64>;
-  defm VecSNE : Vec_Compare_All<vsetne,  ISetSNEi8rr_toi8, ISetSNEi16rr_toi16,
-    ISetSNEi32rr_toi32, ISetSNEi64rr_toi64>;
-  defm VecUNE : Vec_Compare_All<vsetune, ISetUNEi8rr_toi8, ISetUNEi16rr_toi16,
-    ISetUNEi32rr_toi32, ISetUNEi64rr_toi64>;
-}
-
-multiclass FVec_Compare_All<PatFrag op,
-                            NVPTXInst instf32,
-                            NVPTXInst instf64>
-{
-  def V2F32 : Vec_Compare<op, V2I32Regs, V2F32Regs, instf32>;
-  def V4F32 : Vec_Compare<op, V4I32Regs, V4F32Regs, instf32>;
-  def V2F64 : Vec_Compare<op, V2I64Regs, V2F64Regs, instf64>;
-}
-
-let VecInstType=isVecOther.Value in {
-  defm FVecGT :  FVec_Compare_All<vsetogt, FSetGTf32rr_toi32,
-    FSetGTf64rr_toi64>;
-  defm FVecLT :  FVec_Compare_All<vsetolt, FSetLTf32rr_toi32,
-    FSetLTf64rr_toi64>;
-  defm FVecGE :  FVec_Compare_All<vsetoge, FSetGEf32rr_toi32,
-    FSetGEf64rr_toi64>;
-  defm FVecLE :  FVec_Compare_All<vsetole, FSetLEf32rr_toi32,
-    FSetLEf64rr_toi64>;
-  defm FVecEQ :  FVec_Compare_All<vsetoeq, FSetEQf32rr_toi32,
-    FSetEQf64rr_toi64>;
-  defm FVecNE :  FVec_Compare_All<vsetone, FSetNEf32rr_toi32,
-    FSetNEf64rr_toi64>;
-
-  defm FVecUGT :  FVec_Compare_All<vsetugt, FSetUGTf32rr_toi32,
-    FSetUGTf64rr_toi64>;
-  defm FVecULT :  FVec_Compare_All<vsetult, FSetULTf32rr_toi32,
-    FSetULTf64rr_toi64>;
-  defm FVecUGE :  FVec_Compare_All<vsetuge, FSetUGEf32rr_toi32,
-    FSetUGEf64rr_toi64>;
-  defm FVecULE :  FVec_Compare_All<vsetule, FSetULEf32rr_toi32,
-    FSetULEf64rr_toi64>;
-  defm FVecUEQ :  FVec_Compare_All<vsetueq, FSetUEQf32rr_toi32,
-    FSetUEQf64rr_toi64>;
-  defm FVecUNE :  FVec_Compare_All<vsetune, FSetUNEf32rr_toi32,
-    FSetUNEf64rr_toi64>;
-
-  defm FVecNUM :  FVec_Compare_All<vseto,  FSetNUMf32rr_toi32,
-    FSetNUMf64rr_toi64>;
-  defm FVecNAN :  FVec_Compare_All<vsetuo, FSetNANf32rr_toi32,
-    FSetNANf64rr_toi64>;
-}
-
-class LoadParamScalar4Inst<NVPTXRegClass regclass, string opstr> :
-      NVPTXInst<(outs regclass:$d1, regclass:$d2, regclass:$d3, regclass:$d4),
-                (ins i32imm:$a, i32imm:$b),
-                !strconcat(!strconcat("ld.param", opstr),
-                  "\t{{$d1, $d2, $d3, $d4}}, [retval0+$b];"), []>;
-
-class LoadParamScalar2Inst<NVPTXRegClass regclass, string opstr> :
-      NVPTXInst<(outs regclass:$d1, regclass:$d2),
-                (ins i32imm:$a, i32imm:$b),
-                !strconcat(!strconcat("ld.param", opstr),
-                  "\t{{$d1, $d2}}, [retval0+$b];"), []>;
-
-
-class StoreParamScalar4Inst<NVPTXRegClass regclass, string opstr> :
-      NVPTXInst<(outs),
-                (ins regclass:$s1, regclass:$s2, regclass:$s3, regclass:$s4,
-                  i32imm:$a, i32imm:$b),
-                !strconcat(!strconcat("st.param", opstr),
-                  "\t[param$a+$b], {{$s1, $s2, $s3, $s4}};"), []>;
-
-class StoreParamScalar2Inst<NVPTXRegClass regclass, string opstr> :
-      NVPTXInst<(outs),
-                (ins regclass:$s1, regclass:$s2, i32imm:$a, i32imm:$b),
-                !strconcat(!strconcat("st.param", opstr),
-                  "\t[param$a+$b], {{$s1, $s2}};"), []>;
-
-class StoreRetvalScalar4Inst<NVPTXRegClass regclass, string opstr> :
-      NVPTXInst<(outs),
-                (ins regclass:$s1, regclass:$s2, regclass:$s3, regclass:$s4,
-                  i32imm:$a),
-                !strconcat(!strconcat("st.param", opstr),
-                  "\t[func_retval+$a], {{$s1, $s2, $s3, $s4}};"), []>;
-
-class StoreRetvalScalar2Inst<NVPTXRegClass regclass, string opstr> :
-      NVPTXInst<(outs),
-                (ins regclass:$s1, regclass:$s2, i32imm:$a),
-                !strconcat(!strconcat("st.param", opstr),
-                  "\t[func_retval+$a], {{$s1, $s2}};"), []>;
-
-def LoadParamScalar4I32 : LoadParamScalar4Inst<Int32Regs, ".v4.b32">;
-def LoadParamScalar4I16 : LoadParamScalar4Inst<Int16Regs, ".v4.b16">;
-def LoadParamScalar4I8  : LoadParamScalar4Inst<Int8Regs, ".v4.b8">;
-
-def LoadParamScalar2I64 : LoadParamScalar2Inst<Int32Regs, ".v2.b64">;
-def LoadParamScalar2I32 : LoadParamScalar2Inst<Int32Regs, ".v2.b32">;
-def LoadParamScalar2I16 : LoadParamScalar2Inst<Int32Regs, ".v2.b16">;
-def LoadParamScalar2I8  : LoadParamScalar2Inst<Int32Regs, ".v2.b8">;
-
-def LoadParamScalar4F32 : LoadParamScalar4Inst<Float32Regs, ".v4.f32">;
-def LoadParamScalar2F32 : LoadParamScalar2Inst<Float32Regs, ".v2.f32">;
-def LoadParamScalar2F64 : LoadParamScalar2Inst<Float64Regs, ".v2.f64">;
-
-def StoreParamScalar4I32 : StoreParamScalar4Inst<Int32Regs, ".v4.b32">;
-def StoreParamScalar4I16 : StoreParamScalar4Inst<Int16Regs, ".v4.b16">;
-def StoreParamScalar4I8  : StoreParamScalar4Inst<Int8Regs, ".v4.b8">;
-
-def StoreParamScalar2I64 : StoreParamScalar2Inst<Int64Regs, ".v2.b64">;
-def StoreParamScalar2I32 : StoreParamScalar2Inst<Int32Regs, ".v2.b32">;
-def StoreParamScalar2I16 : StoreParamScalar2Inst<Int16Regs, ".v2.b16">;
-def StoreParamScalar2I8  : StoreParamScalar2Inst<Int8Regs, ".v2.b8">;
-
-def StoreParamScalar4F32 : StoreParamScalar4Inst<Float32Regs, ".v4.f32">;
-def StoreParamScalar2F32 : StoreParamScalar2Inst<Float32Regs, ".v2.f32">;
-def StoreParamScalar2F64 : StoreParamScalar2Inst<Float64Regs, ".v2.f64">;
-
-def StoreRetvalScalar4I32 : StoreRetvalScalar4Inst<Int32Regs, ".v4.b32">;
-def StoreRetvalScalar4I16 : StoreRetvalScalar4Inst<Int16Regs, ".v4.b16">;
-def StoreRetvalScalar4I8  : StoreRetvalScalar4Inst<Int8Regs, ".v4.b8">;
-
-def StoreRetvalScalar2I64 : StoreRetvalScalar2Inst<Int64Regs, ".v2.b64">;
-def StoreRetvalScalar2I32 : StoreRetvalScalar2Inst<Int32Regs, ".v2.b32">;
-def StoreRetvalScalar2I16 : StoreRetvalScalar2Inst<Int16Regs, ".v2.b16">;
-def StoreRetvalScalar2I8  : StoreRetvalScalar2Inst<Int8Regs, ".v2.b8">;
-
-def StoreRetvalScalar4F32 : StoreRetvalScalar4Inst<Float32Regs, ".v4.f32">;
-def StoreRetvalScalar2F32 : StoreRetvalScalar2Inst<Float32Regs, ".v2.f32">;
-def StoreRetvalScalar2F64 : StoreRetvalScalar2Inst<Float64Regs, ".v2.f64">;
-
-class LoadParamVecInst<NVPTXRegClass regclass, string opstr, NVPTXInst sop=NOP>:
-      NVPTXVecInst<(outs regclass:$dst), (ins i32imm:$a, i32imm:$b),
-                "loadparam : $dst <- [$a, $b]",
-                [(set regclass:$dst, (LoadParam (i32 imm:$a), (i32 imm:$b)))],
-                sop>;
-
-class StoreParamVecInst<NVPTXRegClass regclass, string opstr, NVPTXInst sop=NOP>
-      : NVPTXVecInst<(outs), (ins regclass:$val, i32imm:$a, i32imm:$b),
-                "storeparam : [$a, $b] <- $val",
-                [(StoreParam (i32 imm:$a), (i32 imm:$b), regclass:$val)], sop>;
-
-class StoreRetvalVecInst<NVPTXRegClass regclass, string opstr,
-  NVPTXInst sop=NOP>
-      : NVPTXVecInst<(outs), (ins regclass:$val, i32imm:$a),
-                "storeretval : retval[$a] <- $val",
-                [(StoreRetval (i32 imm:$a), regclass:$val)], sop>;
-
-let VecInstType=isVecLD.Value in {
-def LoadParamV4I32  : LoadParamVecInst<V4I32Regs, ".v4.b32",
-  LoadParamScalar4I32>;
-def LoadParamV4I16  : LoadParamVecInst<V4I16Regs, ".v4.b16",
-  LoadParamScalar4I16>;
-def LoadParamV4I8   : LoadParamVecInst<V4I8Regs, ".v4.b8",
-  LoadParamScalar4I8>;
-
-def LoadParamV2I64  : LoadParamVecInst<V2I64Regs, ".v2.b64",
-  LoadParamScalar2I64>;
-def LoadParamV2I32  : LoadParamVecInst<V2I32Regs, ".v2.b32",
-  LoadParamScalar2I32>;
-def LoadParamV2I16  : LoadParamVecInst<V2I16Regs, ".v2.b16",
-  LoadParamScalar2I16>;
-def LoadParamV2I8   : LoadParamVecInst<V2I8Regs, ".v2.b8",
-  LoadParamScalar2I8>;
-
-def LoadParamV4F32  : LoadParamVecInst<V4F32Regs, ".v4.f32",
-  LoadParamScalar4F32>;
-def LoadParamV2F32  : LoadParamVecInst<V2F32Regs, ".v2.f32",
-  LoadParamScalar2F32>;
-def LoadParamV2F64  : LoadParamVecInst<V2F64Regs, ".v2.f64",
-  LoadParamScalar2F64>;
-}
-
-let VecInstType=isVecST.Value in {
-def StoreParamV4I32  : StoreParamVecInst<V4I32Regs, ".v4.b32",
-  StoreParamScalar4I32>;
-def StoreParamV4I16  : StoreParamVecInst<V4I16Regs, ".v4.b16",
-  StoreParamScalar4I16>;
-def StoreParamV4I8   : StoreParamVecInst<V4I8Regs, ".v4.b8",
-  StoreParamScalar4I8>;
-
-def StoreParamV2I64  : StoreParamVecInst<V2I64Regs, ".v2.b64",
-  StoreParamScalar2I64>;
-def StoreParamV2I32  : StoreParamVecInst<V2I32Regs, ".v2.b32",
-  StoreParamScalar2I32>;
-def StoreParamV2I16  : StoreParamVecInst<V2I16Regs, ".v2.b16",
-  StoreParamScalar2I16>;
-def StoreParamV2I8   : StoreParamVecInst<V2I8Regs, ".v2.b8",
-  StoreParamScalar2I8>;
-
-def StoreParamV4F32  : StoreParamVecInst<V4F32Regs, ".v4.f32",
-  StoreParamScalar4F32>;
-def StoreParamV2F32  : StoreParamVecInst<V2F32Regs, ".v2.f32",
-  StoreParamScalar2F32>;
-def StoreParamV2F64  : StoreParamVecInst<V2F64Regs, ".v2.f64",
-  StoreParamScalar2F64>;
-
-def StoreRetvalV4I32  : StoreRetvalVecInst<V4I32Regs, ".v4.b32",
-  StoreRetvalScalar4I32>;
-def StoreRetvalV4I16  : StoreRetvalVecInst<V4I16Regs, ".v4.b16",
-  StoreRetvalScalar4I16>;
-def StoreRetvalV4I8   : StoreRetvalVecInst<V4I8Regs,  ".v4.b8",
-  StoreRetvalScalar4I8>;
-
-def StoreRetvalV2I64  : StoreRetvalVecInst<V2I64Regs, ".v2.b64",
-  StoreRetvalScalar2I64>;
-def StoreRetvalV2I32  : StoreRetvalVecInst<V2I32Regs, ".v2.b32",
-  StoreRetvalScalar2I32>;
-def StoreRetvalV2I16  : StoreRetvalVecInst<V2I16Regs, ".v2.b16",
-  StoreRetvalScalar2I16>;
-def StoreRetvalV2I8   : StoreRetvalVecInst<V2I8Regs,  ".v2.b8",
-  StoreRetvalScalar2I8>;
-
-def StoreRetvalV4F32  : StoreRetvalVecInst<V4F32Regs, ".v4.f32",
-  StoreRetvalScalar4F32>;
-def StoreRetvalV2F32  : StoreRetvalVecInst<V2F32Regs, ".v2.f32",
-  StoreRetvalScalar2F32>;
-def StoreRetvalV2F64  : StoreRetvalVecInst<V2F64Regs, ".v2.f64",
-  StoreRetvalScalar2F64>;
-
-}
-
-
-// Int vector to int scalar bit convert
-// v4i8 -> i32
-def : Pat<(i32 (bitconvert V4I8Regs:$s)),
-          (V4I8toI32 (V4i8Extract V4I8Regs:$s,0), (V4i8Extract V4I8Regs:$s,1),
-                     (V4i8Extract V4I8Regs:$s,2), (V4i8Extract V4I8Regs:$s,3))>;
-// v4i16 -> i64
-def : Pat<(i64 (bitconvert V4I16Regs:$s)),
-          (V4I16toI64 (V4i16Extract V4I16Regs:$s,0),
-            (V4i16Extract V4I16Regs:$s,1),
-                     (V4i16Extract V4I16Regs:$s,2),
-                     (V4i16Extract V4I16Regs:$s,3))>;
-// v2i8 -> i16
-def : Pat<(i16 (bitconvert V2I8Regs:$s)),
-          (V2I8toI16 (V2i8Extract V2I8Regs:$s,0), (V2i8Extract V2I8Regs:$s,1))>;
-// v2i16 -> i32
-def : Pat<(i32 (bitconvert V2I16Regs:$s)),
-          (V2I16toI32 (V2i16Extract V2I16Regs:$s,0),
-            (V2i16Extract V2I16Regs:$s,1))>;
-// v2i32 -> i64
-def : Pat<(i64 (bitconvert V2I32Regs:$s)),
-          (V2I32toI64 (V2i32Extract V2I32Regs:$s,0),
-            (V2i32Extract V2I32Regs:$s,1))>;
-
-// Int scalar to int vector bit convert
-let VecInstType=isVecDest.Value in {
-// i32 -> v4i8
-def VecI32toV4I8 : NVPTXVecInst<(outs V4I8Regs:$d), (ins Int32Regs:$s),
-                                "Error!",
-                                [(set V4I8Regs:$d, (bitconvert Int32Regs:$s))],
-                                I32toV4I8>;
-// i64 -> v4i16
-def VecI64toV4I16 : NVPTXVecInst<(outs V4I16Regs:$d), (ins Int64Regs:$s),
-                                 "Error!",
-                                [(set V4I16Regs:$d, (bitconvert Int64Regs:$s))],
-                                 I64toV4I16>;
-// i16 -> v2i8
-def VecI16toV2I8 : NVPTXVecInst<(outs V2I8Regs:$d), (ins Int16Regs:$s),
-                                "Error!",
-                               [(set V2I8Regs:$d, (bitconvert Int16Regs:$s))],
-                                I16toV2I8>;
-// i32 -> v2i16
-def VecI32toV2I16 : NVPTXVecInst<(outs V2I16Regs:$d), (ins Int32Regs:$s),
-                                 "Error!",
-                                [(set V2I16Regs:$d, (bitconvert Int32Regs:$s))],
-                                 I32toV2I16>;
-// i64 -> v2i32
-def VecI64toV2I32 : NVPTXVecInst<(outs V2I32Regs:$d), (ins Int64Regs:$s),
-                                  "Error!",
-                                [(set V2I32Regs:$d, (bitconvert Int64Regs:$s))],
-                                  I64toV2I32>;
-}
-
-// Int vector to int vector bit convert
-// v4i8 -> v2i16
-def : Pat<(v2i16 (bitconvert V4I8Regs:$s)),
-          (VecI32toV2I16
-          (V4I8toI32 (V4i8Extract V4I8Regs:$s,0), (V4i8Extract V4I8Regs:$s,1),
-                    (V4i8Extract V4I8Regs:$s,2), (V4i8Extract V4I8Regs:$s,3)))>;
-// v4i16 -> v2i32
-def : Pat<(v2i32 (bitconvert V4I16Regs:$s)),
-          (VecI64toV2I32
-       (V4I16toI64 (V4i16Extract V4I16Regs:$s,0), (V4i16Extract V4I16Regs:$s,1),
-                (V4i16Extract V4I16Regs:$s,2), (V4i16Extract V4I16Regs:$s,3)))>;
-// v2i16 -> v4i8
-def : Pat<(v4i8 (bitconvert V2I16Regs:$s)),
-          (VecI32toV4I8
-    (V2I16toI32 (V2i16Extract V2I16Regs:$s,0), (V2i16Extract V2I16Regs:$s,1)))>;
-// v2i32 -> v4i16
-def : Pat<(v4i16 (bitconvert V2I32Regs:$s)),
-          (VecI64toV4I16
-    (V2I32toI64 (V2i32Extract V2I32Regs:$s,0), (V2i32Extract V2I32Regs:$s,1)))>;
-// v2i64 -> v4i32
-def : Pat<(v4i32 (bitconvert V2I64Regs:$s)),
-          (Build_Vector4_i32
-            (V2i32Extract (VecI64toV2I32 (V2i64Extract V2I64Regs:$s, 0)), 0),
-            (V2i32Extract (VecI64toV2I32 (V2i64Extract V2I64Regs:$s, 0)), 1),
-            (V2i32Extract (VecI64toV2I32 (V2i64Extract V2I64Regs:$s, 1)), 0),
-            (V2i32Extract (VecI64toV2I32 (V2i64Extract V2I64Regs:$s, 1)), 1))>;
-// v4i32 -> v2i64
-def : Pat<(v2i64 (bitconvert V4I32Regs:$s)),
-          (Build_Vector2_i64
-      (V2I32toI64 (V4i32Extract V4I32Regs:$s,0), (V4i32Extract V4I32Regs:$s,1)),
-    (V2I32toI64 (V4i32Extract V4I32Regs:$s,2), (V4i32Extract V4I32Regs:$s,3)))>;
-
-// Fp scalar to fp vector convert
-// f64 -> v2f32
-let VecInstType=isVecDest.Value in {
-def VecF64toV2F32 : NVPTXVecInst<(outs V2F32Regs:$d), (ins Float64Regs:$s),
-                                  "Error!",
-                              [(set V2F32Regs:$d, (bitconvert Float64Regs:$s))],
-                                  F64toV2F32>;
-}
-
-// Fp vector to fp scalar convert
-// v2f32 -> f64
-def : Pat<(f64 (bitconvert V2F32Regs:$s)),
-     (V2F32toF64 (V2f32Extract V2F32Regs:$s,0), (V2f32Extract V2F32Regs:$s,1))>;
-
-// Fp scalar to int vector convert
-// f32 -> v4i8
-def : Pat<(v4i8 (bitconvert Float32Regs:$s)),
-          (VecI32toV4I8 (BITCONVERT_32_F2I Float32Regs:$s))>;
-// f32 -> v2i16
-def : Pat<(v2i16 (bitconvert Float32Regs:$s)),
-          (VecI32toV2I16 (BITCONVERT_32_F2I Float32Regs:$s))>;
-// f64 -> v4i16
-def : Pat<(v4i16 (bitconvert Float64Regs:$s)),
-          (VecI64toV4I16 (BITCONVERT_64_F2I Float64Regs:$s))>;
-// f64 -> v2i32
-def : Pat<(v2i32 (bitconvert Float64Regs:$s)),
-          (VecI64toV2I32 (BITCONVERT_64_F2I Float64Regs:$s))>;
-
-// Int vector to fp scalar convert
-// v4i8 -> f32
-def : Pat<(f32 (bitconvert V4I8Regs:$s)),
-          (BITCONVERT_32_I2F
-          (V4I8toI32 (V4i8Extract V4I8Regs:$s,0), (V4i8Extract V4I8Regs:$s,1),
-                    (V4i8Extract V4I8Regs:$s,2), (V4i8Extract V4I8Regs:$s,3)))>;
-// v4i16 -> f64
-def : Pat<(f64 (bitconvert V4I16Regs:$s)),
-          (BITCONVERT_64_I2F
-       (V4I16toI64 (V4i16Extract V4I16Regs:$s,0), (V4i16Extract V4I16Regs:$s,1),
-                (V4i16Extract V4I16Regs:$s,2), (V4i16Extract V4I16Regs:$s,3)))>;
-// v2i16 -> f32
-def : Pat<(f32 (bitconvert V2I16Regs:$s)),
-          (BITCONVERT_32_I2F
-    (V2I16toI32 (V2i16Extract V2I16Regs:$s,0), (V2i16Extract V2I16Regs:$s,1)))>;
-// v2i32 -> f64
-def : Pat<(f64 (bitconvert V2I32Regs:$s)),
-          (BITCONVERT_64_I2F
-    (V2I32toI64 (V2i32Extract V2I32Regs:$s,0), (V2i32Extract V2I32Regs:$s,1)))>;
-
-// Int scalar to fp vector convert
-// i64 -> v2f32
-def : Pat<(v2f32 (bitconvert Int64Regs:$s)),
-          (VecF64toV2F32 (BITCONVERT_64_I2F Int64Regs:$s))>;
-
-// Fp vector to int scalar convert
-// v2f32 -> i64
-def : Pat<(i64 (bitconvert V2F32Regs:$s)),
-          (BITCONVERT_64_F2I
-    (V2F32toF64 (V2f32Extract V2F32Regs:$s,0), (V2f32Extract V2F32Regs:$s,1)))>;
-
-// Int vector to fp vector convert
-// v2i64 -> v4f32
-def : Pat<(v4f32 (bitconvert V2I64Regs:$s)),
-          (Build_Vector4_f32
-            (BITCONVERT_32_I2F (V2i32Extract (VecI64toV2I32
-              (V2i64Extract V2I64Regs:$s, 0)), 0)),
-            (BITCONVERT_32_I2F (V2i32Extract (VecI64toV2I32
-              (V2i64Extract V2I64Regs:$s, 0)), 1)),
-            (BITCONVERT_32_I2F (V2i32Extract (VecI64toV2I32
-              (V2i64Extract V2I64Regs:$s, 1)), 0)),
-            (BITCONVERT_32_I2F (V2i32Extract (VecI64toV2I32
-              (V2i64Extract V2I64Regs:$s, 1)), 1)))>;
-// v2i64 -> v2f64
-def : Pat<(v2f64 (bitconvert V2I64Regs:$s)),
-    (Build_Vector2_f64
-            (BITCONVERT_64_I2F (V2i64Extract V2I64Regs:$s,0)),
-            (BITCONVERT_64_I2F (V2i64Extract V2I64Regs:$s,1)))>;
-// v2i32 -> v2f32
-def : Pat<(v2f32 (bitconvert V2I32Regs:$s)),
-    (Build_Vector2_f32
-            (BITCONVERT_32_I2F (V2i32Extract V2I32Regs:$s,0)),
-            (BITCONVERT_32_I2F (V2i32Extract V2I32Regs:$s,1)))>;
-// v4i32 -> v2f64
-def : Pat<(v2f64 (bitconvert V4I32Regs:$s)),
-          (Build_Vector2_f64
-           (BITCONVERT_64_I2F (V2I32toI64 (V4i32Extract V4I32Regs:$s,0),
-             (V4i32Extract V4I32Regs:$s,1))),
-           (BITCONVERT_64_I2F (V2I32toI64 (V4i32Extract V4I32Regs:$s,2),
-             (V4i32Extract V4I32Regs:$s,3))))>;
-// v4i32 -> v4f32
-def : Pat<(v4f32 (bitconvert V4I32Regs:$s)),
-    (Build_Vector4_f32
-            (BITCONVERT_32_I2F (V4i32Extract V4I32Regs:$s,0)),
-            (BITCONVERT_32_I2F (V4i32Extract V4I32Regs:$s,1)),
-            (BITCONVERT_32_I2F (V4i32Extract V4I32Regs:$s,2)),
-            (BITCONVERT_32_I2F (V4i32Extract V4I32Regs:$s,3)))>;
-// v4i16 -> v2f32
-def : Pat<(v2f32 (bitconvert V4I16Regs:$s)),
-          (VecF64toV2F32 (BITCONVERT_64_I2F
-          (V4I16toI64 (V4i16Extract V4I16Regs:$s,0),
-            (V4i16Extract V4I16Regs:$s,1),
-                      (V4i16Extract V4I16Regs:$s,2),
-                      (V4i16Extract V4I16Regs:$s,3))))>;
-
-// Fp vector to int vector convert
-// v2i64 <- v4f32
-def : Pat<(v2i64 (bitconvert V4F32Regs:$s)),
-          (Build_Vector2_i64
-           (BITCONVERT_64_F2I (V2F32toF64 (V4f32Extract V4F32Regs:$s,0),
-             (V4f32Extract V4F32Regs:$s,1))),
-           (BITCONVERT_64_F2I (V2F32toF64 (V4f32Extract V4F32Regs:$s,2),
-             (V4f32Extract V4F32Regs:$s,3))))>;
-// v2i64 <- v2f64
-def : Pat<(v2i64 (bitconvert V2F64Regs:$s)),
-    (Build_Vector2_i64
-            (BITCONVERT_64_F2I (V2f64Extract V2F64Regs:$s,0)),
-            (BITCONVERT_64_F2I (V2f64Extract V2F64Regs:$s,1)))>;
-// v2i32 <- v2f32
-def : Pat<(v2i32 (bitconvert V2F32Regs:$s)),
-    (Build_Vector2_i32
-            (BITCONVERT_32_F2I (V2f32Extract V2F32Regs:$s,0)),
-            (BITCONVERT_32_F2I (V2f32Extract V2F32Regs:$s,1)))>;
-// v4i32 <- v2f64
-def : Pat<(v4i32 (bitconvert V2F64Regs:$s)),
-          (Build_Vector4_i32
-            (BITCONVERT_32_F2I (V2f32Extract (VecF64toV2F32
-              (V2f64Extract V2F64Regs:$s, 0)), 0)),
-            (BITCONVERT_32_F2I (V2f32Extract (VecF64toV2F32
-              (V2f64Extract V2F64Regs:$s, 0)), 1)),
-            (BITCONVERT_32_F2I (V2f32Extract (VecF64toV2F32
-              (V2f64Extract V2F64Regs:$s, 1)), 0)),
-            (BITCONVERT_32_F2I (V2f32Extract (VecF64toV2F32
-              (V2f64Extract V2F64Regs:$s, 1)), 1)))>;
-// v4i32 <- v4f32
-def : Pat<(v4i32 (bitconvert V4F32Regs:$s)),
-          (Build_Vector4_i32
-            (BITCONVERT_32_F2I (V4f32Extract V4F32Regs:$s,0)),
-            (BITCONVERT_32_F2I (V4f32Extract V4F32Regs:$s,1)),
-            (BITCONVERT_32_F2I (V4f32Extract V4F32Regs:$s,2)),
-            (BITCONVERT_32_F2I (V4f32Extract V4F32Regs:$s,3)))>;
-// v4i16 <- v2f32
-def : Pat<(v4i16 (bitconvert V2F32Regs:$s)),
-          (VecI64toV4I16 (BITCONVERT_64_F2I
-          (V2F32toF64 (V2f32Extract V2F32Regs:$s,0),
-            (V2f32Extract V2F32Regs:$s,1))))>;
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/p9-instrs.txt b/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/p9-instrs.txt
deleted file mode 100644
index a70582aca398..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/p9-instrs.txt
+++ /dev/null
@@ -1,442 +0,0 @@
-Content:
-========
-. Remaining Instructions (Total 56 Instructions, include 2 unknow instructions) 
-. Done (Total 155 Instructions: 101 VSX, 54 Altivec)
-
-//------------------------------------------------------------------------------
-//. Remaining Instructions
-//------------------------------------------------------------------------------
-GCC reference: https://sourceware.org/ml/binutils/2015-11/msg00071.html
-
-// Add PC Immediate Shifted  DX-form p69
-[PO RT d1 d0 XO d2]         addpcis     RT,D
-                            subpcis Rx,value = addpcis Rx,-value
-
-// 6.17.2 Decimal Integer Format Conversion Instructions
-
-// Decimal Convert From National VX-form p352
-[PO VRT EO VRB 1 PS XO]     bcdcfn.     VRT,VRB,PS
-
-// Decimal Convert From Zoned VX-form p353
-[PO VRT EO VRB 1 PS XO]     bcdcfz.     VRT,VRB,PS
-
-// Decimal Convert To National VX-form p354
-[PO VRT EO VRB 1 / XO]      bcdctn.     VRT,VRB
-
-// Decimal Convert To Zoned VX-form p355
-[PO VRT EO VRB 1 PS XO]     bcdctz.     VRT,VRB,PS
-
-// Decimal Convert From Signed Quadword VX-form p356
-[PO VRT EO VRB 1 PS XO]     bcdcfsq.    VRT,VRB,PS
-
-// Decimal Convert To Signed Quadword VX-form p356
-[PO VRT EO VRB 1 / XO]      bcdctsq.    VRT,VRB
-
-// 6.17.3 Decimal Integer Sign Manipulation Instructions
-
-// Decimal Copy Sign VX-form p358
-[PO VRT VRA VRB XO]         bcdcpsgn.   VRT,VRA,VRB
-
-// Decimal Set Sign VX-form p358
-[PO VRT EO VRB 1 PS XO]     bcdsetsgn.  VRT,VRB,PS
-
-// Decimal Shift VX-form p359
-[PO VRT VRA VRB 1 PS XO]    bcds.       VRT,VRA,VRB,PS
-
-// Decimal Unsigned Shift VX-form p360
-[PO VRT VRA VRB 1 / XO]     bcdus.      VRT,VRA,VRB
-
-// Decimal Shift and Round VX-form p361
-[PO VRT VRA VRB 1 PS XO]    bcdsr.      VRT,VRA,VRB,PS
-
-// 6.17.5 Decimal Integer Truncate Instructions
-
-// Decimal Truncate VX-form p362
-[PO VRT VRA VRB 1 PS XO]    bcdtrunc.   VRT,VRA,VRB,PS
-
-// Decimal Unsigned Truncate VX-form p363
-[PO VRT VRA VRB 1 / XO]     bcdutrunc.  VRT,VRA,VRB
-
-// 3.3.10.1 Character-Type Compare Instructions
-
-// Compare Ranged Byte X-form p87
-[PO BF / L RA RB XO /]      cmprb       BF,L,RA,RB
-
-// Compare Equal Byte X-form p88
-[PO BF // RA RB XO /]       cmpeqb      BF,RA,RB
-
-// 3.3.13 Fixed-Point Logical Instructions
-
-// Count Trailing Zeros Word X-form p95
-[PO RS RA /// XO Rc]        cnttzw(.)   RA,RS
-
-// 3.3.13.1 64-bit Fixed-Point Logical Instructions
-
-// Count Trailing Zeros Doubleword  X-form p98
-[PO RS RA /// XO Rc]        cnttzd(.)   RA,RS
-
-// 4.4 Copy-Paste Facility
-
-// Copy X-form p858
-[PO /// L RA RB XO /]       copy        RA,RB,L
-                            copy_first = copy RA, RB, 1
-// CP_Abort p860
-[PO /// /// /// XO /]       cp_abort
-
-// Paste p859
-[PO /// L RA RB XO Rc]      paste(.)    RA,RB,L
-                            paste_last = paste RA,RB,1
-
-// 3.3.9 Fixed-Point Arithmetic Instructions
-
-// Deliver A Random Number X-form p79
-[PO RT /// L /// XO /]      darn        RT,L
-
-// Multiply-Add High Doubleword VA-form p81
-[PO RT RA RB RC XO]         maddhd      RT,RA.RB,RC
-
-// Multiply-Add High Doubleword Unsigned VA-form  p81
-[PO RT RA RB RC XO]         maddhdu     RT,RA.RB,RC
-
-// Multiply-Add Low Doubleword VA-form p81
-[PO RT RA RB RC XO]         maddld      RT,RA.RB,RC
-
-// Modulo Signed Word X-form p76
-[PO RT RA RB XO /]          modsw       RT,RA,RB
-
-// Modulo Unsigned Word X-form p76
-[PO RT RA RB XO /]          moduw       RT,RA,RB 
-
-// Modulo Signed Doubleword X-form p84
-[PO RT RA RB XO /]          modsd       RT,RA,RB
-
-// Modulo Unsigned Doubleword X-form p84
-[PO RT RA RB XO /]          modud       RT,RA,RB
-
-
-// DFP Test Significance Immediate [Quad] X-form p204
-[PO BF / UIM FRB XO /]      dtstsfi     BF,UIM,FRB
-[PO BF / UIM FRBp XO /]     dtstsfiq    BF,UIM,FRBp
-
-// 3.3.14.2.1 64-bit Fixed-Point Shift Instructions
-
-// Extend-Sign Word and Shift Left Immediate XS-form p109
-[PO RS RA sh XO sh Rc]      extswsli(.) RA,RS,SH
-
-// 4.5.1 Load Atomic
-
-// Load Word Atomic   X-form p864
-[PO RT RA FC XO /]          lwat        RT,RA,FC
-
-// Load Doubleword Atomic X-form p864
-[PO RT RA FC XO /]          ldat        RT,RA,FC
-
-// 4.5.2 Store Atomic
-
-// Store Word Atomic   X-form p866
-[PO RS RA FC XO /]          stwat       RS,RA,FC
-
-// Store Doubleword Atomic   X-form p866
-[PO RS RA FC XO /]          stdat       RS,RA,FC
-
-// 3.3.2.1 64-bit Fixed-Point Load Instructions 
-
-// Load Doubleword Monitored Indexed X-form p54
-[PO RT RA RB XO /]          ldmx        RT,RA,RB
-
-// 3.3.16 Move To/From Vector-Scalar Register Instructions
-
-// Move From VSR Lower Doubleword XX1-form p111
-[PO S RA /// XO SX]         mfvsrld     RA,XS
-
-// Move To VSR Double Doubleword XX1-form p114
-[PO T RA RB XO TX]          mtvsrdd     XT,RA,RB
-
-// Move To VSR Word & Splat XX1-form p115
-[PO T RA /// XO TX]         mtvsrws     XT,RA
-
-// Move to CR from XER Extended X-form p119
-[PO BF // /// /// XO /]     mcrxrx      BF
-
-// Set Boolean X-form p121
-[PO RT BFA // /// XO /]     setb        RT,BFA
-
-// Message Synchronize X-form p1126
-[PO /// /// /// XO /]       msgsync
-
-// SLB Invalidate Entry Global  X-form p1026
-[PO RS /// RB XO /]         slbieg      RS,RB 
-
-// SLB Synchronize  X-form p1031
-[PO /// /// /// XO /]       slbsync
-
-// 3.3.2.1 Power-Saving Mode Instruction
-
-// stop    XL-form p957
-[PO /// /// /// XO /]       stop
-
-// 4.6.4 Wait Instruction
-// Wait X-form p880
-[PO /// WC /// /// XO /]    wait
-
-// Unknow Instructions:
-urfid
-- gcc's implementation:
-    {"urfid",	XL(19,306),	0xffffffff,  POWER9,	PPCNONE,	{0}},
-    (4c 00 02 64|64 02 00 4c) 	urfid
-
-rmieg
-- gcc's implementation: 
-    {"rmieg",	X(31,882),	XRTRA_MASK,  POWER9,	PPCNONE,	{RB}},
-    (7c 00 f6 e4|e4 f6 00 7c) 	rmieg   r30
-
-//------------------------------------------------------------------------------
-//. Done:
-//------------------------------------------------------------------------------
-
-//======================================
-"vsx instructions"
-
-//--------------------------------------
-"7.6.1.2.1 VSX Scalar Move Instructions"
-// VSX Scalar Quad-Precision Move Instructions
-
-// VSX Scalar Copy Sign Quad-Precision X-form p.553
-[PO VRT VRA VRB XO /] xscpsgnqp
-
-// VSX Scalar Absolute Quad-Precision X-form 531
-// VSX Scalar Negate Quad-Precision X-form 627
-// VSX Scalar Negative Absolute Quad-Precision X-form 626
-[PO VRT XO VRB XO /] xsabsqp xsnegqp xsnabsqp
-
-//--------------------------------------
-"7.6.1.3 VSX Floating-Point Arithmetic Instructions"
-
-// VSX Scalar Quad-Precision Elementary Arithmetic
-
-// VSX Scalar Add Quad-Precision [using round to Odd] X-form 539
-// VSX Scalar Divide Quad-Precision [using round to Odd] X-form 584
-// VSX Scalar Multiply Quad-Precision [using round to Odd] X-form 622
-[PO VRT VRA VRB XO RO] xsaddqp xsaddqpo xsdivqp xsdivqpo xsmulqp xsmulqpo
-
-// VSX Scalar Square Root Quad-Precision [using round to Odd] X-form 662
-// VSX Scalar Subtract Quad-Precision [using round to Odd] X-form 667
-                       xssubqp xssubqpo
-
-[PO VRT XO VRB XO RO] xssqrtqp xssqrtqpo
-
-// VSX Scalar Quad-Precision Multiply-Add Arithmetic Instructions
-
-// VSX Scalar Multiply-Add Quad-Precision [using round to Odd] X-form 596
-// VSX Scalar Multiply-Subtract Quad-Precision [using round to Odd] X-form 617
-// VSX Scalar Negative Multiply-Add Quad-Precision [using round to Odd] X-form 636
-// VSX Scalar Negative Multiply-Subtract Quad-Precision [using round to Odd]
-// X-form 645
-[PO VRT VRA VRB XO RO] xsmaddqp xsmaddqpo xsmsubqp xsmsubqpo 
-                       xsnmaddqp xsnmaddqpo xsnmsubqp xsnmsubqpo
-
-22
-//--------------------------------------
-"7.6.1.4 VSX Floating-Point Compare Instructions"
-
-// VSX Scalar Quad-Precision Compare Instructions
-
-// VSX Scalar Compare Ordered Quad-Precision X-form 549
-// VSX Scalar Compare Unordered Quad-Precision X-form 552
-[PO BF // VRA VRB XO /] xscmpoqp xscmpuqp 
-
-"7.6.1.8 VSX Scalar Floating-Point Support Instructions"
-// VSX Scalar Compare Exponents Quad-Precision X-form p. 541 542
-[PO BF // A B XO AX BX /] xscmpexpdp 
-[PO BF // VRA VRB XO /] xscmpexpqp
-
-// VSX Scalar Compare DP, XX3-form, p.543 544 545
-// VSX Scalar Compare Equal Double-Precision, 
-[PO T A B XO AX BX TX]  xscmpeqdp xscmpgedp xscmpgtdp xscmpnedp
-
-// VSX Vector Compare Not Equal Double-Precision XX3-form 691
-[PO T A B Rc XO AX BX TX] xvcmpnedp xvcmpnedp. xvcmpnesp xvcmpnesp.
-
-//--------------------------------------
-"7.6.1.5 VSX FP-FP Conversion Instructions"
-// VSX Scalar Quad-Precision Floating-Point Conversion Instructions
-
-// VSX Scalar round & Convert Quad-Precision format to Double-Precision format
-// [using round to Odd] X-form 567
-[PO VRT XO VRB XO /] xscvqpdp xscvqpdpo (actually [PO VRT XO VRB XO RO])
-[PO VRT XO VRB XO /] xscvdpqp
-
-// VSX Scalar Quad-Precision Convert to Integer Instructions
-
-// VSX Scalar truncate & Convert Quad-Precision format to Signed Doubleword format
-// 568 570 572 574
-[PO VRT XO VRB XO /] xscvqpsdz xscvqpswz xscvqpudz xscvqpuwz
-576 = 580            xscvsdqp xscvudqp
-
-"7.6.1.7 VSX Round to Floating-Point Integer Instructions"
-// VSX Scalar round & Convert Double-Precision format to Half-Precision format
-// XX2-form 554 566
-[PO T XO B XO BX TX] xscvdphp xscvhpdp
-
-// VSX Vector Convert Half-Precision format to Single-Precision format
-// XX2-form 703 705
-[PO T XO B XO BX TX] xvcvhpsp xvcvsphp
-
-// VSX Scalar Round to Quad-Precision Integer [with Inexact] Z23-form 654
-[PO VRT /// R VRB RMC XO EX] xsrqpi xsrqpix
-
-// VSX Scalar Round Quad-Precision to Double-Extended Precision Z23-form 656
-[PO VRT /// R VRB RMC XO /] xsrqpxp 
-def XSRQPXP : Z23Form_1<63, 37,
-                        (outs vrrc:$vT), (ins u5imm:$R, vrrc:$vB, u2imm:$RMC),
-                        "xsrqpxp $vT, $R, $vB, $RMC"), IIC_VecFP, []>;
-
-27~28
-//--------------------------------------
-// VSX Scalar Insert Exponent Double-Precision X-form 588
-// VSX Scalar Insert Exponent Quad-Precision X-form 589
-[PO VT rA rB XO /]  xsiexpdp 
-[PO VRT VRA VRB XO /]  xsiexpqp
-
-// VSX Vector Insert Exponent Double-Precision XX3-form 722
-[PO T A B XO AX BX TX] xviexpdp xviexpsp
-
-// VSX Vector Extract Unsigned Word XX2-form 788
-// VSX Vector Insert Word XX2-form
-[PO T / UIM B XO BX TX] xxextractuw xxinsertw
-
-// VSX Scalar Extract Exponent Double-Precision XX2-form 676
-[PO BF DCMX B XO BX /]  
-[PO T XO B XO BX /] xsxexpdp xsxsigdp
-// X-form
-[PO VRT XO VRB XO /] xsxexpqp xsxsigqp
-
-// VSX Vector Extract Exponent Double-Precision XX2-form 784
-[PO T XO B XO BX TX] xvxexpdp xvxexpsp
-
-// VSX Vector Extract Significand Double-Precision XX2-form 785
-[PO T XO B XO BX TX] xvxsigdp xvxsigsp
-
-//--------------------------------------
-// VSX Scalar Test Data Class Double-Precision XX2-form p673
-// VSX Scalar Test Data Class Quad-Precision X-form 674
-// VSX Scalar Test Data Class Single-Precision XX2-form 675
-[PO BF DCMX B XO BX /]  xststdcdp xststdcsp
-[PO BF DCMX VRB XO /]   xststdcqp 
-
-// VSX Vector Test Data Class Double-Precision XX2-form 782 783
-[PO T dx B XO dc XO dm BX TX] xvtstdcdp xvtstdcsp 
-
-//--------------------------------------
-// VSX Scalar Maximum Type-C Double-Precision XX3-form 601 ~ 609
-[PO T A B XO AX BX TX] xsmaxcdp xsmaxjdp xsmincdp xsminjdp
-
-//--------------------------------------
-// VSX Vector Byte-Reverse Doubleword XX2-form 786 787
-[PO T XO B XO BX TX] xxbrd xxbrh xxbrq xxbrw
-
-// VSX Vector Permute XX3-form 794
-[PO T A B XO AX BX TX] xxperm xxpermr
-
-// VSX Vector Splat Immediate Byte 796 x-form
-[PO T EO IMM8 XO TX] xxspltib   <= sign or unsigned?
-
-30
-//--------------------------------------
-// Load VSX Vector DQ-form 511
-[PO T RA DQ TX XO] lxv 
-
-// Store VSX Vector DQ-form 526
-[PO S RA DQ SX XO] stxv
-
-// Load VSX Scalar Doubleword DS-form 499
-// Load VSX Scalar Single DS-form 504
-[PO VRT RA DS XO] lxsd lxssp 
-
-// Store VSX Scalar Doubleword DS-form 517
-// Store VSX Scalar Single DS-form 520
-[PO VRT RA DS XO] stxsd stxssp
-
-
-// Load VSX Vector Indexed X-form 511
-// Load VSX Scalar as Integer Byte & Zero Indexed X-form 501
-// Load VSX Vector Byte*16 Indexed X-form 506
-// Load VSX Vector with Length X-form 508
-// Load VSX Vector Left-justified with Length X-form 510
-// Load VSX Vector Halfword*8 Indexed X-form 514
-// Load VSX Vector Word & Splat Indexed X-form 516
-[PO T RA RB XO TX] lxvx lxsibzx lxsihzx lxvb16x lxvl lxvll lxvh8x lxvwsx
-
-// Store VSX Scalar as Integer Byte Indexed X-form 518
-// Store VSX Scalar as Integer Halfword Indexed X-form 518
-// Store VSX Vector Byte*16 Indexed X-form 522
-// Store VSX Vector Halfword*8 Indexed X-form 524
-// Store VSX Vector with Length X-form 526
-// Store VSX Vector Left-justified with Length X-form 528
-// Store VSX Vector Indexed X-form 529
-[PO S RA RB XO SX] stxsibx stxsihx stxvb16x stxvh8x stxvl stxvll stxvx
-
-21
-
-//--------------------------------------
-". vector instructions"
-
-[1] PowerISA-v3.0 p.933 - Table 1, and Chapter 6. Vector Facility (altivec)
-[2] https://sourceware.org/ml/binutils/2015-11/msg00071.html
-
-//--------------------------------------
-New patch:
-// vector bit, p.367, 6.16 Vector Bit Permute Instruction
-[PO VRT VRA VRB XO] vbpermd, (existing: vbpermq)
-
-// vector permute, p.280
-[PO VRT VRA VRB VRC XO] vpermr
-
-// vector rotate left, p.341
-[PO VRT VRA VRB XO] vrlwnm vrlwmi vrldnm vrldmi
-
-// vector shift, p.285
-[PO VRT VRA VRB XO] vslv vsrv
-
-// vector multiply-by-10, p.375
-[PO VRT VRA /// XO] vmul10cuq vmul10uq
-[PO VRT VRA VRB XO] vmul10ecuq vmul10euq 
-
-12
-//--------------------------------------
-http://reviews.llvm.org/D15887 + ext + neg + prty - vbpermd
-// vector count leading/trailing zero
-. new vx-form: p.31, 1.6.14 VX-FORM
-[PO RT EO VRB XO] vclzlsbb vctzlsbb (p.363)
-
-// Vector Count Trailing Zeros Instructions, 362
-[PO VRT EO VRB XO] vctzb vctzh vctzw vctzd (v16i8 v8i16 v4i32 v2i64)
-
-// vector extend sign (p.314)
-[PO VRT EO VRB XO] vextsb2w vextsh2w vextsb2d vextsh2d vextsw2d
-
-// vector negate, p.313
-[PO VRT EO VRB XO] vnegd vnegw
-
-// vector parity, p.335
-[PO VRT EO VRB XO] vprtybd vprtybq vprtybw
-
-16
-//--------------------------------------
-// vector compare, p.330
-[PO VRT VRA VRB RC XO] vcmpneb vcmpneb. vcmpneh vcmpneh. vcmpnew vcmpnew.
-                       vcmpnezb vcmpnezb. vcmpnezh vcmpnezh. vcmpnezw vcmpnezw.
-12
-//--------------------------------------
-http://reviews.llvm.org/D15917 + insert
-// vector extract (p.287) ref: vspltb (v2.07, p.227)
-// vector insert, p.288
-[PO VRT / UIM VRB XO] vinsertb vinsertd vinserth vinsertw
-
-// Vector Extract Unsigned
-[PO VRT / UIM VRB XO] vextractub vextractuh vextractuw vextractd
-
-// p.364: Vector Extract Unsigned Left/Right-Indexed
-[PO RT RA VRB XO] vextublx vextubrx vextuhlx vextuhrx vextuwlx vextuwrx 
-
-14
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyELFObjectWriter.cpp b/external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyELFObjectWriter.cpp
deleted file mode 100644
index 2146f67959b8..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyELFObjectWriter.cpp
+++ /dev/null
@@ -1,67 +0,0 @@
-//===-- WebAssemblyELFObjectWriter.cpp - WebAssembly ELF Writer -----------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-///
-/// \file
-/// \brief This file handles ELF-specific object emission, converting LLVM's
-/// internal fixups into the appropriate relocations.
-///
-//===----------------------------------------------------------------------===//
-
-#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
-#include "llvm/MC/MCELFObjectWriter.h"
-#include "llvm/MC/MCFixup.h"
-#include "llvm/Support/ErrorHandling.h"
-using namespace llvm;
-
-namespace {
-class WebAssemblyELFObjectWriter final : public MCELFObjectTargetWriter {
-public:
-  WebAssemblyELFObjectWriter(bool Is64Bit, uint8_t OSABI);
-
-protected:
-  unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
-                        const MCFixup &Fixup, bool IsPCRel) const override;
-};
-} // end anonymous namespace
-
-WebAssemblyELFObjectWriter::WebAssemblyELFObjectWriter(bool Is64Bit,
-                                                       uint8_t OSABI)
-    : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_WEBASSEMBLY,
-                              /*HasRelocationAddend=*/false) {}
-
-unsigned WebAssemblyELFObjectWriter::getRelocType(MCContext &Ctx,
-                                                  const MCValue &Target,
-                                                  const MCFixup &Fixup,
-                                                  bool IsPCRel) const {
-  // WebAssembly functions are not allocated in the address space. To resolve a
-  // pointer to a function, we must use a special relocation type.
-  if (const MCSymbolRefExpr *SyExp =
-          dyn_cast<MCSymbolRefExpr>(Fixup.getValue()))
-    if (SyExp->getKind() == MCSymbolRefExpr::VK_WebAssembly_FUNCTION)
-      return ELF::R_WEBASSEMBLY_FUNCTION;
-
-  switch (Fixup.getKind()) {
-  case FK_Data_4:
-    assert(!is64Bit() && "4-byte relocations only supported on wasm32");
-    return ELF::R_WEBASSEMBLY_DATA;
-  case FK_Data_8:
-    assert(is64Bit() && "8-byte relocations only supported on wasm64");
-    return ELF::R_WEBASSEMBLY_DATA;
-  default:
-    llvm_unreachable("unimplemented fixup kind");
-  }
-}
-
-MCObjectWriter *llvm::createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS,
-                                                       bool Is64Bit,
-                                                       uint8_t OSABI) {
-  MCELFObjectTargetWriter *MOTW =
-      new WebAssemblyELFObjectWriter(Is64Bit, OSABI);
-  return createELFObjectWriter(MOTW, OS, /*IsLittleEndian=*/true);
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h b/external/bsd/llvm/dist/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
deleted file mode 100644
index e0f4399b3687..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
+++ /dev/null
@@ -1,462 +0,0 @@
-//===-- X86DisassemblerDecoderCommon.h - Disassembler decoder ---*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file is part of the X86 Disassembler.
-// It contains common definitions used by both the disassembler and the table
-//  generator.
-// Documentation for the disassembler can be found in X86Disassembler.h.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_X86_DISASSEMBLER_X86DISASSEMBLERDECODERCOMMON_H
-#define LLVM_LIB_TARGET_X86_DISASSEMBLER_X86DISASSEMBLERDECODERCOMMON_H
-
-#include "llvm/Support/DataTypes.h"
-
-namespace llvm {
-namespace X86Disassembler {
-
-#define INSTRUCTIONS_SYM  x86DisassemblerInstrSpecifiers
-#define CONTEXTS_SYM      x86DisassemblerContexts
-#define ONEBYTE_SYM       x86DisassemblerOneByteOpcodes
-#define TWOBYTE_SYM       x86DisassemblerTwoByteOpcodes
-#define THREEBYTE38_SYM   x86DisassemblerThreeByte38Opcodes
-#define THREEBYTE3A_SYM   x86DisassemblerThreeByte3AOpcodes
-#define XOP8_MAP_SYM      x86DisassemblerXOP8Opcodes
-#define XOP9_MAP_SYM      x86DisassemblerXOP9Opcodes
-#define XOPA_MAP_SYM      x86DisassemblerXOPAOpcodes
-
-#define INSTRUCTIONS_STR  "x86DisassemblerInstrSpecifiers"
-#define CONTEXTS_STR      "x86DisassemblerContexts"
-#define ONEBYTE_STR       "x86DisassemblerOneByteOpcodes"
-#define TWOBYTE_STR       "x86DisassemblerTwoByteOpcodes"
-#define THREEBYTE38_STR   "x86DisassemblerThreeByte38Opcodes"
-#define THREEBYTE3A_STR   "x86DisassemblerThreeByte3AOpcodes"
-#define XOP8_MAP_STR      "x86DisassemblerXOP8Opcodes"
-#define XOP9_MAP_STR      "x86DisassemblerXOP9Opcodes"
-#define XOPA_MAP_STR      "x86DisassemblerXOPAOpcodes"
-
-// Attributes of an instruction that must be known before the opcode can be
-// processed correctly.  Most of these indicate the presence of particular
-// prefixes, but ATTR_64BIT is simply an attribute of the decoding context.
-#define ATTRIBUTE_BITS                  \
-  ENUM_ENTRY(ATTR_NONE,   0x00)         \
-  ENUM_ENTRY(ATTR_64BIT,  (0x1 << 0))   \
-  ENUM_ENTRY(ATTR_XS,     (0x1 << 1))   \
-  ENUM_ENTRY(ATTR_XD,     (0x1 << 2))   \
-  ENUM_ENTRY(ATTR_REXW,   (0x1 << 3))   \
-  ENUM_ENTRY(ATTR_OPSIZE, (0x1 << 4))   \
-  ENUM_ENTRY(ATTR_ADSIZE, (0x1 << 5))   \
-  ENUM_ENTRY(ATTR_VEX,    (0x1 << 6))   \
-  ENUM_ENTRY(ATTR_VEXL,   (0x1 << 7))   \
-  ENUM_ENTRY(ATTR_EVEX,   (0x1 << 8))   \
-  ENUM_ENTRY(ATTR_EVEXL,  (0x1 << 9))   \
-  ENUM_ENTRY(ATTR_EVEXL2, (0x1 << 10))  \
-  ENUM_ENTRY(ATTR_EVEXK,  (0x1 << 11))  \
-  ENUM_ENTRY(ATTR_EVEXKZ, (0x1 << 12))  \
-  ENUM_ENTRY(ATTR_EVEXB,  (0x1 << 13))
-
-#define ENUM_ENTRY(n, v) n = v,
-enum attributeBits {
-  ATTRIBUTE_BITS
-  ATTR_max
-};
-#undef ENUM_ENTRY
-
-// Combinations of the above attributes that are relevant to instruction
-// decode. Although other combinations are possible, they can be reduced to
-// these without affecting the ultimately decoded instruction.
-
-//           Class name           Rank  Rationale for rank assignment
-#define INSTRUCTION_CONTEXTS                                                   \
-  ENUM_ENTRY(IC,                    0,  "says nothing about the instruction")  \
-  ENUM_ENTRY(IC_64BIT,              1,  "says the instruction applies in "     \
-                                        "64-bit mode but no more")             \
-  ENUM_ENTRY(IC_OPSIZE,             3,  "requires an OPSIZE prefix, so "       \
-                                        "operands change width")               \
-  ENUM_ENTRY(IC_ADSIZE,             3,  "requires an ADSIZE prefix, so "       \
-                                        "operands change width")               \
-  ENUM_ENTRY(IC_OPSIZE_ADSIZE,      4,  "requires ADSIZE and OPSIZE prefixes") \
-  ENUM_ENTRY(IC_XD,                 2,  "may say something about the opcode "  \
-                                        "but not the operands")                \
-  ENUM_ENTRY(IC_XS,                 2,  "may say something about the opcode "  \
-                                        "but not the operands")                \
-  ENUM_ENTRY(IC_XD_OPSIZE,          3,  "requires an OPSIZE prefix, so "       \
-                                        "operands change width")               \
-  ENUM_ENTRY(IC_XS_OPSIZE,          3,  "requires an OPSIZE prefix, so "       \
-                                        "operands change width")               \
-  ENUM_ENTRY(IC_64BIT_REXW,         5,  "requires a REX.W prefix, so operands "\
-                                        "change width; overrides IC_OPSIZE")   \
-  ENUM_ENTRY(IC_64BIT_REXW_ADSIZE,  6,  "requires a REX.W prefix and 0x67 "    \
-                                        "prefix")                              \
-  ENUM_ENTRY(IC_64BIT_OPSIZE,       3,  "Just as meaningful as IC_OPSIZE")     \
-  ENUM_ENTRY(IC_64BIT_ADSIZE,       3,  "Just as meaningful as IC_ADSIZE")     \
-  ENUM_ENTRY(IC_64BIT_OPSIZE_ADSIZE, 4, "Just as meaningful as IC_OPSIZE/"     \
-                                        "IC_ADSIZE")                           \
-  ENUM_ENTRY(IC_64BIT_XD,           6,  "XD instructions are SSE; REX.W is "   \
-                                        "secondary")                           \
-  ENUM_ENTRY(IC_64BIT_XS,           6,  "Just as meaningful as IC_64BIT_XD")   \
-  ENUM_ENTRY(IC_64BIT_XD_OPSIZE,    3,  "Just as meaningful as IC_XD_OPSIZE")  \
-  ENUM_ENTRY(IC_64BIT_XS_OPSIZE,    3,  "Just as meaningful as IC_XS_OPSIZE")  \
-  ENUM_ENTRY(IC_64BIT_REXW_XS,      7,  "OPSIZE could mean a different "       \
-                                        "opcode")                              \
-  ENUM_ENTRY(IC_64BIT_REXW_XD,      7,  "Just as meaningful as "               \
-                                        "IC_64BIT_REXW_XS")                    \
-  ENUM_ENTRY(IC_64BIT_REXW_OPSIZE,  8,  "The Dynamic Duo!  Prefer over all "   \
-                                        "else because this changes most "      \
-                                        "operands' meaning")                   \
-  ENUM_ENTRY(IC_VEX,                1,  "requires a VEX prefix")               \
-  ENUM_ENTRY(IC_VEX_XS,             2,  "requires VEX and the XS prefix")      \
-  ENUM_ENTRY(IC_VEX_XD,             2,  "requires VEX and the XD prefix")      \
-  ENUM_ENTRY(IC_VEX_OPSIZE,         2,  "requires VEX and the OpSize prefix")  \
-  ENUM_ENTRY(IC_VEX_W,              3,  "requires VEX and the W prefix")       \
-  ENUM_ENTRY(IC_VEX_W_XS,           4,  "requires VEX, W, and XS prefix")      \
-  ENUM_ENTRY(IC_VEX_W_XD,           4,  "requires VEX, W, and XD prefix")      \
-  ENUM_ENTRY(IC_VEX_W_OPSIZE,       4,  "requires VEX, W, and OpSize")         \
-  ENUM_ENTRY(IC_VEX_L,              3,  "requires VEX and the L prefix")       \
-  ENUM_ENTRY(IC_VEX_L_XS,           4,  "requires VEX and the L and XS prefix")\
-  ENUM_ENTRY(IC_VEX_L_XD,           4,  "requires VEX and the L and XD prefix")\
-  ENUM_ENTRY(IC_VEX_L_OPSIZE,       4,  "requires VEX, L, and OpSize")         \
-  ENUM_ENTRY(IC_VEX_L_W,            4,  "requires VEX, L and W")               \
-  ENUM_ENTRY(IC_VEX_L_W_XS,         5,  "requires VEX, L, W and XS prefix")    \
-  ENUM_ENTRY(IC_VEX_L_W_XD,         5,  "requires VEX, L, W and XD prefix")    \
-  ENUM_ENTRY(IC_VEX_L_W_OPSIZE,     5,  "requires VEX, L, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX,               1,  "requires an EVEX prefix")             \
-  ENUM_ENTRY(IC_EVEX_XS,            2,  "requires EVEX and the XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_XD,            2,  "requires EVEX and the XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_OPSIZE,        2,  "requires EVEX and the OpSize prefix") \
-  ENUM_ENTRY(IC_EVEX_W,             3,  "requires EVEX and the W prefix")      \
-  ENUM_ENTRY(IC_EVEX_W_XS,          4,  "requires EVEX, W, and XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_XD,          4,  "requires EVEX, W, and XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_OPSIZE,      4,  "requires EVEX, W, and OpSize")        \
-  ENUM_ENTRY(IC_EVEX_L,             3,  "requires EVEX and the L prefix")       \
-  ENUM_ENTRY(IC_EVEX_L_XS,          4,  "requires EVEX and the L and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L_XD,          4,  "requires EVEX and the L and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L_OPSIZE,      4,  "requires EVEX, L, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L_W,           3,  "requires EVEX, L and W")               \
-  ENUM_ENTRY(IC_EVEX_L_W_XS,        4,  "requires EVEX, L, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_XD,        4,  "requires EVEX, L, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE,    4,  "requires EVEX, L, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_L2,            3,  "requires EVEX and the L2 prefix")       \
-  ENUM_ENTRY(IC_EVEX_L2_XS,         4,  "requires EVEX and the L2 and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_XD,         4,  "requires EVEX and the L2 and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_OPSIZE,     4,  "requires EVEX, L2, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L2_W,          3,  "requires EVEX, L2 and W")               \
-  ENUM_ENTRY(IC_EVEX_L2_W_XS,       4,  "requires EVEX, L2, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_XD,       4,  "requires EVEX, L2, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE,   4,  "requires EVEX, L2, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_K,             1,  "requires an EVEX_K prefix")             \
-  ENUM_ENTRY(IC_EVEX_XS_K,          2,  "requires EVEX_K and the XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_XD_K,          2,  "requires EVEX_K and the XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_OPSIZE_K,      2,  "requires EVEX_K and the OpSize prefix") \
-  ENUM_ENTRY(IC_EVEX_W_K,           3,  "requires EVEX_K and the W prefix")      \
-  ENUM_ENTRY(IC_EVEX_W_XS_K,        4,  "requires EVEX_K, W, and XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_XD_K,        4,  "requires EVEX_K, W, and XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_OPSIZE_K,    4,  "requires EVEX_K, W, and OpSize")        \
-  ENUM_ENTRY(IC_EVEX_L_K,           3,  "requires EVEX_K and the L prefix")       \
-  ENUM_ENTRY(IC_EVEX_L_XS_K,        4,  "requires EVEX_K and the L and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L_XD_K,        4,  "requires EVEX_K and the L and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L_OPSIZE_K,    4,  "requires EVEX_K, L, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L_W_K,         3,  "requires EVEX_K, L and W")               \
-  ENUM_ENTRY(IC_EVEX_L_W_XS_K,      4,  "requires EVEX_K, L, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_XD_K,      4,  "requires EVEX_K, L, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K,  4,  "requires EVEX_K, L, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_L2_K,          3,  "requires EVEX_K and the L2 prefix")       \
-  ENUM_ENTRY(IC_EVEX_L2_XS_K,       4,  "requires EVEX_K and the L2 and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_XD_K,       4,  "requires EVEX_K and the L2 and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K,   4,  "requires EVEX_K, L2, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L2_W_K,        3,  "requires EVEX_K, L2 and W")               \
-  ENUM_ENTRY(IC_EVEX_L2_W_XS_K,     4,  "requires EVEX_K, L2, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_XD_K,     4,  "requires EVEX_K, L2, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4,  "requires EVEX_K, L2, W and OpSize")     \
-  ENUM_ENTRY(IC_EVEX_B,             1,  "requires an EVEX_B prefix")             \
-  ENUM_ENTRY(IC_EVEX_XS_B,          2,  "requires EVEX_B and the XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_XD_B,          2,  "requires EVEX_B and the XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_OPSIZE_B,      2,  "requires EVEX_B and the OpSize prefix") \
-  ENUM_ENTRY(IC_EVEX_W_B,           3,  "requires EVEX_B and the W prefix")      \
-  ENUM_ENTRY(IC_EVEX_W_XS_B,        4,  "requires EVEX_B, W, and XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_XD_B,        4,  "requires EVEX_B, W, and XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_OPSIZE_B,    4,  "requires EVEX_B, W, and OpSize")        \
-  ENUM_ENTRY(IC_EVEX_L_B,           3,  "requires EVEX_B and the L prefix")       \
-  ENUM_ENTRY(IC_EVEX_L_XS_B,        4,  "requires EVEX_B and the L and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L_XD_B,        4,  "requires EVEX_B and the L and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L_OPSIZE_B,    4,  "requires EVEX_B, L, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L_W_B,         3,  "requires EVEX_B, L and W")               \
-  ENUM_ENTRY(IC_EVEX_L_W_XS_B,      4,  "requires EVEX_B, L, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_XD_B,      4,  "requires EVEX_B, L, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_B,  4,  "requires EVEX_B, L, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_L2_B,          3,  "requires EVEX_B and the L2 prefix")       \
-  ENUM_ENTRY(IC_EVEX_L2_XS_B,       4,  "requires EVEX_B and the L2 and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_XD_B,       4,  "requires EVEX_B and the L2 and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_B,   4,  "requires EVEX_B, L2, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L2_W_B,        3,  "requires EVEX_B, L2 and W")               \
-  ENUM_ENTRY(IC_EVEX_L2_W_XS_B,     4,  "requires EVEX_B, L2, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_XD_B,     4,  "requires EVEX_B, L2, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_B, 4,  "requires EVEX_B, L2, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_K_B,           1,  "requires EVEX_B and EVEX_K prefix")             \
-  ENUM_ENTRY(IC_EVEX_XS_K_B,        2,  "requires EVEX_B, EVEX_K and the XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_XD_K_B,        2,  "requires EVEX_B, EVEX_K and the XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_OPSIZE_K_B,    2,  "requires EVEX_B, EVEX_K and the OpSize prefix") \
-  ENUM_ENTRY(IC_EVEX_W_K_B,         3,  "requires EVEX_B, EVEX_K and the W prefix")      \
-  ENUM_ENTRY(IC_EVEX_W_XS_K_B,      4,  "requires EVEX_B, EVEX_K, W, and XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_XD_K_B,      4,  "requires EVEX_B, EVEX_K, W, and XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B,  4,  "requires EVEX_B, EVEX_K, W, and OpSize")        \
-  ENUM_ENTRY(IC_EVEX_L_K_B,         3,  "requires EVEX_B, EVEX_K and the L prefix")       \
-  ENUM_ENTRY(IC_EVEX_L_XS_K_B,      4,  "requires EVEX_B, EVEX_K and the L and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L_XD_K_B,      4,  "requires EVEX_B, EVEX_K and the L and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L_OPSIZE_K_B,  4,  "requires EVEX_B, EVEX_K, L, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L_W_K_B,       3,  "requires EVEX_B, EVEX_K, L and W")               \
-  ENUM_ENTRY(IC_EVEX_L_W_XS_K_B,    4,  "requires EVEX_B, EVEX_K, L, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_XD_K_B,    4,  "requires EVEX_B, EVEX_K, L, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K_B,4,  "requires EVEX_B, EVEX_K, L, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_L2_K_B,        3,  "requires EVEX_B, EVEX_K and the L2 prefix")       \
-  ENUM_ENTRY(IC_EVEX_L2_XS_K_B,     4,  "requires EVEX_B, EVEX_K and the L2 and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_XD_K_B,     4,  "requires EVEX_B, EVEX_K and the L2 and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K_B, 4,  "requires EVEX_B, EVEX_K, L2, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L2_W_K_B,      3,  "requires EVEX_B, EVEX_K, L2 and W")               \
-  ENUM_ENTRY(IC_EVEX_L2_W_XS_K_B,   4,  "requires EVEX_B, EVEX_K, L2, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_XD_K_B,   4,  "requires EVEX_B, EVEX_K, L2, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K_B,4,  "requires EVEX_B, EVEX_K, L2, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_KZ_B,           1,  "requires EVEX_B and EVEX_KZ prefix")             \
-  ENUM_ENTRY(IC_EVEX_XS_KZ_B,        2,  "requires EVEX_B, EVEX_KZ and the XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_XD_KZ_B,        2,  "requires EVEX_B, EVEX_KZ and the XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B,    2,  "requires EVEX_B, EVEX_KZ and the OpSize prefix") \
-  ENUM_ENTRY(IC_EVEX_W_KZ_B,         3,  "requires EVEX_B, EVEX_KZ and the W prefix")      \
-  ENUM_ENTRY(IC_EVEX_W_XS_KZ_B,      4,  "requires EVEX_B, EVEX_KZ, W, and XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_XD_KZ_B,      4,  "requires EVEX_B, EVEX_KZ, W, and XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B,  4,  "requires EVEX_B, EVEX_KZ, W, and OpSize")        \
-  ENUM_ENTRY(IC_EVEX_L_KZ_B,           3,  "requires EVEX_B, EVEX_KZ and the L prefix")       \
-  ENUM_ENTRY(IC_EVEX_L_XS_KZ_B,        4,  "requires EVEX_B, EVEX_KZ and the L and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L_XD_KZ_B,        4,  "requires EVEX_B, EVEX_KZ and the L and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ_B,    4,  "requires EVEX_B, EVEX_KZ, L, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L_W_KZ_B,         3,  "requires EVEX_B, EVEX_KZ, L and W")               \
-  ENUM_ENTRY(IC_EVEX_L_W_XS_KZ_B,      4,  "requires EVEX_B, EVEX_KZ, L, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_XD_KZ_B,      4,  "requires EVEX_B, EVEX_KZ, L, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ_B,  4,  "requires EVEX_B, EVEX_KZ, L, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_L2_KZ_B,          3,  "requires EVEX_B, EVEX_KZ and the L2 prefix")       \
-  ENUM_ENTRY(IC_EVEX_L2_XS_KZ_B,       4,  "requires EVEX_B, EVEX_KZ and the L2 and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_XD_KZ_B,       4,  "requires EVEX_B, EVEX_KZ and the L2 and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ_B,   4,  "requires EVEX_B, EVEX_KZ, L2, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L2_W_KZ_B,        3,  "requires EVEX_B, EVEX_KZ, L2 and W")               \
-  ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ_B,     4,  "requires EVEX_B, EVEX_KZ, L2, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ_B,     4,  "requires EVEX_B, EVEX_KZ, L2, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ_B, 4,  "requires EVEX_B, EVEX_KZ, L2, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_KZ,             1,  "requires an EVEX_KZ prefix")             \
-  ENUM_ENTRY(IC_EVEX_XS_KZ,          2,  "requires EVEX_KZ and the XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_XD_KZ,          2,  "requires EVEX_KZ and the XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_OPSIZE_KZ,      2,  "requires EVEX_KZ and the OpSize prefix") \
-  ENUM_ENTRY(IC_EVEX_W_KZ,           3,  "requires EVEX_KZ and the W prefix")      \
-  ENUM_ENTRY(IC_EVEX_W_XS_KZ,        4,  "requires EVEX_KZ, W, and XS prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_XD_KZ,        4,  "requires EVEX_KZ, W, and XD prefix")     \
-  ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ,    4,  "requires EVEX_KZ, W, and OpSize")        \
-  ENUM_ENTRY(IC_EVEX_L_KZ,           3,  "requires EVEX_KZ and the L prefix")       \
-  ENUM_ENTRY(IC_EVEX_L_XS_KZ,        4,  "requires EVEX_KZ and the L and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L_XD_KZ,        4,  "requires EVEX_KZ and the L and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ,    4,  "requires EVEX_KZ, L, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L_W_KZ,         3,  "requires EVEX_KZ, L and W")               \
-  ENUM_ENTRY(IC_EVEX_L_W_XS_KZ,      4,  "requires EVEX_KZ, L, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_XD_KZ,      4,  "requires EVEX_KZ, L, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ,  4,  "requires EVEX_KZ, L, W and OpSize")       \
-  ENUM_ENTRY(IC_EVEX_L2_KZ,          3,  "requires EVEX_KZ and the L2 prefix")       \
-  ENUM_ENTRY(IC_EVEX_L2_XS_KZ,       4,  "requires EVEX_KZ and the L2 and XS prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_XD_KZ,       4,  "requires EVEX_KZ and the L2 and XD prefix")\
-  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ,   4,  "requires EVEX_KZ, L2, and OpSize")         \
-  ENUM_ENTRY(IC_EVEX_L2_W_KZ,        3,  "requires EVEX_KZ, L2 and W")               \
-  ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ,     4,  "requires EVEX_KZ, L2, W and XS prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ,     4,  "requires EVEX_KZ, L2, W and XD prefix")    \
-  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ, 4,  "requires EVEX_KZ, L2, W and OpSize")
-
-#define ENUM_ENTRY(n, r, d) n,
-enum InstructionContext {
-  INSTRUCTION_CONTEXTS
-  IC_max
-};
-#undef ENUM_ENTRY
-
-// Opcode types, which determine which decode table to use, both in the Intel
-// manual and also for the decoder.
-enum OpcodeType {
-  ONEBYTE       = 0,
-  TWOBYTE       = 1,
-  THREEBYTE_38  = 2,
-  THREEBYTE_3A  = 3,
-  XOP8_MAP      = 4,
-  XOP9_MAP      = 5,
-  XOPA_MAP      = 6
-};
-
-// The following structs are used for the hierarchical decode table.  After
-// determining the instruction's class (i.e., which IC_* constant applies to
-// it), the decoder reads the opcode.  Some instructions require specific
-// values of the ModR/M byte, so the ModR/M byte indexes into the final table.
-//
-// If a ModR/M byte is not required, "required" is left unset, and the values
-// for each instructionID are identical.
-typedef uint16_t InstrUID;
-
-// ModRMDecisionType - describes the type of ModR/M decision, allowing the
-// consumer to determine the number of entries in it.
-//
-// MODRM_ONEENTRY - No matter what the value of the ModR/M byte is, the decoded
-//                  instruction is the same.
-// MODRM_SPLITRM  - If the ModR/M byte is between 0x00 and 0xbf, the opcode
-//                  corresponds to one instruction; otherwise, it corresponds to
-//                  a different instruction.
-// MODRM_SPLITMISC- If the ModR/M byte is between 0x00 and 0xbf, ModR/M byte
-//                  divided by 8 is used to select instruction; otherwise, each
-//                  value of the ModR/M byte could correspond to a different
-//                  instruction.
-// MODRM_SPLITREG - ModR/M byte divided by 8 is used to select instruction. This
-//                  corresponds to instructions that use reg field as opcode
-// MODRM_FULL     - Potentially, each value of the ModR/M byte could correspond
-//                  to a different instruction.
-#define MODRMTYPES            \
-  ENUM_ENTRY(MODRM_ONEENTRY)  \
-  ENUM_ENTRY(MODRM_SPLITRM)   \
-  ENUM_ENTRY(MODRM_SPLITMISC)  \
-  ENUM_ENTRY(MODRM_SPLITREG)  \
-  ENUM_ENTRY(MODRM_FULL)
-
-#define ENUM_ENTRY(n) n,
-enum ModRMDecisionType {
-  MODRMTYPES
-  MODRM_max
-};
-#undef ENUM_ENTRY
-
-#define CASE_ENCODING_RM     \
-    case ENCODING_RM:        \
-    case ENCODING_RM_CD2:    \
-    case ENCODING_RM_CD4:    \
-    case ENCODING_RM_CD8:    \
-    case ENCODING_RM_CD16:   \
-    case ENCODING_RM_CD32:   \
-    case ENCODING_RM_CD64
-
-#define CASE_ENCODING_VSIB   \
-    case ENCODING_VSIB:      \
-    case ENCODING_VSIB_CD2:  \
-    case ENCODING_VSIB_CD4:  \
-    case ENCODING_VSIB_CD8:  \
-    case ENCODING_VSIB_CD16: \
-    case ENCODING_VSIB_CD32: \
-    case ENCODING_VSIB_CD64
-
-// Physical encodings of instruction operands.
-#define ENCODINGS                                                              \
-  ENUM_ENTRY(ENCODING_NONE,   "")                                              \
-  ENUM_ENTRY(ENCODING_REG,    "Register operand in ModR/M byte.")              \
-  ENUM_ENTRY(ENCODING_RM,     "R/M operand in ModR/M byte.")                   \
-  ENUM_ENTRY(ENCODING_RM_CD2, "R/M operand with CDisp scaling of 2")           \
-  ENUM_ENTRY(ENCODING_RM_CD4, "R/M operand with CDisp scaling of 4")           \
-  ENUM_ENTRY(ENCODING_RM_CD8, "R/M operand with CDisp scaling of 8")           \
-  ENUM_ENTRY(ENCODING_RM_CD16,"R/M operand with CDisp scaling of 16")          \
-  ENUM_ENTRY(ENCODING_RM_CD32,"R/M operand with CDisp scaling of 32")          \
-  ENUM_ENTRY(ENCODING_RM_CD64,"R/M operand with CDisp scaling of 64")          \
-  ENUM_ENTRY(ENCODING_VSIB,     "VSIB operand in ModR/M byte.")                \
-  ENUM_ENTRY(ENCODING_VSIB_CD2, "VSIB operand with CDisp scaling of 2")        \
-  ENUM_ENTRY(ENCODING_VSIB_CD4, "VSIB operand with CDisp scaling of 4")        \
-  ENUM_ENTRY(ENCODING_VSIB_CD8, "VSIB operand with CDisp scaling of 8")        \
-  ENUM_ENTRY(ENCODING_VSIB_CD16,"VSIB operand with CDisp scaling of 16")       \
-  ENUM_ENTRY(ENCODING_VSIB_CD32,"VSIB operand with CDisp scaling of 32")       \
-  ENUM_ENTRY(ENCODING_VSIB_CD64,"VSIB operand with CDisp scaling of 64")       \
-  ENUM_ENTRY(ENCODING_VVVV,   "Register operand in VEX.vvvv byte.")            \
-  ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.")         \
-  ENUM_ENTRY(ENCODING_IB,     "1-byte immediate")                              \
-  ENUM_ENTRY(ENCODING_IW,     "2-byte")                                        \
-  ENUM_ENTRY(ENCODING_ID,     "4-byte")                                        \
-  ENUM_ENTRY(ENCODING_IO,     "8-byte")                                        \
-  ENUM_ENTRY(ENCODING_RB,     "(AL..DIL, R8L..R15L) Register code added to "   \
-                              "the opcode byte")                               \
-  ENUM_ENTRY(ENCODING_RW,     "(AX..DI, R8W..R15W)")                           \
-  ENUM_ENTRY(ENCODING_RD,     "(EAX..EDI, R8D..R15D)")                         \
-  ENUM_ENTRY(ENCODING_RO,     "(RAX..RDI, R8..R15)")                           \
-  ENUM_ENTRY(ENCODING_FP,     "Position on floating-point stack in ModR/M "    \
-                              "byte.")                                         \
-                                                                               \
-  ENUM_ENTRY(ENCODING_Iv,     "Immediate of operand size")                     \
-  ENUM_ENTRY(ENCODING_Ia,     "Immediate of address size")                     \
-  ENUM_ENTRY(ENCODING_Rv,     "Register code of operand size added to the "    \
-                              "opcode byte")                                   \
-  ENUM_ENTRY(ENCODING_DUP,    "Duplicate of another operand; ID is encoded "   \
-                              "in type")                                       \
-  ENUM_ENTRY(ENCODING_SI,     "Source index; encoded in OpSize/Adsize prefix") \
-  ENUM_ENTRY(ENCODING_DI,     "Destination index; encoded in prefixes")
-
-#define ENUM_ENTRY(n, d) n,
-enum OperandEncoding {
-  ENCODINGS
-  ENCODING_max
-};
-#undef ENUM_ENTRY
-
-// Semantic interpretations of instruction operands.
-#define TYPES                                                                  \
-  ENUM_ENTRY(TYPE_NONE,       "")                                              \
-  ENUM_ENTRY(TYPE_REL,        "immediate address")                             \
-  ENUM_ENTRY(TYPE_R8,         "1-byte register operand")                       \
-  ENUM_ENTRY(TYPE_R16,        "2-byte")                                        \
-  ENUM_ENTRY(TYPE_R32,        "4-byte")                                        \
-  ENUM_ENTRY(TYPE_R64,        "8-byte")                                        \
-  ENUM_ENTRY(TYPE_IMM,        "immediate operand")                      \
-  ENUM_ENTRY(TYPE_IMM3,       "1-byte immediate operand between 0 and 7")      \
-  ENUM_ENTRY(TYPE_IMM5,       "1-byte immediate operand between 0 and 31")     \
-  ENUM_ENTRY(TYPE_AVX512ICC,  "1-byte immediate operand for AVX512 icmp")      \
-  ENUM_ENTRY(TYPE_UIMM8,      "1-byte unsigned immediate operand")             \
-  ENUM_ENTRY(TYPE_M,          "Memory operand")                                \
-  ENUM_ENTRY(TYPE_SRCIDX,     "memory at source index")                        \
-  ENUM_ENTRY(TYPE_DSTIDX,     "memory at destination index")                   \
-  ENUM_ENTRY(TYPE_MOFFS,      "memory offset (relative to segment base)")      \
-  ENUM_ENTRY(TYPE_ST,         "Position on the floating-point stack")          \
-  ENUM_ENTRY(TYPE_MM64,       "8-byte MMX register")                           \
-  ENUM_ENTRY(TYPE_XMM,        "16-byte")                                       \
-  ENUM_ENTRY(TYPE_YMM,        "32-byte")                                       \
-  ENUM_ENTRY(TYPE_ZMM,        "64-byte")                                       \
-  ENUM_ENTRY(TYPE_VK,         "mask register")                                 \
-  ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand")                      \
-  ENUM_ENTRY(TYPE_DEBUGREG,   "Debug register operand")                        \
-  ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand")                      \
-  ENUM_ENTRY(TYPE_BNDR,       "MPX bounds register")                           \
-                                                                               \
-  ENUM_ENTRY(TYPE_Rv,         "Register operand of operand size")              \
-  ENUM_ENTRY(TYPE_RELv,       "Immediate address of operand size")             \
-  ENUM_ENTRY(TYPE_DUP0,       "Duplicate of operand 0")                        \
-  ENUM_ENTRY(TYPE_DUP1,       "operand 1")                                     \
-  ENUM_ENTRY(TYPE_DUP2,       "operand 2")                                     \
-  ENUM_ENTRY(TYPE_DUP3,       "operand 3")                                     \
-  ENUM_ENTRY(TYPE_DUP4,       "operand 4")                                     \
-
-#define ENUM_ENTRY(n, d) n,
-enum OperandType {
-  TYPES
-  TYPE_max
-};
-#undef ENUM_ENTRY
-
-/// \brief The specification for how to extract and interpret one operand.
-struct OperandSpecifier {
-  uint8_t encoding;
-  uint8_t type;
-};
-
-static const unsigned X86_MAX_OPERANDS = 6;
-
-/// Decoding mode for the Intel disassembler.  16-bit, 32-bit, and 64-bit mode
-/// are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,
-/// respectively.
-enum DisassemblerMode {
-  MODE_16BIT,
-  MODE_32BIT,
-  MODE_64BIT
-};
-
-} // namespace X86Disassembler
-} // namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/X86/README-MMX.txt b/external/bsd/llvm/dist/llvm/lib/Target/X86/README-MMX.txt
deleted file mode 100644
index a6c8616b6d2c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/X86/README-MMX.txt
+++ /dev/null
@@ -1,71 +0,0 @@
-//===---------------------------------------------------------------------===//
-// Random ideas for the X86 backend: MMX-specific stuff.
-//===---------------------------------------------------------------------===//
-
-//===---------------------------------------------------------------------===//
-
-This:
-
-#include <mmintrin.h>
-
-__v2si qux(int A) {
-  return (__v2si){ 0, A };
-}
-
-is compiled into:
-
-_qux:
-        subl $28, %esp
-        movl 32(%esp), %eax
-        movd %eax, %mm0
-        movq %mm0, (%esp)
-        movl (%esp), %eax
-        movl %eax, 20(%esp)
-        movq %mm0, 8(%esp)
-        movl 12(%esp), %eax
-        movl %eax, 16(%esp)
-        movq 16(%esp), %mm0
-        addl $28, %esp
-        ret
-
-Yuck!
-
-GCC gives us:
-
-_qux:
-        subl    $12, %esp
-        movl    16(%esp), %eax
-        movl    20(%esp), %edx
-        movl    $0, (%eax)
-        movl    %edx, 4(%eax)
-        addl    $12, %esp
-        ret     $4
-
-//===---------------------------------------------------------------------===//
-
-We generate crappy code for this:
-
-__m64 t() {
-  return _mm_cvtsi32_si64(1);
-}
-
-_t:
-	subl	$12, %esp
-	movl	$1, %eax
-	movd	%eax, %mm0
-	movq	%mm0, (%esp)
-	movl	(%esp), %eax
-	movl	4(%esp), %edx
-	addl	$12, %esp
-	ret
-
-The extra stack traffic is covered in the previous entry. But the other reason
-is we are not smart about materializing constants in MMX registers. With -m64
-
-	movl	$1, %eax
-	movd	%eax, %mm0
-	movd	%mm0, %rax
-	ret
-
-We should be using a constantpool load instead:
-	movq	LC0(%rip), %rax
diff --git a/external/bsd/llvm/dist/llvm/lib/Target/X86/README-UNIMPLEMENTED.txt b/external/bsd/llvm/dist/llvm/lib/Target/X86/README-UNIMPLEMENTED.txt
deleted file mode 100644
index c26c75ab951c..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Target/X86/README-UNIMPLEMENTED.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-//===---------------------------------------------------------------------===//
-// Testcases that crash the X86 backend because they aren't implemented
-//===---------------------------------------------------------------------===//
-
-These are cases we know the X86 backend doesn't handle.  Patches are welcome
-and appreciated, because no one has signed up to implemented these yet.
-Implementing these would allow elimination of the corresponding intrinsics,
-which would be great.
-
-1) vector shifts
-2) vector comparisons
-3) vector fp<->int conversions: PR2683, PR2684, PR2685, PR2686, PR2688
-4) bitcasts from vectors to scalars: PR2804
-5) llvm.atomic.cmp.swap.i128.p0i128: PR3462
diff --git a/external/bsd/llvm/dist/llvm/lib/Transforms/Utils/CmpInstAnalysis.cpp b/external/bsd/llvm/dist/llvm/lib/Transforms/Utils/CmpInstAnalysis.cpp
deleted file mode 100644
index d9294c499309..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Transforms/Utils/CmpInstAnalysis.cpp
+++ /dev/null
@@ -1,108 +0,0 @@
-//===- CmpInstAnalysis.cpp - Utils to help fold compares ---------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file holds routines to help analyse compare instructions
-// and fold them into constants or other compare instructions
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Transforms/Utils/CmpInstAnalysis.h"
-#include "llvm/IR/Constants.h"
-#include "llvm/IR/Instructions.h"
-
-using namespace llvm;
-
-unsigned llvm::getICmpCode(const ICmpInst *ICI, bool InvertPred) {
-  ICmpInst::Predicate Pred = InvertPred ? ICI->getInversePredicate()
-                                        : ICI->getPredicate();
-  switch (Pred) {
-      // False -> 0
-    case ICmpInst::ICMP_UGT: return 1;  // 001
-    case ICmpInst::ICMP_SGT: return 1;  // 001
-    case ICmpInst::ICMP_EQ:  return 2;  // 010
-    case ICmpInst::ICMP_UGE: return 3;  // 011
-    case ICmpInst::ICMP_SGE: return 3;  // 011
-    case ICmpInst::ICMP_ULT: return 4;  // 100
-    case ICmpInst::ICMP_SLT: return 4;  // 100
-    case ICmpInst::ICMP_NE:  return 5;  // 101
-    case ICmpInst::ICMP_ULE: return 6;  // 110
-    case ICmpInst::ICMP_SLE: return 6;  // 110
-      // True -> 7
-    default:
-      llvm_unreachable("Invalid ICmp predicate!");
-  }
-}
-
-Value *llvm::getICmpValue(bool Sign, unsigned Code, Value *LHS, Value *RHS,
-                          CmpInst::Predicate &NewICmpPred) {
-  switch (Code) {
-    default: llvm_unreachable("Illegal ICmp code!");
-    case 0: // False.
-      return ConstantInt::get(CmpInst::makeCmpResultType(LHS->getType()), 0);
-    case 1: NewICmpPred = Sign ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break;
-    case 2: NewICmpPred = ICmpInst::ICMP_EQ; break;
-    case 3: NewICmpPred = Sign ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break;
-    case 4: NewICmpPred = Sign ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break;
-    case 5: NewICmpPred = ICmpInst::ICMP_NE; break;
-    case 6: NewICmpPred = Sign ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break;
-    case 7: // True.
-      return ConstantInt::get(CmpInst::makeCmpResultType(LHS->getType()), 1);
-  }
-  return nullptr;
-}
-
-bool llvm::PredicatesFoldable(ICmpInst::Predicate p1, ICmpInst::Predicate p2) {
-  return (CmpInst::isSigned(p1) == CmpInst::isSigned(p2)) ||
-         (CmpInst::isSigned(p1) && ICmpInst::isEquality(p2)) ||
-         (CmpInst::isSigned(p2) && ICmpInst::isEquality(p1));
-}
-
-bool llvm::decomposeBitTestICmp(const ICmpInst *I, CmpInst::Predicate &Pred,
-                                Value *&X, Value *&Y, Value *&Z) {
-  ConstantInt *C = dyn_cast<ConstantInt>(I->getOperand(1));
-  if (!C)
-    return false;
-
-  switch (I->getPredicate()) {
-  default:
-    return false;
-  case ICmpInst::ICMP_SLT:
-    // X < 0 is equivalent to (X & SignMask) != 0.
-    if (!C->isZero())
-      return false;
-    Y = ConstantInt::get(I->getContext(), APInt::getSignMask(C->getBitWidth()));
-    Pred = ICmpInst::ICMP_NE;
-    break;
-  case ICmpInst::ICMP_SGT:
-    // X > -1 is equivalent to (X & SignMask) == 0.
-    if (!C->isMinusOne())
-      return false;
-    Y = ConstantInt::get(I->getContext(), APInt::getSignMask(C->getBitWidth()));
-    Pred = ICmpInst::ICMP_EQ;
-    break;
-  case ICmpInst::ICMP_ULT:
-    // X <u 2^n is equivalent to (X & ~(2^n-1)) == 0.
-    if (!C->getValue().isPowerOf2())
-      return false;
-    Y = ConstantInt::get(I->getContext(), -C->getValue());
-    Pred = ICmpInst::ICMP_EQ;
-    break;
-  case ICmpInst::ICMP_UGT:
-    // X >u 2^n-1 is equivalent to (X & ~(2^n-1)) != 0.
-    if (!(C->getValue() + 1).isPowerOf2())
-      return false;
-    Y = ConstantInt::get(I->getContext(), ~C->getValue());
-    Pred = ICmpInst::ICMP_NE;
-    break;
-  }
-
-  X = I->getOperand(0);
-  Z = ConstantInt::getNullValue(C->getType());
-  return true;
-}
diff --git a/external/bsd/llvm/dist/llvm/lib/Transforms/Utils/SimplifyInstructions.cpp b/external/bsd/llvm/dist/llvm/lib/Transforms/Utils/SimplifyInstructions.cpp
deleted file mode 100644
index 2ea15f65cef9..000000000000
--- a/external/bsd/llvm/dist/llvm/lib/Transforms/Utils/SimplifyInstructions.cpp
+++ /dev/null
@@ -1,152 +0,0 @@
-//===------ SimplifyInstructions.cpp - Remove redundant instructions ------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This is a utility pass used for testing the InstructionSimplify analysis.
-// The analysis is applied to every instruction, and if it simplifies then the
-// instruction is replaced by the simplification.  If you are looking for a pass
-// that performs serious instruction folding, use the instcombine pass instead.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Transforms/Utils/SimplifyInstructions.h"
-#include "llvm/ADT/DepthFirstIterator.h"
-#include "llvm/ADT/SmallPtrSet.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/Analysis/AssumptionCache.h"
-#include "llvm/Analysis/InstructionSimplify.h"
-#include "llvm/Analysis/OptimizationDiagnosticInfo.h"
-#include "llvm/Analysis/TargetLibraryInfo.h"
-#include "llvm/IR/DataLayout.h"
-#include "llvm/IR/Dominators.h"
-#include "llvm/IR/Function.h"
-#include "llvm/IR/Type.h"
-#include "llvm/Pass.h"
-#include "llvm/Transforms/Scalar.h"
-#include "llvm/Transforms/Utils/Local.h"
-using namespace llvm;
-
-#define DEBUG_TYPE "instsimplify"
-
-STATISTIC(NumSimplified, "Number of redundant instructions removed");
-
-static bool runImpl(Function &F, const SimplifyQuery &SQ,
-                    OptimizationRemarkEmitter *ORE) {
-  SmallPtrSet<const Instruction *, 8> S1, S2, *ToSimplify = &S1, *Next = &S2;
-  bool Changed = false;
-
-  do {
-    for (BasicBlock *BB : depth_first(&F.getEntryBlock())) {
-      // Here be subtlety: the iterator must be incremented before the loop
-      // body (not sure why), so a range-for loop won't work here.
-      for (BasicBlock::iterator BI = BB->begin(), BE = BB->end(); BI != BE;) {
-        Instruction *I = &*BI++;
-        // The first time through the loop ToSimplify is empty and we try to
-        // simplify all instructions.  On later iterations ToSimplify is not
-        // empty and we only bother simplifying instructions that are in it.
-        if (!ToSimplify->empty() && !ToSimplify->count(I))
-          continue;
-
-        // Don't waste time simplifying unused instructions.
-        if (!I->use_empty()) {
-          if (Value *V = SimplifyInstruction(I, SQ, ORE)) {
-            // Mark all uses for resimplification next time round the loop.
-            for (User *U : I->users())
-              Next->insert(cast<Instruction>(U));
-            I->replaceAllUsesWith(V);
-            ++NumSimplified;
-            Changed = true;
-          }
-        }
-        if (RecursivelyDeleteTriviallyDeadInstructions(I, SQ.TLI)) {
-          // RecursivelyDeleteTriviallyDeadInstruction can remove more than one
-          // instruction, so simply incrementing the iterator does not work.
-          // When instructions get deleted re-iterate instead.
-          BI = BB->begin();
-          BE = BB->end();
-          Changed = true;
-        }
-      }
-    }
-
-    // Place the list of instructions to simplify on the next loop iteration
-    // into ToSimplify.
-    std::swap(ToSimplify, Next);
-    Next->clear();
-  } while (!ToSimplify->empty());
-
-  return Changed;
-}
-
-namespace {
-  struct InstSimplifier : public FunctionPass {
-    static char ID; // Pass identification, replacement for typeid
-    InstSimplifier() : FunctionPass(ID) {
-      initializeInstSimplifierPass(*PassRegistry::getPassRegistry());
-    }
-
-    void getAnalysisUsage(AnalysisUsage &AU) const override {
-      AU.setPreservesCFG();
-      AU.addRequired<DominatorTreeWrapperPass>();
-      AU.addRequired<AssumptionCacheTracker>();
-      AU.addRequired<TargetLibraryInfoWrapperPass>();
-      AU.addRequired<OptimizationRemarkEmitterWrapperPass>();
-    }
-
-    /// runOnFunction - Remove instructions that simplify.
-    bool runOnFunction(Function &F) override {
-      if (skipFunction(F))
-        return false;
-
-      const DominatorTree *DT =
-          &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
-      const TargetLibraryInfo *TLI =
-          &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
-      AssumptionCache *AC =
-          &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
-      OptimizationRemarkEmitter *ORE =
-          &getAnalysis<OptimizationRemarkEmitterWrapperPass>().getORE();
-      const DataLayout &DL = F.getParent()->getDataLayout();
-      const SimplifyQuery SQ(DL, TLI, DT, AC);
-      return runImpl(F, SQ, ORE);
-    }
-  };
-}
-
-char InstSimplifier::ID = 0;
-INITIALIZE_PASS_BEGIN(InstSimplifier, "instsimplify",
-                      "Remove redundant instructions", false, false)
-INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
-INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(OptimizationRemarkEmitterWrapperPass)
-INITIALIZE_PASS_END(InstSimplifier, "instsimplify",
-                    "Remove redundant instructions", false, false)
-char &llvm::InstructionSimplifierID = InstSimplifier::ID;
-
-// Public interface to the simplify instructions pass.
-FunctionPass *llvm::createInstructionSimplifierPass() {
-  return new InstSimplifier();
-}
-
-PreservedAnalyses InstSimplifierPass::run(Function &F,
-                                      FunctionAnalysisManager &AM) {
-  auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
-  auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
-  auto &AC = AM.getResult<AssumptionAnalysis>(F);
-  auto &ORE = AM.getResult<OptimizationRemarkEmitterAnalysis>(F);
-  const DataLayout &DL = F.getParent()->getDataLayout();
-  const SimplifyQuery SQ(DL, &TLI, &DT, &AC);
-  bool Changed = runImpl(F, SQ, &ORE);
-  if (!Changed)
-    return PreservedAnalyses::all();
-
-  PreservedAnalyses PA;
-  PA.preserveSet<CFGAnalyses>();
-  return PA;
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/call.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/call.ll
deleted file mode 100644
index 769c7bb3eee7..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/call.ll
+++ /dev/null
@@ -1,59 +0,0 @@
-; RUN: not llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=r600 -mcpu=cypress < %s 2>&1 | FileCheck %s
-
-; CHECK: in function test_call_external{{.*}}: unsupported call to function external_function
-; CHECK: in function test_call{{.*}}: unsupported call to function defined_function
-; CHECK: in function test_tail_call{{.*}}: unsupported call to function defined_function
-; CHECK: in function test_tail_call_bitcast_extern_variadic{{.*}}: unsupported call to function extern_variadic
-
-
-declare i32 @external_function(i32) nounwind
-
-define amdgpu_kernel void @test_call_external(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
-  %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
-  %a = load i32, i32 addrspace(1)* %in
-  %b = load i32, i32 addrspace(1)* %b_ptr
-  %c = call i32 @external_function(i32 %b) nounwind
-  %result = add i32 %a, %c
-  store i32 %result, i32 addrspace(1)* %out
-  ret void
-}
-
-define i32 @defined_function(i32 %x) nounwind noinline {
-  %y = add i32 %x, 8
-  ret i32 %y
-}
-
-define amdgpu_kernel void @test_call(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
-  %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
-  %a = load i32, i32 addrspace(1)* %in
-  %b = load i32, i32 addrspace(1)* %b_ptr
-  %c = call i32 @defined_function(i32 %b) nounwind
-  %result = add i32 %a, %c
-  store i32 %result, i32 addrspace(1)* %out
-  ret void
-}
-
-define amdgpu_kernel void @test_tail_call(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
-  %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
-  %a = load i32, i32 addrspace(1)* %in
-  %b = load i32, i32 addrspace(1)* %b_ptr
-  %c = tail call i32 @defined_function(i32 %b) nounwind
-  %result = add i32 %a, %c
-  store i32 %result, i32 addrspace(1)* %out
-  ret void
-}
-
-define i32 @test_tail_call_ret() {
-  %call = call i32 @external_function(i32 10)
-  ret i32 %call
-}
-
-declare i32 @extern_variadic(...)
-
-define i32 @test_tail_call_bitcast_extern_variadic(<4 x float> %arg0, <4 x float> %arg1, i32 %arg2) {
-  %add = fadd <4 x float> %arg0, %arg1
-  %call = tail call i32 bitcast (i32 (...)* @extern_variadic to i32 (<4 x float>)*)(<4 x float> %add) #7
-  ret i32 %call
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/coalescer-subrange-crash.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/coalescer-subrange-crash.ll
deleted file mode 100644
index ef1b3d25f883..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/coalescer-subrange-crash.ll
+++ /dev/null
@@ -1,66 +0,0 @@
-; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck %s
-;
-; This testcase used to cause the following crash:
-;
-; *** Couldn't join subrange!
-;
-; UNREACHABLE executed at lib/CodeGen/RegisterCoalescer.cpp:2666!
-;
-; The insertelement instructions became subregister definitions: one virtual
-; register was defined and re-defined by one group of the consecutive insert-
-; elements, and another was defined by the second group.
-; Since a copy between the two full registers was present in the program,
-; the coalescer tried to merge them. The join algorithm for the main range
-; decided that it was correct to do so, while the subrange join unexpectedly
-; failed. This was caused by the live interval subranges not being computed
-; correctly: subregister defs are not uses for the purpose of subranges.
-;
-; Test for a valid output:
-; CHECK: image_sample_c_d_o
-define amdgpu_ps <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> @main([17 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615) %arg, [16 x <16 x i8>] addrspace(2)* byval dereferenceable(18446744073709551615) %arg1, [32 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615) %arg2, [16 x <8 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615) %arg3, [16 x <4 x i32>] addrspace(2)* byval dereferenceable(18446744073709551615) %arg4, float inreg %arg5, i32 inreg %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <3 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, <2 x i32> %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, i32 %arg20, float %arg21, i32 %arg22) #0 {
-main_body:
-  %i.i = extractelement <2 x i32> %arg8, i32 0
-  %j.i = extractelement <2 x i32> %arg8, i32 1
-  %i.f.i = bitcast i32 %i.i to float
-  %j.f.i = bitcast i32 %j.i to float
-  %p1.i = call float @llvm.amdgcn.interp.p1(float %i.f.i, i32 3, i32 0, i32 %arg6) #1
-  %p2.i = call float @llvm.amdgcn.interp.p2(float %p1.i, float %j.f.i, i32 3, i32 0, i32 %arg6) #1
-  %tmp23 = fadd float %p2.i, 0xBFA99999A0000000
-  %tmp24 = fadd float %p2.i, 0x3FA99999A0000000
-  %tmp25 = bitcast float %tmp23 to i32
-  %tmp26 = insertelement <16 x i32> <i32 212739, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, i32 %tmp25, i32 1
-  %tmp27 = insertelement <16 x i32> %tmp26, i32 undef, i32 2
-  %tmp28 = insertelement <16 x i32> %tmp27, i32 undef, i32 3
-  %tmp29 = insertelement <16 x i32> %tmp28, i32 undef, i32 4
-  %tmp30 = insertelement <16 x i32> %tmp29, i32 0, i32 5
-  %tmp31 = insertelement <16 x i32> %tmp30, i32 undef, i32 6
-  %tmp32 = insertelement <16 x i32> %tmp31, i32 undef, i32 7
-  %tmp33 = insertelement <16 x i32> %tmp32, i32 undef, i32 8
-  %tmp33.bc = bitcast <16 x i32> %tmp33 to <16 x float>
-  %tmp34 = call <4 x float> @llvm.amdgcn.image.sample.c.d.o.v4f32.v16f32.v8i32(<16 x float> %tmp33.bc, <8 x i32> undef, <4 x i32> undef, i32 15, i1 false, i1 false, i1 false, i1 false, i1 true)
-  %tmp35 = extractelement <4 x float> %tmp34, i32 0
-  %tmp36 = bitcast float %tmp24 to i32
-  %tmp37 = insertelement <16 x i32> <i32 212739, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, i32 %tmp36, i32 1
-  %tmp38 = insertelement <16 x i32> %tmp37, i32 undef, i32 2
-  %tmp39 = insertelement <16 x i32> %tmp38, i32 undef, i32 3
-  %tmp40 = insertelement <16 x i32> %tmp39, i32 undef, i32 4
-  %tmp41 = insertelement <16 x i32> %tmp40, i32 0, i32 5
-  %tmp42 = insertelement <16 x i32> %tmp41, i32 undef, i32 6
-  %tmp43 = insertelement <16 x i32> %tmp42, i32 undef, i32 7
-  %tmp44 = insertelement <16 x i32> %tmp43, i32 undef, i32 8
-  %tmp44.bc = bitcast <16 x i32> %tmp44 to <16 x float>
-  %tmp45 = call <4 x float> @llvm.amdgcn.image.sample.c.d.o.v4f32.v16f32.v8i32(<16 x float> %tmp44.bc, <8 x i32> undef, <4 x i32> undef, i32 15, i1 false, i1 false, i1 false, i1 false, i1 true)
-  %tmp46 = extractelement <4 x float> %tmp45, i32 0
-  %tmp47 = fmul float %tmp35, %tmp46
-  %tmp48 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> undef, float %tmp47, 14
-  %tmp49 = insertvalue <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %tmp48, float %arg21, 24
-  ret <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float }> %tmp49
-}
-
-declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #1
-declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #1
-declare <4 x float> @llvm.amdgcn.image.sample.c.d.o.v4f32.v16f32.v8i32(<16 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #2
-
-attributes #0 = { nounwind }
-attributes #1 = { nounwind readnone }
-attributes #2 = { nounwind readonly }
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-deduce-ro-arg.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-deduce-ro-arg.ll
deleted file mode 100644
index a33c3646e253..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-deduce-ro-arg.ll
+++ /dev/null
@@ -1,33 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck %s
-
-; CHECK:      - Name:            test_ro_arg
-; CHECK:        Args:
-; CHECK-NEXT: - Size:            8
-; CHECK-NEXT:   Align:           8
-; CHECK-NEXT:   ValueKind:       GlobalBuffer
-; CHECK-NEXT:   ValueType:       F32
-; CHECK-NEXT:   AccQual:         ReadOnly
-; CHECK-NEXT:   AddrSpaceQual:   Global
-; CHECK-NEXT:   IsConst:         true
-; CHECK-NEXT:   IsRestrict:      true
-; CHECK-NEXT:   TypeName:        'float*'
-
-; CHECK-NEXT: - Size:            8
-; CHECK-NEXT:   Align:           8
-; CHECK-NEXT:   ValueKind:       GlobalBuffer
-; CHECK-NEXT:   ValueType:       F32
-; CHECK-NEXT:   AccQual:         Default
-; CHECK-NEXT:   AddrSpaceQual:   Global
-; CHECK-NEXT:   TypeName:        'float*'
-
-define amdgpu_kernel void @test_ro_arg(float addrspace(1)* noalias readonly %in, float addrspace(1)* %out)
-    !kernel_arg_addr_space !0 !kernel_arg_access_qual !1 !kernel_arg_type !2
-    !kernel_arg_base_type !2 !kernel_arg_type_qual !3 {
-  ret void
-}
-
-!0 = !{i32 1, i32 1}
-!1 = !{!"none", !"none"}
-!2 = !{!"float*", !"float*"}
-!3 = !{!"const restrict", !""}
-
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-from-llvm-ir-full.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-from-llvm-ir-full.ll
deleted file mode 100644
index 37fd08242fba..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-from-llvm-ir-full.ll
+++ /dev/null
@@ -1,1262 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX700 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX800 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX900 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -amdgpu-dump-comd -amdgpu-verify-comd -filetype=obj -o - < %s 2>&1 | FileCheck --check-prefix=PARSER %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 -amdgpu-dump-comd -amdgpu-verify-comd -filetype=obj -o - < %s 2>&1 | FileCheck --check-prefix=PARSER %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-dump-comd -amdgpu-verify-comd -filetype=obj -o - < %s 2>&1 | FileCheck --check-prefix=PARSER %s
-
-%struct.A = type { i8, float }
-%opencl.image1d_t = type opaque
-%opencl.image2d_t = type opaque
-%opencl.image3d_t = type opaque
-%opencl.queue_t = type opaque
-%opencl.pipe_t = type opaque
-%struct.B = type { i32 addrspace(1)*}
-%opencl.clk_event_t = type opaque
-
-; CHECK: ---
-; CHECK:  Version: [ 1, 0 ]
-; CHECK:  Printf:
-; CHECK:    - '1:1:4:%d\n'
-; CHECK:    - '2:1:8:%g\n'
-; CHECK:  Kernels:
-
-; CHECK:      - Name:            test_char
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          1
-; CHECK-NEXT:       Align:         1
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      char
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_char(i8 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !9
-    !kernel_arg_base_type !9 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_ushort2
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     U16
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      ushort2
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_ushort2(<2 x i16> %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !10
-    !kernel_arg_base_type !10 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_int3
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          16
-; CHECK-NEXT:       Align:         16
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int3
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_int3(<3 x i32> %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !11
-    !kernel_arg_base_type !11 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_ulong4
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          32
-; CHECK-NEXT:       Align:         32
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     U64
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      ulong4
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_ulong4(<4 x i64> %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !12
-    !kernel_arg_base_type !12 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_half8
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          16
-; CHECK-NEXT:       Align:         16
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     F16
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      half8
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_half8(<8 x half> %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !13
-    !kernel_arg_base_type !13 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_float16
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          64
-; CHECK-NEXT:       Align:         64
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     F32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      float16
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_float16(<16 x float> %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !14
-    !kernel_arg_base_type !14 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_double16
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          128
-; CHECK-NEXT:       Align:         128
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     F64
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      double16
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_double16(<16 x double> %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !15
-    !kernel_arg_base_type !15 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_pointer
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      'int *'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_pointer(i32 addrspace(1)* %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !16
-    !kernel_arg_base_type !16 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_image
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     Image
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      image2d_t
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_image(%opencl.image2d_t addrspace(1)* %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !17
-    !kernel_arg_base_type !17 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_sampler
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     Sampler
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      sampler_t
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_sampler(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !18
-    !kernel_arg_base_type !18 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_queue
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     Queue
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      queue_t
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_queue(%opencl.queue_t addrspace(1)* %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !19
-    !kernel_arg_base_type !19 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_struct
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Private
-; CHECK-NEXT:       TypeName:      struct A
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_struct(%struct.A* byval %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !20
-    !kernel_arg_base_type !20 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_i128
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          16
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      i128
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_i128(i128 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !21
-    !kernel_arg_base_type !21 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_multi_arg
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I16
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      short2
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      char3
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_multi_arg(i32 %a, <2 x i16> %b, <3 x i8> %c)
-    !kernel_arg_addr_space !22 !kernel_arg_access_qual !23 !kernel_arg_type !24
-    !kernel_arg_base_type !24 !kernel_arg_type_qual !25 {
-  ret void
-}
-
-; CHECK:      - Name:            test_addr_space
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      'int *'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Constant
-; CHECK-NEXT:       TypeName:      'int *'
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     DynamicSharedPointer
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       PointeeAlign:  4
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Local
-; CHECK-NEXT:       TypeName:      'int *'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_addr_space(i32 addrspace(1)* %g,
-                                           i32 addrspace(2)* %c,
-                                           i32 addrspace(3)* %l)
-    !kernel_arg_addr_space !50 !kernel_arg_access_qual !23 !kernel_arg_type !51
-    !kernel_arg_base_type !51 !kernel_arg_type_qual !25 {
-  ret void
-}
-
-; CHECK:      - Name:            test_type_qual
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       IsVolatile:    true
-; CHECK-NEXT:       TypeName:      'int *'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       IsConst:       true
-; CHECK-NEXT:       IsRestrict:    true
-; CHECK-NEXT:       TypeName:      'int *'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     Pipe
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       IsPipe:        true
-; CHECK-NEXT:       TypeName:      'int *'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_type_qual(i32 addrspace(1)* %a,
-                                          i32 addrspace(1)* %b,
-                                          %opencl.pipe_t addrspace(1)* %c)
-    !kernel_arg_addr_space !22 !kernel_arg_access_qual !23 !kernel_arg_type !51
-    !kernel_arg_base_type !51 !kernel_arg_type_qual !70 {
-  ret void
-}
-
-; CHECK:      - Name:            test_access_qual
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     Image
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       ReadOnly
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      image1d_t
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     Image
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       WriteOnly
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      image2d_t
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     Image
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       ReadWrite
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      image3d_t
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_access_qual(%opencl.image1d_t addrspace(1)* %ro,
-                                            %opencl.image2d_t addrspace(1)* %wo,
-                                            %opencl.image3d_t addrspace(1)* %rw)
-    !kernel_arg_addr_space !60 !kernel_arg_access_qual !61 !kernel_arg_type !62
-    !kernel_arg_base_type !62 !kernel_arg_type_qual !25 {
-  ret void
-}
-
-; CHECK:      - Name:            test_vec_type_hint_half
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       VecTypeHint:   half
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_vec_type_hint_half(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !26 {
-  ret void
-}
-
-; CHECK:      - Name:            test_vec_type_hint_float
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       VecTypeHint:   float
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_vec_type_hint_float(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !27 {
-  ret void
-}
-
-; CHECK:      - Name:            test_vec_type_hint_double
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       VecTypeHint:   double
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_vec_type_hint_double(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !28 {
-  ret void
-}
-
-; CHECK:      - Name:            test_vec_type_hint_char
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       VecTypeHint:   char
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_vec_type_hint_char(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !29 {
-  ret void
-}
-
-; CHECK:      - Name:            test_vec_type_hint_short
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       VecTypeHint:   short
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_vec_type_hint_short(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !30 {
-  ret void
-}
-
-; CHECK:      - Name:            test_vec_type_hint_long
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       VecTypeHint:   long
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_vec_type_hint_long(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !31 {
-  ret void
-}
-
-; CHECK:      - Name:            test_vec_type_hint_unknown
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       VecTypeHint:   unknown
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      int
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_vec_type_hint_unknown(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !32 {
-  ret void
-}
-
-; CHECK:      - Name:            test_reqd_wgs_vec_type_hint
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       ReqdWorkGroupSize: [ 1, 2, 4 ]
-; CHECK-NEXT:       VecTypeHint:       int
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:              4
-; CHECK-NEXT:       Align:             4
-; CHECK-NEXT:       ValueKind:         ByValue
-; CHECK-NEXT:       ValueType:         I32
-; CHECK-NEXT:       AccQual:           Default
-; CHECK-NEXT:       TypeName:          int
-; CHECK-NEXT:     - Size:              8
-; CHECK-NEXT:       Align:             8
-; CHECK-NEXT:       ValueKind:         HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:         I64
-; CHECK-NEXT:     - Size:              8
-; CHECK-NEXT:       Align:             8
-; CHECK-NEXT:       ValueKind:         HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:         I64
-; CHECK-NEXT:     - Size:              8
-; CHECK-NEXT:       Align:             8
-; CHECK-NEXT:       ValueKind:         HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:         I64
-; CHECK-NEXT:     - Size:              8
-; CHECK-NEXT:       Align:             8
-; CHECK-NEXT:       ValueKind:         HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:         I8
-; CHECK-NEXT:       AddrSpaceQual:     Global
-define amdgpu_kernel void @test_reqd_wgs_vec_type_hint(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !5
-    !reqd_work_group_size !6 {
-  ret void
-}
-
-; CHECK:      - Name:            test_wgs_hint_vec_type_hint
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Attrs:
-; CHECK-NEXT:       WorkGroupSizeHint: [ 8, 16, 32 ]
-; CHECK-NEXT:       VecTypeHint:       uint4
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:              4
-; CHECK-NEXT:       Align:             4
-; CHECK-NEXT:       ValueKind:         ByValue
-; CHECK-NEXT:       ValueType:         I32
-; CHECK-NEXT:       AccQual:           Default
-; CHECK-NEXT:       TypeName:          int
-; CHECK-NEXT:     - Size:              8
-; CHECK-NEXT:       Align:             8
-; CHECK-NEXT:       ValueKind:         HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:         I64
-; CHECK-NEXT:     - Size:              8
-; CHECK-NEXT:       Align:             8
-; CHECK-NEXT:       ValueKind:         HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:         I64
-; CHECK-NEXT:     - Size:              8
-; CHECK-NEXT:       Align:             8
-; CHECK-NEXT:       ValueKind:         HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:         I64
-; CHECK-NEXT:     - Size:              8
-; CHECK-NEXT:       Align:             8
-; CHECK-NEXT:       ValueKind:         HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:         I8
-; CHECK-NEXT:       AddrSpaceQual:     Global
-define amdgpu_kernel void @test_wgs_hint_vec_type_hint(i32 %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
-    !kernel_arg_base_type !3 !kernel_arg_type_qual !4 !vec_type_hint !7
-    !work_group_size_hint !8 {
-  ret void
-}
-
-; CHECK:      - Name:            test_arg_ptr_to_ptr
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      'int **'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_arg_ptr_to_ptr(i32* addrspace(1)* %a)
-    !kernel_arg_addr_space !81 !kernel_arg_access_qual !2 !kernel_arg_type !80
-    !kernel_arg_base_type !80 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_arg_struct_contains_ptr
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Private
-; CHECK-NEXT:       TypeName:      struct B
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_arg_struct_contains_ptr(%struct.B* byval %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !82
-    !kernel_arg_base_type !82 !kernel_arg_type_qual !4 {
- ret void
-}
-
-; CHECK:      - Name:            test_arg_vector_of_ptr
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          16
-; CHECK-NEXT:       Align:         16
-; CHECK-NEXT:       ValueKind:     ByValue
-; CHECK-NEXT:       ValueType:     I32
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       TypeName:      'global int* __attribute__((ext_vector_type(2)))'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_arg_vector_of_ptr(<2 x i32 addrspace(1)*> %a)
-    !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !83
-    !kernel_arg_base_type !83 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_arg_unknown_builtin_type
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     Struct
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      clk_event_t
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_arg_unknown_builtin_type(
-    %opencl.clk_event_t addrspace(1)* %a)
-    !kernel_arg_addr_space !81 !kernel_arg_access_qual !2 !kernel_arg_type !84
-    !kernel_arg_base_type !84 !kernel_arg_type_qual !4 {
-  ret void
-}
-
-; CHECK:      - Name:            test_pointee_align
-; CHECK-NEXT:   Language:        OpenCL C
-; CHECK-NEXT:   LanguageVersion: [ 2, 0 ]
-; CHECK-NEXT:   Args:
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     GlobalBuffer
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Global
-; CHECK-NEXT:       TypeName:      'long *'
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     DynamicSharedPointer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       PointeeAlign:  1
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Local
-; CHECK-NEXT:       TypeName:      'char *'
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     DynamicSharedPointer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       PointeeAlign:  2
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Local
-; CHECK-NEXT:       TypeName:      'char2 *'
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     DynamicSharedPointer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       PointeeAlign:  4
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Local
-; CHECK-NEXT:       TypeName:      'char3 *'
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     DynamicSharedPointer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       PointeeAlign:  4
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Local
-; CHECK-NEXT:       TypeName:      'char4 *'
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     DynamicSharedPointer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       PointeeAlign:  8
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Local
-; CHECK-NEXT:       TypeName:      'char8 *'
-; CHECK-NEXT:     - Size:          4
-; CHECK-NEXT:       Align:         4
-; CHECK-NEXT:       ValueKind:     DynamicSharedPointer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       PointeeAlign:  16
-; CHECK-NEXT:       AccQual:       Default
-; CHECK-NEXT:       AddrSpaceQual: Local
-; CHECK-NEXT:       TypeName:      'char16 *'
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetX
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetY
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenGlobalOffsetZ
-; CHECK-NEXT:       ValueType:     I64
-; CHECK-NEXT:     - Size:          8
-; CHECK-NEXT:       Align:         8
-; CHECK-NEXT:       ValueKind:     HiddenPrintfBuffer
-; CHECK-NEXT:       ValueType:     I8
-; CHECK-NEXT:       AddrSpaceQual: Global
-define amdgpu_kernel void @test_pointee_align(i64 addrspace(1)* %a,
-                                              i8 addrspace(3)* %b,
-                                              <2 x i8> addrspace(3)* %c,
-                                              <3 x i8> addrspace(3)* %d,
-                                              <4 x i8> addrspace(3)* %e,
-                                              <8 x i8> addrspace(3)* %f,
-                                              <16 x i8> addrspace(3)* %g)
-    !kernel_arg_addr_space !91 !kernel_arg_access_qual !92 !kernel_arg_type !93
-    !kernel_arg_base_type !93 !kernel_arg_type_qual !94 {
-  ret void
-}
-
-!llvm.printf.fmts = !{!100, !101}
-
-!1 = !{i32 0}
-!2 = !{!"none"}
-!3 = !{!"int"}
-!4 = !{!""}
-!5 = !{i32 undef, i32 1}
-!6 = !{i32 1, i32 2, i32 4}
-!7 = !{<4 x i32> undef, i32 0}
-!8 = !{i32 8, i32 16, i32 32}
-!9 = !{!"char"}
-!10 = !{!"ushort2"}
-!11 = !{!"int3"}
-!12 = !{!"ulong4"}
-!13 = !{!"half8"}
-!14 = !{!"float16"}
-!15 = !{!"double16"}
-!16 = !{!"int *"}
-!17 = !{!"image2d_t"}
-!18 = !{!"sampler_t"}
-!19 = !{!"queue_t"}
-!20 = !{!"struct A"}
-!21 = !{!"i128"}
-!22 = !{i32 0, i32 0, i32 0}
-!23 = !{!"none", !"none", !"none"}
-!24 = !{!"int", !"short2", !"char3"}
-!25 = !{!"", !"", !""}
-!26 = !{half undef, i32 1}
-!27 = !{float undef, i32 1}
-!28 = !{double undef, i32 1}
-!29 = !{i8 undef, i32 1}
-!30 = !{i16 undef, i32 1}
-!31 = !{i64 undef, i32 1}
-!32 = !{i32 *undef, i32 1}
-!50 = !{i32 1, i32 2, i32 3}
-!51 = !{!"int *", !"int *", !"int *"}
-!60 = !{i32 1, i32 1, i32 1}
-!61 = !{!"read_only", !"write_only", !"read_write"}
-!62 = !{!"image1d_t", !"image2d_t", !"image3d_t"}
-!70 = !{!"volatile", !"const restrict", !"pipe"}
-!80 = !{!"int **"}
-!81 = !{i32 1}
-!82 = !{!"struct B"}
-!83 = !{!"global int* __attribute__((ext_vector_type(2)))"}
-!84 = !{!"clk_event_t"}
-!opencl.ocl.version = !{!90}
-!90 = !{i32 2, i32 0}
-!91 = !{i32 0, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3}
-!92 = !{!"none", !"none", !"none", !"none", !"none", !"none", !"none"}
-!93 = !{!"long *", !"char *", !"char2 *", !"char3 *", !"char4 *", !"char8 *", !"char16 *"}
-!94 = !{!"", !"", !"", !"", !"", !"", !""}
-!100 = !{!"1:1:4:%d\5Cn"}
-!101 = !{!"2:1:8:%g\5Cn"}
-
-; NOTES: Displaying notes found at file offset 0x{{[0-9]+}}
-; NOTES-NEXT: Owner    Data size    Description
-; NOTES-NEXT: AMD      0x00000008   Unknown note type: (0x00000001)
-; NOTES-NEXT: AMD      0x0000001b   Unknown note type: (0x00000003)
-; GFX700:     AMD      0x00008b0a   Unknown note type: (0x0000000a)
-; GFX800:     AMD      0x00008e6e   Unknown note type: (0x0000000a)
-; GFX900:     AMD      0x00008b0a   Unknown note type: (0x0000000a)
-
-; PARSER: AMDGPU Code Object Metadata Parser Test: PASS
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-images.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-images.ll
deleted file mode 100644
index 918560469852..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-images.ll
+++ /dev/null
@@ -1,80 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX700 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX800 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX900 --check-prefix=NOTES %s
-
-%opencl.image1d_t = type opaque
-%opencl.image1d_array_t = type opaque
-%opencl.image1d_buffer_t = type opaque
-%opencl.image2d_t = type opaque
-%opencl.image2d_array_t = type opaque
-%opencl.image2d_array_depth_t = type opaque
-%opencl.image2d_array_msaa_t = type opaque
-%opencl.image2d_array_msaa_depth_t = type opaque
-%opencl.image2d_depth_t = type opaque
-%opencl.image2d_msaa_t = type opaque
-%opencl.image2d_msaa_depth_t = type opaque
-%opencl.image3d_t = type opaque
-
-; CHECK: ---
-; CHECK:  Version: [ 1, 0 ]
-
-; CHECK:  Kernels:
-; CHECK:    - Name: test
-; CHECK:      Args:
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image1d_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image1d_array_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image1d_buffer_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image2d_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image2d_array_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image2d_array_depth_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image2d_array_msaa_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image2d_array_msaa_depth_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image2d_depth_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image2d_msaa_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image2d_msaa_depth_t
-; CHECK:        - Size:      8
-; CHECK:          ValueKind: Image
-; CHECK:          TypeName:  image3d_t
-define amdgpu_kernel void @test(%opencl.image1d_t addrspace(1)* %a,
-                                %opencl.image1d_array_t addrspace(1)* %b,
-                                %opencl.image1d_buffer_t addrspace(1)* %c,
-                                %opencl.image2d_t addrspace(1)* %d,
-                                %opencl.image2d_array_t addrspace(1)* %e,
-                                %opencl.image2d_array_depth_t addrspace(1)* %f,
-                                %opencl.image2d_array_msaa_t addrspace(1)* %g,
-                                %opencl.image2d_array_msaa_depth_t addrspace(1)* %h,
-                                %opencl.image2d_depth_t addrspace(1)* %i,
-                                %opencl.image2d_msaa_t addrspace(1)* %j,
-                                %opencl.image2d_msaa_depth_t addrspace(1)* %k,
-                                %opencl.image3d_t addrspace(1)* %l)
-    !kernel_arg_type !1 !kernel_arg_base_type !1 {
-  ret void
-}
-
-!1 = !{!"image1d_t", !"image1d_array_t", !"image1d_buffer_t",
-       !"image2d_t", !"image2d_array_t", !"image2d_array_depth_t",
-       !"image2d_array_msaa_t", !"image2d_array_msaa_depth_t",
-       !"image2d_depth_t", !"image2d_msaa_t", !"image2d_msaa_depth_t",
-       !"image3d_t"}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-1.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-1.ll
deleted file mode 100644
index f41da9f92136..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-1.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata | FileCheck %s
-
-; Make sure llc does not crash for invalid opencl version metadata.
-
-; CHECK: ---
-; CHECK: Version: [ 1, 0 ]
-; CHECK: ...
-
-!opencl.ocl.version = !{}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-2.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-2.ll
deleted file mode 100644
index 0509663d9849..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-2.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata | FileCheck %s
-
-; Make sure llc does not crash for invalid opencl version metadata.
-
-; CHECK: ---
-; CHECK: Version: [ 1, 0 ]
-; CHECK: ...
-
-!opencl.ocl.version = !{!0}
-!0 = !{}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-3.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-3.ll
deleted file mode 100644
index 7404cec5d78a..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-invalid-ocl-version-3.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata | FileCheck %s
-
-; Make sure llc does not crash for invalid opencl version metadata.
-
-; CHECK: ---
-; CHECK: Version: [ 1, 0 ]
-; CHECK: ...
-
-!opencl.ocl.version = !{!0}
-!0 = !{i32 1}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-kernel-code-props.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-kernel-code-props.ll
deleted file mode 100644
index 3b232e40cf25..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-kernel-code-props.ll
+++ /dev/null
@@ -1,32 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX700 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX800 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX900 --check-prefix=NOTES %s
-
-; CHECK: ---
-; CHECK:  Version: [ 1, 0 ]
-
-; CHECK:  Kernels:
-; CHECK:    - Name: test
-; CHECK:      CodeProps:
-; CHECK:        KernargSegmentSize:  24
-; GFX700:       WavefrontNumSGPRs:   6
-; GFX800:       WavefrontNumSGPRs:   96
-; GFX900:       WavefrontNumSGPRs:   6
-; GFX700:       WorkitemNumVGPRs:    4
-; GFX800:       WorkitemNumVGPRs:    6
-; GFX900:       WorkitemNumVGPRs:    6
-; CHECK:        KernargSegmentAlign: 4
-; CHECK:        GroupSegmentAlign:   4
-; CHECK:        PrivateSegmentAlign: 4
-; CHECK:        WavefrontSize:       6
-define amdgpu_kernel void @test(
-    half addrspace(1)* %r,
-    half addrspace(1)* %a,
-    half addrspace(1)* %b) {
-entry:
-  %a.val = load half, half addrspace(1)* %a
-  %b.val = load half, half addrspace(1)* %b
-  %r.val = fadd half %a.val, %b.val
-  store half %r.val, half addrspace(1)* %r
-  ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-kernel-debug-props.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-kernel-debug-props.ll
deleted file mode 100644
index 0ffc92203153..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/code-object-metadata-kernel-debug-props.ll
+++ /dev/null
@@ -1,69 +0,0 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX700 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx800 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX800 --check-prefix=NOTES %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX900 --check-prefix=NOTES %s
-
-declare void @llvm.dbg.declare(metadata, metadata, metadata)
-
-; CHECK: ---
-; CHECK:  Version: [ 1, 0 ]
-
-; CHECK:  Kernels:
-; CHECK:    - Name: test
-; CHECK:      DebugProps:
-; CHECK:        DebuggerABIVersion:                [ 1, 0 ]
-; CHECK:        ReservedNumVGPRs:                  4
-; GFX700:       ReservedFirstVGPR:                 8
-; GFX800:       ReservedFirstVGPR:                 8
-; GFX9:         ReservedFirstVGPR:                 14
-; CHECK:        PrivateSegmentBufferSGPR:          0
-; CHECK:        WavefrontPrivateSegmentOffsetSGPR: 11
-define amdgpu_kernel void @test(i32 addrspace(1)* %A) #0 !dbg !7 !kernel_arg_addr_space !12 !kernel_arg_access_qual !13 !kernel_arg_type !14 !kernel_arg_base_type !14 !kernel_arg_type_qual !15 {
-entry:
-  %A.addr = alloca i32 addrspace(1)*, align 4
-  store i32 addrspace(1)* %A, i32 addrspace(1)** %A.addr, align 4
-  call void @llvm.dbg.declare(metadata i32 addrspace(1)** %A.addr, metadata !16, metadata !17), !dbg !18
-  %0 = load i32 addrspace(1)*, i32 addrspace(1)** %A.addr, align 4, !dbg !19
-  %arrayidx = getelementptr inbounds i32, i32 addrspace(1)* %0, i64 0, !dbg !19
-  store i32 777, i32 addrspace(1)* %arrayidx, align 4, !dbg !20
-  %1 = load i32 addrspace(1)*, i32 addrspace(1)** %A.addr, align 4, !dbg !21
-  %arrayidx1 = getelementptr inbounds i32, i32 addrspace(1)* %1, i64 1, !dbg !21
-  store i32 888, i32 addrspace(1)* %arrayidx1, align 4, !dbg !22
-  %2 = load i32 addrspace(1)*, i32 addrspace(1)** %A.addr, align 4, !dbg !23
-  %arrayidx2 = getelementptr inbounds i32, i32 addrspace(1)* %2, i64 2, !dbg !23
-  store i32 999, i32 addrspace(1)* %arrayidx2, align 4, !dbg !24
-  ret void, !dbg !25
-}
-
-attributes #0 = { noinline nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="gfx800" "target-features"="+16-bit-insts,+amdgpu-debugger-emit-prologue,+amdgpu-debugger-insert-nops,+amdgpu-debugger-reserve-regs,+dpp,+fp64-fp16-denormals,+s-memrealtime,-fp32-denormals" "unsafe-fp-math"="false" "use-soft-float"="false" }
-
-!llvm.dbg.cu = !{!0}
-!opencl.ocl.version = !{!3}
-!llvm.module.flags = !{!4, !5}
-!llvm.ident = !{!6}
-
-!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 5.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
-!1 = !DIFile(filename: "code-object-metadata-kernel-debug-props.cl", directory: "/some/random/directory")
-!2 = !{}
-!3 = !{i32 1, i32 0}
-!4 = !{i32 2, !"Dwarf Version", i32 2}
-!5 = !{i32 2, !"Debug Info Version", i32 3}
-!6 = !{!"clang version 5.0.0"}
-!7 = distinct !DISubprogram(name: "test", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
-!8 = !DISubroutineType(types: !9)
-!9 = !{null, !10}
-!10 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64)
-!11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
-!12 = !{i32 1}
-!13 = !{!"none"}
-!14 = !{!"int*"}
-!15 = !{!""}
-!16 = !DILocalVariable(name: "A", arg: 1, scope: !7, file: !1, line: 1, type: !10)
-!17 = !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef)
-!18 = !DILocation(line: 1, column: 30, scope: !7)
-!19 = !DILocation(line: 2, column: 3, scope: !7)
-!20 = !DILocation(line: 2, column: 8, scope: !7)
-!21 = !DILocation(line: 3, column: 3, scope: !7)
-!22 = !DILocation(line: 3, column: 8, scope: !7)
-!23 = !DILocation(line: 4, column: 3, scope: !7)
-!24 = !DILocation(line: 4, column: 8, scope: !7)
-!25 = !DILocation(line: 5, column: 1, scope: !7)
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/debugger-reserve-regs.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/debugger-reserve-regs.ll
deleted file mode 100644
index 764c60b12bf9..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/debugger-reserve-regs.ll
+++ /dev/null
@@ -1,63 +0,0 @@
-; RUN: llc -O0 -mtriple=amdgcn--amdhsa -mcpu=fiji -mattr=+amdgpu-debugger-reserve-regs -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -O0 -mtriple=amdgcn--amdhsa -mcpu=gfx901 -mattr=+amdgpu-debugger-reserve-regs -verify-machineinstrs < %s | FileCheck %s
-; CHECK: reserved_vgpr_first = {{[0-9]+}}
-; CHECK-NEXT: reserved_vgpr_count = 4
-; CHECK: ReservedVGPRFirst: {{[0-9]+}}
-; CHECK-NEXT: ReservedVGPRCount: 4
-
-; Function Attrs: nounwind
-define amdgpu_kernel void @test(i32 addrspace(1)* %A) #0 !dbg !12 {
-entry:
-  %A.addr = alloca i32 addrspace(1)*, align 4
-  store i32 addrspace(1)* %A, i32 addrspace(1)** %A.addr, align 4
-  call void @llvm.dbg.declare(metadata i32 addrspace(1)** %A.addr, metadata !17, metadata !18), !dbg !19
-  %0 = load i32 addrspace(1)*, i32 addrspace(1)** %A.addr, align 4, !dbg !20
-  %arrayidx = getelementptr inbounds i32, i32 addrspace(1)* %0, i32 0, !dbg !20
-  store i32 1, i32 addrspace(1)* %arrayidx, align 4, !dbg !21
-  %1 = load i32 addrspace(1)*, i32 addrspace(1)** %A.addr, align 4, !dbg !22
-  %arrayidx1 = getelementptr inbounds i32, i32 addrspace(1)* %1, i32 1, !dbg !22
-  store i32 2, i32 addrspace(1)* %arrayidx1, align 4, !dbg !23
-  %2 = load i32 addrspace(1)*, i32 addrspace(1)** %A.addr, align 4, !dbg !24
-  %arrayidx2 = getelementptr inbounds i32, i32 addrspace(1)* %2, i32 2, !dbg !24
-  store i32 3, i32 addrspace(1)* %arrayidx2, align 4, !dbg !25
-  ret void, !dbg !26
-}
-
-; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
-
-attributes #0 = { nounwind }
-attributes #1 = { nounwind readnone }
-
-!llvm.dbg.cu = !{!0}
-!opencl.kernels = !{!3}
-!llvm.module.flags = !{!9, !10}
-!llvm.ident = !{!11}
-
-!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.9.0 (trunk 268929)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
-!1 = !DIFile(filename: "test01.cl", directory: "/home/kzhuravl/Lightning/testing")
-!2 = !{}
-!3 = !{void (i32 addrspace(1)*)* @test, !4, !5, !6, !7, !8}
-!4 = !{!"kernel_arg_addr_space", i32 1}
-!5 = !{!"kernel_arg_access_qual", !"none"}
-!6 = !{!"kernel_arg_type", !"int*"}
-!7 = !{!"kernel_arg_base_type", !"int*"}
-!8 = !{!"kernel_arg_type_qual", !""}
-!9 = !{i32 2, !"Dwarf Version", i32 2}
-!10 = !{i32 2, !"Debug Info Version", i32 3}
-!11 = !{!"clang version 3.9.0 (trunk 268929)"}
-!12 = distinct !DISubprogram(name: "test", scope: !1, file: !1, line: 1, type: !13, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
-!13 = !DISubroutineType(types: !14)
-!14 = !{null, !15}
-!15 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !16, size: 64, align: 32)
-!16 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
-!17 = !DILocalVariable(name: "A", arg: 1, scope: !12, file: !1, line: 1, type: !15)
-!18 = !DIExpression()
-!19 = !DILocation(line: 1, column: 30, scope: !12)
-!20 = !DILocation(line: 2, column: 3, scope: !12)
-!21 = !DILocation(line: 2, column: 8, scope: !12)
-!22 = !DILocation(line: 3, column: 3, scope: !12)
-!23 = !DILocation(line: 3, column: 8, scope: !12)
-!24 = !DILocation(line: 4, column: 3, scope: !12)
-!25 = !DILocation(line: 4, column: 8, scope: !12)
-!26 = !DILocation(line: 5, column: 1, scope: !12)
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/insert-waits-callee.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/insert-waits-callee.mir
deleted file mode 100644
index ad7cd0cc8abf..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/insert-waits-callee.mir
+++ /dev/null
@@ -1,25 +0,0 @@
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -verify-machineinstrs -run-pass si-insert-waits -o - %s | FileCheck %s
---- |
-  define float @entry_callee_wait(float %arg) #0 {
-    ret float %arg
-  }
-
-  attributes #0 = { nounwind }
-...
----
-# CHECK-LABEL: name: entry_callee_wait{{$}}
-# CHECK: bb.0:
-# CHECK-NEXT: S_WAITCNT 0{{$}}
-# CHECK-NEXT: V_ADD_F32
-# CHECK-NEXT: S_SETPC_B64
-liveins:
-  - { reg: '%sgpr0_sgpr1' }
-  - { reg: '%vgpr0' }
-
-name: entry_callee_wait
-body:             |
-  bb.0:
-    %vgpr0 = V_ADD_F32_e32 %vgpr0, %vgpr0, implicit %exec
-    S_SETPC_B64 killed %sgpr0_sgpr1
-
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/insert-waits-exp.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/insert-waits-exp.mir
deleted file mode 100644
index 1055201ce3dd..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/insert-waits-exp.mir
+++ /dev/null
@@ -1,63 +0,0 @@
-# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-insert-waits -o - %s | FileCheck %s
---- |
-  define amdgpu_ps <4 x float> @exp_done_waitcnt(<4 x i32> inreg, <4 x
-  i32> inreg, i32 inreg %w, float %v) #0 {
-    %a = load volatile float, float addrspace(1)* undef
-    %b = load volatile float, float addrspace(1)* undef
-    %c = load volatile float, float addrspace(1)* undef
-    %d = load volatile float, float addrspace(1)* undef
-    call void @llvm.amdgcn.exp.f32(i32 15, i32 1, float %a, float %b, float %c, float %d, i1 true, i1 false)
-    ret <4 x float> <float 5.000000e-01, float 1.000000e+00, float 2.000000e+00, float 4.000000e+00>
-  }
-
-  declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0
-
-  attributes #0 = { nounwind }
-
-...
----
-
-# CHECK-LABEL: name: exp_done_waitcnt{{$}}
-# CHECK: EXP_DONE
-# CHECK-NEXT: S_WAITCNT 3855
-# CHECK: %vgpr0 = V_MOV_B32
-# CHECK: %vgpr1 = V_MOV_B32
-# CHECK: %vgpr2 = V_MOV_B32
-# CHECK: %vgpr3 = V_MOV_B32
-name:            exp_done_waitcnt
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.2):
-    %sgpr3 = S_MOV_B32 61440
-    %sgpr2 = S_MOV_B32 -1
-    %vgpr0 = BUFFER_LOAD_DWORD_OFFSET %sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %vgpr1 = BUFFER_LOAD_DWORD_OFFSET %sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %vgpr2 = BUFFER_LOAD_DWORD_OFFSET %sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %vgpr3 = BUFFER_LOAD_DWORD_OFFSET killed %sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    EXP_DONE 0, killed %vgpr0, killed %vgpr1, killed %vgpr2, killed %vgpr3, -1, -1, 15, implicit %exec
-    %vgpr0 = V_MOV_B32_e32 1056964608, implicit %exec
-    %vgpr1 = V_MOV_B32_e32 1065353216, implicit %exec
-    %vgpr2 = V_MOV_B32_e32 1073741824, implicit %exec
-    %vgpr3 = V_MOV_B32_e32 1082130432, implicit %exec
-    SI_RETURN_TO_EPILOG killed %vgpr0, killed %vgpr1, killed %vgpr2, killed %vgpr3
-
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.ll
deleted file mode 100644
index 87d838727882..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.ll
+++ /dev/null
@@ -1,123 +0,0 @@
-;RUN: llc < %s -march=amdgcn -mcpu=verde -show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SI
-;RUN: llc < %s -march=amdgcn -mcpu=tonga -show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=VI
-
-;CHECK-LABEL: {{^}}image_atomic_swap:
-;SI: image_atomic_swap v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x3c,0xf0,0x00,0x04,0x00,0x00]
-;VI: image_atomic_swap v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x40,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-define amdgpu_ps float @image_atomic_swap(<8 x i32> inreg, <4 x i32>, i32) {
-main_body:
-  %orig = call i32 @llvm.amdgcn.image.atomic.swap.v4i32(i32 %2, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %orig.f = bitcast i32 %orig to float
-  ret float %orig.f
-}
-
-;CHECK-LABEL: {{^}}image_atomic_swap_v2i32:
-;SI: image_atomic_swap v2, v[0:1], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x3c,0xf0,0x00,0x02,0x00,0x00]
-;VI: image_atomic_swap v2, v[0:1], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x40,0xf0,0x00,0x02,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-define amdgpu_ps float @image_atomic_swap_v2i32(<8 x i32> inreg, <2 x i32>, i32) {
-main_body:
-  %orig = call i32 @llvm.amdgcn.image.atomic.swap.v2i32(i32 %2, <2 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %orig.f = bitcast i32 %orig to float
-  ret float %orig.f
-}
-
-;CHECK-LABEL: {{^}}image_atomic_swap_i32:
-;SI: image_atomic_swap v1, v0, s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x3c,0xf0,0x00,0x01,0x00,0x00]
-;VI: image_atomic_swap v1, v0, s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x40,0xf0,0x00,0x01,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-define amdgpu_ps float @image_atomic_swap_i32(<8 x i32> inreg, i32, i32) {
-main_body:
-  %orig = call i32 @llvm.amdgcn.image.atomic.swap.i32(i32 %2, i32 %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %orig.f = bitcast i32 %orig to float
-  ret float %orig.f
-}
-
-;CHECK-LABEL: {{^}}image_atomic_cmpswap:
-;SI: image_atomic_cmpswap v[4:5], v[0:3], s[0:7] dmask:0x3 unorm glc ; encoding: [0x00,0x33,0x40,0xf0,0x00,0x04,0x00,0x00]
-;VI: image_atomic_cmpswap v[4:5], v[0:3], s[0:7] dmask:0x3 unorm glc ; encoding: [0x00,0x33,0x44,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: v_mov_b32_e32 v0, v4
-define amdgpu_ps float @image_atomic_cmpswap(<8 x i32> inreg, <4 x i32>, i32, i32) {
-main_body:
-  %orig = call i32 @llvm.amdgcn.image.atomic.cmpswap.v4i32(i32 %2, i32 %3, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %orig.f = bitcast i32 %orig to float
-  ret float %orig.f
-}
-
-;CHECK-LABEL: {{^}}image_atomic_add:
-;SI: image_atomic_add v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x44,0xf0,0x00,0x04,0x00,0x00]
-;VI: image_atomic_add v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x48,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-define amdgpu_ps float @image_atomic_add(<8 x i32> inreg, <4 x i32>, i32) {
-main_body:
-  %orig = call i32 @llvm.amdgcn.image.atomic.add.v4i32(i32 %2, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %orig.f = bitcast i32 %orig to float
-  ret float %orig.f
-}
-
-;CHECK-LABEL: {{^}}image_atomic_sub:
-;SI: image_atomic_sub v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x48,0xf0,0x00,0x04,0x00,0x00]
-;VI: image_atomic_sub v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x4c,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-define amdgpu_ps float @image_atomic_sub(<8 x i32> inreg, <4 x i32>, i32) {
-main_body:
-  %orig = call i32 @llvm.amdgcn.image.atomic.sub.v4i32(i32 %2, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %orig.f = bitcast i32 %orig to float
-  ret float %orig.f
-}
-
-;CHECK-LABEL: {{^}}image_atomic_unchanged:
-;CHECK: image_atomic_smin v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x50,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: image_atomic_umin v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x54,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: image_atomic_smax v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x58,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: image_atomic_umax v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x5c,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: image_atomic_and v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x60,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: image_atomic_or v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x64,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: image_atomic_xor v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x68,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: image_atomic_inc v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x6c,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-;CHECK: image_atomic_dec v4, v[0:3], s[0:7] dmask:0x1 unorm glc ; encoding: [0x00,0x31,0x70,0xf0,0x00,0x04,0x00,0x00]
-;CHECK: s_waitcnt vmcnt(0)
-define amdgpu_ps float @image_atomic_unchanged(<8 x i32> inreg, <4 x i32>, i32) {
-main_body:
-  %t0 = call i32 @llvm.amdgcn.image.atomic.smin.v4i32(i32 %2, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %t1 = call i32 @llvm.amdgcn.image.atomic.umin.v4i32(i32 %t0, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %t2 = call i32 @llvm.amdgcn.image.atomic.smax.v4i32(i32 %t1, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %t3 = call i32 @llvm.amdgcn.image.atomic.umax.v4i32(i32 %t2, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %t4 = call i32 @llvm.amdgcn.image.atomic.and.v4i32(i32 %t3, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %t5 = call i32 @llvm.amdgcn.image.atomic.or.v4i32(i32 %t4, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %t6 = call i32 @llvm.amdgcn.image.atomic.xor.v4i32(i32 %t5, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %t7 = call i32 @llvm.amdgcn.image.atomic.inc.v4i32(i32 %t6, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %t8 = call i32 @llvm.amdgcn.image.atomic.dec.v4i32(i32 %t7, <4 x i32> %1, <8 x i32> %0, i1 0, i1 0, i1 0)
-  %out = bitcast i32 %t8 to float
-  ret float %out
-}
-
-declare i32 @llvm.amdgcn.image.atomic.swap.i32(i32, i32, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.swap.v2i32(i32, <2 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.swap.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-
-declare i32 @llvm.amdgcn.image.atomic.cmpswap.v4i32(i32, i32, <4 x i32>, <8 x i32>,i1, i1, i1) #0
-
-declare i32 @llvm.amdgcn.image.atomic.add.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.sub.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.smin.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.umin.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.smax.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.umax.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.and.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.or.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.xor.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.inc.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-declare i32 @llvm.amdgcn.image.atomic.dec.v4i32(i32, <4 x i32>, <8 x i32>, i1, i1, i1) #0
-
-attributes #0 = { nounwind }
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll
deleted file mode 100644
index a9351dbb27d2..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll
+++ /dev/null
@@ -1,383 +0,0 @@
-; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=GCN %s
-; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN %s
-
-; GCN-LABEL: {{^}}gather4_v2:
-; GCN: image_gather4 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_v2(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.v4f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4:
-; GCN: image_gather4 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_cl:
-; GCN: image_gather4_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_l:
-; GCN: image_gather4_l {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_l(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.l.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_b:
-; GCN: image_gather4_b {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_b(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.b.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_b_cl:
-; GCN: image_gather4_b_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_b_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_b_cl_v8:
-; GCN: image_gather4_b_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_b_cl_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_lz_v2:
-; GCN: image_gather4_lz {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_lz_v2(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.lz.v4f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_lz:
-; GCN: image_gather4_lz {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_lz(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.lz.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-
-
-; GCN-LABEL: {{^}}gather4_o:
-; GCN: image_gather4_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_cl_o:
-; GCN: image_gather4_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_cl_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_cl_o_v8:
-; GCN: image_gather4_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_cl_o_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.cl.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_l_o:
-; GCN: image_gather4_l_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_l_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.l.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_l_o_v8:
-; GCN: image_gather4_l_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_l_o_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.l.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_b_o:
-; GCN: image_gather4_b_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_b_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.b.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_b_o_v8:
-; GCN: image_gather4_b_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_b_o_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.b.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_b_cl_o:
-; GCN: image_gather4_b_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_b_cl_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_lz_o:
-; GCN: image_gather4_lz_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_lz_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.lz.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-
-; GCN-LABEL: {{^}}gather4_c:
-; GCN: image_gather4_c {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_cl:
-; GCN: image_gather4_c_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_cl_v8:
-; GCN: image_gather4_c_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_cl_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_l:
-; GCN: image_gather4_c_l {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_l(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.l.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_l_v8:
-; GCN: image_gather4_c_l {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_l_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.l.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_b:
-; GCN: image_gather4_c_b {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_b(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.b.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_b_v8:
-; GCN: image_gather4_c_b {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_b_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.b.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_b_cl:
-; GCN: image_gather4_c_b_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_b_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_lz:
-; GCN: image_gather4_c_lz {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_lz(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.lz.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-
-; GCN-LABEL: {{^}}gather4_c_o:
-; GCN: image_gather4_c_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_o_v8:
-; GCN: image_gather4_c_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_o_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_cl_o:
-; GCN: image_gather4_c_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_cl_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_l_o:
-; GCN: image_gather4_c_l_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_l_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.l.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_b_o:
-; GCN: image_gather4_c_b_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_b_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.b.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_b_cl_o:
-; GCN: image_gather4_c_b_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_b_cl_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_lz_o:
-; GCN: image_gather4_c_lz_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_lz_o(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_c_lz_o_v8:
-; GCN: image_gather4_c_lz_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_c_lz_o_v8(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.v4f32.v8f32.v8i32(<8 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_f32:
-; GCN: image_gather4 {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 da
-define amdgpu_kernel void @gather4_f32(float addrspace(1)* %out) {
-main_body:
-  %r = call float @llvm.amdgcn.image.gather4.f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store float %r, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}gather4_v2f32:
-; GCN: image_gather4 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x3 da
-define amdgpu_kernel void @gather4_v2f32(<2 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <2 x float> @llvm.amdgcn.image.gather4.v2f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 3, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <2 x float> %r, <2 x float> addrspace(1)* %out
-  ret void
-}
-
-declare <4 x float> @llvm.amdgcn.image.gather4.v4f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.l.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.b.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.b.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.b.cl.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.lz.v4f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.lz.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-declare <4 x float> @llvm.amdgcn.image.gather4.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.cl.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.l.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.l.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.b.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.b.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.lz.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-declare <4 x float> @llvm.amdgcn.image.gather4.c.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.cl.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.l.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.l.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.b.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.b.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.lz.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-declare <4 x float> @llvm.amdgcn.image.gather4.c.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.l.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.b.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.v4f32.v8f32.v8i32(<8 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-declare float @llvm.amdgcn.image.gather4.f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <2 x float> @llvm.amdgcn.image.gather4.v2f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-attributes #0 = { nounwind readnone }
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll
deleted file mode 100644
index 2e78e2a4c6f5..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll
+++ /dev/null
@@ -1,47 +0,0 @@
-; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=GCN %s
-; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN %s
-
-; GCN-LABEL: {{^}}getlod:
-; GCN: image_get_lod {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf da
-define amdgpu_kernel void @getlod(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.f32.v8i32(float undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}getlod_v2:
-; GCN: image_get_lod {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf da
-define amdgpu_kernel void @getlod_v2(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}getlod_v4:
-; GCN: image_get_lod {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf da
-define amdgpu_kernel void @getlod_v4(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 1)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_getlod_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_getlod_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.f32.v8i32(float, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-
-attributes #0 = { nounwind readnone }
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.ll
deleted file mode 100644
index a289f7b0cfb1..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.ll
+++ /dev/null
@@ -1,180 +0,0 @@
-; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s
-
-; GCN-LABEL: {{^}}image_load_v4i32:
-; GCN: image_load v[0:3], v[0:3], s[0:7] dmask:0xf unorm
-; GCN: s_waitcnt vmcnt(0)
-define amdgpu_ps <4 x float> @image_load_v4i32(<8 x i32> inreg %rsrc, <4 x i32> %c) #0 {
-main_body:
-  %tex = call <4 x float> @llvm.amdgcn.image.load.v4f32.v4i32.v8i32(<4 x i32> %c, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret <4 x float> %tex
-}
-
-; GCN-LABEL: {{^}}image_load_v2i32:
-; GCN: image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm
-; GCN: s_waitcnt vmcnt(0)
-define amdgpu_ps <4 x float> @image_load_v2i32(<8 x i32> inreg %rsrc, <2 x i32> %c) #0 {
-main_body:
-  %tex = call <4 x float> @llvm.amdgcn.image.load.v4f32.v2i32.v8i32(<2 x i32> %c, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret <4 x float> %tex
-}
-
-; GCN-LABEL: {{^}}image_load_i32:
-; GCN: image_load v[0:3], v0, s[0:7] dmask:0xf unorm
-; GCN: s_waitcnt vmcnt(0)
-define amdgpu_ps <4 x float> @image_load_i32(<8 x i32> inreg %rsrc, i32 %c) #0 {
-main_body:
-  %tex = call <4 x float> @llvm.amdgcn.image.load.v4f32.i32.v8i32(i32 %c, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret <4 x float> %tex
-}
-
-; GCN-LABEL: {{^}}image_load_mip:
-; GCN: image_load_mip v[0:3], v[0:3], s[0:7] dmask:0xf unorm
-; GCN: s_waitcnt vmcnt(0)
-define amdgpu_ps <4 x float> @image_load_mip(<8 x i32> inreg %rsrc, <4 x i32> %c) #0 {
-main_body:
-  %tex = call <4 x float> @llvm.amdgcn.image.load.mip.v4f32.v4i32.v8i32(<4 x i32> %c, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret <4 x float> %tex
-}
-
-; GCN-LABEL: {{^}}image_load_1:
-; GCN: image_load v0, v[0:3], s[0:7] dmask:0x1 unorm
-; GCN: s_waitcnt vmcnt(0)
-define amdgpu_ps float @image_load_1(<8 x i32> inreg %rsrc, <4 x i32> %c) #0 {
-main_body:
-  %tex = call <4 x float> @llvm.amdgcn.image.load.v4f32.v4i32.v8i32(<4 x i32> %c, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  %elt = extractelement <4 x float> %tex, i32 0
-  ret float %elt
-}
-
-; GCN-LABEL: {{^}}image_load_f32_v2i32:
-; GCN: image_load {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 unorm
-; GCN: s_waitcnt vmcnt(0)
-define amdgpu_ps float @image_load_f32_v2i32(<8 x i32> inreg %rsrc, <2 x i32> %c) #0 {
-main_body:
-  %tex = call float @llvm.amdgcn.image.load.f32.v2i32.v8i32(<2 x i32> %c, <8 x i32> %rsrc, i32 1, i1 false, i1 false, i1 false, i1 false)
-  ret float %tex
-}
-
-; GCN-LABEL: {{^}}image_load_v2f32_v4i32:
-; GCN: image_load {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x3 unorm
-; GCN: s_waitcnt vmcnt(0)
-define amdgpu_ps <2 x float> @image_load_v2f32_v4i32(<8 x i32> inreg %rsrc, <4 x i32> %c) #0 {
-main_body:
-  %tex = call <2 x float> @llvm.amdgcn.image.load.v2f32.v4i32.v8i32(<4 x i32> %c, <8 x i32> %rsrc, i32 3, i1 false, i1 false, i1 false, i1 false)
-  ret <2 x float> %tex
-}
-
-; GCN-LABEL: {{^}}image_store_v4i32:
-; GCN: image_store v[0:3], v[4:7], s[0:7] dmask:0xf unorm
-define amdgpu_ps void @image_store_v4i32(<8 x i32> inreg %rsrc, <4 x float> %data, <4 x i32> %coords) #0 {
-main_body:
-  call void @llvm.amdgcn.image.store.v4f32.v4i32.v8i32(<4 x float> %data, <4 x i32> %coords, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret void
-}
-
-; GCN-LABEL: {{^}}image_store_v2i32:
-; GCN: image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm
-define amdgpu_ps void @image_store_v2i32(<8 x i32> inreg %rsrc, <4 x float> %data, <2 x i32> %coords) #0 {
-main_body:
-  call void @llvm.amdgcn.image.store.v4f32.v2i32.v8i32(<4 x float> %data, <2 x i32> %coords, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret void
-}
-
-; GCN-LABEL: {{^}}image_store_i32:
-; GCN: image_store v[0:3], v4, s[0:7] dmask:0xf unorm
-define amdgpu_ps void @image_store_i32(<8 x i32> inreg %rsrc, <4 x float> %data, i32 %coords) #0 {
-main_body:
-  call void @llvm.amdgcn.image.store.v4f32.i32.v8i32(<4 x float> %data, i32 %coords, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret void
-}
-
-; GCN-LABEL: {{^}}image_store_f32_i32:
-; GCN: image_store {{v[0-9]+}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1 unorm
-define amdgpu_ps void @image_store_f32_i32(<8 x i32> inreg %rsrc, float %data, i32 %coords) #0 {
-main_body:
-  call void @llvm.amdgcn.image.store.f32.i32.v8i32(float %data, i32 %coords, <8 x i32> %rsrc, i32 1, i1 false, i1 false, i1 false, i1 false)
-  ret void
-}
-
-; GCN-LABEL: {{^}}image_store_v2f32_v4i32:
-; GCN: image_store {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x3 unorm
-define amdgpu_ps void @image_store_v2f32_v4i32(<8 x i32> inreg %rsrc, <2 x float> %data, <4 x i32> %coords) #0 {
-main_body:
-  call void @llvm.amdgcn.image.store.v2f32.v4i32.v8i32(<2 x float> %data, <4 x i32> %coords, <8 x i32> %rsrc, i32 3, i1 false, i1 false, i1 false, i1 false)
-  ret void
-}
-
-; GCN-LABEL: {{^}}image_store_mip:
-; GCN: image_store_mip v[0:3], v[4:7], s[0:7] dmask:0xf unorm
-define amdgpu_ps void @image_store_mip(<8 x i32> inreg %rsrc, <4 x float> %data, <4 x i32> %coords) #0 {
-main_body:
-  call void @llvm.amdgcn.image.store.mip.v4f32.v4i32.v8i32(<4 x float> %data, <4 x i32> %coords, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret void
-}
-
-; GCN-LABEL: {{^}}getresinfo:
-; GCN: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_ps void @getresinfo() #0 {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.getresinfo.v4f32.i32.v8i32(i32 undef, <8 x i32> undef, i32 15, i1 false, i1 false, i1 false, i1 false)
-  %r0 = extractelement <4 x float> %r, i32 0
-  %r1 = extractelement <4 x float> %r, i32 1
-  %r2 = extractelement <4 x float> %r, i32 2
-  %r3 = extractelement <4 x float> %r, i32 3
-  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %r0, float %r1, float %r2, float %r3, i1 true, i1 true) #0
-  ret void
-}
-
-; Ideally, the register allocator would avoid the wait here
-;
-; GCN-LABEL: {{^}}image_store_wait:
-; GCN: image_store v[0:3], v4, s[0:7] dmask:0xf unorm
-; GCN: s_waitcnt expcnt(0)
-; GCN: image_load v[0:3], v4, s[8:15] dmask:0xf unorm
-; GCN: s_waitcnt vmcnt(0)
-; GCN: image_store v[0:3], v4, s[16:23] dmask:0xf unorm
-define amdgpu_ps void @image_store_wait(<8 x i32> inreg %arg, <8 x i32> inreg %arg1, <8 x i32> inreg %arg2, <4 x float> %arg3, i32 %arg4) #0 {
-main_body:
-  call void @llvm.amdgcn.image.store.v4f32.i32.v8i32(<4 x float> %arg3, i32 %arg4, <8 x i32> %arg, i32 15, i1 false, i1 false, i1 false, i1 false)
-  %data = call <4 x float> @llvm.amdgcn.image.load.v4f32.i32.v8i32(i32 %arg4, <8 x i32> %arg1, i32 15, i1 false, i1 false, i1 false, i1 false)
-  call void @llvm.amdgcn.image.store.v4f32.i32.v8i32(<4 x float> %data, i32 %arg4, <8 x i32> %arg2, i32 15, i1 false, i1 false, i1 false, i1 false)
-  ret void
-}
-
-; SI won't merge ds memory operations, because of the signed offset bug, so
-; we only have check lines for VI.
-; VI-LABEL: image_load_mmo
-; VI: v_mov_b32_e32 [[ZERO:v[0-9]+]], 0
-; VI: ds_write2_b32 v{{[0-9]+}}, [[ZERO]], [[ZERO]] offset1:4
-define amdgpu_ps void @image_load_mmo(float addrspace(3)* %lds, <2 x i32> %c, <8 x i32> inreg %rsrc) #0 {
-bb:
-  store float 0.000000e+00, float addrspace(3)* %lds
-  %tex = call float @llvm.amdgcn.image.load.f32.v2i32.v8i32(<2 x i32> %c, <8 x i32> %rsrc, i32 15, i1 false, i1 false, i1 false, i1 false)
-  %tmp2 = getelementptr float, float addrspace(3)* %lds, i32 4
-  store float 0.000000e+00, float addrspace(3)* %tmp2
-  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tex, float %tex, float %tex, float %tex, i1 true, i1 true) #0
-  ret void
-}
-
-declare float @llvm.amdgcn.image.load.f32.v2i32.v8i32(<2 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
-declare <2 x float> @llvm.amdgcn.image.load.v2f32.v4i32.v8i32(<4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
-declare void @llvm.amdgcn.image.store.f32.i32.v8i32(float, i32, <8 x i32>, i32, i1, i1, i1, i1) #0
-
-
-declare void @llvm.amdgcn.image.store.v2f32.v4i32.v8i32(<2 x float>, <4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #0
-declare void @llvm.amdgcn.image.store.v4f32.i32.v8i32(<4 x float>, i32, <8 x i32>, i32, i1, i1, i1, i1) #0
-declare void @llvm.amdgcn.image.store.v4f32.v2i32.v8i32(<4 x float>, <2 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #0
-declare void @llvm.amdgcn.image.store.v4f32.v4i32.v8i32(<4 x float>, <4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #0
-declare void @llvm.amdgcn.image.store.mip.v4f32.v4i32.v8i32(<4 x float>, <4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #0
-
-declare <4 x float> @llvm.amdgcn.image.load.v4f32.i32.v8i32(i32, <8 x i32>, i32, i1, i1, i1, i1) #1
-declare <4 x float> @llvm.amdgcn.image.load.v4f32.v2i32.v8i32(<2 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
-declare <4 x float> @llvm.amdgcn.image.load.v4f32.v4i32.v8i32(<4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
-declare <4 x float> @llvm.amdgcn.image.load.mip.v4f32.v4i32.v8i32(<4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
-declare <4 x float> @llvm.amdgcn.image.getresinfo.v4f32.i32.v8i32(i32, <8 x i32>, i32, i1, i1, i1, i1) #1
-
-declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0
-
-attributes #0 = { nounwind }
-attributes #1 = { nounwind readonly }
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll
deleted file mode 100644
index 4f90b0a25eaa..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll
+++ /dev/null
@@ -1,435 +0,0 @@
-; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=GCN %s
-; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN %s
-
-; GCN-LABEL: {{^}}sample:
-; GCN: image_sample {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_cl:
-; GCN: image_sample_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_d:
-; GCN: image_sample_d {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_d(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.d.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_d_cl:
-; GCN: image_sample_d_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_d_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.d.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_l:
-; GCN: image_sample_l {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_l(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.l.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_b:
-; GCN: image_sample_b {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_b(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.b.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_b_cl:
-; GCN: image_sample_b_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_b_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.b.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_lz:
-; GCN: image_sample_lz {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_lz(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.lz.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_cd:
-; GCN: image_sample_cd {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_cd(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cd.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_cd_cl:
-; GCN: image_sample_cd_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_cd_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c:
-; GCN: image_sample_c {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_cl:
-; GCN: image_sample_c_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_d:
-; GCN: image_sample_c_d {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_d(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.d.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_d_cl:
-; GCN: image_sample_c_d_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_d_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_l:
-; GCN: image_sample_c_l {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_l(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.l.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_b:
-; GCN: image_sample_c_b {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_b(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.b.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_b_cl:
-; GCN: image_sample_c_b_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_b_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.b.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_lz:
-; GCN: image_sample_c_lz {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_lz(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.lz.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_cd:
-; GCN: image_sample_c_cd {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_cd(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cd.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_cd_cl:
-; GCN: image_sample_c_cd_cl {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_cd_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_f32:
-; GCN: image_sample {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x1
-define amdgpu_kernel void @sample_f32(float addrspace(1)* %out) {
-main_body:
-  %r = call float @llvm.amdgcn.image.sample.f32.v2f32.v8i32(<2 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 1, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store float %r, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_v2f32:
-; GCN: image_sample {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0x3
-define amdgpu_kernel void @sample_v2f32(<2 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <2 x float> @llvm.amdgcn.image.sample.v2f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 3, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <2 x float> %r, <2 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_0:
-; GCN: image_sample v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x1{{$}}
-define amdgpu_kernel void @adjust_writemask_sample_0(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_01:
-; GCN: image_sample v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x3{{$}}
-define amdgpu_kernel void @adjust_writemask_sample_01(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  %elt1 = extractelement <4 x float> %r, i32 1
-  store volatile float %elt0, float addrspace(1)* %out
-  store volatile float %elt1, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_012:
-; GCN: image_sample v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x7{{$}}
-define amdgpu_kernel void @adjust_writemask_sample_012(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  %elt1 = extractelement <4 x float> %r, i32 1
-  %elt2 = extractelement <4 x float> %r, i32 2
-  store volatile float %elt0, float addrspace(1)* %out
-  store volatile float %elt1, float addrspace(1)* %out
-  store volatile float %elt2, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_12:
-; GCN: image_sample v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x6{{$}}
-define amdgpu_kernel void @adjust_writemask_sample_12(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  %elt1 = extractelement <4 x float> %r, i32 1
-  %elt2 = extractelement <4 x float> %r, i32 2
-  store volatile float %elt1, float addrspace(1)* %out
-  store volatile float %elt2, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_03:
-; GCN: image_sample v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0x9{{$}}
-define amdgpu_kernel void @adjust_writemask_sample_03(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  %elt3 = extractelement <4 x float> %r, i32 3
-  store volatile float %elt0, float addrspace(1)* %out
-  store volatile float %elt3, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_13:
-; GCN: image_sample v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0xa{{$}}
-define amdgpu_kernel void @adjust_writemask_sample_13(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  %elt1 = extractelement <4 x float> %r, i32 1
-  %elt3 = extractelement <4 x float> %r, i32 3
-  store volatile float %elt1, float addrspace(1)* %out
-  store volatile float %elt3, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_123:
-; GCN: image_sample v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}} dmask:0xe{{$}}
-define amdgpu_kernel void @adjust_writemask_sample_123(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  %elt1 = extractelement <4 x float> %r, i32 1
-  %elt2 = extractelement <4 x float> %r, i32 2
-  %elt3 = extractelement <4 x float> %r, i32 3
-  store volatile float %elt1, float addrspace(1)* %out
-  store volatile float %elt2, float addrspace(1)* %out
-  store volatile float %elt3, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_variable_dmask_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_variable_dmask_enabled(float addrspace(1)* %out, i32 %dmask) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 %dmask, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_cl_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_cl_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_d_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_d_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.d.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_d_cl_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_d_cl_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.d.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_l_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_l_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.l.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_b_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_b_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.b.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_b_cl_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_b_cl_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.b.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_lz_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_lz_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.lz.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_cd_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_cd_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cd.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_cd_cl_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_cd_cl_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-declare <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.d.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.d.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.l.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.b.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.b.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.lz.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.cd.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.cd.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-declare <4 x float> @llvm.amdgcn.image.sample.c.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.d.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.d.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.l.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.b.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.b.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.lz.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.cd.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-declare float @llvm.amdgcn.image.sample.f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <2 x float> @llvm.amdgcn.image.sample.v2f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-attributes #0 = { nounwind readnone }
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll
deleted file mode 100644
index 42d7bc0e7778..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll
+++ /dev/null
@@ -1,427 +0,0 @@
-; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=GCN %s
-; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN %s
-
-; GCN-LABEL: {{^}}sample:
-; GCN: image_sample_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_cl:
-; GCN: image_sample_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_d:
-; GCN: image_sample_d_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_d(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.d.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_d_cl:
-; GCN: image_sample_d_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_d_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.d.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_l:
-; GCN: image_sample_l_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_l(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.l.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_b:
-; GCN: image_sample_b_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_b(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.b.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_b_cl:
-; GCN: image_sample_b_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_b_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.b.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_lz:
-; GCN: image_sample_lz_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_lz(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.lz.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_cd:
-; GCN: image_sample_cd_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_cd(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cd.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_cd_cl:
-; GCN: image_sample_cd_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_cd_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c:
-; GCN: image_sample_c_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_cl:
-; GCN: image_sample_c_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_d:
-; GCN: image_sample_c_d_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_d(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.d.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_d_cl:
-; GCN: image_sample_c_d_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_d_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_l:
-; GCN: image_sample_c_l_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_l(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.l.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_b:
-; GCN: image_sample_c_b_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_b(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.b.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_b_cl:
-; GCN: image_sample_c_b_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_b_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.b.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_lz:
-; GCN: image_sample_c_lz_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_lz(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.lz.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_cd:
-; GCN: image_sample_c_cd_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_cd(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cd.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}sample_c_cd_cl:
-; GCN: image_sample_c_cd_cl_o {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} dmask:0xf
-define amdgpu_kernel void @sample_c_cd_cl(<4 x float> addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i1 0, i1 0, i1 0, i1 0, i1 0)
-  store <4 x float> %r, <4 x float> addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_cl_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_cl_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_d_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_d_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.d.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_d_cl_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_d_cl_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.d.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_l_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_l_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.l.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_b_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_b_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.b.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_b_cl_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_b_cl_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.b.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_lz_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_lz_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.lz.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_cd_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_cd_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cd.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_cd_cl_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_cd_cl_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_cl_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_cl_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_d_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_d_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.d.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_d_cl_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_d_cl_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_l_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_l_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.l.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_b_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_b_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.b.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_b_cl_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_b_cl_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.b.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_lz_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_lz_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.lz.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_cd_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_cd_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cd.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-; GCN-LABEL: {{^}}adjust_writemask_sample_c_cd_cl_o_none_enabled:
-; GCN-NOT: image
-; GCN-NOT: store
-define amdgpu_kernel void @adjust_writemask_sample_c_cd_cl_o_none_enabled(float addrspace(1)* %out) {
-main_body:
-  %r = call <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %elt0 = extractelement <4 x float> %r, i32 0
-  store float %elt0, float addrspace(1)* %out
-  ret void
-}
-
-declare <4 x float> @llvm.amdgcn.image.sample.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.d.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.d.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.l.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.b.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.b.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.lz.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.cd.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.cd.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-declare <4 x float> @llvm.amdgcn.image.sample.c.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.d.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.d.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.l.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.b.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.b.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.lz.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.cd.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
-
-
-attributes #0 = { nounwind readnone }
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgpu.kilp.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgpu.kilp.ll
deleted file mode 100644
index 6b865d8076e6..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/llvm.amdgpu.kilp.ll
+++ /dev/null
@@ -1,19 +0,0 @@
-; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
-
-; SI-LABEL: {{^}}kilp_gs_const:
-; SI: s_mov_b64 exec, 0
-define amdgpu_gs void @kilp_gs_const() {
-main_body:
-  %0 = icmp ule i32 0, 3
-  %1 = select i1 %0, float 1.000000e+00, float -1.000000e+00
-  call void @llvm.AMDGPU.kilp(float %1)
-  %2 = icmp ule i32 3, 0
-  %3 = select i1 %2, float 1.000000e+00, float -1.000000e+00
-  call void @llvm.AMDGPU.kilp(float %3)
-  ret void
-}
-
-declare void @llvm.AMDGPU.kilp(float)
-
-!0 = !{!"const", null, i32 1}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/private-memory-broken.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/private-memory-broken.ll
deleted file mode 100644
index 9b5f655f1b52..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/private-memory-broken.ll
+++ /dev/null
@@ -1,21 +0,0 @@
-; RUN: not llc -verify-machineinstrs -march=amdgcn %s -o /dev/null 2>&1 | FileCheck %s
-; RUN: not llc -verify-machineinstrs -march=amdgcn -mcpu=tonga %s -o /dev/null 2>&1 | FileCheck %s
-
-; Make sure promote alloca pass doesn't crash
-
-; CHECK: unsupported call
-
-declare i32 @foo(i32*) nounwind
-
-define amdgpu_kernel void @call_private(i32 addrspace(1)* %out, i32 %in) nounwind {
-entry:
-  %tmp = alloca [2 x i32]
-  %tmp1 = getelementptr [2 x i32], [2 x i32]* %tmp, i32 0, i32 0
-  %tmp2 = getelementptr [2 x i32], [2 x i32]* %tmp, i32 0, i32 1
-  store i32 0, i32* %tmp1
-  store i32 1, i32* %tmp2
-  %tmp3 = getelementptr [2 x i32], [2 x i32]* %tmp, i32 0, i32 %in
-  %val = call i32 @foo(i32* %tmp3) nounwind
-  store i32 %val, i32 addrspace(1)* %out
-  ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/si-lod-bias.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/si-lod-bias.ll
deleted file mode 100644
index 422498066509..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AMDGPU/si-lod-bias.ll
+++ /dev/null
@@ -1,59 +0,0 @@
-; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-
-; This shader has the potential to generated illegal VGPR to SGPR copies if
-; the wrong register class is used for the REG_SEQUENCE instructions.
-
-; GCN-LABEL: {{^}}main:
-; GCN: image_sample_b v{{\[[0-9]:[0-9]\]}}, v{{\[[0-9]:[0-9]\]}}, s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}] dmask:0xf
-define amdgpu_ps void @main(<4 x i32> addrspace(2)* inreg %arg, <4 x i32> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 {
-main_body:
-  %tmp = getelementptr <4 x i32>, <4 x i32> addrspace(2)* %arg, i32 0
-  %tmp20 = load <4 x i32>, <4 x i32> addrspace(2)* %tmp, !tbaa !0
-  %tmp21 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp20, i32 16)
-  %tmp22 = getelementptr <8 x i32>, <8 x i32> addrspace(2)* %arg2, i32 0
-  %tmp23 = load <8 x i32>, <8 x i32> addrspace(2)* %tmp22, !tbaa !0
-  %tmp24 = getelementptr <4 x i32>, <4 x i32> addrspace(2)* %arg1, i32 0
-  %tmp25 = load <4 x i32>, <4 x i32> addrspace(2)* %tmp24, !tbaa !0
-  %i.i = extractelement <2 x i32> %arg5, i32 0
-  %j.i = extractelement <2 x i32> %arg5, i32 1
-  %i.f.i = bitcast i32 %i.i to float
-  %j.f.i = bitcast i32 %j.i to float
-  %p1.i = call float @llvm.amdgcn.interp.p1(float %i.f.i, i32 0, i32 0, i32 %arg3) #0
-  %p2.i = call float @llvm.amdgcn.interp.p2(float %p1.i, float %j.f.i, i32 0, i32 0, i32 %arg3) #0
-  %i.i1 = extractelement <2 x i32> %arg5, i32 0
-  %j.i2 = extractelement <2 x i32> %arg5, i32 1
-  %i.f.i3 = bitcast i32 %i.i1 to float
-  %j.f.i4 = bitcast i32 %j.i2 to float
-  %p1.i5 = call float @llvm.amdgcn.interp.p1(float %i.f.i3, i32 1, i32 0, i32 %arg3) #0
-  %p2.i6 = call float @llvm.amdgcn.interp.p2(float %p1.i5, float %j.f.i4, i32 1, i32 0, i32 %arg3) #0
-  %tmp28 = bitcast float %tmp21 to i32
-  %tmp29 = bitcast float %p2.i to i32
-  %tmp30 = bitcast float %p2.i6 to i32
-  %tmp31 = insertelement <4 x i32> undef, i32 %tmp28, i32 0
-  %tmp32 = insertelement <4 x i32> %tmp31, i32 %tmp29, i32 1
-  %tmp33 = insertelement <4 x i32> %tmp32, i32 %tmp30, i32 2
-  %tmp34 = insertelement <4 x i32> %tmp33, i32 undef, i32 3
-  %tmp34.bc = bitcast <4 x i32> %tmp34 to <4 x float>
-  %tmp35 = call <4 x float> @llvm.amdgcn.image.sample.b.v4f32.v4f32.v8i32(<4 x float> %tmp34.bc, <8 x i32> %tmp23, <4 x i32> %tmp25, i32 15, i1 false, i1 false, i1 false, i1 false, i1 false)
-  %tmp36 = extractelement <4 x float> %tmp35, i32 0
-  %tmp37 = extractelement <4 x float> %tmp35, i32 1
-  %tmp38 = extractelement <4 x float> %tmp35, i32 2
-  %tmp39 = extractelement <4 x float> %tmp35, i32 3
-  call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp36, float %tmp37, float %tmp38, float %tmp39, i1 true, i1 true) #0
-  ret void
-}
-
-declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #1
-declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #1
-declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0
-declare <4 x float> @llvm.amdgcn.image.sample.b.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #2
-declare float @llvm.SI.load.const.v4i32(<4 x i32>, i32) #1
-
-attributes #0 = { nounwind }
-attributes #1 = { nounwind readnone }
-attributes #2 = { nounwind readonly }
-
-!0 = !{!1, !1, i64 0, i32 1}
-!1 = !{!"const", !2}
-!2 = !{!"tbaa root"}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AVR/instrumentation/basic.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AVR/instrumentation/basic.ll
deleted file mode 100644
index f8a0321d417e..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AVR/instrumentation/basic.ll
+++ /dev/null
@@ -1,62 +0,0 @@
-; RUN: opt -S -avr-instrument-functions < %s | FileCheck %s
-
-; Functions returning void should not be instrumented.
-; CHECK-LABEL: do_nothing
-define void @do_nothing(i8 %c) {
-  ; CHECK-NEXT: ret void
-  ret void
-}
-
-; CHECK-LABEL: do_something
-define i8 @do_something(i16 %a, i16 %b) {
-  ; CHECK: instrumentation_entry
-  ; CHECK-NEXT: %0 = getelementptr inbounds [13 x i8], [13 x i8]* @0, i8 0, i8 0
-  ; CHECK-NEXT: call void @avr_instrumentation_begin_signature(i8* %0, i16 2)
-
-  ; CHECK-NEXT: %1 = getelementptr inbounds [2 x i8], [2 x i8]* @1, i8 0, i8 0
-  ; CHECK-NEXT: call void @avr_instrumentation_argument_i16(i8* %1, i8 0, i16 %a)
-
-  ; CHECK-NEXT: %2 = getelementptr inbounds [2 x i8], [2 x i8]* @2, i8 0, i8 0
-  ; CHECK-NEXT: call void @avr_instrumentation_argument_i16(i8* %2, i8 1, i16 %b)
-
-  ; CHECK-NEXT: %3 = getelementptr inbounds [13 x i8], [13 x i8]* @3, i8 0, i8 0
-  ; CHECK-NEXT: call void @avr_instrumentation_end_signature(i8* %3, i16 2)
-
-  ; CHECK-NEXT: br label %4
-
-  ; CHECK: call void @avr_instrumentation_result_i8(i8 1)
-  ; CHECK-NEXT: ret i8 1
-  ret i8 1
-}
-
-; CHECK-LABEL: foo
-define i32 @foo() {
-  ; CHECK: instrumentation_entry:
-  ; CHECK-NEXT:   %0 = getelementptr inbounds [4 x i8], [4 x i8]* @4, i8 0, i8 0
-  ; CHECK-NEXT:   call void @avr_instrumentation_begin_signature(i8* %0, i16 0)
-  ; CHECK-NEXT:   %1 = getelementptr inbounds [4 x i8], [4 x i8]* @5, i8 0, i8 0
-  ; CHECK-NEXT:   call void @avr_instrumentation_end_signature(i8* %1, i16 0)
-
-  ; CHECK-NEXT:   br label %2
-
-  ; CHECK:        call void @avr_instrumentation_result_i32(i32 50)
-  ; CHECK-NEXT:   ret i32 50
-  ret i32 50
-}
-
-; CHECK-LABEL: floaty
-define float @floaty(float %a) {
-  ; CHECK: instrumentation_entry:
-  ; CHECK-NEXT:   %0 = getelementptr inbounds [7 x i8], [7 x i8]* @6, i8 0, i8 0
-  ; CHECK-NEXT:   call void @avr_instrumentation_begin_signature(i8* %0, i16 1)
-  ; CHECK-NEXT:   %1 = getelementptr inbounds [2 x i8], [2 x i8]* @7, i8 0, i8 0
-  ; CHECK-NEXT:   call void @avr_instrumentation_argument_f32(i8* %1, i8 0, float %a)
-  ; CHECK-NEXT:   %2 = getelementptr inbounds [7 x i8], [7 x i8]* @8, i8 0, i8 0
-  ; CHECK-NEXT:   call void @avr_instrumentation_end_signature(i8* %2, i16 1)
-
-  ; CHECK-NEXT:   br label %3
-  ;
-  ; CHECK:        call void @avr_instrumentation_result_f32(float 1.200000e+01)
-  ; CHECK-NEXT:   ret float 1.200000e+01
-  ret float 12.0
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/AVR/select-mbb-placement-bug.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/AVR/select-mbb-placement-bug.ll
deleted file mode 100644
index aca9502b5dfb..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/AVR/select-mbb-placement-bug.ll
+++ /dev/null
@@ -1,35 +0,0 @@
-; RUN: llc -mcpu=atmega328p < %s -march=avr | FileCheck %s
-
-; CHECK-LABEL: loopy
-define internal fastcc void @loopy() {
-
-; In this case, when we expand `Select8`/`Select16`, we should be
-; replacing the existing MBB instead of adding a new one.
-;
-; https://github.com/avr-rust/rust/issues/49
-
-; CHECK: LBB0_{{[0-9]+}}:
-; CHECK: LBB0_{{[0-9]+}}:
-; CHECK-NOT: LBB0_{{[0-9]+}}:
-start:
-  br label %bb7.preheader
-
-bb7.preheader:                                    ; preds = %bb10, %start
-  %i = phi i8 [ 0, %start ], [ %j, %bb10 ]
-  %j = phi i8 [ 1, %start ], [ %next, %bb10 ]
-  br label %bb10
-
-bb4:                                              ; preds = %bb10
-  ret void
-
-bb10:                                             ; preds = %bb7.preheader
-  tail call fastcc void @observe(i8 %i, i8 1)
-  %0 = icmp ult i8 %j, 20
-  %1 = zext i1 %0 to i8
-  %next = add i8 %j, %1
-  br i1 %0, label %bb7.preheader, label %bb4
-
-}
-
-declare void @observe(i8, i8);
-
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/adde.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/adde.ll
deleted file mode 100644
index 12913eea7e81..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/adde.ll
+++ /dev/null
@@ -1,27 +0,0 @@
-; RUN: llc -march=hexagon -hexagon-expand-condsets=0 < %s | FileCheck %s
-
-; CHECK-DAG: r{{[0-9]+:[0-9]+}} = add(r{{[0-9]+:[0-9]+}},r{{[0-9]+:[0-9]+}})
-; CHECK-DAG: r{{[0-9]+:[0-9]+}} = add(r{{[0-9]+:[0-9]+}},r{{[0-9]+:[0-9]+}})
-; CHECK-DAG: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}},r{{[0-9]+:[0-9]+}})
-; CHECK-DAG: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}},r{{[0-9]+:[0-9]+}})
-; CHECK-DAG: r{{[0-9]+}} = mux(p{{[0-9]+}},r{{[0-9]+}},r{{[0-9]+}})
-; CHECK-DAG: r{{[0-9]+}} = mux(p{{[0-9]+}},r{{[0-9]+}},r{{[0-9]+}})
-
-define void @check_adde_addc(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64* %a4, i64* %a5) {
-b6:
-  %v7 = zext i64 %a0 to i128
-  %v8 = zext i64 %a1 to i128
-  %v9 = shl i128 %v8, 64
-  %v10 = or i128 %v7, %v9
-  %v11 = zext i64 %a2 to i128
-  %v12 = zext i64 %a3 to i128
-  %v13 = shl i128 %v12, 64
-  %v14 = or i128 %v11, %v13
-  %v15 = add i128 %v10, %v14
-  %v16 = lshr i128 %v15, 64
-  %v17 = trunc i128 %v15 to i64
-  %v18 = trunc i128 %v16 to i64
-  store i64 %v17, i64* %a4
-  store i64 %v18, i64* %a5
-  ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/doubleconvert-ieee-rnd-near.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/doubleconvert-ieee-rnd-near.ll
deleted file mode 100644
index ccc287c5f2bc..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/doubleconvert-ieee-rnd-near.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-hexagon-ieee-rnd-near < %s | FileCheck %s
-; Check that we generate conversion from double precision floating point
-; to 32-bit int value in IEEE rounding to the nearest mode in V5.
-
-; CHECK: r{{[0-9]+}} = convert_df2w(r{{[0-9]+}}:{{[0-9]+}})
-
-define i32 @main() nounwind {
-entry:
-  %retval = alloca i32, align 4
-  %i = alloca i32, align 4
-  %a = alloca double, align 8
-  %b = alloca double, align 8
-  %c = alloca double, align 8
-  store i32 0, i32* %retval
-  store volatile double 1.540000e+01, double* %a, align 8
-  store volatile double 9.100000e+00, double* %b, align 8
-  %0 = load volatile double, double* %a, align 8
-  %1 = load volatile double, double* %b, align 8
-  %add = fadd double %0, %1
-  store double %add, double* %c, align 8
-  %2 = load double, double* %c, align 8
-  %conv = fptosi double %2 to i32
-  store i32 %conv, i32* %i, align 4
-  %3 = load i32, i32* %i, align 4
-  ret i32 %3
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/expand-vselect-kill.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/expand-vselect-kill.ll
deleted file mode 100644
index 1d07859665c0..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/expand-vselect-kill.ll
+++ /dev/null
@@ -1,53 +0,0 @@
-; RUN: llc -march=hexagon -verify-machineinstrs < %s | FileCheck %s
-;
-; Check that this does not crash.
-
-target triple = "hexagon"
-
-; CHECK-LABEL: danny:
-; CHECK-DAG: if ([[PREG:p[0-3]]]) [[VREG:v[0-9]+]]
-; CHECK-DAG: if (![[PREG]]) [[VREG]]
-define void @danny() local_unnamed_addr #0 {
-b0:
-  %v1 = icmp eq i32 0, undef
-  %v2 = select i1 %v1, <16 x i32> zeroinitializer, <16 x i32> undef
-  %v3 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v2, <16 x i32> zeroinitializer, i32 2)
-  %v4 = tail call <32 x i32> @llvm.hexagon.V6.vswap(<512 x i1> undef, <16 x i32> undef, <16 x i32> %v3)
-  %v5 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v4)
-  %v6 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> undef, <16 x i32> %v5, i32 62)
-  %v7 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v6)
-  store <16 x i32> %v7, <16 x i32>* undef, align 64
-  unreachable
-}
-
-declare <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32>, <16 x i32>, i32) #2
-declare <32 x i32> @llvm.hexagon.V6.vswap(<512 x i1>, <16 x i32>, <16 x i32>) #2
-declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #2
-declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #2
-declare <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32>, <16 x i32>, i32) #2
-
-; CHECK-LABEL: sammy:
-; CHECK-DAG: if ([[PREG:p[0-3]]]) [[VREG:v[0-9]+]]
-; CHECK-DAG: if (![[PREG]]) [[VREG]]
-define void @sammy() local_unnamed_addr #1 {
-b0:
-  %v1 = icmp eq i32 0, undef
-  %v2 = select i1 %v1, <32 x i32> zeroinitializer, <32 x i32> undef
-  %v3 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %v2, <32 x i32> zeroinitializer, i32 2)
-  %v4 = tail call <64 x i32> @llvm.hexagon.V6.vswap.128B(<1024 x i1> undef, <32 x i32> undef, <32 x i32> %v3)
-  %v5 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %v4)
-  %v6 = tail call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> undef, <32 x i32> %v5, i32 62)
-  %v7 = tail call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %v6)
-  store <32 x i32> %v7, <32 x i32>* undef, align 128
-  unreachable
-}
-
-declare <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32>, <32 x i32>, i32) #2
-declare <64 x i32> @llvm.hexagon.V6.vswap.128B(<1024 x i1>, <32 x i32>, <32 x i32>) #2
-declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #2
-declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #2
-declare <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32>, <32 x i32>, i32) #2
-
-attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx" }
-attributes #1 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-double" }
-attributes #2 = { nounwind readnone }
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/sube.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/sube.ll
deleted file mode 100644
index 2b09a998eff0..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/sube.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llc -march=hexagon -hexagon-expand-condsets=0 < %s | FileCheck %s
-
-; CHECK-DAG: r{{[0-9]+:[0-9]+}} = sub(r{{[0-9]+:[0-9]+}},r{{[0-9]+:[0-9]+}})
-; CHECK-DAG: r{{[0-9]+:[0-9]+}} = sub(r{{[0-9]+:[0-9]+}},r{{[0-9]+:[0-9]+}})
-; CHECK-DAG: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}},r{{[0-9]+:[0-9]+}})
-; CHECK-DAG: r{{[0-9]+}} = mux(p{{[0-9]+}},r{{[0-9]+}},r{{[0-9]+}})
-; CHECK-DAG: r{{[0-9]+}} = mux(p{{[0-9]+}},r{{[0-9]+}},r{{[0-9]+}})
-
-define void @check_sube_subc(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64* %a4, i64* %a5) {
-b6:
-  %v7 = zext i64 %a0 to i128
-  %v8 = zext i64 %a1 to i128
-  %v9 = shl i128 %v8, 64
-  %v10 = or i128 %v7, %v9
-  %v11 = zext i64 %a2 to i128
-  %v12 = zext i64 %a3 to i128
-  %v13 = shl i128 %v12, 64
-  %v14 = or i128 %v11, %v13
-  %v15 = sub i128 %v10, %v14
-  %v16 = lshr i128 %v15, 64
-  %v17 = trunc i128 %v15 to i64
-  %v18 = trunc i128 %v16 to i64
-  store i64 %v17, i64* %a4
-  store i64 %v18, i64* %a5
-  ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/vect/vect-packhl.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/vect/vect-packhl.ll
deleted file mode 100644
index dfdb019b677c..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Hexagon/vect/vect-packhl.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; Extracted from test/CodeGen/Generic/vector-casts.ll: used to loop indefinitely.
-; RUN: llc -march=hexagon < %s | FileCheck %s
-; CHECK: packhl
-
-define void @a(<2 x double>* %p, <2 x i8>* %q) {
-        %t = load <2 x double>, <2 x double>* %p
-	%r = fptosi <2 x double> %t to <2 x i8>
-        store <2 x i8> %r, <2 x i8>* %q
-	ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
deleted file mode 100644
index a946b9f9f4a8..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
+++ /dev/null
@@ -1,31 +0,0 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
-# This test ensures that the MIR parser parses the def_cfa operands
-# correctly.
-
---- |
-
-  declare void @foo()
-
-  define void @trivial_fp_func() {
-  entry:
-    call void @foo()
-    ret void
-  }
-
-...
----
-name:            trivial_fp_func
-body: |
-  bb.0.entry:
-    liveins: %lr, %fp, %lr, %fp
-
-    %sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
-    %fp = frame-setup ADDXri %sp, 0, 0
-    ; CHECK: CFI_INSTRUCTION def_cfa %w29, 16
-    frame-setup CFI_INSTRUCTION def_cfa %w29, 16
-    frame-setup CFI_INSTRUCTION offset %w30, -8
-    frame-setup CFI_INSTRUCTION offset %w29, -16
-    BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
-    %sp, %fp, %lr = LDPXpost %sp, 2
-    RET_ReallyLR
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir
deleted file mode 100644
index 05e7f7521ed5..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir
+++ /dev/null
@@ -1,82 +0,0 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass greedy -verify-machineinstrs  -o - %s | FileCheck %s
---- |
-  define i64 @test_subreg_spill_fold() { ret i64 0 }
-  define i64 @test_subreg_spill_fold2() { ret i64 0 }
-  define i64 @test_subreg_spill_fold3() { ret i64 0 }
-  define i64 @test_subreg_fill_fold() { ret i64 0 }
-  define double @test_subreg_fill_fold2() { ret double 0.0 }
-...
----
-# CHECK-LABEL: name: test_subreg_spill_fold
-# Ensure that the spilled subreg COPY is eliminated and folded into the spill store.
-name:            test_subreg_spill_fold
-registers:
-  - { id: 0, class: gpr64 }
-body:             |
-  bb.0:
-    ; CHECK: STRXui %xzr, %stack.0, 0 :: (store 8 into %stack.0)
-    undef %0.sub_32 = COPY %wzr
-    INLINEASM $nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp
-    %x0 = COPY %0
-    RET_ReallyLR implicit %x0
-...
----
-# CHECK-LABEL: name: test_subreg_spill_fold2
-# Similar to test_subreg_spill_fold, but with a vreg0 register class not containing %WZR.
-name:            test_subreg_spill_fold2
-registers:
-  - { id: 0, class: gpr64sp }
-body:             |
-  bb.0:
-    ; CHECK: STRXui %xzr, %stack.0, 0 :: (store 8 into %stack.0)
-    undef %0.sub_32 = COPY %wzr
-    INLINEASM $nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp
-    %x0 = ADDXri %0, 1, 0
-    RET_ReallyLR implicit %x0
-...
----
-# CHECK-LABEL: name: test_subreg_spill_fold3
-# Similar to test_subreg_spill_fold, but with a cross register class copy.
-name:            test_subreg_spill_fold3
-registers:
-  - { id: 0, class: fpr64 }
-body:             |
-  bb.0:
-    ; CHECK: STRXui %xzr, %stack.0, 0 :: (store 8 into %stack.0)
-    undef %0.ssub = COPY %wzr
-    INLINEASM $nop, 1, 12, implicit-def dead %d0, 12, implicit-def dead %d1, 12, implicit-def dead %d2, 12, implicit-def dead %d3, 12, implicit-def dead %d4, 12, implicit-def dead %d5, 12, implicit-def dead %d6, 12, implicit-def dead %d7, 12, implicit-def dead %d8, 12, implicit-def dead %d9, 12, implicit-def dead %d10, 12, implicit-def dead %d11, 12, implicit-def dead %d12, 12, implicit-def dead %d13, 12, implicit-def dead %d14, 12, implicit-def dead %d15, 12, implicit-def dead %d16, 12, implicit-def dead %d17, 12, implicit-def dead %d18, 12, implicit-def dead %d19, 12, implicit-def dead %d20, 12, implicit-def dead %d21, 12, implicit-def dead %d22, 12, implicit-def dead %d23, 12, implicit-def dead %d24, 12, implicit-def dead %d25, 12, implicit-def dead %d26, 12, implicit-def dead %d27, 12, implicit-def dead %d28, 12, implicit-def dead %d29, 12, implicit-def dead %d30, 12, implicit-def %d31
-    %x0 = COPY %0
-    RET_ReallyLR implicit %x0
-...
----
-# CHECK-LABEL: name: test_subreg_fill_fold
-# Ensure that the filled COPY is eliminated and folded into the fill load.
-name:            test_subreg_fill_fold
-registers:
-  - { id: 0, class: gpr32 }
-  - { id: 1, class: gpr64 }
-body:             |
-  bb.0:
-    %0 = COPY %wzr
-    INLINEASM $nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp
-    ; CHECK: undef %1.sub_32 = LDRWui %stack.0, 0 :: (load 4 from %stack.0)
-    undef %1.sub_32 = COPY %0
-    %x0 = COPY %1
-    RET_ReallyLR implicit %x0
-...
----
-# CHECK-LABEL: name: test_subreg_fill_fold2
-# Similar to test_subreg_fill_fold, but with a cross-class copy.
-name:            test_subreg_fill_fold2
-registers:
-  - { id: 0, class: gpr32 }
-  - { id: 1, class: fpr64 }
-body:             |
-  bb.0:
-    %0 = COPY %wzr
-    INLINEASM $nop, 1, 12, implicit-def dead %x0, 12, implicit-def dead %x1, 12, implicit-def dead %x2, 12, implicit-def dead %x3, 12, implicit-def dead %x4, 12, implicit-def dead %x5, 12, implicit-def dead %x6, 12, implicit-def dead %x7, 12, implicit-def dead %x8, 12, implicit-def dead %x9, 12, implicit-def dead %x10, 12, implicit-def dead %x11, 12, implicit-def dead %x12, 12, implicit-def dead %x13, 12, implicit-def dead %x14, 12, implicit-def dead %x15, 12, implicit-def dead %x16, 12, implicit-def dead %x17, 12, implicit-def dead %x18, 12, implicit-def dead %x19, 12, implicit-def dead %x20, 12, implicit-def dead %x21, 12, implicit-def dead %x22, 12, implicit-def dead %x23, 12, implicit-def dead %x24, 12, implicit-def dead %x25, 12, implicit-def dead %x26, 12, implicit-def dead %x27, 12, implicit-def dead %x28, 12, implicit-def dead %fp, 12, implicit-def dead %lr, 12, implicit-def %sp
-    ; CHECK: undef %1.ssub = LDRSui %stack.0, 0 :: (load 4 from %stack.0)
-    undef %1.ssub = COPY %0
-    %d0 = COPY %1
-    RET_ReallyLR implicit %d0
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir
deleted file mode 100644
index c0251232fd5c..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir
+++ /dev/null
@@ -1,709 +0,0 @@
-# RUN: llc --mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs -run-pass si-fold-operands,si-shrink-instructions %s -o - | FileCheck %s
---- |
-  define amdgpu_kernel void @add_f32_1.0_one_f16_use() #0 {
-    %f16.val0 = load volatile half, half addrspace(1)* undef
-    %f16.val1 = load volatile half, half addrspace(1)* undef
-    %f32.val = load volatile float, float addrspace(1)* undef
-    %f16.add0 = fadd half %f16.val0, 0xH3C00
-    %f32.add = fadd float %f32.val, 1.000000e+00
-    store volatile half %f16.add0, half addrspace(1)* undef
-    store volatile float %f32.add, float addrspace(1)* undef
-    ret void
-  }
-
-  define amdgpu_kernel void @add_f32_1.0_multi_f16_use() #0 {
-    %f16.val0 = load volatile half, half addrspace(1)* undef
-    %f16.val1 = load volatile half, half addrspace(1)* undef
-    %f32.val = load volatile float, float addrspace(1)* undef
-    %f16.add0 = fadd half %f16.val0, 0xH3C00
-    %f32.add = fadd float %f32.val, 1.000000e+00
-    store volatile half %f16.add0, half addrspace(1)* undef
-    store volatile float %f32.add, float addrspace(1)* undef
-    ret void
-  }
-
-  define amdgpu_kernel void @add_f32_1.0_one_f32_use_one_f16_use () #0 {
-    %f16.val0 = load volatile half, half addrspace(1)* undef
-    %f16.val1 = load volatile half, half addrspace(1)* undef
-    %f32.val = load volatile float, float addrspace(1)* undef
-    %f16.add0 = fadd half %f16.val0, 0xH3C00
-    %f32.add = fadd float %f32.val, 1.000000e+00
-    store volatile half %f16.add0, half addrspace(1)* undef
-    store volatile float %f32.add, float addrspace(1)* undef
-    ret void
-  }
-
-  define amdgpu_kernel void @add_f32_1.0_one_f32_use_multi_f16_use () #0 {
-    %f16.val0 = load volatile half, half addrspace(1)* undef
-    %f16.val1 = load volatile half, half addrspace(1)* undef
-    %f32.val = load volatile float, float addrspace(1)* undef
-    %f16.add0 = fadd half %f16.val0, 0xH3C00
-    %f16.add1 = fadd half %f16.val1, 0xH3C00
-    %f32.add = fadd float %f32.val, 1.000000e+00
-    store volatile half %f16.add0, half addrspace(1)* undef
-    store volatile half %f16.add1, half addrspace(1)* undef
-    store volatile float %f32.add, float addrspace(1)* undef
-    ret void
-  }
-
-  define amdgpu_kernel void @add_i32_1_multi_f16_use() #0 {
-    %f16.val0 = load volatile half, half addrspace(1)* undef
-    %f16.val1 = load volatile half, half addrspace(1)* undef
-    %f16.add0 = fadd half %f16.val0, 0xH0001
-    %f16.add1 = fadd half %f16.val1, 0xH0001
-    store volatile half %f16.add0, half addrspace(1)* undef
-    store volatile half %f16.add1,half addrspace(1)* undef
-    ret void
-  }
-
-  define amdgpu_kernel void @add_i32_m2_one_f32_use_multi_f16_use () #0 {
-    %f16.val0 = load volatile half, half addrspace(1)* undef
-    %f16.val1 = load volatile half, half addrspace(1)* undef
-    %f32.val = load volatile float, float addrspace(1)* undef
-    %f16.add0 = fadd half %f16.val0, 0xHFFFE
-    %f16.add1 = fadd half %f16.val1, 0xHFFFE
-    %f32.add = fadd float %f32.val, 0xffffffffc0000000
-    store volatile half %f16.add0, half addrspace(1)* undef
-    store volatile half %f16.add1, half addrspace(1)* undef
-    store volatile float %f32.add, float addrspace(1)* undef
-    ret void
-  }
-
-  define amdgpu_kernel void @add_f16_1.0_multi_f32_use() #0 {
-    %f32.val0 = load volatile float, float addrspace(1)* undef
-    %f32.val1 = load volatile float, float addrspace(1)* undef
-    %f32.val = load volatile float, float addrspace(1)* undef
-    %f32.add0 = fadd float %f32.val0, 1.0
-    %f32.add1 = fadd float %f32.val1, 1.0
-    store volatile float %f32.add0, float addrspace(1)* undef
-    store volatile float %f32.add1, float addrspace(1)* undef
-    ret void
-  }
-
-  define amdgpu_kernel void @add_f16_1.0_other_high_bits_multi_f16_use() #0 {
-    %f16.val0 = load volatile half, half addrspace(1)* undef
-    %f16.val1 = load volatile half, half addrspace(1)* undef
-    %f32.val = load volatile half, half addrspace(1)* undef
-    %f16.add0 = fadd half %f16.val0, 0xH3C00
-    %f32.add = fadd half %f32.val, 1.000000e+00
-    store volatile half %f16.add0, half addrspace(1)* undef
-    store volatile half %f32.add, half addrspace(1)* undef
-    ret void
-  }
-
-  define amdgpu_kernel void @add_f16_1.0_other_high_bits_use_f16_f32() #0 {
-    %f16.val0 = load volatile half, half addrspace(1)* undef
-    %f16.val1 = load volatile half, half addrspace(1)* undef
-    %f32.val = load volatile half, half addrspace(1)* undef
-    %f16.add0 = fadd half %f16.val0, 0xH3C00
-    %f32.add = fadd half %f32.val, 1.000000e+00
-    store volatile half %f16.add0, half addrspace(1)* undef
-    store volatile half %f32.add, half addrspace(1)* undef
-    ret void
-  }
-
-  attributes #0 = { nounwind }
-
-...
----
-
-# f32 1.0 with a single use should be folded as the low 32-bits of a
-#  literal constant.
-
-# CHECK-LABEL: name: add_f32_1.0_one_f16_use
-# CHECK: %13 = V_ADD_F16_e32  1065353216, killed %11, implicit %exec
-
-name:            add_f32_1.0_one_f16_use
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %12 = V_MOV_B32_e32 1065353216, implicit %exec
-    %13 = V_ADD_F16_e64 0, killed %11, 0, %12, 0, 0, implicit %exec
-    BUFFER_STORE_SHORT_OFFSET killed %13, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    S_ENDPGM
-
-...
----
-# Materialized f32 inline immediate should not be folded into the f16
-# operands
-
-# CHECK-LABEL: name: add_f32_1.0_multi_f16_use
-# CHECK: %13 = V_MOV_B32_e32 1065353216, implicit %exec
-# CHECK: %14 = V_ADD_F16_e32 killed %11, %13, implicit %exec
-# CHECK: %15 = V_ADD_F16_e32 killed %12, killed %13, implicit %exec
-
-
-name:            add_f32_1.0_multi_f16_use
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %13 = V_MOV_B32_e32 1065353216, implicit %exec
-    %14 = V_ADD_F16_e64 0, killed %11, 0, %13, 0, 0, implicit %exec
-    %15 = V_ADD_F16_e64 0, killed %12, 0, killed %13, 0, 0, implicit %exec
-    BUFFER_STORE_SHORT_OFFSET killed %14, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    S_ENDPGM
-
-...
----
-
-# f32 1.0 should be folded into the single f32 use as an inline
-#  immediate, and folded into the single f16 use as a literal constant
-
-# CHECK-LABEL: name: add_f32_1.0_one_f32_use_one_f16_use
-# CHECK: %15 = V_ADD_F16_e32 1065353216, %11, implicit %exec
-# CHECK: %16 = V_ADD_F32_e32 1065353216, killed %13, implicit %exec
-
-name:            add_f32_1.0_one_f32_use_one_f16_use
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-  - { id: 16, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %14 = V_MOV_B32_e32 1065353216, implicit %exec
-    %15 = V_ADD_F16_e64 0, %11, 0, %14, 0, 0, implicit %exec
-    %16 = V_ADD_F32_e64 0, killed %13, 0, killed %14, 0, 0, implicit %exec
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    BUFFER_STORE_DWORD_OFFSET killed %16, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `float addrspace(1)* undef`)
-    S_ENDPGM
-
-...
----
-
-# f32 1.0 should be folded for the single f32 use as an inline
-#  constant, and not folded as a multi-use literal for the f16 cases
-
-# CHECK-LABEL: name: add_f32_1.0_one_f32_use_multi_f16_use
-# CHECK: %14 = V_MOV_B32_e32 1065353216, implicit %exec
-# CHECK: %15 = V_ADD_F16_e32  %11, %14, implicit %exec
-# CHECK: %16 = V_ADD_F16_e32 %12,  %14, implicit %exec
-# CHECK: %17 = V_ADD_F32_e32 1065353216, killed %13, implicit %exec
-
-name:            add_f32_1.0_one_f32_use_multi_f16_use
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-  - { id: 16, class: vgpr_32 }
-  - { id: 17, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %14 = V_MOV_B32_e32 1065353216, implicit %exec
-    %15 = V_ADD_F16_e64 0, %11, 0, %14, 0, 0, implicit %exec
-    %16 = V_ADD_F16_e64 0, %12, 0, %14, 0, 0, implicit %exec
-    %17 = V_ADD_F32_e64 0, killed %13, 0, killed %14, 0, 0, implicit %exec
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %16, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    BUFFER_STORE_DWORD_OFFSET killed %17, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `float addrspace(1)* undef`)
-    S_ENDPGM
-
-...
----
-# CHECK-LABEL: name: add_i32_1_multi_f16_use
-# CHECK: %13 = V_MOV_B32_e32 1, implicit %exec
-# CHECK: %14 = V_ADD_F16_e32 1, killed %11, implicit %exec
-# CHECK: %15 = V_ADD_F16_e32 1, killed %12, implicit %exec
-
-
-name:            add_i32_1_multi_f16_use
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %13 = V_MOV_B32_e32 1, implicit %exec
-    %14 = V_ADD_F16_e64 0, killed %11, 0, %13, 0, 0, implicit %exec
-    %15 = V_ADD_F16_e64 0, killed %12, 0, killed %13, 0, 0, implicit %exec
-    BUFFER_STORE_SHORT_OFFSET killed %14, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    S_ENDPGM
-
-...
----
-
-# CHECK-LABEL: name: add_i32_m2_one_f32_use_multi_f16_use
-# CHECK: %14 = V_MOV_B32_e32 -2, implicit %exec
-# CHECK: %15 = V_ADD_F16_e32 -2, %11, implicit %exec
-# CHECK: %16 = V_ADD_F16_e32 -2, %12, implicit %exec
-# CHECK: %17 = V_ADD_F32_e32 -2, killed %13, implicit %exec
-
-name:            add_i32_m2_one_f32_use_multi_f16_use
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-  - { id: 16, class: vgpr_32 }
-  - { id: 17, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %14 = V_MOV_B32_e32 -2, implicit %exec
-    %15 = V_ADD_F16_e64 0, %11, 0, %14, 0, 0, implicit %exec
-    %16 = V_ADD_F16_e64 0, %12, 0, %14, 0, 0, implicit %exec
-    %17 = V_ADD_F32_e64 0, killed %13, 0, killed %14, 0, 0, implicit %exec
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %16, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    BUFFER_STORE_DWORD_OFFSET killed %17, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `float addrspace(1)* undef`)
-    S_ENDPGM
-
-...
----
-
-# f32 1.0 should be folded for the single f32 use as an inline
-#  constant, and not folded as a multi-use literal for the f16 cases
-
-# CHECK-LABEL: name: add_f16_1.0_multi_f32_use
-# CHECK: %13 = V_MOV_B32_e32 15360, implicit %exec
-# CHECK: %14 = V_ADD_F32_e32 %11, %13, implicit %exec
-# CHECK: %15 = V_ADD_F32_e32 %12, %13, implicit %exec
-
-name:            add_f16_1.0_multi_f32_use
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %13 = V_MOV_B32_e32 15360, implicit %exec
-    %14 = V_ADD_F32_e64 0, %11, 0, %13, 0, 0, implicit %exec
-    %15 = V_ADD_F32_e64 0, %12, 0, %13, 0, 0, implicit %exec
-    BUFFER_STORE_DWORD_OFFSET killed %14, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `float addrspace(1)* undef`)
-    BUFFER_STORE_DWORD_OFFSET killed %15, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `float addrspace(1)* undef`)
-    S_ENDPGM
-
-...
----
-
-# The low 16-bits are an inline immediate, but the high bits are junk
-# FIXME: Should be able to fold this
-
-# CHECK-LABEL: name: add_f16_1.0_other_high_bits_multi_f16_use
-# CHECK: %13 = V_MOV_B32_e32 80886784, implicit %exec
-# CHECK: %14 = V_ADD_F16_e32 %11, %13, implicit %exec
-# CHECK: %15 = V_ADD_F16_e32 %12, %13, implicit %exec
-
-name:            add_f16_1.0_other_high_bits_multi_f16_use
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %13 = V_MOV_B32_e32 80886784, implicit %exec
-    %14 = V_ADD_F16_e64 0, %11, 0, %13, 0, 0, implicit %exec
-    %15 = V_ADD_F16_e64 0, %12, 0, %13, 0, 0, implicit %exec
-    BUFFER_STORE_SHORT_OFFSET killed %14, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    S_ENDPGM
-
-...
----
-
-# FIXME: Should fold inline immediate into f16 and literal use into
-# f32 instruction.
-
-# CHECK-LABEL: name: add_f16_1.0_other_high_bits_use_f16_f32
-# CHECK: %13 = V_MOV_B32_e32 305413120, implicit %exec
-# CHECK: %14 = V_ADD_F32_e32 %11, %13, implicit %exec
-# CHECK: %15 = V_ADD_F16_e32 %12, %13, implicit %exec
-name:            add_f16_1.0_other_high_bits_use_f16_f32
-alignment:       0
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: sreg_64 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: sgpr_32 }
-  - { id: 3, class: vgpr_32 }
-  - { id: 4, class: sreg_64 }
-  - { id: 5, class: sreg_32 }
-  - { id: 6, class: sreg_64 }
-  - { id: 7, class: sreg_32 }
-  - { id: 8, class: sreg_32 }
-  - { id: 9, class: sreg_32 }
-  - { id: 10, class: sreg_128 }
-  - { id: 11, class: vgpr_32 }
-  - { id: 12, class: vgpr_32 }
-  - { id: 13, class: vgpr_32 }
-  - { id: 14, class: vgpr_32 }
-  - { id: 15, class: vgpr_32 }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-body:             |
-  bb.0 (%ir-block.0):
-    %4 = IMPLICIT_DEF
-    %5 = COPY %4.sub1
-    %6 = IMPLICIT_DEF
-    %7 = COPY %6.sub0
-    %8 = S_MOV_B32 61440
-    %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 4 from `float addrspace(1)* undef`)
-    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile load 2 from `half addrspace(1)* undef`)
-    %13 = V_MOV_B32_e32 305413120, implicit %exec
-    %14 = V_ADD_F32_e64 0, %11, 0, %13, 0, 0, implicit %exec
-    %15 = V_ADD_F16_e64 0, %12, 0, %13, 0, 0, implicit %exec
-    BUFFER_STORE_DWORD_OFFSET killed %14, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 4 into `float addrspace(1)* undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, 0, implicit %exec :: (volatile store 2 into `half addrspace(1)* undef`)
-    S_ENDPGM
-
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AMDGPU/fold-multiple.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AMDGPU/fold-multiple.mir
deleted file mode 100644
index a5da33a997d3..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/AMDGPU/fold-multiple.mir
+++ /dev/null
@@ -1,40 +0,0 @@
-# RUN: llc --mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs -run-pass si-fold-operands,si-shrink-instructions %s -o - | FileCheck %s
---- |
-  define amdgpu_kernel void @test() #0 {
-    ret void
-  }
-
-  attributes #0 = { nounwind }
-
-...
----
-
-# This used to crash / trigger an assertion, because re-scanning the use list
-# after constant-folding the definition of %3 lead to the definition of %2
-# being processed twice.
-
-# CHECK-LABEL: name: test
-# CHECK: %2 = V_LSHLREV_B32_e32 2, killed %0, implicit %exec
-# CHECK: %4 = V_AND_B32_e32 8, killed %2, implicit %exec
-
-name:            test
-tracksRegLiveness: true
-registers:
-  - { id: 0, class: vgpr_32 }
-  - { id: 1, class: sreg_32 }
-  - { id: 2, class: vgpr_32 }
-  - { id: 3, class: sreg_32 }
-  - { id: 4, class: vgpr_32 }
-  - { id: 5, class: sreg_128 }
-body:             |
-  bb.0 (%ir-block.0):
-    %0 = IMPLICIT_DEF
-    %1 = S_MOV_B32 2
-    %2 = V_LSHLREV_B32_e64 %1, killed %0, implicit %exec
-    %3 = S_LSHL_B32 %1, killed %1, implicit-def dead %scc
-    %4 = V_AND_B32_e64 killed %2, killed %3, implicit %exec
-    %5 = IMPLICIT_DEF
-    BUFFER_STORE_DWORD_OFFSET killed %4, killed %5, 0, 0, 0, 0, 0, implicit %exec
-    S_ENDPGM
-
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/ARM/ifcvt_canFallThroughTo.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/ARM/ifcvt_canFallThroughTo.mir
deleted file mode 100644
index 5a1583f7a9be..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/ARM/ifcvt_canFallThroughTo.mir
+++ /dev/null
@@ -1,64 +0,0 @@
-# RUN: llc -mtriple=arm-apple-ios -o - %s -run-pass if-converter | FileCheck %s
----
-name:            f1
-body:             |
-  bb.0:
-    successors: %bb.1
-
-    B %bb.1
-
-  bb.1:
-    successors: %bb.2, %bb.4
-
-    Bcc %bb.4, 1, %cpsr
-
-  bb.2:
-    successors: %bb.3, %bb.5
-
-    Bcc %bb.5, 1, %cpsr
-
-  bb.3:
-    successors: %bb.5
-
-    B %bb.5
-
-  bb.4:
-    successors:
-
-  bb.5:
-    successors: %bb.1, %bb.6
-
-    Bcc %bb.1, 1, %cpsr
-
-  bb.6:
-    BX_RET 14, _
-
-...
-
-# IfConversion.cpp/canFallThroughTo thought there was a fallthrough from
-# bb.4 to bb5 even if the successor list was empty.
-# bb.4 is empty, so it surely looks like it can fallthrough, but this is what
-# happens for a bb just containing an "unreachable".
-
-#CHECK: body:             |
-#CHECK:   bb.0:
-#CHECK:     successors: %bb.1
-
-#CHECK:   bb.1:
-#CHECK:     successors: %bb.3({{.*}}), %bb.2
-
-# The original brr_cond from bb.1, jumping to the empty bb
-#CHECK:     Bcc %bb.2
-#CHECK:     B %bb.3
-
-# Empty bb.2, originally containing "unreachable" and thus has no successors
-#CHECK:   bb.2:
-#CHECK-NOT: successors
-
-#CHECK:   bb.3:
-#CHECK:     successors: %bb.1
-
-# Conditional BX_RET and then loop back to bb.1
-#CHECK:     BX_RET 0
-#CHECK:     B %bb.1
-
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/X86/dynamic-regmask.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/X86/dynamic-regmask.ll
deleted file mode 100644
index df58f4be79d7..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/MIR/X86/dynamic-regmask.ll
+++ /dev/null
@@ -1,30 +0,0 @@
-; RUN: llc -mtriple=x86_64-pc-win32 -stop-after machine-sink %s -o %t.mir
-; RUN: FileCheck %s < %t.mir
-; RUN: llc %t.mir -mtriple=x86_64-pc-win32 -run-pass machine-sink
-; Check that callee saved registers are printed in a format that can then be parsed.
-
-declare x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0)
-
-define i32 @caller(i32 %a0) nounwind {
-  %b1 = call x86_regcallcc i32 @callee(i32 %a0, i32 %a0, i32 %a0, i32 %a0, i32 %a0)
-  %b2 = add i32 %b1, %a0
-  ret i32 %b2
-}
-; CHECK:    name: caller
-; CHECK:    CALL64pcrel32 @callee, CustomRegMask(%bh,%bl,%bp,%bpl,%bx,%ebp,%ebx,%esp,%rbp,%rbx,%rsp,%sp,%spl,%r10,%r11,%r12,%r13,%r14,%r15,%xmm8,%xmm9,%xmm10,%xmm11,%xmm12,%xmm13,%xmm14,%xmm15,%r10b,%r11b,%r12b,%r13b,%r14b,%r15b,%r10d,%r11d,%r12d,%r13d,%r14d,%r15d,%r10w,%r11w,%r12w,%r13w,%r14w,%r15w)
-; CHECK:    RET 0, %eax
-
-define x86_regcallcc {i32, i32, i32} @test_callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0) nounwind {
-  %b1 = mul i32 7, %e0
-  %b2 = udiv i32 5, %e0
-  %b3 = mul i32 7, %d0
-  %b4 = insertvalue {i32, i32, i32} undef, i32 %b1, 0
-  %b5 = insertvalue {i32, i32, i32} %b4, i32 %b2, 1
-  %b6 = insertvalue {i32, i32, i32} %b5, i32 %b3, 2
-  ret {i32, i32, i32} %b6
-}
-; CHECK: name:            test_callee
-; CHECK: calleeSavedRegisters: [ '%rbx', '%rbp', '%rsp', '%r10', '%r11', '%r12',
-; CHECK:                         '%r13', '%r14', '%r15', '%xmm8', '%xmm9', '%xmm10',
-; CHECK:                         '%xmm11', '%xmm12', '%xmm13', '%xmm14', '%xmm15' ]
-; CHECK: RET 0, %eax, %ecx, %edx
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Mips/2008-08-08-bswap.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Mips/2008-08-08-bswap.ll
deleted file mode 100644
index 596da243057b..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Mips/2008-08-08-bswap.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; DISABLED: llc < %s | grep wsbw | count 1
-; RUN: false
-; XFAIL: *
-
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "psp"
-
-define i32 @__bswapsi2(i32 %u) nounwind {
-entry:
-	tail call i32 @llvm.bswap.i32( i32 %u )		; <i32>:0 [#uses=1]
-	ret i32 %0
-}
-
-declare i32 @llvm.bswap.i32(i32) nounwind readnone
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Mips/cannot-copy-registers.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Mips/cannot-copy-registers.ll
deleted file mode 100644
index 75cceb2011eb..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Mips/cannot-copy-registers.ll
+++ /dev/null
@@ -1,24 +0,0 @@
-; RUN: llc -march=mips64 -mcpu=mips64r6 -mattr=+micromips \
-; RUN:   -relocation-model=pic -O3 < %s
-
-; Check that message "Cannot copy registers" is not asserted in case of microMIPS64r6.
-
-@x = global i32 65504, align 4
-@y = global i32 60929, align 4
-@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1
-
-define i32 @main() nounwind {
-entry:
-  %0 = load i32, i32* @x, align 4
-  %and1 = and i32 %0, 4
-  %call1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds
-                                  ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 %and1)
-
-  %1 = load i32, i32* @y, align 4
-  %and2 = and i32 %1, 5
-  %call2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds
-                                  ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 %and2)
-  ret i32 0
-}
-
-declare i32 @printf(i8*, ...)
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/NVPTX/debug-file-loc.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/NVPTX/debug-file-loc.ll
deleted file mode 100644
index 008e9ce54583..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/NVPTX/debug-file-loc.ll
+++ /dev/null
@@ -1,43 +0,0 @@
-; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda | FileCheck %s
-
-; // Bitcode int this test case is reduced version of compiled code below:
-;extern "C" {
-;#line 1 "/source/dir/foo.h"
-;__device__ void foo() {}
-;#line 2 "/source/dir/bar.cu"
-;__device__ void bar() {}
-;}
-
-; CHECK: .file   1 "/source/dir{{/|\\\\}}bar.cu"
-; CHECK: .file   2 "/source/dir{{/|\\\\}}foo.h"
-
-; CHECK-LABEL: @foo
-define void @foo() !dbg !4 {
-bb:
-  ret void, !dbg !10
-}
-; CHECK: .loc 2 1
-; CHECK: ret
-
-; CHECK-LABEL: @bar
-define void @bar() !dbg !7 {
-bb:
-  ret void, !dbg !11
-}
-; CHECK: .loc 1 2
-; CHECK: ret
-
-!llvm.dbg.cu = !{!0}
-!llvm.module.flags = !{!8, !9}
-
-!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "", isOptimized: false, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2)
-!1 = !DIFile(filename: "bar.cu", directory: "/source/dir")
-!2 = !{}
-!4 = distinct !DISubprogram(name: "foo", scope: !5, file: !5, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
-!5 = !DIFile(filename: "foo.h", directory: "/source/dir")
-!6 = !DISubroutineType(types: !2)
-!7 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 2, type: !6, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
-!8 = !{i32 2, !"Dwarf Version", i32 4}
-!9 = !{i32 2, !"Debug Info Version", i32 3}
-!10 = !DILocation(line: 1, column: 31, scope: !4)
-!11 = !DILocation(line: 2, column: 31, scope: !7)
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/NVPTX/implicit-def.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/NVPTX/implicit-def.ll
deleted file mode 100644
index 2d2c6e527f6d..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/NVPTX/implicit-def.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llc < %s -O0 -march=nvptx -mcpu=sm_20 -asm-verbose=1 | FileCheck %s
-
-; CHECK: // implicit-def: %f[[F0:[0-9]+]]
-; CHECK: add.rn.f32         %f{{[0-9]+}}, %f{{[0-9]+}}, %f[[F0]];
-define float @foo(float %a) {
-  %ret = fadd float %a, undef
-  ret float %ret
-}
-
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll
deleted file mode 100644
index e9ea7c6c999d..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll
+++ /dev/null
@@ -1,13 +0,0 @@
-; RUN: llc %s -O0 -march=sparc -mattr=replacefmuls -o - | FileCheck %s
-
-; CHECK-LABEL: test_replace_fmuls
-; CHECK:       fsmuld %f1, %f0, %f2
-; CHECK:       fdtos %f2, %f0
-; NOFIX-LABEL: test_replace_fmuls
-; NOFIX:       fmuls %f1, %f0, %f0
-define float @test_replace_fmuls(float %a, float %b) {
-entry:
-  %mul = fmul float %a, %b
-
-  ret float %mul
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll
deleted file mode 100644
index 4c5ccc062601..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll
+++ /dev/null
@@ -1,11 +0,0 @@
-; RUN: llc %s -O0 -march=sparc -o - | FileCheck %s -check-prefix=NO_REPLACE_SDIV
-; RUN: llc %s -O0 -march=sparc -mcpu=at697e -o - | FileCheck %s -check-prefix=REPLACE_SDIV
-
-; REPLACE_SDIV: sdivcc %o0, %o1, %o0
-; NO_REPLACE_SDIV: sdiv %o0, %o1, %o0
-
-define i32 @lbr59(i32 %a, i32 %b)
-{
-  %r = sdiv i32 %a, %b
-  ret i32 %r 
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll
deleted file mode 100644
index 8fdff02f9c1b..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll
+++ /dev/null
@@ -1,152 +0,0 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-cgp-branch-opts -arm-atomic-cfg-tidy=0 | FileCheck %s
-
-%struct.pix_pos = type { i32, i32, i32, i32, i32, i32 }
-
-@getNeighbour = external global void (i32, i32, i32, i32, %struct.pix_pos*)*, align 4 ; <void (i32, i32, i32, i32, %struct.pix_pos*)**> [#uses=2]
-
-define void @t() nounwind {
-; CHECK-LABEL: t:
-; CHECK:      it eq
-; CHECK-NEXT: cmpeq
-entry:
-  %pix_a.i294 = alloca [4 x %struct.pix_pos], align 4 ; <[4 x %struct.pix_pos]*> [#uses=2]
-  br i1 undef, label %land.rhs, label %lor.end
-
-land.rhs:                                         ; preds = %entry
-  br label %lor.end
-
-lor.end:                                          ; preds = %land.rhs, %entry
-  switch i32 0, label %if.end371 [
-    i32 10, label %if.then366
-    i32 14, label %if.then366
-  ]
-
-if.then366:                                       ; preds = %lor.end, %lor.end
-  unreachable
-
-if.end371:                                        ; preds = %lor.end
-  %arrayidx56.2.i = getelementptr [4 x %struct.pix_pos], [4 x %struct.pix_pos]* %pix_a.i294, i32 0, i32 2 ; <%struct.pix_pos*> [#uses=1]
-  %arrayidx56.3.i = getelementptr [4 x %struct.pix_pos], [4 x %struct.pix_pos]* %pix_a.i294, i32 0, i32 3 ; <%struct.pix_pos*> [#uses=1]
-  br i1 undef, label %for.body1857, label %for.end4557
-
-for.body1857:                                     ; preds = %if.end371
-  br i1 undef, label %if.then1867, label %for.cond1933
-
-if.then1867:                                      ; preds = %for.body1857
-  unreachable
-
-for.cond1933:                                     ; preds = %for.body1857
-  br i1 undef, label %for.body1940, label %if.then4493
-
-for.body1940:                                     ; preds = %for.cond1933
-  %shl = shl i32 undef, 2                         ; <i32> [#uses=1]
-  %shl1959 = shl i32 undef, 2                     ; <i32> [#uses=4]
-  br i1 undef, label %if.then1992, label %if.else2003
-
-if.then1992:                                      ; preds = %for.body1940
-  %tmp14.i302 = load i32, i32* undef                   ; <i32> [#uses=4]
-  %add.i307452 = or i32 %shl1959, 1               ; <i32> [#uses=1]
-  %sub.i308 = add i32 %shl, -1                    ; <i32> [#uses=4]
-  call  void undef(i32 %tmp14.i302, i32 %sub.i308, i32 %shl1959, i32 0, %struct.pix_pos* undef) nounwind
-  %tmp49.i309 = load void (i32, i32, i32, i32, %struct.pix_pos*)*, void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; <void (i32, i32, i32, i32, %struct.pix_pos*)*> [#uses=1]
-  call  void %tmp49.i309(i32 %tmp14.i302, i32 %sub.i308, i32 %add.i307452, i32 0, %struct.pix_pos* null) nounwind
-  %tmp49.1.i = load void (i32, i32, i32, i32, %struct.pix_pos*)*, void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; <void (i32, i32, i32, i32, %struct.pix_pos*)*> [#uses=1]
-  call  void %tmp49.1.i(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.2.i) nounwind
-  call  void undef(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.3.i) nounwind
-  unreachable
-
-if.else2003:                                      ; preds = %for.body1940
-  switch i32 undef, label %if.then2015 [
-    i32 10, label %if.then4382
-    i32 14, label %if.then4382
-  ]
-
-if.then2015:                                      ; preds = %if.else2003
-  br i1 undef, label %if.else2298, label %if.then2019
-
-if.then2019:                                      ; preds = %if.then2015
-  br i1 undef, label %if.then2065, label %if.else2081
-
-if.then2065:                                      ; preds = %if.then2019
-  br label %if.end2128
-
-if.else2081:                                      ; preds = %if.then2019
-  br label %if.end2128
-
-if.end2128:                                       ; preds = %if.else2081, %if.then2065
-  unreachable
-
-if.else2298:                                      ; preds = %if.then2015
-  br i1 undef, label %land.lhs.true2813, label %cond.end2841
-
-land.lhs.true2813:                                ; preds = %if.else2298
-  br i1 undef, label %cond.end2841, label %cond.true2824
-
-cond.true2824:                                    ; preds = %land.lhs.true2813
-  br label %cond.end2841
-
-cond.end2841:                                     ; preds = %cond.true2824, %land.lhs.true2813, %if.else2298
-  br i1 undef, label %for.cond2882.preheader, label %for.cond2940.preheader
-
-for.cond2882.preheader:                           ; preds = %cond.end2841
-  %mul3693 = shl i32 undef, 1                     ; <i32> [#uses=2]
-  br i1 undef, label %if.then3689, label %if.else3728
-
-for.cond2940.preheader:                           ; preds = %cond.end2841
-  br label %for.inc3040
-
-for.inc3040:                                      ; preds = %for.inc3040, %for.cond2940.preheader
-  br label %for.inc3040
-
-if.then3689:                                      ; preds = %for.cond2882.preheader
-  %add3695 = add nsw i32 %mul3693, %shl1959       ; <i32> [#uses=1]
-  %mul3697 = shl i32 %add3695, 2                  ; <i32> [#uses=2]
-  %arrayidx3705 = getelementptr inbounds i16, i16* undef, i32 1 ; <i16*> [#uses=1]
-  %tmp3706 = load i16, i16* %arrayidx3705              ; <i16> [#uses=1]
-  %conv3707 = sext i16 %tmp3706 to i32            ; <i32> [#uses=1]
-  %add3708 = add nsw i32 %conv3707, %mul3697      ; <i32> [#uses=1]
-  %arrayidx3724 = getelementptr inbounds i16, i16* null, i32 1 ; <i16*> [#uses=1]
-  %tmp3725 = load i16, i16* %arrayidx3724              ; <i16> [#uses=1]
-  %conv3726 = sext i16 %tmp3725 to i32            ; <i32> [#uses=1]
-  %add3727 = add nsw i32 %conv3726, %mul3697      ; <i32> [#uses=1]
-  br label %if.end3770
-
-if.else3728:                                      ; preds = %for.cond2882.preheader
-  %mul3733 = add i32 %shl1959, 1073741816         ; <i32> [#uses=1]
-  %add3735 = add nsw i32 %mul3733, %mul3693       ; <i32> [#uses=1]
-  %mul3737 = shl i32 %add3735, 2                  ; <i32> [#uses=2]
-  %tmp3746 = load i16, i16* undef                      ; <i16> [#uses=1]
-  %conv3747 = sext i16 %tmp3746 to i32            ; <i32> [#uses=1]
-  %add3748 = add nsw i32 %conv3747, %mul3737      ; <i32> [#uses=1]
-  %arrayidx3765 = getelementptr inbounds i16, i16* null, i32 1 ; <i16*> [#uses=1]
-  %tmp3766 = load i16, i16* %arrayidx3765              ; <i16> [#uses=1]
-  %conv3767 = sext i16 %tmp3766 to i32            ; <i32> [#uses=1]
-  %add3768 = add nsw i32 %conv3767, %mul3737      ; <i32> [#uses=1]
-  br label %if.end3770
-
-if.end3770:                                       ; preds = %if.else3728, %if.then3689
-  %vec2_y.1 = phi i32 [ %add3727, %if.then3689 ], [ %add3768, %if.else3728 ] ; <i32> [#uses=0]
-  %vec1_y.2 = phi i32 [ %add3708, %if.then3689 ], [ %add3748, %if.else3728 ] ; <i32> [#uses=0]
-  unreachable
-
-if.then4382:                                      ; preds = %if.else2003, %if.else2003
-  switch i32 undef, label %if.then4394 [
-    i32 10, label %if.else4400
-    i32 14, label %if.else4400
-  ]
-
-if.then4394:                                      ; preds = %if.then4382
-  unreachable
-
-if.else4400:                                      ; preds = %if.then4382, %if.then4382
-  br label %for.cond4451.preheader
-
-for.cond4451.preheader:                           ; preds = %for.cond4451.preheader, %if.else4400
-  br label %for.cond4451.preheader
-
-if.then4493:                                      ; preds = %for.cond1933
-  unreachable
-
-for.end4557:                                      ; preds = %if.end371
-  ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/Thumb2/thumb2-cmp2.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/Thumb2/thumb2-cmp2.ll
deleted file mode 100644
index 4d840030f825..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/Thumb2/thumb2-cmp2.ll
+++ /dev/null
@@ -1,52 +0,0 @@
-; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
-
-; These tests would be improved by 'movs r0, #0' being rematerialized below the
-; test as 'mov.w r0, #0'.
-
-define i1 @f1(i32 %a, i32 %b) {
-; CHECK-LABEL: f1:
-; CHECK: cmp {{.*}}, r1
-    %tmp = icmp ne i32 %a, %b
-    ret i1 %tmp
-}
-
-define i1 @f2(i32 %a, i32 %b) {
-; CHECK-LABEL: f2:
-; CHECK: cmp {{.*}}, r1
-    %tmp = icmp eq i32 %a, %b
-    ret i1 %tmp
-}
-
-define i1 @f6(i32 %a, i32 %b) {
-; CHECK-LABEL: f6:
-; CHECK: cmp.w {{.*}}, r1, lsl #5
-    %tmp = shl i32 %b, 5
-    %tmp1 = icmp eq i32 %tmp, %a
-    ret i1 %tmp1
-}
-
-define i1 @f7(i32 %a, i32 %b) {
-; CHECK-LABEL: f7:
-; CHECK: cmp.w {{.*}}, r1, lsr #6
-    %tmp = lshr i32 %b, 6
-    %tmp1 = icmp ne i32 %tmp, %a
-    ret i1 %tmp1
-}
-
-define i1 @f8(i32 %a, i32 %b) {
-; CHECK-LABEL: f8:
-; CHECK: cmp.w {{.*}}, r1, asr #7
-    %tmp = ashr i32 %b, 7
-    %tmp1 = icmp eq i32 %a, %tmp
-    ret i1 %tmp1
-}
-
-define i1 @f9(i32 %a, i32 %b) {
-; CHECK-LABEL: f9:
-; CHECK: cmp.w {{.*}}, {{.*}}, ror #8
-    %l8 = shl i32 %a, 24
-    %r8 = lshr i32 %a, 8
-    %tmp = or i32 %l8, %r8
-    %tmp1 = icmp ne i32 %a, %tmp
-    ret i1 %tmp1
-}
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/GlobalISel/legalize-GV.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/X86/GlobalISel/legalize-GV.mir
deleted file mode 100644
index 7f9971e4c70a..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/GlobalISel/legalize-GV.mir
+++ /dev/null
@@ -1,31 +0,0 @@
-# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-# RUN: llc -mtriple=i386-linux-gnu   -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
---- |
-
-  @g_int = global i32 0, align 4
-
-  define i32* @test_global_ptrv() {
-  entry:
-    ret i32* @g_int
-  }
-...
----
-name:            test_global_ptrv
-# ALL-LABEL: name:  test_global_ptrv
-alignment:       4
-legalized:       false
-regBankSelected: false
-# ALL:      registers:
-# ALL-NEXT:   - { id: 0, class: _, preferred-register: '' }
-registers:
-  - { id: 0, class: _, preferred-register: '' }
-# ALL:          %0(p0) = G_GLOBAL_VALUE @g_int
-# ALL-NEXT:     %rax = COPY %0(p0)
-# ALL-NEXT:     RET 0, implicit %rax
-body:             |
-  bb.1.entry:
-    %0(p0) = G_GLOBAL_VALUE @g_int
-    %rax = COPY %0(p0)
-    RET 0, implicit %rax
-
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/GlobalISel/select-frameIndex.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/X86/GlobalISel/select-frameIndex.mir
deleted file mode 100644
index 1d641ba279af..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/GlobalISel/select-frameIndex.mir
+++ /dev/null
@@ -1,36 +0,0 @@
-# RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X64
-# RUN: llc -mtriple=i386-linux-gnu      -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32
-# RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32ABI
-
---- |
-  define i32* @allocai32() {
-    %ptr1 = alloca i32
-    ret i32* %ptr1
-  }
-
-...
----
-name:            allocai32
-legalized:       true
-regBankSelected: true
-selected:        false
-# CHECK-LABEL: name:            allocai32
-# CHECK: registers:
-# CHECK-X32:     - { id: 0, class: gr32 }
-# CHECK-X32ABI:  - { id: 0, class: gr32 }
-# CHECK-X64:     - { id: 0, class: gr64 }
-registers:
-  - { id: 0, class: gpr }
-stack:
-  - { id: 0, name: ptr1, offset: 0, size: 4, alignment: 4 }
-
-# CHECK-X32:    %0 = LEA32r %stack.0.ptr1, 1, _, 0, _
-# CHECK-X32ABI: %0 = LEA64_32r %stack.0.ptr1, 1, _, 0, _
-# CHECK-X64:    %0 = LEA64r %stack.0.ptr1, 1, _, 0, _
-body:             |
-  bb.1 (%ir-block.0):
-    %0(p0) = G_FRAME_INDEX %stack.0.ptr1
-    %eax = COPY %0(p0)
-    RET 0, implicit %eax
-
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/avx512-round.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/X86/avx512-round.ll
deleted file mode 100644
index b23af2b09a78..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/avx512-round.ll
+++ /dev/null
@@ -1,106 +0,0 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
-
-define <16 x float> @floor_v16f32(<16 x float> %a) {
-; CHECK-LABEL: floor_v16f32
-; CHECK: vrndscaleps $9, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x09]
-  %res = call <16 x float> @llvm.floor.v16f32(<16 x float> %a)
-  ret <16 x float> %res
-}
-declare <16 x float> @llvm.floor.v16f32(<16 x float> %p)
-
-define <8 x double> @floor_v8f64(<8 x double> %a) {
-; CHECK-LABEL: floor_v8f64
-; CHECK: vrndscalepd $9, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x09]
-  %res = call <8 x double> @llvm.floor.v8f64(<8 x double> %a)
-  ret <8 x double> %res
-}
-declare <8 x double> @llvm.floor.v8f64(<8 x double> %p)
-
-define <16 x float> @ceil_v16f32(<16 x float> %a) {
-; CHECK-LABEL: ceil_v16f32
-; CHECK: vrndscaleps $10, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x0a]
-  %res = call <16 x float> @llvm.ceil.v16f32(<16 x float> %a)
-  ret <16 x float> %res
-}
-declare <16 x float> @llvm.ceil.v16f32(<16 x float> %p)
-
-define <8 x double> @ceil_v8f64(<8 x double> %a) {
-; CHECK-LABEL: ceil_v8f64
-; CHECK: vrndscalepd $10, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x0a]
-  %res = call <8 x double> @llvm.ceil.v8f64(<8 x double> %a)
-  ret <8 x double> %res
-}
-declare <8 x double> @llvm.ceil.v8f64(<8 x double> %p)
-
-define <16 x float> @trunc_v16f32(<16 x float> %a) {
-; CHECK-LABEL: trunc_v16f32
-; CHECK: vrndscaleps $11, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x0b]
-  %res = call <16 x float> @llvm.trunc.v16f32(<16 x float> %a)
-  ret <16 x float> %res
-}
-declare <16 x float> @llvm.trunc.v16f32(<16 x float> %p)
-
-define <8 x double> @trunc_v8f64(<8 x double> %a) {
-; CHECK-LABEL: trunc_v8f64
-; CHECK: vrndscalepd $11, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x0b]
-  %res = call <8 x double> @llvm.trunc.v8f64(<8 x double> %a)
-  ret <8 x double> %res
-}
-declare <8 x double> @llvm.trunc.v8f64(<8 x double> %p)
-
-define <16 x float> @rint_v16f32(<16 x float> %a) {
-; CHECK-LABEL: rint_v16f32
-; CHECK: vrndscaleps $4, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x04]
-  %res = call <16 x float> @llvm.rint.v16f32(<16 x float> %a)
-  ret <16 x float> %res
-}
-declare <16 x float> @llvm.rint.v16f32(<16 x float> %p)
-
-define <8 x double> @rint_v8f64(<8 x double> %a) {
-; CHECK-LABEL: rint_v8f64
-; CHECK: vrndscalepd $4, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x04]
-  %res = call <8 x double> @llvm.rint.v8f64(<8 x double> %a)
-  ret <8 x double> %res
-}
-declare <8 x double> @llvm.rint.v8f64(<8 x double> %p)
-
-define <16 x float> @nearbyint_v16f32(<16 x float> %a) {
-; CHECK-LABEL: nearbyint_v16f32
-; CHECK: vrndscaleps $12, {{.*}}encoding: [0x62,0xf3,0x7d,0x48,0x08,0xc0,0x0c]
-  %res = call <16 x float> @llvm.nearbyint.v16f32(<16 x float> %a)
-  ret <16 x float> %res
-}
-declare <16 x float> @llvm.nearbyint.v16f32(<16 x float> %p)
-
-define <8 x double> @nearbyint_v8f64(<8 x double> %a) {
-; CHECK-LABEL: nearbyint_v8f64
-; CHECK: vrndscalepd $12, {{.*}}encoding: [0x62,0xf3,0xfd,0x48,0x09,0xc0,0x0c]
-  %res = call <8 x double> @llvm.nearbyint.v8f64(<8 x double> %a)
-  ret <8 x double> %res
-}
-declare <8 x double> @llvm.nearbyint.v8f64(<8 x double> %p)
-
-define double @nearbyint_f64(double %a) {
-; CHECK-LABEL: nearbyint_f64
-; CHECK: vrndscalesd $12, {{.*}}encoding: [0x62,0xf3,0xfd,0x08,0x0b,0xc0,0x0c]
-  %res = call double @llvm.nearbyint.f64(double %a)
-  ret double %res
-}
-declare double @llvm.nearbyint.f64(double %p)
-
-define float @floor_f32(float %a) {
-; CHECK-LABEL: floor_f32
-; CHECK: vrndscaless $9, {{.*}}encoding: [0x62,0xf3,0x7d,0x08,0x0a,0xc0,0x09]
-  %res = call float @llvm.floor.f32(float %a)
-  ret float %res
-}
-declare float @llvm.floor.f32(float %p)
-
-define float @floor_f32m(float* %aptr) {
-; CHECK-LABEL: floor_f32m
-; CHECK: vrndscaless $9, (%rdi), {{.*}}encoding: [0x62,0xf3,0x7d,0x08,0x0a,0x07,0x09]
-  %a = load float, float* %aptr, align 4
-  %res = call float @llvm.floor.f32(float %a)
-  ret float %res
-}
-
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/clobber-fi0.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/X86/clobber-fi0.ll
deleted file mode 100644
index b69b18531601..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/clobber-fi0.ll
+++ /dev/null
@@ -1,37 +0,0 @@
-; RUN: llc < %s -verify-machineinstrs -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-target triple = "x86_64-apple-macosx10.7.0"
-
-; In the code below we need to copy the EFLAGS because of scheduling constraints.
-; When copying the EFLAGS we need to write to the stack with push/pop. This forces
-; us to emit the prolog.
-
-; CHECK: main
-; CHECK: subq{{.*}}rsp
-; CHECK: ret
-define i32 @main(i32 %arg, i8** %arg1) nounwind {
-bb:
-  %tmp = alloca i32, align 4                      ; [#uses=3 type=i32*]
-  %tmp2 = alloca i32, align 4                     ; [#uses=3 type=i32*]
-  %tmp3 = alloca i32                              ; [#uses=1 type=i32*]
-  store volatile i32 1, i32* %tmp, align 4
-  store volatile i32 1, i32* %tmp2, align 4
-  br label %bb4
-
-bb4:                                              ; preds = %bb4, %bb
-  %tmp6 = load volatile i32, i32* %tmp2, align 4                ; [#uses=1 type=i32]
-  %tmp7 = add i32 %tmp6, -1                       ; [#uses=2 type=i32]
-  store volatile i32 %tmp7, i32* %tmp2, align 4
-  %tmp8 = icmp eq i32 %tmp7, 0                    ; [#uses=1 type=i1]
-  %tmp9 = load volatile i32, i32* %tmp                          ; [#uses=1 type=i32]
-  %tmp10 = add i32 %tmp9, -1              ; [#uses=1 type=i32]
-  store volatile i32 %tmp10, i32* %tmp3
-  br i1 %tmp8, label %bb11, label %bb4
-
-bb11:                                             ; preds = %bb4
-  %tmp12 = load volatile i32, i32* %tmp, align 4                ; [#uses=1 type=i32]
-  ret i32 %tmp12
-}
-
-
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/eflags-copy-expansion.mir b/external/bsd/llvm/dist/llvm/test/CodeGen/X86/eflags-copy-expansion.mir
deleted file mode 100644
index 28f47c3c2496..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/eflags-copy-expansion.mir
+++ /dev/null
@@ -1,64 +0,0 @@
-# RUN: llc -run-pass postrapseudos -mtriple=i386-apple-macosx -o - %s | FileCheck %s
-
-# Verify that we correctly save and restore eax when copying eflags,
-# even when only a smaller alias of eax is used. We used to check only
-# eax and not its aliases.
-# PR27624.
-
---- |
-  target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
-
-  define void @foo() {
-  entry:
-    br label %false
-  false:
-    ret void
-  }
-
-...
-
----
-name:            foo
-tracksRegLiveness: true
-liveins:
-  - { reg: '%edi' }
-body:             |
-  bb.0.entry:
-    liveins: %edi
-    NOOP implicit-def %al
-
-    ; The bug was triggered only when LivePhysReg is used, which
-    ; happens only when the heuristic for the liveness computation
-    ; failed. The liveness computation heuristic looks at 10 instructions
-    ; before and after the copy. Make sure we do not reach the definition of
-    ; AL in 10 instructions, otherwise the heuristic will see that it is live.
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    NOOP
-    ; Save AL.
-    ; CHECK: PUSH32r killed %eax
-
-    ; Copy EDI into EFLAGS
-    ; CHECK-NEXT: %eax = MOV32rr %edi
-    ; CHECK-NEXT: %al = ADD8ri %al, 127, implicit-def %eflags
-    ; CHECK-NEXT: SAHF implicit-def %eflags, implicit %ah
-    %eflags = COPY %edi
-
-    ; Restore AL.
-    ; CHECK-NEXT: %eax = POP32r
-  bb.1.false:
-    liveins: %al
-    NOOP implicit %al
-    RETQ
-
-...
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/pr12312.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/X86/pr12312.ll
deleted file mode 100644
index 6575d2a73d9c..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/pr12312.ll
+++ /dev/null
@@ -1,243 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx < %s | FileCheck %s --check-prefix=SSE41
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx,-avx2 < %s   | FileCheck %s --check-prefix=AVX
-
-define i32 @veccond128(<4 x i32> %input) {
-; SSE41-LABEL: veccond128:
-; SSE41:       # BB#0: # %entry
-; SSE41-NEXT:    ptest %xmm0, %xmm0
-; SSE41-NEXT:    je .LBB0_2
-; SSE41-NEXT:  # BB#1: # %if-true-block
-; SSE41-NEXT:    xorl %eax, %eax
-; SSE41-NEXT:    retq
-; SSE41-NEXT:  .LBB0_2: # %endif-block
-; SSE41-NEXT:    movl $1, %eax
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: veccond128:
-; AVX:       # BB#0: # %entry
-; AVX-NEXT:    vptest %xmm0, %xmm0
-; AVX-NEXT:    je .LBB0_2
-; AVX-NEXT:  # BB#1: # %if-true-block
-; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    retq
-; AVX-NEXT:  .LBB0_2: # %endif-block
-; AVX-NEXT:    movl $1, %eax
-; AVX-NEXT:    retq
-entry:
-  %0 = bitcast <4 x i32> %input to i128
-  %1 = icmp ne i128 %0, 0
-  br i1 %1, label %if-true-block, label %endif-block
-if-true-block:
-  ret i32 0
-endif-block:
-  ret i32 1
-}
-
-define i32 @veccond256(<8 x i32> %input) {
-; SSE41-LABEL: veccond256:
-; SSE41:       # BB#0: # %entry
-; SSE41-NEXT:    por %xmm1, %xmm0
-; SSE41-NEXT:    ptest %xmm0, %xmm0
-; SSE41-NEXT:    je .LBB1_2
-; SSE41-NEXT:  # BB#1: # %if-true-block
-; SSE41-NEXT:    xorl %eax, %eax
-; SSE41-NEXT:    retq
-; SSE41-NEXT:  .LBB1_2: # %endif-block
-; SSE41-NEXT:    movl $1, %eax
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: veccond256:
-; AVX:       # BB#0: # %entry
-; AVX-NEXT:    vptest %ymm0, %ymm0
-; AVX-NEXT:    je .LBB1_2
-; AVX-NEXT:  # BB#1: # %if-true-block
-; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    vzeroupper
-; AVX-NEXT:    retq
-; AVX-NEXT:  .LBB1_2: # %endif-block
-; AVX-NEXT:    movl $1, %eax
-; AVX-NEXT:    vzeroupper
-; AVX-NEXT:    retq
-entry:
-  %0 = bitcast <8 x i32> %input to i256
-  %1 = icmp ne i256 %0, 0
-  br i1 %1, label %if-true-block, label %endif-block
-if-true-block:
-  ret i32 0
-endif-block:
-  ret i32 1
-}
-
-define i32 @veccond512(<16 x i32> %input) {
-; SSE41-LABEL: veccond512:
-; SSE41:       # BB#0: # %entry
-; SSE41-NEXT:    por %xmm3, %xmm1
-; SSE41-NEXT:    por %xmm2, %xmm1
-; SSE41-NEXT:    por %xmm0, %xmm1
-; SSE41-NEXT:    ptest %xmm1, %xmm1
-; SSE41-NEXT:    je .LBB2_2
-; SSE41-NEXT:  # BB#1: # %if-true-block
-; SSE41-NEXT:    xorl %eax, %eax
-; SSE41-NEXT:    retq
-; SSE41-NEXT:  .LBB2_2: # %endif-block
-; SSE41-NEXT:    movl $1, %eax
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: veccond512:
-; AVX:       # BB#0: # %entry
-; AVX-NEXT:    vorps %ymm1, %ymm0, %ymm0
-; AVX-NEXT:    vptest %ymm0, %ymm0
-; AVX-NEXT:    je .LBB2_2
-; AVX-NEXT:  # BB#1: # %if-true-block
-; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    vzeroupper
-; AVX-NEXT:    retq
-; AVX-NEXT:  .LBB2_2: # %endif-block
-; AVX-NEXT:    movl $1, %eax
-; AVX-NEXT:    vzeroupper
-; AVX-NEXT:    retq
-entry:
-  %0 = bitcast <16 x i32> %input to i512
-  %1 = icmp ne i512 %0, 0
-  br i1 %1, label %if-true-block, label %endif-block
-if-true-block:
-  ret i32 0
-endif-block:
-  ret i32 1
-}
-
-define i32 @vectest128(<4 x i32> %input) {
-; SSE41-LABEL: vectest128:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    xorl %eax, %eax
-; SSE41-NEXT:    ptest %xmm0, %xmm0
-; SSE41-NEXT:    setne %al
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: vectest128:
-; AVX:       # BB#0:
-; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    vptest %xmm0, %xmm0
-; AVX-NEXT:    setne %al
-; AVX-NEXT:    retq
-  %t0 = bitcast <4 x i32> %input to i128
-  %t1 = icmp ne i128 %t0, 0
-  %t2 = zext i1 %t1 to i32
-  ret i32 %t2
-}
-
-define i32 @vectest256(<8 x i32> %input) {
-; SSE41-LABEL: vectest256:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    por %xmm1, %xmm0
-; SSE41-NEXT:    xorl %eax, %eax
-; SSE41-NEXT:    ptest %xmm0, %xmm0
-; SSE41-NEXT:    setne %al
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: vectest256:
-; AVX:       # BB#0:
-; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    vptest %ymm0, %ymm0
-; AVX-NEXT:    setne %al
-; AVX-NEXT:    vzeroupper
-; AVX-NEXT:    retq
-  %t0 = bitcast <8 x i32> %input to i256
-  %t1 = icmp ne i256 %t0, 0
-  %t2 = zext i1 %t1 to i32
-  ret i32 %t2
-}
-
-define i32 @vectest512(<16 x i32> %input) {
-; SSE41-LABEL: vectest512:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    por %xmm3, %xmm1
-; SSE41-NEXT:    por %xmm2, %xmm1
-; SSE41-NEXT:    por %xmm0, %xmm1
-; SSE41-NEXT:    xorl %eax, %eax
-; SSE41-NEXT:    ptest %xmm1, %xmm1
-; SSE41-NEXT:    setne %al
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: vectest512:
-; AVX:       # BB#0:
-; AVX-NEXT:    vorps %ymm1, %ymm0, %ymm0
-; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    vptest %ymm0, %ymm0
-; AVX-NEXT:    setne %al
-; AVX-NEXT:    vzeroupper
-; AVX-NEXT:    retq
-  %t0 = bitcast <16 x i32> %input to i512
-  %t1 = icmp ne i512 %t0, 0
-  %t2 = zext i1 %t1 to i32
-  ret i32 %t2
-}
-
-define i32 @vecsel128(<4 x i32> %input, i32 %a, i32 %b) {
-; SSE41-LABEL: vecsel128:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    ptest %xmm0, %xmm0
-; SSE41-NEXT:    cmovel %esi, %edi
-; SSE41-NEXT:    movl %edi, %eax
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: vecsel128:
-; AVX:       # BB#0:
-; AVX-NEXT:    vptest %xmm0, %xmm0
-; AVX-NEXT:    cmovel %esi, %edi
-; AVX-NEXT:    movl %edi, %eax
-; AVX-NEXT:    retq
-  %t0 = bitcast <4 x i32> %input to i128
-  %t1 = icmp ne i128 %t0, 0
-  %t2 = select i1 %t1, i32 %a, i32 %b
-  ret i32 %t2
-}
-
-define i32 @vecsel256(<8 x i32> %input, i32 %a, i32 %b) {
-; SSE41-LABEL: vecsel256:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    por %xmm1, %xmm0
-; SSE41-NEXT:    ptest %xmm0, %xmm0
-; SSE41-NEXT:    cmovel %esi, %edi
-; SSE41-NEXT:    movl %edi, %eax
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: vecsel256:
-; AVX:       # BB#0:
-; AVX-NEXT:    vptest %ymm0, %ymm0
-; AVX-NEXT:    cmovel %esi, %edi
-; AVX-NEXT:    movl %edi, %eax
-; AVX-NEXT:    vzeroupper
-; AVX-NEXT:    retq
-  %t0 = bitcast <8 x i32> %input to i256
-  %t1 = icmp ne i256 %t0, 0
-  %t2 = select i1 %t1, i32 %a, i32 %b
-  ret i32 %t2
-}
-
-define i32 @vecsel512(<16 x i32> %input, i32 %a, i32 %b) {
-; SSE41-LABEL: vecsel512:
-; SSE41:       # BB#0:
-; SSE41-NEXT:    por %xmm3, %xmm1
-; SSE41-NEXT:    por %xmm2, %xmm1
-; SSE41-NEXT:    por %xmm0, %xmm1
-; SSE41-NEXT:    ptest %xmm1, %xmm1
-; SSE41-NEXT:    cmovel %esi, %edi
-; SSE41-NEXT:    movl %edi, %eax
-; SSE41-NEXT:    retq
-;
-; AVX-LABEL: vecsel512:
-; AVX:       # BB#0:
-; AVX-NEXT:    vorps %ymm1, %ymm0, %ymm0
-; AVX-NEXT:    vptest %ymm0, %ymm0
-; AVX-NEXT:    cmovel %esi, %edi
-; AVX-NEXT:    movl %edi, %eax
-; AVX-NEXT:    vzeroupper
-; AVX-NEXT:    retq
-  %t0 = bitcast <16 x i32> %input to i512
-  %t1 = icmp ne i512 %t0, 0
-  %t2 = select i1 %t1, i32 %a, i32 %b
-  ret i32 %t2
-}
-
diff --git a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/x86-64-dead-stack-adjust.ll b/external/bsd/llvm/dist/llvm/test/CodeGen/X86/x86-64-dead-stack-adjust.ll
deleted file mode 100644
index 9c01f16f24f5..000000000000
--- a/external/bsd/llvm/dist/llvm/test/CodeGen/X86/x86-64-dead-stack-adjust.ll
+++ /dev/null
@@ -1,12 +0,0 @@
-; RUN: llc < %s -mcpu=nehalem | not grep rsp
-; RUN: llc < %s -mcpu=nehalem | grep cvttsd2si
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-target triple = "x86_64-apple-darwin8"
-
-define double @a(double %b) nounwind  {
-entry:
-	%tmp12 = fptoui double %b to i32		; <i32> [#uses=1]
-	%tmp123 = uitofp i32 %tmp12 to double		; <double> [#uses=1]
-	ret double %tmp123
-}
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/constant-sdnodes-have-dbg-location.ll b/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/constant-sdnodes-have-dbg-location.ll
deleted file mode 100644
index cc7101b50ada..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/constant-sdnodes-have-dbg-location.ll
+++ /dev/null
@@ -1,25 +0,0 @@
-; RUN: llc -debug -dag-dump-verbose < %s 2>&1 | FileCheck %s
-; REQUIRES: asserts
-
-; CHECK: t{{[0-9]+}}: i32 = Constant<-1>test.c:4:5
-
-define i32 @main() !dbg !4 {
-entry:
-  %retval = alloca i32, align 4
-  store i32 0, i32* %retval
-  ret i32 -1, !dbg !10
-}
-
-!llvm.dbg.cu = !{!0}
-!llvm.module.flags = !{!8, !9}
-
-!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "", isOptimized: false, emissionKind: FullDebug)
-!1 = !DIFile(filename: "test.c", directory: "/home/user/clang-llvm/build")
-!2 = !{}
-!4 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 2, type: !5, isLocal: false, isDefinition: true, scopeLine: 3, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
-!5 = !DISubroutineType(types: !6)
-!6 = !{!7}
-!7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
-!8 = !{i32 2, !"Dwarf Version", i32 4}
-!9 = !{i32 2, !"Debug Info Version", i32 3}
-!10 = !DILocation(line: 4, column: 5, scope: !4)
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/constantfp-sdnodes-have-dbg-location.ll b/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/constantfp-sdnodes-have-dbg-location.ll
deleted file mode 100644
index d216dc718e0e..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/constantfp-sdnodes-have-dbg-location.ll
+++ /dev/null
@@ -1,23 +0,0 @@
-; RUN: llc -debug -dag-dump-verbose < %s 2>&1 | FileCheck %s
-; REQUIRES: asserts
-
-; CHECK: t{{[0-9]+}}: f64 = ConstantFP<1.500000e+00>test.c:3:5
-
-define double @f() !dbg !4 {
-entry:
-  ret double 1.500000e+00, !dbg !10
-}
-
-!llvm.dbg.cu = !{!0}
-!llvm.module.flags = !{!8, !9}
-
-!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "", isOptimized: false, emissionKind: FullDebug)
-!1 = !DIFile(filename: "test.c", directory: "/home/user/clang-llvm/build")
-!2 = !{}
-!4 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 1, type: !5, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
-!5 = !DISubroutineType(types: !6)
-!6 = !{!7}
-!7 = !DIBasicType(name: "double", size: 64, align: 64, encoding: DW_ATE_float)
-!8 = !{i32 2, !"Dwarf Version", i32 4}
-!9 = !{i32 2, !"Debug Info Version", i32 3}
-!10 = !DILocation(line: 3, column: 5, scope: !4)
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/nodebug.ll b/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/nodebug.ll
deleted file mode 100644
index 9b0eb9b4dd07..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Generic/nodebug.ll
+++ /dev/null
@@ -1,57 +0,0 @@
-; REQUIRES: object-emission
-
-; RUN: %llc_dwarf < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s
-
-; Test that a nodebug function (a function not appearing in the debug info IR
-; metadata subprogram list) with DebugLocs on its IR doesn't cause crashes/does
-; the right thing.
-
-; Build with clang from the following:
-; extern int i;
-; inline __attribute__((always_inline)) void f1() {
-;   i = 3;
-; }
-;
-; __attribute__((nodebug)) void f2() {
-;   f1();
-; }
-
-; Check that there's no DW_TAG_subprogram, not even for the 'f2' function.
-; CHECK: .debug_info contents:
-; CHECK: DW_TAG_compile_unit
-; CHECK-NOT: DW_TAG_subprogram
-
-; Expect no line table entry since there are no functions and file references in this compile unit
-; CHECK: .debug_line contents:
-; CHECK: Line table prologue:
-; CHECK: total_length: 0x00000019
-; CHECK-NOT: file_names[
-
-@i = external global i32
-
-; Function Attrs: uwtable
-define void @_Z2f2v() #0 {
-entry:
-  store i32 3, i32* @i, align 4, !dbg !11
-  ret void
-}
-
-attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
-
-!llvm.dbg.cu = !{!0}
-!llvm.module.flags = !{!8, !9}
-!llvm.ident = !{!10}
-
-!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, producer: "clang version 3.5.0 ", isOptimized: false, emissionKind: FullDebug, file: !1, enums: !2, retainedTypes: !12, globals: !2, imports: !2)
-!1 = !DIFile(filename: "nodebug.cpp", directory: "/tmp/dbginfo")
-!2 = !{}
-!4 = distinct !DISubprogram(name: "f1", linkageName: "_Z2f1v", line: 2, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !0, scopeLine: 2, file: !1, scope: !5, type: !6, variables: !2)
-!5 = !DIFile(filename: "nodebug.cpp", directory: "/tmp/dbginfo")
-!6 = !DISubroutineType(types: !7)
-!7 = !{null}
-!8 = !{i32 2, !"Dwarf Version", i32 4}
-!9 = !{i32 2, !"Debug Info Version", i32 3}
-!10 = !{!"clang version 3.5.0 "}
-!11 = !DILocation(line: 3, scope: !4)
-!12 = !{!13}
-!13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-header.elf-x86-64 b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-header.elf-x86-64
deleted file mode 100644
index 21c1eacd07141b963047c81a51aa3984a961448c..0000000000000000000000000000000000000000
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diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-header.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-header.s
deleted file mode 100644
index c5cf48597765..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-header.s
+++ /dev/null
@@ -1,257 +0,0 @@
-# Test object to verify dwarfdump handles v4 and v5 CU/TU/line headers.
-# We have a representative set of units: v4 CU, v5 CU, v4 TU, v5 split TU.
-# We have v4 and v5 line-table headers.
-#
-# To generate the test object:
-# llvm-mc -triple x86_64-unknown-linux dwarfdump-header.s -filetype=obj \
-#         -o dwarfdump-header.elf-x86-64
-
-        .section .debug_str,"MS",@progbits,1
-str_producer:
-        .asciz "Handmade DWARF producer"
-str_CU_4:
-        .asciz "V4_compile_unit"
-str_CU_5:
-        .asciz "V5_compile_unit"
-str_TU_4:
-        .asciz "V4_type_unit"
-
-        .section .debug_str.dwo,"MS",@progbits,1
-dwo_TU_5:
-        .asciz "V5_split_type_unit"
-
-# All CUs/TUs use the same abbrev section for simplicity.
-        .section .debug_abbrev,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x25  # DW_AT_producer
-        .byte 0x0e  # DW_FORM_strp
-        .byte 0x03  # DW_AT_name
-        .byte 0x0e  # DW_FORM_strp
-        .byte 0x10  # DW_AT_stmt_list
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x02  # Abbrev code
-        .byte 0x41  # DW_TAG_type_unit
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x03  # DW_AT_name
-        .byte 0x0e  # DW_FORM_strp
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x03  # Abbrev code
-        .byte 0x13  # DW_TAG_structure_type
-        .byte 0x00  # DW_CHILDREN_no (no members)
-        .byte 0x03  # DW_AT_name
-        .byte 0x0e  # DW_FORM_strp
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-
-# And a .dwo copy for the .dwo sections.
-        .section .debug_abbrev.dwo,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x25  # DW_AT_producer
-        .byte 0x0e  # DW_FORM_strp
-        .byte 0x03  # DW_AT_name
-        .byte 0x0e  # DW_FORM_strp
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x02  # Abbrev code
-        .byte 0x41  # DW_TAG_type_unit
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x03  # DW_AT_name
-        .byte 0x0e  # DW_FORM_strp
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x03  # Abbrev code
-        .byte 0x13  # DW_TAG_structure_type
-        .byte 0x00  # DW_CHILDREN_no (no members)
-        .byte 0x03  # DW_AT_name
-        .byte 0x0e  # DW_FORM_strp
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-
-        .section .debug_info,"",@progbits
-
-# DWARF v4 CU header. V4 CU headers all look the same so we do only one.
-        .long  CU_4_end-CU_4_version  # Length of Unit
-CU_4_version:
-        .short 4               # DWARF version number
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-        .byte 8                # Address Size (in bytes)
-# The compile-unit DIE, with DW_AT_producer, DW_AT_name, DW_AT_stmt_list.
-        .byte 1
-        .long str_producer
-        .long str_CU_4
-        .long LH_4_start
-        .byte 0 # NULL
-CU_4_end:
-
-# DWARF v5 normal CU header.
-        .long  CU_5_end-CU_5_version  # Length of Unit
-CU_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-# The compile-unit DIE, with DW_AT_producer, DW_AT_name, DW_AT_stmt_list.
-        .byte 1
-        .long str_producer
-        .long str_CU_5
-        .long LH_5_start
-        .byte 0 # NULL
-CU_5_end:
-
-        .section .debug_types,"",@progbits
-
-# DWARF v4 Type unit header. Normal/split are identical so we do only one.
-TU_4_start:
-        .long  TU_4_end-TU_4_version  # Length of Unit
-TU_4_version:
-        .short 4               # DWARF version number
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-        .byte 8                # Address Size (in bytes)
-        .quad 0x0011223344556677 # Type Signature
-        .long TU_4_type-TU_4_start # Type offset
-# The type-unit DIE, which has a name.
-        .byte 2
-        .long str_TU_4
-# The type DIE, which has a name.
-TU_4_type:
-        .byte 3
-        .long str_TU_4
-        .byte 0 # NULL
-        .byte 0 # NULL
-TU_4_end:
-
-        .section .debug_types.dwo,"",@progbits
-# FIXME: DWARF v5 wants type units in .debug_info[.dwo] not .debug_types[.dwo].
-
-# DWARF v5 split type unit header.
-TU_split_5_start:
-        .long  TU_split_5_end-TU_split_5_version  # Length of Unit
-TU_split_5_version:
-        .short 5               # DWARF version number
-        .byte 6                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev.dwo    # Offset Into Abbrev. Section
-        .quad 0x8899aabbccddeeff # Type Signature
-        .long TU_split_5_type-TU_split_5_start  # Type offset
-# The type-unit DIE, which has a name.
-        .byte 2
-        .long dwo_TU_5
-# The type DIE, which has a name.
-TU_split_5_type:
-        .byte 3
-        .long dwo_TU_5
-        .byte 0 # NULL
-        .byte 0 # NULL
-TU_split_5_end:
-
-        .section .debug_line,"",@progbits
-# DWARF v4 line-table header.
-LH_4_start:
-        .long   LH_4_end-LH_4_version   # Length of Unit
-LH_4_version:
-        .short  4               # DWARF version number
-        .long   LH_4_header_end-LH_4_params     # Length of Prologue
-LH_4_params:
-        .byte   1               # Minimum Instruction Length
-        .byte   1               # Maximum Operations per Instruction
-        .byte   1               # Default is_stmt
-        .byte   -5              # Line Base
-        .byte   14              # Line Range
-        .byte   13              # Opcode Base
-        .byte   0               # Standard Opcode Lengths
-        .byte   1
-        .byte   1
-        .byte   1
-        .byte   1
-        .byte   0
-        .byte   0
-        .byte   0
-        .byte   1
-        .byte   0
-        .byte   0
-        .byte   1
-        # Directory table
-        .asciz  "Directory4a"
-        .asciz  "Directory4b"
-        .byte   0
-        # File table
-        .asciz  "File4a"        # File name 1
-        .byte   1               # Directory index 1
-        .byte   0x41            # Timestamp 1
-        .byte   0x42            # File Size 1
-        .asciz  "File4b"        # File name 2
-        .byte   0               # Directory index 2
-        .byte   0x43            # Timestamp 2
-        .byte   0x44            # File Size 2
-        .byte   0               # End of list
-LH_4_header_end:
-        # Line number program, which is empty.
-LH_4_end:
-
-# DWARF v5 line-table header.
-LH_5_start:
-        .long   LH_5_end-LH_5_version   # Length of Unit
-LH_5_version:
-        .short  5               # DWARF version number
-        .byte   8               # Address Size
-        .byte   0               # Segment Selector Size
-        .long   LH_5_header_end-LH_5_params     # Length of Prologue
-LH_5_params:
-        .byte   1               # Minimum Instruction Length
-        .byte   1               # Maximum Operations per Instruction
-        .byte   1               # Default is_stmt
-        .byte   -5              # Line Base
-        .byte   14              # Line Range
-        .byte   13              # Opcode Base
-        .byte   0               # Standard Opcode Lengths
-        .byte   1
-        .byte   1
-        .byte   1
-        .byte   1
-        .byte   0
-        .byte   0
-        .byte   0
-        .byte   1
-        .byte   0
-        .byte   0
-        .byte   1
-        # Directory table format
-        .byte   1               # One element per directory entry
-        .byte   1               # DW_LNCT_path
-        .byte   0x08            # DW_FORM_string
-        # Directory table entries
-        .byte   2               # Two directories
-        .asciz "Directory5a"
-        .asciz "Directory5b"
-        # File table format
-        .byte   4               # Four elements per file entry
-        .byte   1               # DW_LNCT_path
-        .byte   0x08            # DW_FORM_string
-        .byte   2               # DW_LNCT_directory_index
-        .byte   0x0b            # DW_FORM_data1
-        .byte   3               # DW_LNCT_timestamp
-        .byte   0x0f            # DW_FORM_udata
-        .byte   4               # DW_LNCT_size
-        .byte   0x0f            # DW_FORM_udata
-        # File table entries
-        .byte   2               # Two files
-        .asciz "File5a"
-        .byte   1
-        .byte   0x51
-        .byte   0x52
-        .asciz "File5b"
-        .byte   2
-        .byte   0x53
-        .byte   0x54
-LH_5_header_end:
-        # Line number program, which is empty.
-LH_5_end:
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-line-dwo.cc b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-line-dwo.cc
deleted file mode 100644
index 2784ae24ee56..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-line-dwo.cc
+++ /dev/null
@@ -1,10 +0,0 @@
-struct foo {
-};
-
-foo f;
-
-// Built with GCC
-// $ mkdir -p /tmp/dbginfo
-// $ cp dwarfdump-line-dwo.cc /tmp/dbginfo
-// $ cd /tmp/dbginfo
-// $ g++ -c -fdebug-types-section dwarfdump-line-dwo.cc -o <output>
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-line-dwo.elf-x86-64 b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-line-dwo.elf-x86-64
deleted file mode 100644
index 9f1d267dde1e0f1e63af002710a37ac2c3aa5b21..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 1377
zcmb`H&ui2`6vtnF=+*|IWyK#9BnOL?HR-l4wN<;W6%|2x5IlHs-AyLj;N}NO)@=`B
zSUjnq(0@Wa2;MyT2Y3+_Pl5+eo)x@!&^O8KW|+;<fyun@XTI;fN!Z!P*KS>xB?-nu
zf+iGdOaa#AB5q}23ud7Lr!iJDJ@c2`{_yFm^JNjGr0)NE|4laUey4k~Dq)LL7%{6N
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zf(>e*+c)*gC*<SU<6PFqz$bS7{qrzg=qurrz#euY#~yg0(RY1f*u%iIEZoe;QCuG3
ze2Viq&T{vS?K}F_T1{`58)jW!t*<odt1BD&64?z&<a)$UI{h=c;Uxo~Z1#wc&_daX
ztewr>^)+Lyp&Pw8?7Io}$K&XRW0UTnXC!+eiH(?8i5vK^oOt1~-R-%)6MzFw5CE9*
zo|kmGxF%7)?u?_XL^~^C;%kAK1Deh2PPZG8hdiMlg4bBE9XL)*l32i*#Lw~{#sbzT
z`<=B|?V8X-^qwv9Q{MW3i6tIlEaqP-Sjt=XnP~A4V=;fbU@33?%*1&fVl3w0D_F`~
zXPNN`4-4;v4hoh|AO<H{{!1QWEcTyArU)J?-!S77VNcAbn)^$bxZmYB99}VU2v@wO
zFvB#xpmb1P*8l#2Y<udwV*lJ#{#2&2bDvUrVtS6UlTglHMrfk|JLD8UC=itY0194~
AO8@`>

diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-dwp.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-dwp.s
deleted file mode 100644
index 8a9c03b77c0d..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-dwp.s
+++ /dev/null
@@ -1,277 +0,0 @@
-# Test object to verify that dwarfdump handles dwp files with DWARF v5 string
-# offset tables. We have 2 CUs and 2 TUs, where it is assumed that 
-# CU1 and TU1 came from one object file, CU2 and TU2 from a second object
-# file.
-#
-# To generate the test object:
-# llvm-mc -triple x86_64-unknown-linux dwarfdump-str-offsets-dwp.s -filetype=obj \
-#         -o dwarfdump-str_offsets-dwp.x86_64.o
-
-        .section .debug_str.dwo,"MS",@progbits,1
-str_producer:
-        .asciz "Handmade DWARF producer"
-str_CU1:
-        .asciz "Compile_Unit_1"
-str_CU1_dir:
-        .asciz "/home/test/CU1"
-str_CU2:
-        .asciz "Compile_Unit_2"
-str_CU2_dir:
-        .asciz "/home/test/CU2"
-str_TU1:
-        .asciz "Type_Unit_1"
-str_TU1_type:
-        .asciz "MyStruct_1"
-str_TU2:
-        .asciz "Type_Unit_2"
-str_TU2_type:
-        .asciz "MyStruct_2"
-
-        .section .debug_str_offsets.dwo,"",@progbits
-# Object files 1's portion of the .debug_str_offsets.dwo section.
-.debug_str_offsets_object_file1:
-
-# CU1's contribution (from object file 1)
-.debug_str_offsets_start_CU1:
-        .long .debug_str_offsets_end_CU1-.debug_str_offsets_base_CU1
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base_CU1:
-        .long str_producer-.debug_str.dwo
-        .long str_CU1-.debug_str.dwo
-        .long str_CU1_dir-.debug_str.dwo
-.debug_str_offsets_end_CU1:
-
-# TU1's contribution (from object file 1)
-.debug_str_offsets_start_TU1:
-        .long .debug_str_offsets_end_TU1-.debug_str_offsets_base_TU1
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base_TU1:
-        .long str_TU1-.debug_str.dwo
-        .long str_TU1_type-.debug_str.dwo
-.debug_str_offsets_end_TU1:
-
-# Object files 2's portion of the .debug_str_offsets.dwo section.
-.debug_str_offsets_object_file2:
-
-# CU2's contribution (from object file 2)
-.debug_str_offsets_start_CU2:
-        .long .debug_str_offsets_end_CU2-.debug_str_offsets_base_CU2
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base_CU2:
-        .long str_producer-.debug_str.dwo
-        .long str_CU2-.debug_str.dwo
-        .long str_CU2_dir-.debug_str.dwo
-.debug_str_offsets_end_CU2:
-
-# TU2's contribution (from object file 2)
-.debug_str_offsets_start_TU2:
-        .long .debug_str_offsets_end_TU2-.debug_str_offsets_base_TU2
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base_TU2:
-        .long str_TU2-.debug_str.dwo
-        .long str_TU2_type-.debug_str.dwo
-.debug_str_offsets_end_TU2:
-
-
-# Abbrevs are shared for all compile and type units
-        .section .debug_abbrev.dwo,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x25  # DW_AT_producer
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x72  # DW_AT_str_offsets_base
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x02  # Abbrev code
-        .byte 0x41  # DW_TAG_type_unit
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x72  # DW_AT_str_offsets_base
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x03  # Abbrev code
-        .byte 0x13  # DW_TAG_structure_type
-        .byte 0x00  # DW_CHILDREN_no (no members)
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-abbrev_end:
-
-        .section .debug_info.dwo,"",@progbits
-
-# DWARF v5 CU header.
-CU1_5_start:
-        .long  CU1_5_end-CU1_5_version  # Length of Unit
-CU1_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev.dwo # Offset Into Abbrev. Section
-# The compile-unit DIE, which has a DW_AT_producer, DW_AT_name,
-# DW_AT_str_offsets and DW_AT_compdir.
-        .byte 1                # Abbreviation code
-        .byte 0                # The index of the producer string
-        .byte 1                # The index of the CU name string
-# The DW_AT_str_offsets_base attribute for CU1 contains the offset of CU1's
-# contribution relative to the start of object file 1's portion of the
-# .debug_str_offsets section.
-        .long .debug_str_offsets_base_CU1-.debug_str_offsets_object_file1
-        .byte 2                # The index of the comp dir string
-        .byte 0 # NULL
-CU1_5_end:
-
-CU2_5_start:
-        .long  CU2_5_end-CU2_5_version  # Length of Unit
-CU2_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev.dwo # Offset Into Abbrev. Section
-# The compile-unit DIE, which has a DW_AT_producer, DW_AT_name,
-# DW_AT_str_offsets and DW_AT_compdir.
-        .byte 1                # Abbreviation code
-        .byte 0                # The index of the producer string
-        .byte 1                # The index of the CU name string
-# The DW_AT_str_offsets_base attribute for CU2 contains the offset of CU2's
-# contribution relative to the start of object file 2's portion of the
-# .debug_str_offsets section.
-        .long .debug_str_offsets_base_CU2-.debug_str_offsets_object_file2
-        .byte 2                # The index of the comp dir string
-        .byte 0 # NULL
-CU2_5_end:
-
-        .section .debug_types.dwo,"",@progbits
-# DWARF v5 Type unit header.
-TU1_5_start:
-        .long  TU1_5_end-TU1_5_version  # Length of Unit
-TU1_5_version:
-        .short 5               # DWARF version number
-        .byte 2                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev.dwo    # Offset Into Abbrev. Section
-        .quad 0x0011223344556677 # Type Signature
-        .long TU1_5_type-TU1_5_start # Type offset
-# The type-unit DIE, which has a name.
-        .byte 2                # Abbreviation code
-        .byte 0                # Index of the unit type name string
-# The DW_AT_str_offsets_base attribute for TU1 contains the offset of TU1's
-# contribution relative to the start of object file 1's portion of the
-# .debug_str_offsets section.
-        .long .debug_str_offsets_base_TU1-.debug_str_offsets_object_file1
-# The type DIE, which has a name.
-TU1_5_type:
-        .byte 3                # Abbreviation code
-        .byte 1                # Index of the type name string
-        .byte 0 # NULL
-        .byte 0 # NULL
-TU1_5_end:
-
-TU2_5_start:
-        .long  TU2_5_end-TU2_5_version  # Length of Unit
-TU2_5_version:
-        .short 5               # DWARF version number
-        .byte 2                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev.dwo    # Offset Into Abbrev. Section
-        .quad 0x00aabbccddeeff99 # Type Signature
-        .long TU2_5_type-TU2_5_start # Type offset
-# The type-unit DIE, which has a name.
-        .byte 2                # Abbreviation code
-        .byte 0                # Index of the unit type name string
-# The DW_AT_str_offsets_base attribute for TU2 contains the offset of TU2's
-# contribution relative to the start of object file 2's portion of the
-# .debug_str_offsets section.
-        .long .debug_str_offsets_base_TU2-.debug_str_offsets_object_file2
-# The type DIE, which has a name.
-TU2_5_type:
-        .byte 3                # Abbreviation code
-        .byte 1                # Index of the type name string
-        .byte 0 # NULL
-        .byte 0 # NULL
-TU2_5_end:
-
-        .section .debug_cu_index,"",@progbits
-        # The index header
-        .long 2                # Version 
-        .long 3                # Columns of contribution matrix
-        .long 2                # number of units
-        .long 2                # number of hash buckets in table
-
-        # The signatures for both CUs.
-        .quad 0xddeeaaddbbaabbee # signature 1
-        .quad 0xff00ffeeffaaff00 # signature 2
-        # The indexes for both CUs.
-        .long 1                # index 1
-        .long 2                # index 2
-        # The sections to which both CUs contribute.
-        .long 1                # DW_SECT_INFO
-        .long 3                # DW_SECT_ABBREV
-        .long 6                # DW_SECT_STR_OFFSETS
-
-        # The starting offsets of both CU's contributions to info,
-        # abbrev and string offsets table.
-        .long CU1_5_start-.debug_info.dwo                   
-        .long 0
-        .long .debug_str_offsets_object_file1-.debug_str_offsets.dwo
-        .long CU2_5_start-.debug_info.dwo
-        .long 0
-        .long .debug_str_offsets_object_file2-.debug_str_offsets.dwo
-
-        # The lengths of both CU's contributions to info, abbrev and
-        # string offsets table.
-        .long CU1_5_end-CU1_5_start
-        .long abbrev_end-.debug_abbrev.dwo
-        .long .debug_str_offsets_end_CU1-.debug_str_offsets_start_CU1
-        .long CU2_5_end-CU2_5_start
-        .long abbrev_end-.debug_abbrev.dwo
-        .long .debug_str_offsets_end_CU2-.debug_str_offsets_start_CU2
-
-        .section .debug_tu_index,"",@progbits
-        # The index header
-        .long 2                # Version 
-        .long 3                # Columns of contribution matrix
-        .long 2                # number of units
-        .long 2                # number of hash buckets in table
-
-        # The signatures for both TUs.
-        .quad 0xeeaaddbbaabbeedd # signature 1
-        .quad 0x00ffeeffaaff00ff # signature 2
-        # The indexes for both TUs.
-        .long 1                # index 1
-        .long 2                # index 2
-        # The sections to which both TUs contribute.
-        .long 2                # DW_SECT_TYPES
-        .long 3                # DW_SECT_ABBREV
-        .long 6                # DW_SECT_STR_OFFSETS
-
-        # The starting offsets of both TU's contributions to info,
-        # abbrev and string offsets table.
-        .long TU1_5_start-.debug_types.dwo
-        .long 0
-        .long .debug_str_offsets_object_file1-.debug_str_offsets.dwo
-        .long TU2_5_start-.debug_types.dwo
-        .long 0
-        .long .debug_str_offsets_object_file2-.debug_str_offsets.dwo
-
-        # The lengths of both TU's contributions to info, abbrev and
-        # string offsets table.
-        .long TU1_5_end-TU1_5_start
-        .long abbrev_end-.debug_abbrev.dwo
-        .long .debug_str_offsets_end_TU1-.debug_str_offsets_start_TU1
-        .long TU2_5_end-TU2_5_start
-        .long abbrev_end-.debug_abbrev.dwo
-        .long .debug_str_offsets_end_TU2-.debug_str_offsets_start_TU2
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-1.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-1.s
deleted file mode 100644
index 361448af0e87..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-1.s
+++ /dev/null
@@ -1,34 +0,0 @@
-# Test object to verify that llvm-dwarfdump handles an invalid string offsets
-# table.
-#
-# To generate the test object:
-# llvm-mc -triple x86_64-unknown-linux dwarfdump-str-offsets-invalid-1.s -filetype=obj \
-#         -o dwarfdump-str-offsets-invalid-1.x86_64.o
-#
-# A rudimentary abbrev section.
-        .section .debug_abbrev,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-
-# A rudimentary compile unit to convince dwarfdump that we are dealing with a 
-# DWARF v5 string offsets table.
-        .section .debug_info,"",@progbits
-
-# DWARF v5 CU header.
-        .long  CU1_5_end-CU1_5_version  # Length of Unit
-CU1_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-# A compile-unit DIE, which has no attributes.
-        .byte 1                # Abbreviation code
-CU1_5_end:
-
-        .section .debug_str_offsets,"",@progbits
-# A degenerate section, not enough for a single contribution size.
-        .byte 2
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-2.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-2.s
deleted file mode 100644
index 2f0fdfce2438..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-2.s
+++ /dev/null
@@ -1,36 +0,0 @@
-# Test object to verify that llvm-dwarfdump handles an invalid string offsets
-# table.
-#
-# To generate the test object:
-# llvm-mc -triple x86_64-unknown-linux dwarfdump-str-offsets-invalid-2.s -filetype=obj \
-#         -o dwarfdump-str-offsets-invalid-2.x86_64.o
-
-# A rudimentary abbrev section.
-        .section .debug_abbrev,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-
-# A rudimentary compile unit to convince dwarfdump that we are dealing with a
-# DWARF v5 string offsets table.
-        .section .debug_info,"",@progbits
-
-# DWARF v5 CU header.
-        .long  CU1_5_end-CU1_5_version  # Length of Unit
-CU1_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-# A compile-unit DIE, which has no attributes.
-        .byte 1                # Abbreviation code
-CU1_5_end:
-
-        .section .debug_str_offsets,"",@progbits
-# A degenerate section with fewer bytes than required for a DWARF64 size.
-        .long 0xffffffff
-        .long 0
-        .short 4
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-3.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-3.s
deleted file mode 100644
index b4355fe27f75..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-3.s
+++ /dev/null
@@ -1,88 +0,0 @@
-# Test object to verify that llvm-dwarfdump handles an invalid string offsets
-# table.
-#
-# To generate the test object:
-# llvm-mc -triple x86_64-unknown-linux dwarfdump-str-offsets-invalid-3.s -filetype=obj \
-#         -o dwarfdump-str-offsets-invalid-3.x86_64.o
-
-        .section .debug_str,"MS",@progbits,1
-str_producer:
-        .asciz "Handmade DWARF producer"
-str_CU1:
-        .asciz "Compile_Unit_1"
-str_CU1_dir:
-        .asciz "/home/test/CU1"
-str_CU2:
-        .asciz "Compile_Unit_2"
-str_CU2_dir:
-        .asciz "/home/test/CU2"
-str_TU:
-        .asciz "Type_Unit"
-str_TU_type:
-        .asciz "MyStruct"
-
-        .section .debug_str.dwo,"MS",@progbits,1
-dwo_str_CU_5_producer:
-        .asciz "Handmade split DWARF producer"
-dwo_str_CU_5_name:
-        .asciz "V5_split_compile_unit"
-dwo_str_CU_5_comp_dir:
-        .asciz "/home/test/splitCU"
-dwo_str_TU_5:
-        .asciz "V5_split_type_unit"
-dwo_str_TU_5_type:
-        .asciz "V5_split_Mystruct"
-
-# A rudimentary abbrev section.
-        .section .debug_abbrev,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-
-# A rudimentary compile unit to convince dwarfdump that we are dealing with a
-# DWARF v5 string offsets table.
-        .section .debug_info,"",@progbits
-
-# DWARF v5 CU header.
-        .long  CU1_5_end-CU1_5_version  # Length of Unit
-CU1_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-# A compile-unit DIE, which has no attributes.
-        .byte 1                # Abbreviation code
-CU1_5_end:
-
-        .section .debug_str_offsets,"",@progbits
-# CU1's contribution
-# Invalid length
-        .long 0xfffffffe
-        .long .debug_str_offsets_segment0_end-.debug_str_offsets_base0
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base0:
-        .long str_producer
-        .long str_CU1
-        .long str_CU1_dir
-.debug_str_offsets_segment0_end:
-# CU2's contribution
-        .long .debug_str_offsets_segment1_end-.debug_str_offsets_base1
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base1:
-        .long str_producer
-        .long str_CU2
-        .long str_CU2_dir
-.debug_str_offsets_segment1_end:
-# The TU's contribution
-        .long .debug_str_offsets_segment2_end-.debug_str_offsets_base2
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base2:
-        .long str_TU
-        .long str_TU_type
-.debug_str_offsets_segment2_end:
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-4.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-4.s
deleted file mode 100644
index 8ec288151eca..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-4.s
+++ /dev/null
@@ -1,50 +0,0 @@
-# Test object to verify that llvm-dwarfdump handles an invalid string offsets
-# table.
-#
-# To generate the test object:
-# llvm-mc -triple x86_64-unknown-linux dwarfdump-str-offsets-invalid-4.s -filetype=obj \
-#         -o dwarfdump-str-offsets-invalid-4.x86_64.o
-
-        .section .debug_str,"MS",@progbits,1
-str_producer:
-        .asciz "Handmade DWARF producer"
-str_CU1:
-        .asciz "Compile_Unit_1"
-
-# A rudimentary abbrev section.
-        .section .debug_abbrev,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-
-# A rudimentary compile unit to convince dwarfdump that we are dealing with a
-# DWARF v5 string offsets table.
-        .section .debug_info,"",@progbits
-
-# DWARF v5 CU header.
-        .long  CU1_5_end-CU1_5_version  # Length of Unit
-CU1_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-# A compile-unit DIE, which has no attributes.
-        .byte 1                # Abbreviation code
-CU1_5_end:
-
-# Every unit contributes to the string_offsets table.
-        .section .debug_str_offsets,"",@progbits
-# CU1's contribution
-# The length is not a multiple of 4. Check that we don't read off the
-# end.
-        .long .debug_str_offsets_segment0_end-.debug_str_offsets_base0
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base0:
-        .long str_producer
-        .long str_CU1
-        .byte 0
-.debug_str_offsets_segment0_end:
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-5.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-5.s
deleted file mode 100644
index e185e407b630..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-invalid-5.s
+++ /dev/null
@@ -1,10 +0,0 @@
-# Test object to verify that llvm-dwarfdump handles a degenerate string offsets
-# section.
-#
-# To generate the test object:
-# llvm-mc -triple x86_64-unknown-linux dwarfdump-str-offsets-invalid-5.s -filetype=obj \
-#         -o dwarfdump-str-offsets-invalid-5.x86_64.o
-# Every unit contributes to the string_offsets table.
-        .section .debug_str_offsets,"",@progbits
-# A degenerate section, not enough for a single entry.
-        .byte 2
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-macho.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-macho.s
deleted file mode 100644
index 9ee9ad234d84..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets-macho.s
+++ /dev/null
@@ -1,201 +0,0 @@
-# Test object to verify dwarfdump handles v5 string offset tables in Mach-O.
-# This is similar to dwarfdump-str-offsets.s with 2 CUs and 1 TU, but no
-# split sections.
-#
-# To generate the test object:
-# llvm-mc -triple i386-apple-darwin9 dwarfdump-str-offsets-macho.s -filetype=obj \
-#         -o dwarfdump-str-offsets-macho.o
-
-	.section	__DWARF,__debug_str,regular,debug
-Linfo_string:
-	.asciz "Handmade DWARF producer"
-str_CU1:
-        .asciz "Compile_Unit_1"
-str_CU1_dir:
-        .asciz "/home/test/CU1"
-str_CU2:
-        .asciz "Compile_Unit_2"
-str_CU2_dir:
-        .asciz "/home/test/CU2"
-str_TU:
-        .asciz "Type_Unit"
-str_TU_type:
-        .asciz "MyStruct"
-str_Subprogram:
-        .asciz "MyFunc"
-str_Variable1:
-        .asciz "MyVar1"
-str_Variable2:
-        .asciz "MyVar2"
-str_Variable3:
-        .asciz "MyVar3"
-
-	.section	__DWARF,__debug_str_offs,regular,debug
-Ldebug_str_offsets:
-        .long Ldebug_str_offsets_segment0_end-Ldebug_str_offsets_base0
-        .short 5    # DWARF version
-        .short 0    # Padding
-Ldebug_str_offsets_base0:
-        .long str_producer
-        .long str_CU1
-        .long str_CU1_dir
-        .long str_Subprogram
-        .long str_Variable1
-        .long str_Variable2
-        .long str_Variable3
-Ldebug_str_offsets_segment0_end:
-# CU2's contribution
-        .long Ldebug_str_offsets_segment1_end-Ldebug_str_offsets_base1
-        .short 5    # DWARF version
-        .short 0    # Padding
-Ldebug_str_offsets_base1:
-        .long str_producer
-        .long str_CU2
-        .long str_CU2_dir
-Ldebug_str_offsets_segment1_end:
-# The TU's contribution
-        .long Ldebug_str_offsets_segment2_end-Ldebug_str_offsets_base2
-        .short 5    # DWARF version
-        .short 0    # Padding
-Ldebug_str_offsets_base2:
-        .long str_TU
-        .long str_TU_type
-Ldebug_str_offsets_segment2_end:
-
-	.section	__DWARF,__debug_abbrev,regular,debug
-Lsection_abbrev:
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x25  # DW_AT_producer
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x72  # DW_AT_str_offsets_base
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x1b  # DW_AT_comp_dir
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x02  # Abbrev code
-        .byte 0x41  # DW_TAG_type_unit
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x72  # DW_AT_str_offsets_base
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x03  # Abbrev code
-        .byte 0x13  # DW_TAG_structure_type
-        .byte 0x00  # DW_CHILDREN_no (no members)
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x04  # Abbrev code
-        .byte 0x2e  # DW_TAG_subprogram
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x03  # DW_AT_name
-        .byte 0x25  # DW_FORM_strx1
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x05  # Abbrev code
-        .byte 0x34  # DW_TAG_variable
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x03  # DW_AT_name
-        .byte 0x26  # DW_FORM_strx2
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x06  # Abbrev code
-        .byte 0x34  # DW_TAG_variable
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x03  # DW_AT_name
-        .byte 0x27  # DW_FORM_strx3
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x07  # Abbrev code
-        .byte 0x34  # DW_TAG_variable
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x03  # DW_AT_name
-        .byte 0x28  # DW_FORM_strx4
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-
-	.section	__DWARF,__debug_info,regular,debug
-Lsection_info:
-# DWARF v5 CU header.
-        .long  CU1_5_end-CU1_5_version  # Length of Unit
-CU1_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long 0                # Offset Into Abbrev. Section
-# The compile-unit DIE, which has a DW_AT_producer, DW_AT_name,
-# DW_AT_str_offsets and DW_AT_compdir.
-        .byte 1                # Abbreviation code
-        .byte 0                # The index of the producer string
-        .byte 1                # The index of the CU name string
-        .long Ldebug_str_offsets_base0-Ldebug_str_offsets
-        .byte 2                # The index of the comp dir string
-# A subprogram DIE with DW_AT_name, using DW_FORM_strx1.
-        .byte 4                # Abbreviation code
-        .byte 3                # Subprogram name string (DW_FORM_strx1)
-# A variable DIE with DW_AT_name, using DW_FORM_strx2.
-        .byte 5                # Abbreviation code
-        .short 0x0004          # Subprogram name string (DW_FORM_strx2)
-# A variable DIE with DW_AT_name, using DW_FORM_strx3.
-        .byte 6                # Abbreviation code
-        .byte 5                # Subprogram name string (DW_FORM_strx3)
-        .short 0               # Subprogram name string (DW_FORM_strx3)
-# A variable DIE with DW_AT_name, using DW_FORM_strx4.
-        .byte 7                # Abbreviation code
-        .quad 0x00000006       # Subprogram name string (DW_FORM_strx4)
-        .byte 0 # NULL
-        .byte 0 # NULL
-        .byte 0 # NULL
-CU1_5_end:
-
-# DWARF v5 CU header
-        .long  CU2_5_end-CU2_5_version  # Length of Unit
-CU2_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long 0                # Offset Into Abbrev. Section
-# The compile-unit DIE, which has a DW_AT_producer, DW_AT_name,
-# DW_AT_str_offsets and DW_AT_compdir.
-        .byte 1                # Abbreviation code
-        .byte 0                # The index of the producer string
-        .byte 1                # The index of the CU name string
-        .long Ldebug_str_offsets_base1-Ldebug_str_offsets
-        .byte 2                # The index of the comp dir string
-        .byte 0 # NULL
-CU2_5_end:
-
-	.section	__DWARF,__debug_types,regular,debug
-# DWARF v5 Type unit header.
-TU_5_start:
-        .long  TU_5_end-TU_5_version  # Length of Unit
-TU_5_version:
-        .short 5               # DWARF version number
-        .byte 2                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long 0                # Offset Into Abbrev. Section
-        .quad 0x0011223344556677 # Type Signature
-        .long TU_5_type-TU_5_start # Type offset
-# The type-unit DIE, which has a name.
-        .byte 2                # Abbreviation code
-        .byte 0                # Index of the unit type name string
-        .long Ldebug_str_offsets_base2-Ldebug_str_offsets  # offset into the str_offsets section
-# The type DIE, which has a name.
-TU_5_type:
-        .byte 3                # Abbreviation code
-        .byte 1                # Index of the type name string
-        .byte 0 # NULL
-        .byte 0 # NULL
-TU_5_end:
-
-
-.subsections_via_symbols
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets.s b/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets.s
deleted file mode 100644
index 9ae59ec609c7..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/Inputs/dwarfdump-str-offsets.s
+++ /dev/null
@@ -1,305 +0,0 @@
-# Test object to verify dwarfdump handles v5 string offset tables.
-# We have 2 v5 CUs, a v5 TU, and a split v5 CU and TU.
-#
-# To generate the test object:
-# llvm-mc -triple x86_64-unknown-linux dwarfdump-str-offsets.s -filetype=obj \
-#         -o dwarfdump-str-offsets.x86_64.o
-
-        .section .debug_str,"MS",@progbits,1
-str_producer:
-        .asciz "Handmade DWARF producer"
-str_CU1:
-        .asciz "Compile_Unit_1"
-str_CU1_dir:
-        .asciz "/home/test/CU1"
-str_CU2:
-        .asciz "Compile_Unit_2"
-str_CU2_dir:
-        .asciz "/home/test/CU2"
-str_TU:
-        .asciz "Type_Unit"
-str_TU_type:
-        .asciz "MyStruct"
-str_Subprogram:
-        .asciz "MyFunc"
-str_Variable1:
-        .asciz "MyVar1"
-str_Variable2:
-        .asciz "MyVar2"
-str_Variable3:
-        .asciz "MyVar3"
-
-# Every unit contributes to the string_offsets table.
-        .section .debug_str_offsets,"",@progbits
-# CU1's contribution
-        .long .debug_str_offsets_segment0_end-.debug_str_offsets_base0
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base0:
-        .long str_producer
-        .long str_CU1
-        .long str_CU1_dir
-        .long str_Subprogram
-        .long str_Variable1
-        .long str_Variable2
-        .long str_Variable3
-.debug_str_offsets_segment0_end:
-# CU2's contribution
-        .long .debug_str_offsets_segment1_end-.debug_str_offsets_base1
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base1:
-        .long str_producer
-        .long str_CU2
-        .long str_CU2_dir
-.debug_str_offsets_segment1_end:
-# The TU's contribution
-        .long .debug_str_offsets_segment2_end-.debug_str_offsets_base2
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_str_offsets_base2:
-        .long str_TU
-        .long str_TU_type
-.debug_str_offsets_segment2_end:
-
-        .section .debug_str.dwo,"MS",@progbits,1
-dwo_str_CU_5_producer:
-        .asciz "Handmade split DWARF producer"
-dwo_str_CU_5_name:
-        .asciz "V5_split_compile_unit"
-dwo_str_CU_5_comp_dir:
-        .asciz "/home/test/splitCU"
-dwo_str_TU_5:
-        .asciz "V5_split_type_unit"
-dwo_str_TU_5_type:
-        .asciz "V5_split_Mystruct"
-
-        .section .debug_str_offsets.dwo,"",@progbits
-# The split CU's contribution
-        .long .debug_dwo_str_offsets_segment0_end-.debug_dwo_str_offsets_base0
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_dwo_str_offsets_base0:
-        .long dwo_str_CU_5_producer-.debug_str.dwo
-        .long dwo_str_CU_5_name-.debug_str.dwo
-        .long dwo_str_CU_5_comp_dir-.debug_str.dwo
-.debug_dwo_str_offsets_segment0_end:
-# The split TU's contribution
-        .long .debug_dwo_str_offsets_segment1_end-.debug_dwo_str_offsets_base1
-        .short 5    # DWARF version
-        .short 0    # Padding
-.debug_dwo_str_offsets_base1:
-        .long dwo_str_TU_5-.debug_str.dwo
-        .long dwo_str_TU_5_type-.debug_str.dwo
-.debug_dwo_str_offsets_segment1_end:
-
-# All CUs/TUs use the same abbrev section for simplicity.
-        .section .debug_abbrev,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x25  # DW_AT_producer
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x72  # DW_AT_str_offsets_base
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x1b  # DW_AT_comp_dir
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x02  # Abbrev code
-        .byte 0x41  # DW_TAG_type_unit
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x72  # DW_AT_str_offsets_base
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x03  # Abbrev code
-        .byte 0x13  # DW_TAG_structure_type
-        .byte 0x00  # DW_CHILDREN_no (no members)
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x04  # Abbrev code
-        .byte 0x2e  # DW_TAG_subprogram
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x03  # DW_AT_name
-        .byte 0x25  # DW_FORM_strx1
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x05  # Abbrev code
-        .byte 0x34  # DW_TAG_variable
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x03  # DW_AT_name
-        .byte 0x26  # DW_FORM_strx2
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x06  # Abbrev code
-        .byte 0x34  # DW_TAG_variable
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x03  # DW_AT_name
-        .byte 0x27  # DW_FORM_strx3
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x07  # Abbrev code
-        .byte 0x34  # DW_TAG_variable
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x03  # DW_AT_name
-        .byte 0x28  # DW_FORM_strx4
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-
-# And a .dwo copy of a subset for the .dwo sections.
-        .section .debug_abbrev.dwo,"",@progbits
-        .byte 0x01  # Abbrev code
-        .byte 0x11  # DW_TAG_compile_unit
-        .byte 0x00  # DW_CHILDREN_no
-        .byte 0x25  # DW_AT_producer
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x72  # DW_AT_str_offsets_base
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x1b  # DW_AT_comp_dir
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x02  # Abbrev code
-        .byte 0x41  # DW_TAG_type_unit
-        .byte 0x01  # DW_CHILDREN_yes
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x72  # DW_AT_str_offsets_base
-        .byte 0x17  # DW_FORM_sec_offset
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x03  # Abbrev code
-        .byte 0x13  # DW_TAG_structure_type
-        .byte 0x00  # DW_CHILDREN_no (no members)
-        .byte 0x03  # DW_AT_name
-        .byte 0x1a  # DW_FORM_strx
-        .byte 0x00  # EOM(1)
-        .byte 0x00  # EOM(2)
-        .byte 0x00  # EOM(3)
-        
-        .section .debug_info,"",@progbits
-
-# DWARF v5 CU header.
-        .long  CU1_5_end-CU1_5_version  # Length of Unit
-CU1_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-# The compile-unit DIE, which has a DW_AT_producer, DW_AT_name, 
-# DW_AT_str_offsets and DW_AT_compdir.
-        .byte 1                # Abbreviation code
-        .byte 0                # The index of the producer string
-        .byte 1                # The index of the CU name string
-        .long .debug_str_offsets_base0
-        .byte 2                # The index of the comp dir string
-# A subprogram DIE with DW_AT_name, using DW_FORM_strx1.
-        .byte 4                # Abbreviation code
-        .byte 3                # Subprogram name string (DW_FORM_strx1)
-# A variable DIE with DW_AT_name, using DW_FORM_strx2.
-        .byte 5                # Abbreviation code
-        .short 0x0004          # Subprogram name string (DW_FORM_strx2)
-# A variable DIE with DW_AT_name, using DW_FORM_strx3.
-        .byte 6                # Abbreviation code
-        .byte 5                # Subprogram name string (DW_FORM_strx3)
-        .short 0               # Subprogram name string (DW_FORM_strx3)
-# A variable DIE with DW_AT_name, using DW_FORM_strx4.
-        .byte 7                # Abbreviation code
-        .quad 0x00000006       # Subprogram name string (DW_FORM_strx4)
-        .byte 0 # NULL
-        .byte 0 # NULL
-        .byte 0 # NULL
-CU1_5_end:
-
-# DWARF v5 CU header
-        .long  CU2_5_end-CU2_5_version  # Length of Unit
-CU2_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-# The compile-unit DIE, which has a DW_AT_producer, DW_AT_name, 
-# DW_AT_str_offsets and DW_AT_compdir.
-        .byte 1                # Abbreviation code
-        .byte 0                # The index of the producer string
-        .byte 1                # The index of the CU name string
-        .long .debug_str_offsets_base1
-        .byte 2                # The index of the comp dir string
-        .byte 0 # NULL
-CU2_5_end:
-
-        .section .debug_types,"",@progbits
-# DWARF v5 Type unit header.
-TU_5_start:
-        .long  TU_5_end-TU_5_version  # Length of Unit
-TU_5_version:
-        .short 5               # DWARF version number
-        .byte 2                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev    # Offset Into Abbrev. Section
-        .quad 0x0011223344556677 # Type Signature
-        .long TU_5_type-TU_5_start # Type offset
-# The type-unit DIE, which has a name.
-        .byte 2                # Abbreviation code
-        .byte 0                # Index of the unit type name string
-        .long .debug_str_offsets_base2  # offset into the str_offsets section
-# The type DIE, which has a name.
-TU_5_type:
-        .byte 3                # Abbreviation code
-        .byte 1                # Index of the type name string
-        .byte 0 # NULL
-        .byte 0 # NULL
-TU_5_end:
-        
-        .section .debug_info.dwo,"",@progbits
-
-# DWARF v5 split CU header.
-        .long  CU_split_5_end-CU_split_5_version  # Length of Unit
-CU_split_5_version:
-        .short 5               # DWARF version number
-        .byte 1                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev.dwo  # Offset Into Abbrev Section
-# The compile-unit DIE, which has a DW_AT_producer, DW_AT_name, 
-# DW_AT_str_offsets and DW_AT_compdir.
-        .byte 1                # Abbreviation code
-        .byte 0                # The index of the producer string
-        .byte 1                # The index of the CU name string
-        .long .debug_dwo_str_offsets_base0-.debug_str_offsets.dwo
-        .byte 2                # The index of the comp dir string
-        .byte 0 # NULL
-CU_split_5_end:
-        
-        .section .debug_types.dwo,"",@progbits
-
-# DWARF v5 split type unit header.
-TU_split_5_start:
-        .long  TU_split_5_end-TU_split_5_version  # Length of Unit
-TU_split_5_version:
-        .short 5               # DWARF version number
-        .byte 6                # DWARF Unit Type
-        .byte 8                # Address Size (in bytes)
-        .long .debug_abbrev.dwo  # Offset Into Abbrev Section
-        .quad 0x8899aabbccddeeff # Type Signature
-        .long TU_split_5_type-TU_split_5_start  # Type offset
-# The type-unit DIE, which has a name.
-        .byte 2                # Abbreviation code
-        .byte 0                # The index of the type unit name string
-        .long .debug_dwo_str_offsets_base1-.debug_str_offsets.dwo 
-# The type DIE, which has a name.
-TU_split_5_type:
-        .byte 3                # Abbreviation code
-        .byte 1                # The index of the type name string
-        .byte 0 # NULL
-        .byte 0 # NULL
-TU_split_5_end:
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-debug-loc-simple.test b/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-debug-loc-simple.test
deleted file mode 100644
index 77dfa2558c0a..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-debug-loc-simple.test
+++ /dev/null
@@ -1,26 +0,0 @@
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test-loc-list-32bit.elf.o | FileCheck %s
-Note: the input file was generated from Inputs/dwarfdump-test-loc-list-32bit.elf.cpp
-
-CHECK: .debug_info
-CHECK: DW_AT_name{{.*}}"f"
-CHECK: DW_AT_location{{.*}}([[F_LOC:0x[0-9a-f]*]])
-CHECK: DW_AT_name{{.*}}"g"
-CHECK: DW_AT_location{{.*}}([[G_LOC:0x[0-9a-f]*]])
-CHECK: .debug_loc contents:
-CHECK-NEXT: [[F_LOC]]: Beginning address offset: 0x0000000000000000
-CHECK-NEXT:               Ending address offset: 0x0000000000000023
-this is actually the wrong location due to PR14763, but that doesn't matter for
-the purposes of testing dwarfdump
-CHECK-NEXT:                Location description: 51
-CHECK-NEXT: {{^$}}
-CHECK-NEXT:            Beginning address offset: 0x0000000000000023
-CHECK-NEXT:               Ending address offset: 0x000000000000005d
-CHECK-NEXT:                Location description: 75 70
-CHECK-NEXT: {{^$}}
-CHECK-NEXT: [[G_LOC]]: Beginning address offset: 0x0000000000000000
-CHECK-NEXT:               Ending address offset: 0x0000000000000020
-CHECK-NEXT:               Location description: 50
-CHECK-NEXT: {{^$}}
-CHECK-NEXT:            Beginning address offset: 0x0000000000000020
-CHECK-NEXT:               Ending address offset: 0x000000000000005d
-CHECK-NEXT:                Location description: 75 74
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-header.test b/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-header.test
deleted file mode 100644
index 222e506dac37..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-header.test
+++ /dev/null
@@ -1,59 +0,0 @@
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-header.elf-x86-64 | FileCheck %s
-
-The input file is hand-coded assembler to generate all the units,
-so we're willing to make exact checks for offsets and such.
-
-CHECK-LABEL: .debug_info contents:
-
-The v4 CU header.
-
-CHECK: 0x00000000: Compile Unit: length = 0x00000015 version = 0x0004 abbr_offset = 0x0000 addr_size = 0x08 (next unit at 0x00000019)
-CHECK: 0x0000000b: DW_TAG_compile_unit
-
-The v5 normal CU header.
-
-CHECK: 0x00000019: Compile Unit: length = 0x00000016 version = 0x0005 unit_type = DW_UT_compile abbr_offset = 0x0000 addr_size = 0x08 (next unit at 0x00000033)
-CHECK: 0x00000025: DW_TAG_compile_unit
-
-CHECK-LABEL: .debug_types contents:
-
-The v4 type unit header.
-
-CHECK: 0x00000000: Type Unit: length = 0x0000001f version = 0x0004 abbr_offset = 0x0000 addr_size = 0x08 name = 'V4_type_unit' type_signature = 0x0011223344556677 type_offset = 0x001c (next unit at 0x00000023)
-CHECK: 0x00000017: DW_TAG_type_unit
-
-FIXME: DWARF v5 wants type units in .debug_info[.dwo] not .debug_types[.dwo].
-CHECK: .debug_types.dwo contents:
-
-CHECK: 0x00000000: Type Unit: length = 0x00000020 version = 0x0005 unit_type = DW_UT_split_type abbr_offset = 0x0000 addr_size = 0x08 name = 'V5_split_type_unit' type_signature = 0x8899aabbccddeeff type_offset = 0x001d (next unit at 0x00000024)
-CHECK: 0x00000018: DW_TAG_type_unit
-
-CHECK-LABEL: .debug_line contents:
-
-The v4 line table header.
-
-CHECK: Line table prologue:
-CHECK: version: 4
-CHECK-NOT: address_size
-CHECK-NOT: seg_select_size
-CHECK: max_ops_per_inst: 1
-CHECK: include_directories[  1] = 'Directory4a'
-CHECK: include_directories[  2] = 'Directory4b'
-CHECK-NOT: include_directories
-CHECK: file_names[  1]    1 0x00000041 0x00000042 File4a{{$}}
-CHECK: file_names[  2]    0 0x00000043 0x00000044 File4b{{$}}
-CHECK-NOT: file_names
-
-The v5 line table header.
-
-CHECK: Line table prologue:
-CHECK: version: 5
-CHECK: address_size: 8
-CHECK: seg_select_size: 0
-CHECK: max_ops_per_inst: 1
-CHECK: include_directories[  1] = 'Directory5a'
-CHECK: include_directories[  2] = 'Directory5b'
-CHECK-NOT: include_directories
-CHECK: file_names[  1]    1 0x00000051 0x00000052 File5a{{$}}
-CHECK: file_names[  2]    2 0x00000053 0x00000054 File5b{{$}}
-CHECK-NOT: file_names
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-line-dwo.test b/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-line-dwo.test
deleted file mode 100644
index 3178a5d29922..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-line-dwo.test
+++ /dev/null
@@ -1,6 +0,0 @@
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-line-dwo.elf-x86-64 | FileCheck %s
-
-CHECK: .debug_line.dwo contents:
-CHECK: version: 4
-CHECK: max_ops_per_inst: 1
-CHECK: file_names[  1]{{.*}}dwarfdump-line-dwo.cc
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets-dwp.test b/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets-dwp.test
deleted file mode 100644
index ceca3225f075..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets-dwp.test
+++ /dev/null
@@ -1,56 +0,0 @@
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-str-offsets-dwp.x86_64.o | FileCheck %s
-
-; Verify that the correct strings from each unit are displayed and that the
-; index for the .debug_str_offsets section has the right values.
-
-; CHECK:      Compile Unit
-; CHECK-NOT:  NULL
-; CHECK:      DW_TAG_compile_unit
-; CHECK-NEXT: DW_AT_producer [DW_FORM_strx] ( indexed (00000000) string = "Handmade DWARF producer")
-; CHECK-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "Compile_Unit_1")
-; CHECK-NEXT: DW_AT_str_offsets_base [DW_FORM_sec_offset] (0x00000008)
-; CHECK-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000002) string = "/home/test/CU1")
-; CHECK-NOT:  NULL
-
-; CHECK:      Compile Unit
-; CHECK-NOT:  NULL
-; CHECK:      DW_TAG_compile_unit
-; CHECK-NEXT: DW_AT_producer [DW_FORM_strx] ( indexed (00000000) string = "Handmade DWARF producer")
-; CHECK-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "Compile_Unit_2")
-; CHECK-NEXT: DW_AT_str_offsets_base [DW_FORM_sec_offset] (0x00000008)
-; CHECK-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000002) string = "/home/test/CU2")
-; 
-; CHECK:      Type Unit
-; CHECK-NOT:  NULL
-; CHECK:      DW_TAG_type_unit
-; CHECK-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000000) string = "Type_Unit_1")
-; CHECK-NEXT: DW_AT_str_offsets_base [DW_FORM_sec_offset] (0x0000001c)
-; CHECK-NOT:  NULL
-; CHECK:      DW_TAG_structure_type
-; CHECK-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "MyStruct_1")
-;
-; CHECK:      Type Unit
-; CHECK-NOT:  NULL
-; CHECK:      DW_TAG_type_unit
-; CHECK-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000000) string = "Type_Unit_2")
-; CHECK-NEXT: DW_AT_str_offsets_base [DW_FORM_sec_offset] (0x0000001c)
-; CHECK-NOT:  NULL
-; CHECK:      DW_TAG_structure_type
-; CHECK-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "MyStruct_2")
-
-; Verify the correct offets of the compile and type units contributions in the
-; index tables.
-
-; CHECK:      .debug_cu_index contents:
-; CHECK-NOT:  contents:
-; CHECK:      1 0xddeeaaddbbaabbee [{{0x[0-9a-f]*, 0x[0-9a-f]*}}) [{{0x[0-9a-f]*, 0x[0-9a-f]*}})
-; CHECK-SAME: [0x00000000
-; CHECK-NEXT: 2 0xff00ffeeffaaff00 [{{0x[0-9a-f]*, 0x[0-9a-f]*}}) [{{0x[0-9a-f]*, 0x[0-9a-f]*}})
-; CHECK-SAME: [0x00000024
-
-; CHECK:      .debug_tu_index contents:
-; CHECK-NOT:  contents:
-; CHECK:      1 0xeeaaddbbaabbeedd [{{0x[0-9a-f]*, 0x[0-9a-f]*}}) [{{0x[0-9a-f]*, 0x[0-9a-f]*}})
-; CHECK-SAME: [0x00000000
-; CHECK-NEXT: 2 0x00ffeeffaaff00ff [{{0x[0-9a-f]*, 0x[0-9a-f]*}}) [{{0x[0-9a-f]*, 0x[0-9a-f]*}})
-; CHECK:      [0x00000024
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets-invalid.test b/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets-invalid.test
deleted file mode 100644
index 45916d28de0b..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets-invalid.test
+++ /dev/null
@@ -1,24 +0,0 @@
-; Verify that llvm-dwarfdump handles invalid string offset tables.
-
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-str-offsets-invalid-1.x86_64.o | \
-RUN:   FileCheck --check-prefix=INVALIDCONTRIB %s
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-str-offsets-invalid-2.x86_64.o | \
-RUN:   FileCheck --check-prefix=INVALIDCONTRIB %s
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-str-offsets-invalid-3.x86_64.o | \
-RUN:   FileCheck --check-prefix=INVALIDCONTRIB %s
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-str-offsets-invalid-4.x86_64.o | \
-RUN:   FileCheck --check-prefix=INVALIDLENGTH %s
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-str-offsets-invalid-5.x86_64.o | \
-RUN:   FileCheck --check-prefix=INVALIDSECTIONLENGTH %s
-
-INVALIDCONTRIB:            .debug_str_offsets contents:
-INVALIDCONTRIB-NOT:        contents:
-INVALIDCONTRIB:            error: invalid contribution to string offsets table in section .debug_str_offsets.
-
-INVALIDLENGTH:             .debug_str_offsets contents:
-INVALIDLENGTH-NOT:         contents:
-INVALIDLENGTH:             error: contribution to string offsets table in section .debug_str_offsets has invalid length.
-
-INVALIDSECTIONLENGTH:      .debug_str_offsets contents:
-INVALIDSECTIONLENGTH-NOT:  contents:
-INVALIDSECTIONLENGTH:      error: size of .debug_str_offsets is not a multiple of 4.
diff --git a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets.test b/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets.test
deleted file mode 100644
index c09135580fe6..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DebugInfo/dwarfdump-str-offsets.test
+++ /dev/null
@@ -1,94 +0,0 @@
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-str-offsets.x86_64.o | FileCheck --check-prefix=COMMON \
-RUN:   --check-prefix=SPLIT %s
-RUN: llvm-dwarfdump %p/Inputs/dwarfdump-str-offsets-macho.o | FileCheck --check-prefix=COMMON %s
-
-; We are using a hand-constructed object file and are interest in the correct
-; diplay of the DW_str_offsetsbase attribute, the correct display of strings
-; and the dump of the .debug_str_offsets[.dwo] table.
-;
-; Abbreviation for DW_AT_str_offsets_base
-COMMON:      .debug_abbrev contents:
-COMMON-NOT:  contents:
-COMMON:      DW_TAG_compile_unit
-COMMON-NOT:  DW_TAG
-COMMON:      DW_AT_str_offsets_base DW_FORM_sec_offset
-
-; Verify that strings are displayed correctly as indexed strings
-COMMON:      .debug_info contents:
-COMMON-NOT:  contents:     
-COMMON:      DW_TAG_compile_unit
-COMMON-NEXT: DW_AT_producer [DW_FORM_strx] ( indexed (00000000) string = "Handmade DWARF producer")
-COMMON-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "Compile_Unit_1")
-COMMON-NEXT: DW_AT_str_offsets_base [DW_FORM_sec_offset] (0x00000008)
-COMMON-NEXT: DW_AT_comp_dir [DW_FORM_strx] ( indexed (00000002) string = "/home/test/CU1")
-COMMON-NOT:  NULL
-COMMON:      DW_TAG_subprogram
-COMMON-NEXT: DW_AT_name [DW_FORM_strx1] ( indexed (00000003) string = "MyFunc")
-COMMON-NOT:  NULL
-COMMON:      DW_TAG_variable
-COMMON-NEXT: DW_AT_name [DW_FORM_strx2] ( indexed (00000004) string = "MyVar1")
-COMMON-NOT:  NULL
-COMMON:      DW_TAG_variable
-COMMON-NEXT: DW_AT_name [DW_FORM_strx3] ( indexed (00000005) string = "MyVar2")
-COMMON-NOT:  NULL
-COMMON:      DW_TAG_variable
-COMMON-NEXT: DW_AT_name [DW_FORM_strx4] ( indexed (00000006) string = "MyVar3")
-
-; Second compile unit (b.cpp)
-COMMON:      DW_TAG_compile_unit
-COMMON-NEXT: DW_AT_producer [DW_FORM_strx] ( indexed (00000000) string = "Handmade DWARF producer")
-COMMON-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "Compile_Unit_2")
-COMMON-NEXT: DW_AT_str_offsets_base [DW_FORM_sec_offset] (0x0000002c)
-COMMON-NEXT: DW_AT_comp_dir [DW_FORM_strx] ( indexed (00000002) string = "/home/test/CU2")
-
-; The split CU
-SPLIT:       .debug_info.dwo contents:
-SPLIT-NOT:   contents:
-SPLIT:       DW_TAG_compile_unit
-SPLIT-NEXT:  DW_AT_producer [DW_FORM_strx] ( indexed (00000000) string = "Handmade split DWARF producer")
-SPLIT-NEXT:  DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "V5_split_compile_unit")
-SPLIT-NEXT:  DW_AT_str_offsets_base [DW_FORM_sec_offset] (0x00000008)
-SPLIT-NEXT:  DW_AT_comp_dir [DW_FORM_strx] ( indexed (00000002) string = "/home/test/splitCU")
-
-; The type unit
-COMMON:      .debug_types contents:
-COMMON:      DW_TAG_type_unit
-COMMON-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000000) string = "Type_Unit")
-COMMON-NEXT: DW_AT_str_offsets_base [DW_FORM_sec_offset]       (0x00000040)
-COMMON:      DW_TAG_structure_type
-COMMON-NEXT: DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "MyStruct")
-
-; The split type unit
-SPLIT:       .debug_types.dwo contents:
-SPLIT:       DW_TAG_type_unit
-SPLIT-NEXT:  DW_AT_name [DW_FORM_strx] ( indexed (00000000) string = "V5_split_type_unit")
-SPLIT-NEXT:  DW_AT_str_offsets_base [DW_FORM_sec_offset]       (0x0000001c)
-SPLIT:       DW_TAG_structure_type
-SPLIT-NEXT:  DW_AT_name [DW_FORM_strx] ( indexed (00000001) string = "V5_split_Mystruct")
-
-; The .debug_str_offsets section
-COMMON:      .debug_str_offsets contents:
-COMMON-NEXT: 0x00000000: Contribution size = 28, Version = 5
-COMMON-NEXT: 0x00000008: 00000000 "Handmade DWARF producer"
-COMMON-NEXT: 0x0000000c: 00000018 "Compile_Unit_1"
-COMMON-NEXT: 0x00000010: 00000027 "/home/test/CU1"
-COMMON-NEXT: 0x00000014: 00000067 "MyFunc"
-COMMON-NEXT: 0x00000018: 0000006e "MyVar1"
-COMMON-NEXT: 0x0000001c: 00000075 "MyVar2"
-COMMON-NEXT: 0x00000020: 0000007c "MyVar3"
-COMMON-NEXT: 0x00000024: Contribution size = 12, Version = 5
-COMMON-NEXT: 0x0000002c: 00000000 "Handmade DWARF producer"
-COMMON-NEXT: 0x00000030: 00000036 "Compile_Unit_2"
-COMMON-NEXT: 0x00000034: 00000045 "/home/test/CU2"
-COMMON-NEXT: 0x00000038: Contribution size = 8, Version = 5
-COMMON-NEXT: 0x00000040: 00000054 "Type_Unit"
-COMMON-NEXT: 0x00000044: 0000005e "MyStruct"
-
-SPLIT:       .debug_str_offsets.dwo contents:
-SPLIT-NEXT:  0x00000000: Contribution size = 12, Version = 5
-SPLIT-NEXT:  0x00000008: 00000000 "Handmade split DWARF producer"
-SPLIT-NEXT:  0x0000000c: 0000001e "V5_split_compile_unit"
-SPLIT-NEXT:  0x00000010: 00000034 "/home/test/splitCU"
-SPLIT-NEXT:  0x00000014: Contribution size = 8, Version = 5
-SPLIT-NEXT:  0x0000001c: 00000047 "V5_split_type_unit"
-SPLIT-NEXT:  0x00000020: 0000005a "V5_split_Mystruct"
diff --git a/external/bsd/llvm/dist/llvm/test/DllTool/coff-decorated.def b/external/bsd/llvm/dist/llvm/test/DllTool/coff-decorated.def
deleted file mode 100644
index 5a908f388480..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DllTool/coff-decorated.def
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llvm-dlltool -k -m i386 --input-def %s --output-lib %t.a
-; RUN: llvm-readobj %t.a | FileCheck %s
-; RUN: llvm-nm %t.a | FileCheck %s -check-prefix=CHECK-NM
-
-LIBRARY test.dll
-EXPORTS
-CdeclFunction
-StdcallFunction@4
-@FastcallFunction@4
-StdcallAlias@4=StdcallFunction@4
-??_7exception@@6B@
-
-; CHECK: Name type: noprefix
-; CHECK: Symbol: __imp__CdeclFunction
-; CHECK: Symbol: _CdeclFunction
-; CHECK: Name type: undecorate
-; CHECK: Symbol: __imp__StdcallFunction@4
-; CHECK: Symbol: _StdcallFunction@4
-; CHECK: Name type: undecorate
-; CHECK: Symbol: __imp_@FastcallFunction@4
-; CHECK: Symbol: @FastcallFunction@4
-; CHECK: Name type: name
-; CHECK: Symbol: __imp_??_7exception@@6B@
-; CHECK: Symbol: ??_7exception@@6B@
-; CHECK-NM: w _StdcallAlias@4
-; CHECK-NM: U _StdcallFunction@4
diff --git a/external/bsd/llvm/dist/llvm/test/DllTool/coff-exports.def b/external/bsd/llvm/dist/llvm/test/DllTool/coff-exports.def
deleted file mode 100644
index 0226886a523c..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DllTool/coff-exports.def
+++ /dev/null
@@ -1,13 +0,0 @@
-; RUN: llvm-dlltool -m i386:x86-64 --input-def %s --output-lib %t.a
-; RUN: llvm-readobj -coff-exports %t.a | FileCheck %s
-
-LIBRARY test.dll
-EXPORTS
-TestFunction
-
-; CHECK: File: test.dll
-; CHECK: Format: COFF-import-file
-; CHECK: Type: code
-; CHECK: Name type: name
-; CHECK: Symbol: __imp_TestFunction
-; CHECK: Symbol: TestFunction
diff --git a/external/bsd/llvm/dist/llvm/test/DllTool/coff-weak-exports.def b/external/bsd/llvm/dist/llvm/test/DllTool/coff-weak-exports.def
deleted file mode 100644
index b4709e972645..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DllTool/coff-weak-exports.def
+++ /dev/null
@@ -1,11 +0,0 @@
-; RUN: llvm-dlltool -m i386:x86-64 --input-def %s --output-lib %t.a
-; RUN: llvm-nm %t.a | FileCheck %s
-
-LIBRARY test.dll
-EXPORTS
-TestFunction==AltTestFunction
-
-; CHECK:      U AltTestFunction
-; CHECK-NEXT: w TestFunction
-; CHECK:      U __imp_AltTestFunction
-; CHECK-NEXT: w __imp_TestFunction
diff --git a/external/bsd/llvm/dist/llvm/test/DllTool/lit.local.cfg b/external/bsd/llvm/dist/llvm/test/DllTool/lit.local.cfg
deleted file mode 100644
index 482608486d21..000000000000
--- a/external/bsd/llvm/dist/llvm/test/DllTool/lit.local.cfg
+++ /dev/null
@@ -1 +0,0 @@
-config.suffixes = ['.def']
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/Inputs/a.s b/external/bsd/llvm/dist/llvm/test/LibDriver/Inputs/a.s
deleted file mode 100644
index 88258e2797fa..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/Inputs/a.s
+++ /dev/null
@@ -1,2 +0,0 @@
-.globl a
-a:
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/Inputs/b.s b/external/bsd/llvm/dist/llvm/test/LibDriver/Inputs/b.s
deleted file mode 100644
index 4890c9247c74..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/Inputs/b.s
+++ /dev/null
@@ -1,2 +0,0 @@
-.globl b
-b:
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/Inputs/resource.res b/external/bsd/llvm/dist/llvm/test/LibDriver/Inputs/resource.res
deleted file mode 100644
index f1c799fbbb08f4fe197f029008a1c54fd911fbfc..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 108
zcmZQzU|>)H;{X347|28cT0oux5dZ(r2E>eDIRgPs7BB-$urhcsq%!0HVLn0-D+>Sx
CaSE^i

diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/infer-output-path.test b/external/bsd/llvm/dist/llvm/test/LibDriver/infer-output-path.test
deleted file mode 100644
index 7a1bbcbbd18d..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/infer-output-path.test
+++ /dev/null
@@ -1,15 +0,0 @@
-RUN: llvm-mc -triple=x86_64-pc-windows-msvc -filetype=obj -o %T/a.obj %S/Inputs/a.s
-RUN: llvm-mc -triple=x86_64-pc-windows-msvc -filetype=obj -o %T/b.o %S/Inputs/b.s
-RUN: llvm-mc -triple=x86_64-pc-windows-msvc -filetype=obj -o %T/c %S/Inputs/b.s
-
-RUN: rm -f %T/a.lib
-RUN: llvm-lib %T/a.obj
-RUN: test -e %T/a.lib
-
-RUN: rm -f %T/b.lib
-RUN: llvm-lib /libpath:%T b.o
-RUN: test -e %T/b.lib
-
-RUN: rm -f %T/c.lib
-RUN: llvm-lib /libpath:%T c
-RUN: test -e %T/c.lib
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/invalid.test b/external/bsd/llvm/dist/llvm/test/LibDriver/invalid.test
deleted file mode 100644
index 2978177a431e..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/invalid.test
+++ /dev/null
@@ -1,2 +0,0 @@
-RUN: not llvm-lib %S/Inputs/cl-gl.obj 2>&1 | FileCheck %s
-CHECK: not a COFF object, bitcode or resource file
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/libpath.test b/external/bsd/llvm/dist/llvm/test/LibDriver/libpath.test
deleted file mode 100644
index 2cfca2456d94..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/libpath.test
+++ /dev/null
@@ -1,15 +0,0 @@
-RUN: mkdir -p %T/a %T/b
-RUN: llvm-mc -triple=x86_64-pc-windows-msvc -filetype=obj -o %T/a/foo.obj %S/Inputs/a.s
-RUN: llvm-mc -triple=x86_64-pc-windows-msvc -filetype=obj -o %T/b/foo.obj %S/Inputs/b.s
-
-RUN: env "LIB=%T/a;%T/b" llvm-lib /out:%t1.lib foo.obj
-RUN: llvm-nm %t1.lib | FileCheck --check-prefix=A %s
-
-RUN: llvm-lib /out:%t2.lib /libpath:%T/a /libpath:%T/b foo.obj
-RUN: llvm-nm %t2.lib | FileCheck --check-prefix=A %s
-
-RUN: env LIB=%T/a llvm-lib /libpath:%T/b /out:%t3.lib foo.obj
-RUN: llvm-nm %t3.lib | FileCheck --check-prefix=B %s
-
-A: T a
-B: T b
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/lit.local.cfg b/external/bsd/llvm/dist/llvm/test/LibDriver/lit.local.cfg
deleted file mode 100644
index e71f3cc4c41e..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/lit.local.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-if not 'X86' in config.root.targets:
-    config.unsupported = True
-
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/no-inputs.test b/external/bsd/llvm/dist/llvm/test/LibDriver/no-inputs.test
deleted file mode 100644
index 95d6555d58c6..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/no-inputs.test
+++ /dev/null
@@ -1,2 +0,0 @@
-RUN: llvm-lib -out:%t.a
-RUN: test ! -e %t.a
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/resource.test b/external/bsd/llvm/dist/llvm/test/LibDriver/resource.test
deleted file mode 100644
index 6c3dad50b450..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/resource.test
+++ /dev/null
@@ -1,3 +0,0 @@
-RUN: llvm-lib /out:%t %S/Inputs/resource.res
-RUN: llvm-ar t %t | FileCheck %s
-CHECK: resource.res
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/thin.test b/external/bsd/llvm/dist/llvm/test/LibDriver/thin.test
deleted file mode 100644
index c401de41a800..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/thin.test
+++ /dev/null
@@ -1,9 +0,0 @@
-RUN: llvm-mc -triple=x86_64-pc-windows-msvc -filetype=obj -o %t %S/Inputs/a.s
-
-RUN: llvm-lib  -out:%t.a %t
-RUN: FileCheck --check-prefix=FAT %s < %t.a
-FAT: !<arch>
-
-RUN: llvm-lib  -out:%t.thin.a -llvmlibthin %t
-RUN: FileCheck --check-prefix=THIN %s < %t.thin.a
-THIN: !<thin>
diff --git a/external/bsd/llvm/dist/llvm/test/LibDriver/use-paths.test b/external/bsd/llvm/dist/llvm/test/LibDriver/use-paths.test
deleted file mode 100644
index 971c216127e6..000000000000
--- a/external/bsd/llvm/dist/llvm/test/LibDriver/use-paths.test
+++ /dev/null
@@ -1,24 +0,0 @@
-llvm-lib should behave like "link.exe /lib" and use relative paths to describe
-archive members.
-
-First, get in a clean working directory.
-RUN: rm -rf %t && mkdir -p %t && cd %t
-
-Make foo/a.obj and foo/b.obj.
-RUN: mkdir foo
-RUN: llvm-mc -triple=x86_64-pc-windows-msvc -filetype=obj -o foo/a.obj %S/Inputs/a.s
-RUN: llvm-mc -triple=x86_64-pc-windows-msvc -filetype=obj -o foo/b.obj %S/Inputs/b.s
-
-RUN: llvm-lib -out:foo.lib foo/a.obj foo/b.obj
-RUN: llvm-ar t foo.lib | FileCheck %s
-
-FIXME: We should probably use backslashes on Windows to better match MSVC tools.
-CHECK: foo/a.obj
-CHECK: foo/b.obj
-
-Do it again with absolute paths and see that we get something.
-RUN: llvm-lib -out:foo.lib %t/foo/a.obj %t/foo/b.obj
-RUN: llvm-ar t foo.lib | FileCheck %s --check-prefix=ABS
-
-ABS: {{.*}}/foo/a.obj
-ABS: {{.*}}/foo/b.obj
diff --git a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-args.s b/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-args.s
deleted file mode 100644
index 46cf4f506a5c..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-args.s
+++ /dev/null
@@ -1,70 +0,0 @@
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX700 %s
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX800 %s
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX900 %s
-
-// CHECK:  .amdgpu_code_object_metadata
-// CHECK:    Version: [ 1, 0 ]
-// CHECK:    Printf:
-// CHECK:      - '1:1:4:%d\n'
-// CHECK:      - '2:1:8:%g\n'
-// CHECK:    Kernels:
-// CHECK:      - Name:            test_kernel
-// CHECK:        Language:        OpenCL C
-// CHECK:        LanguageVersion: [ 2, 0 ]
-// CHECK:        Args:
-// CHECK:          - Size:          1
-// CHECK:            Align:         1
-// CHECK:            ValueKind:     ByValue
-// CHECK:            ValueType:     I8
-// CHECK:            AccQual:       Default
-// CHECK:            TypeName:      char
-// CHECK:          - Size:          8
-// CHECK:            Align:         8
-// CHECK:            ValueKind:     HiddenGlobalOffsetX
-// CHECK:            ValueType:     I64
-// CHECK:          - Size:          8
-// CHECK:            Align:         8
-// CHECK:            ValueKind:     HiddenGlobalOffsetY
-// CHECK:            ValueType:     I64
-// CHECK:          - Size:          8
-// CHECK:            Align:         8
-// CHECK:            ValueKind:     HiddenGlobalOffsetZ
-// CHECK:            ValueType:     I64
-// CHECK:          - Size:          8
-// CHECK:            Align:         8
-// CHECK:            ValueKind:     HiddenPrintfBuffer
-// CHECK:            ValueType:     I8
-// CHECK:            AddrSpaceQual: Global
-// CHECK:  .end_amdgpu_code_object_metadata
-.amdgpu_code_object_metadata
-  Version: [ 1, 0 ]
-  Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
-  Kernels:
-    - Name:            test_kernel
-      Language:        OpenCL C
-      LanguageVersion: [ 2, 0 ]
-      Args:
-        - Size:          1
-          Align:         1
-          ValueKind:     ByValue
-          ValueType:     I8
-          AccQual:       Default
-          TypeName:      char
-        - Size:          8
-          Align:         8
-          ValueKind:     HiddenGlobalOffsetX
-          ValueType:     I64
-        - Size:          8
-          Align:         8
-          ValueKind:     HiddenGlobalOffsetY
-          ValueType:     I64
-        - Size:          8
-          Align:         8
-          ValueKind:     HiddenGlobalOffsetZ
-          ValueType:     I64
-        - Size:          8
-          Align:         8
-          ValueKind:     HiddenPrintfBuffer
-          ValueType:     I8
-          AddrSpaceQual: Global
-.end_amdgpu_code_object_metadata
diff --git a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-attrs.s b/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-attrs.s
deleted file mode 100644
index 7884b6672e7e..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-attrs.s
+++ /dev/null
@@ -1,30 +0,0 @@
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX700 %s
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX800 %s
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX900 %s
-
-// CHECK:  .amdgpu_code_object_metadata
-// CHECK:    Version: [ 1, 0 ]
-// CHECK:    Printf:
-// CHECK:      - '1:1:4:%d\n'
-// CHECK:      - '2:1:8:%g\n'
-// CHECK:    Kernels:
-// CHECK:      - Name:            test_kernel
-// CHECK:        Language:        OpenCL C
-// CHECK:        LanguageVersion: [ 2, 0 ]
-// CHECK:    Attrs:
-// CHECK:        ReqdWorkGroupSize: [ 1, 2, 4 ]
-// CHECK:        WorkGroupSizeHint: [ 8, 16, 32 ]
-// CHECK:        VecTypeHint:       int
-// CHECK: .end_amdgpu_code_object_metadata
-.amdgpu_code_object_metadata
-  Version: [ 1, 0 ]
-  Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
-  Kernels:
-    - Name:            test_kernel
-      Language:        OpenCL C
-      LanguageVersion: [ 2, 0 ]
-      Attrs:
-        ReqdWorkGroupSize: [ 1, 2, 4 ]
-        WorkGroupSizeHint: [ 8, 16, 32 ]
-        VecTypeHint:       int
-.end_amdgpu_code_object_metadata
diff --git a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-code-props.s b/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-code-props.s
deleted file mode 100644
index da4c8c1028d7..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-code-props.s
+++ /dev/null
@@ -1,24 +0,0 @@
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX700 %s
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX800 %s
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX900 %s
-
-// CHECK:  .amdgpu_code_object_metadata
-// CHECK:    Version: [ 1, 0 ]
-// CHECK:    Kernels:
-// CHECK:      - Name: test_kernel
-// CHECK:        CodeProps:
-// CHECK:          KernargSegmentSize:         24
-// CHECK:          WorkitemPrivateSegmentSize: 16
-// CHECK:          WavefrontNumSGPRs:          6
-// CHECK:          WorkitemNumVGPRs:           12
-.amdgpu_code_object_metadata
-  Version: [ 1, 0 ]
-  Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
-  Kernels:
-    - Name:            test_kernel
-      CodeProps:
-        KernargSegmentSize:         24
-        WorkitemPrivateSegmentSize: 16
-        WavefrontNumSGPRs:          6
-        WorkitemNumVGPRs:           12
-.end_amdgpu_code_object_metadata
diff --git a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-debug-props.s b/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-debug-props.s
deleted file mode 100644
index 4153737bf33a..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-kernel-debug-props.s
+++ /dev/null
@@ -1,26 +0,0 @@
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX700 %s
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX800 %s
-// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX900 %s
-
-// CHECK:  .amdgpu_code_object_metadata
-// CHECK:    Version: [ 1, 0 ]
-// CHECK:    Kernels:
-// CHECK:      - Name: test_kernel
-// CHECK:        DebugProps:
-// CHECK:          DebuggerABIVersion:                [ 1, 0 ]
-// CHECK:          ReservedNumVGPRs:                  4
-// CHECK:          ReservedFirstVGPR:                 11
-// CHECK:          PrivateSegmentBufferSGPR:          0
-// CHECK:          WavefrontPrivateSegmentOffsetSGPR: 11
-.amdgpu_code_object_metadata
-  Version: [ 1, 0 ]
-  Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
-  Kernels:
-    - Name:            test_kernel
-      DebugProps:
-        DebuggerABIVersion:                [ 1, 0 ]
-        ReservedNumVGPRs:                  4
-        ReservedFirstVGPR:                 11
-        PrivateSegmentBufferSGPR:          0
-        WavefrontPrivateSegmentOffsetSGPR: 11
-.end_amdgpu_code_object_metadata
\ No newline at end of file
diff --git a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-unknown-key.s b/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-unknown-key.s
deleted file mode 100644
index 9add19f6e55c..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/AMDGPU/code-object-metadata-unknown-key.s
+++ /dev/null
@@ -1,41 +0,0 @@
-// RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 %s 2>&1 | FileCheck %s
-// RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 %s 2>&1 | FileCheck %s
-// RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 %s 2>&1 | FileCheck %s
-// RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -filetype=obj %s 2>&1 | FileCheck %s
-// RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -filetype=obj %s 2>&1 | FileCheck %s
-// RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=obj %s 2>&1 | FileCheck %s
-
-// CHECK: error: unknown key 'UnknownKey'
-.amdgpu_code_object_metadata
-  UnknownKey: [ 2, 0 ]
-  Version: [ 1, 0 ]
-  Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
-  Kernels:
-    - Name:            test_kernel
-      Language:        OpenCL C
-      LanguageVersion: [ 2, 0 ]
-      Args:
-        - Size:          1
-          Align:         1
-          ValueKind:     ByValue
-          ValueType:     I8
-          AccQual:       Default
-          TypeName:      char
-        - Size:          8
-          Align:         8
-          ValueKind:     HiddenGlobalOffsetX
-          ValueType:     I64
-        - Size:          8
-          Align:         8
-          ValueKind:     HiddenGlobalOffsetY
-          ValueType:     I64
-        - Size:          8
-          Align:         8
-          ValueKind:     HiddenGlobalOffsetZ
-          ValueType:     I64
-        - Size:          8
-          Align:         8
-          ValueKind:     HiddenPrintfBuffer
-          ValueType:     I8
-          AddrSpaceQual: Global
-.end_amdgpu_code_object_metadata
diff --git a/external/bsd/llvm/dist/llvm/test/MC/ARM/vmov-vmvn-byte-replicate.s b/external/bsd/llvm/dist/llvm/test/MC/ARM/vmov-vmvn-byte-replicate.s
deleted file mode 100644
index 5931160afbc5..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/ARM/vmov-vmvn-byte-replicate.s
+++ /dev/null
@@ -1,31 +0,0 @@
-@ PR18921, "vmov" part.
-@ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
-.text
-
-@ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3]
-@ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
-@ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
-@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
-@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
-@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
-
-@ CHECK: vmov.i8 d2, #0x0  @ encoding: [0x10,0x2e,0x80,0xf2]
-@ CHECK: vmov.i8 q2, #0x0  @ encoding: [0x50,0x4e,0x80,0xf2]
-@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
-@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
-@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
-@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
-
-        vmov.i32        d2, #0xffffffff
-        vmov.i32        q2, #0xffffffff
-        vmov.i32        d2, #0xabababab
-        vmov.i32        q2, #0xabababab
-        vmov.i16        q2, #0xabab
-        vmov.i16        q2, #0xabab
-
-        vmvn.i32        d2, #0xffffffff
-        vmvn.i32        q2, #0xffffffff
-        vmvn.i32        d2, #0xabababab
-        vmvn.i32        q2, #0xabababab
-        vmvn.i16        d2, #0xabab
-        vmvn.i16        q2, #0xabab
diff --git a/external/bsd/llvm/dist/llvm/test/MC/COFF/symbol-mangling.ll b/external/bsd/llvm/dist/llvm/test/MC/COFF/symbol-mangling.ll
deleted file mode 100644
index f1b4b4becd0e..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/COFF/symbol-mangling.ll
+++ /dev/null
@@ -1,17 +0,0 @@
-; The purpose of this test is to see if the MC layer properly handles symbol
-; names needing quoting on MS/Windows. This code is generated by clang when
-; using -cxx-abi microsoft.
-
-; RUN: llc -filetype=asm -mtriple i686-pc-win32 %s -o - | FileCheck %s
-
-; CHECK: ?sayhi@A@@QBEXXZ
-
-%struct.A = type {}
-
-define i32 @main() {
-entry:
-  tail call void @"\01?sayhi@A@@QBEXXZ"(%struct.A* null)
-  ret i32 0
-}
-
-declare void @"\01?sayhi@A@@QBEXXZ"(%struct.A*)
diff --git a/external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt b/external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt
deleted file mode 100644
index 337be2fac4f7..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt
+++ /dev/null
@@ -1,324 +0,0 @@
-# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips64r6 -mattr=micromips | FileCheck %s
-
-0x6f 0x83 # CHECK: addiur1sp $7, 4
-0x6f 0x7e # CHECK: addiur2 $6, $7, -1
-0x6f 0x76 # CHECK: addiur2 $6, $7, 12
-0x4c 0xfc # CHECK: addius5 $7, -2
-0x4f 0xff # CHECK: addiusp -1028
-0x4f 0xfd # CHECK: addiusp -1032
-0x4c 0x01 # CHECK: addiusp 1024
-0x4c 0x03 # CHECK: addiusp 1028
-0x4f 0xf9 # CHECK: addiusp -16
-0x44 0x21 # CHECK: and16 $16, $2
-0x2e 0x56 # CHECK: andi16 $4, $5, 8
-0xcc 0x42 # CHECK: bc16 132
-0x8f 0x0a # CHECK: beqzc16 $6, 20
-0xaf 0x0a # CHECK: bnezc16 $6, 20
-0x65 0x88 # CHECK: lw $3, 32($gp)
-0x48 0x66 # CHECK: lw $3, 24($sp)
-0x6a 0x12 # CHECK: lw16 $4, 8($17)
-0x29 0x82 # CHECK: lhu16 $3, 4($16)
-0x09 0x94 # CHECK: lbu16 $3, 4($17)
-0x09 0x9f # CHECK: lbu16 $3, -1($17)
-0x45 0x2b # CHECK: jalr $9
-0x45 0x23 # CHECK: jrc16 $9
-0x44 0xb3 # CHECK: jrcaddiusp 20
-0x84 0x34 # CHECK: movep $5, $6, $2, $3
-0x45 0xf9 # CHECK: or16 $3, $7
-0x60 0x44 0x30 0x08 # CHECK: ll $2, 8($4)
-0x20 0x44 0x50 0x08 # CHECK: lwm32 $16, $17, 8($4)
-0x21 0x3b 0x59 0x84 # CHECK: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, -1660($27)
-0x01 0x26 0x38 0xc0 # CHECK: rotr $9, $6, 7
-0x00 0xc7 0x48 0xd0 # CHECK: rotrv $9, $6, $7
-0x60 0x44 0xb0 0x08 # CHECK: sc $2, 8($4)
-0x20 0x44 0xd0 0x08 # CHECK: swm32 $16, $17, 8($4)
-0x00 0x00 0x8b 0x7c # CHECK: syscall
-0x01 0x8c 0x8b 0x7c # CHECK: syscall 396
-0xf0 0x64 0x00 0x05 # CHECK: daui $3, $4, 5
-0x42 0x23 0x00 0x04 # CHECK: dahi $3, $3, 4
-0x42 0x03 0x00 0x04 # CHECK: dati $3, $3, 4
-0x59 0x26 0x30 0xec # CHECK: dext $9, $6, 3, 7
-0x59 0x26 0x30 0xe4 # CHECK: dextm $9, $6, 3, 39
-0x59 0x26 0x30 0xd4 # CHECK: dextu $9, $6, 35, 7
-0x58 0x43 0x25 0x1c # CHECK: dalign $4, $2, $3, 5
-0x58 0xa4 0x19 0x18 # CHECK: ddiv $3, $4, $5
-0x58 0xa4 0x19 0x58 # CHECK: dmod $3, $4, $5
-0x58 0xa4 0x19 0x98 # CHECK: ddivu $3, $4, $5
-0x58 0xa4 0x19 0xd8 # CHECK: dmodu $3, $4, $5
-0x54 0xa4 0x18 0x30 # CHECK: add.s $f3, $f4, $f5
-0x54 0xc4 0x11 0x30 # CHECK: add.d $f2, $f4, $f6
-0x54 0xa4 0x18 0x70 # CHECK: sub.s $f3, $f4, $f5
-0x54 0xc4 0x11 0x70 # CHECK: sub.d $f2, $f4, $f6
-0x54 0xa4 0x18 0xb0 # CHECK: mul.s $f3, $f4, $f5
-0x54 0xc4 0x11 0xb0 # CHECK: mul.d $f2, $f4, $f6
-0x54 0xa4 0x18 0xf0 # CHECK: div.s $f3, $f4, $f5
-0x54 0xc4 0x11 0xf0 # CHECK: div.d $f2, $f4, $f6
-0x54 0xa4 0x19 0xb8 # CHECK: maddf.s $f3, $f4, $f5
-0x54 0xa4 0x1b 0xb8 # CHECK: maddf.d $f3, $f4, $f5
-0x54 0xa4 0x19 0xf8 # CHECK: msubf.s $f3, $f4, $f5
-0x54 0xa4 0x1b 0xf8 # CHECK: msubf.d $f3, $f4, $f5
-0x54 0xc7 0x00 0x7b # CHECK: mov.s $f6, $f7
-0x54 0x86 0x20 0x7b # CHECK: mov.d $f4, $f6
-0x54 0xc7 0x0b 0x7b # CHECK: neg.s $f6, $f7
-0x54 0x86 0x2b 0x7b # CHECK: neg.d $f4, $f6
-0x54 0x64 0x28 0x0b # CHECK: max.s $f5, $f4, $f3
-0x54 0x64 0x2a 0x0b # CHECK: max.d $f5, $f4, $f3
-0x54 0x64 0x28 0x2b # CHECK: maxa.s $f5, $f4, $f3
-0x54 0x64 0x2a 0x2b # CHECK: maxa.d $f5, $f4, $f3
-0x54 0x64 0x28 0x03 # CHECK: min.s $f5, $f4, $f3
-0x54 0x64 0x2a 0x03 # CHECK: min.d $f5, $f4, $f3
-0x54 0x64 0x28 0x23 # CHECK: mina.s $f5, $f4, $f3
-0x54 0x64 0x2a 0x23 # CHECK: mina.d $f5, $f4, $f3
-0x54 0x83 0x10 0x05 # CHECK: cmp.af.s $f2, $f3, $f4
-0x54 0x83 0x10 0x45 # CHECK: cmp.un.s $f2, $f3, $f4
-0x54 0x83 0x10 0x85 # CHECK: cmp.eq.s $f2, $f3, $f4
-0x54 0x83 0x10 0xc5 # CHECK: cmp.ueq.s $f2, $f3, $f4
-0x54 0x83 0x11 0x05 # CHECK: cmp.lt.s $f2, $f3, $f4
-0x54 0x83 0x11 0x45 # CHECK: cmp.ult.s $f2, $f3, $f4
-0x54 0x83 0x11 0x85 # CHECK: cmp.le.s $f2, $f3, $f4
-0x54 0x83 0x11 0xc5 # CHECK: cmp.ule.s $f2, $f3, $f4
-0x54 0x83 0x12 0x05 # CHECK: cmp.saf.s $f2, $f3, $f4
-0x54 0x83 0x12 0x45 # CHECK: cmp.sun.s $f2, $f3, $f4
-0x54 0x83 0x12 0x85 # CHECK: cmp.seq.s $f2, $f3, $f4
-0x54 0x83 0x12 0xc5 # CHECK: cmp.sueq.s $f2, $f3, $f4
-0x54 0x83 0x13 0x05 # CHECK: cmp.slt.s $f2, $f3, $f4
-0x54 0x83 0x13 0x45 # CHECK: cmp.sult.s $f2, $f3, $f4
-0x54 0x83 0x13 0x85 # CHECK: cmp.sle.s $f2, $f3, $f4
-0x54 0x83 0x13 0xc5 # CHECK: cmp.sule.s $f2, $f3, $f4
-0x54 0x83 0x10 0x15 # CHECK: cmp.af.d $f2, $f3, $f4
-0x54 0x83 0x10 0x55 # CHECK: cmp.un.d $f2, $f3, $f4
-0x54 0x83 0x10 0x95 # CHECK: cmp.eq.d $f2, $f3, $f4
-0x54 0x83 0x10 0xd5 # CHECK: cmp.ueq.d $f2, $f3, $f4
-0x54 0x83 0x11 0x15 # CHECK: cmp.lt.d $f2, $f3, $f4
-0x54 0x83 0x11 0x55 # CHECK: cmp.ult.d $f2, $f3, $f4
-0x54 0x83 0x11 0x95 # CHECK: cmp.le.d $f2, $f3, $f4
-0x54 0x83 0x11 0xd5 # CHECK: cmp.ule.d $f2, $f3, $f4
-0x54 0x83 0x12 0x15 # CHECK: cmp.saf.d $f2, $f3, $f4
-0x54 0x83 0x12 0x55 # CHECK: cmp.sun.d $f2, $f3, $f4
-0x54 0x83 0x12 0x95 # CHECK: cmp.seq.d $f2, $f3, $f4
-0x54 0x83 0x12 0xd5 # CHECK: cmp.sueq.d $f2, $f3, $f4
-0x54 0x83 0x13 0x15 # CHECK: cmp.slt.d $f2, $f3, $f4
-0x54 0x83 0x13 0x55 # CHECK: cmp.sult.d $f2, $f3, $f4
-0x54 0x83 0x13 0x95 # CHECK: cmp.sle.d $f2, $f3, $f4
-0x54 0x83 0x13 0xd5 # CHECK: cmp.sule.d $f2, $f3, $f4
-0x54 0x64 0x01 0x3b # CHECK: cvt.l.s $f3, $f4
-0x54 0x64 0x41 0x3b # CHECK: cvt.l.d $f3, $f4
-0x54 0x64 0x09 0x3b # CHECK: cvt.w.s $f3, $f4
-0x54 0x64 0x49 0x3b # CHECK: cvt.w.d $f3, $f4
-0x54 0x44 0x13 0x7b # CHECK: cvt.d.s $f2, $f4
-0x54 0x44 0x33 0x7b # CHECK: cvt.d.w $f2, $f4
-0x54 0x44 0x53 0x7b # CHECK: cvt.d.l $f2, $f4
-0x54 0x44 0x1b 0x7b # CHECK: cvt.s.d $f2, $f4
-0x54 0x64 0x3b 0x7b # CHECK: cvt.s.w $f3, $f4
-0x54 0x64 0x5b 0x7b # CHECK: cvt.s.l $f3, $f4
-0x54 0x65 0x03 0x7b # CHECK: abs.s $f3, $f5
-0x54 0x44 0x23 0x7b # CHECK: abs.d $f2, $f4
-0x54 0x65 0x03 0x3b # CHECK: floor.l.s $f3, $f5
-0x54 0x44 0x43 0x3b # CHECK: floor.l.d $f2, $f4
-0x54 0x65 0x0b 0x3b # CHECK: floor.w.s $f3, $f5
-0x54 0x44 0x4b 0x3b # CHECK: floor.w.d $f2, $f4
-0x54 0x65 0x13 0x3b # CHECK: ceil.l.s $f3, $f5
-0x54 0x44 0x53 0x3b # CHECK: ceil.l.d $f2, $f4
-0x54 0x65 0x1b 0x3b # CHECK: ceil.w.s $f3, $f5
-0x54 0x44 0x5b 0x3b # CHECK: ceil.w.d $f2, $f4
-0x54 0x65 0x23 0x3b # CHECK: trunc.l.s $f3, $f5
-0x54 0x44 0x63 0x3b # CHECK: trunc.l.d $f2, $f4
-0x54 0x65 0x2b 0x3b # CHECK: trunc.w.s $f3, $f5
-0x54 0x44 0x6b 0x3b # CHECK: trunc.w.d $f2, $f4
-0x54 0x65 0x0a 0x3b # CHECK: sqrt.s $f3, $f5
-0x54 0x44 0x4a 0x3b # CHECK: sqrt.d $f2, $f4
-0x54 0x65 0x02 0x3b # CHECK: rsqrt.s $f3, $f5
-0x54 0x44 0x42 0x3b # CHECK: rsqrt.d $f2, $f4
-0x01 0x28 0x00 0x3c # CHECK: teq $8, $9
-0x00 0xe5 0xf0 0x3c # CHECK: teq $5, $7, 15
-0x01 0x47 0x02 0x3c # CHECK: tge $7, $10
-0x02 0x67 0xf2 0x3c # CHECK: tge $7, $19, 15
-0x03 0x96 0x04 0x3c # CHECK: tgeu $22, $gp
-0x01 0xd4 0xf4 0x3c # CHECK: tgeu $20, $14, 15
-0x01 0xaf 0x08 0x3c # CHECK: tlt $15, $13
-0x02 0x62 0xf8 0x3c # CHECK: tlt $2, $19, 15
-0x02 0x0b 0x0a 0x3c # CHECK: tltu $11, $16
-0x03 0xb0 0xfa 0x3c # CHECK: tltu $16, $sp, 15
-0x02 0x26 0x0c 0x3c # CHECK: tne $6, $17
-0x01 0x07 0xfc 0x3c # CHECK: tne $7, $8, 15
-0x60 0x25 0xa6 0x08 # CHECK: cachee 1, 8($5)
-0x00 0x64 0xf1 0x7c # CHECK: wrpgpr $3, $4
-0x00 0x64 0x7b 0x3c # CHECK: wsbh $3, $4
-0x78 0x58 0x00 0x02 # CHECK: ldpc $2, 16
-0x65 0x88 # CHECK: lw $3, 32($gp)
-0x48 0x66 # CHECK: lw $3, 24($sp)
-0x6a 0x12 # CHECK: lw16 $4, 8($17)
-0x29 0x82 # CHECK: lhu16 $3, 4($16)
-0x09 0x94 # CHECK: lbu16 $3, 4($17)
-0x09 0x9f # CHECK: lbu16 $3, -1($17)
-0x46 0x1B # CHECK: break16 8
-0xed 0xff # CHECK: li16 $3, -1
-0x0c 0x65 # CHECK: move16 $3, $5
-0x46 0x3b # CHECK: sdbbp16 8
-0x04 0x3b # CHECK: subu16 $5, $16, $3
-0x44 0xd8 # CHECK: xor16 $17, $5
-0x45 0x22 # CHECK: lwm16 $16, $17, $ra, 8($sp)
-0x89 0x84 # CHECK: sb16 $3, 4($16)
-0xaa 0x14 # CHECK: sh16 $4, 8($17)
-0xc8 0x9f # CHECK: sw $4, 124($sp)
-0xea 0x11 # CHECK: sw16 $4, 4($17)
-0xe8 0x11 # CHECK: sw16 $zero, 4($17)
-0x45 0x2a # CHECK: swm16 $16, $17, $ra, 8($sp)
-0x54 0x44 0x12 0x3b # CHECK: recip.s $f2, $f4
-0x54 0x44 0x52 0x3b # CHECK: recip.d $f2, $f4
-0x54 0x82 0x00 0x20 # CHECK: rint.s $f2, $f4
-0x54 0x82 0x02 0x20 # CHECK: rint.d $f2, $f4
-0x54 0x44 0x33 0x3b # CHECK: round.l.s $f2, $f4
-0x54 0x44 0x73 0x3b # CHECK: round.l.d $f2, $f4
-0x54 0x44 0x3b 0x3b # CHECK: round.w.s $f2, $f4
-0x54 0x44 0x7b 0x3b # CHECK: round.w.d $f2, $f4
-0x54 0x41 0x08 0xb8 # CHECK: sel.s $f1, $f1, $f2
-0x54 0x82 0x02 0xb8 # CHECK: sel.d $f0, $f2, $f4
-0x54 0x62 0x08 0x38 # CHECK: seleqz.s $f1, $f2, $f3
-0x55 0x04 0x12 0x38 # CHECK: seleqz.d $f2, $f4, $f8
-0x54 0x62 0x08 0x78 # CHECK: selnez.s $f1, $f2, $f3
-0x55 0x04 0x12 0x78 # CHECK: selnez.d $f2, $f4, $f8
-0x54 0x62 0x00 0x60 # CHECK: class.s $f2, $f3
-0x54 0x82 0x02 0x60 # CHECK: class.d $f2, $f4
-0x00 0x00 0xe3 0x7c # CHECK: deret
-0x00 0x00 0x47 0x7c # CHECK: di
-0x00 0x0f 0x47 0x7c # CHECK: di $15
-0x00 0x11 0x19 0x7c # CHECK: dvp $17
-0x00 0x00 0x19 0x7c # CHECK: dvp $zero
-0x00 0x10 0x39 0x7c # CHECK: evp $16
-0x00 0x00 0x39 0x7c # CHECK: evp $zero
-0x00 0x00 0x43 0x7c # CHECK: tlbinv
-0x00 0x00 0x53 0x7c # CHECK: tlbinvf
-0x58 0x82 0x20 0x34 # CHECK: dinsu $4, $2, 32, 5
-0x58 0x82 0x38 0xc4 # CHECK: dinsm $4, $2, 3, 5
-0x58 0x82 0x38 0xcc # CHECK: dins $4, $2, 3, 5
-0x00 0xa9 0x02 0xfc # CHECK: mtc0 $5, $9, 0
-0x00 0xa9 0x02 0xfc # CHECK: mtc0 $5, $9
-0x00 0x22 0x3a 0xfc # CHECK: mtc0 $1, $2, 7
-0x54 0x64 0x28 0x3b # CHECK: mtc1 $3, $f4
-0x00 0xa6 0x5d 0x3c # CHECK: mtc2 $5, $6
-0x00 0xe8 0x02 0xf4 # CHECK: mthc0 $7, $8, 0
-0x00 0xe8 0x02 0xf4 # CHECK: mthc0 $7, $8
-0x01 0x2a 0x0a 0xf4 # CHECK: mthc0 $9, $10, 1
-0x55 0x6c 0x38 0x3b # CHECK: mthc1 $11, $f12
-0x01 0xae 0x9d 0x3c # CHECK: mthc2 $13, $14
-0x59 0xf0 0x02 0xfc # CHECK: dmtc0 $15, $16, 0
-0x59 0xf0 0x02 0xfc # CHECK: dmtc0 $15, $16
-0x5a 0x32 0x2a 0xfc # CHECK: dmtc0 $17, $18, 5
-0x56 0x74 0x2c 0x3b # CHECK: dmtc1 $19, $f20
-0x02 0xb6 0x7d 0x3c # CHECK: dmtc2 $21, $22
-0x5a 0x51 0x00 0xfc # CHECK: dmfc0 $18, $17
-0x59 0x21 0x08 0xfc # CHECK: dmfc0 $9, $1, 1
-0x55 0x24 0x24 0x3b # CHECK: dmfc1 $9, $f4
-0x01 0xd2 0x6d 0x3c # CHECK: dmfc2 $14, $18
-0x58 0xe6 0x49 0x10 # CHECK: dadd $9, $6, $7
-0x5b 0xe1 0x99 0x10 # CHECK: dadd $19, $1, $ra
-0x5f 0x02 0x46 0x9f # CHECK: daddiu $24, $2, 18079
-0x5d 0x26 0xc5 0x67 # CHECK: daddiu $9, $6, -15001
-0x5d 0x29 0xc5 0x67 # CHECK: daddiu $9, $9, -15001
-0x5d 0x23 0x00 0x20 # CHECK: daddiu $9, $3, 32
-0x5f 0x56 0xee 0x16 # CHECK: daddiu $26, $22, -4586
-0x5d 0xeb 0xec 0x5f # CHECK: daddiu $15, $11, -5025
-0x5d 0xce 0x11 0xea # CHECK: daddiu $14, $14, 4586
-0x5e 0x73 0x69 0x3f # CHECK: daddiu $19, $19, 26943
-0x5d 0x7a 0x7c 0xcd # CHECK: daddiu $11, $26, 31949
-0x5f 0xbd 0xff 0xe0 # CHECK: daddiu $sp, $sp, -32
-0x59 0x61 0xd1 0x50 # CHECK: daddu $26, $1, $11
-0x5b 0xe1 0x99 0x50 # CHECK: daddu $19, $1, $ra
-0x58 0xe6 0x49 0x50 # CHECK: daddu $9, $6, $7
-0x58 0x69 0x49 0x50 # CHECK: daddu $9, $9, $3
-0x5d 0x26 0xc5 0x67 # CHECK: daddiu $9, $6, -15001
-0x5d 0x29 0x00 0x0a # CHECK: daddiu $9, $9, 10
-0x5e 0x73 0x69 0x3f # CHECK: daddiu $19, $19, 26943
-0x5f 0x02 0x46 0x9f # CHECK: daddiu $24, $2, 18079
-0x5c 0x63 0xff 0xfb # CHECK: daddiu $3, $3, -5
-0x5c 0x64 0xff 0xfb # CHECK: daddiu $3, $4, -5
-0x00 0x00 0x03 0x7c # CHECK: tlbp
-0x00 0x00 0x13 0x7c # CHECK: tlbr
-0x00 0x00 0x23 0x7c # CHECK: tlbwi
-0x00 0x00 0x33 0x7c # CHECK: tlbwr
-0x00 0x00 0x19 0x7c # CHECK: dvp
-0x00 0x04 0x19 0x7c # CHECK: dvp $4
-0x00 0x00 0x39 0x7c # CHECK: evp
-0x00 0x04 0x39 0x7c # CHECK: evp $4
-0x03 0xe4 0x1f 0x3c # CHECK: jalrc.hb $4
-0x00 0x85 0x1f 0x3c # CHECK: jalrc.hb $4, $5
-0x00 0x83 0x38 0x00 # CHECK: sll $4, $3, 7
-0x00 0x65 0x10 0x10 # CHECK: sllv $2, $3, $5
-0x00 0x83 0x38 0x80 # CHECK: sra $4, $3, 7
-0x00 0x65 0x10 0x90 # CHECK: srav $2, $3, $5
-0x00 0x83 0x38 0x40 # CHECK: srl $4, $3, 7
-0x00 0x65 0x10 0x50 # CHECK: srlv $2, $3, $5
-0x58 0x62 0x09 0x90 # CHECK: dsub $1, $2, $3
-0x59 0xe7 0x19 0xd0 # CHECK: dsubu $3, $7, $15
-0x59 0xe0 0x39 0x90 # CHECK: dneg $7, $15
-0x59 0x40 0x51 0x90 # CHECK: dneg $10, $10
-0x59 0x60 0x09 0xd0 # CHECK: dnegu $1, $11
-0x58 0xa0 0x29 0xd0 # CHECK: dnegu $5, $5
-0x3c 0x44 0x00 0x08 # CHECK: lh $2, 8($4)
-0x60 0x82 0x6a 0x08 # CHECK: lhe $4, 8($2)
-0x34 0x82 0x00 0x08 # CHECK: lhu $4, 8($2)
-0x60 0x82 0x62 0x08 # CHECK: lhue $4, 8($2)
-0x00 0xa4 0x18 0x18 # CHECK: mul $3, $4, $5
-0x00 0xa4 0x18 0x58 # CHECK: muh $3, $4, $5
-0x00 0xa4 0x18 0x98 # CHECK: mulu $3, $4, $5
-0x00 0xa4 0x18 0xd8 # CHECK: muhu $3, $4, $5
-0x58 0xa4 0x18 0x18 # CHECK: dmul $3, $4, $5
-0x58 0xa4 0x18 0x58 # CHECK: dmuh $3, $4, $5
-0x58 0xa4 0x18 0x98 # CHECK: dmulu $3, $4, $5
-0x58 0xa4 0x18 0xd8 # CHECK: dmuhu $3, $4, $5
-0x22 0x04 0x10 0x08 # CHECK: lwp $16, 8($4)
-0x22 0x04 0x90 0x08 # CHECK: swp $16, 8($4)
-0x58 0x64 0x7b 0x3c # CHECK: dsbh $3, $4
-0x58 0x64 0xfb 0x3c # CHECK: dshd $3, $4
-0x58 0x64 0x28 0x00 # CHECK: dsll $3, $4, 5
-0x58 0x64 0x28 0x08 # CHECK: dsll32 $3, $4, 5
-0x58 0xa6 0x20 0x10 # CHECK: dsllv $4, $5, $6
-0x58 0x85 0x28 0x80 # CHECK: dsra $4, $5, 5
-0x58 0xa6 0x20 0x90 # CHECK: dsrav $4, $5, $6
-0x41 0x1f 0x00 0x02 # CHECK: bc1eqzc $f31, 8
-0x41 0x3f 0x00 0x02 # CHECK: bc1nezc $f31, 8
-0x41 0x5f 0x00 0x04 # CHECK: bc2eqzc $31, 12
-0x41 0x7f 0x00 0x04 # CHECK: bc2nezc $31, 12
-0x00 0xa4 0x1a 0x50 # CHECK: and $3, $4, $5
-0xd0 0x64 0x04 0xd2 # CHECK: andi $3, $4, 1234
-0x00 0xa4 0x1a 0x90 # CHECK: or $3, $4, $5
-0x50 0x64 0x04 0xd2 # CHECK: ori $3, $4, 1234
-0x00 0xa4 0x1b 0x10 # CHECK: xor $3, $4, $5
-0x70 0x64 0x04 0xd2 # CHECK: xori $3, $4, 1234
-0x00 0xa4 0x1a 0xd0 # CHECK: nor $3, $4, $5
-0x00 0x04 0x1a 0xd0 # CHECK: not $3, $4
-0x58 0x22 0x4b 0x3c # CHECK: dclo $1, $2
-0x58 0x22 0x5b 0x3c # CHECK: dclz $1, $2
-0x58 0xaa 0x40 0xc0 # CHECK: drotr $5, $10, 8
-0x58 0x22 0x20 0xc8 # CHECK: drotr32 $1, $2, 4
-0x58 0xc4 0x18 0xd0 # CHECK: drotrv $3, $6, $4
-0xdc 0x82 0x00 0x05 # CHECK: ld $4, 5($2)
-0x60 0x48 0x70 0x03 # CHECK: lld $2, 3($8)
-0x60 0x22 0xe0 0x0a # CHECK: lwu $1, 10($2)
-0xd8 0x83 0x00 0x05 # CHECK: sd $4, 5($3)
-0x58 0x22 0x10 0x40 # CHECK: dsrl $1, $2, 2
-0x58 0x64 0x28 0x48 # CHECK: dsrl32 $3, $4, 5
-0x58 0x63 0x08 0x50 # CHECK: dsrlv $1, $3, $3
-0xbc 0xea 0x01 0x2c # CHECK: ldc1 $f7, 300($10)
-0xbd 0x0a 0x01 0x2c # CHECK: ldc1 $f8, 300($10)
-0x21 0x6c 0x23 0xff # CHECK: ldc2 $11, 1023($12)
-0x9c 0x45 0x00 0x20 # CHECK: lwc1 $f2, 32($5)
-0x20 0x24 0x00 0x10 # CHECK: lwc2 $1, 16($4)
-0xb8 0xea 0x00 0x40 # CHECK: sdc1 $f7, 64($10)
-0xb9 0x0a 0x00 0x40 # CHECK: sdc1 $f8, 64($10)
-0x20 0x50 0xa0 0x08 # CHECK: sdc2 $2, 8($16)
-0x98 0xcd 0x01 0x71 # CHECK: swc1 $f6, 369($13)
-0x20 0xf1 0x83 0x09 # CHECK: swc2 $7, 777($17)
-0x54 0x22 0x10 0x3b # CHECK: cfc1 $1, $2
-0x00 0x64 0xcd 0x3c # CHECK: cfc2 $3, $4
-0x54 0xa6 0x18 0x3b # CHECK: ctc1 $5, $6
-0x00 0xe8 0xdd 0x3c # CHECK: ctc2 $7, $8
-0xd4 0xc6 0x00 0x20 # CHECK: bltzc $6, 132
-0xf4 0x40 0x00 0x40 # CHECK: blezc $2, 260
-0xf6 0x10 0x00 0x80 # CHECK: bgezc $16, 516
-0xd5 0x80 0x01 0x00 # CHECK: bgtzc $12, 1028
-0x10 0x64 0x01 0x00 # CHECK: aui $3, $4, 256
-0x58 0x83 0x0b 0x3c # CHECK: dbitswap $3, $4
-0x58 0x64 0x2d 0x04 # CHECK: dlsa $3, $4, $5, 3
-0x78 0x50 0x00 0x43 # CHECK: lwupc $2, 268
diff --git a/external/bsd/llvm/dist/llvm/test/MC/Markup/basic-markup.mc b/external/bsd/llvm/dist/llvm/test/MC/Markup/basic-markup.mc
deleted file mode 100644
index 2fa5ebb28fa4..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/Markup/basic-markup.mc
+++ /dev/null
@@ -1,16 +0,0 @@
-// RUN: llvm-mcmarkup %s | FileCheck %s
-
-	push	{<reg:r1>, <reg:r2>, <reg:r7>}
-	sub	<reg:sp>, <imm:#132>
-	ldr	<reg:r0>, <mem:[<reg:r0>, <imm:#4>]>
-
-
-// CHECK: reg
-// CHECK: reg
-// CHECK: reg
-// CHECK: reg
-// CHECK: imm
-// CHECK: reg
-// CHECK: mem
-// CHECK: reg
-// CHECK: imm
diff --git a/external/bsd/llvm/dist/llvm/test/MC/Markup/lit.local.cfg b/external/bsd/llvm/dist/llvm/test/MC/Markup/lit.local.cfg
deleted file mode 100644
index ab28eedae212..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/Markup/lit.local.cfg
+++ /dev/null
@@ -1,2 +0,0 @@
-config.suffixes = ['.mc']
-
diff --git a/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/invalid-wrong-error.s b/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/invalid-wrong-error.s
deleted file mode 100644
index 977a2d031f23..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/invalid-wrong-error.s
+++ /dev/null
@@ -1,52 +0,0 @@
-# Instructions that are correctly rejected but emit a wrong or misleading error.
-# RUN: not llvm-mc %s -triple=mips -show-encoding -mcpu=mips64r6 -mattr=micromips 2>%t1
-# RUN: FileCheck %s < %t1
-
-
-  # The LLD instruction with invalid memory operand should emit "expected memory with 12-bit signed offset".
-  lld $31, 4096($31)       # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  lld $31, 2048($31)       # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  lld $31, -2049($31)      # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  # The LWU instruction with invalid memory operand should emit "expected memory with 12-bit signed offset".
-  lwu $31, 4096($31)           # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  lwu $31, 2048($31)           # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  lwu $31, -2049($31)          # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  # The 10-bit immediate supported by the standard encodings cause us to emit
-  # the diagnostic for the 10-bit form. This isn't exactly wrong but it is
-  # misleading. Ideally, we'd emit every way to achieve a valid match instead
-  # of picking only one.
-  teq $8, $9, $2           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  teq $8, $9, -1           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  teq $8, $9, 16           # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  tge $8, $9, $2           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  tge $8, $9, -1           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  tge $8, $9, 16           # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  tgeu $8, $9, $2          # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate
-  tgeu $8, $9, -1          # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate
-  tgeu $8, $9, 16          # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  tlt $8, $9, $2           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  tlt $8, $9, -1           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  tlt $8, $9, 16           # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  tltu $8, $9, $2          # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate
-  tltu $8, $9, -1          # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate
-  tltu $8, $9, 16          # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  tne $8, $9, $2           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  tne $8, $9, -1           # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-  tne $8, $9, 16           # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  dins $2, $3, -1, 1       # CHECK: :[[@LINE]]:16: error: expected 6-bit unsigned immediate
-  dins $2, $3, 32, 1       # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  syscall -1               # CHECK: :[[@LINE]]:11: error: expected 20-bit unsigned immediate
-  syscall $4               # CHECK: :[[@LINE]]:11: error: expected 20-bit unsigned immediate
-  syscall 1024             # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  ldc2 $1, -2049($12)      # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  ldc2 $1, 2048($12)       # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  ldc2 $1, 1023($32)       # CHECK: :[[@LINE]]:12: error: expected memory with 16-bit signed offset
-  lwc2 $1, -2049($4)       # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  lwc2 $1, 2048($4)        # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  lwc2 $1, 16($32)         # CHECK: :[[@LINE]]:12: error: expected memory with 16-bit signed offset
-  sdc2 $1, -2049($16)      # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  sdc2 $1, 2048($16)       # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  sdc2 $1, 8($32)          # CHECK: :[[@LINE]]:12: error: expected memory with 16-bit signed offset
-  swc2 $1, -2049($17)      # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  swc2 $1, 2048($17)       # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
-  swc2 $1, 777($32)        # CHECK: :[[@LINE]]:12: error: expected memory with 16-bit signed offset
diff --git a/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/invalid.s b/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/invalid.s
deleted file mode 100644
index 30021ea10f02..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/invalid.s
+++ /dev/null
@@ -1,414 +0,0 @@
-# RUN: not llvm-mc %s -triple=mips -show-encoding -mcpu=mips64r6 -mattr=micromips 2>%t1
-# RUN: FileCheck %s < %t1
-
-  addiur1sp $7, 260        # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4
-  addiur1sp $7, 241        # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4
-  addiur1sp $8, 240        # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
-  addiur2 $9, $7, -1       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  addiur2 $6, $7, 10       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  addius5 $2, -9           # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
-  addius5 $2, 8            # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
-  addiusp 1032             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  align $4, $2, $3, -1     # CHECK: :[[@LINE]]:21: error: expected 2-bit unsigned immediate
-  align $4, $2, $3, 4      # CHECK: :[[@LINE]]:21: error: expected 2-bit unsigned immediate
-  beqzc16 $9, 20           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  beqzc16 $6, 31           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  beqzc16 $6, 130          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bnezc16 $9, 20           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  bnezc16 $6, 31           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bnezc16 $6, 130          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  cache -1, 255($7)        # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
-  cache 32, 255($7)        # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
-  dahi    $4, $4, 65536    # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
-  dahi    $4, $4, -1       # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
-  dahi    $4, $5, 1        # CHECK: :[[@LINE]]:3: error: source and destination must match
-  dati    $4, $4, 65536    # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
-  dati    $4, $4, -1       # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
-  dati    $4, $5, 1        # CHECK: :[[@LINE]]:3: error: source and destination must match
-  daui    $4, $0, 1        # CHECK: :[[@LINE]]:3: error: invalid operand ($zero) for instruction
-  daui    $4, $4, 65536    # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
-  daui    $4, $4, -1       # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
-  dati    $4, $4, -1       # CHECK: :[[@LINE]]:19: error: expected 16-bit unsigned immediate
-  dati    $4, $5, 1        # CHECK: :[[@LINE]]:3: error: source and destination must match
-  # FIXME: Check various 'pos + size' constraints on dext*
-  dext $2, $3, -1, 1   # CHECK: :[[@LINE]]:16: error: expected 6-bit unsigned immediate
-  dext $2, $3, 64, 1   # CHECK: :[[@LINE]]:16: error: expected 6-bit unsigned immediate
-  dext $2, $3, 1, 0    # CHECK: :[[@LINE]]:19: error: expected immediate in range 1 .. 32
-  dext $2, $3, 1, 33   # CHECK: :[[@LINE]]:19: error: expected immediate in range 1 .. 32
-  dextm $2, $3, -1, 1  # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
-  dextm $2, $3, 32, 1  # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
-  dextm $2, $3, -1, 33 # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
-  dextm $2, $3, 32, 33 # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
-  dextm $2, $3, 1, 32  # CHECK: :[[@LINE]]:20: error: expected immediate in range 33 .. 64
-  dextm $2, $3, 1, 65  # CHECK: :[[@LINE]]:20: error: expected immediate in range 33 .. 64
-  dextu $2, $3, 31, 1  # CHECK: :[[@LINE]]:17: error: expected immediate in range 32 .. 63
-  dextu $2, $3, 64, 1  # CHECK: :[[@LINE]]:17: error: expected immediate in range 32 .. 63
-  dextu $2, $3, 32, 0  # CHECK: :[[@LINE]]:21: error: expected immediate in range 1 .. 32
-  dextu $2, $3, 32, 33 # CHECK: :[[@LINE]]:21: error: expected immediate in range 1 .. 32
-  dins $2, $3, 31, 33  # CHECK: :[[@LINE]]:20: error: expected immediate in range 1 .. 32
-  dins $2, $3, 31, 0   # CHECK: :[[@LINE]]:20: error: expected immediate in range 1 .. 32
-  # FIXME: Check '32 <= pos + size <= 64' constraint on dinsm
-  dinsm $2, $3, -1, 1  # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
-  dinsm $2, $3, 32, 1  # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
-  dinsm $2, $3, 31, 0  # CHECK: :[[@LINE]]:21: error: expected immediate in range 2 .. 64
-  dinsm $2, $3, 31, 65 # CHECK: :[[@LINE]]:21: error: expected immediate in range 2 .. 64
-  dinsu $2, $3, 31, 1  # CHECK: :[[@LINE]]:17: error: expected immediate in range 32 .. 63
-  dinsu $2, $3, 64, 1  # CHECK: :[[@LINE]]:17: error: expected immediate in range 32 .. 63
-  dinsu $2, $3, 63, 0  # CHECK: :[[@LINE]]:21: error: expected immediate in range 1 .. 32
-  dinsu $2, $3, 32, 33 # CHECK: :[[@LINE]]:21: error: expected immediate in range 1 .. 32
-  # FIXME: Check '0 < pos + size <= 32' constraint on ext
-  ext $2, $3, -1, 31       # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  ext $2, $3, 32, 31       # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  ext $2, $3, 1, 0         # CHECK: :[[@LINE]]:18: error: expected immediate in range 1 .. 32
-  ext $2, $3, 1, 33        # CHECK: :[[@LINE]]:18: error: expected immediate in range 1 .. 32
-  ins $2, $3, -1, 31       # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  ins $2, $3, 32, 31       # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  dalign  $4, $2, $3, -1   # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
-  dalign  $4, $2, $3, 8    # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
-  lbu16 $9, 8($16)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lbu16 $3, -2($16)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  lbu16 $3, -2($16)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  lbu16 $16, 8($9)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhu16 $9, 4($16)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhu16 $3, 64($16)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  lhu16 $3, 64($16)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  lhu16 $16, 4($9)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  li16 $4, -2              # CHECK: :[[@LINE]]:12: error: expected immediate in range -1 .. 126
-  li16 $4, 127             # CHECK: :[[@LINE]]:12: error: expected immediate in range -1 .. 126
-  lsa   $4, $2, $3, 0      # CHECK: :[[@LINE]]:21: error: expected immediate in range 1 .. 4
-  lsa   $4, $2, $3, 5      # CHECK: :[[@LINE]]:21: error: expected immediate in range 1 .. 4
-  lw16  $9, 8($17)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lw16  $4, 68($17)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  lw16  $4, 68($17)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  lw16  $17, 8($10)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  ddiv $32, $4, $5         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  ddiv $3, $34, $5         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  ddiv $3, $4, $35         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  dmod $32, $4, $5         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  dmod $3, $34, $5         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  dmod $3, $4, $35         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  ddivu $32, $4, $5        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  ddivu $3, $34, $5        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  ddivu $3, $4, $35        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  dmodu $32, $4, $5        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  dmodu $3, $34, $5        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  dmodu $3, $4, $35        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  pref -1, 255($7)         # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
-  pref 32, 255($7)         # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
-  teq $34, $9, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  teq $8, $35, 6           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tge $34, $9, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tge $8, $35, 6           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tgeu $34, $9, 5          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tgeu $8, $35, 6          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tlt $34, $9, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tlt $8, $35, 6           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tltu $34, $9, 5          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tltu $8, $35, 6          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tne $34, $9, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tne $8, $35, 6           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  wrpgpr $34, $4           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  wrpgpr $3, $33           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  wsbh $34, $4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  wsbh $3, $33             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  jrcaddiusp 1             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 2             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 3             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 10            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 18            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 31            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 33            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 125           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 128           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  jrcaddiusp 132           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  lwm16 $5, $6, $ra, 8($sp)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
-  lwm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
-  lwm16 $16-$25, $ra, 8($sp)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
-  lwm16 $16, 8($sp)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lwm16 $16, $17, 8($sp)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lwm16 $16-$20, 8($sp)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lwm16 $16, $17, $ra, 8($fp)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lwm16 $16, $17, $ra, 64($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sb16 $9, 4($16)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sb16 $3, 64($16)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  sb16 $16, 4($16)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sb16 $7, 4($9)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sh16  $9, 8($17)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sh16  $4, 68($17)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  sh16  $16, 8($17)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sh16  $7, 8($9)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sw16  $9, 4($17)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sw16  $4, 64($17)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
-  sw16  $16, 4($17)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  sw16  $7, 4($10)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swm16 $5, $6, $ra, 8($sp)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
-  swm16 $16, $19, $ra, 8($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
-  swm16 $16-$25, $ra, 8($sp)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
-  swm16 $16, 8($sp)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swm16 $16, $17, 8($sp)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swm16 $16-$20, 8($sp)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swm16 $16, $17, $ra, 8($fp)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swm16 $16, $17, $ra, 64($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  mtc0  $4, $3, -1             # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
-  mtc0  $4, $3, 8              # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
-  mthc0 $4, $3, -1             # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
-  mthc0 $4, $3, 8              # CHECK: :[[@LINE]]:17: error: expected 3-bit unsigned immediate
-  dmtc0  $4, $3, -1            # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
-  dmtc0  $4, $3, 8             # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
-  dmfc0  $4, $3, -1            # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
-  dmfc0  $4, $3, 8             # CHECK: :[[@LINE]]:18: error: expected 3-bit unsigned immediate
-  tlbp $3                      # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  tlbp 5                       # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  tlbp $4, 6                   # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  tlbr $3                      # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  tlbr 5                       # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  tlbr $4, 6                   # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  tlbwi $3                     # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-  tlbwi 5                      # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-  tlbwi $4, 6                  # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-  tlbwr $3                     # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-  tlbwr 5                      # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-  tlbwr $4, 6                  # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-  dvp 3                        # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  dvp $4, 5                    # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  evp 3                        # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  evp $4, 5                    # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  jalrc.hb $31                 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
-  jalrc.hb $31, $31            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
-  sll $4, $3, -1               # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  sll $4, $3, 32               # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  sra $4, $3, -1               # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  sra $4, $3, 32               # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  srl $4, $3, -1               # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  srl $4, $3, 32               # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  sll $3, -1                   # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-  sll $3, 32                   # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-  sra $3, -1                   # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-  sra $3, 32                   # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-  srl $3, -1                   # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-  srl $3, 32                   # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-  dneg $7, 5                   # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
-  dneg 4                       # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  dnegu $1, 3                  # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
-  dnegu 7                      # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-  lle $33, 8($5)               # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  lle $4, 8($33)               # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lle $4, 512($5)              # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lle $4, -513($5)             # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lwe $33, 8($5)               # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  lwe $4, 8($33)               # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lwe $4, 512($5)              # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lwe $4, -513($5)             # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sbe $33, 8($5)               # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  sbe $4, 8($33)               # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sbe $4, 512($5)              # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sbe $4, -513($5)             # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sce $33, 8($5)               # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  sce $4, 8($33)               # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sce $4, 512($5)              # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sce $4, -513($5)             # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  she $33, 8($5)               # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  she $4, 8($33)               # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  she $4, 512($5)              # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  she $4, -513($5)             # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  swe $33, 8($4)               # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  swe $5, 8($34)               # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  swe $5, 512($4)              # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  swe $5, -513($4)             # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lh $33, 8($4)                # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhe $34, 8($2)               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhu $35, 8($2)               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhue $36, 8($2)              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lh $2, 8($34)                # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhe $4, 8($33)               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
-  lhu $4, 8($35)               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhue $4, 8($37)              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
-  lh $2, -65536($4)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lh $2, 65536($4)             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhe $4, -512($2)             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
-  lhe $4, 512($2)              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
-  lhu $4, -65536($2)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhu $4, 65536($2)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhue $4, -512($2)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
-  lhue $4, 512($2)             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
-  lwm32 $5, $6, 8($4)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
-  lwm32 $16, $19, 8($4)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
-  lwm32 $16-$25, 8($4)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
-  lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $24, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
-  movep $5, $6, $2, $9         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  movep $5, $6, $5, $3         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  movep $5, $21, $2, $3        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  movep $8, $6, $2, $3         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  rotr $2, -1                  # CHECK: :[[@LINE]]:12: error: expected 5-bit unsigned immediate
-  rotr $2, 32                  # CHECK: :[[@LINE]]:12: error: expected 5-bit unsigned immediate
-  rotr $2, $3, -1              # CHECK: :[[@LINE]]:16: error: expected 5-bit unsigned immediate
-  rotr $2, $3, 32              # CHECK: :[[@LINE]]:16: error: expected 5-bit unsigned immediate
-  rotrv $9, $6, 5              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swm32 $5, $6, 8($4)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
-  swm32 $16, $19, 8($4)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
-  swm32 $16-$25, 8($4)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
-  lwp $31, 8($4)               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-                               # FIXME: This ought to point at the $34 but memory is treated as one operand.
-  lwp $16, 8($34)              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
-  lwp $16, 4096($4)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
-  lwp $16, 8($16)              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
-  swp $31, 8($4)               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swp $16, 8($34)              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
-  swp $16, 4096($4)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
-  dsll $3, $4, 64              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
-  dsll $3, $4, -1              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
-  dsll32 $3, $4, 32            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
-  dsll32 $3, $4, -1            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
-  dsra $4, $5, 64              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
-  dsra $4, $5, -1              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
-  dsra32 $4, $5, 32            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
-  dsra32 $4, $5, -1            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
-                               # bposge32 is microMIPS DSP instruction
-  bposge32 342                 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
-  bc1eqzc $f32, 4              # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  bc1eqzc $f31, -65535         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bc1eqzc $f31, -65537         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc1eqzc $f31, 65535          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bc1eqzc $f31, 65536          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc1nezc $f32, 4              # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  bc1nezc $f31, -65535         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bc1nezc $f31, -65537         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc1nezc $f31, 65535          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bc1nezc $f31, 65536          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc2eqzc $32, 4               # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  bc2eqzc $31, -65535          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bc2eqzc $31, -65537          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc2eqzc $31, 65535           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bc2eqzc $31, 65536           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc2nezc $32, 4               # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  bc2nezc $31, -65535          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bc2nezc $31, -65537          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc2nezc $31, 65535           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bc2nezc $31, 65536           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  andi $3, $4, -1              # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
-  andi $3, $4, 65536           # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
-  andi $3, -1                  # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
-  andi $3, 65536               # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
-  ori $3, $4, -1               # CHECK: :[[@LINE]]:15: error: expected 16-bit unsigned immediate
-  ori $3, $4, 65536            # CHECK: :[[@LINE]]:15: error: expected 16-bit unsigned immediate
-  ori $3, -1                   # CHECK: :[[@LINE]]:11: error: expected 16-bit unsigned immediate
-  ori $3, 65536                # CHECK: :[[@LINE]]:11: error: expected 16-bit unsigned immediate
-  xori $3, $4, -1              # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
-  xori $3, $4, 65536           # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
-  xori $3, -1                  # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
-  xori $3, 65536               # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
-  not $3, 4                    # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  drotr $5, $10, 64            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
-  drotr $5, $10, -1            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
-  drotr32 $1, $2, 32           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
-  drotr32 $1, $2, -1           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
-  ld $31, 65536($31)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  ld $31, 32768($31)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  ld $31, -32769($31)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  sd $31, 65536($31)           # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
-  sd $31, 32768($31)           # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
-  sd $31, -32769($31)          # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
-  lb $32, 8($5)                # CHECK: :[[@LINE]]:6: error: invalid operand for instruction
-  lb $4, -32769($5)            # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
-  lb $4, 32768($5)             # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
-  lb $4, 8($32)                # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
-  lbu $32, 8($5)               # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  lbu $4, -32769($5)           # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
-  lbu $4, 32768($5)            # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
-  lbu $4, 8($32)               # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
-  ldc1 $f32, 300($10)          # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  ldc1 $f7, -32769($10)        # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  ldc1 $f7, 32768($10)         # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  ldc1 $f7, 300($32)           # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  sdc1 $f32, 64($10)           # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  sdc1 $f7, -32769($10)        # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  sdc1 $f7, 32768($10)         # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  sdc1 $f7, 64($32)            # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  lwc1 $f32, 32($5)            # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  lwc1 $f2, -32769($5)         # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  lwc1 $f2, 32768($5)          # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  lwc1 $f2, 32($32)            # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  swc1 $f32, 369($13)          # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  swc1 $f6, -32769($13)        # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  swc1 $f6, 32768($13)         # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  swc1 $f6, 369($32)           # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  ldc2 $32, 1023($12)          # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  sdc2 $32, 8($16)             # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  lwc2 $32, 16($4)             # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  swc2 $32, 777($17)           # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  bgec  $0, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bgec  $2, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
-  bgec  $2, $4, -131076    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bgec  $2, $4, -131071    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bgec  $2, $4, 131072     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bgec  $2, $4, 131071     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bltc  $0, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bltc  $2, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
-  bltc  $2, $4, -131076    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bltc  $2, $4, -131071    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bltc  $2, $4, 131072     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bltc  $2, $4, 131071     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bgeuc $0, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bgeuc $2, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
-  bgeuc  $2, $4, -131076   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bgeuc  $2, $4, -131071   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bgeuc  $2, $4, 131072    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bgeuc  $2, $4, 131071    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bltuc $0, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bltuc $2, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
-  bltuc  $2, $4, -131076   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bltuc  $2, $4, -131071   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bltuc  $2, $4, 131072    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bltuc  $2, $4, 131071    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  beqc  $0, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  beqc  $2, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
-  beqc  $2, $4, -131076    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  beqc  $2, $4, -131071    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  beqc  $2, $4, 131072     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  beqc  $2, $4, 131071     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bnec  $0, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bnec  $2, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
-  bnec  $2, $4, -131076    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bnec  $2, $4, -131071    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bnec  $2, $4, 131072     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bnec  $2, $4, 131071     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  blezc $0, 12             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  blezc $2, -131076        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  blezc $2, -131071        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  blezc $2, 131072         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  blezc $2, 131071         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bgezc $0, 12             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bgezc $2, -131076        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bgezc $2, -131071        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bgezc $2, 131072         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bgezc $2, 131071         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bgtzc $0, 12             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bgtzc $2, -131076        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bgtzc $2, -131071        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bgtzc $2, 131072         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bgtzc $2, 131071         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bltzc $0, 12             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bltzc $2, -131076        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bltzc $2, -131071        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bltzc $2, 131072         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bltzc $2, 131071         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  beqzc $0, 12             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  beqzc $2, -4194308       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  beqzc $2, -4194303       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  beqzc $2, 4194304        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  beqzc $2, 4194303        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bnezc $0, 12             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
-  bnezc $2, -4194308       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bnezc $2, -4194303       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  bnezc $2, 4194304        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bnezc $2, 4194303        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
-  dlsa $3, $4, $5, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected immediate in range 1 .. 4
-  dlsa $3, $4, $5, -1          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected immediate in range 1 .. 4
-  dlsa $3, $4, $5, 0           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected immediate in range 1 .. 4
-  lwupc $2, 262145             # CHECK: :[[@LINE]]:13: error: expected both 19-bit signed immediate and multiple of 4
-  lwupc $2, 5                  # CHECK: :[[@LINE]]:13: error: expected both 19-bit signed immediate and multiple of 4
-  lwupc $2, -262145            # CHECK: :[[@LINE]]:13: error: expected both 19-bit signed immediate and multiple of 4
-  lwupc $2, $2                 # CHECK: :[[@LINE]]:13: error: expected both 19-bit signed immediate and multiple of 4
-  lwupc $2, bar+267            # CHECK: :[[@LINE]]:13: error: expected both 19-bit signed immediate and multiple of 4
-  aui $3, $4, 65536            # CHECK: :[[@LINE]]:15: error: expected 16-bit unsigned immediate
-  aui $3, $4, -32769           # CHECK: :[[@LINE]]:15: error: expected 16-bit unsigned immediate
diff --git a/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/relocations.s b/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/relocations.s
deleted file mode 100644
index 18fa26b4e94f..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/relocations.s
+++ /dev/null
@@ -1,48 +0,0 @@
-# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 \
-# RUN:   -mattr=micromips | FileCheck %s -check-prefix=CHECK-FIXUP
-# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips64r6 \
-# RUN:   -mattr=micromips | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
-#------------------------------------------------------------------------------
-# Check that the assembler can handle the documented syntax for fixups.
-#------------------------------------------------------------------------------
-# CHECK-FIXUP: balc  bar        # encoding: [0b101101AA,A,A,A]
-# CHECK-FIXUP:                  #   fixup A - offset: 0,
-# CHECK-FIXUP:                      value: bar-4, kind: fixup_MICROMIPS_PC26_S1
-# CHECK-FIXUP: bc    bar        # encoding: [0b100101AA,A,A,A]
-# CHECK-FIXUP:                  #   fixup A - offset: 0,
-# CHECK-FIXUP:                      value: bar-4, kind: fixup_MICROMIPS_PC26_S1
-# CHECK-FIXUP: addiupc $2, bar  # encoding: [0x78,0b01000AAA,A,A]
-# CHECK-FIXUP:                  #   fixup A - offset: 0,
-# CHECK-FIXUP:                      value: bar, kind: fixup_MICROMIPS_PC19_S2
-# CHECK-FIXUP: lwpc    $2,  bar # encoding: [0x78,0b01001AAA,A,A]
-# CHECK-FIXUP:                  #   fixup A - offset: 0,
-# CHECK-FIXUP:                      value: bar, kind: fixup_MICROMIPS_PC19_S2
-# CHECK-FIXUP: ldpc  $2, bar    # encoding: [0x78,0b010110AA,A,A]
-# CHECK-FIXUP:                  #   fixup A - offset: 0,
-# CHECK-FIXUP:                      value: bar, kind: fixup_MICROMIPS_PC18_S3
-# CHECK-FIXUP: beqzc $3, bar        # encoding: [0x80,0b011AAAAA,A,A]
-# CHECK-FIXUP:                      #   fixup A - offset: 0,
-# CHECK-FIXUP:                          value: bar-4, kind: fixup_MICROMIPS_PC21_S1
-# CHECK-FIXUP: bnezc $3, bar        # encoding: [0xa0,0b011AAAAA,A,A]
-# CHECK-FIXUP:                      #   fixup A - offset: 0,
-# CHECK-FIXUP:                          value: bar-4, kind: fixup_MICROMIPS_PC21_S1
-#------------------------------------------------------------------------------
-# Check that the appropriate relocations were created.
-#------------------------------------------------------------------------------
-# CHECK-ELF: Relocations [
-# CHECK-ELF:     0x0 R_MICROMIPS_PC26_S1 bar 0x0
-# CHECK-ELF:     0x4 R_MICROMIPS_PC26_S1 bar 0x0
-# CHECK-ELF:     0x8 R_MICROMIPS_PC19_S2 bar 0x0
-# CHECK-ELF:     0xC R_MICROMIPS_PC19_S2 bar 0x0
-# CHECK-ELF:     0x10 R_MICROMIPS_PC18_S3 bar 0x0
-# CHECK-ELF:     0x14 R_MICROMIPS_PC21_S1 bar 0x0
-# CHECK-ELF:     0x18 R_MICROMIPS_PC21_S1 bar 0x0
-# CHECK-ELF: ]
-
-  balc  bar
-  bc    bar
-  addiupc $2,bar
-  lwpc    $2,bar
-  ldpc  $2, bar
-  beqzc  $3, bar
-  bnezc  $3, bar
diff --git a/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/valid.s b/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/valid.s
deleted file mode 100644
index 3ead62fc6169..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/Mips/micromips64r6/valid.s
+++ /dev/null
@@ -1,350 +0,0 @@
-# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 -mattr=micromips | FileCheck %s
-a:
-        .set noat
-        addiur1sp $7, 4          # CHECK: addiur1sp $7, 4     # encoding: [0x6f,0x83]
-        addiur2 $6, $7, -1       # CHECK: addiur2 $6, $7, -1  # encoding: [0x6f,0x7e]
-        addiur2 $6, $7, 12       # CHECK: addiur2 $6, $7, 12  # encoding: [0x6f,0x76]
-        addius5 $7, -2           # CHECK: addius5 $7, -2      # encoding: [0x4c,0xfc]
-        addiusp -1028            # CHECK: addiusp -1028       # encoding: [0x4f,0xff]
-        addiusp -1032            # CHECK: addiusp -1032       # encoding: [0x4f,0xfd]
-        addiusp 1024             # CHECK: addiusp 1024        # encoding: [0x4c,0x01]
-        addiusp 1028             # CHECK: addiusp 1028        # encoding: [0x4c,0x03]
-        addiusp -16              # CHECK: addiusp -16         # encoding: [0x4f,0xf9]
-        and16 $16, $2            # CHECK: and16 $16, $2       # encoding: [0x44,0x21]
-        andi16 $4, $5, 8         # CHECK: andi16 $4, $5, 8    # encoding: [0x2e,0x56]
-        b 132                    # CHECK: bc16 132            # encoding: [0xcc,0x42]
-        bc16 132                 # CHECK: bc16 132            # encoding: [0xcc,0x42]
-        beqzc16 $6, 20           # CHECK: beqzc16 $6, 20      # encoding: [0x8f,0x0a]
-        bnezc16 $6, 20           # CHECK: bnezc16 $6, 20      # encoding: [0xaf,0x0a]
-        aui $4, $5, 1            # CHECK: aui $4, $5, 1       # encoding: [0x10,0x85,0x00,0x01]
-        daui $3, $4, 5           # CHECK: daui $3, $4, 5      # encoding: [0xf0,0x64,0x00,0x05]
-        dahi $3, $3, 4           # CHECK: dahi $3, $3, 4      # encoding: [0x42,0x23,0x00,0x04]
-        dati $3, $3, 4           # CHECK: dati $3, $3, 4      # encoding: [0x42,0x03,0x00,0x04]
-        dext $9, $6, 3, 7        # CHECK: dext $9, $6, 3, 7   # encoding: [0x59,0x26,0x30,0xec]
-        dextm $9, $6, 3, 39      # CHECK: dextm $9, $6, 3, 39 # encoding: [0x59,0x26,0x30,0xe4]
-        dextu $9, $6, 35, 7      # CHECK: dextu $9, $6, 35, 7  # encoding: [0x59,0x26,0x30,0xd4]
-        dalign $4, $2, $3, 5     # CHECK: dalign $4, $2, $3, 5  # encoding: [0x58,0x43,0x25,0x1c]
-        dsll $4, $5              # CHECK: dsllv $4, $4, $5      # encoding: [0x58,0x85,0x20,0x10]
-        dsll $4, $4, $5          # CHECK: dsllv $4, $4, $5      # encoding: [0x58,0x85,0x20,0x10]
-        dsrl $4, $5              # CHECK: dsrlv $4, $4, $5      # encoding: [0x58,0x85,0x20,0x50]
-        dsrl $4, $4, $5          # CHECK: dsrlv $4, $4, $5      # encoding: [0x58,0x85,0x20,0x50]
-        ldpc $2, 16              # CHECK: ldpc $2, 16           # encoding: [0x78,0x58,0x00,0x02]
-        lw $3, 32($gp)           # CHECK: lw $3, 32($gp)        # encoding: [0x65,0x88]
-        lw $3, 24($sp)           # CHECK: lw $3, 24($sp)        # encoding: [0x48,0x66]
-        lw16 $4, 8($17)          # CHECK: lw16 $4, 8($17)       # encoding: [0x6a,0x12]
-        lhu16 $3, 4($16)         # CHECK: lhu16 $3, 4($16)      # encoding: [0x29,0x82]
-        lbu16 $3, 4($17)         # CHECK: lbu16 $3, 4($17)      # encoding: [0x09,0x94]
-        lbu16 $3, -1($17)        # CHECK: lbu16 $3, -1($17)     # encoding: [0x09,0x9f]
-        movep $5, $6, $2, $3     # CHECK: movep $5, $6, $2, $3  # encoding: [0x84,0x34]
-        not16 $4, $7             # CHECK: not16 $4, $7          # encoding: [0x46,0x70]
-        or16 $3, $7              # CHECK: or16 $3, $7           # encoding: [0x45,0xf9]
-        ll $2, 8($4)                    # CHECK: ll $2, 8($4)                    # encoding: [0x60,0x44,0x30,0x08]
-        lwm32 $16, $17, 8($4)           # CHECK: lwm32 $16, $17, 8($4)           # encoding: [0x20,0x44,0x50,0x08]
-        lwm32 $16, $17, 8($sp)          # CHECK: lwm32 $16, $17, 8($sp)          # encoding: [0x20,0x5d,0x50,0x08]
-        lwm32 $16, $17, $ra, 8($4)      # CHECK: lwm32 $16, $17, $ra, 8($4)      # encoding: [0x22,0x44,0x50,0x08]
-        lwm32 $16, $17, $ra, 64($sp)    # CHECK: lwm32 $16, $17, $ra, 64($sp)    # encoding: [0x22,0x5d,0x50,0x40]
-        lwm32 $16, $17, $18, $19, 8($4) # CHECK: lwm32 $16, $17, $18, $19, 8($4) # encoding: [0x20,0x84,0x50,0x08]
-        lwm32 $16, $17, $18, $19, $ra, 8($4)                          # CHECK: lwm32 $16, $17, $18, $19, $ra, 8($4)                          # encoding: [0x22,0x84,0x50,0x08]
-        lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, 8($4)      # CHECK: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, 8($4)      # encoding: [0x21,0x24,0x50,0x08]
-        lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # CHECK: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x23,0x24,0x50,0x08]
-        lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # CHECK: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x23,0x24,0x50,0x08]
-        rotr $2, 7                      # CHECK: rotr $2, $2, 7                  # encoding: [0x00,0x42,0x38,0xc0]
-        rotr $9, $6, 7                  # CHECK: rotr $9, $6, 7                  # encoding: [0x01,0x26,0x38,0xc0]
-        rotrv $9, $6, $7                # CHECK: rotrv $9, $6, $7                # encoding: [0x00,0xc7,0x48,0xd0]
-        sc $2, 8($4)                    # CHECK: sc $2, 8($4)                    # encoding: [0x60,0x44,0xb0,0x08]
-        seb $3, $4                      # CHECK: seb $3, $4                      # encoding: [0x00,0x64,0x2b,0x3c]
-        seb $3                          # CHECK: seb $3, $3                      # encoding: [0x00,0x63,0x2b,0x3c]
-        seh $3, $4                      # CHECK: seh $3, $4                      # encoding: [0x00,0x64,0x3b,0x3c]
-        seh $3                          # CHECK: seh $3, $3                      # encoding: [0x00,0x63,0x3b,0x3c]
-        sgt $4, $5, $6                  # CHECK: slt $4, $6, $5                  # encoding: [0x00,0xa6,0x23,0x50]
-        sgtu $4, $5, $6                 # CHECK: sltu $4, $6, $5                 # encoding: [0x00,0xa6,0x23,0x90]
-        sll $4, $5                      # CHECK: sllv $4, $4, $5                 # encoding: [0x00,0x85,0x20,0x10]
-        sra $4, $5                      # CHECK: srav $4, $4, $5                 # encoding: [0x00,0x85,0x20,0x90]
-        srl $4, $5                      # CHECK: srlv $4, $4, $5                 # encoding: [0x00,0x85,0x20,0x50]
-        swm32 $16, $17, 8($4)           # CHECK: swm32 $16, $17, 8($4)           # encoding: [0x20,0x44,0xd0,0x08]
-        swm32 $16, $17, 8($sp)          # CHECK: swm32 $16, $17, 8($sp)          # encoding: [0x20,0x5d,0xd0,0x08]
-        swm32 $16, $17, $ra, 8($4)      # CHECK: swm32 $16, $17, $ra, 8($4)      # encoding: [0x22,0x44,0xd0,0x08]
-        swm32 $16, $17, $ra, 64($sp)    # CHECK: swm32 $16, $17, $ra, 64($sp)    # encoding: [0x22,0x5d,0xd0,0x40]
-        swm32 $16, $17, $18, $19, 8($4) # CHECK: swm32 $16, $17, $18, $19, 8($4) # encoding: [0x20,0x84,0xd0,0x08]
-        syscall                         # CHECK: syscall                         # encoding: [0x00,0x00,0x8b,0x7c]
-        syscall 396                     # CHECK: syscall 396                     # encoding: [0x01,0x8c,0x8b,0x7c]
-        ddiv $3, $4, $5          # CHECK: ddiv $3, $4, $5     # encoding: [0x58,0xa4,0x19,0x18]
-        dmod $3, $4, $5          # CHECK: dmod $3, $4, $5     # encoding: [0x58,0xa4,0x19,0x58]
-        ddivu $3, $4, $5         # CHECK: ddivu $3, $4, $5    # encoding: [0x58,0xa4,0x19,0x98]
-        dmodu $3, $4, $5         # CHECK: dmodu $3, $4, $5    # encoding: [0x58,0xa4,0x19,0xd8]
-        add.s $f3, $f4, $f5      # CHECK: add.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x30]
-        add.d $f2, $f4, $f6      # CHECK: add.d $f2, $f4, $f6 # encoding: [0x54,0xc4,0x11,0x30]
-        sub.s $f3, $f4, $f5      # CHECK: sub.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0x70]
-        sub.d $f2, $f4, $f6      # CHECK: sub.d $f2, $f4, $f6 # encoding: [0x54,0xc4,0x11,0x70]
-        mul.s $f3, $f4, $f5      # CHECK: mul.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xb0]
-        mul.d $f2, $f4, $f6      # CHECK: mul.d $f2, $f4, $f6 # encoding: [0x54,0xc4,0x11,0xb0]
-        div.s $f3, $f4, $f5      # CHECK: div.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x18,0xf0]
-        div.d $f2, $f4, $f6      # CHECK: div.d $f2, $f4, $f6 # encoding: [0x54,0xc4,0x11,0xf0]
-        maddf.s $f3, $f4, $f5    # CHECK: maddf.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x19,0xb8]
-        maddf.d $f3, $f4, $f5    # CHECK: maddf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xb8]
-        msubf.s $f3, $f4, $f5    # CHECK: msubf.s $f3, $f4, $f5 # encoding: [0x54,0xa4,0x19,0xf8]
-        msubf.d $f3, $f4, $f5    # CHECK: msubf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xf8]
-        mov.s $f6, $f7           # CHECK: mov.s $f6, $f7      # encoding: [0x54,0xc7,0x00,0x7b]
-        mov.d $f4, $f6           # CHECK: mov.d $f4, $f6      # encoding: [0x54,0x86,0x20,0x7b]
-        neg.s $f6, $f7           # CHECK: neg.s $f6, $f7      # encoding: [0x54,0xc7,0x0b,0x7b]
-        neg.d $f4, $f6           # CHECK: neg.d $f4, $f6      # encoding: [0x54,0x86,0x2b,0x7b]
-        max.s $f5, $f4, $f3      # CHECK: max.s $f5, $f4, $f3      # encoding: [0x54,0x64,0x28,0x0b]
-        max.d $f5, $f4, $f3      # CHECK: max.d $f5, $f4, $f3      # encoding: [0x54,0x64,0x2a,0x0b]
-        maxa.s $f5, $f4, $f3     # CHECK: maxa.s $f5, $f4, $f3     # encoding: [0x54,0x64,0x28,0x2b]
-        maxa.d $f5, $f4, $f3     # CHECK: maxa.d $f5, $f4, $f3     # encoding: [0x54,0x64,0x2a,0x2b]
-        min.s $f5, $f4, $f3      # CHECK: min.s $f5, $f4, $f3      # encoding: [0x54,0x64,0x28,0x03]
-        min.d $f5, $f4, $f3      # CHECK: min.d $f5, $f4, $f3      # encoding: [0x54,0x64,0x2a,0x03]
-        mina.s $f5, $f4, $f3     # CHECK: mina.s $f5, $f4, $f3     # encoding: [0x54,0x64,0x28,0x23]
-        mina.d $f5, $f4, $f3     # CHECK: mina.d $f5, $f4, $f3     # encoding: [0x54,0x64,0x2a,0x23]
-        cmp.af.s $f2, $f3, $f4   # CHECK: cmp.af.s $f2, $f3, $f4   # encoding: [0x54,0x83,0x10,0x05]
-        cmp.af.d $f2, $f3, $f4   # CHECK: cmp.af.d $f2, $f3, $f4   # encoding: [0x54,0x83,0x10,0x15]
-        cmp.un.s $f2, $f3, $f4   # CHECK: cmp.un.s $f2, $f3, $f4   # encoding: [0x54,0x83,0x10,0x45]
-        cmp.un.d $f2, $f3, $f4   # CHECK: cmp.un.d $f2, $f3, $f4   # encoding: [0x54,0x83,0x10,0x55]
-        cmp.eq.s $f2, $f3, $f4   # CHECK: cmp.eq.s $f2, $f3, $f4   # encoding: [0x54,0x83,0x10,0x85]
-        cmp.eq.d $f2, $f3, $f4   # CHECK: cmp.eq.d $f2, $f3, $f4   # encoding: [0x54,0x83,0x10,0x95]
-        cmp.ueq.s $f2, $f3, $f4  # CHECK: cmp.ueq.s $f2, $f3, $f4  # encoding: [0x54,0x83,0x10,0xc5]
-        cmp.ueq.d $f2, $f3, $f4  # CHECK: cmp.ueq.d $f2, $f3, $f4  # encoding: [0x54,0x83,0x10,0xd5]
-        cmp.lt.s $f2, $f3, $f4   # CHECK: cmp.lt.s  $f2, $f3, $f4  # encoding: [0x54,0x83,0x11,0x05]
-        cmp.lt.d $f2, $f3, $f4   # CHECK: cmp.lt.d  $f2, $f3, $f4  # encoding: [0x54,0x83,0x11,0x15]
-        cmp.ult.s $f2, $f3, $f4  # CHECK: cmp.ult.s $f2, $f3, $f4  # encoding: [0x54,0x83,0x11,0x45]
-        cmp.ult.d $f2, $f3, $f4  # CHECK: cmp.ult.d $f2, $f3, $f4  # encoding: [0x54,0x83,0x11,0x55]
-        cmp.le.s $f2, $f3, $f4   # CHECK: cmp.le.s  $f2, $f3, $f4  # encoding: [0x54,0x83,0x11,0x85]
-        cmp.le.d $f2, $f3, $f4   # CHECK: cmp.le.d  $f2, $f3, $f4  # encoding: [0x54,0x83,0x11,0x95]
-        cmp.ule.s $f2, $f3, $f4  # CHECK: cmp.ule.s $f2, $f3, $f4  # encoding: [0x54,0x83,0x11,0xc5]
-        cmp.ule.d $f2, $f3, $f4  # CHECK: cmp.ule.d $f2, $f3, $f4  # encoding: [0x54,0x83,0x11,0xd5]
-        cmp.saf.s $f2, $f3, $f4  # CHECK: cmp.saf.s $f2, $f3, $f4  # encoding: [0x54,0x83,0x12,0x05]
-        cmp.saf.d $f2, $f3, $f4  # CHECK: cmp.saf.d $f2, $f3, $f4  # encoding: [0x54,0x83,0x12,0x15]
-        cmp.sun.s $f2, $f3, $f4  # CHECK: cmp.sun.s $f2, $f3, $f4  # encoding: [0x54,0x83,0x12,0x45]
-        cmp.sun.d $f2, $f3, $f4  # CHECK: cmp.sun.d $f2, $f3, $f4  # encoding: [0x54,0x83,0x12,0x55]
-        cmp.seq.s $f2, $f3, $f4  # CHECK: cmp.seq.s $f2, $f3, $f4  # encoding: [0x54,0x83,0x12,0x85]
-        cmp.seq.d $f2, $f3, $f4  # CHECK: cmp.seq.d $f2, $f3, $f4  # encoding: [0x54,0x83,0x12,0x95]
-        cmp.sueq.s $f2, $f3, $f4 # CHECK: cmp.sueq.s $f2, $f3, $f4 # encoding: [0x54,0x83,0x12,0xc5]
-        cmp.sueq.d $f2, $f3, $f4 # CHECK: cmp.sueq.d $f2, $f3, $f4 # encoding: [0x54,0x83,0x12,0xd5]
-        cmp.slt.s $f2, $f3, $f4  # CHECK: cmp.slt.s $f2, $f3, $f4  # encoding: [0x54,0x83,0x13,0x05]
-        cmp.slt.d $f2, $f3, $f4  # CHECK: cmp.slt.d $f2, $f3, $f4  # encoding: [0x54,0x83,0x13,0x15]
-        cmp.sult.s $f2, $f3, $f4 # CHECK: cmp.sult.s $f2, $f3, $f4 # encoding: [0x54,0x83,0x13,0x45]
-        cmp.sult.d $f2, $f3, $f4 # CHECK: cmp.sult.d $f2, $f3, $f4 # encoding: [0x54,0x83,0x13,0x55]
-        cmp.sle.s $f2, $f3, $f4  # CHECK: cmp.sle.s $f2, $f3, $f4  # encoding: [0x54,0x83,0x13,0x85]
-        cmp.sle.d $f2, $f3, $f4  # CHECK: cmp.sle.d $f2, $f3, $f4  # encoding: [0x54,0x83,0x13,0x95]
-        cmp.sule.s $f2, $f3, $f4 # CHECK: cmp.sule.s $f2, $f3, $f4 # encoding: [0x54,0x83,0x13,0xc5]
-        cmp.sule.d $f2, $f3, $f4 # CHECK: cmp.sule.d $f2, $f3, $f4 # encoding: [0x54,0x83,0x13,0xd5]
-        cvt.l.s $f3, $f4         # CHECK: cvt.l.s $f3, $f4         # encoding: [0x54,0x64,0x01,0x3b]
-        cvt.l.d $f3, $f4         # CHECK: cvt.l.d $f3, $f4         # encoding: [0x54,0x64,0x41,0x3b]
-        cvt.w.s $f3, $f4         # CHECK: cvt.w.s $f3, $f4         # encoding: [0x54,0x64,0x09,0x3b]
-        cvt.w.d $f3, $f4         # CHECK: cvt.w.d $f3, $f4         # encoding: [0x54,0x64,0x49,0x3b]
-        cvt.d.s $f2, $f4         # CHECK: cvt.d.s $f2, $f4         # encoding: [0x54,0x44,0x13,0x7b]
-        cvt.d.w $f2, $f4         # CHECK: cvt.d.w $f2, $f4         # encoding: [0x54,0x44,0x33,0x7b]
-        cvt.d.l $f2, $f4         # CHECK: cvt.d.l $f2, $f4         # encoding: [0x54,0x44,0x53,0x7b]
-        cvt.s.d $f2, $f4         # CHECK: cvt.s.d $f2, $f4         # encoding: [0x54,0x44,0x1b,0x7b]
-        cvt.s.w $f3, $f4         # CHECK: cvt.s.w $f3, $f4         # encoding: [0x54,0x64,0x3b,0x7b]
-        cvt.s.l $f3, $f4         # CHECK: cvt.s.l $f3, $f4         # encoding: [0x54,0x64,0x5b,0x7b]
-        teq $8, $9               # CHECK: teq $8, $9          # encoding: [0x01,0x28,0x00,0x3c]
-        teq $5, $7, 15           # CHECK: teq $5, $7, 15      # encoding: [0x00,0xe5,0xf0,0x3c]
-        tge $7, $10              # CHECK: tge $7, $10         # encoding: [0x01,0x47,0x02,0x3c]
-        tge $7, $19, 15          # CHECK: tge $7, $19, 15     # encoding: [0x02,0x67,0xf2,0x3c]
-        tgeu $22, $gp            # CHECK: tgeu $22, $gp       # encoding: [0x03,0x96,0x04,0x3c]
-        tgeu $20, $14, 15        # CHECK: tgeu $20, $14, 15   # encoding: [0x01,0xd4,0xf4,0x3c]
-        tlt $15, $13             # CHECK: tlt $15, $13        # encoding: [0x01,0xaf,0x08,0x3c]
-        tlt $2, $19, 15          # CHECK: tlt $2, $19, 15     # encoding: [0x02,0x62,0xf8,0x3c]
-        tltu $11, $16            # CHECK: tltu $11, $16       # encoding: [0x02,0x0b,0x0a,0x3c]
-        tltu $16, $sp, 15        # CHECK: tltu $16, $sp, 15   # encoding: [0x03,0xb0,0xfa,0x3c]
-        tne $6, $17              # CHECK: tne $6, $17         # encoding: [0x02,0x26,0x0c,0x3c]
-        tne $7, $8, 15           # CHECK: tne $7, $8, 15      # encoding: [0x01,0x07,0xfc,0x3c]
-        cachee 1, 8($5)          # CHECK: cachee 1, 8($5)     # encoding: [0x60,0x25,0xa6,0x08]
-        wrpgpr $3, $4            # CHECK: wrpgpr $3, $4       # encoding: [0x00,0x64,0xf1,0x7c]
-        wsbh $3, $4              # CHECK: wsbh $3, $4         # encoding: [0x00,0x64,0x7b,0x3c]
-        jalr $9                  # CHECK: jalr $9             # encoding: [0x45,0x2b]
-        jrc16 $9                 # CHECK: jrc16 $9            # encoding: [0x45,0x23]
-        jrcaddiusp 20            # CHECK: jrcaddiusp 20       # encoding: [0x44,0xb3]
-        break16 8                # CHECK: break16 8                # encoding: [0x46,0x1b]
-        li16 $3, -1              # CHECK: li16 $3, -1              # encoding: [0xed,0xff]
-        move16 $3, $5            # CHECK: move16 $3, $5            # encoding: [0x0c,0x65]
-        sdbbp16 8                # CHECK: sdbbp16 8                # encoding: [0x46,0x3b]
-        subu16 $5, $16, $3       # CHECK: subu16 $5, $16, $3       # encoding: [0x04,0x3b]
-        xor16 $17, $5            # CHECK: xor16 $17, $5            # encoding: [0x44,0xd8]
-        lwm $16, $17, $ra, 8($sp)   # CHECK: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x22]
-        lwm16 $16, $17, $ra, 8($sp) # CHECK: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x22]
-        sb16 $3, 4($16)          # CHECK: sb16 $3, 4($16)     # encoding: [0x89,0x84]
-        sh16 $4, 8($17)          # CHECK: sh16 $4, 8($17)     # encoding: [0xaa,0x14]
-        sw $4, 124($sp)          # CHECK: sw $4, 124($sp)     # encoding: [0xc8,0x9f]
-        sw16 $4, 4($17)          # CHECK: sw16 $4, 4($17)     # encoding: [0xea,0x11]
-        sw16 $0, 4($17)          # CHECK: sw16 $zero, 4($17)  # encoding: [0xe8,0x11]
-        swm $16, $17, $ra, 8($sp)   # CHECK: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x2a]
-        swm16 $16, $17, $ra, 8($sp) # CHECK: swm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x2a]
-        recip.s $f2, $f4         # CHECK: recip.s $f2, $f4    # encoding: [0x54,0x44,0x12,0x3b]
-        recip.d $f2, $f4         # CHECK: recip.d $f2, $f4    # encoding: [0x54,0x44,0x52,0x3b]
-        rint.s $f2, $f4          # CHECK: rint.s $f2, $f4     # encoding: [0x54,0x82,0x00,0x20]
-        rint.d $f2, $f4          # CHECK: rint.d $f2, $f4     # encoding: [0x54,0x82,0x02,0x20]
-        round.l.s $f2, $f4       # CHECK: round.l.s $f2, $f4  # encoding: [0x54,0x44,0x33,0x3b]
-        round.l.d $f2, $f4       # CHECK: round.l.d $f2, $f4  # encoding: [0x54,0x44,0x73,0x3b]
-        round.w.s $f2, $f4       # CHECK: round.w.s $f2, $f4  # encoding: [0x54,0x44,0x3b,0x3b]
-        round.w.d $f2, $f4       # CHECK: round.w.d $f2, $f4  # encoding: [0x54,0x44,0x7b,0x3b]
-        sel.s $f1, $f1, $f2      # CHECK: sel.s $f1, $f1, $f2 # encoding: [0x54,0x41,0x08,0xb8]
-        sel.d $f0, $f2, $f4      # CHECK: sel.d $f0, $f2, $f4 # encoding: [0x54,0x82,0x02,0xb8]
-        seleqz.s $f1, $f2, $f3   # CHECK: seleqz.s $f1, $f2, $f3  # encoding: [0x54,0x62,0x08,0x38]
-        seleqz.d $f2, $f4, $f8   # CHECK: seleqz.d $f2, $f4, $f8  # encoding: [0x55,0x04,0x12,0x38]
-        selnez.s $f1, $f2, $f3   # CHECK: selnez.s $f1, $f2, $f3  # encoding: [0x54,0x62,0x08,0x78]
-        selnez.d $f2, $f4, $f8   # CHECK: selnez.d $f2, $f4, $f8  # encoding: [0x55,0x04,0x12,0x78]
-        class.s $f2, $f3         # CHECK: class.s $f2, $f3        # encoding: [0x54,0x62,0x00,0x60]
-        class.d $f2, $f4         # CHECK: class.d $f2, $f4        # encoding: [0x54,0x82,0x02,0x60]
-        deret                    # CHECK: deret                   # encoding: [0x00,0x00,0xe3,0x7c]
-        di                       # CHECK: di                      # encoding: [0x00,0x00,0x47,0x7c]
-        di $0                    # CHECK: di                      # encoding: [0x00,0x00,0x47,0x7c]
-        di $15                   # CHECK: di $15                  # encoding: [0x00,0x0f,0x47,0x7c]
-        ceil.l.s $f1, $f3        # CHECK: ceil.l.s $f1, $f3       # encoding: [0x54,0x23,0x13,0x3b]
-        ceil.l.d $f1, $f3        # CHECK: ceil.l.d $f1, $f3       # encoding: [0x54,0x23,0x53,0x3b]
-        floor.l.s $f1, $f3       # CHECK: floor.l.s $f1, $f3      # encoding: [0x54,0x23,0x03,0x3b]
-        floor.l.d $f1, $f3       # CHECK: floor.l.d $f1, $f3      # encoding: [0x54,0x23,0x43,0x3b]
-        tlbinv                   # CHECK: tlbinv                  # encoding: [0x00,0x00,0x43,0x7c]
-        tlbinvf                  # CHECK: tlbinvf                 # encoding: [0x00,0x00,0x53,0x7c]
-        dinsu $4, $2, 32, 5      # CHECK: dinsu $4, $2, 32, 5     # encoding: [0x58,0x82,0x20,0x34]
-        dinsm $4, $2, 3, 5       # CHECK: dinsm $4, $2, 3, 5      # encoding: [0x58,0x82,0x38,0xc4]
-        dins $4, $2, 3, 5        # CHECK: dins $4, $2, 3, 5       # encoding: [0x58,0x82,0x38,0xcc]
-        lh $2, 8($4)             # CHECK: lh $2, 8($4)            # encoding: [0x3c,0x44,0x00,0x08]
-        lhe $4, 8($2)            # CHECK: lhe $4, 8($2)           # encoding: [0x60,0x82,0x6a,0x08]
-        lhu $4, 8($2)            # CHECK: lhu $4, 8($2)           # encoding: [0x34,0x82,0x00,0x08]
-        lhue $4, 8($2)           # CHECK: lhue $4, 8($2)          # encoding: [0x60,0x82,0x62,0x08]
-        mtc0 $5, $9              # CHECK: mtc0 $5, $9, 0          # encoding: [0x00,0xa9,0x02,0xfc]
-        mtc0 $1, $2, 7           # CHECK: mtc0 $1, $2, 7          # encoding: [0x00,0x22,0x3a,0xfc]
-        mtc1 $3, $f4             # CHECK: mtc1 $3, $f4            # encoding: [0x54,0x64,0x28,0x3b]
-        mtc2 $5, $6              # CHECK: mtc2 $5, $6             # encoding: [0x00,0xa6,0x5d,0x3c]
-        mthc0 $7, $8             # CHECK: mthc0 $7, $8, 0         # encoding: [0x00,0xe8,0x02,0xf4]
-        mthc0 $9, $10, 1         # CHECK: mthc0 $9, $10, 1        # encoding: [0x01,0x2a,0x0a,0xf4]
-        mthc1 $11, $f12          # CHECK: mthc1 $11, $f12         # encoding: [0x55,0x6c,0x38,0x3b]
-        mthc2 $13, $14           # CHECK: mthc2 $13, $14          # encoding: [0x01,0xae,0x9d,0x3c]
-        dmtc0 $15, $16           # CHECK: dmtc0 $15, $16, 0       # encoding: [0x59,0xf0,0x02,0xfc]
-        dmtc0 $17, $18, 5        # CHECK: dmtc0 $17, $18, 5       # encoding: [0x5a,0x32,0x2a,0xfc]
-        dmtc1 $19, $f20          # CHECK: dmtc1 $19, $f20         # encoding: [0x56,0x74,0x2c,0x3b]
-        dmtc2 $21, $22           # CHECK: dmtc2 $21, $22          # encoding: [0x02,0xb6,0x7d,0x3c]
-        dmfc0 $18, $17           # CHECK: dmfc0 $18, $17, 0       # encoding: [0x5a,0x51,0x00,0xfc]
-        dmfc0 $9, $1, 1          # CHECK: dmfc0 $9, $1, 1         # encoding: [0x59,0x21,0x08,0xfc]
-        dmfc1 $9, $f4            # CHECK: dmfc1 $9, $f4           # encoding: [0x55,0x24,0x24,0x3b]
-        dmfc2 $14, $18           # CHECK: dmfc2 $14, $18          # encoding: [0x01,0xd2,0x6d,0x3c]
-        dadd $9, $6, $7          # CHECK: dadd $9, $6, $7         # encoding: [0x58,0xe6,0x49,0x10]
-        dadd $s3, $at, $ra       # CHECK: dadd $19, $1, $ra       # encoding: [0x5b,0xe1,0x99,0x10]
-        daddiu $24, $2, 18079    # CHECK: daddiu $24, $2, 18079   # encoding: [0x5f,0x02,0x46,0x9f]
-        daddiu $9, $6, -15001    # CHECK: daddiu $9, $6, -15001   # encoding: [0x5d,0x26,0xc5,0x67]
-        daddiu $9, -15001        # CHECK: daddiu $9, $9, -15001   # encoding: [0x5d,0x29,0xc5,0x67]
-        daddiu $9, $3, 8 * 4     # CHECK: daddiu $9, $3, 32       # encoding: [0x5d,0x23,0x00,0x20]
-        daddiu $9, $3, (8 * 4)   # CHECK: daddiu $9, $3, 32       # encoding: [0x5d,0x23,0x00,0x20]
-        daddiu $k0, $s6, -4586   # CHECK: daddiu $26, $22, -4586  # encoding: [0x5f,0x56,0xee,0x16]
-        daddiu $15, $11, -5025   # CHECK: daddiu $15, $11, -5025  # encoding: [0x5d,0xeb,0xec,0x5f]
-        daddiu $14, $14, 4586    # CHECK: daddiu $14, $14, 4586   # encoding: [0x5d,0xce,0x11,0xea]
-        daddiu $19, $19, 26943   # CHECK: daddiu $19, $19, 26943  # encoding: [0x5e,0x73,0x69,0x3f]
-        daddiu $11, $26, 31949   # CHECK: daddiu $11, $26, 31949  # encoding: [0x5d,0x7a,0x7c,0xcd]
-        daddiu $sp, $sp, -32     # CHECK: daddiu $sp, $sp, -32    # encoding: [0x5f,0xbd,0xff,0xe0]
-        daddu $26, $1, $11       # CHECK: daddu $26, $1, $11      # encoding: [0x59,0x61,0xd1,0x50]
-        daddu $19, $1, $ra       # CHECK: daddu $19, $1, $ra      # encoding: [0x5b,0xe1,0x99,0x50]
-        daddu $9, $6, $7         # CHECK: daddu $9, $6, $7        # encoding: [0x58,0xe6,0x49,0x50]
-        daddu $9, $3             # CHECK: daddu $9, $9, $3        # encoding: [0x58,0x69,0x49,0x50]
-        daddu $9, $6, -15001     # CHECK: daddiu $9, $6, -15001   # encoding: [0x5d,0x26,0xc5,0x67]
-        daddu $9, 10             # CHECK: daddiu $9, $9, 10       # encoding: [0x5d,0x29,0x00,0x0a]
-        daddu $19, 26943         # CHECK: daddiu $19, $19, 26943  # encoding: [0x5e,0x73,0x69,0x3f]
-        daddu $24, $2, 18079     # CHECK: daddiu $24, $2, 18079   # encoding: [0x5f,0x02,0x46,0x9f]
-        dsubu $3, 5              # CHECK: daddiu $3, $3, -5       # encoding: [0x5c,0x63,0xff,0xfb]
-        dsubu $3, $4, 5          # CHECK: daddiu $3, $4, -5       # encoding: [0x5c,0x64,0xff,0xfb]
-        tlbp                     # CHECK: tlbp                    # encoding: [0x00,0x00,0x03,0x7c]
-        tlbr                     # CHECK: tlbr                    # encoding: [0x00,0x00,0x13,0x7c]
-        tlbwi                    # CHECK: tlbwi                   # encoding: [0x00,0x00,0x23,0x7c]
-        tlbwr                    # CHECK: tlbwr                   # encoding: [0x00,0x00,0x33,0x7c]
-        dvp                      # CHECK: dvp $zero               # encoding: [0x00,0x00,0x19,0x7c]
-        dvp $4                   # CHECK: dvp $4                  # encoding: [0x00,0x04,0x19,0x7c]
-        evp                      # CHECK: evp $zero               # encoding: [0x00,0x00,0x39,0x7c]
-        evp $4                   # CHECK: evp $4                  # encoding: [0x00,0x04,0x39,0x7c]
-        jalrc.hb $4              # CHECK: jalrc.hb $4             # encoding: [0x03,0xe4,0x1f,0x3c]
-        jalrc.hb $4, $5          # CHECK: jalrc.hb $4, $5         # encoding: [0x00,0x85,0x1f,0x3c]
-        sllv $2, $3, $5          # CHECK: sllv $2, $3, $5         # encoding: [0x00,0x65,0x10,0x10]
-        sra $4, $3, 7            # CHECK: sra $4, $3, 7           # encoding: [0x00,0x83,0x38,0x80]
-        srav $2, $3, $5          # CHECK: srav $2, $3, $5         # encoding: [0x00,0x65,0x10,0x90]
-        srl $4, $3, 7            # CHECK: srl $4, $3, 7           # encoding: [0x00,0x83,0x38,0x40]
-        srlv $2, $3, $5          # CHECK: srlv $2, $3, $5         # encoding: [0x00,0x65,0x10,0x50]
-        sll $2, $3, $5           # CHECK: sllv $2, $3, $5         # encoding: [0x00,0x65,0x10,0x10]
-        sra $2, $3, $5           # CHECK: srav $2, $3, $5         # encoding: [0x00,0x65,0x10,0x90]
-        srl $2, $3, $5           # CHECK: srlv $2, $3, $5         # encoding: [0x00,0x65,0x10,0x50]
-        sll $2, $3               # CHECK: sllv $2, $2, $3         # encoding: [0x00,0x43,0x10,0x10]
-        sra $2, $3               # CHECK: srav $2, $2, $3         # encoding: [0x00,0x43,0x10,0x90]
-        srl $2, $3               # CHECK: srlv $2, $2, $3         # encoding: [0x00,0x43,0x10,0x50]
-        sll $3, 7                # CHECK: sll $3, $3, 7           # encoding: [0x00,0x63,0x38,0x00]
-        sra $3, 7                # CHECK: sra $3, $3, 7           # encoding: [0x00,0x63,0x38,0x80]
-        srl $3, 7                # CHECK: srl $3, $3, 7           # encoding: [0x00,0x63,0x38,0x40]
-        dsub $1, $2, $3          # CHECK: dsub $1, $2, $3         # encoding: [0x58,0x62,0x09,0x90]
-        dsubu $3, $7, $15        # CHECK: dsubu $3, $7, $15       # encoding: [0x59,0xe7,0x19,0xd0]
-        dneg $7, $15             # CHECK: dneg $7, $15            # encoding: [0x59,0xe0,0x39,0x90]
-        dneg $10                 # CHECK: dneg $10, $10           # encoding: [0x59,0x40,0x51,0x90]
-        dnegu $1, $11            # CHECK: dnegu $1, $11           # encoding: [0x59,0x60,0x09,0xd0]
-        dnegu $5                 # CHECK: dnegu $5, $5            # encoding: [0x58,0xa0,0x29,0xd0]
-        mul $3, $4, $5           # CHECK: mul $3, $4, $5           # encoding: [0x00,0xa4,0x18,0x18]
-        muh $3, $4, $5           # CHECK: muh $3, $4, $5           # encoding: [0x00,0xa4,0x18,0x58]
-        mulu $3, $4, $5          # CHECK: mulu $3, $4, $5          # encoding: [0x00,0xa4,0x18,0x98]
-        muhu $3, $4, $5          # CHECK: muhu $3, $4, $5          # encoding: [0x00,0xa4,0x18,0xd8]
-        dmul $3, $4, $5          # CHECK: dmul $3, $4, $5          # encoding: [0x58,0xa4,0x18,0x18]
-        dmuh $3, $4, $5          # CHECK: dmuh $3, $4, $5          # encoding: [0x58,0xa4,0x18,0x58]
-        dmulu $3, $4, $5         # CHECK: dmulu $3, $4, $5         # encoding: [0x58,0xa4,0x18,0x98]
-        dmuhu $3, $4, $5         # CHECK: dmuhu $3, $4, $5         # encoding: [0x58,0xa4,0x18,0xd8]
-        lwp $16, 8($4)           # CHECK: lwp $16, 8($4)          # encoding: [0x22,0x04,0x10,0x08]
-        swp $16, 8($4)           # CHECK: swp $16, 8($4)          # encoding: [0x22,0x04,0x90,0x08]
-        dsbh $3, $4              # CHECK: dsbh $3, $4             # encoding: [0x58,0x64,0x7b,0x3c]
-        dshd $3, $4              # CHECK: dshd $3, $4             # encoding: [0x58,0x64,0xfb,0x3c]
-        dsll $3, $4, 5           # CHECK: dsll $3, $4, 5          # encoding: [0x58,0x64,0x28,0x00]
-        dsll32 $3, $4, 5         # CHECK: dsll32 $3, $4, 5        # encoding: [0x58,0x64,0x28,0x08]
-        dsllv $4, $5, $6         # CHECK: dsllv $4, $5, $6        # encoding: [0x58,0xa6,0x20,0x10]
-        dsra $4, $5, 5           # CHECK: dsra $4, $5, 5          # encoding: [0x58,0x85,0x28,0x80]
-        dsra32 $4, $5, 5         # CHECK: dsra32 $4, $5, 5        # encoding: [0x58,0x85,0x28,0x84]
-        dsrav $4, $5, $6         # CHECK: dsrav $4, $5, $6        # encoding: [0x58,0xa6,0x20,0x90]
-        bc1eqzc $f31, 4          # CHECK: bc1eqzc $f31, 4         # encoding: [0x41,0x1f,0x00,0x02]
-        bc1nezc $f31, 4          # CHECK: bc1nezc $f31, 4         # encoding: [0x41,0x3f,0x00,0x02]
-        bc2eqzc $31, 8           # CHECK: bc2eqzc $31, 8          # encoding: [0x41,0x5f,0x00,0x04]
-        bc2nezc $31, 8           # CHECK: bc2nezc $31, 8          # encoding: [0x41,0x7f,0x00,0x04]
-        and $3, 5                # CHECK: andi $3, $3, 5          # encoding: [0xd0,0x63,0x00,0x05]
-        and $3, $4, 5            # CHECK: andi $3, $4, 5          # encoding: [0xd0,0x64,0x00,0x05]
-        and $3, $4, $5           # CHECK: and $3, $4, $5          # encoding: [0x00,0xa4,0x1a,0x50]
-        andi $3, $4, 1234        # CHECK: andi $3, $4, 1234       # encoding: [0xd0,0x64,0x04,0xd2]
-        nor $3, $4, $5           # CHECK: nor $3, $4, $5          # encoding: [0x00,0xa4,0x1a,0xd0]
-        not $3, $4               # CHECK: not $3, $4              # encoding: [0x00,0x04,0x1a,0xd0]
-        not $3                   # CHECK: not $3, $3              # encoding: [0x00,0x03,0x1a,0xd0]
-        or $3, 5                 # CHECK: ori $3, $3, 5           # encoding: [0x50,0x63,0x00,0x05]
-        or $3, $4, 5             # CHECK: ori $3, $4, 5           # encoding: [0x50,0x64,0x00,0x05]
-        or $3, $4, $5            # CHECK: or $3, $4, $5           # encoding: [0x00,0xa4,0x1a,0x90]
-        ori $3, $4, 1234         # CHECK: ori $3, $4, 1234        # encoding: [0x50,0x64,0x04,0xd2]
-        xor $3, 5                # CHECK: xori $3, $3, 5          # encoding: [0x70,0x63,0x00,0x05]
-        xor $3, $4, 5            # CHECK: xori $3, $4, 5          # encoding: [0x70,0x64,0x00,0x05]
-        xor $3, $4, $5           # CHECK: xor $3, $4, $5          # encoding: [0x00,0xa4,0x1b,0x10]
-        xori $3, $4, 1234        # CHECK: xori $3, $4, 1234       # encoding: [0x70,0x64,0x04,0xd2]
-        dclo $1, $2              # CHECK: dclo $1, $2             # encoding: [0x58,0x22,0x4b,0x3c]
-        dclz $1, $2              # CHECK: dclz $1, $2             # encoding: [0x58,0x22,0x5b,0x3c]
-        drotr $5, $10, 8         # CHECK: drotr $5, $10, 8        # encoding: [0x58,0xaa,0x40,0xc0]
-        drotr32 $1, $2, 4        # CHECK: drotr32 $1, $2, 4       # encoding: [0x58,0x22,0x20,0xc8]
-        drotrv $3, $6, $4        # CHECK: drotrv $3, $6, $4       # encoding: [0x58,0xc4,0x18,0xd0]
-        ld $4, 5($2)             # CHECK: ld $4, 5($2)            # encoding: [0xdc,0x82,0x00,0x05]
-        lld $2, 3($8)            # CHECK: lld $2, 3($8)           # encoding: [0x60,0x48,0x70,0x03]
-        lwu $1, 10($2)           # CHECK: lwu $1, 10($2)          # encoding: [0x60,0x22,0xe0,0x0a]
-        sd $4, 5($3)             # CHECK: sd $4, 5($3)            # encoding: [0xd8,0x83,0x00,0x05]
-        dsrl $1, $2, 2           # CHECK: dsrl $1, $2, 2          # encoding: [0x58,0x22,0x10,0x40]
-        dsrl32 $3, $4, 5         # CHECK: dsrl32 $3, $4, 5        # encoding: [0x58,0x64,0x28,0x48]
-        dsrlv $1, $3, $3         # CHECK: dsrlv $1, $3, $3        # encoding: [0x58,0x63,0x08,0x50]
-        ldc1 $f7, 300($10)       # CHECK: ldc1 $f7, 300($10)      # encoding: [0xbc,0xea,0x01,0x2c]
-        ldc1 $f8, 300($10)       # CHECK: ldc1 $f8, 300($10)      # encoding: [0xbd,0x0a,0x01,0x2c]
-        ldc2 $11, 1023($12)      # CHECK: ldc2 $11, 1023($12)     # encoding: [0x21,0x6c,0x23,0xff]
-        lwc1 $f2, 32($5)         # CHECK: lwc1 $f2, 32($5)        # encoding: [0x9c,0x45,0x00,0x20]
-        lwc2 $1, 16($4)          # CHECK: lwc2 $1, 16($4)         # encoding: [0x20,0x24,0x00,0x10]
-        sdc1 $f7, 64($10)        # CHECK: sdc1 $f7, 64($10)       # encoding: [0xb8,0xea,0x00,0x40]
-        sdc1 $f8, 64($10)        # CHECK: sdc1 $f8, 64($10)       # encoding: [0xb9,0x0a,0x00,0x40]
-        sdc2 $2, 8($16)          # CHECK: sdc2 $2, 8($16)         # encoding: [0x20,0x50,0xa0,0x08]
-        swc1 $f6, 369($13)       # CHECK: swc1 $f6, 369($13)      # encoding: [0x98,0xcd,0x01,0x71]
-        swc2 $7, 777($17)        # CHECK: swc2 $7, 777($17)       # encoding: [0x20,0xf1,0x83,0x09]
-        cfc1 $1, $2              # CHECK: cfc1 $1, $2             # encoding: [0x54,0x22,0x10,0x3b]
-        cfc2 $3, $4              # CHECK: cfc2 $3, $4             # encoding: [0x00,0x64,0xcd,0x3c]
-        ctc1 $5, $6              # CHECK: ctc1 $5, $6             # encoding: [0x54,0xa6,0x18,0x3b]
-        ctc2 $7, $8              # CHECK: ctc2 $7, $8             # encoding: [0x00,0xe8,0xdd,0x3c]
-        bltzc $6, 128            # CHECK: bltzc $6, 128           # encoding: [0xd4,0xc6,0x00,0x20]
-        blezc $2, 256            # CHECK: blezc $2, 256           # encoding: [0xf4,0x40,0x00,0x40]
-        bgezc $16, 512           # CHECK: bgezc $16, 512          # encoding: [0xf6,0x10,0x00,0x80]
-        bgtzc $12, 1024          # CHECK: bgtzc $12, 1024         # encoding: [0xd5,0x80,0x01,0x00]
-        aui $3, $4, 256          # CHECK: aui $3, $4, 256         # encoding: [0x10,0x64,0x01,0x00]
-        dbitswap $3, $4          # CHECK: dbitswap $3, $4         # encoding: [0x58,0x83,0x0b,0x3c]
-        dlsa $3, $4, $5, 3       # CHECK: dlsa $3, $4, $5, 3      # encoding: [0x58,0x64,0x2d,0x04]
-        lwupc $2, 268            # CHECK: lwupc $2, 268           # encoding: [0x78,0x50,0x00,0x43]
-        lwupc $2, bar            # CHECK: lwupc $2, bar           # encoding: [0x78,0b01010AAA,A,A]
-        lwupc $2, bar+268        # CHECK: lwupc $2, bar+268       # encoding: [0x78,0b01010AAA,A,A]
-
-1:
diff --git a/external/bsd/llvm/dist/llvm/test/MC/X86/sgx-encoding.s b/external/bsd/llvm/dist/llvm/test/MC/X86/sgx-encoding.s
deleted file mode 100644
index e6ae8c9beb18..000000000000
--- a/external/bsd/llvm/dist/llvm/test/MC/X86/sgx-encoding.s
+++ /dev/null
@@ -1,9 +0,0 @@
-// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
-
-// CHECK: encls
-// CHECK: encoding: [0x0f,0x01,0xcf]
-	encls
-
-// CHECK: enclu
-// CHECK: encoding: [0x0f,0x01,0xd7]
-	enclu
diff --git a/external/bsd/llvm/dist/llvm/test/Object/AMDGPU/elf-definitions.yaml b/external/bsd/llvm/dist/llvm/test/Object/AMDGPU/elf-definitions.yaml
deleted file mode 100644
index 07fe8c62dc47..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Object/AMDGPU/elf-definitions.yaml
+++ /dev/null
@@ -1,21 +0,0 @@
-# RUN: yaml2obj %s > %t.o
-# RUN: llvm-readobj -s -file-headers %t.o | FileCheck %s
-
-# CHECK: Format: ELF64-amdgpu-hsacobj
-# CHECK: Arch: amdgcn
-# CHECK: ElfHeader {
-# CHECK:   Ident {
-# CHECK:     OS/ABI: AMDGPU_HSA (0x40)
-# CHECK:     ABIVersion: 0
-# CHECK:   }
-# CHECK:   Machine: EM_AMDGPU (0xE0)
-# CHECK: }
-
---- !ELF
-FileHeader:
-  Class:   ELFCLASS64
-  Data:    ELFDATA2LSB
-  Type:    ET_REL
-  Machine: EM_AMDGPU
-  OSABI:   ELFOSABI_AMDGPU_HSA
-...
diff --git a/external/bsd/llvm/dist/llvm/test/Object/Inputs/invalid-sections-address-alignment.x86-64 b/external/bsd/llvm/dist/llvm/test/Object/Inputs/invalid-sections-address-alignment.x86-64
deleted file mode 100644
index c0653d1d1b3e249110cef4ae9f212f6022f5f85c..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 473
zcmb<-^>JfjWMqH=Mg}_u1P?08%D^xarT|DgfY}ZVtZ<bENV3?O>_FikK&)4iT2aD~
zmY>g%mzoiuR+Ok$TvAk$n8cu0T$u}`K}--(0Fw+X5Q+>^6sU(8q)!4xvv>uRn~EaL
z0QU+^7!(K~%mx#93}M*8_-Hh`OSysaK>Y<wK-vLGEsTw>9%L6XkOgwk)qvzZkQD*h
OAblV^IH2M%?*afcSro7U

diff --git a/external/bsd/llvm/dist/llvm/test/ObjectYAML/CodeView/guid.yaml b/external/bsd/llvm/dist/llvm/test/ObjectYAML/CodeView/guid.yaml
deleted file mode 100644
index 8d8d0142c5e3..000000000000
--- a/external/bsd/llvm/dist/llvm/test/ObjectYAML/CodeView/guid.yaml
+++ /dev/null
@@ -1,59 +0,0 @@
-# RUN: yaml2obj %s | obj2yaml | FileCheck %s
-
---- !COFF
-header:
-  Machine:         IMAGE_FILE_MACHINE_AMD64
-  Characteristics: [  ]
-sections:
-  - Name:            '.debug$T'
-    Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
-    Alignment:       1
-    Types:
-      - Kind:            LF_TYPESERVER2
-        TypeServer2:
-          Guid:            '{01DF191B-22BF-6B42-96CE-5258B8329FE5}'
-          Age:             24
-          Name:            'C:\src\llvm-project\build\vc140.pdb'
-symbols:
-  - Name:            '.debug$T'
-    Value:           0
-    SectionNumber:   1
-    SimpleType:      IMAGE_SYM_TYPE_NULL
-    ComplexType:     IMAGE_SYM_DTYPE_NULL
-    StorageClass:    IMAGE_SYM_CLASS_STATIC
-    SectionDefinition:
-      Length:          64
-      NumberOfRelocations: 0
-      NumberOfLinenumbers: 0
-      CheckSum:        0
-      Number:          0
-...
-
-# CHECK: --- !COFF
-# CHECK: header:
-# CHECK:   Machine:         IMAGE_FILE_MACHINE_AMD64
-# CHECK:   Characteristics: [  ]
-# CHECK: sections:
-# CHECK:   - Name:            '.debug$T'
-# CHECK:     Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_DISCARDABLE, IMAGE_SCN_MEM_READ ]
-# CHECK:     Alignment:       1
-# CHECK:     Types:
-# CHECK:       - Kind:            LF_TYPESERVER2
-# CHECK:         TypeServer2:
-# CHECK:           Guid:            '{01DF191B-22BF-6B42-96CE-5258B8329FE5}'
-# CHECK:           Age:             24
-# CHECK:           Name:            'C:\src\llvm-project\build\vc140.pdb'
-# CHECK: symbols:
-# CHECK:   - Name:            '.debug$T'
-# CHECK:     Value:           0
-# CHECK:     SectionNumber:   1
-# CHECK:     SimpleType:      IMAGE_SYM_TYPE_NULL
-# CHECK:     ComplexType:     IMAGE_SYM_DTYPE_NULL
-# CHECK:     StorageClass:    IMAGE_SYM_CLASS_STATIC
-# CHECK:     SectionDefinition:
-# CHECK:       Length:          64
-# CHECK:       NumberOfRelocations: 0
-# CHECK:       NumberOfLinenumbers: 0
-# CHECK:       CheckSum:        0
-# CHECK:       Number:          0
-# CHECK: ...
diff --git a/external/bsd/llvm/dist/llvm/test/Other/Inputs/invariant.group.barrier.ll b/external/bsd/llvm/dist/llvm/test/Other/Inputs/invariant.group.barrier.ll
deleted file mode 100644
index 565b0989ecb7..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Other/Inputs/invariant.group.barrier.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; RUN: opt -S -gvn < %s | FileCheck %s
-; RUN: opt -S -newgvn < %s | FileCheck %s
-; RUN: opt -S -O3 < %s | FileCheck %s
-
-; This test check if optimizer is not proving equality based on mustalias
-; CHECK-LABEL: define void @dontProveEquality(i8* %a) 
-define void @dontProveEquality(i8* %a) {
-  %b = call i8* @llvm.invariant.group.barrier(i8* %a)
-  %r = i1 icmp eq i8* %b, i8* %a
-;CHECK: call void @use(%r)
-  call void @use(%r)
-}
-
-declare void @use(i1)
-declare i8* @llvm.invariant.group.barrier(i8 *)
diff --git a/external/bsd/llvm/dist/llvm/test/Other/invariant.group.barrier.ll b/external/bsd/llvm/dist/llvm/test/Other/invariant.group.barrier.ll
deleted file mode 100644
index 5b9b54f784f5..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Other/invariant.group.barrier.ll
+++ /dev/null
@@ -1,62 +0,0 @@
-; RUN: opt -S -early-cse < %s | FileCheck %s
-; RUN: opt -S -gvn < %s | FileCheck %s
-; RUN: opt -S -newgvn < %s | FileCheck %s
-; RUN: opt -S -O3 < %s | FileCheck %s
-
-; These tests checks if passes with CSE functionality can do CSE on
-; invariant.group.barrier, that is prohibited if there is a memory clobber
-; between barriers call.
-
-; CHECK-LABEL: define i8 @optimizable()
-define i8 @optimizable() {
-entry:
-    %ptr = alloca i8
-    store i8 42, i8* %ptr, !invariant.group !0
-; CHECK: call i8* @llvm.invariant.group.barrier
-    %ptr2 = call i8* @llvm.invariant.group.barrier(i8* %ptr)
-; CHECK-NOT: call i8* @llvm.invariant.group.barrier
-    %ptr3 = call i8* @llvm.invariant.group.barrier(i8* %ptr)
-; CHECK: call void @clobber(i8* {{.*}}%ptr)
-    call void @clobber(i8* %ptr)
-
-; CHECK: call void @use(i8* {{.*}}%ptr2)
-    call void @use(i8* %ptr2)
-; CHECK: call void @use(i8* {{.*}}%ptr2)
-    call void @use(i8* %ptr3)
-; CHECK: load i8, i8* %ptr2, {{.*}}!invariant.group
-    %v = load i8, i8* %ptr3, !invariant.group !0
-
-    ret i8 %v
-}
-
-; CHECK-LABEL: define i8 @unoptimizable()
-define i8 @unoptimizable() {
-entry:
-    %ptr = alloca i8
-    store i8 42, i8* %ptr, !invariant.group !0
-; CHECK: call i8* @llvm.invariant.group.barrier
-    %ptr2 = call i8* @llvm.invariant.group.barrier(i8* %ptr)
-    call void @clobber(i8* %ptr)
-; CHECK: call i8* @llvm.invariant.group.barrier
-    %ptr3 = call i8* @llvm.invariant.group.barrier(i8* %ptr)
-; CHECK: call void @clobber(i8* {{.*}}%ptr)
-    call void @clobber(i8* %ptr)
-; CHECK: call void @use(i8* {{.*}}%ptr2)
-    call void @use(i8* %ptr2)
-; CHECK: call void @use(i8* {{.*}}%ptr3)
-    call void @use(i8* %ptr3)
-; CHECK: load i8, i8* %ptr3, {{.*}}!invariant.group
-    %v = load i8, i8* %ptr3, !invariant.group !0
-
-    ret i8 %v
-}
-
-declare void @use(i8* readonly)
-
-declare void @clobber(i8*)
-; CHECK: Function Attrs: argmemonly nounwind readonly
-; CHECK-NEXT: declare i8* @llvm.invariant.group.barrier(i8*)
-declare i8* @llvm.invariant.group.barrier(i8*)
-
-!0 = !{}
-
diff --git a/external/bsd/llvm/dist/llvm/test/ThinLTO/X86/select_right_alias_definition.ll b/external/bsd/llvm/dist/llvm/test/ThinLTO/X86/select_right_alias_definition.ll
deleted file mode 100644
index 48ae4cfa394a..000000000000
--- a/external/bsd/llvm/dist/llvm/test/ThinLTO/X86/select_right_alias_definition.ll
+++ /dev/null
@@ -1,27 +0,0 @@
-; RUN: opt -module-summary %s -o %t_main.bc
-; RUN: opt -module-summary %p/Inputs/select_right_alias_definition1.ll -o %t1.bc
-; RUN: opt -module-summary %p/Inputs/select_right_alias_definition2.ll -o %t2.bc
-
-; Make sure that we always select the right definition for alia foo, whatever
-; order the files are linked in.
-
-; Try with one order
-; RUN: llvm-lto -thinlto-action=thinlink -o %t.index1.bc %t_main.bc %t1.bc %t2.bc
-; RUN: llvm-lto -thinlto-action=import -thinlto-index %t.index1.bc %t_main.bc -o - | llvm-dis -o - | FileCheck %s --check-prefix=IMPORT
-
-; Try with the other order (reversing %t1.bc and %t2.bc)
-; RUN: llvm-lto -thinlto-action=thinlink -o %t.index2.bc %t_main.bc %t2.bc %t1.bc
-; RUN: llvm-lto -thinlto-action=import -thinlto-index %t.index2.bc %t_main.bc -o - | llvm-dis -o - | FileCheck %s --check-prefix=IMPORT
-
-; IMPORT: @foo = alias i32 (...), bitcast (i32 ()* @foo2 to i32 (...)*)
-; IMPORT: define linkonce_odr i32 @foo2() {
-; IMPORT-NEXT:  %ret = add i32 42, 42
-; IMPORT-NEXT:  ret i32 %ret
-; IMPORT-NEXT: }
-
-declare i32 @foo()
-
-define i32 @main() {
-    %ret = call i32 @foo()
-    ret i32 %ret
-}
\ No newline at end of file
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/CodeGenPrepare/X86/memcmp.ll b/external/bsd/llvm/dist/llvm/test/Transforms/CodeGenPrepare/X86/memcmp.ll
deleted file mode 100644
index c5281a9e5733..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/CodeGenPrepare/X86/memcmp.ll
+++ /dev/null
@@ -1,879 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -codegenprepare -mtriple=i686-unknown-unknown   -data-layout=e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X32
-; RUN: opt -S -codegenprepare -mtriple=x86_64-unknown-unknown -data-layout=e-m:o-i64:64-f80:128-n8:16:32:64-S128         < %s | FileCheck %s --check-prefix=ALL --check-prefix=X64
-
-declare i32 @memcmp(i8* nocapture, i8* nocapture, i64)
-
-define i32 @cmp2(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp2(
-; ALL-NEXT:    [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*
-; ALL-NEXT:    [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*
-; ALL-NEXT:    [[TMP3:%.*]] = load i16, i16* [[TMP1]]
-; ALL-NEXT:    [[TMP4:%.*]] = load i16, i16* [[TMP2]]
-; ALL-NEXT:    [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
-; ALL-NEXT:    [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])
-; ALL-NEXT:    [[TMP7:%.*]] = icmp ne i16 [[TMP5]], [[TMP6]]
-; ALL-NEXT:    [[TMP8:%.*]] = icmp ult i16 [[TMP5]], [[TMP6]]
-; ALL-NEXT:    [[TMP9:%.*]] = select i1 [[TMP8]], i32 -1, i32 1
-; ALL-NEXT:    [[TMP10:%.*]] = select i1 [[TMP7]], i32 [[TMP9]], i32 0
-; ALL-NEXT:    ret i32 [[TMP10]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
-  ret i32 %call
-}
-
-define i32 @cmp3(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp3(
-; X32-NEXT:  loadbb:
-; X32-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i16*
-; X32-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i16*
-; X32-NEXT:    [[TMP2:%.*]] = load i16, i16* [[TMP0]]
-; X32-NEXT:    [[TMP3:%.*]] = load i16, i16* [[TMP1]]
-; X32-NEXT:    [[TMP4:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])
-; X32-NEXT:    [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
-; X32-NEXT:    [[TMP6:%.*]] = zext i16 [[TMP4]] to i32
-; X32-NEXT:    [[TMP7:%.*]] = zext i16 [[TMP5]] to i32
-; X32-NEXT:    [[TMP8:%.*]] = icmp eq i32 [[TMP6]], [[TMP7]]
-; X32-NEXT:    br i1 [[TMP8]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X32:       res_block:
-; X32-NEXT:    [[TMP9:%.*]] = icmp ult i32 [[TMP6]], [[TMP7]]
-; X32-NEXT:    [[TMP10:%.*]] = select i1 [[TMP9]], i32 -1, i32 1
-; X32-NEXT:    br label [[ENDBLOCK:%.*]]
-; X32:       loadbb1:
-; X32-NEXT:    [[TMP11:%.*]] = getelementptr i8, i8* [[X]], i8 2
-; X32-NEXT:    [[TMP12:%.*]] = getelementptr i8, i8* [[Y]], i8 2
-; X32-NEXT:    [[TMP13:%.*]] = load i8, i8* [[TMP11]]
-; X32-NEXT:    [[TMP14:%.*]] = load i8, i8* [[TMP12]]
-; X32-NEXT:    [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
-; X32-NEXT:    [[TMP16:%.*]] = zext i8 [[TMP14]] to i32
-; X32-NEXT:    [[TMP17:%.*]] = sub i32 [[TMP15]], [[TMP16]]
-; X32-NEXT:    br label [[ENDBLOCK]]
-; X32:       endblock:
-; X32-NEXT:    [[PHI_RES:%.*]] = phi i32 [ [[TMP17]], [[LOADBB1]] ], [ [[TMP10]], [[RES_BLOCK]] ]
-; X32-NEXT:    ret i32 [[PHI_RES]]
-;
-; X64-LABEL: @cmp3(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i16*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i16*
-; X64-NEXT:    [[TMP2:%.*]] = load i16, i16* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i16, i16* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])
-; X64-NEXT:    [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
-; X64-NEXT:    [[TMP6:%.*]] = zext i16 [[TMP4]] to i64
-; X64-NEXT:    [[TMP7:%.*]] = zext i16 [[TMP5]] to i64
-; X64-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]
-; X64-NEXT:    br i1 [[TMP8]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X64:       res_block:
-; X64-NEXT:    [[TMP9:%.*]] = icmp ult i64 [[TMP6]], [[TMP7]]
-; X64-NEXT:    [[TMP10:%.*]] = select i1 [[TMP9]], i32 -1, i32 1
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP11:%.*]] = getelementptr i8, i8* [[X]], i8 2
-; X64-NEXT:    [[TMP12:%.*]] = getelementptr i8, i8* [[Y]], i8 2
-; X64-NEXT:    [[TMP13:%.*]] = load i8, i8* [[TMP11]]
-; X64-NEXT:    [[TMP14:%.*]] = load i8, i8* [[TMP12]]
-; X64-NEXT:    [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
-; X64-NEXT:    [[TMP16:%.*]] = zext i8 [[TMP14]] to i32
-; X64-NEXT:    [[TMP17:%.*]] = sub i32 [[TMP15]], [[TMP16]]
-; X64-NEXT:    br label [[ENDBLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ [[TMP17]], [[LOADBB1]] ], [ [[TMP10]], [[RES_BLOCK]] ]
-; X64-NEXT:    ret i32 [[PHI_RES]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 3)
-  ret i32 %call
-}
-
-define i32 @cmp4(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp4(
-; ALL-NEXT:    [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; ALL-NEXT:    [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; ALL-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; ALL-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP2]]
-; ALL-NEXT:    [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
-; ALL-NEXT:    [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])
-; ALL-NEXT:    [[TMP7:%.*]] = icmp ne i32 [[TMP5]], [[TMP6]]
-; ALL-NEXT:    [[TMP8:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]]
-; ALL-NEXT:    [[TMP9:%.*]] = select i1 [[TMP8]], i32 -1, i32 1
-; ALL-NEXT:    [[TMP10:%.*]] = select i1 [[TMP7]], i32 [[TMP9]], i32 0
-; ALL-NEXT:    ret i32 [[TMP10]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 4)
-  ret i32 %call
-}
-
-define i32 @cmp5(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp5(
-; X32-NEXT:  loadbb:
-; X32-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; X32-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; X32-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]]
-; X32-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; X32-NEXT:    [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
-; X32-NEXT:    [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
-; X32-NEXT:    [[TMP6:%.*]] = icmp eq i32 [[TMP4]], [[TMP5]]
-; X32-NEXT:    br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X32:       res_block:
-; X32-NEXT:    [[TMP7:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]]
-; X32-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
-; X32-NEXT:    br label [[ENDBLOCK:%.*]]
-; X32:       loadbb1:
-; X32-NEXT:    [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i8 4
-; X32-NEXT:    [[TMP10:%.*]] = getelementptr i8, i8* [[Y]], i8 4
-; X32-NEXT:    [[TMP11:%.*]] = load i8, i8* [[TMP9]]
-; X32-NEXT:    [[TMP12:%.*]] = load i8, i8* [[TMP10]]
-; X32-NEXT:    [[TMP13:%.*]] = zext i8 [[TMP11]] to i32
-; X32-NEXT:    [[TMP14:%.*]] = zext i8 [[TMP12]] to i32
-; X32-NEXT:    [[TMP15:%.*]] = sub i32 [[TMP13]], [[TMP14]]
-; X32-NEXT:    br label [[ENDBLOCK]]
-; X32:       endblock:
-; X32-NEXT:    [[PHI_RES:%.*]] = phi i32 [ [[TMP15]], [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]
-; X32-NEXT:    ret i32 [[PHI_RES]]
-;
-; X64-LABEL: @cmp5(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; X64-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
-; X64-NEXT:    [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
-; X64-NEXT:    [[TMP6:%.*]] = zext i32 [[TMP4]] to i64
-; X64-NEXT:    [[TMP7:%.*]] = zext i32 [[TMP5]] to i64
-; X64-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]
-; X64-NEXT:    br i1 [[TMP8]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X64:       res_block:
-; X64-NEXT:    [[TMP9:%.*]] = icmp ult i64 [[TMP6]], [[TMP7]]
-; X64-NEXT:    [[TMP10:%.*]] = select i1 [[TMP9]], i32 -1, i32 1
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP11:%.*]] = getelementptr i8, i8* [[X]], i8 4
-; X64-NEXT:    [[TMP12:%.*]] = getelementptr i8, i8* [[Y]], i8 4
-; X64-NEXT:    [[TMP13:%.*]] = load i8, i8* [[TMP11]]
-; X64-NEXT:    [[TMP14:%.*]] = load i8, i8* [[TMP12]]
-; X64-NEXT:    [[TMP15:%.*]] = zext i8 [[TMP13]] to i32
-; X64-NEXT:    [[TMP16:%.*]] = zext i8 [[TMP14]] to i32
-; X64-NEXT:    [[TMP17:%.*]] = sub i32 [[TMP15]], [[TMP16]]
-; X64-NEXT:    br label [[ENDBLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ [[TMP17]], [[LOADBB1]] ], [ [[TMP10]], [[RES_BLOCK]] ]
-; X64-NEXT:    ret i32 [[PHI_RES]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 5)
-  ret i32 %call
-}
-
-define i32 @cmp6(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp6(
-; X32-NEXT:  loadbb:
-; X32-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; X32-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; X32-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]]
-; X32-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; X32-NEXT:    [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
-; X32-NEXT:    [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
-; X32-NEXT:    [[TMP6:%.*]] = icmp eq i32 [[TMP4]], [[TMP5]]
-; X32-NEXT:    br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X32:       res_block:
-; X32-NEXT:    [[PHI_SRC1:%.*]] = phi i32 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
-; X32-NEXT:    [[PHI_SRC2:%.*]] = phi i32 [ [[TMP5]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ]
-; X32-NEXT:    [[TMP7:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]
-; X32-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
-; X32-NEXT:    br label [[ENDBLOCK:%.*]]
-; X32:       loadbb1:
-; X32-NEXT:    [[TMP9:%.*]] = bitcast i8* [[X]] to i16*
-; X32-NEXT:    [[TMP10:%.*]] = bitcast i8* [[Y]] to i16*
-; X32-NEXT:    [[TMP11:%.*]] = getelementptr i16, i16* [[TMP9]], i16 2
-; X32-NEXT:    [[TMP12:%.*]] = getelementptr i16, i16* [[TMP10]], i16 2
-; X32-NEXT:    [[TMP13:%.*]] = load i16, i16* [[TMP11]]
-; X32-NEXT:    [[TMP14:%.*]] = load i16, i16* [[TMP12]]
-; X32-NEXT:    [[TMP15:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP13]])
-; X32-NEXT:    [[TMP16:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP14]])
-; X32-NEXT:    [[TMP17]] = zext i16 [[TMP15]] to i32
-; X32-NEXT:    [[TMP18]] = zext i16 [[TMP16]] to i32
-; X32-NEXT:    [[TMP19:%.*]] = icmp eq i32 [[TMP17]], [[TMP18]]
-; X32-NEXT:    br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]]
-; X32:       endblock:
-; X32-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]
-; X32-NEXT:    ret i32 [[PHI_RES]]
-;
-; X64-LABEL: @cmp6(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; X64-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
-; X64-NEXT:    [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
-; X64-NEXT:    [[TMP6:%.*]] = zext i32 [[TMP4]] to i64
-; X64-NEXT:    [[TMP7:%.*]] = zext i32 [[TMP5]] to i64
-; X64-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]
-; X64-NEXT:    br i1 [[TMP8]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X64:       res_block:
-; X64-NEXT:    [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6]], [[LOADBB:%.*]] ], [ [[TMP19:%.*]], [[LOADBB1]] ]
-; X64-NEXT:    [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7]], [[LOADBB]] ], [ [[TMP20:%.*]], [[LOADBB1]] ]
-; X64-NEXT:    [[TMP9:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
-; X64-NEXT:    [[TMP10:%.*]] = select i1 [[TMP9]], i32 -1, i32 1
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP11:%.*]] = bitcast i8* [[X]] to i16*
-; X64-NEXT:    [[TMP12:%.*]] = bitcast i8* [[Y]] to i16*
-; X64-NEXT:    [[TMP13:%.*]] = getelementptr i16, i16* [[TMP11]], i16 2
-; X64-NEXT:    [[TMP14:%.*]] = getelementptr i16, i16* [[TMP12]], i16 2
-; X64-NEXT:    [[TMP15:%.*]] = load i16, i16* [[TMP13]]
-; X64-NEXT:    [[TMP16:%.*]] = load i16, i16* [[TMP14]]
-; X64-NEXT:    [[TMP17:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP15]])
-; X64-NEXT:    [[TMP18:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP16]])
-; X64-NEXT:    [[TMP19]] = zext i16 [[TMP17]] to i64
-; X64-NEXT:    [[TMP20]] = zext i16 [[TMP18]] to i64
-; X64-NEXT:    [[TMP21:%.*]] = icmp eq i64 [[TMP19]], [[TMP20]]
-; X64-NEXT:    br i1 [[TMP21]], label [[ENDBLOCK]], label [[RES_BLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP10]], [[RES_BLOCK]] ]
-; X64-NEXT:    ret i32 [[PHI_RES]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 6)
-  ret i32 %call
-}
-
-define i32 @cmp7(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp7(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 7)
-; ALL-NEXT:    ret i32 [[CALL]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 7)
-  ret i32 %call
-}
-
-define i32 @cmp8(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp8(
-; X32-NEXT:  loadbb:
-; X32-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; X32-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; X32-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]]
-; X32-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; X32-NEXT:    [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
-; X32-NEXT:    [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
-; X32-NEXT:    [[TMP6:%.*]] = icmp eq i32 [[TMP4]], [[TMP5]]
-; X32-NEXT:    br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X32:       res_block:
-; X32-NEXT:    [[PHI_SRC1:%.*]] = phi i32 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP15:%.*]], [[LOADBB1]] ]
-; X32-NEXT:    [[PHI_SRC2:%.*]] = phi i32 [ [[TMP5]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ]
-; X32-NEXT:    [[TMP7:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]]
-; X32-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
-; X32-NEXT:    br label [[ENDBLOCK:%.*]]
-; X32:       loadbb1:
-; X32-NEXT:    [[TMP9:%.*]] = bitcast i8* [[X]] to i32*
-; X32-NEXT:    [[TMP10:%.*]] = bitcast i8* [[Y]] to i32*
-; X32-NEXT:    [[TMP11:%.*]] = getelementptr i32, i32* [[TMP9]], i32 1
-; X32-NEXT:    [[TMP12:%.*]] = getelementptr i32, i32* [[TMP10]], i32 1
-; X32-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP11]]
-; X32-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP12]]
-; X32-NEXT:    [[TMP15]] = call i32 @llvm.bswap.i32(i32 [[TMP13]])
-; X32-NEXT:    [[TMP16]] = call i32 @llvm.bswap.i32(i32 [[TMP14]])
-; X32-NEXT:    [[TMP17:%.*]] = icmp eq i32 [[TMP15]], [[TMP16]]
-; X32-NEXT:    br i1 [[TMP17]], label [[ENDBLOCK]], label [[RES_BLOCK]]
-; X32:       endblock:
-; X32-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]
-; X32-NEXT:    ret i32 [[PHI_RES]]
-;
-; X64-LABEL: @cmp8(
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = load i64, i64* [[TMP2]]
-; X64-NEXT:    [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
-; X64-NEXT:    [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])
-; X64-NEXT:    [[TMP7:%.*]] = icmp ne i64 [[TMP5]], [[TMP6]]
-; X64-NEXT:    [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]]
-; X64-NEXT:    [[TMP9:%.*]] = select i1 [[TMP8]], i32 -1, i32 1
-; X64-NEXT:    [[TMP10:%.*]] = select i1 [[TMP7]], i32 [[TMP9]], i32 0
-; X64-NEXT:    ret i32 [[TMP10]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
-  ret i32 %call
-}
-
-define i32 @cmp9(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp9(
-; X32-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 9)
-; X32-NEXT:    ret i32 [[CALL]]
-;
-; X64-LABEL: @cmp9(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = load i64, i64* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
-; X64-NEXT:    [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
-; X64-NEXT:    [[TMP6:%.*]] = icmp eq i64 [[TMP4]], [[TMP5]]
-; X64-NEXT:    br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X64:       res_block:
-; X64-NEXT:    [[TMP7:%.*]] = icmp ult i64 [[TMP4]], [[TMP5]]
-; X64-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i8 8
-; X64-NEXT:    [[TMP10:%.*]] = getelementptr i8, i8* [[Y]], i8 8
-; X64-NEXT:    [[TMP11:%.*]] = load i8, i8* [[TMP9]]
-; X64-NEXT:    [[TMP12:%.*]] = load i8, i8* [[TMP10]]
-; X64-NEXT:    [[TMP13:%.*]] = zext i8 [[TMP11]] to i32
-; X64-NEXT:    [[TMP14:%.*]] = zext i8 [[TMP12]] to i32
-; X64-NEXT:    [[TMP15:%.*]] = sub i32 [[TMP13]], [[TMP14]]
-; X64-NEXT:    br label [[ENDBLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ [[TMP15]], [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]
-; X64-NEXT:    ret i32 [[PHI_RES]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 9)
-  ret i32 %call
-}
-
-define i32 @cmp10(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp10(
-; X32-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 10)
-; X32-NEXT:    ret i32 [[CALL]]
-;
-; X64-LABEL: @cmp10(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = load i64, i64* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
-; X64-NEXT:    [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
-; X64-NEXT:    [[TMP6:%.*]] = icmp eq i64 [[TMP4]], [[TMP5]]
-; X64-NEXT:    br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X64:       res_block:
-; X64-NEXT:    [[PHI_SRC1:%.*]] = phi i64 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
-; X64-NEXT:    [[PHI_SRC2:%.*]] = phi i64 [ [[TMP5]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ]
-; X64-NEXT:    [[TMP7:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
-; X64-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP9:%.*]] = bitcast i8* [[X]] to i16*
-; X64-NEXT:    [[TMP10:%.*]] = bitcast i8* [[Y]] to i16*
-; X64-NEXT:    [[TMP11:%.*]] = getelementptr i16, i16* [[TMP9]], i16 4
-; X64-NEXT:    [[TMP12:%.*]] = getelementptr i16, i16* [[TMP10]], i16 4
-; X64-NEXT:    [[TMP13:%.*]] = load i16, i16* [[TMP11]]
-; X64-NEXT:    [[TMP14:%.*]] = load i16, i16* [[TMP12]]
-; X64-NEXT:    [[TMP15:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP13]])
-; X64-NEXT:    [[TMP16:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP14]])
-; X64-NEXT:    [[TMP17]] = zext i16 [[TMP15]] to i64
-; X64-NEXT:    [[TMP18]] = zext i16 [[TMP16]] to i64
-; X64-NEXT:    [[TMP19:%.*]] = icmp eq i64 [[TMP17]], [[TMP18]]
-; X64-NEXT:    br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]
-; X64-NEXT:    ret i32 [[PHI_RES]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 10)
-  ret i32 %call
-}
-
-define i32 @cmp11(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp11(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 11)
-; ALL-NEXT:    ret i32 [[CALL]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 11)
-  ret i32 %call
-}
-
-define i32 @cmp12(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp12(
-; X32-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 12)
-; X32-NEXT:    ret i32 [[CALL]]
-;
-; X64-LABEL: @cmp12(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = load i64, i64* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
-; X64-NEXT:    [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
-; X64-NEXT:    [[TMP6:%.*]] = icmp eq i64 [[TMP4]], [[TMP5]]
-; X64-NEXT:    br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X64:       res_block:
-; X64-NEXT:    [[PHI_SRC1:%.*]] = phi i64 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP17:%.*]], [[LOADBB1]] ]
-; X64-NEXT:    [[PHI_SRC2:%.*]] = phi i64 [ [[TMP5]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ]
-; X64-NEXT:    [[TMP7:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
-; X64-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP9:%.*]] = bitcast i8* [[X]] to i32*
-; X64-NEXT:    [[TMP10:%.*]] = bitcast i8* [[Y]] to i32*
-; X64-NEXT:    [[TMP11:%.*]] = getelementptr i32, i32* [[TMP9]], i32 2
-; X64-NEXT:    [[TMP12:%.*]] = getelementptr i32, i32* [[TMP10]], i32 2
-; X64-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP11]]
-; X64-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP12]]
-; X64-NEXT:    [[TMP15:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP13]])
-; X64-NEXT:    [[TMP16:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP14]])
-; X64-NEXT:    [[TMP17]] = zext i32 [[TMP15]] to i64
-; X64-NEXT:    [[TMP18]] = zext i32 [[TMP16]] to i64
-; X64-NEXT:    [[TMP19:%.*]] = icmp eq i64 [[TMP17]], [[TMP18]]
-; X64-NEXT:    br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]
-; X64-NEXT:    ret i32 [[PHI_RES]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 12)
-  ret i32 %call
-}
-
-define i32 @cmp13(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp13(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 13)
-; ALL-NEXT:    ret i32 [[CALL]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 13)
-  ret i32 %call
-}
-
-define i32 @cmp14(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp14(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 14)
-; ALL-NEXT:    ret i32 [[CALL]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 14)
-  ret i32 %call
-}
-
-define i32 @cmp15(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp15(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 15)
-; ALL-NEXT:    ret i32 [[CALL]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 15)
-  ret i32 %call
-}
-
-define i32 @cmp16(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp16(
-; X32-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 16)
-; X32-NEXT:    ret i32 [[CALL]]
-;
-; X64-LABEL: @cmp16(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = load i64, i64* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
-; X64-NEXT:    [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
-; X64-NEXT:    [[TMP6:%.*]] = icmp eq i64 [[TMP4]], [[TMP5]]
-; X64-NEXT:    br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]]
-; X64:       res_block:
-; X64-NEXT:    [[PHI_SRC1:%.*]] = phi i64 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP15:%.*]], [[LOADBB1]] ]
-; X64-NEXT:    [[PHI_SRC2:%.*]] = phi i64 [ [[TMP5]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ]
-; X64-NEXT:    [[TMP7:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]]
-; X64-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP9:%.*]] = bitcast i8* [[X]] to i64*
-; X64-NEXT:    [[TMP10:%.*]] = bitcast i8* [[Y]] to i64*
-; X64-NEXT:    [[TMP11:%.*]] = getelementptr i64, i64* [[TMP9]], i64 1
-; X64-NEXT:    [[TMP12:%.*]] = getelementptr i64, i64* [[TMP10]], i64 1
-; X64-NEXT:    [[TMP13:%.*]] = load i64, i64* [[TMP11]]
-; X64-NEXT:    [[TMP14:%.*]] = load i64, i64* [[TMP12]]
-; X64-NEXT:    [[TMP15]] = call i64 @llvm.bswap.i64(i64 [[TMP13]])
-; X64-NEXT:    [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]])
-; X64-NEXT:    [[TMP17:%.*]] = icmp eq i64 [[TMP15]], [[TMP16]]
-; X64-NEXT:    br i1 [[TMP17]], label [[ENDBLOCK]], label [[RES_BLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ]
-; X64-NEXT:    ret i32 [[PHI_RES]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16)
-  ret i32 %call
-}
-
-define i32 @cmp_eq2(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq2(
-; ALL-NEXT:    [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16*
-; ALL-NEXT:    [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16*
-; ALL-NEXT:    [[TMP3:%.*]] = load i16, i16* [[TMP1]]
-; ALL-NEXT:    [[TMP4:%.*]] = load i16, i16* [[TMP2]]
-; ALL-NEXT:    [[TMP5:%.*]] = icmp ne i16 [[TMP3]], [[TMP4]]
-; ALL-NEXT:    [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq3(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq3(
-; ALL-NEXT:  loadbb:
-; ALL-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i16*
-; ALL-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i16*
-; ALL-NEXT:    [[TMP2:%.*]] = load i16, i16* [[TMP0]]
-; ALL-NEXT:    [[TMP3:%.*]] = load i16, i16* [[TMP1]]
-; ALL-NEXT:    [[TMP4:%.*]] = icmp ne i16 [[TMP2]], [[TMP3]]
-; ALL-NEXT:    br i1 [[TMP4]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
-; ALL:       res_block:
-; ALL-NEXT:    br label [[ENDBLOCK:%.*]]
-; ALL:       loadbb1:
-; ALL-NEXT:    [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i8 2
-; ALL-NEXT:    [[TMP6:%.*]] = getelementptr i8, i8* [[Y]], i8 2
-; ALL-NEXT:    [[TMP7:%.*]] = load i8, i8* [[TMP5]]
-; ALL-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP6]]
-; ALL-NEXT:    [[TMP9:%.*]] = icmp ne i8 [[TMP7]], [[TMP8]]
-; ALL-NEXT:    br i1 [[TMP9]], label [[RES_BLOCK]], label [[ENDBLOCK]]
-; ALL:       endblock:
-; ALL-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 3)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq4(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq4(
-; ALL-NEXT:    [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; ALL-NEXT:    [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; ALL-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; ALL-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP2]]
-; ALL-NEXT:    [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]]
-; ALL-NEXT:    [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 4)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq5(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq5(
-; ALL-NEXT:  loadbb:
-; ALL-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; ALL-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; ALL-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]]
-; ALL-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; ALL-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[TMP2]], [[TMP3]]
-; ALL-NEXT:    br i1 [[TMP4]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
-; ALL:       res_block:
-; ALL-NEXT:    br label [[ENDBLOCK:%.*]]
-; ALL:       loadbb1:
-; ALL-NEXT:    [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i8 4
-; ALL-NEXT:    [[TMP6:%.*]] = getelementptr i8, i8* [[Y]], i8 4
-; ALL-NEXT:    [[TMP7:%.*]] = load i8, i8* [[TMP5]]
-; ALL-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP6]]
-; ALL-NEXT:    [[TMP9:%.*]] = icmp ne i8 [[TMP7]], [[TMP8]]
-; ALL-NEXT:    br i1 [[TMP9]], label [[RES_BLOCK]], label [[ENDBLOCK]]
-; ALL:       endblock:
-; ALL-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 5)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq6(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq6(
-; ALL-NEXT:  loadbb:
-; ALL-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; ALL-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; ALL-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]]
-; ALL-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; ALL-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[TMP2]], [[TMP3]]
-; ALL-NEXT:    br i1 [[TMP4]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
-; ALL:       res_block:
-; ALL-NEXT:    br label [[ENDBLOCK:%.*]]
-; ALL:       loadbb1:
-; ALL-NEXT:    [[TMP5:%.*]] = bitcast i8* [[X]] to i16*
-; ALL-NEXT:    [[TMP6:%.*]] = bitcast i8* [[Y]] to i16*
-; ALL-NEXT:    [[TMP7:%.*]] = getelementptr i16, i16* [[TMP5]], i16 2
-; ALL-NEXT:    [[TMP8:%.*]] = getelementptr i16, i16* [[TMP6]], i16 2
-; ALL-NEXT:    [[TMP9:%.*]] = load i16, i16* [[TMP7]]
-; ALL-NEXT:    [[TMP10:%.*]] = load i16, i16* [[TMP8]]
-; ALL-NEXT:    [[TMP11:%.*]] = icmp ne i16 [[TMP9]], [[TMP10]]
-; ALL-NEXT:    br i1 [[TMP11]], label [[RES_BLOCK]], label [[ENDBLOCK]]
-; ALL:       endblock:
-; ALL-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 6)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq7(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq7(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 7)
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 7)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq8(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp_eq8(
-; X32-NEXT:  loadbb:
-; X32-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
-; X32-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32*
-; X32-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]]
-; X32-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]]
-; X32-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[TMP2]], [[TMP3]]
-; X32-NEXT:    br i1 [[TMP4]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
-; X32:       res_block:
-; X32-NEXT:    br label [[ENDBLOCK:%.*]]
-; X32:       loadbb1:
-; X32-NEXT:    [[TMP5:%.*]] = bitcast i8* [[X]] to i32*
-; X32-NEXT:    [[TMP6:%.*]] = bitcast i8* [[Y]] to i32*
-; X32-NEXT:    [[TMP7:%.*]] = getelementptr i32, i32* [[TMP5]], i32 1
-; X32-NEXT:    [[TMP8:%.*]] = getelementptr i32, i32* [[TMP6]], i32 1
-; X32-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP7]]
-; X32-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP8]]
-; X32-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP9]], [[TMP10]]
-; X32-NEXT:    br i1 [[TMP11]], label [[RES_BLOCK]], label [[ENDBLOCK]]
-; X32:       endblock:
-; X32-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
-; X32-NEXT:    [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
-; X32-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X32-NEXT:    ret i32 [[CONV]]
-;
-; X64-LABEL: @cmp_eq8(
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = load i64, i64* [[TMP2]]
-; X64-NEXT:    [[TMP5:%.*]] = icmp ne i64 [[TMP3]], [[TMP4]]
-; X64-NEXT:    [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
-; X64-NEXT:    [[CMP:%.*]] = icmp eq i32 [[TMP6]], 0
-; X64-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X64-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq9(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp_eq9(
-; X32-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 9)
-; X32-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; X32-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X32-NEXT:    ret i32 [[CONV]]
-;
-; X64-LABEL: @cmp_eq9(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = load i64, i64* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = icmp ne i64 [[TMP2]], [[TMP3]]
-; X64-NEXT:    br i1 [[TMP4]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
-; X64:       res_block:
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i8 8
-; X64-NEXT:    [[TMP6:%.*]] = getelementptr i8, i8* [[Y]], i8 8
-; X64-NEXT:    [[TMP7:%.*]] = load i8, i8* [[TMP5]]
-; X64-NEXT:    [[TMP8:%.*]] = load i8, i8* [[TMP6]]
-; X64-NEXT:    [[TMP9:%.*]] = icmp ne i8 [[TMP7]], [[TMP8]]
-; X64-NEXT:    br i1 [[TMP9]], label [[RES_BLOCK]], label [[ENDBLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
-; X64-NEXT:    [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
-; X64-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X64-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 9)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq10(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp_eq10(
-; X32-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 10)
-; X32-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; X32-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X32-NEXT:    ret i32 [[CONV]]
-;
-; X64-LABEL: @cmp_eq10(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = load i64, i64* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = icmp ne i64 [[TMP2]], [[TMP3]]
-; X64-NEXT:    br i1 [[TMP4]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
-; X64:       res_block:
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP5:%.*]] = bitcast i8* [[X]] to i16*
-; X64-NEXT:    [[TMP6:%.*]] = bitcast i8* [[Y]] to i16*
-; X64-NEXT:    [[TMP7:%.*]] = getelementptr i16, i16* [[TMP5]], i16 4
-; X64-NEXT:    [[TMP8:%.*]] = getelementptr i16, i16* [[TMP6]], i16 4
-; X64-NEXT:    [[TMP9:%.*]] = load i16, i16* [[TMP7]]
-; X64-NEXT:    [[TMP10:%.*]] = load i16, i16* [[TMP8]]
-; X64-NEXT:    [[TMP11:%.*]] = icmp ne i16 [[TMP9]], [[TMP10]]
-; X64-NEXT:    br i1 [[TMP11]], label [[RES_BLOCK]], label [[ENDBLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
-; X64-NEXT:    [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
-; X64-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X64-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 10)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq11(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq11(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 11)
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 11)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq12(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp_eq12(
-; X32-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 12)
-; X32-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; X32-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X32-NEXT:    ret i32 [[CONV]]
-;
-; X64-LABEL: @cmp_eq12(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = load i64, i64* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = icmp ne i64 [[TMP2]], [[TMP3]]
-; X64-NEXT:    br i1 [[TMP4]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
-; X64:       res_block:
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP5:%.*]] = bitcast i8* [[X]] to i32*
-; X64-NEXT:    [[TMP6:%.*]] = bitcast i8* [[Y]] to i32*
-; X64-NEXT:    [[TMP7:%.*]] = getelementptr i32, i32* [[TMP5]], i32 2
-; X64-NEXT:    [[TMP8:%.*]] = getelementptr i32, i32* [[TMP6]], i32 2
-; X64-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP7]]
-; X64-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP8]]
-; X64-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP9]], [[TMP10]]
-; X64-NEXT:    br i1 [[TMP11]], label [[RES_BLOCK]], label [[ENDBLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
-; X64-NEXT:    [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
-; X64-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X64-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 12)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq13(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq13(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 13)
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 13)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq14(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq14(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 14)
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 14)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq15(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; ALL-LABEL: @cmp_eq15(
-; ALL-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 15)
-; ALL-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; ALL-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; ALL-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 15)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
-define i32 @cmp_eq16(i8* nocapture readonly %x, i8* nocapture readonly %y)  {
-; X32-LABEL: @cmp_eq16(
-; X32-NEXT:    [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 16)
-; X32-NEXT:    [[CMP:%.*]] = icmp eq i32 [[CALL]], 0
-; X32-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X32-NEXT:    ret i32 [[CONV]]
-;
-; X64-LABEL: @cmp_eq16(
-; X64-NEXT:  loadbb:
-; X64-NEXT:    [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
-; X64-NEXT:    [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64*
-; X64-NEXT:    [[TMP2:%.*]] = load i64, i64* [[TMP0]]
-; X64-NEXT:    [[TMP3:%.*]] = load i64, i64* [[TMP1]]
-; X64-NEXT:    [[TMP4:%.*]] = icmp ne i64 [[TMP2]], [[TMP3]]
-; X64-NEXT:    br i1 [[TMP4]], label [[RES_BLOCK:%.*]], label [[LOADBB1:%.*]]
-; X64:       res_block:
-; X64-NEXT:    br label [[ENDBLOCK:%.*]]
-; X64:       loadbb1:
-; X64-NEXT:    [[TMP5:%.*]] = bitcast i8* [[X]] to i64*
-; X64-NEXT:    [[TMP6:%.*]] = bitcast i8* [[Y]] to i64*
-; X64-NEXT:    [[TMP7:%.*]] = getelementptr i64, i64* [[TMP5]], i64 1
-; X64-NEXT:    [[TMP8:%.*]] = getelementptr i64, i64* [[TMP6]], i64 1
-; X64-NEXT:    [[TMP9:%.*]] = load i64, i64* [[TMP7]]
-; X64-NEXT:    [[TMP10:%.*]] = load i64, i64* [[TMP8]]
-; X64-NEXT:    [[TMP11:%.*]] = icmp ne i64 [[TMP9]], [[TMP10]]
-; X64-NEXT:    br i1 [[TMP11]], label [[RES_BLOCK]], label [[ENDBLOCK]]
-; X64:       endblock:
-; X64-NEXT:    [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ]
-; X64-NEXT:    [[CMP:%.*]] = icmp eq i32 [[PHI_RES]], 0
-; X64-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i32
-; X64-NEXT:    ret i32 [[CONV]]
-;
-  %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16)
-  %cmp = icmp eq i32 %call, 0
-  %conv = zext i1 %cmp to i32
-  ret i32 %conv
-}
-
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/CountingFunctionInserter/mcount.ll b/external/bsd/llvm/dist/llvm/test/Transforms/CountingFunctionInserter/mcount.ll
deleted file mode 100644
index 88297c7d8258..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/CountingFunctionInserter/mcount.ll
+++ /dev/null
@@ -1,27 +0,0 @@
-; RUN: opt -S -cfinserter < %s | FileCheck %s
-target datalayout = "E-m:e-i64:64-n32:64"
-target triple = "powerpc64-bgq-linux"
-
-define void @test1() #0 {
-entry:
-  ret void
-
-; CHECK-LABEL: define void @test1()
-; CHECK: entry:
-; CHECK-NEXT: call void @mcount()
-; CHECK: ret void
-}
-
-define void @test2() #1 {
-entry:
-  ret void
-
-; CHECK-LABEL: define void @test2()
-; CHECK: entry:
-; CHECK-NEXT: call void @.mcount()
-; CHECK: ret void
-}
-
-attributes #0 = { "counting-function"="mcount" }
-attributes #1 = { "counting-function"=".mcount" }
-
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/FunctionImport/Inputs/hotness_based_import2.ll b/external/bsd/llvm/dist/llvm/test/Transforms/FunctionImport/Inputs/hotness_based_import2.ll
deleted file mode 100644
index 4f17cb2cd9a1..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/FunctionImport/Inputs/hotness_based_import2.ll
+++ /dev/null
@@ -1,42 +0,0 @@
-; ModuleID = 'thinlto-function-summary-callgraph-profile-summary2.ll'
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-
-define void @hot() #1 !prof !28  {
-  call void @calledFromHot()
-  ret void
-}
-
-; 9 instructions so it is above decayed cold threshold of 7 and below
-; decayed hot threshold of 10.
-define void @calledFromHot() !prof !28 {
-  %b = alloca i32, align 4
-  store i32 1, i32* %b, align 4
-  store i32 1, i32* %b, align 4
-  store i32 1, i32* %b, align 4
-  store i32 1, i32* %b, align 4
-  store i32 1, i32* %b, align 4
-  store i32 1, i32* %b, align 4
-  store i32 1, i32* %b, align 4
-  ret void
-}
-
-!llvm.module.flags = !{!1}
-
-!1 = !{i32 1, !"ProfileSummary", !2}
-!2 = !{!3, !4, !5, !6, !7, !8, !9, !10}
-!3 = !{!"ProfileFormat", !"InstrProf"}
-!4 = !{!"TotalCount", i64 222}
-!5 = !{!"MaxCount", i64 110}
-!6 = !{!"MaxInternalCount", i64 1}
-!7 = !{!"MaxFunctionCount", i64 110}
-!8 = !{!"NumCounts", i64 4}
-!9 = !{!"NumFunctions", i64 3}
-!10 = !{!"DetailedSummary", !11}
-!11 = !{!12, !13, !14}
-!12 = !{i32 10000, i64 110, i32 2}
-!13 = !{i32 999000, i64 2, i32 4}
-!14 = !{i32 999999, i64 2, i32 4}
-!28 = !{!"function_entry_count", i64 110}
-!29 = !{!"function_entry_count", i64 1}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/FunctionImport/hotness_based_import2.ll b/external/bsd/llvm/dist/llvm/test/Transforms/FunctionImport/hotness_based_import2.ll
deleted file mode 100644
index 50de33199f69..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/FunctionImport/hotness_based_import2.ll
+++ /dev/null
@@ -1,53 +0,0 @@
-; Test to check that callee reached from cold and then hot path gets
-; hot thresholds.
-; RUN: opt -module-summary %s -o %t.bc
-; RUN: opt -module-summary %p/Inputs/hotness_based_import2.ll -o %t2.bc
-; RUN: llvm-lto -thinlto -o %t3 %t.bc %t2.bc
-
-; Teset with limit set to 10 and multipliers set to 1. Since cold call to
-; hot is first in the other module, we'll first add calledFromHot to worklist
-; with threshold decayed by default 0.7 factor. Test ensures that when we
-; encounter it again from hot path, we re-enqueue with higher non-decayed
-; threshold which will allow it to be imported.
-; RUN: opt -function-import -summary-file %t3.thinlto.bc %t.bc -import-instr-limit=10 -import-hot-multiplier=1.0 -import-cold-multiplier=1.0 -S | FileCheck %s --check-prefix=CHECK
-; CHECK-DAG: define available_externally void @hot()
-; CHECK-DAG: define available_externally void @calledFromHot()
-
-; ModuleID = 'thinlto-function-summary-callgraph.ll'
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-; This function has a high profile count, so entry block is hot.
-define void @hot_function(i1 %a, i1 %a2) !prof !28 {
-entry:
-  call void @hot()
-  ret void
-}
-
-; This function has a low profile count, so entry block is hot.
-define void @cold_function(i1 %a, i1 %a2) !prof !29 {
-entry:
-  call void @hot()
-  ret void
-}
-
-declare void @hot() #1
-
-!llvm.module.flags = !{!1}
-
-!1 = !{i32 1, !"ProfileSummary", !2}
-!2 = !{!3, !4, !5, !6, !7, !8, !9, !10}
-!3 = !{!"ProfileFormat", !"InstrProf"}
-!4 = !{!"TotalCount", i64 222}
-!5 = !{!"MaxCount", i64 110}
-!6 = !{!"MaxInternalCount", i64 1}
-!7 = !{!"MaxFunctionCount", i64 110}
-!8 = !{!"NumCounts", i64 4}
-!9 = !{!"NumFunctions", i64 3}
-!10 = !{!"DetailedSummary", !11}
-!11 = !{!12, !13, !14}
-!12 = !{i32 10000, i64 110, i32 2}
-!13 = !{i32 999000, i64 2, i32 4}
-!14 = !{i32 999999, i64 2, i32 4}
-!28 = !{!"function_entry_count", i64 110}
-!29 = !{!"function_entry_count", i64 1}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/GlobalOpt/invariant.group.barrier.ll b/external/bsd/llvm/dist/llvm/test/Transforms/GlobalOpt/invariant.group.barrier.ll
deleted file mode 100644
index 80cd411afdc7..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/GlobalOpt/invariant.group.barrier.ll
+++ /dev/null
@@ -1,79 +0,0 @@
-; RUN: opt -S -globalopt < %s | FileCheck %s
-
-; This test is hint, what could globalOpt optimize and what it can't
-; FIXME: @tmp and @tmp2 can be safely set to 42
-; CHECK: @tmp = local_unnamed_addr global i32 0
-; CHECK: @tmp2 = local_unnamed_addr global i32 0
-; CHECK: @tmp3 = global i32 0
-
-@tmp = global i32 0
-@tmp2 = global i32 0
-@tmp3 = global i32 0
-@ptrToTmp3 = global i32* null
-
-@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @_GLOBAL__I_a }]
-
-define i32 @TheAnswerToLifeTheUniverseAndEverything() {
-  ret i32 42
-}
-
-define void @_GLOBAL__I_a() {
-enter:
-  call void @_optimizable()
-  call void @_not_optimizable()
-  ret void
-}
-
-define void @_optimizable() {
-enter:
-  %valptr = alloca i32
-  
-  %val = call i32 @TheAnswerToLifeTheUniverseAndEverything()
-  store i32 %val, i32* @tmp
-  store i32 %val, i32* %valptr
-  
-  %0 = bitcast i32* %valptr to i8*
-  %barr = call i8* @llvm.invariant.group.barrier(i8* %0)
-  %1 = bitcast i8* %barr to i32*
-  
-  %val2 = load i32, i32* %1
-  store i32 %val2, i32* @tmp2
-  ret void
-}
-
-; We can't step through invariant.group.barrier here, because that would change
-; this load in @usage_of_globals()
-; val = load i32, i32* %ptrVal, !invariant.group !0 
-; into 
-; %val = load i32, i32* @tmp3, !invariant.group !0
-; and then we could assume that %val and %val2 to be the same, which coud be 
-; false, because @changeTmp3ValAndCallBarrierInside() may change the value
-; of @tmp3.
-define void @_not_optimizable() {
-enter:
-  store i32 13, i32* @tmp3, !invariant.group !0
-  
-  %0 = bitcast i32* @tmp3 to i8*
-  %barr = call i8* @llvm.invariant.group.barrier(i8* %0)
-  %1 = bitcast i8* %barr to i32*
-  
-  store i32* %1, i32** @ptrToTmp3
-  store i32 42, i32* %1, !invariant.group !0
-  
-  ret void
-}
-define void @usage_of_globals() {
-entry:
-  %ptrVal = load i32*, i32** @ptrToTmp3
-  %val = load i32, i32* %ptrVal, !invariant.group !0
-  
-  call void @changeTmp3ValAndCallBarrierInside()
-  %val2 = load i32, i32* @tmp3, !invariant.group !0
-  ret void;
-}
-
-declare void @changeTmp3ValAndCallBarrierInside()
-
-declare i8* @llvm.invariant.group.barrier(i8*)
-
-!0 = !{!"something"}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/Inline/inline-fp.ll b/external/bsd/llvm/dist/llvm/test/Transforms/Inline/inline-fp.ll
deleted file mode 100644
index dd5972fe1b8a..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/Inline/inline-fp.ll
+++ /dev/null
@@ -1,137 +0,0 @@
-; RUN: opt -S -inline < %s | FileCheck %s
-; RUN: opt -S -passes='cgscc(inline)' < %s | FileCheck %s
-; Make sure that soft float implementations are calculated as being more expensive
-; to the inliner.
-
-define i32 @test_nofp() #0 {
-; f_nofp() has the "use-soft-float" attribute, so it should never get inlined.
-; CHECK-LABEL: test_nofp
-; CHECK: call float @f_nofp 
-entry:
-  %responseX = alloca i32, align 4
-  %responseY = alloca i32, align 4
-  %responseZ = alloca i32, align 4
-  %valueX = alloca i8, align 1
-  %valueY = alloca i8, align 1
-  %valueZ = alloca i8, align 1
-
-  call void @getX(i32* %responseX, i8* %valueX)
-  call void @getY(i32* %responseY, i8* %valueY)
-  call void @getZ(i32* %responseZ, i8* %valueZ)
-
-  %0 = load i32, i32* %responseX
-  %1 = load i8, i8* %valueX
-  %call = call float @f_nofp(i32 %0, i8 zeroext %1)
-  %2 = load i32, i32* %responseZ
-  %3 = load i8, i8* %valueZ
-  %call2 = call float @f_nofp(i32 %2, i8 zeroext %3)
-  %call3 = call float @fabsf(float %call)
-  %cmp = fcmp ogt float %call3, 0x3FC1EB8520000000
-  br i1 %cmp, label %if.end12, label %if.else
-
-if.else:                                          ; preds = %entry
-  %4 = load i32, i32* %responseY
-  %5 = load i8, i8* %valueY
-  %call1 = call float @f_nofp(i32 %4, i8 zeroext %5)
-  %call4 = call float @fabsf(float %call1)
-  %cmp5 = fcmp ogt float %call4, 0x3FC1EB8520000000
-  br i1 %cmp5, label %if.end12, label %if.else7
-
-if.else7:                                         ; preds = %if.else
-  %call8 = call float @fabsf(float %call2)
-  %cmp9 = fcmp ogt float %call8, 0x3FC1EB8520000000
-  br i1 %cmp9, label %if.then10, label %if.end12
-
-if.then10:                                        ; preds = %if.else7
-  br label %if.end12
-
-if.end12:                                         ; preds = %if.else, %entry, %if.then10, %if.else7
-  %success.0 = phi i32 [ 0, %if.then10 ], [ 1, %if.else7 ], [ 0, %entry ], [ 0, %if.else ]
-  ret i32 %success.0
-}
-
-define i32 @test_hasfp() #0 {
-; f_hasfp()  does not have the "use-soft-float" attribute, so it should get inlined.
-; CHECK-LABEL: test_hasfp
-; CHECK-NOT: call float @f_hasfp 
-entry:
-  %responseX = alloca i32, align 4
-  %responseY = alloca i32, align 4
-  %responseZ = alloca i32, align 4
-  %valueX = alloca i8, align 1
-  %valueY = alloca i8, align 1
-  %valueZ = alloca i8, align 1
-
-  call void @getX(i32* %responseX, i8* %valueX)
-  call void @getY(i32* %responseY, i8* %valueY)
-  call void @getZ(i32* %responseZ, i8* %valueZ)
-
-  %0 = load i32, i32* %responseX
-  %1 = load i8, i8* %valueX
-  %call = call float @f_hasfp(i32 %0, i8 zeroext %1)
-  %2 = load i32, i32* %responseZ
-  %3 = load i8, i8* %valueZ
-  %call2 = call float @f_hasfp(i32 %2, i8 zeroext %3)
-  %call3 = call float @fabsf(float %call)
-  %cmp = fcmp ogt float %call3, 0x3FC1EB8520000000
-  br i1 %cmp, label %if.end12, label %if.else
-
-if.else:                                          ; preds = %entry
-  %4 = load i32, i32* %responseY
-  %5 = load i8, i8* %valueY
-  %call1 = call float @f_hasfp(i32 %4, i8 zeroext %5)
-  %call4 = call float @fabsf(float %call1)
-  %cmp5 = fcmp ogt float %call4, 0x3FC1EB8520000000
-  br i1 %cmp5, label %if.end12, label %if.else7
-
-if.else7:                                         ; preds = %if.else
-  %call8 = call float @fabsf(float %call2)
-  %cmp9 = fcmp ogt float %call8, 0x3FC1EB8520000000
-  br i1 %cmp9, label %if.then10, label %if.end12
-
-if.then10:                                        ; preds = %if.else7
-  br label %if.end12
-
-if.end12:                                         ; preds = %if.else, %entry, %if.then10, %if.else7
-  %success.0 = phi i32 [ 0, %if.then10 ], [ 1, %if.else7 ], [ 0, %entry ], [ 0, %if.else ]
-  ret i32 %success.0
-}
-
-declare void @getX(i32*, i8*) #0
-
-declare void @getY(i32*, i8*) #0
-
-declare void @getZ(i32*, i8*) #0
-
-define internal float @f_hasfp(i32 %response, i8 zeroext %value1) #0 {
-entry:
-  %conv = zext i8 %value1 to i32
-  %sub = add nsw i32 %conv, -1
-  %conv1 = sitofp i32 %sub to float
-  %0 = tail call float @llvm.pow.f32(float 0x3FF028F5C0000000, float %conv1)
-  %mul = fmul float %0, 2.620000e+03
-  %conv2 = sitofp i32 %response to float
-  %sub3 = fsub float %conv2, %mul
-  %div = fdiv float %sub3, %mul
-  ret float %div
-}
-
-define internal float @f_nofp(i32 %response, i8 zeroext %value1) #1 {
-entry:
-  %conv = zext i8 %value1 to i32
-  %sub = add nsw i32 %conv, -1
-  %conv1 = sitofp i32 %sub to float
-  %0 = tail call float @llvm.pow.f32(float 0x3FF028F5C0000000, float %conv1)
-  %mul = fmul float %0, 2.620000e+03
-  %conv2 = sitofp i32 %response to float
-  %sub3 = fsub float %conv2, %mul
-  %div = fdiv float %sub3, %mul
-  ret float %div
-}
-
-declare float @fabsf(float) optsize minsize
-
-declare float @llvm.pow.f32(float, float) optsize minsize
-
-attributes #0 = { optsize }
-attributes #1 = { optsize "use-soft-float"="true" }
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/Inline/inline-musttail-varargs.ll b/external/bsd/llvm/dist/llvm/test/Transforms/Inline/inline-musttail-varargs.ll
deleted file mode 100644
index bb36e8ce699b..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/Inline/inline-musttail-varargs.ll
+++ /dev/null
@@ -1,23 +0,0 @@
-; RUN: opt < %s -inline -instcombine -S | FileCheck %s
-; RUN: opt < %s -passes='cgscc(inline,function(instcombine))' -S | FileCheck %s
-
-; We can't inline this thunk yet, but one day we will be able to.  And when we
-; do, this test case will be ready.
-
-declare void @ext_method(i8*, i32)
-
-define linkonce_odr void @thunk(i8* %this, ...) {
-  %this_adj = getelementptr i8, i8* %this, i32 4
-  musttail call void (i8*, ...) bitcast (void (i8*, i32)* @ext_method to void (i8*, ...)*)(i8* %this_adj, ...)
-  ret void
-}
-
-define void @thunk_caller(i8* %p) {
-  call void (i8*, ...) @thunk(i8* %p, i32 42)
-  ret void
-}
-; CHECK-LABEL: define void @thunk_caller(i8* %p)
-; CHECK: call void (i8*, ...) @thunk(i8* %p, i32 42)
-
-; FIXME: Inline the thunk. This should be significantly easier than inlining
-; general varargs functions.
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2007-01-14-FcmpSelf.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2007-01-14-FcmpSelf.ll
deleted file mode 100644
index 4fcfd264f452..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2007-01-14-FcmpSelf.ll
+++ /dev/null
@@ -1,6 +0,0 @@
-; RUN: opt < %s -instcombine -S | grep "fcmp uno.*0.0"
-; PR1111
-define i1 @test(double %X) {
-  %tmp = fcmp une double %X, %X
-  ret i1 %tmp
-}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2008-05-22-NegValVector.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2008-05-22-NegValVector.ll
deleted file mode 100644
index 58259be8bc92..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2008-05-22-NegValVector.ll
+++ /dev/null
@@ -1,14 +0,0 @@
-; RUN: opt < %s -instcombine -S | not grep sub
-
-define <3 x i8> @f(<3 x i8> %a) {
-  %A = sub <3 x i8> zeroinitializer, %a
-  %B = mul <3 x i8> %A, <i8 5, i8 5, i8 5>
-  ret <3 x i8> %B
-}
-
-define <3 x i4> @g(<3 x i4> %a) {
-  %A = sub <3 x i4> zeroinitializer, %a
-  %B = mul <3 x i4> %A, <i4 5, i4 5, i4 5>
-  ret <3 x i4> %B
-}
-
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2008-11-27-UDivNegative.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2008-11-27-UDivNegative.ll
deleted file mode 100644
index fc90bba77086..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2008-11-27-UDivNegative.ll
+++ /dev/null
@@ -1,6 +0,0 @@
-; RUN: opt < %s -instcombine -S | not grep div
-
-define i8 @test(i8 %x) readnone nounwind {
-  %A = udiv i8 %x, 250
-  ret i8 %A
-}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll
deleted file mode 100644
index 905357817509..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll
+++ /dev/null
@@ -1,51 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -instcombine -S | FileCheck %s
-
-define i32 @sterix(i32, i8, i64) {
-; CHECK-LABEL: @sterix(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[CONV:%.*]] = zext i32 [[TMP0:%.*]] to i64
-; CHECK-NEXT:    [[CONV1:%.*]] = sext i8 [[TMP1:%.*]] to i32
-; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[CONV1]], 1945964878
-; CHECK-NEXT:    [[SH_PROM:%.*]] = trunc i64 [[TMP2:%.*]] to i32
-; CHECK-NEXT:    [[SHR:%.*]] = lshr i32 [[MUL]], [[SH_PROM]]
-; CHECK-NEXT:    [[CONV2:%.*]] = zext i32 [[SHR]] to i64
-; CHECK-NEXT:    [[MUL3:%.*]] = mul nuw nsw i64 [[CONV]], [[CONV2]]
-; CHECK-NEXT:    [[CONV6:%.*]] = and i64 [[MUL3]], 4294967295
-; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i64 [[CONV6]], [[MUL3]]
-; CHECK-NEXT:    br i1 [[TOBOOL]], label [[LOR_RHS:%.*]], label [[LOR_END:%.*]]
-; CHECK:       lor.rhs:
-; CHECK-NEXT:    [[AND:%.*]] = and i64 [[MUL3]], [[TMP2]]
-; CHECK-NEXT:    [[CONV4:%.*]] = trunc i64 [[AND]] to i32
-; CHECK-NEXT:    [[TOBOOL7:%.*]] = icmp eq i32 [[CONV4]], 0
-; CHECK-NEXT:    [[PHITMP:%.*]] = zext i1 [[TOBOOL7]] to i32
-; CHECK-NEXT:    br label [[LOR_END]]
-; CHECK:       lor.end:
-; CHECK-NEXT:    [[TMP3:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[PHITMP]], [[LOR_RHS]] ]
-; CHECK-NEXT:    ret i32 [[TMP3]]
-;
-entry:
-  %conv = zext i32 %0 to i64
-  %conv1 = sext i8 %1 to i32
-  %mul = mul i32 %conv1, 1945964878
-  %sh_prom = trunc i64 %2 to i32
-  %shr = lshr i32 %mul, %sh_prom
-  %conv2 = zext i32 %shr to i64
-  %mul3 = mul nuw nsw i64 %conv, %conv2
-  %conv6 = and i64 %mul3, 4294967295
-  %tobool = icmp ne i64 %conv6, %mul3
-  br i1 %tobool, label %lor.end, label %lor.rhs
-
-lor.rhs:
-  %and = and i64 %2, %mul3
-  %conv4 = trunc i64 %and to i32
-  %tobool7 = icmp ne i32 %conv4, 0
-  %lnot = xor i1 %tobool7, true
-  br label %lor.end
-
-lor.end:
-  %3 = phi i1 [ true, %entry ], [ %lnot, %lor.rhs ]
-  %conv8 = zext i1 %3 to i32
-  ret i32 %conv8
-}
-
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/X86/x86-vperm2.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/X86/x86-vperm2.ll
deleted file mode 100644
index 84f69aa25d24..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/X86/x86-vperm2.ll
+++ /dev/null
@@ -1,313 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -instcombine -S | FileCheck %s
-
-; This should never happen, but make sure we don't crash handling a non-constant immediate byte.
-
-define <4 x double> @perm2pd_non_const_imm(<4 x double> %a0, <4 x double> %a1, i8 %b) {
-; CHECK-LABEL: @perm2pd_non_const_imm(
-; CHECK-NEXT:    [[RES:%.*]] = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 %b)
-; CHECK-NEXT:    ret <4 x double> [[RES]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 %b)
-  ret <4 x double> %res
-
-}
-
-
-; In the following 4 tests, both zero mask bits of the immediate are set.
-
-define <4 x double> @perm2pd_0x88(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x88(
-; CHECK-NEXT:    ret <4 x double> zeroinitializer
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 136)
-  ret <4 x double> %res
-
-}
-
-define <8 x float> @perm2ps_0x88(<8 x float> %a0, <8 x float> %a1) {
-; CHECK-LABEL: @perm2ps_0x88(
-; CHECK-NEXT:    ret <8 x float> zeroinitializer
-;
-  %res = call <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float> %a0, <8 x float> %a1, i8 136)
-  ret <8 x float> %res
-
-}
-
-define <8 x i32> @perm2si_0x88(<8 x i32> %a0, <8 x i32> %a1) {
-; CHECK-LABEL: @perm2si_0x88(
-; CHECK-NEXT:    ret <8 x i32> zeroinitializer
-;
-  %res = call <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32> %a0, <8 x i32> %a1, i8 136)
-  ret <8 x i32> %res
-
-}
-
-define <4 x i64> @perm2i_0x88(<4 x i64> %a0, <4 x i64> %a1) {
-; CHECK-LABEL: @perm2i_0x88(
-; CHECK-NEXT:    ret <4 x i64> zeroinitializer
-;
-  %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 136)
-  ret <4 x i64> %res
-
-}
-
-
-; The other control bits are ignored when zero mask bits of the immediate are set.
-
-define <4 x double> @perm2pd_0xff(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0xff(
-; CHECK-NEXT:    ret <4 x double> zeroinitializer
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 255)
-  ret <4 x double> %res
-
-}
-
-
-; The following 16 tests are simple shuffles, except for 2 cases where we can just return one of the
-; source vectors. Verify that we generate the right shuffle masks and undef source operand where possible..
-
-define <4 x double> @perm2pd_0x00(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x00(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 0)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x01(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x01(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 1)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x02(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x02(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> %a0, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 2)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x03(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x03(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> %a0, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 3)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x10(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x10(
-; CHECK-NEXT:    ret <4 x double> %a0
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 16)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x11(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x11(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 17)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x12(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x12(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> %a0, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 18)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x13(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x13(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> %a0, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 19)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x20(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x20(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 32)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x21(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x21(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 33)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x22(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x22(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 34)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x23(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x23(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 35)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x30(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x30(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 48)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x31(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x31(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 49)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x32(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x32(
-; CHECK-NEXT:    ret <4 x double> %a1
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 50)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x33(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x33(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 51)
-  ret <4 x double> %res
-
-}
-
-; Confirm that a mask for 32-bit elements is also correct.
-
-define <8 x float> @perm2ps_0x31(<8 x float> %a0, <8 x float> %a1) {
-; CHECK-LABEL: @perm2ps_0x31(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>
-; CHECK-NEXT:    ret <8 x float> [[TMP1]]
-;
-  %res = call <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float> %a0, <8 x float> %a1, i8 49)
-  ret <8 x float> %res
-
-}
-
-
-; Confirm that the AVX2 version works the same.
-
-define <4 x i64> @perm2i_0x33(<4 x i64> %a0, <4 x i64> %a1) {
-; CHECK-LABEL: @perm2i_0x33(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x i64> %a1, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
-; CHECK-NEXT:    ret <4 x i64> [[TMP1]]
-;
-  %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 51)
-  ret <4 x i64> %res
-
-}
-
-
-; Confirm that when a single zero mask bit is set, we replace a source vector with zeros.
-
-define <4 x double> @perm2pd_0x81(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x81(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a0, <4 x double> <double 0.000000e+00, double 0.000000e+00, double undef, double undef>, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 129)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x83(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x83(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> %a1, <4 x double> <double 0.000000e+00, double 0.000000e+00, double undef, double undef>, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 131)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x28(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x28(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> <double 0.000000e+00, double 0.000000e+00, double undef, double undef>, <4 x double> %a1, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 40)
-  ret <4 x double> %res
-
-}
-
-define <4 x double> @perm2pd_0x08(<4 x double> %a0, <4 x double> %a1) {
-; CHECK-LABEL: @perm2pd_0x08(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x double> <double 0.000000e+00, double 0.000000e+00, double undef, double undef>, <4 x double> %a0, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x double> [[TMP1]]
-;
-  %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 8)
-  ret <4 x double> %res
-
-}
-
-; Check one more with the AVX2 version.
-
-define <4 x i64> @perm2i_0x28(<4 x i64> %a0, <4 x i64> %a1) {
-; CHECK-LABEL: @perm2i_0x28(
-; CHECK-NEXT:    [[TMP1:%.*]] = shufflevector <4 x i64> <i64 0, i64 0, i64 undef, i64 undef>, <4 x i64> %a1, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; CHECK-NEXT:    ret <4 x i64> [[TMP1]]
-;
-  %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 40)
-  ret <4 x i64> %res
-
-}
-
-declare <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone
-declare <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone
-declare <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32>, <8 x i32>, i8) nounwind readnone
-declare <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64>, <4 x i64>, i8) nounwind readnone
-
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/bitreverse-fold.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/bitreverse-fold.ll
deleted file mode 100644
index b798ad33b3f0..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/bitreverse-fold.ll
+++ /dev/null
@@ -1,110 +0,0 @@
-; RUN: opt < %s -instcombine -S | FileCheck %s
-
-define i32 @identity_bitreverse_i32(i32 %p) {
-; CHECK-LABEL: @identity_bitreverse_i32(
-; CHECK-NEXT: ret i32 %p
-  %a = call i32 @llvm.bitreverse.i32(i32 %p)
-  %b = call i32 @llvm.bitreverse.i32(i32 %a)
-  ret i32 %b
-}
-
-; CHECK-LABEL: @identity_bitreverse_v2i32(
-; CHECK-NEXT: ret <2 x i32> %p
-define <2 x i32> @identity_bitreverse_v2i32(<2 x i32> %p) {
-  %a = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %p)
-  %b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
-  ret <2 x i32> %b
-}
-
-; CHECK-LABEL: @reverse_0_i32(
-; CHECK-NEXT: ret i32 0
-define i32 @reverse_0_i32() {
-  %x = call i32 @llvm.bitreverse.i32(i32 0)
-  ret i32 %x
-}
-
-; CHECK-LABEL: @reverse_1_i32(
-; CHECK-NEXT: ret i32 -2147483648
-define i32 @reverse_1_i32() {
-  %x = call i32 @llvm.bitreverse.i32(i32 1)
-  ret i32 %x
-}
-
-; CHECK-LABEL: @reverse_neg1_i32(
-; CHECK-NEXT: ret i32 -1
-define i32 @reverse_neg1_i32() {
-  %x = call i32 @llvm.bitreverse.i32(i32 -1)
-  ret i32 %x
-}
-
-; CHECK-LABEL: @reverse_undef_i32(
-; CHECK-NEXT: ret i32 undef
-define i32 @reverse_undef_i32() {
-  %x = call i32 @llvm.bitreverse.i32(i32 undef)
-  ret i32 %x
-}
-
-; CHECK-LABEL: @reverse_false_i1(
-; CHECK-NEXT: ret i1 false
-define i1 @reverse_false_i1() {
-  %x = call i1 @llvm.bitreverse.i1(i1 false)
-  ret i1 %x
-}
-
-; CHECK-LABEL: @reverse_true_i1(
-; CHECK-NEXT: ret i1 true
-define i1 @reverse_true_i1() {
-  %x = call i1 @llvm.bitreverse.i1(i1 true)
-  ret i1 %x
-}
-
-; CHECK-LABEL: @reverse_undef_i1(
-; CHECK-NEXT: ret i1 undef
-define i1 @reverse_undef_i1() {
-  %x = call i1 @llvm.bitreverse.i1(i1 undef)
-  ret i1 %x
-}
-
-; CHECK-LABEL: @reverse_false_v2i1(
-; CHECK-NEXT: ret <2 x i1> zeroinitializer
-define <2 x i1> @reverse_false_v2i1() {
-  %x = call <2  x i1> @llvm.bitreverse.v2i1(<2 x i1> zeroinitializer)
-  ret <2 x i1> %x
-}
-
-; CHECK-LABEL: @reverse_true_v2i1(
-; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
-define <2 x i1> @reverse_true_v2i1() {
-  %x = call <2 x i1> @llvm.bitreverse.v2i1(<2 x i1> <i1 true, i1 true>)
-  ret <2 x i1> %x
-}
-
-; CHECK-LABEL: @bitreverse_920_1234_v2i32(
-; CHECK-NEXT: ret <2 x i32> <i32 432013312, i32 1260388352>
-define <2 x i32> @bitreverse_920_1234_v2i32() {
-  %x = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> <i32 920, i32 1234>)
-  ret <2 x i32> %x
-}
-
-; CHECK-LABEL: @reverse_100_i3(
-; CHECK-NEXT: ret i3 1
-define i3 @reverse_100_i3() {
-  %x = call i3 @llvm.bitreverse.i3(i3 100)
-  ret i3 %x
-}
-
-; CHECK-LABEL: @reverse_6_3_v2i3(
-; CHECK-NEXT: ret <2 x i3> <i3 3, i3 -2>
-define <2 x i3> @reverse_6_3_v2i3() {
-  %x = call <2  x i3> @llvm.bitreverse.v2i3(<2 x i3> <i3 6, i3 3>)
-  ret <2 x i3> %x
-}
-
-declare i1 @llvm.bitreverse.i1(i1) readnone
-declare <2 x i1> @llvm.bitreverse.v2i1(<2 x i1>) readnone
-
-declare i3 @llvm.bitreverse.i3(i3) readnone
-declare <2 x i3> @llvm.bitreverse.v2i3(<2 x i3>) readnone
-
-declare i32 @llvm.bitreverse.i32(i32) readnone
-declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>) readnone
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/element-atomic-memcpy-to-loads.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/element-atomic-memcpy-to-loads.ll
deleted file mode 100644
index 230ac1796671..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/element-atomic-memcpy-to-loads.ll
+++ /dev/null
@@ -1,94 +0,0 @@
-; RUN: opt -instcombine -unfold-element-atomic-memcpy-max-elements=8 -S < %s | FileCheck %s
-; Temporarily an expected failure until inst combine is updated in the next patch
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
-; Test basic unfolding -- unordered load & store
-define void @test1a(i8* %Src, i8* %Dst) {
-; CHECK-LABEL: test1a
-; CHECK-NOT: llvm.memcpy.element.unordered.atomic
-
-; CHECK-DAG: %memcpy_unfold.src_casted = bitcast i8* %Src to i32*
-; CHECK-DAG: %memcpy_unfold.dst_casted = bitcast i8* %Dst to i32*
-
-; CHECK-DAG: [[VAL1:%[^\s]+]] =  load atomic i32, i32* %memcpy_unfold.src_casted unordered, align 4
-; CHECK-DAG: store atomic i32 [[VAL1]], i32* %memcpy_unfold.dst_casted unordered, align 8
-
-; CHECK-DAG: [[VAL2:%[^\s]+]] =  load atomic i32, i32* %{{[^\s]+}} unordered, align 4
-; CHECK-DAG: store atomic i32 [[VAL2]], i32* %{{[^\s]+}} unordered, align 4
-
-; CHECK-DAG: [[VAL3:%[^\s]+]] =  load atomic i32, i32* %{{[^\s]+}} unordered, align 4
-; CHECK-DAG: store atomic i32 [[VAL3]], i32* %{{[^\s]+}} unordered, align 4
-
-; CHECK-DAG: [[VAL4:%[^\s]+]] =  load atomic i32, i32* %{{[^\s]+}} unordered, align 4
-; CHECK-DAG: store atomic i32 [[VAL4]], i32* %{{[^\s]+}} unordered, align 4
-entry:
-  call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 8 %Dst, i8* align 4 %Src, i32 16, i32 4)
-  ret void
-}
-
-; Test that we don't unfold too much
-define void @test2(i8* %Src, i8* %Dst) {
-; CHECK-LABEL: test2
-
-; CHECK-NOT: load
-; CHECK-NOT: store
-; CHECK: llvm.memcpy.element.unordered.atomic
-entry:
-  call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 8 %Dst, i8* align 4 %Src, i32 256, i32 4)
-  ret void
-}
-
-; Test that we will not unfold into non native integers
-define void @test3(i8* %Src, i8* %Dst) {
-; CHECK-LABEL: test3
-
-; CHECK-NOT: load
-; CHECK-NOT: store
-; CHECK: llvm.memcpy.element.unordered.atomic
-entry:
-  call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 64 %Dst, i8* align 64 %Src, i32 64, i32 64)
-  ret void
-}
-
-; Test that we will eliminate redundant bitcasts
-define void @test4(i64* %Src, i64* %Dst) {
-; CHECK-LABEL: test4
-; CHECK-NOT: llvm.memcpy.element.unordered.atomic
-
-; CHECK-NOT: bitcast
-
-; CHECK-DAG: [[VAL1:%[^\s]+]] =  load atomic i64, i64* %Src unordered, align 16
-; CHECK-DAG: store atomic i64 [[VAL1]], i64* %Dst unordered, align 16
-
-; CHECK-DAG: [[SRC_ADDR2:%[^ ]+]] = getelementptr i64, i64* %Src, i64 1
-; CHECK-DAG: [[DST_ADDR2:%[^ ]+]] = getelementptr i64, i64* %Dst, i64 1
-; CHECK-DAG: [[VAL2:%[^\s]+]] =  load atomic i64, i64* [[SRC_ADDR2]] unordered, align 8
-; CHECK-DAG: store atomic i64 [[VAL2]], i64* [[DST_ADDR2]] unordered, align 8
-
-; CHECK-DAG: [[SRC_ADDR3:%[^ ]+]] = getelementptr i64, i64* %Src, i64 2
-; CHECK-DAG: [[DST_ADDR3:%[^ ]+]] = getelementptr i64, i64* %Dst, i64 2
-; CHECK-DAG: [[VAL3:%[^ ]+]] =  load atomic i64, i64* [[SRC_ADDR3]] unordered, align 8
-; CHECK-DAG: store atomic i64 [[VAL3]], i64* [[DST_ADDR3]] unordered, align 8
-
-; CHECK-DAG: [[SRC_ADDR4:%[^ ]+]] = getelementptr i64, i64* %Src, i64 3
-; CHECK-DAG: [[DST_ADDR4:%[^ ]+]] = getelementptr i64, i64* %Dst, i64 3
-; CHECK-DAG: [[VAL4:%[^ ]+]] =  load atomic i64, i64* [[SRC_ADDR4]] unordered, align 8
-; CHECK-DAG: store atomic i64 [[VAL4]], i64* [[DST_ADDR4]] unordered, align 8
-entry:
-  %Src.casted = bitcast i64* %Src to i8*
-  %Dst.casted = bitcast i64* %Dst to i8*
-  call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 16 %Dst.casted, i8* align 16 %Src.casted, i32 32, i32 8)
-  ret void
-}
-
-; Test that 0-length unordered atomic memcpy gets removed.
-define void @test5(i8* %Src, i8* %Dst) {
-; CHECK-LABEL: test5
-
-; CHECK-NOT: llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 64 %Dst, i8* align 64 %Src, i32 0, i32 8)
-entry:
-  call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 64 %Dst, i8* align 64 %Src, i32 0, i32 8)
-  ret void
-}
-
-declare void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/fneg-ext.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/fneg-ext.ll
deleted file mode 100644
index 922d26a465b7..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/fneg-ext.ll
+++ /dev/null
@@ -1,23 +0,0 @@
-; RUN: opt -instcombine -S < %s | FileCheck %s
-
-; CHECK: test1
-define double @test1(float %a, double %b) nounwind readnone ssp uwtable {
-; CHECK-NOT: fsub
-; CHECK: fpext
-; CHECK: fadd
-  %1 = fsub float -0.000000e+00, %a
-  %2 = fpext float %1 to double
-  %3 = fsub double %b, %2
-  ret double %3
-}
-
-; CHECK: test2
-define double @test2(float %a, double %b) nounwind readnone ssp uwtable {
-; CHECK-NOT: fsub
-; CHECK: fpext
-; CHECK: fadd fast
-  %1 = fsub float -0.000000e+00, %a
-  %2 = fpext float %1 to double
-  %3 = fsub fast double %b, %2
-  ret double %3
-}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/pr33765.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/pr33765.ll
deleted file mode 100644
index 99ed0d13b5cf..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/pr33765.ll
+++ /dev/null
@@ -1,32 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S %s -instcombine | FileCheck %s
-
-@glob = external global i16
-
-define void @patatino(i8 %beth) {
-; CHECK-LABEL: @patatino(
-; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[BETH:%.*]] to i32
-; CHECK-NEXT:    br i1 undef, label [[IF_THEN9:%.*]], label [[IF_THEN9]]
-; CHECK:       if.then9:
-; CHECK-NEXT:    [[MUL:%.*]] = mul nuw nsw i32 [[CONV]], [[CONV]]
-; CHECK-NEXT:    [[TINKY:%.*]] = load i16, i16* @glob, align 2
-; CHECK-NEXT:    [[CONV131:%.*]] = zext i16 [[TINKY]] to i32
-; CHECK-NEXT:    [[AND:%.*]] = and i32 [[MUL]], [[CONV131]]
-; CHECK-NEXT:    [[CONV14:%.*]] = trunc i32 [[AND]] to i16
-; CHECK-NEXT:    store i16 [[CONV14]], i16* @glob, align 2
-; CHECK-NEXT:    ret void
-;
-  %conv = zext i8 %beth to i32
-  %mul = mul nuw nsw i32 %conv, %conv
-  %conv3 = and i32 %mul, 255
-  %tobool8 = icmp ne i32 %mul, %conv3
-  br i1 %tobool8, label %if.then9, label %if.then9
-
-if.then9:
-  %tinky = load i16, i16* @glob
-  %conv13 = sext i16 %tinky to i32
-  %and = and i32 %mul, %conv13
-  %conv14 = trunc i32 %and to i16
-  store i16 %conv14, i16* @glob
-  ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/InstSimplify/call-callconv.ll b/external/bsd/llvm/dist/llvm/test/Transforms/InstSimplify/call-callconv.ll
deleted file mode 100644
index 56a8e44328fe..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/InstSimplify/call-callconv.ll
+++ /dev/null
@@ -1,48 +0,0 @@
-; RUN: opt < %s -instcombine -S | FileCheck %s
-; Verify that the non-default calling conv doesn't prevent the libcall simplification
-
-@.str = private unnamed_addr constant [4 x i8] c"abc\00", align 1
-
-define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
-; CHECK: _abs
-  %call = tail call arm_aapcscc i32 @abs(i32 %i) nounwind readnone
-  ret i32 %call
-; CHECK: %[[ISPOS:.*]] = icmp sgt i32 %i, -1
-; CHECK: %[[NEG:.*]] = sub i32 0, %i
-; CHECK: %[[RET:.*]] = select i1 %[[ISPOS]], i32 %i, i32 %[[NEG]]
-; CHECK: ret i32 %[[RET]]
-}
-
-declare arm_aapcscc i32 @abs(i32) nounwind readnone
-
-define arm_aapcscc i32 @_labs(i32 %i) nounwind readnone {
-; CHECK: _labs
-  %call = tail call arm_aapcscc i32 @labs(i32 %i) nounwind readnone
-  ret i32 %call
-; CHECK: %[[ISPOS:.*]] = icmp sgt i32 %i, -1
-; CHECK: %[[NEG:.*]] = sub i32 0, %i
-; CHECK: %[[RET:.*]] = select i1 %[[ISPOS]], i32 %i, i32 %[[NEG]]
-; CHECK: ret i32 %[[RET]]
-}
-
-declare arm_aapcscc i32 @labs(i32) nounwind readnone
-
-define arm_aapcscc i32 @_strlen1() {
-; CHECK: _strlen1
-  %call = tail call arm_aapcscc i32 @strlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0))
-  ret i32 %call
-; CHECK: ret i32 3
-}
-
-declare arm_aapcscc i32 @strlen(i8*)
-
-define arm_aapcscc zeroext i1 @_strlen2(i8* %str) {
-; CHECK: _strlen2
-  %call = tail call arm_aapcscc i32 @strlen(i8* %str)
-  %cmp = icmp ne i32 %call, 0
-  ret i1 %cmp
-
-; CHECK: %[[STRLENFIRST:.*]] = load i8, i8* %str
-; CHECK: %[[CMP:.*]] = icmp ne i8 %[[STRLENFIRST]], 0
-; CHECK: ret i1 %[[CMP]]
-}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/current-limitations-lcssa.ll b/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/current-limitations-lcssa.ll
deleted file mode 100644
index df6c6cfdbcb5..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/current-limitations-lcssa.ll
+++ /dev/null
@@ -1,76 +0,0 @@
-; RUN: opt < %s -basicaa -loop-interchange -S | FileCheck %s
-;; We test the complete .ll for adjustment in outer loop header/latch and inner loop header/latch.
-
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-@A = common global [100 x [100 x i32]] zeroinitializer
-@C = common global [100 x [100 x i32]] zeroinitializer
-
-;; FIXME:
-;; Test for interchange when we have an lcssa phi. This should ideally be interchanged but it is currently not supported.
-;;     for(gi=1;gi<N;gi++)
-;;       for(gj=1;gj<M;gj++)
-;;         A[gj][gi] = A[gj - 1][gi] + C[gj][gi];
-
-@gi = common global i32 0
-@gj = common global i32 0
-
-define void @interchange_07(i32 %N, i32 %M){
-entry:
-  store i32 1, i32* @gi
-  %cmp21 = icmp sgt i32 %N, 1
-  br i1 %cmp21, label %for.cond1.preheader.lr.ph, label %for.end16
-
-for.cond1.preheader.lr.ph:
-  %cmp218 = icmp sgt i32 %M, 1
-  %gi.promoted = load i32, i32* @gi
-  %0 = add i32 %M, -1
-  %1 = sext i32 %gi.promoted to i64
-  %2 = sext i32 %N to i64
-  %3 = add i32 %gi.promoted, 1
-  %4 = icmp slt i32 %3, %N
-  %smax = select i1 %4, i32 %N, i32 %3
-  br label %for.cond1.preheader
-
-for.cond1.preheader:
-  %indvars.iv25 = phi i64 [ %1, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next26, %for.inc14 ]
-  br i1 %cmp218, label %for.body3, label %for.inc14
-
-for.body3:
-  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3 ], [ 1, %for.cond1.preheader ]
-  %5 = add nsw i64 %indvars.iv, -1
-  %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %5, i64 %indvars.iv25
-  %6 = load i32, i32* %arrayidx5
-  %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %indvars.iv, i64 %indvars.iv25
-  %7 = load i32, i32* %arrayidx9
-  %add = add nsw i32 %7, %6
-  %arrayidx13 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv, i64 %indvars.iv25
-  store i32 %add, i32* %arrayidx13
-  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-  %lftr.wideiv = trunc i64 %indvars.iv to i32
-  %exitcond = icmp eq i32 %lftr.wideiv, %0
-  br i1 %exitcond, label %for.inc14, label %for.body3
-
-for.inc14:
-  %inc.lcssa23 = phi i32 [ 1, %for.cond1.preheader ], [ %M, %for.body3 ]
-  %indvars.iv.next26 = add nsw i64 %indvars.iv25, 1
-  %cmp = icmp slt i64 %indvars.iv.next26, %2
-  br i1 %cmp, label %for.cond1.preheader, label %for.cond.for.end16_crit_edge
-
-for.cond.for.end16_crit_edge:
-  store i32 %inc.lcssa23, i32* @gj
-  store i32 %smax, i32* @gi
-  br label %for.end16
-
-for.end16:
-  ret void
-}
-
-; CHECK-LABEL: @interchange_07
-; CHECK: for.body3:                                        ; preds = %for.body3.preheader, %for.body3
-; CHECK:   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3 ], [ 1, %for.body3.preheader ]
-; CHECK:   %5 = add nsw i64 %indvars.iv, -1
-; CHECK:   %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %5, i64 %indvars.iv25
-; CHECK:   %6 = load i32, i32* %arrayidx5
-; CHECK:   %arrayidx9 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @C, i64 0, i64 %indvars.iv, i64 %indvars.iv25
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-not-profitable.ll b/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-not-profitable.ll
deleted file mode 100644
index 67a63cab08bd..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-not-profitable.ll
+++ /dev/null
@@ -1,66 +0,0 @@
-; RUN: opt < %s -basicaa -loop-interchange -S | FileCheck %s
-;; We test the complete .ll for adjustment in outer loop header/latch and inner loop header/latch.
-
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-@A = common global [100 x [100 x i32]] zeroinitializer
-@B = common global [100 x i32] zeroinitializer
-
-;; Loops should not be interchanged in this case as it is not profitable.
-;;  for(int i=0;i<100;i++)
-;;    for(int j=0;j<100;j++)
-;;      A[i][j] = A[i][j]+k;
-
-define void @interchange_03(i32 %k) {
-entry:
-  br label %for.cond1.preheader
-
-for.cond1.preheader:
-  %indvars.iv21 = phi i64 [ 0, %entry ], [ %indvars.iv.next22, %for.inc10 ]
-  br label %for.body3
-
-for.body3:
-  %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body3 ]
-  %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv21, i64 %indvars.iv
-  %0 = load i32, i32* %arrayidx5
-  %add = add nsw i32 %0, %k
-  store i32 %add, i32* %arrayidx5
-  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-  %exitcond = icmp eq i64 %indvars.iv.next, 100
-  br i1 %exitcond, label %for.inc10, label %for.body3
-
-for.inc10:
-  %indvars.iv.next22 = add nuw nsw i64 %indvars.iv21, 1
-  %exitcond23 = icmp eq i64 %indvars.iv.next22, 100
-  br i1 %exitcond23, label %for.end12, label %for.cond1.preheader
-
-for.end12:
-  ret void
-}
-
-; CHECK-LABEL: @interchange_03
-; CHECK: entry:
-; CHECK:   br label %for.cond1.preheader.preheader
-; CHECK: for.cond1.preheader.preheader:                    ; preds = %entry
-; CHECK:   br label %for.cond1.preheader
-; CHECK: for.cond1.preheader:                              ; preds = %for.cond1.preheader.preheader, %for.inc10
-; CHECK:   %indvars.iv21 = phi i64 [ %indvars.iv.next22, %for.inc10 ], [ 0, %for.cond1.preheader.preheader ]
-; CHECK:  br label %for.body3.preheader
-; CHECK: for.body3.preheader:                              ; preds = %for.cond1.preheader
-; CHECK:   br label %for.body3
-; CHECK: for.body3:                                        ; preds = %for.body3.preheader, %for.body3
-; CHECK:   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3 ], [ 0, %for.body3.preheader ]
-; CHECK:   %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv21, i64 %indvars.iv
-; CHECK:   %0 = load i32, i32* %arrayidx5
-; CHECK:   %add = add nsw i32 %0, %k
-; CHECK:   store i32 %add, i32* %arrayidx5
-; CHECK:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-; CHECK:   %exitcond = icmp eq i64 %indvars.iv.next, 100
-; CHECK:   br i1 %exitcond, label %for.inc10, label %for.body3
-; CHECK: for.inc10:                                        ; preds = %for.body3
-; CHECK:   %indvars.iv.next22 = add nuw nsw i64 %indvars.iv21, 1
-; CHECK:   %exitcond23 = icmp eq i64 %indvars.iv.next22, 100
-; CHECK:   br i1 %exitcond23, label %for.end12, label %for.cond1.preheader
-; CHECK: for.end12:                                        ; preds = %for.inc10
-; CHECK:   ret void
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-output-dependencies.ll b/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-output-dependencies.ll
deleted file mode 100644
index 98deba96f8c6..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-output-dependencies.ll
+++ /dev/null
@@ -1,86 +0,0 @@
-; RUN: opt < %s -basicaa -loop-interchange -S | FileCheck %s
-;; We test the complete .ll for adjustment in outer loop header/latch and inner loop header/latch.
-
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-@A = common global [100 x [100 x i32]] zeroinitializer
-
-;; Test to make sure we can handle output dependencies.
-;;
-;;  for (int i = 0; i < 2; ++i)
-;;    for(int j = 0; j < 3; ++j) {
-;;      A[j][i] = i;
-;;      A[j][i+1] = j;
-;;    }
-
-@A10 = local_unnamed_addr global [3 x [3 x i32]] zeroinitializer, align 16
-
-define void @interchange_10() {
-entry:
-  br label %for.cond1.preheader
-
-for.cond.loopexit:                                ; preds = %for.body4
-  %exitcond28 = icmp ne i64 %indvars.iv.next27, 2
-  br i1 %exitcond28, label %for.cond1.preheader, label %for.cond.cleanup
-
-for.cond1.preheader:                              ; preds = %for.cond.loopexit, %entry
-  %indvars.iv26 = phi i64 [ 0, %entry ], [ %indvars.iv.next27, %for.cond.loopexit ]
-  %indvars.iv.next27 = add nuw nsw i64 %indvars.iv26, 1
-  br label %for.body4
-
-for.cond.cleanup:                                 ; preds = %for.cond.loopexit
-  ret void
-
-for.body4:                                        ; preds = %for.body4, %for.cond1.preheader
-  %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body4 ]
-  %arrayidx6 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* @A10, i64 0, i64 %indvars.iv, i64 %indvars.iv26
-  %tmp = trunc i64 %indvars.iv26 to i32
-  store i32 %tmp, i32* %arrayidx6, align 4
-  %arrayidx10 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* @A10, i64 0, i64 %indvars.iv, i64 %indvars.iv.next27
-  %tmp1 = trunc i64 %indvars.iv to i32
-  store i32 %tmp1, i32* %arrayidx10, align 4
-  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-  %exitcond = icmp ne i64 %indvars.iv.next, 3
-  br i1 %exitcond, label %for.body4, label %for.cond.loopexit
-}
-
-; CHECK-LABEL: @interchange_10
-; CHECK: entry:
-; CHECK:   br label %for.body4.preheader
-
-; CHECK: for.cond1.preheader.preheader:
-; CHECK:   br label %for.cond1.preheader
-
-; CHECK: for.cond.loopexit:
-; CHECK:   %exitcond28 = icmp ne i64 %indvars.iv.next27, 2
-; CHECK:   br i1 %exitcond28, label %for.cond1.preheader, label %for.body4.split
-
-; CHECK: for.cond1.preheader:
-; CHECK:   %indvars.iv26 = phi i64 [ %indvars.iv.next27, %for.cond.loopexit ], [ 0, %for.cond1.preheader.preheader ]
-; CHECK:   %indvars.iv.next27 = add nuw nsw i64 %indvars.iv26, 1
-; CHECK:   br label %for.body4.split1
-
-; CHECK: for.body4.preheader:
-; CHECK:   br label %for.body4
-
-; CHECK: for.cond.cleanup:
-; CHECK:   ret void
-
-; CHECK: for.body4:
-; CHECK:   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body4.split ], [ 0, %for.body4.preheader ]
-; CHECK:   br label %for.cond1.preheader.preheader
-
-; CHECK: for.body4.split1:
-; CHECK:   %arrayidx6 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* @A10, i64 0, i64 %indvars.iv, i64 %indvars.iv26
-; CHECK:   %tmp = trunc i64 %indvars.iv26 to i32
-; CHECK:   store i32 %tmp, i32* %arrayidx6, align 4
-; CHECK:   %arrayidx10 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* @A10, i64 0, i64 %indvars.iv, i64 %indvars.iv.next27
-; CHECK:   %tmp1 = trunc i64 %indvars.iv to i32
-; CHECK:   store i32 %tmp1, i32* %arrayidx10, align 4
-; CHECK:   br label %for.cond.loopexit
-
-; CHECK: for.body4.split:
-; CHECK:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-; CHECK:   %exitcond = icmp ne i64 %indvars.iv.next, 3
-; CHECK:   br i1 %exitcond, label %for.body4, label %for.cond.cleanup
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-simple-count-down.ll b/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-simple-count-down.ll
deleted file mode 100644
index 70ba5940257f..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-simple-count-down.ll
+++ /dev/null
@@ -1,69 +0,0 @@
-; RUN: opt < %s -basicaa -loop-interchange -S | FileCheck %s
-;; We test the complete .ll for adjustment in outer loop header/latch and inner loop header/latch.
-
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-@A = common global [100 x [100 x i32]] zeroinitializer
-@B = common global [100 x i32] zeroinitializer
-
-;; for(int i=0;i<100;i++)
-;;   for(int j=100;j>=0;j--)
-;;     A[j][i] = A[j][i]+k;
-
-define void @interchange_02(i32 %k) {
-entry:
-  br label %for.cond1.preheader
-
-for.cond1.preheader:
-  %indvars.iv19 = phi i64 [ 0, %entry ], [ %indvars.iv.next20, %for.inc10 ]
-  br label %for.body3
-
-for.body3:
-  %indvars.iv = phi i64 [ 100, %for.cond1.preheader ], [ %indvars.iv.next, %for.body3 ]
-  %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv, i64 %indvars.iv19
-  %0 = load i32, i32* %arrayidx5
-  %add = add nsw i32 %0, %k
-  store i32 %add, i32* %arrayidx5
-  %indvars.iv.next = add nsw i64 %indvars.iv, -1
-  %cmp2 = icmp sgt i64 %indvars.iv, 0
-  br i1 %cmp2, label %for.body3, label %for.inc10
-
-for.inc10:
-  %indvars.iv.next20 = add nuw nsw i64 %indvars.iv19, 1
-  %exitcond = icmp eq i64 %indvars.iv.next20, 100
-  br i1 %exitcond, label %for.end11, label %for.cond1.preheader
-
-for.end11:
-  ret void
-}
-
-; CHECK-LABEL: @interchange_02
-; CHECK: entry:
-; CHECK:   br label %for.body3.preheader
-; CHECK: for.cond1.preheader.preheader:
-; CHECK:   br label %for.cond1.preheader
-; CHECK: for.cond1.preheader:
-; CHECK:   %indvars.iv19 = phi i64 [ %indvars.iv.next20, %for.inc10 ], [ 0, %for.cond1.preheader.preheader ]
-; CHECK:   br label %for.body3.split1
-; CHECK: for.body3.preheader:
-; CHECK:   br label %for.body3
-; CHECK: for.body3:
-; CHECK:   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3.split ], [ 100, %for.body3.preheader ]
-; CHECK:   br label %for.cond1.preheader.preheader
-; CHECK: for.body3.split1:                                 ; preds = %for.cond1.preheader
-; CHECK:   %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv, i64 %indvars.iv19
-; CHECK:   %0 = load i32, i32* %arrayidx5
-; CHECK:   %add = add nsw i32 %0, %k
-; CHECK:   store i32 %add, i32* %arrayidx5
-; CHECK:   br label %for.inc10
-; CHECK: for.body3.split:
-; CHECK:   %indvars.iv.next = add nsw i64 %indvars.iv, -1
-; CHECK:   %cmp2 = icmp sgt i64 %indvars.iv, 0
-; CHECK:   br i1 %cmp2, label %for.body3, label %for.end11
-; CHECK: for.inc10:
-; CHECK:   %indvars.iv.next20 = add nuw nsw i64 %indvars.iv19, 1
-; CHECK:   %exitcond = icmp eq i64 %indvars.iv.next20, 100
-; CHECK:   br i1 %exitcond, label %for.body3.split, label %for.cond1.preheader
-; CHECK: for.end11:
-; CHECK:   ret void
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-simple-count-up.ll b/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-simple-count-up.ll
deleted file mode 100644
index 4febe0269810..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/LoopInterchange/interchange-simple-count-up.ll
+++ /dev/null
@@ -1,86 +0,0 @@
-; RUN: opt < %s -basicaa -loop-interchange -S | FileCheck %s
-;; We test the complete .ll for adjustment in outer loop header/latch and inner loop header/latch.
-
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-@A = common global [100 x [100 x i32]] zeroinitializer
-@B = common global [100 x i32] zeroinitializer
-
-;;  for(int i=0;i<N;i++)
-;;    for(int j=1;j<N;j++)
-;;      A[j][i] = A[j][i]+k;
-
-define void @interchange_01(i32 %k, i32 %N) {
-entry:
-  %cmp21 = icmp sgt i32 %N, 0
-  br i1 %cmp21, label %for.cond1.preheader.lr.ph, label %for.end12
-
-for.cond1.preheader.lr.ph:
-  %cmp219 = icmp sgt i32 %N, 1
-  %0 = add i32 %N, -1
-  br label %for.cond1.preheader
-
-for.cond1.preheader:
-  %indvars.iv23 = phi i64 [ 0, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next24, %for.inc10 ]
-  br i1 %cmp219, label %for.body3, label %for.inc10
-
-for.body3:
-  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3 ], [ 1, %for.cond1.preheader ]
-  %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv, i64 %indvars.iv23
-  %1 = load i32, i32* %arrayidx5
-  %add = add nsw i32 %1, %k
-  store i32 %add, i32* %arrayidx5
-  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-  %lftr.wideiv = trunc i64 %indvars.iv to i32
-  %exitcond = icmp eq i32 %lftr.wideiv, %0
-  br i1 %exitcond, label %for.inc10, label %for.body3
-
-for.inc10:
-  %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
-  %lftr.wideiv25 = trunc i64 %indvars.iv23 to i32
-  %exitcond26 = icmp eq i32 %lftr.wideiv25, %0
-  br i1 %exitcond26, label %for.end12, label %for.cond1.preheader
-
-for.end12:
-  ret void
-}
-
-; CHECK-LABEL: @interchange_01
-; CHECK: entry:
-; CHECK:   %cmp21 = icmp sgt i32 %N, 0
-; CHECK:   br i1 %cmp21, label %for.body3.preheader, label %for.end12
-; CHECK: for.cond1.preheader.lr.ph:
-; CHECK:   br label %for.cond1.preheader
-; CHECK: for.cond1.preheader:
-; CHECK:   %indvars.iv23 = phi i64 [ 0, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next24, %for.inc10 ]
-; CHECK:   br i1 %cmp219, label %for.body3.split1, label %for.end12.loopexit
-; CHECK: for.body3.preheader:
-; CHECK:   %cmp219 = icmp sgt i32 %N, 1
-; CHECK:   %0 = add i32 %N, -1
-; CHECK:   br label %for.body3
-; CHECK: for.body3:
-; CHECK:   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body3.split ], [ 1, %for.body3.preheader ]
-; CHECK:   br label %for.cond1.preheader.lr.ph
-; CHECK: for.body3.split1:
-; CHECK:   %arrayidx5 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv, i64 %indvars.iv23
-; CHECK:   %1 = load i32, i32* %arrayidx5
-; CHECK:   %add = add nsw i32 %1, %k
-; CHECK:   store i32 %add, i32* %arrayidx5
-; CHECK:   br label %for.inc10.loopexit
-; CHECK: for.body3.split:
-; CHECK:   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-; CHECK:   %lftr.wideiv = trunc i64 %indvars.iv to i32
-; CHECK:   %exitcond = icmp eq i32 %lftr.wideiv, %0
-; CHECK:   br i1 %exitcond, label %for.end12.loopexit, label %for.body3
-; CHECK: for.inc10.loopexit:
-; CHECK:   br label %for.inc10
-; CHECK: for.inc10:
-; CHECK:   %indvars.iv.next24 = add nuw nsw i64 %indvars.iv23, 1
-; CHECK:   %lftr.wideiv25 = trunc i64 %indvars.iv23 to i32
-; CHECK:   %exitcond26 = icmp eq i32 %lftr.wideiv25, %0
-; CHECK:   br i1 %exitcond26, label %for.body3.split, label %for.cond1.preheader
-; CHECK: for.end12.loopexit:
-; CHECK:   br label %for.end12
-; CHECK: for.end12:
-; CHECK:   ret void
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/LoopVectorize/duplicated-metadata.ll b/external/bsd/llvm/dist/llvm/test/Transforms/LoopVectorize/duplicated-metadata.ll
deleted file mode 100644
index d0afd28d978a..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/LoopVectorize/duplicated-metadata.ll
+++ /dev/null
@@ -1,29 +0,0 @@
-; RUN: opt < %s -loop-vectorize -S 2>&1 | FileCheck %s
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
-; This test makes sure we don't duplicate the loop vectorizer's metadata
-; while marking them as already vectorized (by setting width = 1), even
-; at lower optimization levels, where no extra cleanup is done
-
-define void @_Z3fooPf(float* %a) {
-entry:
-  br label %for.body
-
-for.body:                                         ; preds = %for.body, %entry
-  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
-  %arrayidx = getelementptr inbounds float, float* %a, i64 %indvars.iv
-  %p = load float, float* %arrayidx, align 4
-  %mul = fmul float %p, 2.000000e+00
-  store float %mul, float* %arrayidx, align 4
-  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-  %exitcond = icmp eq i64 %indvars.iv.next, 1024
-  br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
-
-for.end:                                          ; preds = %for.body
-  ret void
-}
-
-!0 = !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.width", i32 4}
-; CHECK-NOT: !{metadata !"llvm.loop.vectorize.width", i32 4}
-; CHECK: !{!"llvm.loop.interleave.count", i32 1}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/SampleProfile/Inputs/import.prof b/external/bsd/llvm/dist/llvm/test/Transforms/SampleProfile/Inputs/import.prof
deleted file mode 100644
index efadc0c5c9c6..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/SampleProfile/Inputs/import.prof
+++ /dev/null
@@ -1,4 +0,0 @@
-main:10000:0
- 3: foo:1000
-  3: bar:200
-   4: baz:10
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/SampleProfile/import.ll b/external/bsd/llvm/dist/llvm/test/Transforms/SampleProfile/import.ll
deleted file mode 100644
index 1ee45fb4fd3e..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/SampleProfile/import.ll
+++ /dev/null
@@ -1,31 +0,0 @@
-; RUN: opt < %s -sample-profile -sample-profile-file=%S/Inputs/import.prof -S | FileCheck %s
-
-; Tests whether the functions in the inline stack are added to the
-; function_entry_count metadata.
-
-declare void @foo()
-
-define void @main() !dbg !7 {
-  call void @foo(), !dbg !18
-  ret void
-}
-
-; GUIDs of foo and bar should be included in the metadata to make sure hot
-; inline stacks are imported.
-; CHECK: !{!"function_entry_count", i64 1, i64 6699318081062747564, i64 -2012135647395072713}
-
-!llvm.dbg.cu = !{!0}
-!llvm.module.flags = !{!8, !9}
-!llvm.ident = !{!10}
-
-!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, producer: "clang version 3.5 ", isOptimized: false, emissionKind: NoDebug, file: !1, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
-!1 = !DIFile(filename: "calls.cc", directory: ".")
-!2 = !{}
-!6 = !DISubroutineType(types: !2)
-!7 = distinct !DISubprogram(name: "main", line: 7, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !0, scopeLine: 7, file: !1, scope: !1, type: !6, variables: !2)
-!8 = !{i32 2, !"Dwarf Version", i32 4}
-!9 = !{i32 1, !"Debug Info Version", i32 3}
-!10 = !{!"clang version 3.5 "}
-!15 = !DILexicalBlockFile(discriminator: 1, file: !1, scope: !7)
-!17 = distinct !DILexicalBlock(line: 10, column: 0, file: !1, scope: !7)
-!18 = !DILocation(line: 10, scope: !17)
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/Util/PredicateInfo/condprop2.ll b/external/bsd/llvm/dist/llvm/test/Transforms/Util/PredicateInfo/condprop2.ll
deleted file mode 100644
index facd22f5b7a6..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/Util/PredicateInfo/condprop2.ll
+++ /dev/null
@@ -1,474 +0,0 @@
-; REQUIRES: abi-breaking-checks
-; NOTE: The flag -reverse-iterate is present only in a +Asserts build.
-; Hence, this test has been split from condprop.ll to test with -reverse-iterate.
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -print-predicateinfo -analyze -reverse-iterate  < %s 2>&1 | FileCheck %s
-
-@a = external global i32		; <i32*> [#uses=7]
-
-define i32 @test1() nounwind {
-; CHECK-LABEL: @test1(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 4
-; CHECK-NEXT:    br i1 [[TMP1]], label [[BB:%.*]], label [[BB1:%.*]]
-; CHECK:       bb:
-; CHECK-NEXT:    br label [[BB8:%.*]]
-; CHECK:       bb1:
-; CHECK-NEXT:    [[TMP2:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 5
-; CHECK-NEXT:    br i1 [[TMP3]], label [[BB2:%.*]], label [[BB3:%.*]]
-; CHECK:       bb2:
-; CHECK-NEXT:    br label [[BB8]]
-; CHECK:       bb3:
-; CHECK-NEXT:    [[TMP4:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 4
-; CHECK-NEXT:    br i1 [[TMP5]], label [[BB4:%.*]], label [[BB5:%.*]]
-; CHECK:       bb4:
-; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT:    [[TMP7:%.*]] = add i32 [[TMP6]], 5
-; CHECK-NEXT:    br label [[BB8]]
-; CHECK:       bb5:
-; CHECK-NEXT:    [[TMP8:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT:    [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 5
-; CHECK-NEXT:    br i1 [[TMP9]], label [[BB6:%.*]], label [[BB7:%.*]]
-; CHECK:       bb6:
-; CHECK-NEXT:    [[TMP10:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT:    [[TMP11:%.*]] = add i32 [[TMP10]], 4
-; CHECK-NEXT:    br label [[BB8]]
-; CHECK:       bb7:
-; CHECK-NEXT:    [[TMP12:%.*]] = load i32, i32* @a, align 4
-; CHECK-NEXT:    br label [[BB8]]
-; CHECK:       bb8:
-; CHECK-NEXT:    [[DOT0:%.*]] = phi i32 [ [[TMP12]], [[BB7]] ], [ [[TMP11]], [[BB6]] ], [ [[TMP7]], [[BB4]] ], [ 4, [[BB2]] ], [ 5, [[BB]] ]
-; CHECK-NEXT:    br label [[RETURN:%.*]]
-; CHECK:       return:
-; CHECK-NEXT:    ret i32 [[DOT0]]
-;
-entry:
-  %0 = load i32, i32* @a, align 4
-  %1 = icmp eq i32 %0, 4
-  br i1 %1, label %bb, label %bb1
-
-bb:		; preds = %entry
-  br label %bb8
-
-bb1:		; preds = %entry
-  %2 = load i32, i32* @a, align 4
-  %3 = icmp eq i32 %2, 5
-  br i1 %3, label %bb2, label %bb3
-
-bb2:		; preds = %bb1
-  br label %bb8
-
-bb3:		; preds = %bb1
-  %4 = load i32, i32* @a, align 4
-  %5 = icmp eq i32 %4, 4
-  br i1 %5, label %bb4, label %bb5
-
-bb4:		; preds = %bb3
-  %6 = load i32, i32* @a, align 4
-  %7 = add i32 %6, 5
-  br label %bb8
-
-bb5:		; preds = %bb3
-  %8 = load i32, i32* @a, align 4
-  %9 = icmp eq i32 %8, 5
-  br i1 %9, label %bb6, label %bb7
-
-bb6:		; preds = %bb5
-  %10 = load i32, i32* @a, align 4
-  %11 = add i32 %10, 4
-  br label %bb8
-
-bb7:		; preds = %bb5
-  %12 = load i32, i32* @a, align 4
-  br label %bb8
-
-bb8:		; preds = %bb7, %bb6, %bb4, %bb2, %bb
-  %.0 = phi i32 [ %12, %bb7 ], [ %11, %bb6 ], [ %7, %bb4 ], [ 4, %bb2 ], [ 5, %bb ]
-  br label %return
-
-return:		; preds = %bb8
-  ret i32 %.0
-}
-
-declare void @foo(i1)
-declare void @bar(i32)
-
-define void @test3(i32 %x, i32 %y) {
-; CHECK-LABEL: @test3(
-; CHECK-NEXT:    [[XZ:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT:    [[YZ:%.*]] = icmp eq i32 [[Y:%.*]], 0
-; CHECK-NEXT:    [[Z:%.*]] = and i1 [[XZ]], [[YZ]]
-; CHECK:         [[X_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[Y_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[Y]])
-; CHECK:         [[XZ_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[XZ]])
-; CHECK:         [[YZ_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[YZ]])
-; CHECK:         [[Z_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[Z]])
-; CHECK-NEXT:    br i1 [[Z]], label [[BOTH_ZERO:%.*]], label [[NOPE:%.*]]
-; CHECK:       both_zero:
-; CHECK-NEXT:    call void @foo(i1 [[XZ_0]])
-; CHECK-NEXT:    call void @foo(i1 [[YZ_0]])
-; CHECK-NEXT:    call void @bar(i32 [[X_0]])
-; CHECK-NEXT:    call void @bar(i32 [[Y_0]])
-; CHECK-NEXT:    ret void
-; CHECK:       nope:
-; CHECK-NEXT:    call void @foo(i1 [[Z_0]])
-; CHECK-NEXT:    ret void
-;
-  %xz = icmp eq i32 %x, 0
-  %yz = icmp eq i32 %y, 0
-  %z = and i1 %xz, %yz
-  br i1 %z, label %both_zero, label %nope
-both_zero:
-  call void @foo(i1 %xz)
-  call void @foo(i1 %yz)
-  call void @bar(i32 %x)
-  call void @bar(i32 %y)
-  ret void
-nope:
-  call void @foo(i1 %z)
-  ret void
-}
-
-define void @test4(i1 %b, i32 %x) {
-; CHECK-LABEL: @test4(
-; CHECK-NEXT:    br i1 [[B:%.*]], label [[SW:%.*]], label [[CASE3:%.*]]
-; CHECK:       sw:
-; CHECK:         i32 0, label [[CASE0:%.*]]
-; CHECK-NEXT:    i32 1, label [[CASE1:%.*]]
-; CHECK-NEXT:    i32 2, label [[CASE0]]
-; CHECK-NEXT:    i32 3, label [[CASE3]]
-; CHECK-NEXT:    i32 4, label [[DEFAULT:%.*]]
-; CHECK-NEXT:    ] Edge: [label [[SW]],label %case1] }
-; CHECK-NEXT:    [[X_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X:%.*]])
-; CHECK-NEXT:    switch i32 [[X]], label [[DEFAULT]] [
-; CHECK-NEXT:    i32 0, label [[CASE0]]
-; CHECK-NEXT:    i32 1, label [[CASE1]]
-; CHECK-NEXT:    i32 2, label [[CASE0]]
-; CHECK-NEXT:    i32 3, label [[CASE3]]
-; CHECK-NEXT:    i32 4, label [[DEFAULT]]
-; CHECK-NEXT:    ]
-; CHECK:       default:
-; CHECK-NEXT:    call void @bar(i32 [[X]])
-; CHECK-NEXT:    ret void
-; CHECK:       case0:
-; CHECK-NEXT:    call void @bar(i32 [[X]])
-; CHECK-NEXT:    ret void
-; CHECK:       case1:
-; CHECK-NEXT:    call void @bar(i32 [[X_0]])
-; CHECK-NEXT:    ret void
-; CHECK:       case3:
-; CHECK-NEXT:    call void @bar(i32 [[X]])
-; CHECK-NEXT:    ret void
-;
-  br i1 %b, label %sw, label %case3
-sw:
-  switch i32 %x, label %default [
-  i32 0, label %case0
-  i32 1, label %case1
-  i32 2, label %case0
-  i32 3, label %case3
-  i32 4, label %default
-  ]
-default:
-  call void @bar(i32 %x)
-  ret void
-case0:
-  call void @bar(i32 %x)
-  ret void
-case1:
-  call void @bar(i32 %x)
-  ret void
-case3:
-  call void @bar(i32 %x)
-  ret void
-}
-
-define i1 @test5(i32 %x, i32 %y) {
-; CHECK-LABEL: @test5(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
-; CHECK:         [[X_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[X_1:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[Y_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[Y]])
-; CHECK:         [[Y_1:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[Y]])
-; CHECK-NEXT:    br i1 [[CMP]], label [[SAME:%.*]], label [[DIFFERENT:%.*]]
-; CHECK:       same:
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i32 [[X_0]], [[Y_0]]
-; CHECK-NEXT:    ret i1 [[CMP2]]
-; CHECK:       different:
-; CHECK-NEXT:    [[CMP3:%.*]] = icmp eq i32 [[X_1]], [[Y_1]]
-; CHECK-NEXT:    ret i1 [[CMP3]]
-;
-  %cmp = icmp eq i32 %x, %y
-  br i1 %cmp, label %same, label %different
-
-same:
-  %cmp2 = icmp ne i32 %x, %y
-  ret i1 %cmp2
-
-different:
-  %cmp3 = icmp eq i32 %x, %y
-  ret i1 %cmp3
-}
-
-define i1 @test6(i32 %x, i32 %y) {
-; CHECK-LABEL: @test6(
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[X]], [[Y]]
-; CHECK-NEXT:    [[CMP3:%.*]] = icmp eq i32 [[X]], [[Y]]
-; CHECK-NEXT:    br i1 [[CMP]], label [[SAME:%.*]], label [[DIFFERENT:%.*]]
-; CHECK:       same:
-; CHECK-NEXT:    ret i1 [[CMP2]]
-; CHECK:       different:
-; CHECK-NEXT:    ret i1 [[CMP3]]
-;
-  %cmp2 = icmp ne i32 %x, %y
-  %cmp = icmp eq i32 %x, %y
-  %cmp3 = icmp eq i32 %x, %y
-  br i1 %cmp, label %same, label %different
-
-same:
-  ret i1 %cmp2
-
-different:
-  ret i1 %cmp3
-}
-
-define i1 @test6_fp(float %x, float %y) {
-; CHECK-LABEL: @test6_fp(
-; CHECK-NEXT:    [[CMP2:%.*]] = fcmp une float [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = fcmp oeq float [[X]], [[Y]]
-; CHECK-NEXT:    [[CMP3:%.*]] = fcmp oeq float [[X]], [[Y]]
-; CHECK-NEXT:    br i1 [[CMP]], label [[SAME:%.*]], label [[DIFFERENT:%.*]]
-; CHECK:       same:
-; CHECK-NEXT:    ret i1 [[CMP2]]
-; CHECK:       different:
-; CHECK-NEXT:    ret i1 [[CMP3]]
-;
-  %cmp2 = fcmp une float %x, %y
-  %cmp = fcmp oeq float %x, %y
-  %cmp3 = fcmp oeq float  %x, %y
-  br i1 %cmp, label %same, label %different
-
-same:
-  ret i1 %cmp2
-
-different:
-  ret i1 %cmp3
-}
-
-define i1 @test7(i32 %x, i32 %y) {
-; CHECK-LABEL: @test7(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK:         [[X_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[X_1:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[Y_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[Y]])
-; CHECK:         [[Y_1:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[Y]])
-; CHECK-NEXT:    br i1 [[CMP]], label [[SAME:%.*]], label [[DIFFERENT:%.*]]
-; CHECK:       same:
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[X_0]], [[Y_0]]
-; CHECK-NEXT:    ret i1 [[CMP2]]
-; CHECK:       different:
-; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[X_1]], [[Y_1]]
-; CHECK-NEXT:    ret i1 [[CMP3]]
-;
-  %cmp = icmp sgt i32 %x, %y
-  br i1 %cmp, label %same, label %different
-
-same:
-  %cmp2 = icmp sle i32 %x, %y
-  ret i1 %cmp2
-
-different:
-  %cmp3 = icmp sgt i32 %x, %y
-  ret i1 %cmp3
-}
-
-define i1 @test7_fp(float %x, float %y) {
-; CHECK-LABEL: @test7_fp(
-; CHECK-NEXT:    [[CMP:%.*]] = fcmp ogt float [[X:%.*]], [[Y:%.*]]
-; CHECK:         [[X_0:%.*]] = call float @llvm.ssa.copy.f32(float [[X]])
-; CHECK:         [[X_1:%.*]] = call float @llvm.ssa.copy.f32(float [[X]])
-; CHECK:         [[Y_0:%.*]] = call float @llvm.ssa.copy.f32(float [[Y]])
-; CHECK:         [[Y_1:%.*]] = call float @llvm.ssa.copy.f32(float [[Y]])
-; CHECK-NEXT:    br i1 [[CMP]], label [[SAME:%.*]], label [[DIFFERENT:%.*]]
-; CHECK:       same:
-; CHECK-NEXT:    [[CMP2:%.*]] = fcmp ule float [[X_0]], [[Y_0]]
-; CHECK-NEXT:    ret i1 [[CMP2]]
-; CHECK:       different:
-; CHECK-NEXT:    [[CMP3:%.*]] = fcmp ogt float [[X_1]], [[Y_1]]
-; CHECK-NEXT:    ret i1 [[CMP3]]
-;
-  %cmp = fcmp ogt float %x, %y
-  br i1 %cmp, label %same, label %different
-
-same:
-  %cmp2 = fcmp ule float %x, %y
-  ret i1 %cmp2
-
-different:
-  %cmp3 = fcmp ogt float %x, %y
-  ret i1 %cmp3
-}
-
-define i1 @test8(i32 %x, i32 %y) {
-; CHECK-LABEL: @test8(
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[X]], [[Y]]
-; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[X]], [[Y]]
-; CHECK-NEXT:    br i1 [[CMP]], label [[SAME:%.*]], label [[DIFFERENT:%.*]]
-; CHECK:       same:
-; CHECK-NEXT:    ret i1 [[CMP2]]
-; CHECK:       different:
-; CHECK-NEXT:    ret i1 [[CMP3]]
-;
-  %cmp2 = icmp sle i32 %x, %y
-  %cmp = icmp sgt i32 %x, %y
-  %cmp3 = icmp sgt i32 %x, %y
-  br i1 %cmp, label %same, label %different
-
-same:
-  ret i1 %cmp2
-
-different:
-  ret i1 %cmp3
-}
-
-define i1 @test8_fp(float %x, float %y) {
-; CHECK-LABEL: @test8_fp(
-; CHECK-NEXT:    [[CMP2:%.*]] = fcmp ule float [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    [[CMP:%.*]] = fcmp ogt float [[X]], [[Y]]
-; CHECK-NEXT:    [[CMP3:%.*]] = fcmp ogt float [[X]], [[Y]]
-; CHECK-NEXT:    br i1 [[CMP]], label [[SAME:%.*]], label [[DIFFERENT:%.*]]
-; CHECK:       same:
-; CHECK-NEXT:    ret i1 [[CMP2]]
-; CHECK:       different:
-; CHECK-NEXT:    ret i1 [[CMP3]]
-;
-  %cmp2 = fcmp ule float %x, %y
-  %cmp = fcmp ogt float %x, %y
-  %cmp3 = fcmp ogt float %x, %y
-  br i1 %cmp, label %same, label %different
-
-same:
-  ret i1 %cmp2
-
-different:
-  ret i1 %cmp3
-}
-
-define i32 @test9(i32 %i, i32 %j) {
-; CHECK-LABEL: @test9(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[I:%.*]], [[J:%.*]]
-; CHECK:         [[I_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[I]])
-; CHECK:         [[J_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[J]])
-; CHECK-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[RET:%.*]]
-; CHECK:       cond_true:
-; CHECK-NEXT:    [[DIFF:%.*]] = sub i32 [[I_0]], [[J_0]]
-; CHECK-NEXT:    ret i32 [[DIFF]]
-; CHECK:       ret:
-; CHECK-NEXT:    ret i32 5
-;
-  %cmp = icmp eq i32 %i, %j
-  br i1 %cmp, label %cond_true, label %ret
-
-cond_true:
-  %diff = sub i32 %i, %j
-  ret i32 %diff
-
-ret:
-  ret i32 5
-}
-
-define i32 @test10(i32 %j, i32 %i) {
-; CHECK-LABEL: @test10(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[I:%.*]], [[J:%.*]]
-; CHECK:         [[J_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[J]])
-; CHECK:         [[I_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[I]])
-; CHECK-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[RET:%.*]]
-; CHECK:       cond_true:
-; CHECK-NEXT:    [[DIFF:%.*]] = sub i32 [[I_0]], [[J_0]]
-; CHECK-NEXT:    ret i32 [[DIFF]]
-; CHECK:       ret:
-; CHECK-NEXT:    ret i32 5
-;
-  %cmp = icmp eq i32 %i, %j
-  br i1 %cmp, label %cond_true, label %ret
-
-cond_true:
-  %diff = sub i32 %i, %j
-  ret i32 %diff
-
-ret:
-  ret i32 5
-}
-
-declare i32 @yogibar()
-
-define i32 @test11(i32 %x) {
-; CHECK-LABEL: @test11(
-; CHECK-NEXT:    [[V0:%.*]] = call i32 @yogibar()
-; CHECK-NEXT:    [[V1:%.*]] = call i32 @yogibar()
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[V0]], [[V1]]
-; CHECK:         [[V0_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[V0]])
-; CHECK:         [[V1_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[V1]])
-; CHECK-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[NEXT:%.*]]
-; CHECK:       cond_true:
-; CHECK-NEXT:    ret i32 [[V1_0]]
-; CHECK:       next:
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 [[X:%.*]], [[V0_0]]
-; CHECK:         [[V0_0_1:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[V0_0]])
-; CHECK-NEXT:    br i1 [[CMP2]], label [[COND_TRUE2:%.*]], label [[NEXT2:%.*]]
-; CHECK:       cond_true2:
-; CHECK-NEXT:    ret i32 [[V0_0_1]]
-; CHECK:       next2:
-; CHECK-NEXT:    ret i32 0
-;
-  %v0 = call i32 @yogibar()
-  %v1 = call i32 @yogibar()
-  %cmp = icmp eq i32 %v0, %v1
-  br i1 %cmp, label %cond_true, label %next
-
-cond_true:
-  ret i32 %v1
-
-next:
-  %cmp2 = icmp eq i32 %x, %v0
-  br i1 %cmp2, label %cond_true2, label %next2
-
-cond_true2:
-  ret i32 %v0
-
-next2:
-  ret i32 0
-}
-
-define i32 @test12(i32 %x) {
-; CHECK-LABEL: @test12(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK:         [[X_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[X_1:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-; CHECK:       cond_true:
-; CHECK-NEXT:    br label [[RET:%.*]]
-; CHECK:       cond_false:
-; CHECK-NEXT:    br label [[RET]]
-; CHECK:       ret:
-; CHECK-NEXT:    [[RES:%.*]] = phi i32 [ [[X_0]], [[COND_TRUE]] ], [ [[X_1]], [[COND_FALSE]] ]
-; CHECK-NEXT:    ret i32 [[RES]]
-;
-  %cmp = icmp eq i32 %x, 0
-  br i1 %cmp, label %cond_true, label %cond_false
-
-cond_true:
-  br label %ret
-
-cond_false:
-  br label %ret
-
-ret:
-  %res = phi i32 [ %x, %cond_true ], [ %x, %cond_false ]
-  ret i32 %res
-}
diff --git a/external/bsd/llvm/dist/llvm/test/Transforms/Util/PredicateInfo/testandor2.ll b/external/bsd/llvm/dist/llvm/test/Transforms/Util/PredicateInfo/testandor2.ll
deleted file mode 100644
index a1b9c62040c8..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Transforms/Util/PredicateInfo/testandor2.ll
+++ /dev/null
@@ -1,214 +0,0 @@
-; REQUIRES: abi-breaking-checks
-; NOTE: The flag -reverse-iterate is present only in a +Asserts build.
-; Hence, this test has been split from testandor.ll to test with -reverse-iterate.
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -print-predicateinfo -reverse-iterate < %s 2>&1 | FileCheck %s
-
-declare void @foo(i1)
-declare void @bar(i32)
-declare void @llvm.assume(i1)
-
-define void @testor(i32 %x, i32 %y) {
-; CHECK-LABEL: @testor(
-; CHECK-NEXT:    [[XZ:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT:    [[YZ:%.*]] = icmp eq i32 [[Y:%.*]], 0
-; CHECK-NEXT:    [[Z:%.*]] = or i1 [[XZ]], [[YZ]]
-; CHECK:         [[X_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[Y_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[Y]])
-; CHECK:         [[XZ_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[XZ]])
-; CHECK:         [[YZ_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[YZ]])
-; CHECK:         [[Z_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[Z]])
-; CHECK-NEXT:    br i1 [[Z]], label [[ONEOF:%.*]], label [[NEITHER:%.*]]
-; CHECK:       oneof:
-; CHECK-NEXT:    call void @foo(i1 [[XZ]])
-; CHECK-NEXT:    call void @foo(i1 [[YZ]])
-; CHECK-NEXT:    call void @bar(i32 [[X]])
-; CHECK-NEXT:    call void @bar(i32 [[Y]])
-; CHECK-NEXT:    ret void
-; CHECK:       neither:
-; CHECK-NEXT:    call void @foo(i1 [[XZ_0]])
-; CHECK-NEXT:    call void @foo(i1 [[YZ_0]])
-; CHECK-NEXT:    call void @bar(i32 [[X_0]])
-; CHECK-NEXT:    call void @bar(i32 [[Y_0]])
-; CHECK-NEXT:    call void @foo(i1 [[Z_0]])
-; CHECK-NEXT:    ret void
-;
-  %xz = icmp eq i32 %x, 0
-  %yz = icmp eq i32 %y, 0
-  %z = or i1 %xz, %yz
-  br i1 %z, label %oneof, label %neither
-oneof:
-;; Should not insert on the true edge for or
-  call void @foo(i1 %xz)
-  call void @foo(i1 %yz)
-  call void @bar(i32 %x)
-  call void @bar(i32 %y)
-  ret void
-neither:
-  call void @foo(i1 %xz)
-  call void @foo(i1 %yz)
-  call void @bar(i32 %x)
-  call void @bar(i32 %y)
-  call void @foo(i1 %z)
-  ret void
-}
-define void @testand(i32 %x, i32 %y) {
-; CHECK-LABEL: @testand(
-; CHECK-NEXT:    [[XZ:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT:    [[YZ:%.*]] = icmp eq i32 [[Y:%.*]], 0
-; CHECK-NEXT:    [[Z:%.*]] = and i1 [[XZ]], [[YZ]]
-; CHECK:         [[X_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[Y_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[Y]])
-; CHECK:         [[XZ_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[XZ]])
-; CHECK:         [[YZ_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[YZ]])
-; CHECK:         [[Z_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[Z]])
-; CHECK-NEXT:    br i1 [[Z]], label [[BOTH:%.*]], label [[NOPE:%.*]]
-; CHECK:       both:
-; CHECK-NEXT:    call void @foo(i1 [[XZ_0]])
-; CHECK-NEXT:    call void @foo(i1 [[YZ_0]])
-; CHECK-NEXT:    call void @bar(i32 [[X_0]])
-; CHECK-NEXT:    call void @bar(i32 [[Y_0]])
-; CHECK-NEXT:    ret void
-; CHECK:       nope:
-; CHECK-NEXT:    call void @foo(i1 [[XZ]])
-; CHECK-NEXT:    call void @foo(i1 [[YZ]])
-; CHECK-NEXT:    call void @bar(i32 [[X]])
-; CHECK-NEXT:    call void @bar(i32 [[Y]])
-; CHECK-NEXT:    call void @foo(i1 [[Z_0]])
-; CHECK-NEXT:    ret void
-;
-  %xz = icmp eq i32 %x, 0
-  %yz = icmp eq i32 %y, 0
-  %z = and i1 %xz, %yz
-  br i1 %z, label %both, label %nope
-both:
-  call void @foo(i1 %xz)
-  call void @foo(i1 %yz)
-  call void @bar(i32 %x)
-  call void @bar(i32 %y)
-  ret void
-nope:
-;; Should not insert on the false edge for and
-  call void @foo(i1 %xz)
-  call void @foo(i1 %yz)
-  call void @bar(i32 %x)
-  call void @bar(i32 %y)
-  call void @foo(i1 %z)
-  ret void
-}
-define void @testandsame(i32 %x, i32 %y) {
-; CHECK-LABEL: @testandsame(
-; CHECK-NEXT:    [[XGT:%.*]] = icmp sgt i32 [[X:%.*]], 0
-; CHECK-NEXT:    [[XLT:%.*]] = icmp slt i32 [[X]], 100
-; CHECK-NEXT:    [[Z:%.*]] = and i1 [[XGT]], [[XLT]]
-; CHECK:         [[X_0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[X_0_1:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X_0]])
-; CHECK:         [[XGT_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[XGT]])
-; CHECK:         [[XLT_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[XLT]])
-; CHECK:         [[Z_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[Z]])
-; CHECK-NEXT:    br i1 [[Z]], label [[BOTH:%.*]], label [[NOPE:%.*]]
-; CHECK:       both:
-; CHECK-NEXT:    call void @foo(i1 [[XGT_0]])
-; CHECK-NEXT:    call void @foo(i1 [[XLT_0]])
-; CHECK-NEXT:    call void @bar(i32 [[X_0_1]])
-; CHECK-NEXT:    ret void
-; CHECK:       nope:
-; CHECK-NEXT:    call void @foo(i1 [[XGT]])
-; CHECK-NEXT:    call void @foo(i1 [[XLT]])
-; CHECK-NEXT:    call void @foo(i1 [[Z_0]])
-; CHECK-NEXT:    ret void
-;
-  %xgt = icmp sgt i32 %x, 0
-  %xlt = icmp slt i32 %x, 100
-  %z = and i1 %xgt, %xlt
-  br i1 %z, label %both, label %nope
-both:
-  call void @foo(i1 %xgt)
-  call void @foo(i1 %xlt)
-  call void @bar(i32 %x)
-  ret void
-nope:
-  call void @foo(i1 %xgt)
-  call void @foo(i1 %xlt)
-  call void @foo(i1 %z)
-  ret void
-}
-
-define void @testandassume(i32 %x, i32 %y) {
-; CHECK-LABEL: @testandassume(
-; CHECK-NEXT:    [[XZ:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT:    [[YZ:%.*]] = icmp eq i32 [[Y:%.*]], 0
-; CHECK-NEXT:    [[Z:%.*]] = and i1 [[XZ]], [[YZ]]
-; CHECK:         [[TMP1:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[X]])
-; CHECK:         [[TMP2:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[Y]])
-; CHECK:         [[TMP3:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[XZ]])
-; CHECK:         [[TMP4:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[YZ]])
-; CHECK:         [[TMP5:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[Z]])
-; CHECK-NEXT:    call void @llvm.assume(i1 [[TMP5]])
-; CHECK:         [[DOT0:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[TMP1]])
-; CHECK:         [[DOT01:%.*]] = call i32 @llvm.ssa.copy.i32(i32 [[TMP2]])
-; CHECK:         [[DOT02:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[TMP3]])
-; CHECK:         [[DOT03:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[TMP4]])
-; CHECK:         [[DOT04:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[TMP5]])
-; CHECK-NEXT:    br i1 [[TMP5]], label [[BOTH:%.*]], label [[NOPE:%.*]]
-; CHECK:       both:
-; CHECK-NEXT:    call void @foo(i1 [[DOT02]])
-; CHECK-NEXT:    call void @foo(i1 [[DOT03]])
-; CHECK-NEXT:    call void @bar(i32 [[DOT0]])
-; CHECK-NEXT:    call void @bar(i32 [[DOT01]])
-; CHECK-NEXT:    ret void
-; CHECK:       nope:
-; CHECK-NEXT:    call void @foo(i1 [[DOT04]])
-; CHECK-NEXT:    ret void
-;
-  %xz = icmp eq i32 %x, 0
-  %yz = icmp eq i32 %y, 0
-  %z = and i1 %xz, %yz
-  call void @llvm.assume(i1 %z)
-  br i1 %z, label %both, label %nope
-both:
-  call void @foo(i1 %xz)
-  call void @foo(i1 %yz)
-  call void @bar(i32 %x)
-  call void @bar(i32 %y)
-  ret void
-nope:
-  call void @foo(i1 %z)
-  ret void
-}
-
-;; Unlike and/or for branches, assume is *always* true, so we only match and for it
-define void @testorassume(i32 %x, i32 %y) {
-;
-; CHECK-LABEL: @testorassume(
-; CHECK-NEXT:    [[XZ:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT:    [[YZ:%.*]] = icmp eq i32 [[Y:%.*]], 0
-; CHECK-NEXT:    [[Z:%.*]] = or i1 [[XZ]], [[YZ]]
-; CHECK-NEXT:    call void @llvm.assume(i1 [[Z]])
-; CHECK:         [[Z_0:%.*]] = call i1 @llvm.ssa.copy.i1(i1 [[Z]])
-; CHECK-NEXT:    br i1 [[Z]], label [[BOTH:%.*]], label [[NOPE:%.*]]
-; CHECK:       both:
-; CHECK-NEXT:    call void @foo(i1 [[XZ]])
-; CHECK-NEXT:    call void @foo(i1 [[YZ]])
-; CHECK-NEXT:    call void @bar(i32 [[X]])
-; CHECK-NEXT:    call void @bar(i32 [[Y]])
-; CHECK-NEXT:    ret void
-; CHECK:       nope:
-; CHECK-NEXT:    call void @foo(i1 [[Z_0]])
-; CHECK-NEXT:    ret void
-;
-  %xz = icmp eq i32 %x, 0
-  %yz = icmp eq i32 %y, 0
-  %z = or i1 %xz, %yz
-  call void @llvm.assume(i1 %z)
-  br i1 %z, label %both, label %nope
-both:
-  call void @foo(i1 %xz)
-  call void @foo(i1 %yz)
-  call void @bar(i32 %x)
-  call void @bar(i32 %y)
-  ret void
-nope:
-  call void @foo(i1 %z)
-  ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/Unit/lit.cfg b/external/bsd/llvm/dist/llvm/test/Unit/lit.cfg
deleted file mode 100644
index 9da82f5f2c9b..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Unit/lit.cfg
+++ /dev/null
@@ -1,95 +0,0 @@
-# -*- Python -*-
-
-# Configuration file for the 'lit' test runner.
-
-import os
-import subprocess
-
-import lit.formats
-
-# name: The name of this test suite.
-config.name = 'LLVM-Unit'
-
-# suffixes: A list of file extensions to treat as test files.
-config.suffixes = []
-
-# is_early; Request to run this suite early.
-config.is_early = True
-
-# test_source_root: The root path where tests are located.
-# test_exec_root: The root path where tests should be run.
-llvm_obj_root = getattr(config, 'llvm_obj_root', None)
-if llvm_obj_root is not None:
-    config.test_exec_root = os.path.join(llvm_obj_root, 'unittests')
-    config.test_source_root = config.test_exec_root
-
-# testFormat: The test format to use to interpret tests.
-llvm_build_mode = getattr(config, 'llvm_build_mode', "Debug")
-config.test_format = lit.formats.GoogleTest(llvm_build_mode, 'Tests')
-
-# Propagate the temp directory. Windows requires this because it uses \Windows\
-# if none of these are present.
-if 'TMP' in os.environ:
-    config.environment['TMP'] = os.environ['TMP']
-if 'TEMP' in os.environ:
-    config.environment['TEMP'] = os.environ['TEMP']
-
-# Propagate path to symbolizer for ASan/MSan.
-for symbolizer in ['ASAN_SYMBOLIZER_PATH', 'MSAN_SYMBOLIZER_PATH']:
-    if symbolizer in os.environ:
-        config.environment[symbolizer] = os.environ[symbolizer]
-
-# Win32 seeks DLLs along %PATH%.
-if sys.platform in ['win32', 'cygwin'] and os.path.isdir(config.shlibdir):
-    config.environment['PATH'] = os.path.pathsep.join((
-            config.shlibdir, config.environment['PATH']))
-
-# Win32 may use %SYSTEMDRIVE% during file system shell operations, so propogate.
-if sys.platform == 'win32' and 'SYSTEMDRIVE' in os.environ:
-    config.environment['SYSTEMDRIVE'] = os.environ['SYSTEMDRIVE']
-
-###
-
-# Check that the object root is known.
-if config.test_exec_root is None:
-    # Otherwise, we haven't loaded the site specific configuration (the user is
-    # probably trying to run on a test file directly, and either the site
-    # configuration hasn't been created by the build system, or we are in an
-    # out-of-tree build situation).
-
-    # Check for 'llvm_unit_site_config' user parameter, and use that if available.
-    site_cfg = lit_config.params.get('llvm_unit_site_config', None)
-    if site_cfg and os.path.exists(site_cfg):
-        lit_config.load_config(config, site_cfg)
-        raise SystemExit
-
-    # Try to detect the situation where we are using an out-of-tree build by
-    # looking for 'llvm-config'.
-    #
-    # FIXME: I debated (i.e., wrote and threw away) adding logic to
-    # automagically generate the lit.site.cfg if we are in some kind of fresh
-    # build situation. This means knowing how to invoke the build system
-    # though, and I decided it was too much magic.
-
-    llvm_config = lit.util.which('llvm-config', config.environment['PATH'])
-    if not llvm_config:
-        lit_config.fatal('No site specific configuration available!')
-
-    # Get the source and object roots.
-    llvm_src_root = subprocess.check_output(['llvm-config', '--src-root']).strip()
-    llvm_obj_root = subprocess.check_output(['llvm-config', '--obj-root']).strip()
-
-    # Validate that we got a tree which points to here.
-    this_src_root = os.path.join(os.path.dirname(__file__),'..','..')
-    if os.path.realpath(llvm_src_root) != os.path.realpath(this_src_root):
-        lit_config.fatal('No site specific configuration available!')
-
-    # Check that the site specific configuration exists.
-    site_cfg = os.path.join(llvm_obj_root, 'test', 'Unit', 'lit.site.cfg')
-    if not os.path.exists(site_cfg):
-        lit_config.fatal('No site specific configuration available!')
-
-    # Okay, that worked. Notify the user of the automagic, and reconfigure.
-    lit_config.note('using out-of-tree build at %r' % llvm_obj_root)
-    lit_config.load_config(config, site_cfg)
-    raise SystemExit
diff --git a/external/bsd/llvm/dist/llvm/test/Unit/lit.site.cfg.in b/external/bsd/llvm/dist/llvm/test/Unit/lit.site.cfg.in
deleted file mode 100644
index 9d736f473cec..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Unit/lit.site.cfg.in
+++ /dev/null
@@ -1,23 +0,0 @@
-@LIT_SITE_CFG_IN_HEADER@
-
-import sys
-
-config.llvm_src_root = "@LLVM_SOURCE_DIR@"
-config.llvm_obj_root = "@LLVM_BINARY_DIR@"
-config.llvm_tools_dir = "@LLVM_TOOLS_DIR@"
-config.llvm_build_mode = "@LLVM_BUILD_MODE@"
-config.enable_shared = @ENABLE_SHARED@
-config.shlibdir = "@SHLIBDIR@"
-
-# Support substitution of the tools_dir and build_mode with user parameters.
-# This is used when we can't determine the tool dir at configuration time.
-try:
-    config.llvm_tools_dir = config.llvm_tools_dir % lit_config.params
-    config.llvm_build_mode = config.llvm_build_mode % lit_config.params
-except KeyError:
-    e = sys.exc_info()[1]
-    key, = e.args
-    lit_config.fatal("unable to find %r parameter, use '--param=%s=VALUE'" % (key,key))
-
-# Let the main config do the real work.
-lit_config.load_config(config, "@LLVM_SOURCE_DIR@/test/Unit/lit.cfg")
diff --git a/external/bsd/llvm/dist/llvm/test/Verifier/2008-08-22-MemCpyAlignment.ll b/external/bsd/llvm/dist/llvm/test/Verifier/2008-08-22-MemCpyAlignment.ll
deleted file mode 100644
index 3f7cb5234305..000000000000
--- a/external/bsd/llvm/dist/llvm/test/Verifier/2008-08-22-MemCpyAlignment.ll
+++ /dev/null
@@ -1,12 +0,0 @@
-; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s
-; CHECK: alignment argument of memory intrinsics must be a constant int
-; PR2318
-
-define void @x(i8* %a, i8* %src, i64 %len, i32 %align) nounwind  {
-entry:
-        tail call void @llvm.memcpy.p0i8.p0i8.i64( i8* %a, i8* %src, i64 %len, i32 %align, i1 false) nounwind 
-        ret void
-}
-
-declare void @llvm.memcpy.p0i8.p0i8.i64( i8* %a, i8* %src, i64 %len, i32, i1)
-
diff --git a/external/bsd/llvm/dist/llvm/test/lit.cfg b/external/bsd/llvm/dist/llvm/test/lit.cfg
deleted file mode 100644
index 8ed9187aea77..000000000000
--- a/external/bsd/llvm/dist/llvm/test/lit.cfg
+++ /dev/null
@@ -1,552 +0,0 @@
-# -*- Python -*-
-
-# Configuration file for the 'lit' test runner.
-
-import os
-import sys
-import re
-import platform
-import subprocess
-
-import lit.util
-import lit.formats
-
-# name: The name of this test suite.
-config.name = 'LLVM'
-
-# Tweak PATH for Win32 to decide to use bash.exe or not.
-if sys.platform in ['win32']:
-    # Seek sane tools in directories and set to $PATH.
-    path = getattr(config, 'lit_tools_dir', None)
-    path = lit_config.getToolsPath(path,
-                                   config.environment['PATH'],
-                                   ['cmp.exe', 'grep.exe', 'sed.exe'])
-    if path is not None:
-        path = os.path.pathsep.join((path,
-                                     config.environment['PATH']))
-        config.environment['PATH'] = path
-
-# Choose between lit's internal shell pipeline runner and a real shell.  If
-# LIT_USE_INTERNAL_SHELL is in the environment, we use that as an override.
-use_lit_shell = os.environ.get("LIT_USE_INTERNAL_SHELL")
-if use_lit_shell:
-    # 0 is external, "" is default, and everything else is internal.
-    execute_external = (use_lit_shell == "0")
-else:
-    # Otherwise we default to internal on Windows and external elsewhere, as
-    # bash on Windows is usually very slow.
-    execute_external = (not sys.platform in ['win32'])
-
-# testFormat: The test format to use to interpret tests.
-config.test_format = lit.formats.ShTest(execute_external)
-
-# suffixes: A list of file extensions to treat as test files. This is overriden
-# by individual lit.local.cfg files in the test subdirectories.
-config.suffixes = ['.ll', '.c', '.cxx', '.test', '.txt', '.s', '.mir']
-
-# excludes: A list of directories to exclude from the testsuite. The 'Inputs'
-# subdirectories contain auxiliary inputs for various tests in their parent
-# directories.
-config.excludes = ['Inputs', 'CMakeLists.txt', 'README.txt', 'LICENSE.txt']
-
-# test_source_root: The root path where tests are located.
-config.test_source_root = os.path.dirname(__file__)
-
-# test_exec_root: The root path where tests should be run.
-llvm_obj_root = getattr(config, 'llvm_obj_root', None)
-if llvm_obj_root is not None:
-    config.test_exec_root = os.path.join(llvm_obj_root, 'test')
-
-# Tweak the PATH to include the tools dir.
-if llvm_obj_root is not None:
-    llvm_tools_dir = getattr(config, 'llvm_tools_dir', None)
-    if not llvm_tools_dir:
-        lit_config.fatal('No LLVM tools dir set!')
-    path = os.path.pathsep.join((llvm_tools_dir, config.environment['PATH']))
-    config.environment['PATH'] = path
-
-# Propagate 'HOME' through the environment.
-if 'HOME' in os.environ:
-    config.environment['HOME'] = os.environ['HOME']
-
-# Propagate 'INCLUDE' through the environment.
-if 'INCLUDE' in os.environ:
-    config.environment['INCLUDE'] = os.environ['INCLUDE']
-
-# Propagate 'LIB' through the environment.
-if 'LIB' in os.environ:
-    config.environment['LIB'] = os.environ['LIB']
-
-# Propagate the temp directory. Windows requires this because it uses \Windows\
-# if none of these are present.
-if 'TMP' in os.environ:
-    config.environment['TMP'] = os.environ['TMP']
-if 'TEMP' in os.environ:
-    config.environment['TEMP'] = os.environ['TEMP']
-
-# Propagate LLVM_SRC_ROOT into the environment.
-config.environment['LLVM_SRC_ROOT'] = getattr(config, 'llvm_src_root', '')
-
-# Propagate PYTHON_EXECUTABLE into the environment
-config.environment['PYTHON_EXECUTABLE'] = getattr(config, 'python_executable',
-                                                  '')
-
-# Propagate path to symbolizer for ASan/MSan.
-for symbolizer in ['ASAN_SYMBOLIZER_PATH', 'MSAN_SYMBOLIZER_PATH']:
-    if symbolizer in os.environ:
-        config.environment[symbolizer] = os.environ[symbolizer]
-
-# Set up OCAMLPATH to include newly built OCaml libraries.
-llvm_lib_dir = getattr(config, 'llvm_lib_dir', None)
-if llvm_lib_dir is None:
-    if llvm_obj_root is not None:
-        llvm_lib_dir = os.path.join(llvm_obj_root, 'lib')
-
-if llvm_lib_dir is not None:
-    top_ocaml_lib = os.path.join(llvm_lib_dir, 'ocaml')
-    llvm_ocaml_lib = os.path.join(top_ocaml_lib, 'llvm')
-    if llvm_ocaml_lib is not None:
-        ocamlpath = os.path.pathsep.join((llvm_ocaml_lib, top_ocaml_lib))
-        if 'OCAMLPATH' in os.environ:
-            ocamlpath = os.path.pathsep.join((ocamlpath, os.environ['OCAMLPATH']))
-        config.environment['OCAMLPATH'] = ocamlpath
-
-        if 'CAML_LD_LIBRARY_PATH' in os.environ:
-            caml_ld_library_path = os.path.pathsep.join((llvm_ocaml_lib,
-                                        os.environ['CAML_LD_LIBRARY_PATH']))
-            config.environment['CAML_LD_LIBRARY_PATH'] = caml_ld_library_path
-        else:
-            config.environment['CAML_LD_LIBRARY_PATH'] = llvm_ocaml_lib
-
-# Set up OCAMLRUNPARAM to enable backtraces in OCaml tests.
-config.environment['OCAMLRUNPARAM'] = 'b'
-
-###
-
-import os
-
-# Check that the object root is known.
-if config.test_exec_root is None:
-    # Otherwise, we haven't loaded the site specific configuration (the user is
-    # probably trying to run on a test file directly, and either the site
-    # configuration hasn't been created by the build system, or we are in an
-    # out-of-tree build situation).
-
-    # Check for 'llvm_site_config' user parameter, and use that if available.
-    site_cfg = lit_config.params.get('llvm_site_config', None)
-    if site_cfg and os.path.exists(site_cfg):
-        lit_config.load_config(config, site_cfg)
-        raise SystemExit
-
-    # Try to detect the situation where we are using an out-of-tree build by
-    # looking for 'llvm-config'.
-    #
-    # FIXME: I debated (i.e., wrote and threw away) adding logic to
-    # automagically generate the lit.site.cfg if we are in some kind of fresh
-    # build situation. This means knowing how to invoke the build system
-    # though, and I decided it was too much magic.
-
-    llvm_config = lit.util.which('llvm-config', config.environment['PATH'])
-    if not llvm_config:
-        lit_config.fatal('No site specific configuration available!')
-
-    # Get the source and object roots.
-    llvm_src_root = subprocess.check_output(['llvm-config', '--src-root']).strip()
-    llvm_obj_root = subprocess.check_output(['llvm-config', '--obj-root']).strip()
-
-    # Validate that we got a tree which points to here.
-    this_src_root = os.path.dirname(config.test_source_root)
-    if os.path.realpath(llvm_src_root) != os.path.realpath(this_src_root):
-        lit_config.fatal('No site specific configuration available!')
-
-    # Check that the site specific configuration exists.
-    site_cfg = os.path.join(llvm_obj_root, 'test', 'lit.site.cfg')
-    if not os.path.exists(site_cfg):
-        lit_config.fatal('No site specific configuration available!')
-
-    # Okay, that worked. Notify the user of the automagic, and reconfigure.
-    lit_config.note('using out-of-tree build at %r' % llvm_obj_root)
-    lit_config.load_config(config, site_cfg)
-    raise SystemExit
-
-###
-
-# Provide the path to asan runtime lib 'libclang_rt.asan_osx_dynamic.dylib' if
-# available. This is darwin specific since it's currently only needed on darwin.
-def get_asan_rtlib():
-    if not "Address" in config.llvm_use_sanitizer or \
-       not "Darwin" in config.host_os or \
-       not "x86" in config.host_triple:
-        return ""
-    try:
-        import glob
-    except:
-        print("glob module not found, skipping get_asan_rtlib() lookup")
-        return ""
-    # The libclang_rt.asan_osx_dynamic.dylib path is obtained using the relative
-    # path from the host cc.
-    host_lib_dir = os.path.join(os.path.dirname(config.host_cc), "../lib")
-    asan_dylib_dir_pattern = host_lib_dir + \
-        "/clang/*/lib/darwin/libclang_rt.asan_osx_dynamic.dylib"
-    found_dylibs = glob.glob(asan_dylib_dir_pattern)
-    if len(found_dylibs) != 1:
-        return ""
-    return found_dylibs[0]
-
-lli = 'lli'
-# The target triple used by default by lli is the process target triple (some
-# triple appropriate for generating code for the current process) but because
-# we don't support COFF in MCJIT well enough for the tests, force ELF format on
-# Windows.  FIXME: the process target triple should be used here, but this is
-# difficult to obtain on Windows.
-if re.search(r'cygwin|mingw32|windows-gnu|windows-msvc|win32', config.host_triple):
-  lli += ' -mtriple='+config.host_triple+'-elf'
-config.substitutions.append( ('%lli', lli ) )
-
-# Similarly, have a macro to use llc with DWARF even when the host is win32.
-llc_dwarf = 'llc'
-if re.search(r'win32', config.target_triple):
-  llc_dwarf += ' -mtriple='+config.target_triple.replace('-win32', '-mingw32')
-config.substitutions.append( ('%llc_dwarf', llc_dwarf) )
-
-# Add site-specific substitutions.
-config.substitutions.append( ('%gold', config.gold_executable) )
-config.substitutions.append( ('%go', config.go_executable) )
-config.substitutions.append( ('%llvmshlibdir', config.llvm_shlib_dir) )
-config.substitutions.append( ('%shlibext', config.llvm_shlib_ext) )
-config.substitutions.append( ('%exeext', config.llvm_exe_ext) )
-config.substitutions.append( ('%python', config.python_executable) )
-config.substitutions.append( ('%host_cc', config.host_cc) )
-
-# Provide the path to asan runtime lib if available. On darwin, this lib needs
-# to be loaded via DYLD_INSERT_LIBRARIES before libLTO.dylib in case the files
-# to be linked contain instrumented sanitizer code.
-ld64_cmd = config.ld64_executable
-asan_rtlib = get_asan_rtlib()
-if asan_rtlib:
-  ld64_cmd = "DYLD_INSERT_LIBRARIES={} {}".format(asan_rtlib, ld64_cmd)
-config.substitutions.append( ('%ld64', ld64_cmd) )
-
-# OCaml substitutions.
-# Support tests for both native and bytecode builds.
-config.substitutions.append( ('%ocamlc',
-    "%s ocamlc -cclib -L%s %s" %
-        (config.ocamlfind_executable, llvm_lib_dir, config.ocaml_flags)) )
-if config.have_ocamlopt:
-    config.substitutions.append( ('%ocamlopt',
-        "%s ocamlopt -cclib -L%s -cclib -Wl,-rpath,%s %s" %
-            (config.ocamlfind_executable, llvm_lib_dir, llvm_lib_dir, config.ocaml_flags)) )
-else:
-    config.substitutions.append( ('%ocamlopt', "true" ) )
-
-# For each occurrence of an llvm tool name as its own word, replace it
-# with the full path to the build directory holding that tool.  This
-# ensures that we are testing the tools just built and not some random
-# tools that might happen to be in the user's PATH.  Thus this list
-# includes every tool placed in $(LLVM_OBJ_ROOT)/$(BuildMode)/bin
-# (llvm_tools_dir in lit parlance).
-
-# Avoid matching RUN line fragments that are actually part of
-# path names or options or whatever.
-# The regex is a pre-assertion to avoid matching a preceding
-# dot, hyphen, carat, or slash (.foo, -foo, etc.).  Some patterns
-# also have a post-assertion to not match a trailing hyphen (foo-).
-NOJUNK = r"(?<!\.|-|\^|/|<)"
-
-
-def find_tool_substitution(pattern):
-    # Extract the tool name from the pattern.  This relies on the tool
-    # name being surrounded by \b word match operators.  If the
-    # pattern starts with "| ", include it in the string to be
-    # substituted.
-    tool_match = re.match(r"^(\\)?((\| )?)\W+b([0-9A-Za-z-_]+)\\b\W*$",
-                          pattern)
-    tool_pipe = tool_match.group(2)
-    tool_name = tool_match.group(4)
-    # Did the user specify the tool path + arguments? This allows things like
-    # llvm-lit "-Dllc=llc -enable-misched -verify-machineinstrs"
-    tool_path = lit_config.params.get(tool_name)
-    if tool_path is None:
-        tool_path = lit.util.which(tool_name, llvm_tools_dir)
-        if tool_path is None:
-            return tool_name, tool_path, tool_pipe
-    if (tool_name == "llc" and
-       'LLVM_ENABLE_MACHINE_VERIFIER' in os.environ and
-       os.environ['LLVM_ENABLE_MACHINE_VERIFIER'] == "1"):
-        tool_path += " -verify-machineinstrs"
-    if (tool_name == "llvm-go"):
-        tool_path += " go=" + config.go_executable
-    return tool_name, tool_path, tool_pipe
-
-
-for pattern in [r"\bbugpoint\b(?!-)",
-                NOJUNK + r"\bllc\b",
-                r"\blli\b",
-                r"\bllvm-ar\b",
-                r"\bllvm-as\b",
-                r"\bllvm-bcanalyzer\b",
-                r"\bllvm-config\b",
-                r"\bllvm-cov\b",
-                r"\bllvm-cxxdump\b",
-                r"\bllvm-diff\b",
-                r"\bllvm-dis\b",
-                r"\bllvm-dsymutil\b",
-                r"\bllvm-dwarfdump\b",
-                r"\bllvm-extract\b",
-                r"\bllvm-lib\b",
-                r"\bllvm-link\b",
-                r"\bllvm-lto\b",
-                r"\bllvm-lto2\b",
-                r"\bllvm-mc\b",
-                r"\bllvm-mcmarkup\b",
-                r"\bllvm-modextract\b",
-                r"\bllvm-nm\b",
-                r"\bllvm-objdump\b",
-                r"\bllvm-pdbutil\b",
-                r"\bllvm-profdata\b",
-                r"\bllvm-ranlib\b",
-                r"\bllvm-readobj\b",
-                r"\bllvm-rtdyld\b",
-                r"\bllvm-size\b",
-                r"\bllvm-split\b",
-                r"\bllvm-strings\b",
-                r"\bllvm-tblgen\b",
-                r"\bllvm-c-test\b",
-                r"\bllvm-cxxfilt\b",
-                r"\bllvm-xray\b",
-                NOJUNK + r"\bllvm-symbolizer\b",
-                NOJUNK + r"\bopt\b",
-                r"\bFileCheck\b",
-                r"\bobj2yaml\b",
-                NOJUNK + r"\bsancov\b",
-                NOJUNK + r"\bsanstats\b",
-                r"\byaml2obj\b",
-                r"\byaml-bench\b",
-                r"\bverify-uselistorder\b",
-                # Handle these specially as they are strings searched
-                # for during testing.
-                r"\| \bcount\b",
-                r"\| \bnot\b"]:
-    tool_name, tool_path, tool_pipe = find_tool_substitution(pattern)
-    if not tool_path:
-        # Warn, but still provide a substitution.
-        lit_config.note('Did not find ' + tool_name + ' in ' + llvm_tools_dir)
-        tool_path = llvm_tools_dir + '/' + tool_name
-    config.substitutions.append((pattern, tool_pipe + tool_path))
-
-# For tools that are optional depending on the config, we won't warn
-# if they're missing.
-for pattern in [r"\bllvm-go\b",
-                r"\bKaleidoscope-Ch3\b",
-                r"\bKaleidoscope-Ch4\b",
-                r"\bKaleidoscope-Ch5\b",
-                r"\bKaleidoscope-Ch6\b",
-                r"\bKaleidoscope-Ch7\b",
-                r"\bKaleidoscope-Ch8\b"]:
-    tool_name, tool_path, tool_pipe = find_tool_substitution(pattern)
-    if not tool_path:
-        # Provide a substitution anyway, for the sake of consistent errors.
-        tool_path = llvm_tools_dir + '/' + tool_name
-    config.substitutions.append((pattern, tool_pipe + tool_path))
-
-
-### Targets
-
-config.targets = frozenset(config.targets_to_build.split())
-
-for arch in config.targets_to_build.split():
-    config.available_features.add(arch.lower() + '-registered-target')
-
-### Features
-
-# Shell execution
-if execute_external:
-    config.available_features.add('shell')
-
-# Others/can-execute.txt
-if sys.platform not in ['win32']:
-    config.available_features.add('can-execute')
-    config.available_features.add('not_COFF')
-
-# Loadable module
-# FIXME: This should be supplied by Makefile or autoconf.
-if sys.platform in ['win32', 'cygwin']:
-    loadable_module = (config.enable_shared == 1)
-else:
-    loadable_module = True
-
-if loadable_module:
-    config.available_features.add('loadable_module')
-
-# Static libraries are not built if BUILD_SHARED_LIBS is ON.
-if not config.build_shared_libs:
-    config.available_features.add("static-libs")
-
-# Sanitizers.
-if 'Address' in config.llvm_use_sanitizer:
-    config.available_features.add("asan")
-else:
-    config.available_features.add("not_asan")
-if 'Memory' in config.llvm_use_sanitizer:
-    config.available_features.add("msan")
-else:
-    config.available_features.add("not_msan")
-if 'Undefined' in config.llvm_use_sanitizer:
-    config.available_features.add("ubsan")
-else:
-    config.available_features.add("not_ubsan")
-
-# Check if we should run long running tests.
-if lit_config.params.get("run_long_tests", None) == "true":
-    config.available_features.add("long_tests")
-
-# Direct object generation
-if not 'hexagon' in config.target_triple:
-    config.available_features.add("object-emission")
-
-if config.have_zlib:
-    config.available_features.add("zlib")
-else:
-    config.available_features.add("nozlib")
-
-# LLVM can be configured with an empty default triple
-# Some tests are "generic" and require a valid default triple
-if config.target_triple:
-    config.available_features.add("default_triple")
-    if re.match(r'^x86_64.*-linux', config.target_triple):
-      config.available_features.add("x86_64-linux")
-
-# Native compilation: host arch == default triple arch
-# FIXME: Consider cases that target can be executed
-# even if host_triple were different from target_triple.
-if config.host_triple == config.target_triple:
-    config.available_features.add("native")
-
-import subprocess
-
-def have_ld_plugin_support():
-    if not os.path.exists(os.path.join(config.llvm_shlib_dir, 'LLVMgold.so')):
-        return False
-
-    ld_cmd = subprocess.Popen([config.gold_executable, '--help'], stdout = subprocess.PIPE, env={'LANG': 'C'})
-    ld_out = ld_cmd.stdout.read().decode()
-    ld_cmd.wait()
-
-    if not '-plugin' in ld_out:
-        return False
-
-    # check that the used emulations are supported.
-    emu_line = [l for l in ld_out.split('\n') if 'supported emulations' in l]
-    if len(emu_line) != 1:
-        return False
-    emu_line = emu_line[0]
-    fields = emu_line.split(':')
-    if len(fields) != 3:
-        return False
-    emulations = fields[2].split()
-    if 'elf_x86_64' not in emulations:
-        return False
-    if 'elf32ppc' in emulations:
-        config.available_features.add('ld_emu_elf32ppc')
-
-    ld_version = subprocess.Popen([config.gold_executable, '--version'], stdout = subprocess.PIPE, env={'LANG': 'C'})
-    if not 'GNU gold' in ld_version.stdout.read().decode():
-        return False
-    ld_version.wait()
-
-    return True
-
-if have_ld_plugin_support():
-    config.available_features.add('ld_plugin')
-
-def have_ld64_plugin_support():
-    if not config.llvm_tool_lto_build or config.ld64_executable == '':
-        return False
-
-    ld_cmd = subprocess.Popen([config.ld64_executable, '-v'], stderr = subprocess.PIPE)
-    ld_out = ld_cmd.stderr.read().decode()
-    ld_cmd.wait()
-
-    if 'ld64' not in ld_out or 'LTO' not in ld_out:
-        return False
-
-    return True
-
-if have_ld64_plugin_support():
-    config.available_features.add('ld64_plugin')
-
-# Ask llvm-config about assertion mode.
-try:
-    llvm_config_cmd = subprocess.Popen(
-        [os.path.join(llvm_tools_dir, 'llvm-config'), '--assertion-mode'],
-        stdout = subprocess.PIPE,
-        env=config.environment)
-except OSError:
-    print("Could not find llvm-config in " + llvm_tools_dir)
-    exit(42)
-
-if re.search(r'ON', llvm_config_cmd.stdout.read().decode('ascii')):
-    config.available_features.add('asserts')
-llvm_config_cmd.wait()
-
-if 'darwin' == sys.platform:
-    try:
-        sysctl_cmd = subprocess.Popen(['sysctl', 'hw.optional.fma'],
-                                    stdout = subprocess.PIPE)
-    except OSError:
-        print("Could not exec sysctl")
-    result = sysctl_cmd.stdout.read().decode('ascii')
-    if -1 != result.find("hw.optional.fma: 1"):
-        config.available_features.add('fma3')
-    sysctl_cmd.wait()
-
-if platform.system() in ['Windows']:
-    if re.match(r'.*-win32$', config.target_triple):
-        config.available_features.add('target-windows')
-    # For tests that require Windows to run.
-    config.available_features.add('system-windows')
-
-# .debug_frame is not emitted for targeting Windows x64.
-if not re.match(r'^x86_64.*-(mingw32|windows-gnu|win32)', config.target_triple):
-    config.available_features.add('debug_frame')
-
-# Check if we should use gmalloc.
-use_gmalloc_str = lit_config.params.get('use_gmalloc', None)
-if use_gmalloc_str is not None:
-    if use_gmalloc_str.lower() in ('1', 'true'):
-        use_gmalloc = True
-    elif use_gmalloc_str.lower() in ('', '0', 'false'):
-        use_gmalloc = False
-    else:
-        lit_config.fatal('user parameter use_gmalloc should be 0 or 1')
-else:
-    # Default to not using gmalloc
-    use_gmalloc = False
-
-# Allow use of an explicit path for gmalloc library.
-# Will default to '/usr/lib/libgmalloc.dylib' if not set.
-gmalloc_path_str = lit_config.params.get('gmalloc_path',
-                                         '/usr/lib/libgmalloc.dylib')
-
-if use_gmalloc:
-     config.environment.update({'DYLD_INSERT_LIBRARIES' : gmalloc_path_str})
-
-# Ask llvm-config about global-isel.
-try:
-    llvm_config_cmd = subprocess.Popen(
-        [os.path.join(llvm_tools_dir, 'llvm-config'), '--has-global-isel'],
-        stdout = subprocess.PIPE,
-        env=config.environment)
-except OSError:
-    print("Could not find llvm-config in " + llvm_tools_dir)
-    exit(42)
-
-if re.search(r'ON', llvm_config_cmd.stdout.read().decode('ascii')):
-    config.available_features.add('global-isel')
-llvm_config_cmd.wait()
-
-if config.have_libxar:
-    config.available_features.add('xar')
-
-if config.enable_abi_breaking_checks == "1":
-    config.available_features.add('abi-breaking-checks')
diff --git a/external/bsd/llvm/dist/llvm/test/lit.site.cfg.in b/external/bsd/llvm/dist/llvm/test/lit.site.cfg.in
deleted file mode 100644
index f95f6d8ec9ac..000000000000
--- a/external/bsd/llvm/dist/llvm/test/lit.site.cfg.in
+++ /dev/null
@@ -1,55 +0,0 @@
-@LIT_SITE_CFG_IN_HEADER@
-
-import sys
-
-config.host_triple = "@LLVM_HOST_TRIPLE@"
-config.target_triple = "@TARGET_TRIPLE@"
-config.llvm_src_root = "@LLVM_SOURCE_DIR@"
-config.llvm_obj_root = "@LLVM_BINARY_DIR@"
-config.llvm_tools_dir = "@LLVM_TOOLS_DIR@"
-config.llvm_lib_dir = "@LLVM_LIBRARY_DIR@"
-config.llvm_shlib_dir = "@SHLIBDIR@"
-config.llvm_shlib_ext = "@SHLIBEXT@"
-config.llvm_exe_ext = "@EXEEXT@"
-config.lit_tools_dir = "@LLVM_LIT_TOOLS_DIR@"
-config.python_executable = "@PYTHON_EXECUTABLE@"
-config.gold_executable = "@GOLD_EXECUTABLE@"
-config.ld64_executable = "@LD64_EXECUTABLE@"
-config.llvm_tool_lto_build = @LLVM_TOOL_LTO_BUILD@
-config.ocamlfind_executable = "@OCAMLFIND@"
-config.have_ocamlopt = @HAVE_OCAMLOPT@
-config.have_ocaml_ounit = @HAVE_OCAML_OUNIT@
-config.ocaml_flags = "@OCAMLFLAGS@"
-config.include_go_tests = @LLVM_INCLUDE_GO_TESTS@
-config.go_executable = "@GO_EXECUTABLE@"
-config.enable_shared = @ENABLE_SHARED@
-config.enable_assertions = @ENABLE_ASSERTIONS@
-config.enable_abi_breaking_checks = "@LLVM_ENABLE_ABI_BREAKING_CHECKS@"
-config.targets_to_build = "@TARGETS_TO_BUILD@"
-config.native_target = "@LLVM_NATIVE_ARCH@"
-config.llvm_bindings = "@LLVM_BINDINGS@".split(' ')
-config.host_os = "@HOST_OS@"
-config.host_arch = "@HOST_ARCH@"
-config.host_cc = "@HOST_CC@"
-config.host_cxx = "@HOST_CXX@"
-config.host_ldflags = "@HOST_LDFLAGS@"
-config.llvm_use_intel_jitevents = @LLVM_USE_INTEL_JITEVENTS@
-config.llvm_use_sanitizer = "@LLVM_USE_SANITIZER@"
-config.have_zlib = @HAVE_LIBZ@
-config.have_libxar = @HAVE_LIBXAR@
-config.have_dia_sdk = @LLVM_ENABLE_DIA_SDK@
-config.enable_ffi = @LLVM_ENABLE_FFI@
-config.build_shared_libs = @BUILD_SHARED_LIBS@
-
-# Support substitution of the tools_dir with user parameters. This is
-# used when we can't determine the tool dir at configuration time.
-try:
-    config.llvm_tools_dir = config.llvm_tools_dir % lit_config.params
-    config.llvm_shlib_dir = config.llvm_shlib_dir % lit_config.params
-except KeyError:
-    e = sys.exc_info()[1]
-    key, = e.args
-    lit_config.fatal("unable to find %r parameter, use '--param=%s=VALUE'" % (key,key))
-
-# Let the main config do the real work.
-lit_config.load_config(config, "@LLVM_SOURCE_DIR@/test/lit.cfg")
diff --git a/external/bsd/llvm/dist/llvm/test/tools/gold/X86/v1.12/Inputs/thinlto_emit_linked_objects.ll b/external/bsd/llvm/dist/llvm/test/tools/gold/X86/v1.12/Inputs/thinlto_emit_linked_objects.ll
deleted file mode 100644
index c6c2046b31a2..000000000000
--- a/external/bsd/llvm/dist/llvm/test/tools/gold/X86/v1.12/Inputs/thinlto_emit_linked_objects.ll
+++ /dev/null
@@ -1,7 +0,0 @@
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-define void @foo() {
-entry:
-  ret void
-}
diff --git a/external/bsd/llvm/dist/llvm/test/tools/llvm-readobj/resources.test b/external/bsd/llvm/dist/llvm/test/tools/llvm-readobj/resources.test
deleted file mode 100644
index 589a9c968aae..000000000000
--- a/external/bsd/llvm/dist/llvm/test/tools/llvm-readobj/resources.test
+++ /dev/null
@@ -1,143 +0,0 @@
-// Check dumping of the .rsrc section(s)
-// The input was generated with the following commands, using the original Windows
-// rc.exe and cvtres.exe:
-// > rc /fo test_resource.res /nologo test_resource.rc
-// > cvtres /machine:X86 /readonly /nologo /out:test_resource.o test_resource.res
-
-RUN: llvm-readobj -coff-resources -section-data %p/Inputs/zero-string-table.obj.coff-i386 \
-RUN:   | FileCheck %s -check-prefix ZERO
-RUN: llvm-readobj -coff-resources %p/Inputs/resources/test_resource.obj.coff \
-RUN:   | FileCheck %s -check-prefix TEST_RES
-
-ZERO:     Resources [
-ZERO-NEXT:  Total Number of Resources: 1
-ZERO-NEXT:  Base Table Address: 0x188
-ZERO-DAG:   Number of String Entries: 0
-ZERO-NEXT:  Number of ID Entries: 1
-ZERO-NEXT:  Type: kRT_STRING (ID 6) [
-ZERO-NEXT:    Table Offset: 0x18
-ZERO-NEXT:    Number of String Entries: 0
-ZERO-NEXT:    Number of ID Entries: 1
-ZERO-NEXT:    Name: (ID 1) [
-ZERO-NEXT:      Table Offset: 0x30
-ZERO-NEXT:      Number of String Entries: 0
-ZERO-NEXT:      Number of ID Entries: 1
-ZERO-NEXT:      Language: (ID 1033) [
-ZERO-NEXT:        Entry Offset: 0x48
-ZERO-NEXT:        Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
-ZERO-NEXT:        Major Version: 0
-ZERO-NEXT:        Minor Version: 0
-ZERO-NEXT:        Characteristics: 0
-ZERO-NEXT:      ]
-ZERO-NEXT:    ]
-ZERO-NEXT:  ]
-
-TEST_RES:     Resources [
-TEST_RES-NEXT:  Total Number of Resources: 7
-TEST_RES-NEXT:  Base Table Address: 0x1C0  
-TEST_RES-DAG:   Number of String Entries: 0
-TEST_RES-NEXT:  Number of ID Entries: 4
-TEST_RES-NEXT:  Type: kRT_BITMAP (ID 2) [
-TEST_RES-NEXT:    Table Offset: 0x30
-TEST_RES-NEXT:    Number of String Entries: 2
-TEST_RES-NEXT:    Number of ID Entries: 0
-TEST_RES-NEXT:    Name: CURSOR [
-TEST_RES-NEXT:      Table Offset: 0xA8
-TEST_RES-NEXT:      Number of String Entries: 0
-TEST_RES-NEXT:      Number of ID Entries: 1
-TEST_RES-NEXT:      Language: (ID 1033) [
-TEST_RES-NEXT:        Entry Offset: 0x150
-TEST_RES-NEXT:        Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
-TEST_RES-NEXT:        Major Version: 0
-TEST_RES-NEXT:        Minor Version: 0
-TEST_RES-NEXT:        Characteristics: 0
-TEST_RES-NEXT:      ]
-TEST_RES-NEXT:    ]
-TEST_RES-NEXT:    Name: OKAY [
-TEST_RES-NEXT:      Table Offset: 0xC0
-TEST_RES-NEXT:      Number of String Entries: 0
-TEST_RES-NEXT:      Number of ID Entries: 1
-TEST_RES-NEXT:      Language: (ID 1033) [
-TEST_RES-NEXT:        Entry Offset: 0x160
-TEST_RES-NEXT:        Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
-TEST_RES-NEXT:        Major Version: 0
-TEST_RES-NEXT:        Minor Version: 0
-TEST_RES-NEXT:        Characteristics: 0
-TEST_RES-NEXT:      ]
-TEST_RES-NEXT:    ]
-TEST_RES-NEXT:  ]
-TEST_RES-NEXT:  Type: kRT_MENU (ID 4) [
-TEST_RES-NEXT:    Table Offset: 0x50
-TEST_RES-NEXT:    Number of String Entries: 1
-TEST_RES-NEXT:    Number of ID Entries: 1
-TEST_RES-NEXT:    Name: "EAT" [
-TEST_RES-NEXT:      Table Offset: 0xD8
-TEST_RES-NEXT:      Number of String Entries: 0
-TEST_RES-NEXT:      Number of ID Entries: 1
-TEST_RES-NEXT:      Language: (ID 3081) [
-TEST_RES-NEXT:        Entry Offset: 0x170
-TEST_RES-NEXT:        Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
-TEST_RES-NEXT:        Major Version: 0
-TEST_RES-NEXT:        Minor Version: 0
-TEST_RES-NEXT:        Characteristics: 0
-TEST_RES-NEXT:      ]
-TEST_RES-NEXT:    ]
-TEST_RES-NEXT:    Name: (ID 14432) [
-TEST_RES-NEXT:      Table Offset: 0xF0
-TEST_RES-NEXT:      Number of String Entries: 0
-TEST_RES-NEXT:      Number of ID Entries: 1
-TEST_RES-NEXT:      Language: (ID 2052) [
-TEST_RES-NEXT:        Entry Offset: 0x180
-TEST_RES-NEXT:        Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
-TEST_RES-NEXT:        Major Version: 0
-TEST_RES-NEXT:        Minor Version: 0
-TEST_RES-NEXT:        Characteristics: 0
-TEST_RES-NEXT:      ]
-TEST_RES-NEXT:    ]
-TEST_RES-NEXT:  ]
-TEST_RES-NEXT:  Type: kRT_DIALOG (ID 5) [
-TEST_RES-NEXT:    Table Offset: 0x70
-TEST_RES-NEXT:    Number of String Entries: 1
-TEST_RES-NEXT:    Number of ID Entries: 0
-TEST_RES-NEXT:    Name: TESTDIALOG [
-TEST_RES-NEXT:      Table Offset: 0x108
-TEST_RES-NEXT:      Number of String Entries: 0
-TEST_RES-NEXT:      Number of ID Entries: 1
-TEST_RES-NEXT:      Language: (ID 1033) [
-TEST_RES-NEXT:        Entry Offset: 0x190
-TEST_RES-NEXT:        Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
-TEST_RES-NEXT:        Major Version: 0
-TEST_RES-NEXT:        Minor Version: 0
-TEST_RES-NEXT:        Characteristics: 0
-TEST_RES-NEXT:      ]
-TEST_RES-NEXT:    ]
-TEST_RES-NEXT:  ]
-TEST_RES-NEXT:  Type: kRT_ACCELERATOR (ID 9) [
-TEST_RES-NEXT:    Table Offset: 0x88
-TEST_RES-NEXT:    Number of String Entries: 1
-TEST_RES-NEXT:    Number of ID Entries: 1
-TEST_RES-NEXT:    Name: MYACCELERATORS [
-TEST_RES-NEXT:      Table Offset: 0x120
-TEST_RES-NEXT:      Number of String Entries: 0
-TEST_RES-NEXT:      Number of ID Entries: 1
-TEST_RES-NEXT:      Language: (ID 1033) [
-TEST_RES-NEXT:        Entry Offset: 0x1A0
-TEST_RES-NEXT:        Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
-TEST_RES-NEXT:        Major Version: 0
-TEST_RES-NEXT:        Minor Version: 0
-TEST_RES-NEXT:        Characteristics: 0
-TEST_RES-NEXT:      ]
-TEST_RES-NEXT:    ]
-TEST_RES-NEXT:    Name: (ID 12) [
-TEST_RES-NEXT:      Table Offset: 0x138
-TEST_RES-NEXT:      Number of String Entries: 0
-TEST_RES-NEXT:      Number of ID Entries: 1
-TEST_RES-NEXT:      Language: (ID 1033) [
-TEST_RES-NEXT:        Entry Offset: 0x1B0
-TEST_RES-NEXT:        Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
-TEST_RES-NEXT:        Major Version: 0
-TEST_RES-NEXT:        Minor Version: 0
-TEST_RES-NEXT:        Characteristics: 0
-TEST_RES-NEXT:      ]
-TEST_RES-NEXT:    ]
-TEST_RES-NEXT:  ]
diff --git a/external/bsd/llvm/dist/llvm/tools/lli/OrcLazyJIT.cpp b/external/bsd/llvm/dist/llvm/tools/lli/OrcLazyJIT.cpp
deleted file mode 100644
index f1a752e0790d..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/lli/OrcLazyJIT.cpp
+++ /dev/null
@@ -1,166 +0,0 @@
-//===- OrcLazyJIT.cpp - Basic Orc-based JIT for lazy execution ------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "OrcLazyJIT.h"
-#include "llvm/ADT/Triple.h"
-#include "llvm/ExecutionEngine/ExecutionEngine.h"
-#include "llvm/Support/CodeGen.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/DynamicLibrary.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/FileSystem.h"
-#include <cstdint>
-#include <cstdio>
-#include <cstdlib>
-#include <system_error>
-
-using namespace llvm;
-
-namespace {
-
-enum class DumpKind {
-  NoDump,
-  DumpFuncsToStdOut,
-  DumpModsToStdOut,
-  DumpModsToDisk
-};
-
-} // end anonymous namespace
-
-static cl::opt<DumpKind> OrcDumpKind(
-    "orc-lazy-debug", cl::desc("Debug dumping for the orc-lazy JIT."),
-    cl::init(DumpKind::NoDump),
-    cl::values(clEnumValN(DumpKind::NoDump, "no-dump", "Don't dump anything."),
-               clEnumValN(DumpKind::DumpFuncsToStdOut, "funcs-to-stdout",
-                          "Dump function names to stdout."),
-               clEnumValN(DumpKind::DumpModsToStdOut, "mods-to-stdout",
-                          "Dump modules to stdout."),
-               clEnumValN(DumpKind::DumpModsToDisk, "mods-to-disk",
-                          "Dump modules to the current "
-                          "working directory. (WARNING: "
-                          "will overwrite existing files).")),
-    cl::Hidden);
-
-static cl::opt<bool> OrcInlineStubs("orc-lazy-inline-stubs",
-                                    cl::desc("Try to inline stubs"),
-                                    cl::init(true), cl::Hidden);
-
-OrcLazyJIT::TransformFtor OrcLazyJIT::createDebugDumper() {
-  switch (OrcDumpKind) {
-  case DumpKind::NoDump:
-    return [](std::shared_ptr<Module> M) { return M; };
-
-  case DumpKind::DumpFuncsToStdOut:
-    return [](std::shared_ptr<Module> M) {
-      printf("[ ");
-
-      for (const auto &F : *M) {
-        if (F.isDeclaration())
-          continue;
-
-        if (F.hasName()) {
-          std::string Name(F.getName());
-          printf("%s ", Name.c_str());
-        } else
-          printf("<anon> ");
-      }
-
-      printf("]\n");
-      return M;
-    };
-
-  case DumpKind::DumpModsToStdOut:
-    return [](std::shared_ptr<Module> M) {
-             outs() << "----- Module Start -----\n" << *M
-                    << "----- Module End -----\n";
-
-             return M;
-           };
-
-  case DumpKind::DumpModsToDisk:
-    return [](std::shared_ptr<Module> M) {
-             std::error_code EC;
-             raw_fd_ostream Out(M->getModuleIdentifier() + ".ll", EC,
-                                sys::fs::F_Text);
-             if (EC) {
-               errs() << "Couldn't open " << M->getModuleIdentifier()
-                      << " for dumping.\nError:" << EC.message() << "\n";
-               exit(1);
-             }
-             Out << *M;
-             return M;
-           };
-  }
-  llvm_unreachable("Unknown DumpKind");
-}
-
-// Defined in lli.cpp.
-CodeGenOpt::Level getOptLevel();
-
-template <typename PtrTy>
-static PtrTy fromTargetAddress(JITTargetAddress Addr) {
-  return reinterpret_cast<PtrTy>(static_cast<uintptr_t>(Addr));
-}
-
-int llvm::runOrcLazyJIT(std::vector<std::unique_ptr<Module>> Ms,
-                        const std::vector<std::string> &Args) {
-  // Add the program's symbols into the JIT's search space.
-  if (sys::DynamicLibrary::LoadLibraryPermanently(nullptr)) {
-    errs() << "Error loading program symbols.\n";
-    return 1;
-  }
-
-  // Grab a target machine and try to build a factory function for the
-  // target-specific Orc callback manager.
-  EngineBuilder EB;
-  EB.setOptLevel(getOptLevel());
-  auto TM = std::unique_ptr<TargetMachine>(EB.selectTarget());
-  Triple T(TM->getTargetTriple());
-  auto CompileCallbackMgr = orc::createLocalCompileCallbackManager(T, 0);
-
-  // If we couldn't build the factory function then there must not be a callback
-  // manager for this target. Bail out.
-  if (!CompileCallbackMgr) {
-    errs() << "No callback manager available for target '"
-           << TM->getTargetTriple().str() << "'.\n";
-    return 1;
-  }
-
-  auto IndirectStubsMgrBuilder = orc::createLocalIndirectStubsManagerBuilder(T);
-
-  // If we couldn't build a stubs-manager-builder for this target then bail out.
-  if (!IndirectStubsMgrBuilder) {
-    errs() << "No indirect stubs manager available for target '"
-           << TM->getTargetTriple().str() << "'.\n";
-    return 1;
-  }
-
-  // Everything looks good. Build the JIT.
-  OrcLazyJIT J(std::move(TM), std::move(CompileCallbackMgr),
-               std::move(IndirectStubsMgrBuilder),
-               OrcInlineStubs);
-
-  // Add the module, look up main and run it.
-  for (auto &M : Ms)
-    cantFail(J.addModule(std::shared_ptr<Module>(std::move(M))));
-
-  if (auto MainSym = J.findSymbol("main")) {
-    typedef int (*MainFnPtr)(int, const char*[]);
-    std::vector<const char *> ArgV;
-    for (auto &Arg : Args)
-      ArgV.push_back(Arg.c_str());
-    auto Main = fromTargetAddress<MainFnPtr>(cantFail(MainSym.getAddress()));
-    return Main(ArgV.size(), (const char**)ArgV.data());
-  } else if (auto Err = MainSym.takeError())
-    logAllUnhandledErrors(std::move(Err), llvm::errs(), "");
-  else
-    errs() << "Could not find main function.\n";
-
-  return 1;
-}
diff --git a/external/bsd/llvm/dist/llvm/tools/lli/OrcLazyJIT.h b/external/bsd/llvm/dist/llvm/tools/lli/OrcLazyJIT.h
deleted file mode 100644
index 47a2acc4d7e6..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/lli/OrcLazyJIT.h
+++ /dev/null
@@ -1,201 +0,0 @@
-//===- OrcLazyJIT.h - Basic Orc-based JIT for lazy execution ----*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Simple Orc-based JIT. Uses the compile-on-demand layer to break up and
-// lazily compile modules.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TOOLS_LLI_ORCLAZYJIT_H
-#define LLVM_TOOLS_LLI_ORCLAZYJIT_H
-
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/ADT/Twine.h"
-#include "llvm/ExecutionEngine/JITSymbol.h"
-#include "llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h"
-#include "llvm/ExecutionEngine/Orc/CompileUtils.h"
-#include "llvm/ExecutionEngine/Orc/ExecutionUtils.h"
-#include "llvm/ExecutionEngine/Orc/IndirectionUtils.h"
-#include "llvm/ExecutionEngine/Orc/IRCompileLayer.h"
-#include "llvm/ExecutionEngine/Orc/IRTransformLayer.h"
-#include "llvm/ExecutionEngine/Orc/LambdaResolver.h"
-#include "llvm/ExecutionEngine/Orc/RTDyldObjectLinkingLayer.h"
-#include "llvm/ExecutionEngine/RTDyldMemoryManager.h"
-#include "llvm/ExecutionEngine/SectionMemoryManager.h"
-#include "llvm/IR/DataLayout.h"
-#include "llvm/IR/GlobalValue.h"
-#include "llvm/IR/Mangler.h"
-#include "llvm/IR/Module.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetMachine.h"
-#include <algorithm>
-#include <functional>
-#include <memory>
-#include <set>
-#include <string>
-#include <vector>
-
-namespace llvm {
-
-class OrcLazyJIT {
-public:
-
-  using CompileCallbackMgr = orc::JITCompileCallbackManager;
-  using ObjLayerT = orc::RTDyldObjectLinkingLayer;
-  using CompileLayerT = orc::IRCompileLayer<ObjLayerT, orc::SimpleCompiler>;
-  using TransformFtor =
-          std::function<std::shared_ptr<Module>(std::shared_ptr<Module>)>;
-  using IRDumpLayerT = orc::IRTransformLayer<CompileLayerT, TransformFtor>;
-  using CODLayerT = orc::CompileOnDemandLayer<IRDumpLayerT, CompileCallbackMgr>;
-  using IndirectStubsManagerBuilder = CODLayerT::IndirectStubsManagerBuilderT;
-  using ModuleHandleT = CODLayerT::ModuleHandleT;
-
-  OrcLazyJIT(std::unique_ptr<TargetMachine> TM,
-             std::unique_ptr<CompileCallbackMgr> CCMgr,
-             IndirectStubsManagerBuilder IndirectStubsMgrBuilder,
-             bool InlineStubs)
-      : TM(std::move(TM)), DL(this->TM->createDataLayout()),
-	CCMgr(std::move(CCMgr)),
-	ObjectLayer([]() { return std::make_shared<SectionMemoryManager>(); }),
-        CompileLayer(ObjectLayer, orc::SimpleCompiler(*this->TM)),
-        IRDumpLayer(CompileLayer, createDebugDumper()),
-        CODLayer(IRDumpLayer, extractSingleFunction, *this->CCMgr,
-                 std::move(IndirectStubsMgrBuilder), InlineStubs),
-        CXXRuntimeOverrides(
-            [this](const std::string &S) { return mangle(S); }) {}
-
-  ~OrcLazyJIT() {
-    // Run any destructors registered with __cxa_atexit.
-    CXXRuntimeOverrides.runDestructors();
-    // Run any IR destructors.
-    for (auto &DtorRunner : IRStaticDestructorRunners)
-      if (auto Err = DtorRunner.runViaLayer(CODLayer)) {
-        // FIXME: OrcLazyJIT should probably take a "shutdownError" callback to
-        //        report these errors on.
-        report_fatal_error(std::move(Err));
-      }
-  }
-
-  Error addModule(std::shared_ptr<Module> M) {
-    if (M->getDataLayout().isDefault())
-      M->setDataLayout(DL);
-
-    // Rename, bump linkage and record static constructors and destructors.
-    // We have to do this before we hand over ownership of the module to the
-    // JIT.
-    std::vector<std::string> CtorNames, DtorNames;
-    {
-      unsigned CtorId = 0, DtorId = 0;
-      for (auto Ctor : orc::getConstructors(*M)) {
-        std::string NewCtorName = ("$static_ctor." + Twine(CtorId++)).str();
-        Ctor.Func->setName(NewCtorName);
-        Ctor.Func->setLinkage(GlobalValue::ExternalLinkage);
-        Ctor.Func->setVisibility(GlobalValue::HiddenVisibility);
-        CtorNames.push_back(mangle(NewCtorName));
-      }
-      for (auto Dtor : orc::getDestructors(*M)) {
-        std::string NewDtorName = ("$static_dtor." + Twine(DtorId++)).str();
-        Dtor.Func->setLinkage(GlobalValue::ExternalLinkage);
-        Dtor.Func->setVisibility(GlobalValue::HiddenVisibility);
-        DtorNames.push_back(mangle(Dtor.Func->getName()));
-        Dtor.Func->setName(NewDtorName);
-      }
-    }
-
-    // Symbol resolution order:
-    //   1) Search the JIT symbols.
-    //   2) Check for C++ runtime overrides.
-    //   3) Search the host process (LLI)'s symbol table.
-    if (ModulesHandle == CODLayerT::ModuleHandleT()) {
-      auto Resolver =
-        orc::createLambdaResolver(
-          [this](const std::string &Name) -> JITSymbol {
-            if (auto Sym = CODLayer.findSymbol(Name, true))
-              return Sym;
-            return CXXRuntimeOverrides.searchOverrides(Name);
-          },
-          [](const std::string &Name) {
-            if (auto Addr =
-                RTDyldMemoryManager::getSymbolAddressInProcess(Name))
-              return JITSymbol(Addr, JITSymbolFlags::Exported);
-            return JITSymbol(nullptr);
-          }
-        );
-
-      // Add the module to the JIT.
-      if (auto ModulesHandleOrErr =
-          CODLayer.addModule(std::move(M), std::move(Resolver)))
-        ModulesHandle = std::move(*ModulesHandleOrErr);
-      else
-        return ModulesHandleOrErr.takeError();
-
-    } else
-      if (auto Err = CODLayer.addExtraModule(ModulesHandle, std::move(M)))
-        return Err;
-
-    // Run the static constructors, and save the static destructor runner for
-    // execution when the JIT is torn down.
-    orc::CtorDtorRunner<CODLayerT> CtorRunner(std::move(CtorNames),
-                                              ModulesHandle);
-    if (auto Err = CtorRunner.runViaLayer(CODLayer))
-      return Err;
-
-    IRStaticDestructorRunners.emplace_back(std::move(DtorNames),
-                                           ModulesHandle);
-
-    return Error::success();
-  }
-
-  JITSymbol findSymbol(const std::string &Name) {
-    return CODLayer.findSymbol(mangle(Name), true);
-  }
-
-  JITSymbol findSymbolIn(ModuleHandleT H, const std::string &Name) {
-    return CODLayer.findSymbolIn(H, mangle(Name), true);
-  }
-
-private:
-  std::string mangle(const std::string &Name) {
-    std::string MangledName;
-    {
-      raw_string_ostream MangledNameStream(MangledName);
-      Mangler::getNameWithPrefix(MangledNameStream, Name, DL);
-    }
-    return MangledName;
-  }
-
-  static std::set<Function*> extractSingleFunction(Function &F) {
-    std::set<Function*> Partition;
-    Partition.insert(&F);
-    return Partition;
-  }
-
-  static TransformFtor createDebugDumper();
-
-  std::unique_ptr<TargetMachine> TM;
-  DataLayout DL;
-  SectionMemoryManager CCMgrMemMgr;
-
-  std::unique_ptr<CompileCallbackMgr> CCMgr;
-  ObjLayerT ObjectLayer;
-  CompileLayerT CompileLayer;
-  IRDumpLayerT IRDumpLayer;
-  CODLayerT CODLayer;
-
-  orc::LocalCXXRuntimeOverrides CXXRuntimeOverrides;
-  std::vector<orc::CtorDtorRunner<CODLayerT>> IRStaticDestructorRunners;
-  CODLayerT::ModuleHandleT ModulesHandle;
-};
-
-int runOrcLazyJIT(std::vector<std::unique_ptr<Module>> Ms,
-                  const std::vector<std::string> &Args);
-
-} // end namespace llvm
-
-#endif // LLVM_TOOLS_LLI_ORCLAZYJIT_H
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/CMakeLists.txt b/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/CMakeLists.txt
deleted file mode 100644
index 0a51e99f1953..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/CMakeLists.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-set(LLVM_LINK_COMPONENTS support)
-
-add_llvm_tool(llvm-mcmarkup
-  llvm-mcmarkup.cpp
-  )
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/LLVMBuild.txt b/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/LLVMBuild.txt
deleted file mode 100644
index 6423493a543d..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/LLVMBuild.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-;===- ./tools/llvm-mcmarkup/LLVMBuild.txt ----------------------*- Conf -*--===;
-;
-;                     The LLVM Compiler Infrastructure
-;
-; This file is distributed under the University of Illinois Open Source
-; License. See LICENSE.TXT for details.
-;
-;===------------------------------------------------------------------------===;
-;
-; This is an LLVMBuild description file for the components in this subdirectory.
-;
-; For more information on the LLVMBuild system, please see:
-;
-;   http://llvm.org/docs/LLVMBuild.html
-;
-;===------------------------------------------------------------------------===;
-
-[component_0]
-type = Tool
-name = llvm-mcmarkup
-parent = Tools
-required_libraries = Support
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/llvm-mcmarkup.cpp b/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/llvm-mcmarkup.cpp
deleted file mode 100644
index 0be3c715eee4..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-mcmarkup/llvm-mcmarkup.cpp
+++ /dev/null
@@ -1,226 +0,0 @@
-//===-- llvm-mcmarkup.cpp - Parse the MC assembly markup tags -------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Example simple parser implementation for the MC assembly markup language.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Format.h"
-#include "llvm/Support/ManagedStatic.h"
-#include "llvm/Support/MemoryBuffer.h"
-#include "llvm/Support/PrettyStackTrace.h"
-#include "llvm/Support/Signals.h"
-#include "llvm/Support/SourceMgr.h"
-#include "llvm/Support/raw_ostream.h"
-#include <system_error>
-using namespace llvm;
-
-static cl::list<std::string>
-       InputFilenames(cl::Positional, cl::desc("<input files>"),
-                      cl::ZeroOrMore);
-static cl::opt<bool>
-DumpTags("dump-tags", cl::desc("List all tags encountered in input"));
-
-static StringRef ToolName;
-
-/// Trivial lexer for the markup parser. Input is always handled a character
-/// at a time. The lexer just encapsulates EOF and lookahead handling.
-class MarkupLexer {
-  StringRef::const_iterator Start;
-  StringRef::const_iterator CurPtr;
-  StringRef::const_iterator End;
-public:
-  MarkupLexer(StringRef Source)
-    : Start(Source.begin()), CurPtr(Source.begin()), End(Source.end()) {}
-  // When processing non-markup, input is consumed a character at a time.
-  bool isEOF() { return CurPtr == End; }
-  int getNextChar() {
-    if (CurPtr == End) return EOF;
-    return *CurPtr++;
-  }
-  int peekNextChar() {
-    if (CurPtr == End) return EOF;
-    return *CurPtr;
-  }
-  StringRef::const_iterator getPosition() const { return CurPtr; }
-};
-
-/// A markup tag is a name and a (usually empty) list of modifiers.
-class MarkupTag {
-  StringRef Name;
-  StringRef Modifiers;
-  SMLoc StartLoc;
-public:
-  MarkupTag(StringRef n, StringRef m, SMLoc Loc)
-    : Name(n), Modifiers(m), StartLoc(Loc) {}
-  StringRef getName() const { return Name; }
-  StringRef getModifiers() const { return Modifiers; }
-  SMLoc getLoc() const { return StartLoc; }
-};
-
-/// A simple parser implementation for creating MarkupTags from input text.
-class MarkupParser {
-  MarkupLexer &Lex;
-  SourceMgr &SM;
-public:
-  MarkupParser(MarkupLexer &lex, SourceMgr &SrcMgr) : Lex(lex), SM(SrcMgr) {}
-  /// Create a MarkupTag from the current position in the MarkupLexer.
-  /// The parseTag() method should be called when the lexer has processed
-  /// the opening '<' character. Input will be consumed up to and including
-  /// the ':' which terminates the tag open.
-  MarkupTag parseTag();
-  /// Issue a diagnostic and terminate program execution.
-  void FatalError(SMLoc Loc, StringRef Msg);
-};
-
-void MarkupParser::FatalError(SMLoc Loc, StringRef Msg) {
-  SM.PrintMessage(Loc, SourceMgr::DK_Error, Msg);
-  exit(1);
-}
-
-// Example handler for when a tag is recognized.
-static void processStartTag(MarkupTag &Tag) {
-  // If we're just printing the tags, do that, otherwise do some simple
-  // colorization.
-  if (DumpTags) {
-    outs() << Tag.getName();
-    if (Tag.getModifiers().size())
-      outs() << " " << Tag.getModifiers();
-    outs() << "\n";
-    return;
-  }
-
-  if (!outs().has_colors())
-    return;
-  // Color registers as red and immediates as cyan. Those don't have nested
-  // tags, so don't bother keeping a stack of colors to reset to.
-  if (Tag.getName() == "reg")
-    outs().changeColor(raw_ostream::RED);
-  else if (Tag.getName() == "imm")
-    outs().changeColor(raw_ostream::CYAN);
-}
-
-// Example handler for when the end of a tag is recognized.
-static void processEndTag(MarkupTag &Tag) {
-  // If we're printing the tags, there's nothing more to do here. Otherwise,
-  // set the color back the normal.
-  if (DumpTags)
-    return;
-  if (!outs().has_colors())
-    return;
-  // Just reset to basic white.
-  outs().changeColor(raw_ostream::WHITE, false);
-}
-
-MarkupTag MarkupParser::parseTag() {
-  // First off, extract the tag into it's own StringRef so we can look at it
-  // outside of the context of consuming input.
-  StringRef::const_iterator Start = Lex.getPosition();
-  SMLoc Loc = SMLoc::getFromPointer(Start - 1);
-  while(Lex.getNextChar() != ':') {
-    // EOF is an error.
-    if (Lex.isEOF())
-      FatalError(SMLoc::getFromPointer(Start), "unterminated markup tag");
-  }
-  StringRef RawTag(Start, Lex.getPosition() - Start - 1);
-  std::pair<StringRef, StringRef> SplitTag = RawTag.split(' ');
-  return MarkupTag(SplitTag.first, SplitTag.second, Loc);
-}
-
-static void parseMCMarkup(StringRef Filename) {
-  ErrorOr<std::unique_ptr<MemoryBuffer>> BufferPtr =
-      MemoryBuffer::getFileOrSTDIN(Filename);
-  if (std::error_code EC = BufferPtr.getError()) {
-    errs() << ToolName << ": " << EC.message() << '\n';
-    return;
-  }
-  std::unique_ptr<MemoryBuffer> &Buffer = BufferPtr.get();
-
-  SourceMgr SrcMgr;
-
-  StringRef InputSource = Buffer->getBuffer();
-
-  // Tell SrcMgr about this buffer, which is what the parser will pick up.
-  SrcMgr.AddNewSourceBuffer(std::move(Buffer), SMLoc());
-
-  MarkupLexer Lex(InputSource);
-  MarkupParser Parser(Lex, SrcMgr);
-
-  SmallVector<MarkupTag, 4> TagStack;
-
-  for (int CurChar = Lex.getNextChar();
-       CurChar != EOF;
-       CurChar = Lex.getNextChar()) {
-    switch (CurChar) {
-    case '<': {
-      // A "<<" is output as a literal '<' and does not start a markup tag.
-      if (Lex.peekNextChar() == '<') {
-        (void)Lex.getNextChar();
-        break;
-      }
-      // Parse the markup entry.
-      TagStack.push_back(Parser.parseTag());
-
-      // Do any special handling for the start of a tag.
-      processStartTag(TagStack.back());
-      continue;
-    }
-    case '>': {
-      SMLoc Loc = SMLoc::getFromPointer(Lex.getPosition() - 1);
-      // A ">>" is output as a literal '>' and does not end a markup tag.
-      if (Lex.peekNextChar() == '>') {
-        (void)Lex.getNextChar();
-        break;
-      }
-      // Close out the innermost tag.
-      if (TagStack.empty())
-        Parser.FatalError(Loc, "'>' without matching '<'");
-
-      // Do any special handling for the end of a tag.
-      processEndTag(TagStack.back());
-
-      TagStack.pop_back();
-      continue;
-    }
-    default:
-      break;
-    }
-    // For anything else, just echo the character back out.
-    if (!DumpTags && CurChar != EOF)
-      outs() << (char)CurChar;
-  }
-
-  // If there are any unterminated markup tags, issue diagnostics for them.
-  while (!TagStack.empty()) {
-    MarkupTag &Tag = TagStack.back();
-    SrcMgr.PrintMessage(Tag.getLoc(), SourceMgr::DK_Error,
-                        "unterminated markup tag");
-    TagStack.pop_back();
-  }
-}
-
-int main(int argc, char **argv) {
-  // Print a stack trace if we signal out.
-  sys::PrintStackTraceOnErrorSignal(argv[0]);
-  PrettyStackTraceProgram X(argc, argv);
-
-  llvm_shutdown_obj Y;  // Call llvm_shutdown() on exit.
-  cl::ParseCommandLineOptions(argc, argv, "llvm MC markup parser\n");
-
-  ToolName = argv[0];
-
-  // If no input files specified, read from stdin.
-  if (InputFilenames.size() == 0)
-    InputFilenames.push_back("-");
-
-  std::for_each(InputFilenames.begin(), InputFilenames.end(),
-                parseMCMarkup);
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/Diff.cpp b/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/Diff.cpp
deleted file mode 100644
index aad4e1bf1427..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/Diff.cpp
+++ /dev/null
@@ -1,608 +0,0 @@
-//===- Diff.cpp - PDB diff utility ------------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "Diff.h"
-
-#include "DiffPrinter.h"
-#include "FormatUtil.h"
-#include "StreamUtil.h"
-#include "llvm-pdbutil.h"
-
-#include "llvm/ADT/StringSet.h"
-
-#include "llvm/DebugInfo/PDB/Native/DbiStream.h"
-#include "llvm/DebugInfo/PDB/Native/Formatters.h"
-#include "llvm/DebugInfo/PDB/Native/InfoStream.h"
-#include "llvm/DebugInfo/PDB/Native/PDBFile.h"
-#include "llvm/DebugInfo/PDB/Native/PDBStringTable.h"
-#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
-
-#include "llvm/Support/FileSystem.h"
-#include "llvm/Support/FormatAdapters.h"
-#include "llvm/Support/FormatProviders.h"
-#include "llvm/Support/FormatVariadic.h"
-#include "llvm/Support/Path.h"
-
-using namespace llvm;
-using namespace llvm::pdb;
-
-namespace {
-// Compare and format two stream numbers.  Stream numbers are considered
-// identical if they contain the same value, equivalent if they are both
-// the invalid stream or neither is the invalid stream, and different if
-// one is the invalid stream and another isn't.
-struct StreamNumberProvider {
-  static DiffResult compare(uint16_t L, uint16_t R) {
-    if (L == R)
-      return DiffResult::IDENTICAL;
-    bool LP = L != kInvalidStreamIndex;
-    bool RP = R != kInvalidStreamIndex;
-    if (LP != RP)
-      return DiffResult::DIFFERENT;
-    return DiffResult::EQUIVALENT;
-  }
-
-  static std::string format(uint16_t SN, bool Right) {
-    if (SN == kInvalidStreamIndex)
-      return "(not present)";
-    return formatv("{0}", SN).str();
-  }
-};
-
-// Compares and formats two module indices.  Modis are considered identical
-// if they are identical, equivalent if they either both contain a value or
-// both don't contain a value, and different if one contains a value and the
-// other doesn't.
-struct ModiProvider {
-  DiffResult compare(Optional<uint32_t> L, Optional<uint32_t> R) {
-    if (L == R)
-      return DiffResult::IDENTICAL;
-    if (L.hasValue() != R.hasValue())
-      return DiffResult::DIFFERENT;
-    return DiffResult::EQUIVALENT;
-  }
-
-  std::string format(Optional<uint32_t> Modi, bool Right) {
-    if (!Modi.hasValue())
-      return "(not present)";
-    return formatv("{0}", *Modi).str();
-  }
-};
-
-// Compares and formats two paths embedded in the PDB, ignoring the beginning
-// of the path if the user specified it as a "root path" on the command line.
-struct BinaryPathProvider {
-  explicit BinaryPathProvider(uint32_t MaxLen) : MaxLen(MaxLen) {}
-
-  DiffResult compare(StringRef L, StringRef R) {
-    if (L == R)
-      return DiffResult::IDENTICAL;
-
-    SmallString<64> LN = removeRoot(L, false);
-    SmallString<64> RN = removeRoot(R, true);
-
-    return (LN.equals_lower(RN)) ? DiffResult::EQUIVALENT
-                                 : DiffResult::DIFFERENT;
-  }
-
-  std::string format(StringRef S, bool Right) {
-    if (S.empty())
-      return "(empty)";
-
-    SmallString<64> Native = removeRoot(S, Right);
-    return truncateStringFront(Native.str(), MaxLen);
-  }
-
-  SmallString<64> removeRoot(StringRef Path, bool IsRight) const {
-    SmallString<64> Native(Path);
-    auto &RootOpt = IsRight ? opts::diff::RightRoot : opts::diff::LeftRoot;
-    SmallString<64> Root(static_cast<std::string>(RootOpt));
-    // pdb paths always use windows syntax, convert slashes to backslashes.
-    sys::path::native(Root, sys::path::Style::windows);
-    if (sys::path::has_stem(Root, sys::path::Style::windows))
-      sys::path::append(Root, sys::path::Style::windows,
-                        sys::path::get_separator(sys::path::Style::windows));
-
-    sys::path::replace_path_prefix(Native, Root, "", sys::path::Style::windows);
-    return Native;
-  }
-  uint32_t MaxLen;
-};
-
-// Compare and format two stream purposes.  For general streams, this just
-// compares the description.  For module streams it uses the path comparison
-// algorithm taking into consideration the binary root, described above.
-// Formatting stream purposes just prints the stream purpose, except for
-// module streams and named streams, where it prefixes the name / module
-// with an identifier.  Example:
-//
-//   Named Stream "\names"
-//   Module Stream "foo.obj"
-//
-// If a named stream is too long to fit in a column, it is truncated at the
-// end, and if a module is too long to fit in a column, it is truncated at the
-// beginning.  Example:
-//
-//  Named Stream "\Really Long Str..."
-//  Module Stream "...puts\foo.obj"
-//
-struct StreamPurposeProvider {
-  explicit StreamPurposeProvider(uint32_t MaxLen) : MaxLen(MaxLen) {}
-
-  DiffResult compare(const std::pair<StreamPurpose, std::string> &L,
-                     const std::pair<StreamPurpose, std::string> &R) {
-    if (L.first != R.first)
-      return DiffResult::DIFFERENT;
-    if (L.first == StreamPurpose::ModuleStream) {
-      BinaryPathProvider PathProvider(MaxLen);
-      return PathProvider.compare(L.second, R.second);
-    }
-    return (L.second == R.second) ? DiffResult::IDENTICAL
-                                  : DiffResult::DIFFERENT;
-  }
-
-  std::string format(const std::pair<StreamPurpose, std::string> &P,
-                     bool Right) {
-    if (P.first == StreamPurpose::Other)
-      return truncateStringBack(P.second, MaxLen);
-    if (P.first == StreamPurpose::NamedStream)
-      return truncateQuotedNameBack("Named Stream", P.second, MaxLen);
-
-    assert(P.first == StreamPurpose::ModuleStream);
-    uint32_t ExtraChars = strlen("Module \"\"");
-    BinaryPathProvider PathProvider(MaxLen - ExtraChars);
-    std::string Result = PathProvider.format(P.second, Right);
-    return formatv("Module \"{0}\"", Result);
-  }
-
-  uint32_t MaxLen;
-};
-} // namespace
-
-namespace llvm {
-template <> struct format_provider<PdbRaw_FeatureSig> {
-  static void format(const PdbRaw_FeatureSig &Sig, raw_ostream &Stream,
-                     StringRef Style) {
-    switch (Sig) {
-    case PdbRaw_FeatureSig::MinimalDebugInfo:
-      Stream << "MinimalDebugInfo";
-      break;
-    case PdbRaw_FeatureSig::NoTypeMerge:
-      Stream << "NoTypeMerge";
-      break;
-    case PdbRaw_FeatureSig::VC110:
-      Stream << "VC110";
-      break;
-    case PdbRaw_FeatureSig::VC140:
-      Stream << "VC140";
-      break;
-    }
-  }
-};
-}
-
-template <typename R> using ValueOfRange = llvm::detail::ValueOfRange<R>;
-
-DiffStyle::DiffStyle(PDBFile &File1, PDBFile &File2)
-    : File1(File1), File2(File2) {}
-
-Error DiffStyle::dump() {
-  if (auto EC = diffSuperBlock())
-    return EC;
-
-  if (auto EC = diffFreePageMap())
-    return EC;
-
-  if (auto EC = diffStreamDirectory())
-    return EC;
-
-  if (auto EC = diffStringTable())
-    return EC;
-
-  if (auto EC = diffInfoStream())
-    return EC;
-
-  if (auto EC = diffDbiStream())
-    return EC;
-
-  if (auto EC = diffSectionContribs())
-    return EC;
-
-  if (auto EC = diffSectionMap())
-    return EC;
-
-  if (auto EC = diffFpoStream())
-    return EC;
-
-  if (auto EC = diffTpiStream(StreamTPI))
-    return EC;
-
-  if (auto EC = diffTpiStream(StreamIPI))
-    return EC;
-
-  if (auto EC = diffPublics())
-    return EC;
-
-  if (auto EC = diffGlobals())
-    return EC;
-
-  return Error::success();
-}
-
-Error DiffStyle::diffSuperBlock() {
-  DiffPrinter D(2, "MSF Super Block", 16, 20, opts::diff::PrintResultColumn,
-                opts::diff::PrintValueColumns, outs());
-  D.printExplicit("File", DiffResult::UNSPECIFIED,
-                  truncateStringFront(File1.getFilePath(), 18),
-                  truncateStringFront(File2.getFilePath(), 18));
-  D.print("Block Size", File1.getBlockSize(), File2.getBlockSize());
-  D.print("Block Count", File1.getBlockCount(), File2.getBlockCount());
-  D.print("Unknown 1", File1.getUnknown1(), File2.getUnknown1());
-  D.print("Directory Size", File1.getNumDirectoryBytes(),
-          File2.getNumDirectoryBytes());
-  return Error::success();
-}
-
-Error DiffStyle::diffStreamDirectory() {
-  DiffPrinter D(2, "Stream Directory", 30, 20, opts::diff::PrintResultColumn,
-                opts::diff::PrintValueColumns, outs());
-  D.printExplicit("File", DiffResult::UNSPECIFIED,
-                  truncateStringFront(File1.getFilePath(), 18),
-                  truncateStringFront(File2.getFilePath(), 18));
-
-  SmallVector<std::pair<StreamPurpose, std::string>, 32> P;
-  SmallVector<std::pair<StreamPurpose, std::string>, 32> Q;
-  discoverStreamPurposes(File1, P);
-  discoverStreamPurposes(File2, Q);
-  D.print("Stream Count", File1.getNumStreams(), File2.getNumStreams());
-  auto PI = to_vector<32>(enumerate(P));
-  auto QI = to_vector<32>(enumerate(Q));
-
-  // Scan all streams in the left hand side, looking for ones that are also
-  // in the right.  Each time we find one, remove it.  When we're done, Q
-  // should contain all the streams that are in the right but not in the left.
-  StreamPurposeProvider StreamProvider(28);
-  for (const auto &P : PI) {
-    typedef decltype(PI) ContainerType;
-    typedef typename ContainerType::value_type value_type;
-
-    auto Iter = llvm::find_if(QI, [P, &StreamProvider](const value_type &V) {
-      DiffResult Result = StreamProvider.compare(P.value(), V.value());
-      return Result == DiffResult::EQUIVALENT ||
-             Result == DiffResult::IDENTICAL;
-    });
-
-    if (Iter == QI.end()) {
-      D.printExplicit(StreamProvider.format(P.value(), false),
-                      DiffResult::DIFFERENT, P.index(), "(not present)");
-      continue;
-    }
-
-    D.print<EquivalentDiffProvider>(StreamProvider.format(P.value(), false),
-                                    P.index(), Iter->index());
-    QI.erase(Iter);
-  }
-
-  for (const auto &Q : QI) {
-    D.printExplicit(StreamProvider.format(Q.value(), true),
-                    DiffResult::DIFFERENT, "(not present)", Q.index());
-  }
-
-  return Error::success();
-}
-
-Error DiffStyle::diffStringTable() {
-  DiffPrinter D(2, "String Table", 30, 20, opts::diff::PrintResultColumn,
-                opts::diff::PrintValueColumns, outs());
-  D.printExplicit("File", DiffResult::UNSPECIFIED,
-                  truncateStringFront(File1.getFilePath(), 18),
-                  truncateStringFront(File2.getFilePath(), 18));
-
-  auto ExpectedST1 = File1.getStringTable();
-  auto ExpectedST2 = File2.getStringTable();
-  bool Has1 = !!ExpectedST1;
-  bool Has2 = !!ExpectedST2;
-  std::string Count1 = Has1 ? llvm::utostr(ExpectedST1->getNameCount())
-                            : "(string table not present)";
-  std::string Count2 = Has2 ? llvm::utostr(ExpectedST2->getNameCount())
-                            : "(string table not present)";
-  D.print("Number of Strings", Count1, Count2);
-
-  if (!Has1 || !Has2) {
-    consumeError(ExpectedST1.takeError());
-    consumeError(ExpectedST2.takeError());
-    return Error::success();
-  }
-
-  auto &ST1 = *ExpectedST1;
-  auto &ST2 = *ExpectedST2;
-
-  D.print("Hash Version", ST1.getHashVersion(), ST2.getHashVersion());
-  D.print("Byte Size", ST1.getByteSize(), ST2.getByteSize());
-  D.print("Signature", ST1.getSignature(), ST2.getSignature());
-
-  // Both have a valid string table, dive in and compare individual strings.
-
-  auto IdList1 = ST1.name_ids();
-  auto IdList2 = ST2.name_ids();
-  StringSet<> LS;
-  StringSet<> RS;
-  uint32_t Empty1 = 0;
-  uint32_t Empty2 = 0;
-  for (auto ID : IdList1) {
-    auto S = ST1.getStringForID(ID);
-    if (!S)
-      return S.takeError();
-    if (S->empty())
-      ++Empty1;
-    else
-      LS.insert(*S);
-  }
-  for (auto ID : IdList2) {
-    auto S = ST2.getStringForID(ID);
-    if (!S)
-      return S.takeError();
-    if (S->empty())
-      ++Empty2;
-    else
-      RS.insert(*S);
-  }
-  D.print("Empty Strings", Empty1, Empty2);
-
-  for (const auto &S : LS) {
-    auto R = RS.find(S.getKey());
-    std::string Truncated = truncateStringMiddle(S.getKey(), 28);
-    uint32_t I = cantFail(ST1.getIDForString(S.getKey()));
-    if (R == RS.end()) {
-      D.printExplicit(Truncated, DiffResult::DIFFERENT, I, "(not present)");
-      continue;
-    }
-
-    uint32_t J = cantFail(ST2.getIDForString(R->getKey()));
-    D.print<EquivalentDiffProvider>(Truncated, I, J);
-    RS.erase(R);
-  }
-
-  for (const auto &S : RS) {
-    auto L = LS.find(S.getKey());
-    std::string Truncated = truncateStringMiddle(S.getKey(), 28);
-    uint32_t J = cantFail(ST2.getIDForString(S.getKey()));
-    if (L == LS.end()) {
-      D.printExplicit(Truncated, DiffResult::DIFFERENT, "(not present)", J);
-      continue;
-    }
-
-    uint32_t I = cantFail(ST1.getIDForString(L->getKey()));
-    D.print<EquivalentDiffProvider>(Truncated, I, J);
-  }
-  return Error::success();
-}
-
-Error DiffStyle::diffFreePageMap() { return Error::success(); }
-
-Error DiffStyle::diffInfoStream() {
-  DiffPrinter D(2, "PDB Stream", 22, 40, opts::diff::PrintResultColumn,
-                opts::diff::PrintValueColumns, outs());
-  D.printExplicit("File", DiffResult::UNSPECIFIED,
-                  truncateStringFront(File1.getFilePath(), 38),
-                  truncateStringFront(File2.getFilePath(), 38));
-
-  auto ExpectedInfo1 = File1.getPDBInfoStream();
-  auto ExpectedInfo2 = File2.getPDBInfoStream();
-
-  bool Has1 = !!ExpectedInfo1;
-  bool Has2 = !!ExpectedInfo2;
-  if (!(Has1 && Has2)) {
-    std::string L = Has1 ? "(present)" : "(not present)";
-    std::string R = Has2 ? "(present)" : "(not present)";
-    D.print("Stream", L, R);
-
-    consumeError(ExpectedInfo1.takeError());
-    consumeError(ExpectedInfo2.takeError());
-    return Error::success();
-  }
-
-  auto &IS1 = *ExpectedInfo1;
-  auto &IS2 = *ExpectedInfo2;
-  D.print("Stream Size", IS1.getStreamSize(), IS2.getStreamSize());
-  D.print("Age", IS1.getAge(), IS2.getAge());
-  D.print("Guid", IS1.getGuid(), IS2.getGuid());
-  D.print("Signature", IS1.getSignature(), IS2.getSignature());
-  D.print("Version", IS1.getVersion(), IS2.getVersion());
-  D.diffUnorderedArray("Feature", IS1.getFeatureSignatures(),
-                       IS2.getFeatureSignatures());
-  D.print("Named Stream Size", IS1.getNamedStreamMapByteSize(),
-          IS2.getNamedStreamMapByteSize());
-  StringMap<uint32_t> NSL = IS1.getNamedStreams().getStringMap();
-  StringMap<uint32_t> NSR = IS2.getNamedStreams().getStringMap();
-  D.diffUnorderedMap<EquivalentDiffProvider>("Named Stream", NSL, NSR);
-  return Error::success();
-}
-
-static std::vector<std::pair<uint32_t, DbiModuleDescriptor>>
-getModuleDescriptors(const DbiModuleList &ML) {
-  std::vector<std::pair<uint32_t, DbiModuleDescriptor>> List;
-  List.reserve(ML.getModuleCount());
-  for (uint32_t I = 0; I < ML.getModuleCount(); ++I)
-    List.emplace_back(I, ML.getModuleDescriptor(I));
-  return List;
-}
-
-static void
-diffOneModule(DiffPrinter &D,
-              const std::pair<uint32_t, DbiModuleDescriptor> Item,
-              std::vector<std::pair<uint32_t, DbiModuleDescriptor>> &Other,
-              bool ItemIsRight) {
-  StreamPurposeProvider HeaderProvider(70);
-  std::pair<StreamPurpose, std::string> Header;
-  Header.first = StreamPurpose::ModuleStream;
-  Header.second = Item.second.getModuleName();
-  D.printFullRow(HeaderProvider.format(Header, ItemIsRight));
-
-  const auto *L = &Item;
-
-  BinaryPathProvider PathProvider(28);
-  auto Iter = llvm::find_if(
-      Other, [&PathProvider, ItemIsRight,
-              L](const std::pair<uint32_t, DbiModuleDescriptor> &Other) {
-        const auto *Left = L;
-        const auto *Right = &Other;
-        if (ItemIsRight)
-          std::swap(Left, Right);
-        DiffResult Result = PathProvider.compare(Left->second.getModuleName(),
-                                                 Right->second.getModuleName());
-        return Result == DiffResult::EQUIVALENT ||
-               Result == DiffResult::IDENTICAL;
-      });
-  if (Iter == Other.end()) {
-    // We didn't find this module at all on the other side.  Just print one row
-    // and continue.
-    D.print<ModiProvider>("- Modi", Item.first, None);
-    return;
-  }
-
-  // We did find this module.  Go through and compare each field.
-  const auto *R = &*Iter;
-  if (ItemIsRight)
-    std::swap(L, R);
-
-  D.print<ModiProvider>("- Modi", L->first, R->first);
-  D.print<BinaryPathProvider>("- Obj File Name", L->second.getObjFileName(),
-                              R->second.getObjFileName(), PathProvider);
-  D.print<StreamNumberProvider>("- Debug Stream",
-                                L->second.getModuleStreamIndex(),
-                                R->second.getModuleStreamIndex());
-  D.print("- C11 Byte Size", L->second.getC11LineInfoByteSize(),
-          R->second.getC11LineInfoByteSize());
-  D.print("- C13 Byte Size", L->second.getC13LineInfoByteSize(),
-          R->second.getC13LineInfoByteSize());
-  D.print("- # of files", L->second.getNumberOfFiles(),
-          R->second.getNumberOfFiles());
-  D.print("- Pdb File Path Index", L->second.getPdbFilePathNameIndex(),
-          R->second.getPdbFilePathNameIndex());
-  D.print("- Source File Name Index", L->second.getSourceFileNameIndex(),
-          R->second.getSourceFileNameIndex());
-  D.print("- Symbol Byte Size", L->second.getSymbolDebugInfoByteSize(),
-          R->second.getSymbolDebugInfoByteSize());
-  Other.erase(Iter);
-}
-
-Error DiffStyle::diffDbiStream() {
-  DiffPrinter D(2, "DBI Stream", 40, 30, opts::diff::PrintResultColumn,
-                opts::diff::PrintValueColumns, outs());
-  D.printExplicit("File", DiffResult::UNSPECIFIED,
-                  truncateStringFront(File1.getFilePath(), 28),
-                  truncateStringFront(File2.getFilePath(), 28));
-
-  auto ExpectedDbi1 = File1.getPDBDbiStream();
-  auto ExpectedDbi2 = File2.getPDBDbiStream();
-
-  bool Has1 = !!ExpectedDbi1;
-  bool Has2 = !!ExpectedDbi2;
-  if (!(Has1 && Has2)) {
-    std::string L = Has1 ? "(present)" : "(not present)";
-    std::string R = Has2 ? "(present)" : "(not present)";
-    D.print("Stream", L, R);
-
-    consumeError(ExpectedDbi1.takeError());
-    consumeError(ExpectedDbi2.takeError());
-    return Error::success();
-  }
-
-  auto &DL = *ExpectedDbi1;
-  auto &DR = *ExpectedDbi2;
-
-  D.print("Dbi Version", (uint32_t)DL.getDbiVersion(),
-          (uint32_t)DR.getDbiVersion());
-  D.print("Age", DL.getAge(), DR.getAge());
-  D.print("Machine", (uint16_t)DL.getMachineType(),
-          (uint16_t)DR.getMachineType());
-  D.print("Flags", DL.getFlags(), DR.getFlags());
-  D.print("Build Major", DL.getBuildMajorVersion(), DR.getBuildMajorVersion());
-  D.print("Build Minor", DL.getBuildMinorVersion(), DR.getBuildMinorVersion());
-  D.print("Build Number", DL.getBuildNumber(), DR.getBuildNumber());
-  D.print("PDB DLL Version", DL.getPdbDllVersion(), DR.getPdbDllVersion());
-  D.print("PDB DLL RBLD", DL.getPdbDllRbld(), DR.getPdbDllRbld());
-  D.print<StreamNumberProvider>("DBG (FPO)",
-                                DL.getDebugStreamIndex(DbgHeaderType::FPO),
-                                DR.getDebugStreamIndex(DbgHeaderType::FPO));
-  D.print<StreamNumberProvider>(
-      "DBG (Exception)", DL.getDebugStreamIndex(DbgHeaderType::Exception),
-      DR.getDebugStreamIndex(DbgHeaderType::Exception));
-  D.print<StreamNumberProvider>("DBG (Fixup)",
-                                DL.getDebugStreamIndex(DbgHeaderType::Fixup),
-                                DR.getDebugStreamIndex(DbgHeaderType::Fixup));
-  D.print<StreamNumberProvider>(
-      "DBG (OmapToSrc)", DL.getDebugStreamIndex(DbgHeaderType::OmapToSrc),
-      DR.getDebugStreamIndex(DbgHeaderType::OmapToSrc));
-  D.print<StreamNumberProvider>(
-      "DBG (OmapFromSrc)", DL.getDebugStreamIndex(DbgHeaderType::OmapFromSrc),
-      DR.getDebugStreamIndex(DbgHeaderType::OmapFromSrc));
-  D.print<StreamNumberProvider>(
-      "DBG (SectionHdr)", DL.getDebugStreamIndex(DbgHeaderType::SectionHdr),
-      DR.getDebugStreamIndex(DbgHeaderType::SectionHdr));
-  D.print<StreamNumberProvider>(
-      "DBG (TokenRidMap)", DL.getDebugStreamIndex(DbgHeaderType::TokenRidMap),
-      DR.getDebugStreamIndex(DbgHeaderType::TokenRidMap));
-  D.print<StreamNumberProvider>("DBG (Xdata)",
-                                DL.getDebugStreamIndex(DbgHeaderType::Xdata),
-                                DR.getDebugStreamIndex(DbgHeaderType::Xdata));
-  D.print<StreamNumberProvider>("DBG (Pdata)",
-                                DL.getDebugStreamIndex(DbgHeaderType::Pdata),
-                                DR.getDebugStreamIndex(DbgHeaderType::Pdata));
-  D.print<StreamNumberProvider>("DBG (NewFPO)",
-                                DL.getDebugStreamIndex(DbgHeaderType::NewFPO),
-                                DR.getDebugStreamIndex(DbgHeaderType::NewFPO));
-  D.print<StreamNumberProvider>(
-      "DBG (SectionHdrOrig)",
-      DL.getDebugStreamIndex(DbgHeaderType::SectionHdrOrig),
-      DR.getDebugStreamIndex(DbgHeaderType::SectionHdrOrig));
-  D.print<StreamNumberProvider>("Globals Stream",
-                                DL.getGlobalSymbolStreamIndex(),
-                                DR.getGlobalSymbolStreamIndex());
-  D.print<StreamNumberProvider>("Publics Stream",
-                                DL.getPublicSymbolStreamIndex(),
-                                DR.getPublicSymbolStreamIndex());
-  D.print<StreamNumberProvider>("Symbol Records", DL.getSymRecordStreamIndex(),
-                                DR.getSymRecordStreamIndex());
-  D.print("Has CTypes", DL.hasCTypes(), DR.hasCTypes());
-  D.print("Is Incrementally Linked", DL.isIncrementallyLinked(),
-          DR.isIncrementallyLinked());
-  D.print("Is Stripped", DL.isStripped(), DR.isStripped());
-  const DbiModuleList &ML = DL.modules();
-  const DbiModuleList &MR = DR.modules();
-  D.print("Module Count", ML.getModuleCount(), MR.getModuleCount());
-  D.print("Source File Count", ML.getSourceFileCount(),
-          MR.getSourceFileCount());
-  auto MDL = getModuleDescriptors(ML);
-  auto MDR = getModuleDescriptors(MR);
-  // Scan all module descriptors from the left, and look for corresponding
-  // module descriptors on the right.
-  for (const auto &L : MDL)
-    diffOneModule(D, L, MDR, false);
-
-  for (const auto &R : MDR)
-    diffOneModule(D, R, MDL, true);
-
-  return Error::success();
-}
-
-Error DiffStyle::diffSectionContribs() { return Error::success(); }
-
-Error DiffStyle::diffSectionMap() { return Error::success(); }
-
-Error DiffStyle::diffFpoStream() { return Error::success(); }
-
-Error DiffStyle::diffTpiStream(int Index) { return Error::success(); }
-
-Error DiffStyle::diffModuleInfoStream(int Index) { return Error::success(); }
-
-Error DiffStyle::diffPublics() { return Error::success(); }
-
-Error DiffStyle::diffGlobals() { return Error::success(); }
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/Diff.h b/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/Diff.h
deleted file mode 100644
index 6037576e21bb..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/Diff.h
+++ /dev/null
@@ -1,45 +0,0 @@
-//===- Diff.h - PDB diff utility --------------------------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TOOLS_LLVMPDBDUMP_DIFF_H
-#define LLVM_TOOLS_LLVMPDBDUMP_DIFF_H
-
-#include "OutputStyle.h"
-
-namespace llvm {
-namespace pdb {
-class PDBFile;
-class DiffStyle : public OutputStyle {
-public:
-  explicit DiffStyle(PDBFile &File1, PDBFile &File2);
-
-  Error dump() override;
-
-private:
-  Error diffSuperBlock();
-  Error diffStreamDirectory();
-  Error diffStringTable();
-  Error diffFreePageMap();
-  Error diffInfoStream();
-  Error diffDbiStream();
-  Error diffSectionContribs();
-  Error diffSectionMap();
-  Error diffFpoStream();
-  Error diffTpiStream(int Index);
-  Error diffModuleInfoStream(int Index);
-  Error diffPublics();
-  Error diffGlobals();
-
-  PDBFile &File1;
-  PDBFile &File2;
-};
-}
-}
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/DiffPrinter.cpp b/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/DiffPrinter.cpp
deleted file mode 100644
index dd61cc182593..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/DiffPrinter.cpp
+++ /dev/null
@@ -1,147 +0,0 @@
-
-#include "DiffPrinter.h"
-
-#include "llvm/Support/FormatAdapters.h"
-
-using namespace llvm;
-using namespace llvm::pdb;
-
-namespace {
-struct Colorize {
-  Colorize(raw_ostream &OS, DiffResult Result) : OS(OS) {
-    if (!OS.has_colors())
-      return;
-    switch (Result) {
-    case DiffResult::IDENTICAL:
-      OS.changeColor(raw_ostream::Colors::GREEN, false);
-      break;
-    case DiffResult::EQUIVALENT:
-      OS.changeColor(raw_ostream::Colors::YELLOW, true);
-      break;
-    default:
-      OS.changeColor(raw_ostream::Colors::RED, false);
-      break;
-    }
-  }
-
-  ~Colorize() {
-    if (OS.has_colors())
-      OS.resetColor();
-  }
-
-  raw_ostream &OS;
-};
-}
-
-DiffPrinter::DiffPrinter(uint32_t Indent, StringRef Header,
-                         uint32_t PropertyWidth, uint32_t FieldWidth,
-                         bool Result, bool Fields, raw_ostream &Stream)
-    : PrintResult(Result), PrintValues(Fields), Indent(Indent),
-      PropertyWidth(PropertyWidth), FieldWidth(FieldWidth), OS(Stream) {
-  printHeaderRow();
-  printFullRow(Header);
-}
-
-DiffPrinter::~DiffPrinter() {}
-
-uint32_t DiffPrinter::tableWidth() const {
-  // `|`
-  uint32_t W = 1;
-
-  // `<width>|`
-  W += PropertyWidth + 1;
-
-  if (PrintResult) {
-    // ` I |`
-    W += 4;
-  }
-
-  if (PrintValues) {
-    // `<width>|<width>|`
-    W += 2 * (FieldWidth + 1);
-  }
-  return W;
-}
-
-void DiffPrinter::printFullRow(StringRef Text) {
-  newLine();
-  printValue(Text, DiffResult::UNSPECIFIED, AlignStyle::Center,
-             tableWidth() - 2, true);
-  printSeparatorRow();
-}
-
-void DiffPrinter::printSeparatorRow() {
-  newLine();
-  OS << formatv("{0}", fmt_repeat('-', PropertyWidth));
-  if (PrintResult) {
-    OS << '+';
-    OS << formatv("{0}", fmt_repeat('-', 3));
-  }
-  if (PrintValues) {
-    OS << '+';
-    OS << formatv("{0}", fmt_repeat('-', FieldWidth));
-    OS << '+';
-    OS << formatv("{0}", fmt_repeat('-', FieldWidth));
-  }
-  OS << '|';
-}
-
-void DiffPrinter::printHeaderRow() {
-  newLine('-');
-  OS << formatv("{0}", fmt_repeat('-', tableWidth() - 1));
-}
-
-void DiffPrinter::newLine(char InitialChar) {
-  OS << "\n";
-  OS.indent(Indent) << InitialChar;
-}
-
-void DiffPrinter::printExplicit(StringRef Property, DiffResult C,
-                                StringRef Left, StringRef Right) {
-  newLine();
-  printValue(Property, DiffResult::UNSPECIFIED, AlignStyle::Right,
-             PropertyWidth, true);
-  printResult(C);
-  printValue(Left, C, AlignStyle::Center, FieldWidth, false);
-  printValue(Right, C, AlignStyle::Center, FieldWidth, false);
-  printSeparatorRow();
-}
-
-void DiffPrinter::printResult(DiffResult Result) {
-  if (!PrintResult)
-    return;
-  switch (Result) {
-  case DiffResult::DIFFERENT:
-    printValue("D", Result, AlignStyle::Center, 3, true);
-    break;
-  case DiffResult::EQUIVALENT:
-    printValue("E", Result, AlignStyle::Center, 3, true);
-    break;
-  case DiffResult::IDENTICAL:
-    printValue("I", Result, AlignStyle::Center, 3, true);
-    break;
-  case DiffResult::UNSPECIFIED:
-    printValue(" ", Result, AlignStyle::Center, 3, true);
-    break;
-  }
-}
-
-void DiffPrinter::printValue(StringRef Value, DiffResult C, AlignStyle Style,
-                             uint32_t Width, bool Force) {
-  if (!Force && !PrintValues)
-    return;
-
-  if (Style == AlignStyle::Right)
-    --Width;
-
-  std::string FormattedItem =
-      formatv("{0}", fmt_align(Value, Style, Width)).str();
-  if (C != DiffResult::UNSPECIFIED) {
-    Colorize Color(OS, C);
-    OS << FormattedItem;
-  } else
-    OS << FormattedItem;
-  if (Style == AlignStyle::Right)
-    OS << ' ';
-  OS << '|';
-}
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/DiffPrinter.h b/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/DiffPrinter.h
deleted file mode 100644
index 475747d8dc11..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/DiffPrinter.h
+++ /dev/null
@@ -1,172 +0,0 @@
-//===- DiffPrinter.h ------------------------------------------ *- C++ --*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TOOLS_LLVMPDBDUMP_DIFFPRINTER_H
-#define LLVM_TOOLS_LLVMPDBDUMP_DIFFPRINTER_H
-
-#include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/StringMap.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
-#include "llvm/Support/FormatVariadic.h"
-#include "llvm/Support/raw_ostream.h"
-
-#include <list>
-#include <unordered_set>
-
-namespace std {
-template <> struct hash<llvm::pdb::PdbRaw_FeatureSig> {
-  typedef llvm::pdb::PdbRaw_FeatureSig argument_type;
-  typedef std::size_t result_type;
-  result_type operator()(argument_type Item) const {
-    return std::hash<uint32_t>{}(uint32_t(Item));
-  }
-};
-} // namespace std
-
-namespace llvm {
-namespace pdb {
-
-class PDBFile;
-
-enum class DiffResult { UNSPECIFIED, IDENTICAL, EQUIVALENT, DIFFERENT };
-
-struct IdenticalDiffProvider {
-  template <typename T, typename U>
-  DiffResult compare(const T &Left, const U &Right) {
-    return (Left == Right) ? DiffResult::IDENTICAL : DiffResult::DIFFERENT;
-  }
-
-  template <typename T> std::string format(const T &Item, bool Right) {
-    return formatv("{0}", Item).str();
-  }
-};
-
-struct EquivalentDiffProvider {
-  template <typename T, typename U>
-  DiffResult compare(const T &Left, const U &Right) {
-    return (Left == Right) ? DiffResult::IDENTICAL : DiffResult::EQUIVALENT;
-  }
-
-  template <typename T> std::string format(const T &Item, bool Right) {
-    return formatv("{0}", Item).str();
-  }
-};
-
-class DiffPrinter {
-public:
-  DiffPrinter(uint32_t Indent, StringRef Header, uint32_t PropertyWidth,
-              uint32_t FieldWidth, bool Result, bool Values,
-              raw_ostream &Stream);
-  ~DiffPrinter();
-
-  template <typename T, typename U> struct Identical {};
-
-  template <typename Provider = IdenticalDiffProvider, typename T, typename U>
-  void print(StringRef Property, const T &Left, const U &Right,
-             Provider P = Provider()) {
-    std::string L = P.format(Left, false);
-    std::string R = P.format(Right, true);
-
-    DiffResult Result = P.compare(Left, Right);
-    printExplicit(Property, Result, L, R);
-  }
-
-  void printExplicit(StringRef Property, DiffResult C, StringRef Left,
-                     StringRef Right);
-
-  template <typename T, typename U>
-  void printExplicit(StringRef Property, DiffResult C, const T &Left,
-                     const U &Right) {
-    std::string L = formatv("{0}", Left).str();
-    std::string R = formatv("{0}", Right).str();
-    printExplicit(Property, C, StringRef(L), StringRef(R));
-  }
-
-  template <typename T, typename U>
-  void diffUnorderedArray(StringRef Property, ArrayRef<T> Left,
-                          ArrayRef<U> Right) {
-    std::unordered_set<T> LS(Left.begin(), Left.end());
-    std::unordered_set<U> RS(Right.begin(), Right.end());
-    std::string Count1 = formatv("{0} element(s)", Left.size());
-    std::string Count2 = formatv("{0} element(s)", Right.size());
-    print(std::string(Property) + "s (set)", Count1, Count2);
-    for (const auto &L : LS) {
-      auto Iter = RS.find(L);
-      std::string Text = formatv("{0}", L).str();
-      if (Iter == RS.end()) {
-        print(Property, Text, "(not present)");
-        continue;
-      }
-      print(Property, Text, Text);
-      RS.erase(Iter);
-    }
-    for (const auto &R : RS) {
-      auto Iter = LS.find(R);
-      std::string Text = formatv("{0}", R).str();
-      if (Iter == LS.end()) {
-        print(Property, "(not present)", Text);
-        continue;
-      }
-      print(Property, Text, Text);
-    }
-  }
-
-  template <typename ValueProvider = IdenticalDiffProvider, typename T,
-            typename U>
-  void diffUnorderedMap(StringRef Property, const StringMap<T> &Left,
-                        const StringMap<U> &Right,
-                        ValueProvider P = ValueProvider()) {
-    StringMap<U> RightCopy(Right);
-
-    std::string Count1 = formatv("{0} element(s)", Left.size());
-    std::string Count2 = formatv("{0} element(s)", Right.size());
-    print(std::string(Property) + "s (map)", Count1, Count2);
-
-    for (const auto &L : Left) {
-      auto Iter = RightCopy.find(L.getKey());
-      if (Iter == RightCopy.end()) {
-        printExplicit(L.getKey(), DiffResult::DIFFERENT, L.getValue(),
-                      "(not present)");
-        continue;
-      }
-
-      print(L.getKey(), L.getValue(), Iter->getValue(), P);
-      RightCopy.erase(Iter);
-    }
-
-    for (const auto &R : RightCopy) {
-      printExplicit(R.getKey(), DiffResult::DIFFERENT, "(not present)",
-                    R.getValue());
-    }
-  }
-
-  void printFullRow(StringRef Text);
-
-private:
-  uint32_t tableWidth() const;
-
-  void printHeaderRow();
-  void printSeparatorRow();
-  void newLine(char InitialChar = '|');
-  void printValue(StringRef Value, DiffResult C, AlignStyle Style,
-                  uint32_t Width, bool Force);
-  void printResult(DiffResult Result);
-
-  bool PrintResult;
-  bool PrintValues;
-  uint32_t Indent;
-  uint32_t PropertyWidth;
-  uint32_t FieldWidth;
-  raw_ostream &OS;
-};
-} // namespace pdb
-} // namespace llvm
-
-#endif
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/fuzzer/CMakeLists.txt b/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/fuzzer/CMakeLists.txt
deleted file mode 100644
index 6af00476577f..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/fuzzer/CMakeLists.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-set(LLVM_LINK_COMPONENTS
-  DebugInfoCodeView
-  DebugInfoPDB
-  Object
-  Support
-  )
-
-add_llvm_executable(llvm-pdbutil-fuzzer
-  EXCLUDE_FROM_ALL
-  llvm-pdbutil-fuzzer.cpp
-  )
-
-target_link_libraries(llvm-pdbutil-fuzzer
-  LLVMFuzzer
-  )
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/fuzzer/llvm-pdbutil-fuzzer.cpp b/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/fuzzer/llvm-pdbutil-fuzzer.cpp
deleted file mode 100644
index 4edb53e261ff..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-pdbutil/fuzzer/llvm-pdbutil-fuzzer.cpp
+++ /dev/null
@@ -1,105 +0,0 @@
-//===-- llvm-pdbutil-fuzzer.cpp - Fuzz the llvm-pdbutil tool --------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-///
-/// \file
-/// \brief This file implements a function that runs llvm-pdbutil
-///  on a single input. This function is then linked into the Fuzzer library.
-///
-//===----------------------------------------------------------------------===//
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/DebugInfo/CodeView/BinaryByteStream.h"
-#include "llvm/DebugInfo/CodeView/SymbolDumper.h"
-#include "llvm/DebugInfo/CodeView/TypeDumper.h"
-#include "llvm/DebugInfo/PDB/Raw/DbiStream.h"
-#include "llvm/DebugInfo/PDB/Raw/IPDBStreamData.h"
-#include "llvm/DebugInfo/PDB/Raw/MappedBlockStream.h"
-#include "llvm/DebugInfo/PDB/Raw/ModuleDebugStream.h"
-#include "llvm/DebugInfo/PDB/Raw/PDBFile.h"
-#include "llvm/DebugInfo/PDB/Raw/RawSession.h"
-#include "llvm/Support/MemoryBuffer.h"
-#include "llvm/Support/ScopedPrinter.h"
-
-using namespace llvm;
-
-namespace {
-// We need a class which behaves like an immutable BinaryByteStream, but whose
-// data
-// is backed by an llvm::MemoryBuffer.  It also needs to own the underlying
-// MemoryBuffer, so this simple adapter is a good way to achieve that.
-class InputByteStream : public codeview::BinaryByteStream<false> {
-public:
-  explicit InputByteStream(std::unique_ptr<MemoryBuffer> Buffer)
-      : BinaryByteStream(ArrayRef<uint8_t>(Buffer->getBuffer().bytes_begin(),
-                                           Buffer->getBuffer().bytes_end())),
-        MemBuffer(std::move(Buffer)) {}
-
-  std::unique_ptr<MemoryBuffer> MemBuffer;
-};
-}
-
-extern "C" int LLVMFuzzerTestOneInput(uint8_t *data, size_t size) {
-  std::unique_ptr<MemoryBuffer> Buff = MemoryBuffer::getMemBuffer(
-      StringRef((const char *)data, size), "", false);
-
-  ScopedPrinter P(nulls());
-  codeview::CVTypeDumper TD(&P, false);
-
-  auto InputStream = llvm::make_unique<InputByteStream>(std::move(Buff));
-  std::unique_ptr<pdb::PDBFile> File(new pdb::PDBFile(std::move(InputStream)));
-  if (auto E = File->parseFileHeaders()) {
-    consumeError(std::move(E));
-    return 0;
-  }
-  if (auto E = File->parseStreamData()) {
-    consumeError(std::move(E));
-    return 0;
-  }
-
-  auto DbiS = File->getPDBDbiStream();
-  if (auto E = DbiS.takeError()) {
-    consumeError(std::move(E));
-    return 0;
-  }
-  auto TpiS = File->getPDBTpiStream();
-  if (auto E = TpiS.takeError()) {
-    consumeError(std::move(E));
-    return 0;
-  }
-  auto IpiS = File->getPDBIpiStream();
-  if (auto E = IpiS.takeError()) {
-    consumeError(std::move(E));
-    return 0;
-  }
-  auto InfoS = File->getPDBInfoStream();
-  if (auto E = InfoS.takeError()) {
-    consumeError(std::move(E));
-    return 0;
-  }
-  pdb::DbiStream &DS = DbiS.get();
-
-  for (auto &Modi : DS.modules()) {
-    auto ModStreamData = pdb::MappedBlockStream::createIndexedStream(
-        Modi.Info.getModuleStreamIndex(), *File, File->getAllocator());
-    if (!ModStreamData) {
-      consumeError(ModStreamData.takeError());
-      return 0;
-    }
-    pdb::ModuleDebugStreamRef ModS(Modi.Info, std::move(*ModStreamData));
-    if (auto E = ModS.reload()) {
-      consumeError(std::move(E));
-      return 0;
-    }
-    codeview::CVSymbolDumper SD(P, TD, nullptr, false);
-    bool HadError = false;
-    for (auto &S : ModS.symbols(&HadError)) {
-      SD.dump(S);
-    }
-  }
-  return 0;
-}
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/func-id-helper.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/func-id-helper.cc
deleted file mode 100644
index 3234010695b2..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/func-id-helper.cc
+++ /dev/null
@@ -1,60 +0,0 @@
-//===- xray-fc-account.cc - XRay Function Call Accounting Tool ------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Implementation of the helper tools dealing with XRay-generated function ids.
-//
-//===----------------------------------------------------------------------===//
-
-#include "func-id-helper.h"
-#include "llvm/Support/Path.h"
-#include <sstream>
-
-using namespace llvm;
-using namespace xray;
-
-std::string FuncIdConversionHelper::SymbolOrNumber(int32_t FuncId) const {
-  std::ostringstream F;
-  auto It = FunctionAddresses.find(FuncId);
-  if (It == FunctionAddresses.end()) {
-    F << "#" << FuncId;
-    return F.str();
-  }
-
-  if (auto ResOrErr = Symbolizer.symbolizeCode(BinaryInstrMap, It->second)) {
-    auto &DI = *ResOrErr;
-    if (DI.FunctionName == "<invalid>")
-      F << "@(" << std::hex << It->second << ")";
-    else
-      F << DI.FunctionName;
-  } else
-    handleAllErrors(ResOrErr.takeError(), [&](const ErrorInfoBase &) {
-      F << "@(" << std::hex << It->second << ")";
-    });
-
-  return F.str();
-}
-
-std::string FuncIdConversionHelper::FileLineAndColumn(int32_t FuncId) const {
-  auto It = FunctionAddresses.find(FuncId);
-  if (It == FunctionAddresses.end())
-    return "(unknown)";
-
-  std::ostringstream F;
-  auto ResOrErr = Symbolizer.symbolizeCode(BinaryInstrMap, It->second);
-  if (!ResOrErr) {
-    consumeError(ResOrErr.takeError());
-    return "(unknown)";
-  }
-
-  auto &DI = *ResOrErr;
-  F << sys::path::filename(DI.FileName).str() << ":" << DI.Line << ":"
-    << DI.Column;
-
-  return F.str();
-}
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/llvm-xray.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/llvm-xray.cc
deleted file mode 100644
index 98303e7be15c..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/llvm-xray.cc
+++ /dev/null
@@ -1,49 +0,0 @@
-//===- llvm-xray.cc - XRay Tool Main Program ------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements the main entry point for the suite of XRay tools. All
-// additional functionality are implemented as subcommands.
-//
-//===----------------------------------------------------------------------===//
-//
-// Basic usage:
-//
-//   llvm-xray [options] <subcommand> [subcommand-specific options]
-//
-#include "xray-registry.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/FileSystem.h"
-#include "llvm/Support/raw_ostream.h"
-
-using namespace llvm;
-using namespace llvm::xray;
-
-int main(int argc, char *argv[]) {
-  cl::ParseCommandLineOptions(argc, argv,
-                              "XRay Tools\n\n"
-                              "  This program consolidates multiple XRay trace "
-                              "processing tools for convenient access.\n");
-  for (auto *SC : cl::getRegisteredSubcommands()) {
-    if (*SC) {
-      // If no subcommand was provided, we need to explicitly check if this is
-      // the top-level subcommand.
-      if (SC == &*cl::TopLevelSubCommand) {
-        cl::PrintHelpMessage(false, true);
-        return 0;
-      }
-      if (auto C = dispatch(SC)) {
-        ExitOnError("llvm-xray: ")(C());
-        return 0;
-      }
-    }
-  }
-
-  // If all else fails, we still print the usage message.
-  cl::PrintHelpMessage(false, true);
-}
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-account.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-account.cc
deleted file mode 100644
index 13654c3911f7..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-account.cc
+++ /dev/null
@@ -1,471 +0,0 @@
-//===- xray-account.h - XRay Function Call Accounting ---------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements basic function call accounting from an XRay trace.
-//
-//===----------------------------------------------------------------------===//
-
-#include <algorithm>
-#include <cassert>
-#include <numeric>
-#include <system_error>
-#include <utility>
-
-#include "xray-account.h"
-#include "xray-registry.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/FormatVariadic.h"
-#include "llvm/XRay/InstrumentationMap.h"
-#include "llvm/XRay/Trace.h"
-
-using namespace llvm;
-using namespace llvm::xray;
-
-static cl::SubCommand Account("account", "Function call accounting");
-static cl::opt<std::string> AccountInput(cl::Positional,
-                                         cl::desc("<xray log file>"),
-                                         cl::Required, cl::sub(Account));
-static cl::opt<bool>
-    AccountKeepGoing("keep-going", cl::desc("Keep going on errors encountered"),
-                     cl::sub(Account), cl::init(false));
-static cl::alias AccountKeepGoing2("k", cl::aliasopt(AccountKeepGoing),
-                                   cl::desc("Alias for -keep_going"),
-                                   cl::sub(Account));
-static cl::opt<bool> AccountDeduceSiblingCalls(
-    "deduce-sibling-calls",
-    cl::desc("Deduce sibling calls when unrolling function call stacks"),
-    cl::sub(Account), cl::init(false));
-static cl::alias
-    AccountDeduceSiblingCalls2("d", cl::aliasopt(AccountDeduceSiblingCalls),
-                               cl::desc("Alias for -deduce_sibling_calls"),
-                               cl::sub(Account));
-static cl::opt<std::string>
-    AccountOutput("output", cl::value_desc("output file"), cl::init("-"),
-                  cl::desc("output file; use '-' for stdout"),
-                  cl::sub(Account));
-static cl::alias AccountOutput2("o", cl::aliasopt(AccountOutput),
-                                cl::desc("Alias for -output"),
-                                cl::sub(Account));
-enum class AccountOutputFormats { TEXT, CSV };
-static cl::opt<AccountOutputFormats>
-    AccountOutputFormat("format", cl::desc("output format"),
-                        cl::values(clEnumValN(AccountOutputFormats::TEXT,
-                                              "text", "report stats in text"),
-                                   clEnumValN(AccountOutputFormats::CSV, "csv",
-                                              "report stats in csv")),
-                        cl::sub(Account));
-static cl::alias AccountOutputFormat2("f", cl::desc("Alias of -format"),
-                                      cl::aliasopt(AccountOutputFormat),
-                                      cl::sub(Account));
-
-enum class SortField {
-  FUNCID,
-  COUNT,
-  MIN,
-  MED,
-  PCT90,
-  PCT99,
-  MAX,
-  SUM,
-  FUNC,
-};
-
-static cl::opt<SortField> AccountSortOutput(
-    "sort", cl::desc("sort output by this field"), cl::value_desc("field"),
-    cl::sub(Account), cl::init(SortField::FUNCID),
-    cl::values(clEnumValN(SortField::FUNCID, "funcid", "function id"),
-               clEnumValN(SortField::COUNT, "count", "funciton call counts"),
-               clEnumValN(SortField::MIN, "min", "minimum function durations"),
-               clEnumValN(SortField::MED, "med", "median function durations"),
-               clEnumValN(SortField::PCT90, "90p", "90th percentile durations"),
-               clEnumValN(SortField::PCT99, "99p", "99th percentile durations"),
-               clEnumValN(SortField::MAX, "max", "maximum function durations"),
-               clEnumValN(SortField::SUM, "sum", "sum of call durations"),
-               clEnumValN(SortField::FUNC, "func", "function names")));
-static cl::alias AccountSortOutput2("s", cl::aliasopt(AccountSortOutput),
-                                    cl::desc("Alias for -sort"),
-                                    cl::sub(Account));
-
-enum class SortDirection {
-  ASCENDING,
-  DESCENDING,
-};
-static cl::opt<SortDirection> AccountSortOrder(
-    "sortorder", cl::desc("sort ordering"), cl::init(SortDirection::ASCENDING),
-    cl::values(clEnumValN(SortDirection::ASCENDING, "asc", "ascending"),
-               clEnumValN(SortDirection::DESCENDING, "dsc", "descending")),
-    cl::sub(Account));
-static cl::alias AccountSortOrder2("r", cl::aliasopt(AccountSortOrder),
-                                   cl::desc("Alias for -sortorder"),
-                                   cl::sub(Account));
-
-static cl::opt<int> AccountTop("top", cl::desc("only show the top N results"),
-                               cl::value_desc("N"), cl::sub(Account),
-                               cl::init(-1));
-static cl::alias AccountTop2("p", cl::desc("Alias for -top"),
-                             cl::aliasopt(AccountTop), cl::sub(Account));
-
-static cl::opt<std::string>
-    AccountInstrMap("instr_map",
-                    cl::desc("binary with the instrumentation map, or "
-                             "a separate instrumentation map"),
-                    cl::value_desc("binary with xray_instr_map"),
-                    cl::sub(Account), cl::init(""));
-static cl::alias AccountInstrMap2("m", cl::aliasopt(AccountInstrMap),
-                                  cl::desc("Alias for -instr_map"),
-                                  cl::sub(Account));
-
-namespace {
-
-template <class T, class U> void setMinMax(std::pair<T, T> &MM, U &&V) {
-  if (MM.first == 0 || MM.second == 0)
-    MM = std::make_pair(std::forward<U>(V), std::forward<U>(V));
-  else
-    MM = std::make_pair(std::min(MM.first, V), std::max(MM.second, V));
-}
-
-template <class T> T diff(T L, T R) { return std::max(L, R) - std::min(L, R); }
-
-} // namespace
-
-bool LatencyAccountant::accountRecord(const XRayRecord &Record) {
-  setMinMax(PerThreadMinMaxTSC[Record.TId], Record.TSC);
-  setMinMax(PerCPUMinMaxTSC[Record.CPU], Record.TSC);
-
-  if (CurrentMaxTSC == 0)
-    CurrentMaxTSC = Record.TSC;
-
-  if (Record.TSC < CurrentMaxTSC)
-    return false;
-
-  auto &ThreadStack = PerThreadFunctionStack[Record.TId];
-  switch (Record.Type) {
-  case RecordTypes::ENTER: {
-    // Function Enter
-    ThreadStack.emplace_back(Record.FuncId, Record.TSC);
-    break;
-  }
-  case RecordTypes::EXIT: {
-    // Function Exit
-    if (ThreadStack.back().first == Record.FuncId) {
-      const auto &Top = ThreadStack.back();
-      recordLatency(Top.first, diff(Top.second, Record.TSC));
-      ThreadStack.pop_back();
-      break;
-    }
-
-    if (!DeduceSiblingCalls)
-      return false;
-
-    // Look for the parent up the stack.
-    auto Parent =
-        std::find_if(ThreadStack.rbegin(), ThreadStack.rend(),
-                     [&](const std::pair<const int32_t, uint64_t> &E) {
-                       return E.first == Record.FuncId;
-                     });
-    if (Parent == ThreadStack.rend())
-      return false;
-
-    // Account time for this apparently sibling call exit up the stack.
-    // Considering the following case:
-    //
-    //   f()
-    //    g()
-    //      h()
-    //
-    // We might only ever see the following entries:
-    //
-    //   -> f()
-    //   -> g()
-    //   -> h()
-    //   <- h()
-    //   <- f()
-    //
-    // Now we don't see the exit to g() because some older version of the XRay
-    // runtime wasn't instrumenting tail exits. If we don't deduce tail calls,
-    // we may potentially never account time for g() -- and this code would have
-    // already bailed out, because `<- f()` doesn't match the current "top" of
-    // stack where we're waiting for the exit to `g()` instead. This is not
-    // ideal and brittle -- so instead we provide a potentially inaccurate
-    // accounting of g() instead, computing it from the exit of f().
-    //
-    // While it might be better that we account the time between `-> g()` and
-    // `-> h()` as the proper accounting of time for g() here, this introduces
-    // complexity to do correctly (need to backtrack, etc.).
-    //
-    // FIXME: Potentially implement the more complex deduction algorithm?
-    auto I = std::next(Parent).base();
-    for (auto &E : make_range(I, ThreadStack.end())) {
-      recordLatency(E.first, diff(E.second, Record.TSC));
-    }
-    ThreadStack.erase(I, ThreadStack.end());
-    break;
-  }
-  }
-
-  return true;
-}
-
-namespace {
-
-// We consolidate the data into a struct which we can output in various forms.
-struct ResultRow {
-  uint64_t Count;
-  double Min;
-  double Median;
-  double Pct90;
-  double Pct99;
-  double Max;
-  double Sum;
-  std::string DebugInfo;
-  std::string Function;
-};
-
-ResultRow getStats(std::vector<uint64_t> &Timings) {
-  assert(!Timings.empty());
-  ResultRow R;
-  R.Sum = std::accumulate(Timings.begin(), Timings.end(), 0.0);
-  auto MinMax = std::minmax_element(Timings.begin(), Timings.end());
-  R.Min = *MinMax.first;
-  R.Max = *MinMax.second;
-  auto MedianOff = Timings.size() / 2;
-  std::nth_element(Timings.begin(), Timings.begin() + MedianOff, Timings.end());
-  R.Median = Timings[MedianOff];
-  auto Pct90Off = std::floor(Timings.size() * 0.9);
-  std::nth_element(Timings.begin(), Timings.begin() + Pct90Off, Timings.end());
-  R.Pct90 = Timings[Pct90Off];
-  auto Pct99Off = std::floor(Timings.size() * 0.99);
-  std::nth_element(Timings.begin(), Timings.begin() + Pct90Off, Timings.end());
-  R.Pct99 = Timings[Pct99Off];
-  R.Count = Timings.size();
-  return R;
-}
-
-} // namespace
-
-template <class F>
-void LatencyAccountant::exportStats(const XRayFileHeader &Header, F Fn) const {
-  using TupleType = std::tuple<int32_t, uint64_t, ResultRow>;
-  std::vector<TupleType> Results;
-  Results.reserve(FunctionLatencies.size());
-  for (auto FT : FunctionLatencies) {
-    const auto &FuncId = FT.first;
-    auto &Timings = FT.second;
-    Results.emplace_back(FuncId, Timings.size(), getStats(Timings));
-    auto &Row = std::get<2>(Results.back());
-    if (Header.CycleFrequency) {
-      double CycleFrequency = Header.CycleFrequency;
-      Row.Min /= CycleFrequency;
-      Row.Median /= CycleFrequency;
-      Row.Pct90 /= CycleFrequency;
-      Row.Pct99 /= CycleFrequency;
-      Row.Max /= CycleFrequency;
-      Row.Sum /= CycleFrequency;
-    }
-
-    Row.Function = FuncIdHelper.SymbolOrNumber(FuncId);
-    Row.DebugInfo = FuncIdHelper.FileLineAndColumn(FuncId);
-  }
-
-  // Sort the data according to user-provided flags.
-  switch (AccountSortOutput) {
-  case SortField::FUNCID:
-    std::sort(Results.begin(), Results.end(),
-              [](const TupleType &L, const TupleType &R) {
-                if (AccountSortOrder == SortDirection::ASCENDING)
-                  return std::get<0>(L) < std::get<0>(R);
-                if (AccountSortOrder == SortDirection::DESCENDING)
-                  return std::get<0>(L) > std::get<0>(R);
-                llvm_unreachable("Unknown sort direction");
-              });
-    break;
-  case SortField::COUNT:
-    std::sort(Results.begin(), Results.end(),
-              [](const TupleType &L, const TupleType &R) {
-                if (AccountSortOrder == SortDirection::ASCENDING)
-                  return std::get<1>(L) < std::get<1>(R);
-                if (AccountSortOrder == SortDirection::DESCENDING)
-                  return std::get<1>(L) > std::get<1>(R);
-                llvm_unreachable("Unknown sort direction");
-              });
-    break;
-  default:
-    // Here we need to look into the ResultRow for the rest of the data that
-    // we want to sort by.
-    std::sort(Results.begin(), Results.end(),
-              [&](const TupleType &L, const TupleType &R) {
-                auto &LR = std::get<2>(L);
-                auto &RR = std::get<2>(R);
-                switch (AccountSortOutput) {
-                case SortField::COUNT:
-                  if (AccountSortOrder == SortDirection::ASCENDING)
-                    return LR.Count < RR.Count;
-                  if (AccountSortOrder == SortDirection::DESCENDING)
-                    return LR.Count > RR.Count;
-                  llvm_unreachable("Unknown sort direction");
-                case SortField::MIN:
-                  if (AccountSortOrder == SortDirection::ASCENDING)
-                    return LR.Min < RR.Min;
-                  if (AccountSortOrder == SortDirection::DESCENDING)
-                    return LR.Min > RR.Min;
-                  llvm_unreachable("Unknown sort direction");
-                case SortField::MED:
-                  if (AccountSortOrder == SortDirection::ASCENDING)
-                    return LR.Median < RR.Median;
-                  if (AccountSortOrder == SortDirection::DESCENDING)
-                    return LR.Median > RR.Median;
-                  llvm_unreachable("Unknown sort direction");
-                case SortField::PCT90:
-                  if (AccountSortOrder == SortDirection::ASCENDING)
-                    return LR.Pct90 < RR.Pct90;
-                  if (AccountSortOrder == SortDirection::DESCENDING)
-                    return LR.Pct90 > RR.Pct90;
-                  llvm_unreachable("Unknown sort direction");
-                case SortField::PCT99:
-                  if (AccountSortOrder == SortDirection::ASCENDING)
-                    return LR.Pct99 < RR.Pct99;
-                  if (AccountSortOrder == SortDirection::DESCENDING)
-                    return LR.Pct99 > RR.Pct99;
-                  llvm_unreachable("Unknown sort direction");
-                case SortField::MAX:
-                  if (AccountSortOrder == SortDirection::ASCENDING)
-                    return LR.Max < RR.Max;
-                  if (AccountSortOrder == SortDirection::DESCENDING)
-                    return LR.Max > RR.Max;
-                  llvm_unreachable("Unknown sort direction");
-                case SortField::SUM:
-                  if (AccountSortOrder == SortDirection::ASCENDING)
-                    return LR.Sum < RR.Sum;
-                  if (AccountSortOrder == SortDirection::DESCENDING)
-                    return LR.Sum > RR.Sum;
-                  llvm_unreachable("Unknown sort direction");
-                default:
-                  llvm_unreachable("Unsupported sort order");
-                }
-              });
-    break;
-  }
-
-  if (AccountTop > 0)
-    Results.erase(Results.begin() + AccountTop.getValue(), Results.end());
-
-  for (const auto &R : Results)
-    Fn(std::get<0>(R), std::get<1>(R), std::get<2>(R));
-}
-
-void LatencyAccountant::exportStatsAsText(raw_ostream &OS,
-                                          const XRayFileHeader &Header) const {
-  OS << "Functions with latencies: " << FunctionLatencies.size() << "\n";
-
-  // We spend some effort to make the text output more readable, so we do the
-  // following formatting decisions for each of the fields:
-  //
-  //   - funcid: 32-bit, but we can determine the largest number and be
-  //   between
-  //     a minimum of 5 characters, up to 9 characters, right aligned.
-  //   - count:  64-bit, but we can determine the largest number and be
-  //   between
-  //     a minimum of 5 characters, up to 9 characters, right aligned.
-  //   - min, median, 90pct, 99pct, max: double precision, but we want to keep
-  //     the values in seconds, with microsecond precision (0.000'001), so we
-  //     have at most 6 significant digits, with the whole number part to be
-  //     at
-  //     least 1 character. For readability we'll right-align, with full 9
-  //     characters each.
-  //   - debug info, function name: we format this as a concatenation of the
-  //     debug info and the function name.
-  //
-  static constexpr char StatsHeaderFormat[] =
-      "{0,+9} {1,+10} [{2,+9}, {3,+9}, {4,+9}, {5,+9}, {6,+9}] {7,+9}";
-  static constexpr char StatsFormat[] =
-      R"({0,+9} {1,+10} [{2,+9:f6}, {3,+9:f6}, {4,+9:f6}, {5,+9:f6}, {6,+9:f6}] {7,+9:f6})";
-  OS << llvm::formatv(StatsHeaderFormat, "funcid", "count", "min", "med", "90p",
-                      "99p", "max", "sum")
-     << llvm::formatv("  {0,-12}\n", "function");
-  exportStats(Header, [&](int32_t FuncId, size_t Count, const ResultRow &Row) {
-    OS << llvm::formatv(StatsFormat, FuncId, Count, Row.Min, Row.Median,
-                        Row.Pct90, Row.Pct99, Row.Max, Row.Sum)
-       << "  " << Row.DebugInfo << ": " << Row.Function << "\n";
-  });
-}
-
-void LatencyAccountant::exportStatsAsCSV(raw_ostream &OS,
-                                         const XRayFileHeader &Header) const {
-  OS << "funcid,count,min,median,90%ile,99%ile,max,sum,debug,function\n";
-  exportStats(Header, [&](int32_t FuncId, size_t Count, const ResultRow &Row) {
-    OS << FuncId << ',' << Count << ',' << Row.Min << ',' << Row.Median << ','
-       << Row.Pct90 << ',' << Row.Pct99 << ',' << Row.Max << "," << Row.Sum
-       << ",\"" << Row.DebugInfo << "\",\"" << Row.Function << "\"\n";
-  });
-}
-
-using namespace llvm::xray;
-
-static CommandRegistration Unused(&Account, []() -> Error {
-  InstrumentationMap Map;
-  if (!AccountInstrMap.empty()) {
-    auto InstrumentationMapOrError = loadInstrumentationMap(AccountInstrMap);
-    if (!InstrumentationMapOrError)
-      return joinErrors(make_error<StringError>(
-                            Twine("Cannot open instrumentation map '") +
-                                AccountInstrMap + "'",
-                            std::make_error_code(std::errc::invalid_argument)),
-                        InstrumentationMapOrError.takeError());
-    Map = std::move(*InstrumentationMapOrError);
-  }
-
-  std::error_code EC;
-  raw_fd_ostream OS(AccountOutput, EC, sys::fs::OpenFlags::F_Text);
-  if (EC)
-    return make_error<StringError>(
-        Twine("Cannot open file '") + AccountOutput + "' for writing.", EC);
-
-  const auto &FunctionAddresses = Map.getFunctionAddresses();
-  symbolize::LLVMSymbolizer::Options Opts(
-      symbolize::FunctionNameKind::LinkageName, true, true, false, "");
-  symbolize::LLVMSymbolizer Symbolizer(Opts);
-  llvm::xray::FuncIdConversionHelper FuncIdHelper(AccountInstrMap, Symbolizer,
-                                                  FunctionAddresses);
-  xray::LatencyAccountant FCA(FuncIdHelper, AccountDeduceSiblingCalls);
-  auto TraceOrErr = loadTraceFile(AccountInput);
-  if (!TraceOrErr)
-    return joinErrors(
-        make_error<StringError>(
-            Twine("Failed loading input file '") + AccountInput + "'",
-            std::make_error_code(std::errc::executable_format_error)),
-        TraceOrErr.takeError());
-
-  auto &T = *TraceOrErr;
-  for (const auto &Record : T) {
-    if (FCA.accountRecord(Record))
-      continue;
-    for (const auto &ThreadStack : FCA.getPerThreadFunctionStack()) {
-      errs() << "Thread ID: " << ThreadStack.first << "\n";
-      auto Level = ThreadStack.second.size();
-      for (const auto &Entry : llvm::reverse(ThreadStack.second))
-        errs() << "#" << Level-- << "\t"
-               << FuncIdHelper.SymbolOrNumber(Entry.first) << '\n';
-    }
-    if (!AccountKeepGoing)
-      return make_error<StringError>(
-          Twine("Failed accounting function calls in file '") + AccountInput +
-              "'.",
-          std::make_error_code(std::errc::executable_format_error));
-  }
-  switch (AccountOutputFormat) {
-  case AccountOutputFormats::TEXT:
-    FCA.exportStatsAsText(OS, T.getFileHeader());
-    break;
-  case AccountOutputFormats::CSV:
-    FCA.exportStatsAsCSV(OS, T.getFileHeader());
-    break;
-  }
-
-  return Error::success();
-});
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-color-helper.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-color-helper.cc
deleted file mode 100644
index 7b6a73a5552b..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-color-helper.cc
+++ /dev/null
@@ -1,224 +0,0 @@
-//===-- xray-graph.cc - XRay Function Call Graph Renderer -----------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// A class to get a color from a specified gradient.
-//
-//===----------------------------------------------------------------------===//
-#include <algorithm>
-#include <iostream>
-
-#include "xray-color-helper.h"
-#include "llvm/Support/FormatVariadic.h"
-#include "llvm/Support/raw_ostream.h"
-
-using namespace llvm;
-using namespace xray;
-
-//  Sequential ColorMaps, which are used to represent information
-//  from some minimum to some maximum.
-
-static const std::tuple<uint8_t, uint8_t, uint8_t> SequentialMaps[][9] = {
-    {// The greys color scheme from http://colorbrewer2.org/
-     std::make_tuple(255, 255, 255), std::make_tuple(240, 240, 240),
-     std::make_tuple(217, 217, 217), std::make_tuple(189, 189, 189),
-     std::make_tuple(150, 150, 150), std::make_tuple(115, 115, 115),
-     std::make_tuple(82, 82, 82), std::make_tuple(37, 37, 37),
-     std::make_tuple(0, 0, 0)},
-    {// The OrRd color scheme from http://colorbrewer2.org/
-     std::make_tuple(255, 247, 236), std::make_tuple(254, 232, 200),
-     std::make_tuple(253, 212, 158), std::make_tuple(253, 187, 132),
-     std::make_tuple(252, 141, 89), std::make_tuple(239, 101, 72),
-     std::make_tuple(215, 48, 31), std::make_tuple(179, 0, 0),
-     std::make_tuple(127, 0, 0)},
-    {// The PuBu color scheme from http://colorbrewer2.org/
-     std::make_tuple(255, 247, 251), std::make_tuple(236, 231, 242),
-     std::make_tuple(208, 209, 230), std::make_tuple(166, 189, 219),
-     std::make_tuple(116, 169, 207), std::make_tuple(54, 144, 192),
-     std::make_tuple(5, 112, 176), std::make_tuple(4, 90, 141),
-     std::make_tuple(2, 56, 88)}};
-
-// Sequential Maps extend the last colors given out of range inputs.
-static const std::tuple<uint8_t, uint8_t, uint8_t> SequentialBounds[][2] = {
-    {// The Bounds for the greys color scheme
-     std::make_tuple(255, 255, 255), std::make_tuple(0, 0, 0)},
-    {// The Bounds for the OrRd color Scheme
-     std::make_tuple(255, 247, 236), std::make_tuple(127, 0, 0)},
-    {// The Bounds for the PuBu color Scheme
-     std::make_tuple(255, 247, 251), std::make_tuple(2, 56, 88)}};
-
-ColorHelper::ColorHelper(ColorHelper::SequentialScheme S)
-    : MinIn(0.0), MaxIn(1.0), ColorMap(SequentialMaps[static_cast<int>(S)]),
-      BoundMap(SequentialBounds[static_cast<int>(S)]) {}
-
-// Diverging ColorMaps, which are used to represent information
-// representing differenes, or a range that goes from negative to positive.
-// These take an input in the range [-1,1].
-
-static const std::tuple<uint8_t, uint8_t, uint8_t> DivergingCoeffs[][11] = {
-    {// The PiYG color scheme from http://colorbrewer2.org/
-     std::make_tuple(142, 1, 82), std::make_tuple(197, 27, 125),
-     std::make_tuple(222, 119, 174), std::make_tuple(241, 182, 218),
-     std::make_tuple(253, 224, 239), std::make_tuple(247, 247, 247),
-     std::make_tuple(230, 245, 208), std::make_tuple(184, 225, 134),
-     std::make_tuple(127, 188, 65), std::make_tuple(77, 146, 33),
-     std::make_tuple(39, 100, 25)}};
-
-// Diverging maps use out of bounds ranges to show missing data. Missing Right
-// Being below min, and missing left being above max.
-static const std::tuple<uint8_t, uint8_t, uint8_t> DivergingBounds[][2] = {
-    {// The PiYG color scheme has green and red for missing right and left
-     // respectively.
-     std::make_tuple(255, 0, 0), std::make_tuple(0, 255, 0)}};
-
-ColorHelper::ColorHelper(ColorHelper::DivergingScheme S)
-    : MinIn(-1.0), MaxIn(1.0), ColorMap(DivergingCoeffs[static_cast<int>(S)]),
-      BoundMap(DivergingBounds[static_cast<int>(S)]) {}
-
-// Takes a tuple of uint8_ts representing a color in RGB and converts them to
-// HSV represented by a tuple of doubles
-static std::tuple<double, double, double>
-convertToHSV(const std::tuple<uint8_t, uint8_t, uint8_t> &Color) {
-  double Scaled[3] = {std::get<0>(Color) / 255.0, std::get<1>(Color) / 255.0,
-                      std::get<2>(Color) / 255.0};
-  int Min = 0;
-  int Max = 0;
-  for (int i = 1; i < 3; ++i) {
-    if (Scaled[i] < Scaled[Min])
-      Min = i;
-    if (Scaled[i] > Scaled[Max])
-      Max = i;
-  }
-
-  double C = Scaled[Max] - Scaled[Min];
-
-  double HPrime =
-      (C == 0) ? 0 : (Scaled[(Max + 1) % 3] - Scaled[(Max + 2) % 3]) / C;
-  HPrime = HPrime + 2.0 * Max;
-
-  double H = (HPrime < 0) ? (HPrime + 6.0) * 60
-                          : HPrime * 60; // Scale to between 0 and 360
-  double V = Scaled[Max];
-
-  double S = (V == 0.0) ? 0.0 : C / V;
-
-  return std::make_tuple(H, S, V);
-}
-
-// Takes a double precision number, clips it between 0 and 1 and then converts
-// that to an integer between 0x00 and 0xFF with proxpper rounding.
-static uint8_t unitIntervalTo8BitChar(double B) {
-  double n = std::max(std::min(B, 1.0), 0.0);
-  return static_cast<uint8_t>(255 * n + 0.5);
-}
-
-// Takes a typle of doubles representing a color in HSV and converts them to
-// RGB represented as a tuple of uint8_ts
-static std::tuple<uint8_t, uint8_t, uint8_t>
-convertToRGB(const std::tuple<double, double, double> &Color) {
-  const double &H = std::get<0>(Color);
-  const double &S = std::get<1>(Color);
-  const double &V = std::get<2>(Color);
-
-  double C = V * S;
-
-  double HPrime = H / 60;
-  double X = C * (1 - std::abs(std::fmod(HPrime, 2.0) - 1));
-
-  double RGB1[3];
-  int HPrimeInt = static_cast<int>(HPrime);
-  if (HPrimeInt % 2 == 0) {
-    RGB1[(HPrimeInt / 2) % 3] = C;
-    RGB1[(HPrimeInt / 2 + 1) % 3] = X;
-    RGB1[(HPrimeInt / 2 + 2) % 3] = 0.0;
-  } else {
-    RGB1[(HPrimeInt / 2) % 3] = X;
-    RGB1[(HPrimeInt / 2 + 1) % 3] = C;
-    RGB1[(HPrimeInt / 2 + 2) % 3] = 0.0;
-  }
-
-  double Min = V - C;
-  double RGB2[3] = {RGB1[0] + Min, RGB1[1] + Min, RGB1[2] + Min};
-
-  return std::make_tuple(unitIntervalTo8BitChar(RGB2[0]),
-                         unitIntervalTo8BitChar(RGB2[1]),
-                         unitIntervalTo8BitChar(RGB2[2]));
-}
-
-// The Hue component of the HSV interpolation Routine
-static double interpolateHue(double H0, double H1, double T) {
-  double D = H1 - H0;
-  if (H0 > H1) {
-    std::swap(H0, H1);
-
-    D = -D;
-    T = 1 - T;
-  }
-
-  if (D <= 180) {
-    return H0 + T * (H1 - H0);
-  } else {
-    H0 = H0 + 360;
-    return std::fmod(H0 + T * (H1 - H0) + 720, 360);
-  }
-}
-
-// Interpolates between two HSV Colors both represented as a tuple of doubles
-// Returns an HSV Color represented as a tuple of doubles
-static std::tuple<double, double, double>
-interpolateHSV(const std::tuple<double, double, double> &C0,
-               const std::tuple<double, double, double> &C1, double T) {
-  double H = interpolateHue(std::get<0>(C0), std::get<0>(C1), T);
-  double S = std::get<1>(C0) + T * (std::get<1>(C1) - std::get<1>(C0));
-  double V = std::get<2>(C0) + T * (std::get<2>(C1) - std::get<2>(C0));
-  return std::make_tuple(H, S, V);
-}
-
-// Get the Color as a tuple of uint8_ts
-std::tuple<uint8_t, uint8_t, uint8_t>
-ColorHelper::getColorTuple(double Point) const {
-  assert(!ColorMap.empty() && "ColorMap must not be empty!");
-  assert(!BoundMap.empty() && "BoundMap must not be empty!");
-
-  if (Point < MinIn)
-    return BoundMap[0];
-  if (Point > MaxIn)
-    return BoundMap[1];
-
-  size_t MaxIndex = ColorMap.size() - 1;
-  double IntervalWidth = MaxIn - MinIn;
-  double OffsetP = Point - MinIn;
-  double SectionWidth = IntervalWidth / static_cast<double>(MaxIndex);
-  size_t SectionNo = std::floor(OffsetP / SectionWidth);
-  double T = (OffsetP - SectionNo * SectionWidth) / SectionWidth;
-
-  auto &RGBColor0 = ColorMap[SectionNo];
-  auto &RGBColor1 = ColorMap[std::min(SectionNo + 1, MaxIndex)];
-
-  auto HSVColor0 = convertToHSV(RGBColor0);
-  auto HSVColor1 = convertToHSV(RGBColor1);
-
-  auto InterpolatedHSVColor = interpolateHSV(HSVColor0, HSVColor1, T);
-  return convertToRGB(InterpolatedHSVColor);
-}
-
-// A helper method to convert a color represented as tuple of uint8s to a hex
-// string.
-std::string
-ColorHelper::getColorString(std::tuple<uint8_t, uint8_t, uint8_t> t) {
-  return llvm::formatv("#{0:X-2}{1:X-2}{2:X-2}", std::get<0>(t), std::get<1>(t),
-                       std::get<2>(t));
-}
-
-// Gets a color in a gradient given a number in the interval [0,1], it does this
-// by evaluating a polynomial which maps [0, 1] -> [0, 1] for each of the R G
-// and B values in the color. It then converts this [0,1] colors to a 24 bit
-// color as a hex string.
-std::string ColorHelper::getColorString(double Point) const {
-  return getColorString(getColorTuple(Point));
-}
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-converter.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-converter.cc
deleted file mode 100644
index 2583ec951495..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-converter.cc
+++ /dev/null
@@ -1,195 +0,0 @@
-//===- xray-converter.cc - XRay Trace Conversion --------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Implements the trace conversion functions.
-//
-//===----------------------------------------------------------------------===//
-#include "xray-converter.h"
-
-#include "xray-registry.h"
-#include "llvm/DebugInfo/Symbolize/Symbolize.h"
-#include "llvm/Support/EndianStream.h"
-#include "llvm/Support/FileSystem.h"
-#include "llvm/Support/ScopedPrinter.h"
-#include "llvm/Support/YAMLTraits.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/XRay/InstrumentationMap.h"
-#include "llvm/XRay/Trace.h"
-#include "llvm/XRay/YAMLXRayRecord.h"
-
-using namespace llvm;
-using namespace xray;
-
-// llvm-xray convert
-// ----------------------------------------------------------------------------
-static cl::SubCommand Convert("convert", "Trace Format Conversion");
-static cl::opt<std::string> ConvertInput(cl::Positional,
-                                         cl::desc("<xray log file>"),
-                                         cl::Required, cl::sub(Convert));
-enum class ConvertFormats { BINARY, YAML };
-static cl::opt<ConvertFormats> ConvertOutputFormat(
-    "output-format", cl::desc("output format"),
-    cl::values(clEnumValN(ConvertFormats::BINARY, "raw", "output in binary"),
-               clEnumValN(ConvertFormats::YAML, "yaml", "output in yaml")),
-    cl::sub(Convert));
-static cl::alias ConvertOutputFormat2("f", cl::aliasopt(ConvertOutputFormat),
-                                      cl::desc("Alias for -output-format"),
-                                      cl::sub(Convert));
-static cl::opt<std::string>
-    ConvertOutput("output", cl::value_desc("output file"), cl::init("-"),
-                  cl::desc("output file; use '-' for stdout"),
-                  cl::sub(Convert));
-static cl::alias ConvertOutput2("o", cl::aliasopt(ConvertOutput),
-                                cl::desc("Alias for -output"),
-                                cl::sub(Convert));
-
-static cl::opt<bool>
-    ConvertSymbolize("symbolize",
-                     cl::desc("symbolize function ids from the input log"),
-                     cl::init(false), cl::sub(Convert));
-static cl::alias ConvertSymbolize2("y", cl::aliasopt(ConvertSymbolize),
-                                   cl::desc("Alias for -symbolize"),
-                                   cl::sub(Convert));
-
-static cl::opt<std::string>
-    ConvertInstrMap("instr_map",
-                    cl::desc("binary with the instrumentation map, or "
-                             "a separate instrumentation map"),
-                    cl::value_desc("binary with xray_instr_map"),
-                    cl::sub(Convert), cl::init(""));
-static cl::alias ConvertInstrMap2("m", cl::aliasopt(ConvertInstrMap),
-                                  cl::desc("Alias for -instr_map"),
-                                  cl::sub(Convert));
-static cl::opt<bool> ConvertSortInput(
-    "sort",
-    cl::desc("determines whether to sort input log records by timestamp"),
-    cl::sub(Convert), cl::init(true));
-static cl::alias ConvertSortInput2("s", cl::aliasopt(ConvertSortInput),
-                                   cl::desc("Alias for -sort"),
-                                   cl::sub(Convert));
-
-using llvm::yaml::Output;
-
-void TraceConverter::exportAsYAML(const Trace &Records, raw_ostream &OS) {
-  YAMLXRayTrace Trace;
-  const auto &FH = Records.getFileHeader();
-  Trace.Header = {FH.Version, FH.Type, FH.ConstantTSC, FH.NonstopTSC,
-                  FH.CycleFrequency};
-  Trace.Records.reserve(Records.size());
-  for (const auto &R : Records) {
-    Trace.Records.push_back({R.RecordType, R.CPU, R.Type, R.FuncId,
-                             Symbolize ? FuncIdHelper.SymbolOrNumber(R.FuncId)
-                                       : llvm::to_string(R.FuncId),
-                             R.TSC, R.TId});
-  }
-  Output Out(OS, nullptr, 0);
-  Out << Trace;
-}
-
-void TraceConverter::exportAsRAWv1(const Trace &Records, raw_ostream &OS) {
-  // First write out the file header, in the correct endian-appropriate format
-  // (XRay assumes currently little endian).
-  support::endian::Writer<support::endianness::little> Writer(OS);
-  const auto &FH = Records.getFileHeader();
-  Writer.write(FH.Version);
-  Writer.write(FH.Type);
-  uint32_t Bitfield{0};
-  if (FH.ConstantTSC)
-    Bitfield |= 1uL;
-  if (FH.NonstopTSC)
-    Bitfield |= 1uL << 1;
-  Writer.write(Bitfield);
-  Writer.write(FH.CycleFrequency);
-
-  // There's 16 bytes of padding at the end of the file header.
-  static constexpr uint32_t Padding4B = 0;
-  Writer.write(Padding4B);
-  Writer.write(Padding4B);
-  Writer.write(Padding4B);
-  Writer.write(Padding4B);
-
-  // Then write out the rest of the records, still in an endian-appropriate
-  // format.
-  for (const auto &R : Records) {
-    Writer.write(R.RecordType);
-    // The on disk naive raw format uses 8 bit CPUs, but the record has 16.
-    // There's no choice but truncation.
-    Writer.write(static_cast<uint8_t>(R.CPU));
-    switch (R.Type) {
-    case RecordTypes::ENTER:
-      Writer.write(uint8_t{0});
-      break;
-    case RecordTypes::EXIT:
-      Writer.write(uint8_t{1});
-      break;
-    }
-    Writer.write(R.FuncId);
-    Writer.write(R.TSC);
-    Writer.write(R.TId);
-    Writer.write(Padding4B);
-    Writer.write(Padding4B);
-    Writer.write(Padding4B);
-  }
-}
-
-namespace llvm {
-namespace xray {
-
-static CommandRegistration Unused(&Convert, []() -> Error {
-  // FIXME: Support conversion to BINARY when upgrading XRay trace versions.
-  InstrumentationMap Map;
-  if (!ConvertInstrMap.empty()) {
-    auto InstrumentationMapOrError = loadInstrumentationMap(ConvertInstrMap);
-    if (!InstrumentationMapOrError)
-      return joinErrors(make_error<StringError>(
-                            Twine("Cannot open instrumentation map '") +
-                                ConvertInstrMap + "'",
-                            std::make_error_code(std::errc::invalid_argument)),
-                        InstrumentationMapOrError.takeError());
-    Map = std::move(*InstrumentationMapOrError);
-  }
-
-  const auto &FunctionAddresses = Map.getFunctionAddresses();
-  symbolize::LLVMSymbolizer::Options Opts(
-      symbolize::FunctionNameKind::LinkageName, true, true, false, "");
-  symbolize::LLVMSymbolizer Symbolizer(Opts);
-  llvm::xray::FuncIdConversionHelper FuncIdHelper(ConvertInstrMap, Symbolizer,
-                                                  FunctionAddresses);
-  llvm::xray::TraceConverter TC(FuncIdHelper, ConvertSymbolize);
-  std::error_code EC;
-  raw_fd_ostream OS(ConvertOutput, EC,
-                    ConvertOutputFormat == ConvertFormats::BINARY
-                        ? sys::fs::OpenFlags::F_None
-                        : sys::fs::OpenFlags::F_Text);
-  if (EC)
-    return make_error<StringError>(
-        Twine("Cannot open file '") + ConvertOutput + "' for writing.", EC);
-
-  auto TraceOrErr = loadTraceFile(ConvertInput, ConvertSortInput);
-  if (!TraceOrErr)
-    return joinErrors(
-        make_error<StringError>(
-            Twine("Failed loading input file '") + ConvertInput + "'.",
-            std::make_error_code(std::errc::executable_format_error)),
-        TraceOrErr.takeError());
-
-  auto &T = *TraceOrErr;
-  switch (ConvertOutputFormat) {
-  case ConvertFormats::YAML:
-    TC.exportAsYAML(T, OS);
-    break;
-  case ConvertFormats::BINARY:
-    TC.exportAsRAWv1(T, OS);
-    break;
-  }
-  return Error::success();
-});
-
-} // namespace xray
-} // namespace llvm
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-extract.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-extract.cc
deleted file mode 100644
index 6b72b81ab814..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-extract.cc
+++ /dev/null
@@ -1,102 +0,0 @@
-//===- xray-extract.cc - XRay Instrumentation Map Extraction --------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Implementation of the xray-extract.h interface.
-//
-// FIXME: Support other XRay-instrumented binary formats other than ELF.
-//
-//===----------------------------------------------------------------------===//
-
-#include <type_traits>
-#include <utility>
-
-#include "func-id-helper.h"
-#include "xray-registry.h"
-#include "llvm/BinaryFormat/ELF.h"
-#include "llvm/Object/ELF.h"
-#include "llvm/Object/ObjectFile.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/DataExtractor.h"
-#include "llvm/Support/Error.h"
-#include "llvm/Support/FileSystem.h"
-#include "llvm/Support/Format.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/XRay/InstrumentationMap.h"
-
-using namespace llvm;
-using namespace llvm::xray;
-using namespace llvm::yaml;
-
-// llvm-xray extract
-// ----------------------------------------------------------------------------
-static cl::SubCommand Extract("extract", "Extract instrumentation maps");
-static cl::opt<std::string> ExtractInput(cl::Positional,
-                                         cl::desc("<input file>"), cl::Required,
-                                         cl::sub(Extract));
-static cl::opt<std::string>
-    ExtractOutput("output", cl::value_desc("output file"), cl::init("-"),
-                  cl::desc("output file; use '-' for stdout"),
-                  cl::sub(Extract));
-static cl::alias ExtractOutput2("o", cl::aliasopt(ExtractOutput),
-                                cl::desc("Alias for -output"),
-                                cl::sub(Extract));
-static cl::opt<bool> ExtractSymbolize("symbolize", cl::value_desc("symbolize"),
-                                      cl::init(false),
-                                      cl::desc("symbolize functions"),
-                                      cl::sub(Extract));
-static cl::alias ExtractSymbolize2("s", cl::aliasopt(ExtractSymbolize),
-                                   cl::desc("alias for -symbolize"),
-                                   cl::sub(Extract));
-
-namespace {
-
-void exportAsYAML(const InstrumentationMap &Map, raw_ostream &OS,
-                  FuncIdConversionHelper &FH) {
-  // First we translate the sleds into the YAMLXRaySledEntry objects in a deque.
-  std::vector<YAMLXRaySledEntry> YAMLSleds;
-  auto Sleds = Map.sleds();
-  YAMLSleds.reserve(std::distance(Sleds.begin(), Sleds.end()));
-  for (const auto &Sled : Sleds) {
-    auto FuncId = Map.getFunctionId(Sled.Function);
-    if (!FuncId)
-      return;
-    YAMLSleds.push_back({*FuncId, Sled.Address, Sled.Function, Sled.Kind,
-                         Sled.AlwaysInstrument,
-                         ExtractSymbolize ? FH.SymbolOrNumber(*FuncId) : ""});
-  }
-  Output Out(OS, nullptr, 0);
-  Out << YAMLSleds;
-}
-
-} // namespace
-
-static CommandRegistration Unused(&Extract, []() -> Error {
-  auto InstrumentationMapOrError = loadInstrumentationMap(ExtractInput);
-  if (!InstrumentationMapOrError)
-    return joinErrors(make_error<StringError>(
-                          Twine("Cannot extract instrumentation map from '") +
-                              ExtractInput + "'.",
-                          std::make_error_code(std::errc::invalid_argument)),
-                      InstrumentationMapOrError.takeError());
-
-  std::error_code EC;
-  raw_fd_ostream OS(ExtractOutput, EC, sys::fs::OpenFlags::F_Text);
-  if (EC)
-    return make_error<StringError>(
-        Twine("Cannot open file '") + ExtractOutput + "' for writing.", EC);
-  const auto &FunctionAddresses =
-      InstrumentationMapOrError->getFunctionAddresses();
-  symbolize::LLVMSymbolizer::Options Opts(
-      symbolize::FunctionNameKind::LinkageName, true, true, false, "");
-  symbolize::LLVMSymbolizer Symbolizer(Opts);
-  llvm::xray::FuncIdConversionHelper FuncIdHelper(ExtractInput, Symbolizer,
-                                                  FunctionAddresses);
-  exportAsYAML(*InstrumentationMapOrError, OS, FuncIdHelper);
-  return Error::success();
-});
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-graph-diff.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-graph-diff.cc
deleted file mode 100644
index 3c69b3fb0751..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-graph-diff.cc
+++ /dev/null
@@ -1,484 +0,0 @@
-//===-- xray-graph-diff.cc - XRay Function Call Graph Renderer ------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Generate a DOT file to represent the function call graph encountered in
-// the trace.
-//
-//===----------------------------------------------------------------------===//
-#include <cassert>
-#include <cmath>
-#include <limits>
-#include <string>
-
-#include "xray-graph-diff.h"
-#include "xray-graph.h"
-#include "xray-registry.h"
-
-#include "xray-color-helper.h"
-#include "llvm/ADT/iterator_range.h"
-#include "llvm/Support/FormatVariadic.h"
-#include "llvm/XRay/Trace.h"
-
-using namespace llvm;
-using namespace xray;
-
-static cl::SubCommand GraphDiff("graph-diff",
-                                "Generate diff of function-call graphs");
-static cl::opt<std::string> GraphDiffInput1(cl::Positional,
-                                            cl::desc("<xray log file 1>"),
-                                            cl::Required, cl::sub(GraphDiff));
-static cl::opt<std::string> GraphDiffInput2(cl::Positional,
-                                            cl::desc("<xray log file 2>"),
-                                            cl::Required, cl::sub(GraphDiff));
-
-static cl::opt<bool>
-    GraphDiffKeepGoing("keep-going",
-                       cl::desc("Keep going on errors encountered"),
-                       cl::sub(GraphDiff), cl::init(false));
-static cl::alias GraphDiffKeepGoingA("k", cl::aliasopt(GraphDiffKeepGoing),
-                                     cl::desc("Alias for -keep-going"),
-                                     cl::sub(GraphDiff));
-static cl::opt<bool>
-    GraphDiffKeepGoing1("keep-going-1",
-                        cl::desc("Keep going on errors encountered in trace 1"),
-                        cl::sub(GraphDiff), cl::init(false));
-static cl::alias GraphDiffKeepGoing1A("k1", cl::aliasopt(GraphDiffKeepGoing1),
-                                      cl::desc("Alias for -keep-going-1"),
-                                      cl::sub(GraphDiff));
-static cl::opt<bool>
-    GraphDiffKeepGoing2("keep-going-2",
-                        cl::desc("Keep going on errors encountered in trace 2"),
-                        cl::sub(GraphDiff), cl::init(false));
-static cl::alias GraphDiffKeepGoing2A("k2", cl::aliasopt(GraphDiffKeepGoing2),
-                                      cl::desc("Alias for -keep-going-2"),
-                                      cl::sub(GraphDiff));
-
-static cl::opt<std::string>
-    GraphDiffInstrMap("instr-map",
-                      cl::desc("binary with the instrumentation map, or "
-                               "a separate instrumentation map for graph"),
-                      cl::value_desc("binary with xray_instr_map or yaml"),
-                      cl::sub(GraphDiff), cl::init(""));
-static cl::alias GraphDiffInstrMapA("m", cl::aliasopt(GraphDiffInstrMap),
-                                    cl::desc("Alias for -instr-map"),
-                                    cl::sub(GraphDiff));
-static cl::opt<std::string>
-    GraphDiffInstrMap1("instr-map-1",
-                       cl::desc("binary with the instrumentation map, or "
-                                "a separate instrumentation map for graph 1"),
-                       cl::value_desc("binary with xray_instr_map or yaml"),
-                       cl::sub(GraphDiff), cl::init(""));
-static cl::alias GraphDiffInstrMap1A("m1", cl::aliasopt(GraphDiffInstrMap1),
-                                     cl::desc("Alias for -instr-map-1"),
-                                     cl::sub(GraphDiff));
-static cl::opt<std::string>
-    GraphDiffInstrMap2("instr-map-2",
-                       cl::desc("binary with the instrumentation map, or "
-                                "a separate instrumentation map for graph 2"),
-                       cl::value_desc("binary with xray_instr_map or yaml"),
-                       cl::sub(GraphDiff), cl::init(""));
-static cl::alias GraphDiffInstrMap2A("m2", cl::aliasopt(GraphDiffInstrMap2),
-                                     cl::desc("Alias for -instr-map-2"),
-                                     cl::sub(GraphDiff));
-
-static cl::opt<bool> GraphDiffDeduceSiblingCalls(
-    "deduce-sibling-calls",
-    cl::desc("Deduce sibling calls when unrolling function call stacks"),
-    cl::sub(GraphDiff), cl::init(false));
-static cl::alias
-    GraphDiffDeduceSiblingCallsA("d", cl::aliasopt(GraphDiffDeduceSiblingCalls),
-                                 cl::desc("Alias for -deduce-sibling-calls"),
-                                 cl::sub(GraphDiff));
-static cl::opt<bool> GraphDiffDeduceSiblingCalls1(
-    "deduce-sibling-calls-1",
-    cl::desc("Deduce sibling calls when unrolling function call stacks"),
-    cl::sub(GraphDiff), cl::init(false));
-static cl::alias GraphDiffDeduceSiblingCalls1A(
-    "d1", cl::aliasopt(GraphDiffDeduceSiblingCalls1),
-    cl::desc("Alias for -deduce-sibling-calls-1"), cl::sub(GraphDiff));
-static cl::opt<bool> GraphDiffDeduceSiblingCalls2(
-    "deduce-sibling-calls-2",
-    cl::desc("Deduce sibling calls when unrolling function call stacks"),
-    cl::sub(GraphDiff), cl::init(false));
-static cl::alias GraphDiffDeduceSiblingCalls2A(
-    "d2", cl::aliasopt(GraphDiffDeduceSiblingCalls2),
-    cl::desc("Alias for -deduce-sibling-calls-2"), cl::sub(GraphDiff));
-
-static cl::opt<GraphRenderer::StatType> GraphDiffEdgeLabel(
-    "edge-label", cl::desc("Output graphs with edges labeled with this field"),
-    cl::value_desc("field"), cl::sub(GraphDiff),
-    cl::init(GraphRenderer::StatType::NONE),
-    cl::values(clEnumValN(GraphRenderer::StatType::NONE, "none",
-                          "Do not label Edges"),
-               clEnumValN(GraphRenderer::StatType::COUNT, "count",
-                          "function call counts"),
-               clEnumValN(GraphRenderer::StatType::MIN, "min",
-                          "minimum function durations"),
-               clEnumValN(GraphRenderer::StatType::MED, "med",
-                          "median function durations"),
-               clEnumValN(GraphRenderer::StatType::PCT90, "90p",
-                          "90th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::PCT99, "99p",
-                          "99th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::MAX, "max",
-                          "maximum function durations"),
-               clEnumValN(GraphRenderer::StatType::SUM, "sum",
-                          "sum of call durations")));
-static cl::alias GraphDiffEdgeLabelA("e", cl::aliasopt(GraphDiffEdgeLabel),
-                                     cl::desc("Alias for -edge-label"),
-                                     cl::sub(GraphDiff));
-
-static cl::opt<GraphRenderer::StatType> GraphDiffEdgeColor(
-    "edge-color", cl::desc("Output graphs with edges colored by this field"),
-    cl::value_desc("field"), cl::sub(GraphDiff),
-    cl::init(GraphRenderer::StatType::NONE),
-    cl::values(clEnumValN(GraphRenderer::StatType::NONE, "none",
-                          "Do not color Edges"),
-               clEnumValN(GraphRenderer::StatType::COUNT, "count",
-                          "function call counts"),
-               clEnumValN(GraphRenderer::StatType::MIN, "min",
-                          "minimum function durations"),
-               clEnumValN(GraphRenderer::StatType::MED, "med",
-                          "median function durations"),
-               clEnumValN(GraphRenderer::StatType::PCT90, "90p",
-                          "90th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::PCT99, "99p",
-                          "99th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::MAX, "max",
-                          "maximum function durations"),
-               clEnumValN(GraphRenderer::StatType::SUM, "sum",
-                          "sum of call durations")));
-static cl::alias GraphDiffEdgeColorA("c", cl::aliasopt(GraphDiffEdgeColor),
-                                     cl::desc("Alias for -edge-color"),
-                                     cl::sub(GraphDiff));
-
-static cl::opt<GraphRenderer::StatType> GraphDiffVertexLabel(
-    "vertex-label",
-    cl::desc("Output graphs with vertices labeled with this field"),
-    cl::value_desc("field"), cl::sub(GraphDiff),
-    cl::init(GraphRenderer::StatType::NONE),
-    cl::values(clEnumValN(GraphRenderer::StatType::NONE, "none",
-                          "Do not label Vertices"),
-               clEnumValN(GraphRenderer::StatType::COUNT, "count",
-                          "function call counts"),
-               clEnumValN(GraphRenderer::StatType::MIN, "min",
-                          "minimum function durations"),
-               clEnumValN(GraphRenderer::StatType::MED, "med",
-                          "median function durations"),
-               clEnumValN(GraphRenderer::StatType::PCT90, "90p",
-                          "90th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::PCT99, "99p",
-                          "99th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::MAX, "max",
-                          "maximum function durations"),
-               clEnumValN(GraphRenderer::StatType::SUM, "sum",
-                          "sum of call durations")));
-static cl::alias GraphDiffVertexLabelA("v", cl::aliasopt(GraphDiffVertexLabel),
-                                       cl::desc("Alias for -vertex-label"),
-                                       cl::sub(GraphDiff));
-
-static cl::opt<GraphRenderer::StatType> GraphDiffVertexColor(
-    "vertex-color",
-    cl::desc("Output graphs with vertices colored by this field"),
-    cl::value_desc("field"), cl::sub(GraphDiff),
-    cl::init(GraphRenderer::StatType::NONE),
-    cl::values(clEnumValN(GraphRenderer::StatType::NONE, "none",
-                          "Do not color Vertices"),
-               clEnumValN(GraphRenderer::StatType::COUNT, "count",
-                          "function call counts"),
-               clEnumValN(GraphRenderer::StatType::MIN, "min",
-                          "minimum function durations"),
-               clEnumValN(GraphRenderer::StatType::MED, "med",
-                          "median function durations"),
-               clEnumValN(GraphRenderer::StatType::PCT90, "90p",
-                          "90th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::PCT99, "99p",
-                          "99th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::MAX, "max",
-                          "maximum function durations"),
-               clEnumValN(GraphRenderer::StatType::SUM, "sum",
-                          "sum of call durations")));
-static cl::alias GraphDiffVertexColorA("b", cl::aliasopt(GraphDiffVertexColor),
-                                       cl::desc("Alias for -vertex-color"),
-                                       cl::sub(GraphDiff));
-
-static cl::opt<int> GraphDiffVertexLabelTrunc(
-    "vertex-label-trun", cl::desc("What length to truncate vertex labels to "),
-    cl::sub(GraphDiff), cl::init(40));
-static cl::alias
-    GraphDiffVertexLabelTrunc1("t", cl::aliasopt(GraphDiffVertexLabelTrunc),
-                               cl::desc("Alias for -vertex-label-trun"),
-                               cl::sub(GraphDiff));
-
-static cl::opt<std::string>
-    GraphDiffOutput("output", cl::value_desc("Output file"), cl::init("-"),
-                    cl::desc("output file; use '-' for stdout"),
-                    cl::sub(GraphDiff));
-static cl::alias GraphDiffOutputA("o", cl::aliasopt(GraphDiffOutput),
-                                  cl::desc("Alias for -output"),
-                                  cl::sub(GraphDiff));
-
-Expected<GraphDiffRenderer> GraphDiffRenderer::Factory::getGraphDiffRenderer() {
-  GraphDiffRenderer R;
-
-  for (int i = 0; i < N; ++i) {
-    const auto &G = this->G[i].get();
-    for (const auto &V : G.vertices()) {
-      const auto &VAttr = V.second;
-      R.G[VAttr.SymbolName].CorrVertexPtr[i] = &V;
-    }
-    for (const auto &E : G.edges()) {
-      auto &EdgeTailID = E.first.first;
-      auto &EdgeHeadID = E.first.second;
-      auto EdgeTailAttrOrErr = G.at(EdgeTailID);
-      auto EdgeHeadAttrOrErr = G.at(EdgeHeadID);
-      if (!EdgeTailAttrOrErr)
-        return EdgeTailAttrOrErr.takeError();
-      if (!EdgeHeadAttrOrErr)
-        return EdgeHeadAttrOrErr.takeError();
-      GraphT::EdgeIdentifier ID{EdgeTailAttrOrErr->SymbolName,
-                                EdgeHeadAttrOrErr->SymbolName};
-      R.G[ID].CorrEdgePtr[i] = &E;
-    }
-  }
-
-  return R;
-}
-// Returns the Relative change With respect to LeftStat between LeftStat
-// and RightStat.
-static double statRelDiff(const GraphDiffRenderer::TimeStat &LeftStat,
-                          const GraphDiffRenderer::TimeStat &RightStat,
-                          GraphDiffRenderer::StatType T) {
-  double LeftAttr = LeftStat.getDouble(T);
-  double RightAttr = RightStat.getDouble(T);
-
-  return RightAttr / LeftAttr - 1.0;
-}
-
-static std::string getColor(const GraphDiffRenderer::GraphT::EdgeValueType &E,
-                            const GraphDiffRenderer::GraphT &G, ColorHelper H,
-                            GraphDiffRenderer::StatType T) {
-  auto &EdgeAttr = E.second;
-  if (EdgeAttr.CorrEdgePtr[0] == nullptr)
-    return H.getColorString(2.0); // A number greater than 1.0
-  if (EdgeAttr.CorrEdgePtr[1] == nullptr)
-    return H.getColorString(-2.0); // A number less than -1.0
-
-  if (T == GraphDiffRenderer::StatType::NONE)
-    return H.getDefaultColorString();
-
-  const auto &LeftStat = EdgeAttr.CorrEdgePtr[0]->second.S;
-  const auto &RightStat = EdgeAttr.CorrEdgePtr[1]->second.S;
-
-  double RelDiff = statRelDiff(LeftStat, RightStat, T);
-  double CappedRelDiff = std::min(1.0, std::max(-1.0, RelDiff));
-
-  return H.getColorString(CappedRelDiff);
-}
-
-static std::string getColor(const GraphDiffRenderer::GraphT::VertexValueType &V,
-                            const GraphDiffRenderer::GraphT &G, ColorHelper H,
-                            GraphDiffRenderer::StatType T) {
-  auto &VertexAttr = V.second;
-  if (VertexAttr.CorrVertexPtr[0] == nullptr)
-    return H.getColorString(2.0); // A number greater than 1.0
-  if (VertexAttr.CorrVertexPtr[1] == nullptr)
-    return H.getColorString(-2.0); // A number less than -1.0
-
-  if (T == GraphDiffRenderer::StatType::NONE)
-    return H.getDefaultColorString();
-
-  const auto &LeftStat = VertexAttr.CorrVertexPtr[0]->second.S;
-  const auto &RightStat = VertexAttr.CorrVertexPtr[1]->second.S;
-
-  double RelDiff = statRelDiff(LeftStat, RightStat, T);
-  double CappedRelDiff = std::min(1.0, std::max(-1.0, RelDiff));
-
-  return H.getColorString(CappedRelDiff);
-}
-
-static Twine truncateString(const StringRef &S, size_t n) {
-  return (S.size() > n) ? Twine(S.substr(0, n)) + "..." : Twine(S);
-}
-
-template <typename T> static bool containsNullptr(const T &Collection) {
-  for (const auto &E : Collection)
-    if (E == nullptr)
-      return true;
-  return false;
-}
-
-static std::string getLabel(const GraphDiffRenderer::GraphT::EdgeValueType &E,
-                            GraphDiffRenderer::StatType EL) {
-  auto &EdgeAttr = E.second;
-  switch (EL) {
-  case GraphDiffRenderer::StatType::NONE:
-    return "";
-  default:
-    if (containsNullptr(EdgeAttr.CorrEdgePtr))
-      return "";
-
-    const auto &LeftStat = EdgeAttr.CorrEdgePtr[0]->second.S;
-    const auto &RightStat = EdgeAttr.CorrEdgePtr[1]->second.S;
-
-    double RelDiff = statRelDiff(LeftStat, RightStat, EL);
-    return formatv(R"({0:P})", RelDiff);
-  }
-}
-
-static std::string getLabel(const GraphDiffRenderer::GraphT::VertexValueType &V,
-                            GraphDiffRenderer::StatType VL, int TrunLen) {
-  const auto &VertexId = V.first;
-  const auto &VertexAttr = V.second;
-  switch (VL) {
-  case GraphDiffRenderer::StatType::NONE:
-    return formatv(R"({0})", truncateString(VertexId, TrunLen).str());
-  default:
-    if (containsNullptr(VertexAttr.CorrVertexPtr))
-      return formatv(R"({0})", truncateString(VertexId, TrunLen).str());
-
-    const auto &LeftStat = VertexAttr.CorrVertexPtr[0]->second.S;
-    const auto &RightStat = VertexAttr.CorrVertexPtr[1]->second.S;
-
-    double RelDiff = statRelDiff(LeftStat, RightStat, VL);
-    return formatv(R"({{{0}|{1:P}})", truncateString(VertexId, TrunLen).str(),
-                   RelDiff);
-  }
-}
-
-static double getLineWidth(const GraphDiffRenderer::GraphT::EdgeValueType &E,
-                           GraphDiffRenderer::StatType EL) {
-  auto &EdgeAttr = E.second;
-  switch (EL) {
-  case GraphDiffRenderer::StatType::NONE:
-    return 1.0;
-  default:
-    if (containsNullptr(EdgeAttr.CorrEdgePtr))
-      return 1.0;
-
-    const auto &LeftStat = EdgeAttr.CorrEdgePtr[0]->second.S;
-    const auto &RightStat = EdgeAttr.CorrEdgePtr[1]->second.S;
-
-    double RelDiff = statRelDiff(LeftStat, RightStat, EL);
-    return (RelDiff > 1.0) ? RelDiff : 1.0;
-  }
-}
-
-void GraphDiffRenderer::exportGraphAsDOT(raw_ostream &OS, StatType EdgeLabel,
-                                         StatType EdgeColor,
-                                         StatType VertexLabel,
-                                         StatType VertexColor, int TruncLen) {
-  // Get numbering of vertices for dot output.
-  StringMap<int32_t> VertexNo;
-
-  int i = 0;
-  for (const auto &V : G.vertices()) {
-    VertexNo[V.first] = i++;
-  }
-
-  ColorHelper H(ColorHelper::DivergingScheme::PiYG);
-
-  OS << "digraph xrayDiff {\n";
-
-  if (VertexLabel != StatType::NONE)
-    OS << "node [shape=record]\n";
-
-  for (const auto &E : G.edges()) {
-    const auto &HeadId = E.first.first;
-    const auto &TailId = E.first.second;
-    OS << formatv(R"(F{0} -> F{1} [tooltip="{2} -> {3}" label="{4}" )"
-                  R"(color="{5}" labelfontcolor="{5}" penwidth={6}])"
-                  "\n",
-                  VertexNo[HeadId], VertexNo[TailId],
-                  (HeadId.equals("")) ? static_cast<StringRef>("F0") : HeadId,
-                  TailId, getLabel(E, EdgeLabel), getColor(E, G, H, EdgeColor),
-                  getLineWidth(E, EdgeColor));
-  }
-
-  for (const auto &V : G.vertices()) {
-    const auto &VertexId = V.first;
-    if (VertexId.equals("")) {
-      OS << formatv(R"(F{0} [label="F0"])"
-                    "\n",
-                    VertexNo[VertexId]);
-      continue;
-    }
-    OS << formatv(R"(F{0} [label="{1}" color="{2}"])"
-                  "\n",
-                  VertexNo[VertexId], getLabel(V, VertexLabel, TruncLen),
-                  getColor(V, G, H, VertexColor));
-  }
-
-  OS << "}\n";
-}
-
-template <typename T> static T &ifSpecified(T &A, cl::alias &AA, T &B) {
-  if (A.getPosition() == 0 && AA.getPosition() == 0)
-    return B;
-
-  return A;
-}
-
-static CommandRegistration Unused(&GraphDiff, []() -> Error {
-  std::array<GraphRenderer::Factory, 2> Factories{
-      {{ifSpecified(GraphDiffKeepGoing1, GraphDiffKeepGoing1A,
-                    GraphDiffKeepGoing),
-        ifSpecified(GraphDiffDeduceSiblingCalls1, GraphDiffDeduceSiblingCalls1A,
-                    GraphDiffDeduceSiblingCalls),
-        ifSpecified(GraphDiffInstrMap1, GraphDiffInstrMap1A, GraphDiffInstrMap),
-        Trace()},
-       {ifSpecified(GraphDiffKeepGoing2, GraphDiffKeepGoing2A,
-                    GraphDiffKeepGoing),
-        ifSpecified(GraphDiffDeduceSiblingCalls2, GraphDiffDeduceSiblingCalls2A,
-                    GraphDiffDeduceSiblingCalls),
-        ifSpecified(GraphDiffInstrMap2, GraphDiffInstrMap2A, GraphDiffInstrMap),
-        Trace()}}};
-
-  std::array<std::string, 2> Inputs{{GraphDiffInput1, GraphDiffInput2}};
-
-  std::array<GraphRenderer::GraphT, 2> Graphs;
-
-  for (int i = 0; i < 2; i++) {
-    auto TraceOrErr = loadTraceFile(Inputs[i], true);
-    if (!TraceOrErr)
-      return make_error<StringError>(
-          Twine("Failed Loading Input File '") + Inputs[i] + "'",
-          make_error_code(llvm::errc::invalid_argument));
-    Factories[i].Trace = std::move(*TraceOrErr);
-
-    auto GraphRendererOrErr = Factories[i].getGraphRenderer();
-
-    if (!GraphRendererOrErr)
-      return GraphRendererOrErr.takeError();
-
-    auto GraphRenderer = *GraphRendererOrErr;
-
-    Graphs[i] = GraphRenderer.getGraph();
-  }
-
-  GraphDiffRenderer::Factory DGF(Graphs[0], Graphs[1]);
-
-  auto GDROrErr = DGF.getGraphDiffRenderer();
-  if (!GDROrErr)
-    return GDROrErr.takeError();
-
-  auto &GDR = *GDROrErr;
-
-  std::error_code EC;
-  raw_fd_ostream OS(GraphDiffOutput, EC, sys::fs::OpenFlags::F_Text);
-  if (EC)
-    return make_error<StringError>(
-        Twine("Cannot open file '") + GraphDiffOutput + "' for writing.", EC);
-
-  GDR.exportGraphAsDOT(OS, GraphDiffEdgeLabel, GraphDiffEdgeColor,
-                       GraphDiffVertexLabel, GraphDiffVertexColor,
-                       GraphDiffVertexLabelTrunc);
-
-  return Error::success();
-});
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-graph.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-graph.cc
deleted file mode 100644
index 685c24cb9187..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-graph.cc
+++ /dev/null
@@ -1,521 +0,0 @@
-//===-- xray-graph.cc - XRay Function Call Graph Renderer -----------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Generate a DOT file to represent the function call graph encountered in
-// the trace.
-//
-//===----------------------------------------------------------------------===//
-#include <algorithm>
-#include <cassert>
-#include <cmath>
-#include <system_error>
-#include <utility>
-
-#include "xray-graph.h"
-#include "xray-registry.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/FormatVariadic.h"
-#include "llvm/XRay/InstrumentationMap.h"
-#include "llvm/XRay/Trace.h"
-#include "llvm/XRay/YAMLXRayRecord.h"
-
-using namespace llvm;
-using namespace llvm::xray;
-
-// Setup llvm-xray graph subcommand and its options.
-static cl::SubCommand GraphC("graph", "Generate function-call graph");
-static cl::opt<std::string> GraphInput(cl::Positional,
-                                       cl::desc("<xray log file>"),
-                                       cl::Required, cl::sub(GraphC));
-
-static cl::opt<bool>
-    GraphKeepGoing("keep-going", cl::desc("Keep going on errors encountered"),
-                   cl::sub(GraphC), cl::init(false));
-static cl::alias GraphKeepGoing2("k", cl::aliasopt(GraphKeepGoing),
-                                 cl::desc("Alias for -keep-going"),
-                                 cl::sub(GraphC));
-
-static cl::opt<std::string>
-    GraphOutput("output", cl::value_desc("Output file"), cl::init("-"),
-                cl::desc("output file; use '-' for stdout"), cl::sub(GraphC));
-static cl::alias GraphOutput2("o", cl::aliasopt(GraphOutput),
-                              cl::desc("Alias for -output"), cl::sub(GraphC));
-
-static cl::opt<std::string>
-    GraphInstrMap("instr_map",
-                  cl::desc("binary with the instrumrntation map, or "
-                           "a separate instrumentation map"),
-                  cl::value_desc("binary with xray_instr_map"), cl::sub(GraphC),
-                  cl::init(""));
-static cl::alias GraphInstrMap2("m", cl::aliasopt(GraphInstrMap),
-                                cl::desc("alias for -instr_map"),
-                                cl::sub(GraphC));
-
-static cl::opt<bool> GraphDeduceSiblingCalls(
-    "deduce-sibling-calls",
-    cl::desc("Deduce sibling calls when unrolling function call stacks"),
-    cl::sub(GraphC), cl::init(false));
-static cl::alias
-    GraphDeduceSiblingCalls2("d", cl::aliasopt(GraphDeduceSiblingCalls),
-                             cl::desc("Alias for -deduce-sibling-calls"),
-                             cl::sub(GraphC));
-
-static cl::opt<GraphRenderer::StatType>
-    GraphEdgeLabel("edge-label",
-                   cl::desc("Output graphs with edges labeled with this field"),
-                   cl::value_desc("field"), cl::sub(GraphC),
-                   cl::init(GraphRenderer::StatType::NONE),
-                   cl::values(clEnumValN(GraphRenderer::StatType::NONE, "none",
-                                         "Do not label Edges"),
-                              clEnumValN(GraphRenderer::StatType::COUNT,
-                                         "count", "function call counts"),
-                              clEnumValN(GraphRenderer::StatType::MIN, "min",
-                                         "minimum function durations"),
-                              clEnumValN(GraphRenderer::StatType::MED, "med",
-                                         "median function durations"),
-                              clEnumValN(GraphRenderer::StatType::PCT90, "90p",
-                                         "90th percentile durations"),
-                              clEnumValN(GraphRenderer::StatType::PCT99, "99p",
-                                         "99th percentile durations"),
-                              clEnumValN(GraphRenderer::StatType::MAX, "max",
-                                         "maximum function durations"),
-                              clEnumValN(GraphRenderer::StatType::SUM, "sum",
-                                         "sum of call durations")));
-static cl::alias GraphEdgeLabel2("e", cl::aliasopt(GraphEdgeLabel),
-                                 cl::desc("Alias for -edge-label"),
-                                 cl::sub(GraphC));
-
-static cl::opt<GraphRenderer::StatType> GraphVertexLabel(
-    "vertex-label",
-    cl::desc("Output graphs with vertices labeled with this field"),
-    cl::value_desc("field"), cl::sub(GraphC),
-    cl::init(GraphRenderer::StatType::NONE),
-    cl::values(clEnumValN(GraphRenderer::StatType::NONE, "none",
-                          "Do not label Vertices"),
-               clEnumValN(GraphRenderer::StatType::COUNT, "count",
-                          "function call counts"),
-               clEnumValN(GraphRenderer::StatType::MIN, "min",
-                          "minimum function durations"),
-               clEnumValN(GraphRenderer::StatType::MED, "med",
-                          "median function durations"),
-               clEnumValN(GraphRenderer::StatType::PCT90, "90p",
-                          "90th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::PCT99, "99p",
-                          "99th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::MAX, "max",
-                          "maximum function durations"),
-               clEnumValN(GraphRenderer::StatType::SUM, "sum",
-                          "sum of call durations")));
-static cl::alias GraphVertexLabel2("v", cl::aliasopt(GraphVertexLabel),
-                                   cl::desc("Alias for -edge-label"),
-                                   cl::sub(GraphC));
-
-static cl::opt<GraphRenderer::StatType> GraphEdgeColorType(
-    "color-edges",
-    cl::desc("Output graphs with edge colors determined by this field"),
-    cl::value_desc("field"), cl::sub(GraphC),
-    cl::init(GraphRenderer::StatType::NONE),
-    cl::values(clEnumValN(GraphRenderer::StatType::NONE, "none",
-                          "Do not color Edges"),
-               clEnumValN(GraphRenderer::StatType::COUNT, "count",
-                          "function call counts"),
-               clEnumValN(GraphRenderer::StatType::MIN, "min",
-                          "minimum function durations"),
-               clEnumValN(GraphRenderer::StatType::MED, "med",
-                          "median function durations"),
-               clEnumValN(GraphRenderer::StatType::PCT90, "90p",
-                          "90th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::PCT99, "99p",
-                          "99th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::MAX, "max",
-                          "maximum function durations"),
-               clEnumValN(GraphRenderer::StatType::SUM, "sum",
-                          "sum of call durations")));
-static cl::alias GraphEdgeColorType2("c", cl::aliasopt(GraphEdgeColorType),
-                                     cl::desc("Alias for -color-edges"),
-                                     cl::sub(GraphC));
-
-static cl::opt<GraphRenderer::StatType> GraphVertexColorType(
-    "color-vertices",
-    cl::desc("Output graphs with vertex colors determined by this field"),
-    cl::value_desc("field"), cl::sub(GraphC),
-    cl::init(GraphRenderer::StatType::NONE),
-    cl::values(clEnumValN(GraphRenderer::StatType::NONE, "none",
-                          "Do not color vertices"),
-               clEnumValN(GraphRenderer::StatType::COUNT, "count",
-                          "function call counts"),
-               clEnumValN(GraphRenderer::StatType::MIN, "min",
-                          "minimum function durations"),
-               clEnumValN(GraphRenderer::StatType::MED, "med",
-                          "median function durations"),
-               clEnumValN(GraphRenderer::StatType::PCT90, "90p",
-                          "90th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::PCT99, "99p",
-                          "99th percentile durations"),
-               clEnumValN(GraphRenderer::StatType::MAX, "max",
-                          "maximum function durations"),
-               clEnumValN(GraphRenderer::StatType::SUM, "sum",
-                          "sum of call durations")));
-static cl::alias GraphVertexColorType2("b", cl::aliasopt(GraphVertexColorType),
-                                       cl::desc("Alias for -edge-label"),
-                                       cl::sub(GraphC));
-
-template <class T> T diff(T L, T R) { return std::max(L, R) - std::min(L, R); }
-
-// Updates the statistics for a GraphRenderer::TimeStat
-static void updateStat(GraphRenderer::TimeStat &S, int64_t L) {
-  S.Count++;
-  if (S.Min > L || S.Min == 0)
-    S.Min = L;
-  if (S.Max < L)
-    S.Max = L;
-  S.Sum += L;
-}
-
-// Evaluates an XRay record and performs accounting on it.
-//
-// If the record is an ENTER record it pushes the FuncID and TSC onto a
-// structure representing the call stack for that function.
-// If the record is an EXIT record it checks computes computes the ammount of
-// time the function took to complete and then stores that information in an
-// edge of the graph. If there is no matching ENTER record the function tries
-// to recover by assuming that there were EXIT records which were missed, for
-// example caused by tail call elimination and if the option is enabled then
-// then tries to recover from this.
-//
-// This funciton will also error if the records are out of order, as the trace
-// is expected to be sorted.
-//
-// The graph generated has an immaginary root for functions called by no-one at
-// FuncId 0.
-//
-// FIXME: Refactor this and account subcommand to reduce code duplication.
-Error GraphRenderer::accountRecord(const XRayRecord &Record) {
-  using std::make_error_code;
-  using std::errc;
-  if (CurrentMaxTSC == 0)
-    CurrentMaxTSC = Record.TSC;
-
-  if (Record.TSC < CurrentMaxTSC)
-    return make_error<StringError>("Records not in order",
-                                   make_error_code(errc::invalid_argument));
-
-  auto &ThreadStack = PerThreadFunctionStack[Record.TId];
-  switch (Record.Type) {
-  case RecordTypes::ENTER: {
-    if (Record.FuncId != 0 && G.count(Record.FuncId) == 0)
-      G[Record.FuncId].SymbolName = FuncIdHelper.SymbolOrNumber(Record.FuncId);
-    ThreadStack.push_back({Record.FuncId, Record.TSC});
-    break;
-  }
-  case RecordTypes::EXIT: {
-    // FIXME: Refactor this and the account subcommand to reduce code
-    // duplication
-    if (ThreadStack.size() == 0 || ThreadStack.back().FuncId != Record.FuncId) {
-      if (!DeduceSiblingCalls)
-        return make_error<StringError>("No matching ENTRY record",
-                                       make_error_code(errc::invalid_argument));
-      auto Parent = std::find_if(
-          ThreadStack.rbegin(), ThreadStack.rend(),
-          [&](const FunctionAttr &A) { return A.FuncId == Record.FuncId; });
-      if (Parent == ThreadStack.rend())
-        return make_error<StringError>(
-            "No matching Entry record in stack",
-            make_error_code(errc::invalid_argument)); // There is no matching
-                                                      // Function for this exit.
-      while (ThreadStack.back().FuncId != Record.FuncId) {
-        TimestampT D = diff(ThreadStack.back().TSC, Record.TSC);
-        VertexIdentifier TopFuncId = ThreadStack.back().FuncId;
-        ThreadStack.pop_back();
-        assert(ThreadStack.size() != 0);
-        EdgeIdentifier EI(ThreadStack.back().FuncId, TopFuncId);
-        auto &EA = G[EI];
-        EA.Timings.push_back(D);
-        updateStat(EA.S, D);
-        updateStat(G[TopFuncId].S, D);
-      }
-    }
-    uint64_t D = diff(ThreadStack.back().TSC, Record.TSC);
-    ThreadStack.pop_back();
-    VertexIdentifier VI = ThreadStack.empty() ? 0 : ThreadStack.back().FuncId;
-    EdgeIdentifier EI(VI, Record.FuncId);
-    auto &EA = G[EI];
-    EA.Timings.push_back(D);
-    updateStat(EA.S, D);
-    updateStat(G[Record.FuncId].S, D);
-    break;
-  }
-  }
-
-  return Error::success();
-}
-
-template <typename U>
-void GraphRenderer::getStats(U begin, U end, GraphRenderer::TimeStat &S) {
-  if (begin == end) return;
-  std::ptrdiff_t MedianOff = S.Count / 2;
-  std::nth_element(begin, begin + MedianOff, end);
-  S.Median = *(begin + MedianOff);
-  std::ptrdiff_t Pct90Off = (S.Count * 9) / 10;
-  std::nth_element(begin, begin + Pct90Off, end);
-  S.Pct90 = *(begin + Pct90Off);
-  std::ptrdiff_t Pct99Off = (S.Count * 99) / 100;
-  std::nth_element(begin, begin + Pct99Off, end);
-  S.Pct99 = *(begin + Pct99Off);
-}
-
-void GraphRenderer::updateMaxStats(const GraphRenderer::TimeStat &S,
-                                   GraphRenderer::TimeStat &M) {
-  M.Count = std::max(M.Count, S.Count);
-  M.Min = std::max(M.Min, S.Min);
-  M.Median = std::max(M.Median, S.Median);
-  M.Pct90 = std::max(M.Pct90, S.Pct90);
-  M.Pct99 = std::max(M.Pct99, S.Pct99);
-  M.Max = std::max(M.Max, S.Max);
-  M.Sum = std::max(M.Sum, S.Sum);
-}
-
-void GraphRenderer::calculateEdgeStatistics() {
-  assert(!G.edges().empty());
-  for (auto &E : G.edges()) {
-    auto &A = E.second;
-    assert(!A.Timings.empty());
-    getStats(A.Timings.begin(), A.Timings.end(), A.S);
-    updateMaxStats(A.S, G.GraphEdgeMax);
-  }
-}
-
-void GraphRenderer::calculateVertexStatistics() {
-  std::vector<uint64_t> TempTimings;
-  for (auto &V : G.vertices()) {
-    if (V.first != 0) {
-      for (auto &E : G.inEdges(V.first)) {
-        auto &A = E.second;
-        TempTimings.insert(TempTimings.end(), A.Timings.begin(),
-                           A.Timings.end());
-      }
-      getStats(TempTimings.begin(), TempTimings.end(), G[V.first].S);
-      updateMaxStats(G[V.first].S, G.GraphVertexMax);
-      TempTimings.clear();
-    }
-  }
-}
-
-// A Helper function for normalizeStatistics which normalises a single
-// TimeStat element.
-static void normalizeTimeStat(GraphRenderer::TimeStat &S,
-                              double CycleFrequency) {
-  int64_t OldCount = S.Count;
-  S = S / CycleFrequency;
-  S.Count = OldCount;
-}
-
-// Normalises the statistics in the graph for a given TSC frequency.
-void GraphRenderer::normalizeStatistics(double CycleFrequency) {
-  for (auto &E : G.edges()) {
-    auto &S = E.second.S;
-    normalizeTimeStat(S, CycleFrequency);
-  }
-  for (auto &V : G.vertices()) {
-    auto &S = V.second.S;
-    normalizeTimeStat(S, CycleFrequency);
-  }
-
-  normalizeTimeStat(G.GraphEdgeMax, CycleFrequency);
-  normalizeTimeStat(G.GraphVertexMax, CycleFrequency);
-}
-
-// Returns a string containing the value of statistic field T
-std::string
-GraphRenderer::TimeStat::getString(GraphRenderer::StatType T) const {
-  std::string St;
-  raw_string_ostream S{St};
-  double TimeStat::*DoubleStatPtrs[] = {&TimeStat::Min,   &TimeStat::Median,
-                                        &TimeStat::Pct90, &TimeStat::Pct99,
-                                        &TimeStat::Max,   &TimeStat::Sum};
-  switch (T) {
-  case GraphRenderer::StatType::NONE:
-    break;
-  case GraphRenderer::StatType::COUNT:
-    S << Count;
-    break;
-  default:
-    S << (*this).*
-             DoubleStatPtrs[static_cast<int>(T) -
-                            static_cast<int>(GraphRenderer::StatType::MIN)];
-    break;
-  }
-  return S.str();
-}
-
-// Returns the quotient between the property T of this and another TimeStat as
-// a double
-double GraphRenderer::TimeStat::getDouble(StatType T) const {
-  double retval = 0;
-  double TimeStat::*DoubleStatPtrs[] = {&TimeStat::Min,   &TimeStat::Median,
-                                        &TimeStat::Pct90, &TimeStat::Pct99,
-                                        &TimeStat::Max,   &TimeStat::Sum};
-  switch (T) {
-  case GraphRenderer::StatType::NONE:
-    retval = 0.0;
-    break;
-  case GraphRenderer::StatType::COUNT:
-    retval = static_cast<double>(Count);
-    break;
-  default:
-    retval =
-        (*this).*DoubleStatPtrs[static_cast<int>(T) -
-                                static_cast<int>(GraphRenderer::StatType::MIN)];
-    break;
-  }
-  return retval;
-}
-
-// Outputs a DOT format version of the Graph embedded in the GraphRenderer
-// object on OS. It does this in the expected way by itterating
-// through all edges then vertices and then outputting them and their
-// annotations.
-//
-// FIXME: output more information, better presented.
-void GraphRenderer::exportGraphAsDOT(raw_ostream &OS, StatType ET, StatType EC,
-                                     StatType VT, StatType VC) {
-  OS << "digraph xray {\n";
-
-  if (VT != StatType::NONE)
-    OS << "node [shape=record];\n";
-
-  for (const auto &E : G.edges()) {
-    const auto &S = E.second.S;
-    OS << "F" << E.first.first << " -> "
-       << "F" << E.first.second << " [label=\"" << S.getString(ET) << "\"";
-    if (EC != StatType::NONE)
-      OS << " color=\""
-         << CHelper.getColorString(
-                std::sqrt(S.getDouble(EC) / G.GraphEdgeMax.getDouble(EC)))
-         << "\"";
-    OS << "];\n";
-  }
-
-  for (const auto &V : G.vertices()) {
-    const auto &VA = V.second;
-    if (V.first == 0)
-      continue;
-    OS << "F" << V.first << " [label=\"" << (VT != StatType::NONE ? "{" : "")
-       << (VA.SymbolName.size() > 40 ? VA.SymbolName.substr(0, 40) + "..."
-                                     : VA.SymbolName);
-    if (VT != StatType::NONE)
-      OS << "|" << VA.S.getString(VT) << "}\"";
-    else
-      OS << "\"";
-    if (VC != StatType::NONE)
-      OS << " color=\""
-         << CHelper.getColorString(
-                std::sqrt(VA.S.getDouble(VC) / G.GraphVertexMax.getDouble(VC)))
-         << "\"";
-    OS << "];\n";
-  }
-  OS << "}\n";
-}
-
-Expected<GraphRenderer> GraphRenderer::Factory::getGraphRenderer() {
-  InstrumentationMap Map;
-  if (!GraphInstrMap.empty()) {
-    auto InstrumentationMapOrError = loadInstrumentationMap(GraphInstrMap);
-    if (!InstrumentationMapOrError)
-      return joinErrors(
-          make_error<StringError>(
-              Twine("Cannot open instrumentation map '") + GraphInstrMap + "'",
-              std::make_error_code(std::errc::invalid_argument)),
-          InstrumentationMapOrError.takeError());
-    Map = std::move(*InstrumentationMapOrError);
-  }
-
-  const auto &FunctionAddresses = Map.getFunctionAddresses();
-
-  symbolize::LLVMSymbolizer::Options Opts(
-      symbolize::FunctionNameKind::LinkageName, true, true, false, "");
-  symbolize::LLVMSymbolizer Symbolizer(Opts);
-  const auto &Header = Trace.getFileHeader();
-
-  llvm::xray::FuncIdConversionHelper FuncIdHelper(InstrMap, Symbolizer,
-                                                  FunctionAddresses);
-
-  xray::GraphRenderer GR(FuncIdHelper, DeduceSiblingCalls);
-  for (const auto &Record : Trace) {
-    auto E = GR.accountRecord(Record);
-    if (!E)
-      continue;
-
-    for (const auto &ThreadStack : GR.getPerThreadFunctionStack()) {
-      errs() << "Thread ID: " << ThreadStack.first << "\n";
-      auto Level = ThreadStack.second.size();
-      for (const auto &Entry : llvm::reverse(ThreadStack.second))
-        errs() << "#" << Level-- << "\t"
-               << FuncIdHelper.SymbolOrNumber(Entry.FuncId) << '\n';
-    }
-
-    if (!GraphKeepGoing)
-      return joinErrors(make_error<StringError>(
-                            "Error encountered generating the call graph.",
-                            std::make_error_code(std::errc::invalid_argument)),
-                        std::move(E));
-
-    handleAllErrors(std::move(E),
-                    [&](const ErrorInfoBase &E) { E.log(errs()); });
-  }
-
-  GR.G.GraphEdgeMax = {};
-  GR.G.GraphVertexMax = {};
-  GR.calculateEdgeStatistics();
-  GR.calculateVertexStatistics();
-
-  if (Header.CycleFrequency)
-    GR.normalizeStatistics(Header.CycleFrequency);
-
-  return GR;
-}
-
-// Here we register and implement the llvm-xray graph subcommand.
-// The bulk of this code reads in the options, opens the required files, uses
-// those files to create a context for analysing the xray trace, then there is a
-// short loop which actually analyses the trace, generates the graph and then
-// outputs it as a DOT.
-//
-// FIXME: include additional filtering and annalysis passes to provide more
-// specific useful information.
-static CommandRegistration Unused(&GraphC, []() -> Error {
-  GraphRenderer::Factory F;
-
-  F.KeepGoing = GraphKeepGoing;
-  F.DeduceSiblingCalls = GraphDeduceSiblingCalls;
-  F.InstrMap = GraphInstrMap;
-
-  auto TraceOrErr = loadTraceFile(GraphInput, true);
-
-  if (!TraceOrErr)
-    return make_error<StringError>(
-        Twine("Failed loading input file '") + GraphInput + "'",
-        make_error_code(llvm::errc::invalid_argument));
-
-  F.Trace = std::move(*TraceOrErr);
-  auto GROrError = F.getGraphRenderer();
-  if (!GROrError)
-    return GROrError.takeError();
-  auto &GR = *GROrError;
-
-  std::error_code EC;
-  raw_fd_ostream OS(GraphOutput, EC, sys::fs::OpenFlags::F_Text);
-  if (EC)
-    return make_error<StringError>(
-        Twine("Cannot open file '") + GraphOutput + "' for writing.", EC);
-
-  GR.exportGraphAsDOT(OS, GraphEdgeLabel, GraphEdgeColorType, GraphVertexLabel,
-                      GraphVertexColorType);
-  return Error::success();
-});
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-record-yaml.h b/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-record-yaml.h
deleted file mode 100644
index abce8ff60a94..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-record-yaml.h
+++ /dev/null
@@ -1,102 +0,0 @@
-//===- xray-record-yaml.h - XRay Record YAML Support Definitions ----------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Types and traits specialisations for YAML I/O of XRay log entries.
-//
-//===----------------------------------------------------------------------===//
-#ifndef LLVM_TOOLS_LLVM_XRAY_XRAY_RECORD_YAML_H
-#define LLVM_TOOLS_LLVM_XRAY_XRAY_RECORD_YAML_H
-
-#include <type_traits>
-
-#include "xray-record.h"
-#include "llvm/Support/YAMLTraits.h"
-
-namespace llvm {
-namespace xray {
-
-struct YAMLXRayFileHeader {
-  uint16_t Version;
-  uint16_t Type;
-  bool ConstantTSC;
-  bool NonstopTSC;
-  uint64_t CycleFrequency;
-};
-
-struct YAMLXRayRecord {
-  uint16_t RecordType;
-  uint8_t CPU;
-  RecordTypes Type;
-  int32_t FuncId;
-  std::string Function;
-  uint64_t TSC;
-  uint32_t TId;
-};
-
-struct YAMLXRayTrace {
-  YAMLXRayFileHeader Header;
-  std::vector<YAMLXRayRecord> Records;
-};
-
-using XRayRecordStorage =
-    std::aligned_storage<sizeof(XRayRecord), alignof(XRayRecord)>::type;
-
-} // namespace xray
-
-namespace yaml {
-
-// YAML Traits
-// -----------
-template <> struct ScalarEnumerationTraits<xray::RecordTypes> {
-  static void enumeration(IO &IO, xray::RecordTypes &Type) {
-    IO.enumCase(Type, "function-enter", xray::RecordTypes::ENTER);
-    IO.enumCase(Type, "function-exit", xray::RecordTypes::EXIT);
-  }
-};
-
-template <> struct MappingTraits<xray::YAMLXRayFileHeader> {
-  static void mapping(IO &IO, xray::YAMLXRayFileHeader &Header) {
-    IO.mapRequired("version", Header.Version);
-    IO.mapRequired("type", Header.Type);
-    IO.mapRequired("constant-tsc", Header.ConstantTSC);
-    IO.mapRequired("nonstop-tsc", Header.NonstopTSC);
-    IO.mapRequired("cycle-frequency", Header.CycleFrequency);
-  }
-};
-
-template <> struct MappingTraits<xray::YAMLXRayRecord> {
-  static void mapping(IO &IO, xray::YAMLXRayRecord &Record) {
-    // FIXME: Make this type actually be descriptive
-    IO.mapRequired("type", Record.RecordType);
-    IO.mapRequired("func-id", Record.FuncId);
-    IO.mapOptional("function", Record.Function);
-    IO.mapRequired("cpu", Record.CPU);
-    IO.mapRequired("thread", Record.TId);
-    IO.mapRequired("kind", Record.Type);
-    IO.mapRequired("tsc", Record.TSC);
-  }
-
-  static constexpr bool flow = true;
-};
-
-template <> struct MappingTraits<xray::YAMLXRayTrace> {
-  static void mapping(IO &IO, xray::YAMLXRayTrace &Trace) {
-    // A trace file contains two parts, the header and the list of all the
-    // trace records.
-    IO.mapRequired("header", Trace.Header);
-    IO.mapRequired("records", Trace.Records);
-  }
-};
-
-} // namespace yaml
-} // namespace llvm
-
-LLVM_YAML_IS_SEQUENCE_VECTOR(xray::YAMLXRayRecord) 
-
-#endif // LLVM_TOOLS_LLVM_XRAY_XRAY_RECORD_YAML_H
diff --git a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-registry.cc b/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-registry.cc
deleted file mode 100644
index 36d3a2e58f97..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/llvm-xray/xray-registry.cc
+++ /dev/null
@@ -1,41 +0,0 @@
-//===- xray-registry.cc - Implement a command registry. -------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Implement a simple subcommand registry.
-//
-//===----------------------------------------------------------------------===//
-#include "xray-registry.h"
-
-#include "llvm/Support/ManagedStatic.h"
-#include <unordered_map>
-
-namespace llvm {
-namespace xray {
-
-using HandlerType = std::function<Error()>;
-
-ManagedStatic<std::unordered_map<cl::SubCommand *, HandlerType>> Commands;
-
-CommandRegistration::CommandRegistration(cl::SubCommand *SC,
-                                         HandlerType Command) {
-  assert(Commands->count(SC) == 0 &&
-         "Attempting to overwrite a command handler");
-  assert(Command && "Attempting to register an empty std::function<Error()>");
-  (*Commands)[SC] = Command;
-}
-
-HandlerType dispatch(cl::SubCommand *SC) {
-  auto It = Commands->find(SC);
-  assert(It != Commands->end() &&
-         "Attempting to dispatch on un-registered SubCommand.");
-  return It->second;
-}
-
-} // namespace xray
-} // namespace llvm
diff --git a/external/bsd/llvm/dist/llvm/tools/sancov/sancov.cc b/external/bsd/llvm/dist/llvm/tools/sancov/sancov.cc
deleted file mode 100644
index 7f103ebb904b..000000000000
--- a/external/bsd/llvm/dist/llvm/tools/sancov/sancov.cc
+++ /dev/null
@@ -1,1267 +0,0 @@
-//===-- sancov.cc --------------------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file is a command-line tool for reading and analyzing sanitizer
-// coverage.
-//===----------------------------------------------------------------------===//
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/ADT/Twine.h"
-#include "llvm/DebugInfo/Symbolize/Symbolize.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCDisassembler/MCDisassembler.h"
-#include "llvm/MC/MCInst.h"
-#include "llvm/MC/MCInstPrinter.h"
-#include "llvm/MC/MCInstrAnalysis.h"
-#include "llvm/MC/MCInstrInfo.h"
-#include "llvm/MC/MCObjectFileInfo.h"
-#include "llvm/MC/MCRegisterInfo.h"
-#include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Object/Archive.h"
-#include "llvm/Object/Binary.h"
-#include "llvm/Object/COFF.h"
-#include "llvm/Object/ELFObjectFile.h"
-#include "llvm/Object/MachO.h"
-#include "llvm/Object/ObjectFile.h"
-#include "llvm/Support/Casting.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Errc.h"
-#include "llvm/Support/ErrorOr.h"
-#include "llvm/Support/FileSystem.h"
-#include "llvm/Support/LineIterator.h"
-#include "llvm/Support/MD5.h"
-#include "llvm/Support/ManagedStatic.h"
-#include "llvm/Support/MemoryBuffer.h"
-#include "llvm/Support/Path.h"
-#include "llvm/Support/PrettyStackTrace.h"
-#include "llvm/Support/Regex.h"
-#include "llvm/Support/SHA1.h"
-#include "llvm/Support/Signals.h"
-#include "llvm/Support/SourceMgr.h"
-#include "llvm/Support/SpecialCaseList.h"
-#include "llvm/Support/TargetRegistry.h"
-#include "llvm/Support/TargetSelect.h"
-#include "llvm/Support/ToolOutputFile.h"
-#include "llvm/Support/YAMLParser.h"
-#include "llvm/Support/raw_ostream.h"
-
-#include <algorithm>
-#include <set>
-#include <stdio.h>
-#include <string>
-#include <utility>
-#include <vector>
-
-using namespace llvm;
-
-namespace {
-
-// --------- COMMAND LINE FLAGS ---------
-
-enum ActionType {
-  CoveredFunctionsAction,
-  HtmlReportAction,
-  MergeAction,
-  NotCoveredFunctionsAction,
-  PrintAction,
-  PrintCovPointsAction,
-  StatsAction,
-  SymbolizeAction
-};
-
-cl::opt<ActionType> Action(
-    cl::desc("Action (required)"), cl::Required,
-    cl::values(
-        clEnumValN(PrintAction, "print", "Print coverage addresses"),
-        clEnumValN(PrintCovPointsAction, "print-coverage-pcs",
-                   "Print coverage instrumentation points addresses."),
-        clEnumValN(CoveredFunctionsAction, "covered-functions",
-                   "Print all covered funcions."),
-        clEnumValN(NotCoveredFunctionsAction, "not-covered-functions",
-                   "Print all not covered funcions."),
-        clEnumValN(StatsAction, "print-coverage-stats",
-                   "Print coverage statistics."),
-        clEnumValN(HtmlReportAction, "html-report",
-                   "REMOVED. Use -symbolize & coverage-report-server.py."),
-        clEnumValN(SymbolizeAction, "symbolize",
-                   "Produces a symbolized JSON report from binary report."),
-        clEnumValN(MergeAction, "merge", "Merges reports.")));
-
-static cl::list<std::string>
-    ClInputFiles(cl::Positional, cl::OneOrMore,
-                 cl::desc("<action> <binary files...> <.sancov files...> "
-                          "<.symcov files...>"));
-
-static cl::opt<bool> ClDemangle("demangle", cl::init(true),
-                                cl::desc("Print demangled function name."));
-
-static cl::opt<bool>
-    ClSkipDeadFiles("skip-dead-files", cl::init(true),
-                    cl::desc("Do not list dead source files in reports."));
-
-static cl::opt<std::string> ClStripPathPrefix(
-    "strip_path_prefix", cl::init(""),
-    cl::desc("Strip this prefix from file paths in reports."));
-
-static cl::opt<std::string>
-    ClBlacklist("blacklist", cl::init(""),
-                cl::desc("Blacklist file (sanitizer blacklist format)."));
-
-static cl::opt<bool> ClUseDefaultBlacklist(
-    "use_default_blacklist", cl::init(true), cl::Hidden,
-    cl::desc("Controls if default blacklist should be used."));
-
-static const char *const DefaultBlacklistStr = "fun:__sanitizer_.*\n"
-                                               "src:/usr/include/.*\n"
-                                               "src:.*/libc\\+\\+/.*\n";
-
-// --------- FORMAT SPECIFICATION ---------
-
-struct FileHeader {
-  uint32_t Bitness;
-  uint32_t Magic;
-};
-
-static const uint32_t BinCoverageMagic = 0xC0BFFFFF;
-static const uint32_t Bitness32 = 0xFFFFFF32;
-static const uint32_t Bitness64 = 0xFFFFFF64;
-
-static Regex SancovFileRegex("(.*)\\.[0-9]+\\.sancov");
-static Regex SymcovFileRegex(".*\\.symcov");
-
-// --------- MAIN DATASTRUCTURES ----------
-
-// Contents of .sancov file: list of coverage point addresses that were
-// executed.
-struct RawCoverage {
-  explicit RawCoverage(std::unique_ptr<std::set<uint64_t>> Addrs)
-      : Addrs(std::move(Addrs)) {}
-
-  // Read binary .sancov file.
-  static ErrorOr<std::unique_ptr<RawCoverage>>
-  read(const std::string &FileName);
-
-  std::unique_ptr<std::set<uint64_t>> Addrs;
-};
-
-// Coverage point has an opaque Id and corresponds to multiple source locations.
-struct CoveragePoint {
-  explicit CoveragePoint(const std::string &Id) : Id(Id) {}
-
-  std::string Id;
-  SmallVector<DILineInfo, 1> Locs;
-};
-
-// Symcov file content: set of covered Ids plus information about all available
-// coverage points.
-struct SymbolizedCoverage {
-  // Read json .symcov file.
-  static std::unique_ptr<SymbolizedCoverage> read(const std::string &InputFile);
-
-  std::set<std::string> CoveredIds;
-  std::string BinaryHash;
-  std::vector<CoveragePoint> Points;
-};
-
-struct CoverageStats {
-  size_t AllPoints;
-  size_t CovPoints;
-  size_t AllFns;
-  size_t CovFns;
-};
-
-// --------- ERROR HANDLING ---------
-
-static void fail(const llvm::Twine &E) {
-  errs() << "ERROR: " << E << "\n";
-  exit(1);
-}
-
-static void failIf(bool B, const llvm::Twine &E) {
-  if (B)
-    fail(E);
-}
-
-static void failIfError(std::error_code Error) {
-  if (!Error)
-    return;
-  errs() << "ERROR: " << Error.message() << "(" << Error.value() << ")\n";
-  exit(1);
-}
-
-template <typename T> static void failIfError(const ErrorOr<T> &E) {
-  failIfError(E.getError());
-}
-
-static void failIfError(Error Err) {
-  if (Err) {
-    logAllUnhandledErrors(std::move(Err), errs(), "ERROR: ");
-    exit(1);
-  }
-}
-
-template <typename T> static void failIfError(Expected<T> &E) {
-  failIfError(E.takeError());
-}
-
-static void failIfNotEmpty(const llvm::Twine &E) {
-  if (E.str().empty())
-    return;
-  fail(E);
-}
-
-template <typename T>
-static void failIfEmpty(const std::unique_ptr<T> &Ptr,
-                        const std::string &Message) {
-  if (Ptr.get())
-    return;
-  fail(Message);
-}
-
-// ----------- Coverage I/O ----------
-template <typename T>
-static void readInts(const char *Start, const char *End,
-                     std::set<uint64_t> *Ints) {
-  const T *S = reinterpret_cast<const T *>(Start);
-  const T *E = reinterpret_cast<const T *>(End);
-  std::copy(S, E, std::inserter(*Ints, Ints->end()));
-}
-
-ErrorOr<std::unique_ptr<RawCoverage>>
-RawCoverage::read(const std::string &FileName) {
-  ErrorOr<std::unique_ptr<MemoryBuffer>> BufOrErr =
-      MemoryBuffer::getFile(FileName);
-  if (!BufOrErr)
-    return BufOrErr.getError();
-  std::unique_ptr<MemoryBuffer> Buf = std::move(BufOrErr.get());
-  if (Buf->getBufferSize() < 8) {
-    errs() << "File too small (<8): " << Buf->getBufferSize() << '\n';
-    return make_error_code(errc::illegal_byte_sequence);
-  }
-  const FileHeader *Header =
-      reinterpret_cast<const FileHeader *>(Buf->getBufferStart());
-
-  if (Header->Magic != BinCoverageMagic) {
-    errs() << "Wrong magic: " << Header->Magic << '\n';
-    return make_error_code(errc::illegal_byte_sequence);
-  }
-
-  auto Addrs = llvm::make_unique<std::set<uint64_t>>();
-
-  switch (Header->Bitness) {
-  case Bitness64:
-    readInts<uint64_t>(Buf->getBufferStart() + 8, Buf->getBufferEnd(),
-                       Addrs.get());
-    break;
-  case Bitness32:
-    readInts<uint32_t>(Buf->getBufferStart() + 8, Buf->getBufferEnd(),
-                       Addrs.get());
-    break;
-  default:
-    errs() << "Unsupported bitness: " << Header->Bitness << '\n';
-    return make_error_code(errc::illegal_byte_sequence);
-  }
-
-  return std::unique_ptr<RawCoverage>(new RawCoverage(std::move(Addrs)));
-}
-
-// Print coverage addresses.
-raw_ostream &operator<<(raw_ostream &OS, const RawCoverage &CoverageData) {
-  for (auto Addr : *CoverageData.Addrs) {
-    OS << "0x";
-    OS.write_hex(Addr);
-    OS << "\n";
-  }
-  return OS;
-}
-
-static raw_ostream &operator<<(raw_ostream &OS, const CoverageStats &Stats) {
-  OS << "all-edges: " << Stats.AllPoints << "\n";
-  OS << "cov-edges: " << Stats.CovPoints << "\n";
-  OS << "all-functions: " << Stats.AllFns << "\n";
-  OS << "cov-functions: " << Stats.CovFns << "\n";
-  return OS;
-}
-
-// Helper for writing out JSON. Handles indents and commas using
-// scope variables for objects and arrays.
-class JSONWriter {
-public:
-  JSONWriter(raw_ostream &Out) : OS(Out) {}
-  JSONWriter(const JSONWriter &) = delete;
-  ~JSONWriter() { OS << "\n"; }
-
-  void operator<<(StringRef S) { printJSONStringLiteral(S, OS); }
-
-  // Helper RAII class to output JSON objects.
-  class Object {
-  public:
-    Object(JSONWriter *W, raw_ostream &OS) : W(W), OS(OS) {
-      OS << "{";
-      W->Indent++;
-    }
-    Object(const Object &) = delete;
-    ~Object() {
-      W->Indent--;
-      OS << "\n";
-      W->indent();
-      OS << "}";
-    }
-
-    void key(StringRef Key) {
-      Index++;
-      if (Index > 0)
-        OS << ",";
-      OS << "\n";
-      W->indent();
-      printJSONStringLiteral(Key, OS);
-      OS << " : ";
-    }
-
-  private:
-    JSONWriter *W;
-    raw_ostream &OS;
-    int Index = -1;
-  };
-
-  std::unique_ptr<Object> object() { return make_unique<Object>(this, OS); }
-
-  // Helper RAII class to output JSON arrays.
-  class Array {
-  public:
-    Array(raw_ostream &OS) : OS(OS) { OS << "["; }
-    Array(const Array &) = delete;
-    ~Array() { OS << "]"; }
-    void next() {
-      Index++;
-      if (Index > 0)
-        OS << ", ";
-    }
-
-  private:
-    raw_ostream &OS;
-    int Index = -1;
-  };
-
-  std::unique_ptr<Array> array() { return make_unique<Array>(OS); }
-
-private:
-  void indent() { OS.indent(Indent * 2); }
-
-  static void printJSONStringLiteral(StringRef S, raw_ostream &OS) {
-    if (S.find('"') == std::string::npos) {
-      OS << "\"" << S << "\"";
-      return;
-    }
-    OS << "\"";
-    for (char Ch : S.bytes()) {
-      if (Ch == '"')
-        OS << "\\";
-      OS << Ch;
-    }
-    OS << "\"";
-  }
-
-  raw_ostream &OS;
-  int Indent = 0;
-};
-
-// Output symbolized information for coverage points in JSON.
-// Format:
-// {
-//   '<file_name>' : {
-//     '<function_name>' : {
-//       '<point_id'> : '<line_number>:'<column_number'.
-//          ....
-//       }
-//    }
-// }
-static void operator<<(JSONWriter &W,
-                       const std::vector<CoveragePoint> &Points) {
-  // Group points by file.
-  auto ByFile(W.object());
-  std::map<std::string, std::vector<const CoveragePoint *>> PointsByFile;
-  for (const auto &Point : Points) {
-    for (const DILineInfo &Loc : Point.Locs) {
-      PointsByFile[Loc.FileName].push_back(&Point);
-    }
-  }
-
-  for (const auto &P : PointsByFile) {
-    std::string FileName = P.first;
-    ByFile->key(FileName);
-
-    // Group points by function.
-    auto ByFn(W.object());
-    std::map<std::string, std::vector<const CoveragePoint *>> PointsByFn;
-    for (auto PointPtr : P.second) {
-      for (const DILineInfo &Loc : PointPtr->Locs) {
-        PointsByFn[Loc.FunctionName].push_back(PointPtr);
-      }
-    }
-
-    for (const auto &P : PointsByFn) {
-      std::string FunctionName = P.first;
-      std::set<std::string> WrittenIds;
-
-      ByFn->key(FunctionName);
-
-      // Output <point_id> : "<line>:<col>".
-      auto ById(W.object());
-      for (const CoveragePoint *Point : P.second) {
-        for (const auto &Loc : Point->Locs) {
-          if (Loc.FileName != FileName || Loc.FunctionName != FunctionName)
-            continue;
-          if (WrittenIds.find(Point->Id) != WrittenIds.end())
-            continue;
-
-          WrittenIds.insert(Point->Id);
-          ById->key(Point->Id);
-          W << (utostr(Loc.Line) + ":" + utostr(Loc.Column));
-        }
-      }
-    }
-  }
-}
-
-static void operator<<(JSONWriter &W, const SymbolizedCoverage &C) {
-  auto O(W.object());
-
-  {
-    O->key("covered-points");
-    auto PointsArray(W.array());
-
-    for (const auto &P : C.CoveredIds) {
-      PointsArray->next();
-      W << P;
-    }
-  }
-
-  {
-    if (!C.BinaryHash.empty()) {
-      O->key("binary-hash");
-      W << C.BinaryHash;
-    }
-  }
-
-  {
-    O->key("point-symbol-info");
-    W << C.Points;
-  }
-}
-
-static std::string parseScalarString(yaml::Node *N) {
-  SmallString<64> StringStorage;
-  yaml::ScalarNode *S = dyn_cast<yaml::ScalarNode>(N);
-  failIf(!S, "expected string");
-  return S->getValue(StringStorage);
-}
-
-std::unique_ptr<SymbolizedCoverage>
-SymbolizedCoverage::read(const std::string &InputFile) {
-  auto Coverage(make_unique<SymbolizedCoverage>());
-
-  std::map<std::string, CoveragePoint> Points;
-  ErrorOr<std::unique_ptr<MemoryBuffer>> BufOrErr =
-      MemoryBuffer::getFile(InputFile);
-  failIfError(BufOrErr);
-
-  SourceMgr SM;
-  yaml::Stream S(**BufOrErr, SM);
-
-  yaml::document_iterator DI = S.begin();
-  failIf(DI == S.end(), "empty document: " + InputFile);
-  yaml::Node *Root = DI->getRoot();
-  failIf(!Root, "expecting root node: " + InputFile);
-  yaml::MappingNode *Top = dyn_cast<yaml::MappingNode>(Root);
-  failIf(!Top, "expecting mapping node: " + InputFile);
-
-  for (auto &KVNode : *Top) {
-    auto Key = parseScalarString(KVNode.getKey());
-
-    if (Key == "covered-points") {
-      yaml::SequenceNode *Points =
-          dyn_cast<yaml::SequenceNode>(KVNode.getValue());
-      failIf(!Points, "expected array: " + InputFile);
-
-      for (auto I = Points->begin(), E = Points->end(); I != E; ++I) {
-        Coverage->CoveredIds.insert(parseScalarString(&*I));
-      }
-    } else if (Key == "binary-hash") {
-      Coverage->BinaryHash = parseScalarString(KVNode.getValue());
-    } else if (Key == "point-symbol-info") {
-      yaml::MappingNode *PointSymbolInfo =
-          dyn_cast<yaml::MappingNode>(KVNode.getValue());
-      failIf(!PointSymbolInfo, "expected mapping node: " + InputFile);
-
-      for (auto &FileKVNode : *PointSymbolInfo) {
-        auto Filename = parseScalarString(FileKVNode.getKey());
-
-        yaml::MappingNode *FileInfo =
-            dyn_cast<yaml::MappingNode>(FileKVNode.getValue());
-        failIf(!FileInfo, "expected mapping node: " + InputFile);
-
-        for (auto &FunctionKVNode : *FileInfo) {
-          auto FunctionName = parseScalarString(FunctionKVNode.getKey());
-
-          yaml::MappingNode *FunctionInfo =
-              dyn_cast<yaml::MappingNode>(FunctionKVNode.getValue());
-          failIf(!FunctionInfo, "expected mapping node: " + InputFile);
-
-          for (auto &PointKVNode : *FunctionInfo) {
-            auto PointId = parseScalarString(PointKVNode.getKey());
-            auto Loc = parseScalarString(PointKVNode.getValue());
-
-            size_t ColonPos = Loc.find(':');
-            failIf(ColonPos == std::string::npos, "expected ':': " + InputFile);
-
-            auto LineStr = Loc.substr(0, ColonPos);
-            auto ColStr = Loc.substr(ColonPos + 1, Loc.size());
-
-            if (Points.find(PointId) == Points.end())
-              Points.insert(std::make_pair(PointId, CoveragePoint(PointId)));
-
-            DILineInfo LineInfo;
-            LineInfo.FileName = Filename;
-            LineInfo.FunctionName = FunctionName;
-            char *End;
-            LineInfo.Line = std::strtoul(LineStr.c_str(), &End, 10);
-            LineInfo.Column = std::strtoul(ColStr.c_str(), &End, 10);
-
-            CoveragePoint *CoveragePoint = &Points.find(PointId)->second;
-            CoveragePoint->Locs.push_back(LineInfo);
-          }
-        }
-      }
-    } else {
-      errs() << "Ignoring unknown key: " << Key << "\n";
-    }
-  }
-
-  for (auto &KV : Points) {
-    Coverage->Points.push_back(KV.second);
-  }
-
-  return Coverage;
-}
-
-// ---------- MAIN FUNCTIONALITY ----------
-
-std::string stripPathPrefix(std::string Path) {
-  if (ClStripPathPrefix.empty())
-    return Path;
-  size_t Pos = Path.find(ClStripPathPrefix);
-  if (Pos == std::string::npos)
-    return Path;
-  return Path.substr(Pos + ClStripPathPrefix.size());
-}
-
-static std::unique_ptr<symbolize::LLVMSymbolizer> createSymbolizer() {
-  symbolize::LLVMSymbolizer::Options SymbolizerOptions;
-  SymbolizerOptions.Demangle = ClDemangle;
-  SymbolizerOptions.UseSymbolTable = true;
-  return std::unique_ptr<symbolize::LLVMSymbolizer>(
-      new symbolize::LLVMSymbolizer(SymbolizerOptions));
-}
-
-static std::string normalizeFilename(const std::string &FileName) {
-  SmallString<256> S(FileName);
-  sys::path::remove_dots(S, /* remove_dot_dot */ true);
-  return stripPathPrefix(S.str().str());
-}
-
-class Blacklists {
-public:
-  Blacklists()
-      : DefaultBlacklist(createDefaultBlacklist()),
-        UserBlacklist(createUserBlacklist()) {}
-
-  bool isBlacklisted(const DILineInfo &I) {
-    if (DefaultBlacklist && DefaultBlacklist->inSection("fun", I.FunctionName))
-      return true;
-    if (DefaultBlacklist && DefaultBlacklist->inSection("src", I.FileName))
-      return true;
-    if (UserBlacklist && UserBlacklist->inSection("fun", I.FunctionName))
-      return true;
-    if (UserBlacklist && UserBlacklist->inSection("src", I.FileName))
-      return true;
-    return false;
-  }
-
-private:
-  static std::unique_ptr<SpecialCaseList> createDefaultBlacklist() {
-    if (!ClUseDefaultBlacklist)
-      return std::unique_ptr<SpecialCaseList>();
-    std::unique_ptr<MemoryBuffer> MB =
-        MemoryBuffer::getMemBuffer(DefaultBlacklistStr);
-    std::string Error;
-    auto Blacklist = SpecialCaseList::create(MB.get(), Error);
-    failIfNotEmpty(Error);
-    return Blacklist;
-  }
-
-  static std::unique_ptr<SpecialCaseList> createUserBlacklist() {
-    if (ClBlacklist.empty())
-      return std::unique_ptr<SpecialCaseList>();
-
-    return SpecialCaseList::createOrDie({{ClBlacklist}});
-  }
-  std::unique_ptr<SpecialCaseList> DefaultBlacklist;
-  std::unique_ptr<SpecialCaseList> UserBlacklist;
-};
-
-static std::vector<CoveragePoint>
-getCoveragePoints(const std::string &ObjectFile,
-                  const std::set<uint64_t> &Addrs,
-                  const std::set<uint64_t> &CoveredAddrs) {
-  std::vector<CoveragePoint> Result;
-  auto Symbolizer(createSymbolizer());
-  Blacklists B;
-
-  std::set<std::string> CoveredFiles;
-  if (ClSkipDeadFiles) {
-    for (auto Addr : CoveredAddrs) {
-      auto LineInfo = Symbolizer->symbolizeCode(ObjectFile, Addr);
-      failIfError(LineInfo);
-      CoveredFiles.insert(LineInfo->FileName);
-      auto InliningInfo = Symbolizer->symbolizeInlinedCode(ObjectFile, Addr);
-      failIfError(InliningInfo);
-      for (uint32_t I = 0; I < InliningInfo->getNumberOfFrames(); ++I) {
-        auto FrameInfo = InliningInfo->getFrame(I);
-        CoveredFiles.insert(FrameInfo.FileName);
-      }
-    }
-  }
-
-  for (auto Addr : Addrs) {
-    std::set<DILineInfo> Infos; // deduplicate debug info.
-
-    auto LineInfo = Symbolizer->symbolizeCode(ObjectFile, Addr);
-    failIfError(LineInfo);
-    if (ClSkipDeadFiles &&
-        CoveredFiles.find(LineInfo->FileName) == CoveredFiles.end())
-      continue;
-    LineInfo->FileName = normalizeFilename(LineInfo->FileName);
-    if (B.isBlacklisted(*LineInfo))
-      continue;
-
-    auto Id = utohexstr(Addr, true);
-    auto Point = CoveragePoint(Id);
-    Infos.insert(*LineInfo);
-    Point.Locs.push_back(*LineInfo);
-
-    auto InliningInfo = Symbolizer->symbolizeInlinedCode(ObjectFile, Addr);
-    failIfError(InliningInfo);
-    for (uint32_t I = 0; I < InliningInfo->getNumberOfFrames(); ++I) {
-      auto FrameInfo = InliningInfo->getFrame(I);
-      if (ClSkipDeadFiles &&
-          CoveredFiles.find(FrameInfo.FileName) == CoveredFiles.end())
-        continue;
-      FrameInfo.FileName = normalizeFilename(FrameInfo.FileName);
-      if (B.isBlacklisted(FrameInfo))
-        continue;
-      if (Infos.find(FrameInfo) == Infos.end()) {
-        Infos.insert(FrameInfo);
-        Point.Locs.push_back(FrameInfo);
-      }
-    }
-
-    Result.push_back(Point);
-  }
-
-  return Result;
-}
-
-static bool isCoveragePointSymbol(StringRef Name) {
-  return Name == "__sanitizer_cov" || Name == "__sanitizer_cov_with_check" ||
-         Name == "__sanitizer_cov_trace_func_enter" ||
-         Name == "__sanitizer_cov_trace_pc_guard" ||
-         // Mac has '___' prefix
-         Name == "___sanitizer_cov" || Name == "___sanitizer_cov_with_check" ||
-         Name == "___sanitizer_cov_trace_func_enter" ||
-         Name == "___sanitizer_cov_trace_pc_guard";
-}
-
-// Locate __sanitizer_cov* function addresses inside the stubs table on MachO.
-static void findMachOIndirectCovFunctions(const object::MachOObjectFile &O,
-                                          std::set<uint64_t> *Result) {
-  MachO::dysymtab_command Dysymtab = O.getDysymtabLoadCommand();
-  MachO::symtab_command Symtab = O.getSymtabLoadCommand();
-
-  for (const auto &Load : O.load_commands()) {
-    if (Load.C.cmd == MachO::LC_SEGMENT_64) {
-      MachO::segment_command_64 Seg = O.getSegment64LoadCommand(Load);
-      for (unsigned J = 0; J < Seg.nsects; ++J) {
-        MachO::section_64 Sec = O.getSection64(Load, J);
-
-        uint32_t SectionType = Sec.flags & MachO::SECTION_TYPE;
-        if (SectionType == MachO::S_SYMBOL_STUBS) {
-          uint32_t Stride = Sec.reserved2;
-          uint32_t Cnt = Sec.size / Stride;
-          uint32_t N = Sec.reserved1;
-          for (uint32_t J = 0; J < Cnt && N + J < Dysymtab.nindirectsyms; J++) {
-            uint32_t IndirectSymbol =
-                O.getIndirectSymbolTableEntry(Dysymtab, N + J);
-            uint64_t Addr = Sec.addr + J * Stride;
-            if (IndirectSymbol < Symtab.nsyms) {
-              object::SymbolRef Symbol = *(O.getSymbolByIndex(IndirectSymbol));
-              Expected<StringRef> Name = Symbol.getName();
-              failIfError(Name);
-              if (isCoveragePointSymbol(Name.get())) {
-                Result->insert(Addr);
-              }
-            }
-          }
-        }
-      }
-    }
-    if (Load.C.cmd == MachO::LC_SEGMENT) {
-      errs() << "ERROR: 32 bit MachO binaries not supported\n";
-    }
-  }
-}
-
-// Locate __sanitizer_cov* function addresses that are used for coverage
-// reporting.
-static std::set<uint64_t>
-findSanitizerCovFunctions(const object::ObjectFile &O) {
-  std::set<uint64_t> Result;
-
-  for (const object::SymbolRef &Symbol : O.symbols()) {
-    Expected<uint64_t> AddressOrErr = Symbol.getAddress();
-    failIfError(AddressOrErr);
-    uint64_t Address = AddressOrErr.get();
-
-    Expected<StringRef> NameOrErr = Symbol.getName();
-    failIfError(NameOrErr);
-    StringRef Name = NameOrErr.get();
-
-    if (!(Symbol.getFlags() & object::BasicSymbolRef::SF_Undefined) &&
-        isCoveragePointSymbol(Name)) {
-      Result.insert(Address);
-    }
-  }
-
-  if (const auto *CO = dyn_cast<object::COFFObjectFile>(&O)) {
-    for (const object::ExportDirectoryEntryRef &Export :
-         CO->export_directories()) {
-      uint32_t RVA;
-      std::error_code EC = Export.getExportRVA(RVA);
-      failIfError(EC);
-
-      StringRef Name;
-      EC = Export.getSymbolName(Name);
-      failIfError(EC);
-
-      if (isCoveragePointSymbol(Name))
-        Result.insert(CO->getImageBase() + RVA);
-    }
-  }
-
-  if (const auto *MO = dyn_cast<object::MachOObjectFile>(&O)) {
-    findMachOIndirectCovFunctions(*MO, &Result);
-  }
-
-  return Result;
-}
-
-// Locate addresses of all coverage points in a file. Coverage point
-// is defined as the 'address of instruction following __sanitizer_cov
-// call - 1'.
-static void getObjectCoveragePoints(const object::ObjectFile &O,
-                                    std::set<uint64_t> *Addrs) {
-  Triple TheTriple("unknown-unknown-unknown");
-  TheTriple.setArch(Triple::ArchType(O.getArch()));
-  auto TripleName = TheTriple.getTriple();
-
-  std::string Error;
-  const Target *TheTarget = TargetRegistry::lookupTarget(TripleName, Error);
-  failIfNotEmpty(Error);
-
-  std::unique_ptr<const MCSubtargetInfo> STI(
-      TheTarget->createMCSubtargetInfo(TripleName, "", ""));
-  failIfEmpty(STI, "no subtarget info for target " + TripleName);
-
-  std::unique_ptr<const MCRegisterInfo> MRI(
-      TheTarget->createMCRegInfo(TripleName));
-  failIfEmpty(MRI, "no register info for target " + TripleName);
-
-  std::unique_ptr<const MCAsmInfo> AsmInfo(
-      TheTarget->createMCAsmInfo(*MRI, TripleName));
-  failIfEmpty(AsmInfo, "no asm info for target " + TripleName);
-
-  std::unique_ptr<const MCObjectFileInfo> MOFI(new MCObjectFileInfo);
-  MCContext Ctx(AsmInfo.get(), MRI.get(), MOFI.get());
-  std::unique_ptr<MCDisassembler> DisAsm(
-      TheTarget->createMCDisassembler(*STI, Ctx));
-  failIfEmpty(DisAsm, "no disassembler info for target " + TripleName);
-
-  std::unique_ptr<const MCInstrInfo> MII(TheTarget->createMCInstrInfo());
-  failIfEmpty(MII, "no instruction info for target " + TripleName);
-
-  std::unique_ptr<const MCInstrAnalysis> MIA(
-      TheTarget->createMCInstrAnalysis(MII.get()));
-  failIfEmpty(MIA, "no instruction analysis info for target " + TripleName);
-
-  auto SanCovAddrs = findSanitizerCovFunctions(O);
-  if (SanCovAddrs.empty())
-    fail("__sanitizer_cov* functions not found");
-
-  for (object::SectionRef Section : O.sections()) {
-    if (Section.isVirtual() || !Section.isText()) // llvm-objdump does the same.
-      continue;
-    uint64_t SectionAddr = Section.getAddress();
-    uint64_t SectSize = Section.getSize();
-    if (!SectSize)
-      continue;
-
-    StringRef BytesStr;
-    failIfError(Section.getContents(BytesStr));
-    ArrayRef<uint8_t> Bytes(reinterpret_cast<const uint8_t *>(BytesStr.data()),
-                            BytesStr.size());
-
-    for (uint64_t Index = 0, Size = 0; Index < Section.getSize();
-         Index += Size) {
-      MCInst Inst;
-      if (!DisAsm->getInstruction(Inst, Size, Bytes.slice(Index),
-                                  SectionAddr + Index, nulls(), nulls())) {
-        if (Size == 0)
-          Size = 1;
-        continue;
-      }
-      uint64_t Addr = Index + SectionAddr;
-      // Sanitizer coverage uses the address of the next instruction - 1.
-      uint64_t CovPoint = Addr + Size - 1;
-      uint64_t Target;
-      if (MIA->isCall(Inst) &&
-          MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target) &&
-          SanCovAddrs.find(Target) != SanCovAddrs.end())
-        Addrs->insert(CovPoint);
-    }
-  }
-}
-
-static void
-visitObjectFiles(const object::Archive &A,
-                 function_ref<void(const object::ObjectFile &)> Fn) {
-  Error Err = Error::success();
-  for (auto &C : A.children(Err)) {
-    Expected<std::unique_ptr<object::Binary>> ChildOrErr = C.getAsBinary();
-    failIfError(ChildOrErr);
-    if (auto *O = dyn_cast<object::ObjectFile>(&*ChildOrErr.get()))
-      Fn(*O);
-    else
-      failIfError(object::object_error::invalid_file_type);
-  }
-  failIfError(std::move(Err));
-}
-
-static void
-visitObjectFiles(const std::string &FileName,
-                 function_ref<void(const object::ObjectFile &)> Fn) {
-  Expected<object::OwningBinary<object::Binary>> BinaryOrErr =
-      object::createBinary(FileName);
-  if (!BinaryOrErr)
-    failIfError(BinaryOrErr);
-
-  object::Binary &Binary = *BinaryOrErr.get().getBinary();
-  if (object::Archive *A = dyn_cast<object::Archive>(&Binary))
-    visitObjectFiles(*A, Fn);
-  else if (object::ObjectFile *O = dyn_cast<object::ObjectFile>(&Binary))
-    Fn(*O);
-  else
-    failIfError(object::object_error::invalid_file_type);
-}
-
-static std::set<uint64_t>
-findSanitizerCovFunctions(const std::string &FileName) {
-  std::set<uint64_t> Result;
-  visitObjectFiles(FileName, [&](const object::ObjectFile &O) {
-    auto Addrs = findSanitizerCovFunctions(O);
-    Result.insert(Addrs.begin(), Addrs.end());
-  });
-  return Result;
-}
-
-// Locate addresses of all coverage points in a file. Coverage point
-// is defined as the 'address of instruction following __sanitizer_cov
-// call - 1'.
-static std::set<uint64_t> findCoveragePointAddrs(const std::string &FileName) {
-  std::set<uint64_t> Result;
-  visitObjectFiles(FileName, [&](const object::ObjectFile &O) {
-    getObjectCoveragePoints(O, &Result);
-  });
-  return Result;
-}
-
-static void printCovPoints(const std::string &ObjFile, raw_ostream &OS) {
-  for (uint64_t Addr : findCoveragePointAddrs(ObjFile)) {
-    OS << "0x";
-    OS.write_hex(Addr);
-    OS << "\n";
-  }
-}
-
-static ErrorOr<bool> isCoverageFile(const std::string &FileName) {
-  auto ShortFileName = llvm::sys::path::filename(FileName);
-  if (!SancovFileRegex.match(ShortFileName))
-    return false;
-
-  ErrorOr<std::unique_ptr<MemoryBuffer>> BufOrErr =
-      MemoryBuffer::getFile(FileName);
-  if (!BufOrErr) {
-    errs() << "Warning: " << BufOrErr.getError().message() << "("
-           << BufOrErr.getError().value()
-           << "), filename: " << llvm::sys::path::filename(FileName) << "\n";
-    return BufOrErr.getError();
-  }
-  std::unique_ptr<MemoryBuffer> Buf = std::move(BufOrErr.get());
-  if (Buf->getBufferSize() < 8) {
-    return false;
-  }
-  const FileHeader *Header =
-      reinterpret_cast<const FileHeader *>(Buf->getBufferStart());
-  return Header->Magic == BinCoverageMagic;
-}
-
-static bool isSymbolizedCoverageFile(const std::string &FileName) {
-  auto ShortFileName = llvm::sys::path::filename(FileName);
-  return SymcovFileRegex.match(ShortFileName);
-}
-
-static std::unique_ptr<SymbolizedCoverage>
-symbolize(const RawCoverage &Data, const std::string ObjectFile) {
-  auto Coverage = make_unique<SymbolizedCoverage>();
-
-  ErrorOr<std::unique_ptr<MemoryBuffer>> BufOrErr =
-      MemoryBuffer::getFile(ObjectFile);
-  failIfError(BufOrErr);
-  SHA1 Hasher;
-  Hasher.update((*BufOrErr)->getBuffer());
-  Coverage->BinaryHash = toHex(Hasher.final());
-
-  Blacklists B;
-  auto Symbolizer(createSymbolizer());
-
-  for (uint64_t Addr : *Data.Addrs) {
-    auto LineInfo = Symbolizer->symbolizeCode(ObjectFile, Addr);
-    failIfError(LineInfo);
-    if (B.isBlacklisted(*LineInfo))
-      continue;
-
-    Coverage->CoveredIds.insert(utohexstr(Addr, true));
-  }
-
-  std::set<uint64_t> AllAddrs = findCoveragePointAddrs(ObjectFile);
-  if (!std::includes(AllAddrs.begin(), AllAddrs.end(), Data.Addrs->begin(),
-                     Data.Addrs->end())) {
-    fail("Coverage points in binary and .sancov file do not match.");
-  }
-  Coverage->Points = getCoveragePoints(ObjectFile, AllAddrs, *Data.Addrs);
-  return Coverage;
-}
-
-struct FileFn {
-  bool operator<(const FileFn &RHS) const {
-    return std::tie(FileName, FunctionName) <
-           std::tie(RHS.FileName, RHS.FunctionName);
-  }
-
-  std::string FileName;
-  std::string FunctionName;
-};
-
-static std::set<FileFn>
-computeFunctions(const std::vector<CoveragePoint> &Points) {
-  std::set<FileFn> Fns;
-  for (const auto &Point : Points) {
-    for (const auto &Loc : Point.Locs) {
-      Fns.insert(FileFn{Loc.FileName, Loc.FunctionName});
-    }
-  }
-  return Fns;
-}
-
-static std::set<FileFn>
-computeNotCoveredFunctions(const SymbolizedCoverage &Coverage) {
-  auto Fns = computeFunctions(Coverage.Points);
-
-  for (const auto &Point : Coverage.Points) {
-    if (Coverage.CoveredIds.find(Point.Id) == Coverage.CoveredIds.end())
-      continue;
-
-    for (const auto &Loc : Point.Locs) {
-      Fns.erase(FileFn{Loc.FileName, Loc.FunctionName});
-    }
-  }
-
-  return Fns;
-}
-
-static std::set<FileFn>
-computeCoveredFunctions(const SymbolizedCoverage &Coverage) {
-  auto AllFns = computeFunctions(Coverage.Points);
-  std::set<FileFn> Result;
-
-  for (const auto &Point : Coverage.Points) {
-    if (Coverage.CoveredIds.find(Point.Id) == Coverage.CoveredIds.end())
-      continue;
-
-    for (const auto &Loc : Point.Locs) {
-      Result.insert(FileFn{Loc.FileName, Loc.FunctionName});
-    }
-  }
-
-  return Result;
-}
-
-typedef std::map<FileFn, std::pair<uint32_t, uint32_t>> FunctionLocs;
-// finds first location in a file for each function.
-static FunctionLocs resolveFunctions(const SymbolizedCoverage &Coverage,
-                                     const std::set<FileFn> &Fns) {
-  FunctionLocs Result;
-  for (const auto &Point : Coverage.Points) {
-    for (const auto &Loc : Point.Locs) {
-      FileFn Fn = FileFn{Loc.FileName, Loc.FunctionName};
-      if (Fns.find(Fn) == Fns.end())
-        continue;
-
-      auto P = std::make_pair(Loc.Line, Loc.Column);
-      auto I = Result.find(Fn);
-      if (I == Result.end() || I->second > P) {
-        Result[Fn] = P;
-      }
-    }
-  }
-  return Result;
-}
-
-static void printFunctionLocs(const FunctionLocs &FnLocs, raw_ostream &OS) {
-  for (const auto &P : FnLocs) {
-    OS << stripPathPrefix(P.first.FileName) << ":" << P.second.first << " "
-       << P.first.FunctionName << "\n";
-  }
-}
-CoverageStats computeStats(const SymbolizedCoverage &Coverage) {
-  CoverageStats Stats = {Coverage.Points.size(), Coverage.CoveredIds.size(),
-                         computeFunctions(Coverage.Points).size(),
-                         computeCoveredFunctions(Coverage).size()};
-  return Stats;
-}
-
-// Print list of covered functions.
-// Line format: <file_name>:<line> <function_name>
-static void printCoveredFunctions(const SymbolizedCoverage &CovData,
-                                  raw_ostream &OS) {
-  auto CoveredFns = computeCoveredFunctions(CovData);
-  printFunctionLocs(resolveFunctions(CovData, CoveredFns), OS);
-}
-
-// Print list of not covered functions.
-// Line format: <file_name>:<line> <function_name>
-static void printNotCoveredFunctions(const SymbolizedCoverage &CovData,
-                                     raw_ostream &OS) {
-  auto NotCoveredFns = computeNotCoveredFunctions(CovData);
-  printFunctionLocs(resolveFunctions(CovData, NotCoveredFns), OS);
-}
-
-// Read list of files and merges their coverage info.
-static void readAndPrintRawCoverage(const std::vector<std::string> &FileNames,
-                                    raw_ostream &OS) {
-  std::vector<std::unique_ptr<RawCoverage>> Covs;
-  for (const auto &FileName : FileNames) {
-    auto Cov = RawCoverage::read(FileName);
-    if (!Cov)
-      continue;
-    OS << *Cov.get();
-  }
-}
-
-static std::unique_ptr<SymbolizedCoverage>
-merge(const std::vector<std::unique_ptr<SymbolizedCoverage>> &Coverages) {
-  if (Coverages.empty())
-    return nullptr;
-
-  auto Result = make_unique<SymbolizedCoverage>();
-
-  for (size_t I = 0; I < Coverages.size(); ++I) {
-    const SymbolizedCoverage &Coverage = *Coverages[I];
-    std::string Prefix;
-    if (Coverages.size() > 1) {
-      // prefix is not needed when there's only one file.
-      Prefix = utostr(I);
-    }
-
-    for (const auto &Id : Coverage.CoveredIds) {
-      Result->CoveredIds.insert(Prefix + Id);
-    }
-
-    for (const auto &CovPoint : Coverage.Points) {
-      CoveragePoint NewPoint(CovPoint);
-      NewPoint.Id = Prefix + CovPoint.Id;
-      Result->Points.push_back(NewPoint);
-    }
-  }
-
-  if (Coverages.size() == 1) {
-    Result->BinaryHash = Coverages[0]->BinaryHash;
-  }
-
-  return Result;
-}
-
-static std::unique_ptr<SymbolizedCoverage>
-readSymbolizeAndMergeCmdArguments(std::vector<std::string> FileNames) {
-  std::vector<std::unique_ptr<SymbolizedCoverage>> Coverages;
-
-  {
-    // Short name => file name.
-    std::map<std::string, std::string> ObjFiles;
-    std::string FirstObjFile;
-    std::set<std::string> CovFiles;
-
-    // Partition input values into coverage/object files.
-    for (const auto &FileName : FileNames) {
-      if (isSymbolizedCoverageFile(FileName)) {
-        Coverages.push_back(SymbolizedCoverage::read(FileName));
-      }
-
-      auto ErrorOrIsCoverage = isCoverageFile(FileName);
-      if (!ErrorOrIsCoverage)
-        continue;
-      if (ErrorOrIsCoverage.get()) {
-        CovFiles.insert(FileName);
-      } else {
-        auto ShortFileName = llvm::sys::path::filename(FileName);
-        if (ObjFiles.find(ShortFileName) != ObjFiles.end()) {
-          fail("Duplicate binary file with a short name: " + ShortFileName);
-        }
-
-        ObjFiles[ShortFileName] = FileName;
-        if (FirstObjFile.empty())
-          FirstObjFile = FileName;
-      }
-    }
-
-    SmallVector<StringRef, 2> Components;
-
-    // Object file => list of corresponding coverage file names.
-    std::map<std::string, std::vector<std::string>> CoverageByObjFile;
-    for (const auto &FileName : CovFiles) {
-      auto ShortFileName = llvm::sys::path::filename(FileName);
-      auto Ok = SancovFileRegex.match(ShortFileName, &Components);
-      if (!Ok) {
-        fail("Can't match coverage file name against "
-             "<module_name>.<pid>.sancov pattern: " +
-             FileName);
-      }
-
-      auto Iter = ObjFiles.find(Components[1]);
-      if (Iter == ObjFiles.end()) {
-        fail("Object file for coverage not found: " + FileName);
-      }
-
-      CoverageByObjFile[Iter->second].push_back(FileName);
-    };
-
-    for (const auto &Pair : ObjFiles) {
-      auto FileName = Pair.second;
-      if (CoverageByObjFile.find(FileName) == CoverageByObjFile.end())
-        errs() << "WARNING: No coverage file for " << FileName << "\n";
-    }
-
-    // Read raw coverage and symbolize it.
-    for (const auto &Pair : CoverageByObjFile) {
-      if (findSanitizerCovFunctions(Pair.first).empty()) {
-        errs()
-            << "WARNING: Ignoring " << Pair.first
-            << " and its coverage because  __sanitizer_cov* functions were not "
-               "found.\n";
-        continue;
-      }
-
-      for (const std::string &CoverageFile : Pair.second) {
-        auto DataOrError = RawCoverage::read(CoverageFile);
-        failIfError(DataOrError);
-        Coverages.push_back(symbolize(*DataOrError.get(), Pair.first));
-      }
-    }
-  }
-
-  return merge(Coverages);
-}
-
-} // namespace
-
-int main(int Argc, char **Argv) {
-  // Print stack trace if we signal out.
-  sys::PrintStackTraceOnErrorSignal(Argv[0]);
-  PrettyStackTraceProgram X(Argc, Argv);
-  llvm_shutdown_obj Y; // Call llvm_shutdown() on exit.
-
-  llvm::InitializeAllTargetInfos();
-  llvm::InitializeAllTargetMCs();
-  llvm::InitializeAllDisassemblers();
-
-  cl::ParseCommandLineOptions(Argc, Argv, 
-      "Sanitizer Coverage Processing Tool (sancov)\n\n"
-      "  This tool can extract various coverage-related information from: \n"
-      "  coverage-instrumented binary files, raw .sancov files and their "
-      "symbolized .symcov version.\n"
-      "  Depending on chosen action the tool expects different input files:\n"
-      "    -print-coverage-pcs     - coverage-instrumented binary files\n"
-      "    -print-coverage         - .sancov files\n"
-      "    <other actions>         - .sancov files & corresponding binary "
-      "files, .symcov files\n"
-      );
-
-  // -print doesn't need object files.
-  if (Action == PrintAction) {
-    readAndPrintRawCoverage(ClInputFiles, outs());
-    return 0;
-  } else if (Action == PrintCovPointsAction) {
-    // -print-coverage-points doesn't need coverage files.
-    for (const std::string &ObjFile : ClInputFiles) {
-      printCovPoints(ObjFile, outs());
-    }
-    return 0;
-  }
-
-  auto Coverage = readSymbolizeAndMergeCmdArguments(ClInputFiles);
-  failIf(!Coverage, "No valid coverage files given.");
-
-  switch (Action) {
-  case CoveredFunctionsAction: {
-    printCoveredFunctions(*Coverage, outs());
-    return 0;
-  }
-  case NotCoveredFunctionsAction: {
-    printNotCoveredFunctions(*Coverage, outs());
-    return 0;
-  }
-  case StatsAction: {
-    outs() << computeStats(*Coverage);
-    return 0;
-  }
-  case MergeAction:
-  case SymbolizeAction: { // merge & symbolize are synonims.
-    JSONWriter W(outs());
-    W << *Coverage;
-    return 0;
-  }
-  case HtmlReportAction:
-    errs() << "-html-report option is removed: "
-              "use -symbolize & coverage-report-server.py instead\n";
-    return 1;
-  case PrintAction:
-  case PrintCovPointsAction:
-    llvm_unreachable("unsupported action");
-  }
-}
diff --git a/external/bsd/llvm/dist/llvm/unittests/ADT/ReverseIterationTest.cpp b/external/bsd/llvm/dist/llvm/unittests/ADT/ReverseIterationTest.cpp
deleted file mode 100644
index 1e2dedf083f7..000000000000
--- a/external/bsd/llvm/dist/llvm/unittests/ADT/ReverseIterationTest.cpp
+++ /dev/null
@@ -1,52 +0,0 @@
-//===- llvm/unittest/ADT/ReverseIterationTest.cpp ------------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// ReverseIteration unit tests.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/ADT/SmallPtrSet.h"
-#include "gtest/gtest.h"
-
-#if LLVM_ENABLE_ABI_BREAKING_CHECKS
-using namespace llvm;
-
-TEST(ReverseIterationTest, SmallPtrSetTest) {
-
-  SmallPtrSet<void*, 4> Set;
-  void *Ptrs[] = { (void*)0x1, (void*)0x2, (void*)0x3, (void*)0x4 };
-  void *ReversePtrs[] = { (void*)0x4, (void*)0x3, (void*)0x2, (void*)0x1 };
-
-  for (auto *Ptr: Ptrs)
-    Set.insert(Ptr);
-
-  // Check forward iteration.
-  ReverseIterate<bool>::value = false;
-  for (const auto &Tuple : zip(Set, Ptrs))
-    ASSERT_EQ(std::get<0>(Tuple), std::get<1>(Tuple));
-
-  // Check operator++ (post-increment) in forward iteration.
-  int i = 0;
-  for (auto begin = Set.begin(), end = Set.end();
-             begin != end; i++)
-    ASSERT_EQ(*begin++, Ptrs[i]);
-
-  // Check reverse iteration.
-  ReverseIterate<bool>::value = true;
-  for (const auto &Tuple : zip(Set, ReversePtrs))
-    ASSERT_EQ(std::get<0>(Tuple), std::get<1>(Tuple));
-
-  // Check operator++ (post-increment) in reverse iteration. 
-  i = 0;
-  for (auto begin = Set.begin(), end = Set.end();
-             begin != end; i++)
-    ASSERT_EQ(*begin++, ReversePtrs[i]);
-
-}
-#endif
diff --git a/external/bsd/llvm/dist/llvm/unittests/DebugInfo/PDB/MSFBuilderTest.cpp b/external/bsd/llvm/dist/llvm/unittests/DebugInfo/PDB/MSFBuilderTest.cpp
deleted file mode 100644
index 23a15d14f756..000000000000
--- a/external/bsd/llvm/dist/llvm/unittests/DebugInfo/PDB/MSFBuilderTest.cpp
+++ /dev/null
@@ -1,361 +0,0 @@
-//===- MSFBuilderTest.cpp  Tests manipulation of MSF stream metadata ------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/DebugInfo/MSF/MSFBuilder.h"
-#include "llvm/DebugInfo/MSF/MSFCommon.h"
-#include "llvm/Testing/Support/Error.h"
-
-#include "gtest/gtest.h"
-
-using namespace llvm;
-using namespace llvm::msf;
-
-namespace {
-class MSFBuilderTest : public testing::Test {
-protected:
-  void initializeSimpleSuperBlock(msf::SuperBlock &SB) {
-    initializeSuperBlock(SB);
-    SB.NumBlocks = 1000;
-    SB.NumDirectoryBytes = 8192;
-  }
-
-  void initializeSuperBlock(msf::SuperBlock &SB) {
-    ::memset(&SB, 0, sizeof(SB));
-
-    ::memcpy(SB.MagicBytes, msf::Magic, sizeof(msf::Magic));
-    SB.FreeBlockMapBlock = 1;
-    SB.BlockMapAddr = 1;
-    SB.BlockSize = 4096;
-    SB.NumDirectoryBytes = 0;
-    SB.NumBlocks = 2; // one for the Super Block, one for the directory
-  }
-
-  BumpPtrAllocator Allocator;
-};
-}
-
-TEST_F(MSFBuilderTest, ValidateSuperBlockAccept) {
-  // Test that a known good super block passes validation.
-  SuperBlock SB;
-  initializeSuperBlock(SB);
-
-  EXPECT_THAT_ERROR(msf::validateSuperBlock(SB), Succeeded());
-}
-
-TEST_F(MSFBuilderTest, ValidateSuperBlockReject) {
-  // Test that various known problems cause a super block to be rejected.
-  SuperBlock SB;
-  initializeSimpleSuperBlock(SB);
-
-  // Mismatched magic
-  SB.MagicBytes[0] = 8;
-  EXPECT_THAT_ERROR(msf::validateSuperBlock(SB), Failed());
-  initializeSimpleSuperBlock(SB);
-
-  // Block 0 is reserved for super block, can't be occupied by the block map
-  SB.BlockMapAddr = 0;
-  EXPECT_THAT_ERROR(msf::validateSuperBlock(SB), Failed());
-  initializeSimpleSuperBlock(SB);
-
-  // Block sizes have to be powers of 2.
-  SB.BlockSize = 3120;
-  EXPECT_THAT_ERROR(msf::validateSuperBlock(SB), Failed());
-  initializeSimpleSuperBlock(SB);
-
-  // The directory itself has a maximum size.
-  SB.NumDirectoryBytes = SB.BlockSize * SB.BlockSize / 4;
-  EXPECT_THAT_ERROR(msf::validateSuperBlock(SB), Succeeded());
-  SB.NumDirectoryBytes = SB.NumDirectoryBytes + 4;
-  EXPECT_THAT_ERROR(msf::validateSuperBlock(SB), Failed());
-}
-
-TEST_F(MSFBuilderTest, TestUsedBlocksMarkedAsUsed) {
-  // Test that when assigning a stream to a known list of blocks, the blocks
-  // are correctly marked as used after adding, but no other incorrect blocks
-  // are accidentally marked as used.
-
-  std::vector<uint32_t> Blocks = {4, 5, 6, 7, 8, 9, 10, 11, 12};
-  // Allocate some extra blocks at the end so we can verify that they're free
-  // after the initialization.
-  uint32_t NumBlocks = msf::getMinimumBlockCount() + Blocks.size() + 10;
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096, NumBlocks);
-  ASSERT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  EXPECT_THAT_EXPECTED(Msf.addStream(Blocks.size() * 4096, Blocks),
-                       Succeeded());
-
-  for (auto B : Blocks) {
-    EXPECT_FALSE(Msf.isBlockFree(B));
-  }
-
-  uint32_t FreeBlockStart = Blocks.back() + 1;
-  for (uint32_t I = FreeBlockStart; I < NumBlocks; ++I) {
-    EXPECT_TRUE(Msf.isBlockFree(I));
-  }
-}
-
-TEST_F(MSFBuilderTest, TestAddStreamNoDirectoryBlockIncrease) {
-  // Test that adding a new stream correctly updates the directory.  This only
-  // tests the case where the directory *DOES NOT* grow large enough that it
-  // crosses a Block boundary.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  auto ExpectedL1 = Msf.build();
-  EXPECT_THAT_EXPECTED(ExpectedL1, Succeeded());
-  MSFLayout &L1 = *ExpectedL1;
-
-  auto OldDirBlocks = L1.DirectoryBlocks;
-  EXPECT_EQ(1U, OldDirBlocks.size());
-
-  auto ExpectedMsf2 = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf2, Succeeded());
-  auto &Msf2 = *ExpectedMsf2;
-
-  EXPECT_THAT_EXPECTED(Msf2.addStream(4000), Succeeded());
-  EXPECT_EQ(1U, Msf2.getNumStreams());
-  EXPECT_EQ(4000U, Msf2.getStreamSize(0));
-  auto Blocks = Msf2.getStreamBlocks(0);
-  EXPECT_EQ(1U, Blocks.size());
-
-  auto ExpectedL2 = Msf2.build();
-  EXPECT_THAT_EXPECTED(ExpectedL2, Succeeded());
-  MSFLayout &L2 = *ExpectedL2;
-  auto NewDirBlocks = L2.DirectoryBlocks;
-  EXPECT_EQ(1U, NewDirBlocks.size());
-}
-
-TEST_F(MSFBuilderTest, TestAddStreamWithDirectoryBlockIncrease) {
-  // Test that adding a new stream correctly updates the directory.  This only
-  // tests the case where the directory *DOES* grow large enough that it
-  // crosses a Block boundary.  This is because the newly added stream occupies
-  // so many Blocks that need to be indexed in the directory that the directory
-  // crosses a Block boundary.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  EXPECT_THAT_EXPECTED(Msf.addStream(4096 * 4096 / sizeof(uint32_t)),
-                       Succeeded());
-
-  auto ExpectedL1 = Msf.build();
-  EXPECT_THAT_EXPECTED(ExpectedL1, Succeeded());
-  MSFLayout &L1 = *ExpectedL1;
-  auto DirBlocks = L1.DirectoryBlocks;
-  EXPECT_EQ(2U, DirBlocks.size());
-}
-
-TEST_F(MSFBuilderTest, TestGrowStreamNoBlockIncrease) {
-  // Test growing an existing stream by a value that does not affect the number
-  // of blocks it occupies.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  EXPECT_THAT_EXPECTED(Msf.addStream(1024), Succeeded());
-  EXPECT_EQ(1024U, Msf.getStreamSize(0));
-  auto OldStreamBlocks = Msf.getStreamBlocks(0);
-  EXPECT_EQ(1U, OldStreamBlocks.size());
-
-  EXPECT_THAT_ERROR(Msf.setStreamSize(0, 2048), Succeeded());
-  EXPECT_EQ(2048U, Msf.getStreamSize(0));
-  auto NewStreamBlocks = Msf.getStreamBlocks(0);
-  EXPECT_EQ(1U, NewStreamBlocks.size());
-
-  EXPECT_EQ(OldStreamBlocks, NewStreamBlocks);
-}
-
-TEST_F(MSFBuilderTest, TestGrowStreamWithBlockIncrease) {
-  // Test that growing an existing stream to a value large enough that it causes
-  // the need to allocate new Blocks to the stream correctly updates the
-  // stream's
-  // block list.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  EXPECT_THAT_EXPECTED(Msf.addStream(2048), Succeeded());
-  EXPECT_EQ(2048U, Msf.getStreamSize(0));
-  std::vector<uint32_t> OldStreamBlocks = Msf.getStreamBlocks(0);
-  EXPECT_EQ(1U, OldStreamBlocks.size());
-
-  EXPECT_THAT_ERROR(Msf.setStreamSize(0, 6144), Succeeded());
-  EXPECT_EQ(6144U, Msf.getStreamSize(0));
-  std::vector<uint32_t> NewStreamBlocks = Msf.getStreamBlocks(0);
-  EXPECT_EQ(2U, NewStreamBlocks.size());
-
-  EXPECT_EQ(OldStreamBlocks[0], NewStreamBlocks[0]);
-  EXPECT_NE(NewStreamBlocks[0], NewStreamBlocks[1]);
-}
-
-TEST_F(MSFBuilderTest, TestShrinkStreamNoBlockDecrease) {
-  // Test that shrinking an existing stream by a value that does not affect the
-  // number of Blocks it occupies makes no changes to stream's block list.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  EXPECT_THAT_EXPECTED(Msf.addStream(2048), Succeeded());
-  EXPECT_EQ(2048U, Msf.getStreamSize(0));
-  std::vector<uint32_t> OldStreamBlocks = Msf.getStreamBlocks(0);
-  EXPECT_EQ(1U, OldStreamBlocks.size());
-
-  EXPECT_THAT_ERROR(Msf.setStreamSize(0, 1024), Succeeded());
-  EXPECT_EQ(1024U, Msf.getStreamSize(0));
-  std::vector<uint32_t> NewStreamBlocks = Msf.getStreamBlocks(0);
-  EXPECT_EQ(1U, NewStreamBlocks.size());
-
-  EXPECT_EQ(OldStreamBlocks, NewStreamBlocks);
-}
-
-TEST_F(MSFBuilderTest, TestShrinkStreamWithBlockDecrease) {
-  // Test that shrinking an existing stream to a value large enough that it
-  // causes the need to deallocate new Blocks to the stream correctly updates
-  // the stream's block list.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  EXPECT_THAT_EXPECTED(Msf.addStream(6144), Succeeded());
-  EXPECT_EQ(6144U, Msf.getStreamSize(0));
-  std::vector<uint32_t> OldStreamBlocks = Msf.getStreamBlocks(0);
-  EXPECT_EQ(2U, OldStreamBlocks.size());
-
-  EXPECT_THAT_ERROR(Msf.setStreamSize(0, 2048), Succeeded());
-  EXPECT_EQ(2048U, Msf.getStreamSize(0));
-  std::vector<uint32_t> NewStreamBlocks = Msf.getStreamBlocks(0);
-  EXPECT_EQ(1U, NewStreamBlocks.size());
-
-  EXPECT_EQ(OldStreamBlocks[0], NewStreamBlocks[0]);
-}
-
-TEST_F(MSFBuilderTest, TestRejectReusedStreamBlock) {
-  // Test that attempting to add a stream and assigning a block that is already
-  // in use by another stream fails.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  EXPECT_THAT_EXPECTED(Msf.addStream(6144), Succeeded());
-
-  std::vector<uint32_t> Blocks = {2, 3};
-  EXPECT_THAT_EXPECTED(Msf.addStream(6144, Blocks), Failed());
-}
-
-TEST_F(MSFBuilderTest, TestBlockCountsWhenAddingStreams) {
-  // Test that when adding multiple streams, the number of used and free Blocks
-  // allocated to the MSF file are as expected.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  // one for the super block, one for the directory block map
-  uint32_t NumUsedBlocks = Msf.getNumUsedBlocks();
-  EXPECT_EQ(msf::getMinimumBlockCount(), NumUsedBlocks);
-  EXPECT_EQ(0U, Msf.getNumFreeBlocks());
-
-  const uint32_t StreamSizes[] = {4000, 6193, 189723};
-  for (int I = 0; I < 3; ++I) {
-    EXPECT_THAT_EXPECTED(Msf.addStream(StreamSizes[I]), Succeeded());
-    NumUsedBlocks += bytesToBlocks(StreamSizes[I], 4096);
-    EXPECT_EQ(NumUsedBlocks, Msf.getNumUsedBlocks());
-    EXPECT_EQ(0U, Msf.getNumFreeBlocks());
-  }
-}
-
-TEST_F(MSFBuilderTest, BuildMsfLayout) {
-  // Test that we can generate an MSFLayout structure from a valid layout
-  // specification.
-  auto ExpectedMsf = MSFBuilder::create(Allocator, 4096);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  const uint32_t StreamSizes[] = {4000, 6193, 189723};
-  uint32_t ExpectedNumBlocks = msf::getMinimumBlockCount();
-  for (int I = 0; I < 3; ++I) {
-    EXPECT_THAT_EXPECTED(Msf.addStream(StreamSizes[I]), Succeeded());
-    ExpectedNumBlocks += bytesToBlocks(StreamSizes[I], 4096);
-  }
-  ++ExpectedNumBlocks; // The directory itself should use 1 block
-
-  auto ExpectedLayout = Msf.build();
-  EXPECT_THAT_EXPECTED(ExpectedLayout, Succeeded());
-  MSFLayout &L = *ExpectedLayout;
-  EXPECT_EQ(4096U, L.SB->BlockSize);
-  EXPECT_EQ(ExpectedNumBlocks, L.SB->NumBlocks);
-
-  EXPECT_EQ(1U, L.DirectoryBlocks.size());
-
-  EXPECT_EQ(3U, L.StreamMap.size());
-  EXPECT_EQ(3U, L.StreamSizes.size());
-  for (int I = 0; I < 3; ++I) {
-    EXPECT_EQ(StreamSizes[I], L.StreamSizes[I]);
-    uint32_t ExpectedNumBlocks = bytesToBlocks(StreamSizes[I], 4096);
-    EXPECT_EQ(ExpectedNumBlocks, L.StreamMap[I].size());
-  }
-}
-
-TEST_F(MSFBuilderTest, UseDirectoryBlockHint) {
-  Expected<MSFBuilder> ExpectedMsf = MSFBuilder::create(
-      Allocator, 4096, msf::getMinimumBlockCount() + 1, false);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  uint32_t B = msf::getFirstUnreservedBlock();
-  EXPECT_THAT_ERROR(Msf.setDirectoryBlocksHint({B + 1}), Succeeded());
-  EXPECT_THAT_EXPECTED(Msf.addStream(2048, {B + 2}), Succeeded());
-
-  auto ExpectedLayout = Msf.build();
-  EXPECT_THAT_EXPECTED(ExpectedLayout, Succeeded());
-  MSFLayout &L = *ExpectedLayout;
-  EXPECT_EQ(msf::getMinimumBlockCount() + 2, L.SB->NumBlocks);
-  EXPECT_EQ(1U, L.DirectoryBlocks.size());
-  EXPECT_EQ(1U, L.StreamMap[0].size());
-
-  EXPECT_EQ(B + 1, L.DirectoryBlocks[0]);
-  EXPECT_EQ(B + 2, L.StreamMap[0].front());
-}
-
-TEST_F(MSFBuilderTest, DirectoryBlockHintInsufficient) {
-  Expected<MSFBuilder> ExpectedMsf =
-      MSFBuilder::create(Allocator, 4096, msf::getMinimumBlockCount() + 2);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-  uint32_t B = msf::getFirstUnreservedBlock();
-  EXPECT_THAT_ERROR(Msf.setDirectoryBlocksHint({B + 1}), Succeeded());
-
-  uint32_t Size = 4096 * 4096 / 4;
-  EXPECT_THAT_EXPECTED(Msf.addStream(Size), Succeeded());
-
-  auto ExpectedLayout = Msf.build();
-  EXPECT_THAT_EXPECTED(ExpectedLayout, Succeeded());
-  MSFLayout &L = *ExpectedLayout;
-  EXPECT_EQ(2U, L.DirectoryBlocks.size());
-  EXPECT_EQ(B + 1, L.DirectoryBlocks[0]);
-}
-
-TEST_F(MSFBuilderTest, DirectoryBlockHintOverestimated) {
-  Expected<MSFBuilder> ExpectedMsf =
-      MSFBuilder::create(Allocator, 4096, msf::getMinimumBlockCount() + 2);
-  EXPECT_THAT_EXPECTED(ExpectedMsf, Succeeded());
-  auto &Msf = *ExpectedMsf;
-
-  uint32_t B = msf::getFirstUnreservedBlock();
-  EXPECT_THAT_ERROR(Msf.setDirectoryBlocksHint({B + 1, B + 2}), Succeeded());
-
-  ASSERT_THAT_EXPECTED(Msf.addStream(2048), Succeeded());
-
-  auto ExpectedLayout = Msf.build();
-  ASSERT_THAT_EXPECTED(ExpectedLayout, Succeeded());
-  MSFLayout &L = *ExpectedLayout;
-  EXPECT_EQ(1U, L.DirectoryBlocks.size());
-  EXPECT_EQ(B + 1, L.DirectoryBlocks[0]);
-}
diff --git a/external/bsd/llvm/dist/llvm/unittests/DebugInfo/PDB/MappedBlockStreamTest.cpp b/external/bsd/llvm/dist/llvm/unittests/DebugInfo/PDB/MappedBlockStreamTest.cpp
deleted file mode 100644
index a9a1ee4d65b9..000000000000
--- a/external/bsd/llvm/dist/llvm/unittests/DebugInfo/PDB/MappedBlockStreamTest.cpp
+++ /dev/null
@@ -1,500 +0,0 @@
-//===- llvm/unittest/DebugInfo/PDB/MappedBlockStreamTest.cpp --------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/DebugInfo/MSF/MappedBlockStream.h"
-#include "llvm/DebugInfo/MSF/IMSFFile.h"
-#include "llvm/DebugInfo/MSF/MSFError.h"
-#include "llvm/DebugInfo/MSF/MSFStreamLayout.h"
-#include "llvm/Support/BinaryByteStream.h"
-#include "llvm/Support/BinaryStreamReader.h"
-#include "llvm/Support/BinaryStreamRef.h"
-#include "llvm/Support/BinaryStreamWriter.h"
-#include "llvm/Testing/Support/Error.h"
-
-#include "gtest/gtest.h"
-
-#include <unordered_map>
-
-using namespace llvm;
-using namespace llvm::msf;
-using namespace llvm::support;
-
-namespace {
-
-static const uint32_t BlocksAry[] = {0, 1, 2, 5, 4, 3, 6, 7, 8, 9};
-static uint8_t DataAry[] = {'A', 'B', 'C', 'F', 'E', 'D', 'G', 'H', 'I', 'J'};
-
-class DiscontiguousStream : public WritableBinaryStream {
-public:
-  DiscontiguousStream(ArrayRef<uint32_t> Blocks, MutableArrayRef<uint8_t> Data)
-      : Blocks(Blocks.begin(), Blocks.end()), Data(Data.begin(), Data.end()) {}
-
-  uint32_t block_size() const { return 1; }
-  uint32_t block_count() const { return Blocks.size(); }
-
-  endianness getEndian() const override { return little; }
-
-  Error readBytes(uint32_t Offset, uint32_t Size,
-                  ArrayRef<uint8_t> &Buffer) override {
-    if (auto EC = checkOffset(Offset, Size))
-      return EC;
-    Buffer = Data.slice(Offset, Size);
-    return Error::success();
-  }
-
-  Error readLongestContiguousChunk(uint32_t Offset,
-                                   ArrayRef<uint8_t> &Buffer) override {
-    if (auto EC = checkOffset(Offset, 1))
-      return EC;
-    Buffer = Data.drop_front(Offset);
-    return Error::success();
-  }
-
-  uint32_t getLength() override { return Data.size(); }
-
-  Error writeBytes(uint32_t Offset, ArrayRef<uint8_t> SrcData) override {
-    if (auto EC = checkOffset(Offset, SrcData.size()))
-      return EC;
-    ::memcpy(&Data[Offset], SrcData.data(), SrcData.size());
-    return Error::success();
-  }
-  Error commit() override { return Error::success(); }
-
-  MSFStreamLayout layout() const {
-    return MSFStreamLayout{static_cast<uint32_t>(Data.size()), Blocks};
-  }
-
-  BumpPtrAllocator Allocator;
-
-private:
-  std::vector<support::ulittle32_t> Blocks;
-  MutableArrayRef<uint8_t> Data;
-};
-
-TEST(MappedBlockStreamTest, NumBlocks) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  EXPECT_EQ(F.block_size(), S->getBlockSize());
-  EXPECT_EQ(F.layout().Blocks.size(), S->getNumBlocks());
-
-}
-
-// Tests that a read which is entirely contained within a single block works
-// and does not allocate.
-TEST(MappedBlockStreamTest, ReadBeyondEndOfStreamRef) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-
-  BinaryStreamReader R(*S);
-  BinaryStreamRef SR;
-  EXPECT_THAT_ERROR(R.readStreamRef(SR, 0U), Succeeded());
-  ArrayRef<uint8_t> Buffer;
-  EXPECT_THAT_ERROR(SR.readBytes(0U, 1U, Buffer), Failed());
-  EXPECT_THAT_ERROR(R.readStreamRef(SR, 1U), Succeeded());
-  EXPECT_THAT_ERROR(SR.readBytes(1U, 1U, Buffer), Failed());
-}
-
-// Tests that a read which outputs into a full destination buffer works and
-// does not fail due to the length of the output buffer.
-TEST(MappedBlockStreamTest, ReadOntoNonEmptyBuffer) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-
-  BinaryStreamReader R(*S);
-  StringRef Str = "ZYXWVUTSRQPONMLKJIHGFEDCBA";
-  EXPECT_THAT_ERROR(R.readFixedString(Str, 1), Succeeded());
-  EXPECT_EQ(Str, StringRef("A"));
-  EXPECT_EQ(0U, F.Allocator.getBytesAllocated());
-}
-
-// Tests that a read which crosses a block boundary, but where the subsequent
-// blocks are still contiguous in memory to the previous block works and does
-// not allocate memory.
-TEST(MappedBlockStreamTest, ZeroCopyReadContiguousBreak) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  BinaryStreamReader R(*S);
-  StringRef Str;
-  EXPECT_THAT_ERROR(R.readFixedString(Str, 2), Succeeded());
-  EXPECT_EQ(Str, StringRef("AB"));
-  EXPECT_EQ(0U, F.Allocator.getBytesAllocated());
-
-  R.setOffset(6);
-  EXPECT_THAT_ERROR(R.readFixedString(Str, 4), Succeeded());
-  EXPECT_EQ(Str, StringRef("GHIJ"));
-  EXPECT_EQ(0U, F.Allocator.getBytesAllocated());
-}
-
-// Tests that a read which crosses a block boundary and cannot be referenced
-// contiguously works and allocates only the precise amount of bytes
-// requested.
-TEST(MappedBlockStreamTest, CopyReadNonContiguousBreak) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  BinaryStreamReader R(*S);
-  StringRef Str;
-  EXPECT_THAT_ERROR(R.readFixedString(Str, 10), Succeeded());
-  EXPECT_EQ(Str, StringRef("ABCDEFGHIJ"));
-  EXPECT_EQ(10U, F.Allocator.getBytesAllocated());
-}
-
-// Test that an out of bounds read which doesn't cross a block boundary
-// fails and allocates no memory.
-TEST(MappedBlockStreamTest, InvalidReadSizeNoBreak) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  BinaryStreamReader R(*S);
-  StringRef Str;
-
-  R.setOffset(10);
-  EXPECT_THAT_ERROR(R.readFixedString(Str, 1), Failed());
-  EXPECT_EQ(0U, F.Allocator.getBytesAllocated());
-}
-
-// Test that an out of bounds read which crosses a contiguous block boundary
-// fails and allocates no memory.
-TEST(MappedBlockStreamTest, InvalidReadSizeContiguousBreak) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  BinaryStreamReader R(*S);
-  StringRef Str;
-
-  R.setOffset(6);
-  EXPECT_THAT_ERROR(R.readFixedString(Str, 5), Failed());
-  EXPECT_EQ(0U, F.Allocator.getBytesAllocated());
-}
-
-// Test that an out of bounds read which crosses a discontiguous block
-// boundary fails and allocates no memory.
-TEST(MappedBlockStreamTest, InvalidReadSizeNonContiguousBreak) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  BinaryStreamReader R(*S);
-  StringRef Str;
-
-  EXPECT_THAT_ERROR(R.readFixedString(Str, 11), Failed());
-  EXPECT_EQ(0U, F.Allocator.getBytesAllocated());
-}
-
-// Tests that a read which is entirely contained within a single block but
-// beyond the end of a StreamRef fails.
-TEST(MappedBlockStreamTest, ZeroCopyReadNoBreak) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  BinaryStreamReader R(*S);
-  StringRef Str;
-  EXPECT_THAT_ERROR(R.readFixedString(Str, 1), Succeeded());
-  EXPECT_EQ(Str, StringRef("A"));
-  EXPECT_EQ(0U, F.Allocator.getBytesAllocated());
-}
-
-// Tests that a read which is not aligned on the same boundary as a previous
-// cached request, but which is known to overlap that request, shares the
-// previous allocation.
-TEST(MappedBlockStreamTest, UnalignedOverlappingRead) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  BinaryStreamReader R(*S);
-  StringRef Str1;
-  StringRef Str2;
-  EXPECT_THAT_ERROR(R.readFixedString(Str1, 7), Succeeded());
-  EXPECT_EQ(Str1, StringRef("ABCDEFG"));
-  EXPECT_EQ(7U, F.Allocator.getBytesAllocated());
-
-  R.setOffset(2);
-  EXPECT_THAT_ERROR(R.readFixedString(Str2, 3), Succeeded());
-  EXPECT_EQ(Str2, StringRef("CDE"));
-  EXPECT_EQ(Str1.data() + 2, Str2.data());
-  EXPECT_EQ(7U, F.Allocator.getBytesAllocated());
-}
-
-// Tests that a read which is not aligned on the same boundary as a previous
-// cached request, but which only partially overlaps a previous cached request,
-// still works correctly and allocates again from the shared pool.
-TEST(MappedBlockStreamTest, UnalignedOverlappingReadFail) {
-  DiscontiguousStream F(BlocksAry, DataAry);
-  auto S = MappedBlockStream::createStream(F.block_size(), F.layout(), F,
-                                           F.Allocator);
-  BinaryStreamReader R(*S);
-  StringRef Str1;
-  StringRef Str2;
-  EXPECT_THAT_ERROR(R.readFixedString(Str1, 6), Succeeded());
-  EXPECT_EQ(Str1, StringRef("ABCDEF"));
-  EXPECT_EQ(6U, F.Allocator.getBytesAllocated());
-
-  R.setOffset(4);
-  EXPECT_THAT_ERROR(R.readFixedString(Str2, 4), Succeeded());
-  EXPECT_EQ(Str2, StringRef("EFGH"));
-  EXPECT_EQ(10U, F.Allocator.getBytesAllocated());
-}
-
-TEST(MappedBlockStreamTest, WriteBeyondEndOfStream) {
-  static uint8_t Data[] = {'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J'};
-  static uint8_t LargeBuffer[] = {'0', '1', '2', '3', '4', '5',
-                                  '6', '7', '8', '9', 'A'};
-  static uint8_t SmallBuffer[] = {'0', '1', '2'};
-  static_assert(sizeof(LargeBuffer) > sizeof(Data),
-                "LargeBuffer is not big enough");
-
-  DiscontiguousStream F(BlocksAry, Data);
-  auto S = WritableMappedBlockStream::createStream(F.block_size(), F.layout(),
-                                                   F, F.Allocator);
-  ArrayRef<uint8_t> Buffer;
-
-  EXPECT_THAT_ERROR(S->writeBytes(0, ArrayRef<uint8_t>(LargeBuffer)), Failed());
-  EXPECT_THAT_ERROR(S->writeBytes(0, ArrayRef<uint8_t>(SmallBuffer)),
-                    Succeeded());
-  EXPECT_THAT_ERROR(S->writeBytes(7, ArrayRef<uint8_t>(SmallBuffer)),
-                    Succeeded());
-  EXPECT_THAT_ERROR(S->writeBytes(8, ArrayRef<uint8_t>(SmallBuffer)), Failed());
-}
-
-TEST(MappedBlockStreamTest, TestWriteBytesNoBreakBoundary) {
-  static uint8_t Data[] = {'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J'};
-  DiscontiguousStream F(BlocksAry, Data);
-  auto S = WritableMappedBlockStream::createStream(F.block_size(), F.layout(),
-                                                   F, F.Allocator);
-  ArrayRef<uint8_t> Buffer;
-
-  EXPECT_THAT_ERROR(S->readBytes(0, 1, Buffer), Succeeded());
-  EXPECT_EQ(Buffer, ArrayRef<uint8_t>('A'));
-  EXPECT_THAT_ERROR(S->readBytes(9, 1, Buffer), Succeeded());
-  EXPECT_EQ(Buffer, ArrayRef<uint8_t>('J'));
-
-  EXPECT_THAT_ERROR(S->writeBytes(0, ArrayRef<uint8_t>('J')), Succeeded());
-  EXPECT_THAT_ERROR(S->writeBytes(9, ArrayRef<uint8_t>('A')), Succeeded());
-
-  EXPECT_THAT_ERROR(S->readBytes(0, 1, Buffer), Succeeded());
-  EXPECT_EQ(Buffer, ArrayRef<uint8_t>('J'));
-  EXPECT_THAT_ERROR(S->readBytes(9, 1, Buffer), Succeeded());
-  EXPECT_EQ(Buffer, ArrayRef<uint8_t>('A'));
-
-  EXPECT_THAT_ERROR(S->writeBytes(0, ArrayRef<uint8_t>('A')), Succeeded());
-  EXPECT_THAT_ERROR(S->writeBytes(9, ArrayRef<uint8_t>('J')), Succeeded());
-
-  EXPECT_THAT_ERROR(S->readBytes(0, 1, Buffer), Succeeded());
-  EXPECT_EQ(Buffer, ArrayRef<uint8_t>('A'));
-  EXPECT_THAT_ERROR(S->readBytes(9, 1, Buffer), Succeeded());
-  EXPECT_EQ(Buffer, ArrayRef<uint8_t>('J'));
-}
-
-TEST(MappedBlockStreamTest, TestWriteBytesBreakBoundary) {
-  static uint8_t Data[] = {'0', '0', '0', '0', '0', '0', '0', '0', '0', '0'};
-  static uint8_t TestData[] = {'T', 'E', 'S', 'T', 'I', 'N', 'G', '.'};
-  static uint8_t Expected[] = {'T', 'E', 'S', 'N', 'I',
-                               'T', 'G', '.', '0', '0'};
-
-  DiscontiguousStream F(BlocksAry, Data);
-  auto S = WritableMappedBlockStream::createStream(F.block_size(), F.layout(),
-                                                   F, F.Allocator);
-  ArrayRef<uint8_t> Buffer;
-
-  EXPECT_THAT_ERROR(S->writeBytes(0, TestData), Succeeded());
-  // First just compare the memory, then compare the result of reading the
-  // string out.
-  EXPECT_EQ(ArrayRef<uint8_t>(Data), ArrayRef<uint8_t>(Expected));
-
-  EXPECT_THAT_ERROR(S->readBytes(0, 8, Buffer), Succeeded());
-  EXPECT_EQ(Buffer, ArrayRef<uint8_t>(TestData));
-}
-
-TEST(MappedBlockStreamTest, TestWriteThenRead) {
-  std::vector<uint8_t> DataBytes(10);
-  MutableArrayRef<uint8_t> Data(DataBytes);
-  const uint32_t Blocks[] = {2, 1, 0, 6, 3, 4, 5, 7, 9, 8};
-
-  DiscontiguousStream F(Blocks, Data);
-  auto S = WritableMappedBlockStream::createStream(F.block_size(), F.layout(),
-                                                   F, F.Allocator);
-
-  enum class MyEnum : uint32_t { Val1 = 2908234, Val2 = 120891234 };
-  using support::ulittle32_t;
-
-  uint16_t u16[] = {31468, 0};
-  uint32_t u32[] = {890723408, 0};
-  MyEnum Enum[] = {MyEnum::Val1, MyEnum::Val2};
-  StringRef ZStr[] = {"Zero Str", ""};
-  StringRef FStr[] = {"Fixed Str", ""};
-  uint8_t byteArray0[] = {'1', '2'};
-  uint8_t byteArray1[] = {'0', '0'};
-  ArrayRef<uint8_t> byteArrayRef0(byteArray0);
-  ArrayRef<uint8_t> byteArrayRef1(byteArray1);
-  ArrayRef<uint8_t> byteArray[] = { byteArrayRef0, byteArrayRef1 };
-  uint32_t intArr0[] = {890723408, 29082234};
-  uint32_t intArr1[] = {890723408, 29082234};
-  ArrayRef<uint32_t> intArray[] = {intArr0, intArr1};
-
-  BinaryStreamReader Reader(*S);
-  BinaryStreamWriter Writer(*S);
-  EXPECT_THAT_ERROR(Writer.writeInteger(u16[0]), Succeeded());
-  EXPECT_THAT_ERROR(Reader.readInteger(u16[1]), Succeeded());
-  EXPECT_EQ(u16[0], u16[1]);
-  EXPECT_EQ(std::vector<uint8_t>({0, 0x7A, 0xEC, 0, 0, 0, 0, 0, 0, 0}),
-            DataBytes);
-
-  Reader.setOffset(0);
-  Writer.setOffset(0);
-  ::memset(DataBytes.data(), 0, 10);
-  EXPECT_THAT_ERROR(Writer.writeInteger(u32[0]), Succeeded());
-  EXPECT_THAT_ERROR(Reader.readInteger(u32[1]), Succeeded());
-  EXPECT_EQ(u32[0], u32[1]);
-  EXPECT_EQ(std::vector<uint8_t>({0x17, 0x5C, 0x50, 0, 0, 0, 0x35, 0, 0, 0}),
-            DataBytes);
-
-  Reader.setOffset(0);
-  Writer.setOffset(0);
-  ::memset(DataBytes.data(), 0, 10);
-  EXPECT_THAT_ERROR(Writer.writeEnum(Enum[0]), Succeeded());
-  EXPECT_THAT_ERROR(Reader.readEnum(Enum[1]), Succeeded());
-  EXPECT_EQ(Enum[0], Enum[1]);
-  EXPECT_EQ(std::vector<uint8_t>({0x2C, 0x60, 0x4A, 0, 0, 0, 0, 0, 0, 0}),
-            DataBytes);
-
-  Reader.setOffset(0);
-  Writer.setOffset(0);
-  ::memset(DataBytes.data(), 0, 10);
-  EXPECT_THAT_ERROR(Writer.writeCString(ZStr[0]), Succeeded());
-  EXPECT_THAT_ERROR(Reader.readCString(ZStr[1]), Succeeded());
-  EXPECT_EQ(ZStr[0], ZStr[1]);
-  EXPECT_EQ(
-      std::vector<uint8_t>({'r', 'e', 'Z', ' ', 'S', 't', 'o', 'r', 0, 0}),
-      DataBytes);
-
-  Reader.setOffset(0);
-  Writer.setOffset(0);
-  ::memset(DataBytes.data(), 0, 10);
-  EXPECT_THAT_ERROR(Writer.writeFixedString(FStr[0]), Succeeded());
-  EXPECT_THAT_ERROR(Reader.readFixedString(FStr[1], FStr[0].size()),
-                    Succeeded());
-  EXPECT_EQ(FStr[0], FStr[1]);
-  EXPECT_EQ(
-      std::vector<uint8_t>({'x', 'i', 'F', 'd', ' ', 'S', 'e', 't', 0, 'r'}),
-      DataBytes);
-
-  Reader.setOffset(0);
-  Writer.setOffset(0);
-  ::memset(DataBytes.data(), 0, 10);
-  EXPECT_THAT_ERROR(Writer.writeArray(byteArray[0]), Succeeded());
-  EXPECT_THAT_ERROR(Reader.readArray(byteArray[1], byteArray[0].size()),
-                    Succeeded());
-  EXPECT_EQ(byteArray[0], byteArray[1]);
-  EXPECT_EQ(std::vector<uint8_t>({0, 0x32, 0x31, 0, 0, 0, 0, 0, 0, 0}),
-            DataBytes);
-
-  Reader.setOffset(0);
-  Writer.setOffset(0);
-  ::memset(DataBytes.data(), 0, 10);
-  EXPECT_THAT_ERROR(Writer.writeArray(intArray[0]), Succeeded());
-  EXPECT_THAT_ERROR(Reader.readArray(intArray[1], intArray[0].size()),
-                    Succeeded());
-  EXPECT_EQ(intArray[0], intArray[1]);
-}
-
-TEST(MappedBlockStreamTest, TestWriteContiguousStreamRef) {
-  std::vector<uint8_t> DestDataBytes(10);
-  MutableArrayRef<uint8_t> DestData(DestDataBytes);
-  const uint32_t DestBlocks[] = {2, 1, 0, 6, 3, 4, 5, 7, 9, 8};
-
-  std::vector<uint8_t> SrcDataBytes(10);
-  MutableArrayRef<uint8_t> SrcData(SrcDataBytes);
-
-  DiscontiguousStream F(DestBlocks, DestData);
-  auto DestStream = WritableMappedBlockStream::createStream(
-      F.block_size(), F.layout(), F, F.Allocator);
-
-  // First write "Test Str" into the source stream.
-  MutableBinaryByteStream SourceStream(SrcData, little);
-  BinaryStreamWriter SourceWriter(SourceStream);
-  EXPECT_THAT_ERROR(SourceWriter.writeCString("Test Str"), Succeeded());
-  EXPECT_EQ(SrcDataBytes, std::vector<uint8_t>(
-                              {'T', 'e', 's', 't', ' ', 'S', 't', 'r', 0, 0}));
-
-  // Then write the source stream into the dest stream.
-  BinaryStreamWriter DestWriter(*DestStream);
-  EXPECT_THAT_ERROR(DestWriter.writeStreamRef(SourceStream), Succeeded());
-  EXPECT_EQ(DestDataBytes, std::vector<uint8_t>(
-                               {'s', 'e', 'T', ' ', 'S', 't', 't', 'r', 0, 0}));
-
-  // Then read the string back out of the dest stream.
-  StringRef Result;
-  BinaryStreamReader DestReader(*DestStream);
-  EXPECT_THAT_ERROR(DestReader.readCString(Result), Succeeded());
-  EXPECT_EQ(Result, "Test Str");
-}
-
-TEST(MappedBlockStreamTest, TestWriteDiscontiguousStreamRef) {
-  std::vector<uint8_t> DestDataBytes(10);
-  MutableArrayRef<uint8_t> DestData(DestDataBytes);
-  const uint32_t DestBlocks[] = {2, 1, 0, 6, 3, 4, 5, 7, 9, 8};
-
-  std::vector<uint8_t> SrcDataBytes(10);
-  MutableArrayRef<uint8_t> SrcData(SrcDataBytes);
-  const uint32_t SrcBlocks[] = {1, 0, 6, 3, 4, 5, 2, 7, 8, 9};
-
-  DiscontiguousStream DestF(DestBlocks, DestData);
-  DiscontiguousStream SrcF(SrcBlocks, SrcData);
-
-  auto Dest = WritableMappedBlockStream::createStream(
-      DestF.block_size(), DestF.layout(), DestF, DestF.Allocator);
-  auto Src = WritableMappedBlockStream::createStream(
-      SrcF.block_size(), SrcF.layout(), SrcF, SrcF.Allocator);
-
-  // First write "Test Str" into the source stream.
-  BinaryStreamWriter SourceWriter(*Src);
-  EXPECT_THAT_ERROR(SourceWriter.writeCString("Test Str"), Succeeded());
-  EXPECT_EQ(SrcDataBytes, std::vector<uint8_t>(
-                              {'e', 'T', 't', 't', ' ', 'S', 's', 'r', 0, 0}));
-
-  // Then write the source stream into the dest stream.
-  BinaryStreamWriter DestWriter(*Dest);
-  EXPECT_THAT_ERROR(DestWriter.writeStreamRef(*Src), Succeeded());
-  EXPECT_EQ(DestDataBytes, std::vector<uint8_t>(
-                               {'s', 'e', 'T', ' ', 'S', 't', 't', 'r', 0, 0}));
-
-  // Then read the string back out of the dest stream.
-  StringRef Result;
-  BinaryStreamReader DestReader(*Dest);
-  EXPECT_THAT_ERROR(DestReader.readCString(Result), Succeeded());
-  EXPECT_EQ(Result, "Test Str");
-}
-
-TEST(MappedBlockStreamTest, DataLivesAfterStreamDestruction) {
-  std::vector<uint8_t> DataBytes(10);
-  MutableArrayRef<uint8_t> Data(DataBytes);
-  const uint32_t Blocks[] = {2, 1, 0, 6, 3, 4, 5, 7, 9, 8};
-
-  StringRef Str[] = {"Zero Str", ""};
-
-  DiscontiguousStream F(Blocks, Data);
-  {
-    auto S = WritableMappedBlockStream::createStream(F.block_size(), F.layout(),
-                                                     F, F.Allocator);
-
-    BinaryStreamReader Reader(*S);
-    BinaryStreamWriter Writer(*S);
-    ::memset(DataBytes.data(), 0, 10);
-    EXPECT_THAT_ERROR(Writer.writeCString(Str[0]), Succeeded());
-    EXPECT_THAT_ERROR(Reader.readCString(Str[1]), Succeeded());
-    EXPECT_EQ(Str[0], Str[1]);
-  }
-
-  EXPECT_EQ(Str[0], Str[1]);
-}
-
-} // end anonymous namespace
diff --git a/external/bsd/llvm/dist/llvm/unittests/Support/DynamicLibrary/ExportedFuncs.cxx b/external/bsd/llvm/dist/llvm/unittests/Support/DynamicLibrary/ExportedFuncs.cxx
deleted file mode 100644
index 97f190b0b9bc..000000000000
--- a/external/bsd/llvm/dist/llvm/unittests/Support/DynamicLibrary/ExportedFuncs.cxx
+++ /dev/null
@@ -1,16 +0,0 @@
-//===- llvm/unittest/Support/DynamicLibrary/DynamicLibraryLib.cpp ---------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "PipSqueak.h"
-
-#ifndef PIPSQUEAK_TESTA_RETURN
-#define PIPSQUEAK_TESTA_RETURN "ProcessCall"
-#endif
-
-extern "C" PIPSQUEAK_EXPORT const char *TestA() { return PIPSQUEAK_TESTA_RETURN; }
diff --git a/external/bsd/llvm/dist/llvm/unittests/Support/DynamicLibrary/PipSqueak.cxx b/external/bsd/llvm/dist/llvm/unittests/Support/DynamicLibrary/PipSqueak.cxx
deleted file mode 100644
index 375d72c0b535..000000000000
--- a/external/bsd/llvm/dist/llvm/unittests/Support/DynamicLibrary/PipSqueak.cxx
+++ /dev/null
@@ -1,49 +0,0 @@
-//===- llvm/unittest/Support/DynamicLibrary/PipSqueak.cxx -----------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "PipSqueak.h"
-
-struct Global {
-  std::string *Str;
-  std::vector<std::string> *Vec;
-  Global() : Str(nullptr), Vec(nullptr) {}
-  ~Global() {
-    if (Str) {
-      if (Vec)
-        Vec->push_back(*Str);
-      *Str = "Global::~Global";
-    }
-  }
-};
-
-static Global Glb;
-
-struct Local {
-  std::string &Str;
-  Local(std::string &S) : Str(S) {
-    Str = "Local::Local";
-    if (Glb.Str && !Glb.Str->empty())
-      Str += std::string("(") + *Glb.Str + std::string(")");
-  }
-  ~Local() { Str = "Local::~Local"; }
-};
-
-
-extern "C" PIPSQUEAK_EXPORT void SetStrings(std::string &GStr,
-                                            std::string &LStr) {
-  Glb.Str = &GStr;
-  static Local Lcl(LStr);
-}
-
-extern "C" PIPSQUEAK_EXPORT void TestOrder(std::vector<std::string> &V) {
-  Glb.Vec = &V;
-}
-
-#define PIPSQUEAK_TESTA_RETURN "LibCall"
-#include "ExportedFuncs.cxx"
diff --git a/external/bsd/llvm/dist/llvm/utils/docker/debian8/build/Dockerfile b/external/bsd/llvm/dist/llvm/utils/docker/debian8/build/Dockerfile
deleted file mode 100644
index 13a11a73be6c..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/docker/debian8/build/Dockerfile
+++ /dev/null
@@ -1,35 +0,0 @@
-#===- llvm/utils/docker/debian8/build/Dockerfile -------------------------===//
-#
-#                     The LLVM Compiler Infrastructure
-#
-# This file is distributed under the University of Illinois Open Source
-# License. See LICENSE.TXT for details.
-#
-#===----------------------------------------------------------------------===//
-# Produces an image that compiles and archives clang, based on debian8.
-FROM launcher.gcr.io/google/debian8:latest
-
-LABEL maintainer "LLVM Developers"
-
-# Install build dependencies of llvm.
-# First, Update the apt's source list and include the sources of the packages.
-RUN grep deb /etc/apt/sources.list | \
-    sed 's/^deb/deb-src /g' >> /etc/apt/sources.list
-
-# Install compiler, python and subversion.
-RUN apt-get update && \
-    apt-get install -y --no-install-recommends build-essential python2.7 wget \
-            subversion ninja-build && \
-    rm -rf /var/lib/apt/lists/*
-
-# Install cmake version that can compile clang into /usr/local.
-# (Version in debian8 repos is is too old)
-RUN wget -O - "https://cmake.org/files/v3.7/cmake-3.7.2-Linux-x86_64.tar.gz" | \
-    tar xzf - -C /usr/local --strip-components=1
-
-# Arguments passed to build_install_clang.sh.
-ARG buildscript_args
-
-# Run the build. Results of the build will be available as /tmp/clang.tar.gz.
-ADD scripts/build_install_llvm.sh /tmp
-RUN /tmp/build_install_llvm.sh ${buildscript_args}
diff --git a/external/bsd/llvm/dist/llvm/utils/docker/debian8/release/Dockerfile b/external/bsd/llvm/dist/llvm/utils/docker/debian8/release/Dockerfile
deleted file mode 100644
index d0214b9c67af..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/docker/debian8/release/Dockerfile
+++ /dev/null
@@ -1,21 +0,0 @@
-#===- llvm/utils/docker/debian8/release/Dockerfile -----------------------===//
-#
-#                     The LLVM Compiler Infrastructure
-#
-# This file is distributed under the University of Illinois Open Source
-# License. See LICENSE.TXT for details.
-#
-#===----------------------------------------------------------------------===//
-# A release image, containing clang installation, produced by the 'build/' image
-# and adding libstdc++ and binutils.
-FROM launcher.gcr.io/google/debian8:latest
-
-LABEL maintainer "LLVM Developers"
-
-# Install packages for minimal usefull image.
-RUN apt-get update && \
-    apt-get install -y --no-install-recommends libstdc++-4.9-dev binutils && \
-    rm -rf /var/lib/apt/lists/*
-
-# Unpack clang installation into this image.
-ADD clang.tar.gz /
diff --git a/external/bsd/llvm/dist/llvm/utils/docker/example/build/Dockerfile b/external/bsd/llvm/dist/llvm/utils/docker/example/build/Dockerfile
deleted file mode 100644
index 597ccfeb4f23..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/docker/example/build/Dockerfile
+++ /dev/null
@@ -1,26 +0,0 @@
-#===- llvm/utils/docker/example/build/Dockerfile -------------------------===//
-#
-#                     The LLVM Compiler Infrastructure
-#
-# This file is distributed under the University of Illinois Open Source
-# License. See LICENSE.TXT for details.
-#
-#===----------------------------------------------------------------------===//
-# This is an example Dockerfile to build an image that compiles clang.
-# Replace FIXMEs to prepare your own image.
-
-# FIXME: Replace 'ubuntu' with your base image
-FROM ubuntu
-
-# FIXME: Change maintainer name
-LABEL maintainer "Maintainer <maintainer@email>"
-
-# FIXME: Install llvm/clang build dependencies. Including compiler to
-# build stage1, cmake, subversion, ninja, etc.
-
-# Arguments to pass to build_install_clang.sh.
-ARG buildscript_args
-
-# Run the build. Results of the build will be available as /tmp/clang.tar.gz.
-ADD scripts/build_install_llvm.sh /tmp
-RUN /tmp/build_install_llvm.sh ${buildscript_args}
diff --git a/external/bsd/llvm/dist/llvm/utils/docker/example/release/Dockerfile b/external/bsd/llvm/dist/llvm/utils/docker/example/release/Dockerfile
deleted file mode 100644
index 953d81fc9951..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/docker/example/release/Dockerfile
+++ /dev/null
@@ -1,24 +0,0 @@
-#===- llvm/utils/docker/example/release/Dockerfile -----------------------===//
-#
-#                     The LLVM Compiler Infrastructure
-#
-# This file is distributed under the University of Illinois Open Source
-# License. See LICENSE.TXT for details.
-#
-#===----------------------------------------------------------------------===//
-# An image that unpacks a clang installation, compiled by the 'build/'
-# container.
-# Replace FIXMEs to prepare your own image.
-
-# FIXME: Replace 'ubuntu' with your base image.
-FROM ubuntu
-
-# FIXME: Change maintainer name.
-LABEL maintainer "Maintainer <maintainer@email>"
-
-# FIXME: Install all packages you want to have in your release container.
-# A minimal usefull installation must include libstdc++ and binutils.
-
-# Unpack clang installation into this container.
-# It is copied to this directory by build_docker_image.sh script.
-ADD clang.tar.gz /
diff --git a/external/bsd/llvm/dist/llvm/utils/docker/nvidia-cuda/build/Dockerfile b/external/bsd/llvm/dist/llvm/utils/docker/nvidia-cuda/build/Dockerfile
deleted file mode 100644
index 619b80cbb61a..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/docker/nvidia-cuda/build/Dockerfile
+++ /dev/null
@@ -1,25 +0,0 @@
-#===- llvm/utils/docker/nvidia-cuda/build/Dockerfile ---------------------===//
-#
-#                     The LLVM Compiler Infrastructure
-#
-# This file is distributed under the University of Illinois Open Source
-# License. See LICENSE.TXT for details.
-#
-#===----------------------------------------------------------------------===//
-# Produces an image that compiles and archives clang, based on nvidia/cuda
-# image.
-FROM nvidia/cuda:8.0-devel
-
-LABEL maintainer "LLVM Developers"
-
-# Arguments to pass to build_install_clang.sh.
-ARG buildscript_args
-
-# Install llvm build dependencies.
-RUN apt-get update && \
-    apt-get install -y --no-install-recommends cmake python2.7 subversion ninja-build && \
-    rm -rf /var/lib/apt/lists/*
-
-# Run the build. Results of the build will be available as /tmp/clang.tar.gz.
-ADD scripts/build_install_llvm.sh /tmp
-RUN /tmp/build_install_llvm.sh ${buildscript_args}
diff --git a/external/bsd/llvm/dist/llvm/utils/docker/nvidia-cuda/release/Dockerfile b/external/bsd/llvm/dist/llvm/utils/docker/nvidia-cuda/release/Dockerfile
deleted file mode 100644
index b9bcae159780..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/docker/nvidia-cuda/release/Dockerfile
+++ /dev/null
@@ -1,23 +0,0 @@
-#===- llvm/utils/docker/nvidia-cuda/release/Dockerfile -------------------===//
-#
-#                     The LLVM Compiler Infrastructure
-#
-# This file is distributed under the University of Illinois Open Source
-# License. See LICENSE.TXT for details.
-#
-#===----------------------------------------------------------------------===//
-# This is an example Dockerfile that copies a clang installation, compiled
-# by the 'build/' container into a fresh docker image to get a container of
-# minimal size.
-# Replace FIXMEs to prepare a new Dockerfile.
-
-# FIXME: Replace 'ubuntu' with your base image.
-FROM nvidia/cuda:8.0-devel
-
-# FIXME: Change maintainer name.
-LABEL maintainer "LLVM Developers"
-
-# Unpack clang installation into this container.
-ADD clang.tar.gz /
-
-# C++ standard library and binutils are already included in the base package.
diff --git a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-format/DummySubDir/OneTest b/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-format/DummySubDir/OneTest
deleted file mode 100755
index dd49f025b1f2..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-format/DummySubDir/OneTest
+++ /dev/null
@@ -1,36 +0,0 @@
-#!/usr/bin/env python
-
-import sys
-
-if len(sys.argv) != 2:
-    raise ValueError("unexpected number of args")
-
-if sys.argv[1] == "--gtest_list_tests":
-    print("""\
-FirstTest.
-  subTestA
-  subTestB
-ParameterizedTest/0.
-  subTest
-ParameterizedTest/1.
-  subTest""")
-    sys.exit(0)
-elif not sys.argv[1].startswith("--gtest_filter="):
-    raise ValueError("unexpected argument: %r" % (sys.argv[1]))
-
-test_name = sys.argv[1].split('=',1)[1]
-if test_name == 'FirstTest.subTestA':
-    print('I am subTest A, I PASS')
-    print('[  PASSED  ] 1 test.')
-    sys.exit(0)
-elif test_name == 'FirstTest.subTestB':
-    print('I am subTest B, I FAIL')
-    print('And I have two lines of output')
-    sys.exit(1)
-elif test_name in ('ParameterizedTest/0.subTest',
-                   'ParameterizedTest/1.subTest'):
-    print('I am a parameterized test, I also PASS')
-    print('[  PASSED  ] 1 test.')
-    sys.exit(0)
-else:
-    raise SystemExit("error: invalid test name: %r" % (test_name,))
diff --git a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-timeout/DummySubDir/OneTest b/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-timeout/DummySubDir/OneTest
deleted file mode 100644
index f3a90ff4cd67..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-timeout/DummySubDir/OneTest
+++ /dev/null
@@ -1,35 +0,0 @@
-#!/usr/bin/env python
-
-import sys
-import time
-
-if len(sys.argv) != 2:
-    raise ValueError("unexpected number of args")
-
-if sys.argv[1] == "--gtest_list_tests":
-    print("""\
-FirstTest.
-  subTestA
-  subTestB
-  subTestC
-""")
-    sys.exit(0)
-elif not sys.argv[1].startswith("--gtest_filter="):
-    raise ValueError("unexpected argument: %r" % (sys.argv[1]))
-
-test_name = sys.argv[1].split('=',1)[1]
-if test_name == 'FirstTest.subTestA':
-    print('I am subTest A, I PASS')
-    print('[  PASSED  ] 1 test.')
-    sys.exit(0)
-elif test_name == 'FirstTest.subTestB':
-    print('I am subTest B, I am slow')
-    time.sleep(6)
-    print('[  PASSED  ] 1 test.')
-    sys.exit(0)
-elif test_name == 'FirstTest.subTestC':
-    print('I am subTest C, I will hang')
-    while True:
-        pass
-else:
-    raise SystemExit("error: invalid test name: %r" % (test_name,))
diff --git a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-upstream-format/DummySubDir/OneTest b/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-upstream-format/DummySubDir/OneTest
deleted file mode 100644
index d7bc5968f261..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/googletest-upstream-format/DummySubDir/OneTest
+++ /dev/null
@@ -1,38 +0,0 @@
-#!/usr/bin/env python
-
-import sys
-
-if len(sys.argv) != 2:
-    raise ValueError("unexpected number of args")
-
-if sys.argv[1] == "--gtest_list_tests":
-    print("""\
-Running main() from gtest_main.cc
-FirstTest.
-  subTestA
-  subTestB
-ParameterizedTest/0.
-  subTest
-ParameterizedTest/1.
-  subTest""")
-    sys.exit(0)
-elif not sys.argv[1].startswith("--gtest_filter="):
-    raise ValueError("unexpected argument: %r" % (sys.argv[1]))
-
-test_name = sys.argv[1].split('=',1)[1]
-print('Running main() from gtest_main.cc')
-if test_name == 'FirstTest.subTestA':
-    print('I am subTest A, I PASS')
-    print('[  PASSED  ] 1 test.')
-    sys.exit(0)
-elif test_name == 'FirstTest.subTestB':
-    print('I am subTest B, I FAIL')
-    print('And I have two lines of output')
-    sys.exit(1)
-elif test_name in ('ParameterizedTest/0.subTest',
-                   'ParameterizedTest/1.subTest'):
-    print('I am a parameterized test, I also PASS')
-    print('[  PASSED  ] 1 test.')
-    sys.exit(0)
-else:
-    raise SystemExit("error: invalid test name: %r" % (test_name,))
diff --git a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-format/external_shell/write-bad-encoding.sh b/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-format/external_shell/write-bad-encoding.sh
deleted file mode 100755
index 6b622cb232e2..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-format/external_shell/write-bad-encoding.sh
+++ /dev/null
@@ -1,3 +0,0 @@
-#!/bin/sh
-
-echo "a line with bad encoding: Â."
diff --git a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stderr.sh b/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stderr.sh
deleted file mode 100755
index ead3fd3ce377..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stderr.sh
+++ /dev/null
@@ -1,3 +0,0 @@
-#!/bin/sh
-
-echo "a line on stderr" 1>&2
diff --git a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stdout-and-stderr.sh b/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stdout-and-stderr.sh
deleted file mode 100755
index f20de5d9042d..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stdout-and-stderr.sh
+++ /dev/null
@@ -1,4 +0,0 @@
-#!/bin/sh
-
-echo "a line on stdout"
-echo "a line on stderr" 1>&2
diff --git a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-timeout/quick_then_slow.py b/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-timeout/quick_then_slow.py
deleted file mode 100644
index b81fbe5a8bfe..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-timeout/quick_then_slow.py
+++ /dev/null
@@ -1,24 +0,0 @@
-# RUN: %{python} %s quick
-# RUN: %{python} %s slow
-from __future__ import print_function
-
-import time
-import sys
-
-if len(sys.argv) != 2:
-    print("Wrong number of args")
-    sys.exit(1)
-
-mode =  sys.argv[1]
-
-if mode == 'slow':
-    print("Running in slow mode")
-    sys.stdout.flush() # Make sure the print gets flushed so it appears in lit output.
-    time.sleep(6)
-    sys.exit(0)
-elif mode == 'quick':
-    print("Running in quick mode")
-    sys.exit(0)
-else:
-    print("Unrecognised mode {}".format(mode))
-    sys.exit(1)
diff --git a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-timeout/slow.py b/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-timeout/slow.py
deleted file mode 100644
index 2dccd6331360..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/lit/tests/Inputs/shtest-timeout/slow.py
+++ /dev/null
@@ -1,9 +0,0 @@
-# RUN: %{python} %s
-from __future__ import print_function
-
-import time
-import sys
-
-print("Running slow program")
-sys.stdout.flush() # Make sure the print gets flushed so it appears in lit output.
-time.sleep(6)
diff --git a/external/bsd/llvm/dist/llvm/utils/llvm-build/llvmbuild/configutil.py b/external/bsd/llvm/dist/llvm/utils/llvm-build/llvmbuild/configutil.py
deleted file mode 100644
index b5582c34de46..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/llvm-build/llvmbuild/configutil.py
+++ /dev/null
@@ -1,66 +0,0 @@
-"""
-Defines utilities useful for performing standard "configuration" style tasks.
-"""
-
-import re
-import os
-
-def configure_file(input_path, output_path, substitutions):
-    """configure_file(input_path, output_path, substitutions) -> bool
-
-    Given an input and output path, "configure" the file at the given input path
-    by replacing variables in the file with those given in the substitutions
-    list. Returns true if the output file was written.
-
-    The substitutions list should be given as a list of tuples (regex string,
-    replacement), where the regex and replacement will be used as in 're.sub' to
-    execute the variable replacement.
-
-    The output path's parent directory need not exist (it will be created).
-
-    If the output path does exist and the configured data is not different than
-    it's current contents, the output file will not be modified. This is
-    designed to limit the impact of configured files on build dependencies.
-    """
-
-    # Read in the input data.
-    f = open(input_path, "rb")
-    try:
-        data = f.read()
-    finally:
-        f.close()
-
-    # Perform the substitutions.
-    for regex_string,replacement in substitutions:
-        regex = re.compile(regex_string)
-        data = regex.sub(replacement, data)
-
-    # Ensure the output parent directory exists.
-    output_parent_path = os.path.dirname(os.path.abspath(output_path))
-    if not os.path.exists(output_parent_path):
-        os.makedirs(output_parent_path)
-
-    # If the output path exists, load it and compare to the configured contents.
-    if os.path.exists(output_path):
-        current_data = None
-        try:
-            f = open(output_path, "rb")
-            try:
-                current_data = f.read()
-            except:
-                current_data = None
-            f.close()
-        except:
-            current_data = None
-
-        if current_data is not None and current_data == data:
-            return False
-
-    # Write the output contents.
-    f = open(output_path, "wb")
-    try:
-        f.write(data)
-    finally:
-        f.close()
-
-    return True
diff --git a/external/bsd/llvm/dist/llvm/utils/makellvm b/external/bsd/llvm/dist/llvm/utils/makellvm
deleted file mode 100755
index ae77712941a2..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/makellvm
+++ /dev/null
@@ -1,145 +0,0 @@
-#!/bin/csh -f
-
-set pstatus = 0
-onintr cleanup
-alias usage 'echo "USAGE: $0:t [-h] [-n] [-obj obj-root] [gmake-flags] [VAR=...] [toolname (default: opt)]"; set pstatus = 1; goto cleanup'
-
-set EXEC = opt
-set GMAKE_OPTS = ""
-set DEBUG = 0
-
-## Search path for automatically finding the obj-root to use.
-## Note: The src root directory ${LLVMDIR} will be prepended to this path later.
-## 
-set OBJROOTDIRLIST = ( )
-
-set doit = 1
-unset options_done
-while ( !( $?options_done ) && ($#argv > 0))
-    switch ($argv[1])
-	case -h :
-	    usage
-	case -f :
-	    if ($#argv < 2) usage
-	    shift argv; set MFILE = $argv[1]; shift argv; breaksw
-	case -n :
-	    set doit = 0; shift argv; breaksw
-	case -obj :
-	    set OBJROOT = $argv[2]; shift argv; shift argv
-	    if (! -d "$OBJROOT") then
-		echo "FATAL: Illegal obj-root directory ${OBJROOT}"
-		exit 1
-	    endif
-	    breaksw
-	case -d :
-	    set doit = 0; set DEBUG = 1; shift argv; breaksw
-	case -* :
-	    set GMAKE_OPTS = ( $GMAKE_OPTS $argv[1] ); shift argv; breaksw
-	default :
-	    set optarg = `echo -n $argv[1] | sed 's/^[^=]*$//'`
-	    if ($#optarg) then
-	        set GMAKE_OPTS = ( $GMAKE_OPTS $optarg )
-	        shift argv
-	    else
-	        set options_done
-	    endif
-            breaksw
-    endsw
-end
-
-if ($#argv > 1) then
-    echo 'ERROR: More than one tool is not supported by "makellvm"'
-    usage
-endif
-if ($#argv > 0) then
-    set EXEC = $argv[1]
-endif
-if ($DEBUG) then
-    echo "DEBUG: EXEC = $EXEC"
-endif
-
-## Compute LLVMDIR: the root of the current LLVM tree.
-## It is recorded in the variable LEVEL in Makefile, to compute it
-## 
-if (! $?MFILE) then
-    if (-f GNUmakefile) then
-	set MFILE = GNUmakefile
-    else if (-f makefile) then
-	set MFILE = makefile
-    else
-	set MFILE = Makefile
-    endif
-endif
-if ($DEBUG) then
-    echo "DEBUG: MFILE = $MFILE"
-endif
-if (! -f $MFILE) then
-    echo "Missing or invalid makefile: $MFILE"
-    exit 1
-endif
-
-set LLVMDIR = `awk '/LEVEL[ 	]*=/ {print $NF}' $MFILE`
-if ($DEBUG) then
-    echo "DEBUG: LLVMDIR = $LLVMDIR"
-endif
-
-if ($#LLVMDIR == 0 || ! -d "$LLVMDIR") then
-    echo "Unable to find LLVM src-root directory or directory is invalid."
-    echo "Are you within a valid LLVM directory for running gmake?"
-    exit 1
-endif
-
-## Try to determine the obj-root directory automatically if not specified
-## 
-set OBJROOTDIRLIST = ( ${LLVMDIR} $OBJROOTDIRLIST )	## add src dir
-if ($?OBJROOT == 0) then
-    ## Try to determine object root directory by looking for Makefile.config
-    foreach objdir ( $OBJROOTDIRLIST )
-	if (-f "${objdir}/Makefile.config") then
-	    set OBJROOT = ${objdir}
-            break
-        endif
-    end
-    if ($?OBJROOT == 0) then
-	echo "FATAL: Could not choose an obj-root directory from these choices:"
-	echo "       ${OBJROOTDIRLIST}."
-	echo "       You can specify it explicitly using '-obj obj-root'."
-	exit 1
-    endif
-    echo "Using OBJ-ROOT = ${OBJROOT} (specify '-obj obj-root' to override)."
-endif
-if (${OBJROOT} == ${LLVMDIR}) then
-    # run make in the source directory itself
-    set BUILDROOT = .
-else
-    # run make in the in the obj-root tree, in the directory for $cwd
-    set SRCROOT = `sh -c "cd $LLVMDIR; pwd | sed 's/\//\\\//g'"` 
-    set CURSRCDIR = `echo $cwd | sed -e "s/${SRCROOT}//"`
-    set BUILDROOT = ${OBJROOT}/${CURSRCDIR}
-    unset SRCROOT CURSRCDIR
-endif
-if ($DEBUG) then
-    echo "DEBUG: BUILDROOT = $BUILDROOT"
-endif
-if (! -d $BUILDROOT) then
-    echo "FATAL: Invalid build directory: ${BUILDROOT}"
-    exit 1
-endif
-cd $BUILDROOT 
-
-set CMD = "make $GMAKE_OPTS && (cd $LLVMDIR/tools/$EXEC && make $GMAKE_OPTS)"
-
-if ($doit == 1) then
-    csh -f -c "$CMD"
-    set pstatus = $?
-else
-    echo '(NOT EXECUTING) COMMAND:'
-    echo "  $CMD"
-endif
-
-
-#=========================================================
-# CODE TO BE EXECUTED IF INTERRUPT IS RECEIVED
-#=========================================================
-cleanup:
-    exit($pstatus)
diff --git a/external/bsd/llvm/dist/llvm/utils/test_debuginfo.pl b/external/bsd/llvm/dist/llvm/utils/test_debuginfo.pl
deleted file mode 100755
index aaf90d95468c..000000000000
--- a/external/bsd/llvm/dist/llvm/utils/test_debuginfo.pl
+++ /dev/null
@@ -1,80 +0,0 @@
-#!/usr/bin/perl
-#
-# This script tests debugging information generated by a compiler.
-# Input arguments
-#   - Input source program. Usually this source file is decorated using
-#     special comments to communicate debugger commands.
-#   - Executable file. This file is generated by the compiler.
-#
-# This perl script extracts debugger commands from input source program 
-# comments in a script. A debugger is used to load the executable file
-# and run the script generated from source program comments. Finally,
-# the debugger output is checked, using FileCheck, to validate 
-# debugging information.
-#
-# On Darwin the default is to use the llgdb.py wrapper script which
-# translates gdb commands into their lldb equivalents.
-
-use File::Basename;
-use Config;
-use Cwd;
-
-my $testcase_file = $ARGV[0];
-my $executable_file = $ARGV[1];
-
-my $input_filename = basename $testcase_file;
-my $output_dir = dirname $executable_file;
-
-my $debugger_script_file = "$output_dir/$input_filename.debugger.script";
-my $output_file = "$output_dir/$input_filename.gdb.output";
-
-my %cmd_map = ();
-# Assume lldb to be the debugger on Darwin.
-my $use_lldb = 0;
-$use_lldb = 1 if ($Config{osname} eq "darwin");
-
-# Extract debugger commands from testcase. They are marked with DEBUGGER: 
-# at the beginning of a comment line.
-open(INPUT, $testcase_file);
-open(OUTPUT, ">$debugger_script_file");
-while(<INPUT>) {
-    my($line) = $_;
-    $i = index($line, "DEBUGGER:");
-    if ( $i >= 0) {
-        $l = length("DEBUGGER:");
-        $s = substr($line, $i + $l);
-        print OUTPUT  "$s";
-    }
-}
-print OUTPUT "\n";
-print OUTPUT "quit\n";
-close(INPUT);
-close(OUTPUT);
-
-# setup debugger and debugger options to run a script.
-my $my_debugger = $ENV{'DEBUGGER'};
-if (!$my_debugger) {
-    if ($use_lldb) {
-        my $path = dirname(Cwd::abs_path($0));
-        $my_debugger = "/usr/bin/env python $path/../tools/clang/test/debuginfo-tests/llgdb.py";
-    } else {
-        $my_debugger = "gdb";
-    }
-}
-
-# quiet / exit after cmdline / no init file / execute script
-my $debugger_options = "-q -batch -n -x";
-
-# run debugger and capture output.
-system("$my_debugger $debugger_options $debugger_script_file $executable_file > $output_file 2>&1");
-
-# validate output.
-system("FileCheck", "-input-file", "$output_file", "$testcase_file");
-if ($?>>8 == 1) {
-    print "Debugger output was:\n";
-    system("cat", "$output_file");
-    exit 1;
-}
-else {
-    exit 0;
-}