Note support of fully coherent data caches for MIPS32/64 CPUs.

This commit is contained in:
simonb 2002-12-17 12:10:03 +00:00
parent 5b6caeca74
commit 8efaf7f099
1 changed files with 3 additions and 1 deletions

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@ -1,4 +1,4 @@
LIST OF CHANGES FROM LAST RELEASE: <$Revision: 1.55 $>
LIST OF CHANGES FROM LAST RELEASE: <$Revision: 1.56 $>
[Note: This file does not mention every change made to the NetBSD source tree.
@ -205,3 +205,5 @@ Changes from NetBSD 1.6 to NetBSD 1.7:
existing Walnut port as its first member. [scw 20021209]
db(1): Added. Manipulates db(3) btree(3) and hash(3) databases.
[lukem 20021211]
mips: support fully coherent data caches on MIPS32 and MIPS64 cpus
(enabled for Au1x00 and SB-1 CPUS). [simonb 20021217].