Areca Technology Corporation SATA RAID controller driver, ported
from OpenBSD.
arc0 at pci2 dev 14 function 0: interrupting at ioapic0 pin 18 (irq 5)
arc0: Areca ARC-1210 Host Adapter RAID controller
arc0: 4 ports, 256MB SDRAM, firmware <V1.43 2007-4-17>
scsibus0 at arc0: 16 targets, 8 luns per target
[...]
scsibus0: waiting 2 seconds for devices to settle...
sd0 at scsibus0 target 0 lun 0: <Areca, ARC-1210-VOL#00, R001> disk fixed
sd0: 465 GB, 56514 cyl, 36 head, 480 sec, 512 bytes/sect x 976562176 sectors
sd1 at scsibus0 target 0 lun 1: <Areca, ARC-1210-VOL#01, R001> disk fixed
sd1: 465 GB, 56514 cyl, 36 head, 480 sec, 512 bytes/sect x 976562176 sectors
bioctl(4) output with two RAID0 volumes:
Volume Status Size Device
arc0 0 Online 466G ARC-1210-VOL#00 RAID0
0 Online 234G 0:0.0 noencl <WDC WD2500YS-01SHB1 20.06C06>
1 Online 234G 0:1.0 noencl <WDC WD2500YS-01SHB1 20.06C06>
arc0 1 Online 466G ARC-1210-VOL#01 RAID0
0 Online 234G 0:2.0 noencl <WDC WD2500YS-01SHB1 20.06C06>
1 Online 234G 0:3.0 noencl <WDC WD2500YS-01SHB1 20.06C06>
The driver still needs changes related to locking and talking to the
firmware, which sometimes is unable to answer...
Raid card donated by Areca Technology Corporation via Trent George.
Disks used for testing were contributed by TNF.
Thank you very much.
This commit is contained in:
xtraeme
parent
f2af9174b9
commit
8e6cf74867
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: mi,v 1.1040 2007/11/21 19:10:23 pooka Exp $
|
||||
# $NetBSD: mi,v 1.1041 2007/12/04 18:47:53 xtraeme Exp $
|
||||
./etc/mtree/set.man man-sys-root
|
||||
./usr/share/info/am-utils.info man-amd-info info
|
||||
./usr/share/info/as.info man-computil-info bfd,info
|
||||
|
|
@ -661,6 +661,7 @@
|
|||
./usr/share/man/cat4/amr.0 man-sys-catman .cat
|
||||
./usr/share/man/cat4/ams.0 man-sys-catman .cat
|
||||
./usr/share/man/cat4/an.0 man-sys-catman .cat
|
||||
./usr/share/man/cat4/arc.0 man-sys-catman .cat
|
||||
./usr/share/man/cat4/arc/intro.0 man-sys-catman .cat
|
||||
./usr/share/man/cat4/aria.0 man-sys-catman .cat
|
||||
./usr/share/man/cat4/arm26/arckbd.0 man-obsolete obsolete
|
||||
|
|
@ -3175,6 +3176,7 @@
|
|||
./usr/share/man/man4/amr.4 man-sys-man .man
|
||||
./usr/share/man/man4/ams.4 man-sys-man .man
|
||||
./usr/share/man/man4/an.4 man-sys-man .man
|
||||
./usr/share/man/man4/arc.4 man-sys-man .man
|
||||
./usr/share/man/man4/arc/intro.4 man-sys-man .man
|
||||
./usr/share/man/man4/aria.4 man-sys-man .man
|
||||
./usr/share/man/man4/arm26/arckbd.4 man-obsolete obsolete
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
LIST OF CHANGES FROM LAST RELEASE: <$Revision: 1.958 $>
|
||||
LIST OF CHANGES FROM LAST RELEASE: <$Revision: 1.959 $>
|
||||
|
||||
|
||||
[Note: This file does not mention every change made to the NetBSD source tree.
|
||||
|
|
@ -275,3 +275,5 @@ Changes from NetBSD 4.0 to NetBSD 5.0:
|
|||
toolchain: Install the linker scripts on amd64, which allows to
|
||||
link x86 32bits objects using the native ld(1).
|
||||
[bouyer 20071202]
|
||||
arc(4): Areca Technology Corporation SATA RAID controller driver,
|
||||
ported from OpenBSD. [xtraeme 20071204]
|
||||
|
|
|
|||
|
|
@ -1,10 +1,10 @@
|
|||
# $NetBSD: Makefile,v 1.449 2007/11/21 19:10:23 pooka Exp $
|
||||
# $NetBSD: Makefile,v 1.450 2007/12/04 18:47:52 xtraeme Exp $
|
||||
# @(#)Makefile 8.1 (Berkeley) 6/18/93
|
||||
|
||||
MAN= aac.4 ac97.4 acardide.4 aceride.4 acphy.4 adbbt.4 adbkbd.4 adbms.4 \
|
||||
adc.4 adt7467c.4 adv.4 adw.4 agp.4 agr.4 ahb.4 ahc.4 ahcisata.4 ahd.4 \
|
||||
aiboost.4 amdpm.4 amhphy.4 amr.4 aps.4 \
|
||||
an.4 aria.4 artsata.4 ata.4 atalk.4 ataraid.4 \
|
||||
an.4 arc.4 aria.4 artsata.4 ata.4 atalk.4 ataraid.4 \
|
||||
ath.4 atppc.4 attimer.4 atw.4 \
|
||||
auacer.4 audio.4 audiocs.4 auich.4 \
|
||||
auixp.4 autri.4 auvia.4 awi.4 azalia.4 \
|
||||
|
|
|
|||
|
|
@ -0,0 +1,117 @@
|
|||
.\" $NetBSD: arc.4,v 1.1 2007/12/04 18:47:51 xtraeme Exp $
|
||||
.\" $OpenBSD: arc.4,v 1.10 2007/11/04 08:18:17 dlg Exp $
|
||||
.\"
|
||||
.\" Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
|
||||
.\"
|
||||
.\" Permission to use, copy, modify, and distribute this software for any
|
||||
.\" purpose with or without fee is hereby granted, provided that the above
|
||||
.\" copyright notice and this permission notice appear in all copies.
|
||||
.\"
|
||||
.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
.\" TORTIOUS ACTION, ARISING OUT OF
|
||||
.\" PERFORMANCE OF THIS SOFTWARE.
|
||||
.\"
|
||||
.Dd December 4, 2007
|
||||
.Dt ARC 4
|
||||
.Os
|
||||
.Sh NAME
|
||||
.Nm arc
|
||||
.Nd Areca Technology Corporation SATA RAID controller
|
||||
.Sh SYNOPSIS
|
||||
.Cd "arc* at pci? dev ? function ?"
|
||||
.Sh DESCRIPTION
|
||||
The
|
||||
.Nm
|
||||
driver provides support for the PCI-X and PCI Express RAID controllers from
|
||||
Areca Technology Corporation:
|
||||
.Pp
|
||||
.Bl -dash -offset indent -compact
|
||||
.It
|
||||
ARC-1110 PCI-X 4 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1110ML PCI-X 4 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1120 PCI-X 8 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1120ML PCI-X 8 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1130 PCI-X 12 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1130ML PCI-X 12 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1160 PCI-X 16 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1160ML PCI-X 16 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1170 PCI-X 24 Port SATA RAID Controller
|
||||
.\" Not yet
|
||||
.\".It
|
||||
.\"ARC-1200 Rev A PCI Express 2 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1202 PCI Express 2 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1210 PCI Express 4 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1220 PCI Express 8 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1230 PCI Express 12 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1230ML PCI Express 12 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1231ML PCI Express 12 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1260 PCI Express 16 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1260ML PCI Express 16 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1261ML PCI Express 16 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1280 PCI Express 24 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1280ML PCI Express 24 Port SATA RAID Controller
|
||||
.It
|
||||
ARC-1680 PCI Express 8 Port SAS RAID Controller
|
||||
.It
|
||||
ARC-1680LP PCI Express 8 Port SAS RAID Controller
|
||||
.It
|
||||
ARC-1680i PCI Express 8 Port SAS RAID Controller
|
||||
.It
|
||||
ARC-1680x PCI Express 8 Port SAS RAID Controller
|
||||
.It
|
||||
ARC-1681 PCI-X 8 Port SAS RAID Controller
|
||||
.El
|
||||
.Pp
|
||||
These controllers can support RAID levels 0, 1, 1E, 3, 5, 6, and JBOD.
|
||||
.Pp
|
||||
.Nm
|
||||
supports alarm control and monitoring of volumes configured on the
|
||||
controllers via the
|
||||
.Xr bio 4
|
||||
interface and the
|
||||
.Xr bioctl 8
|
||||
utility.
|
||||
.Sh SEE ALSO
|
||||
.Xr bio 4 ,
|
||||
.Xr intro 4 ,
|
||||
.Xr pci 4 ,
|
||||
.Xr scsi 4 ,
|
||||
.Xr bioctl 8
|
||||
.Sh HISTORY
|
||||
The
|
||||
.Nm
|
||||
driver first appeared in
|
||||
.Ox 4.0 .
|
||||
.Sh AUTHORS
|
||||
.An -nosplit
|
||||
The
|
||||
.Nm
|
||||
driver was written by
|
||||
.An David Gwynne Aq dlg@openbsd.org
|
||||
and was ported to
|
||||
.Nx
|
||||
by
|
||||
.An Juan Romero Pardines Aq xtraeme@netbsd.org
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,415 @@
|
|||
/* $NetBSD: arcvar.h,v 1.1 2007/12/04 18:47:50 xtraeme Exp $ */
|
||||
/* Derived from $OpenBSD: arc.c,v 1.68 2007/10/27 03:28:27 dlg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef _PCI_ARCMSRVAR_H_
|
||||
#define _PCI_ARCMSRVAR_H_
|
||||
|
||||
#define ARC_PCI_BAR PCI_MAPREG_START
|
||||
|
||||
#define ARC_REG_INB_MSG0 0x0010
|
||||
#define ARC_REG_INB_MSG0_NOP (0x00000000)
|
||||
#define ARC_REG_INB_MSG0_GET_CONFIG (0x00000001)
|
||||
#define ARC_REG_INB_MSG0_SET_CONFIG (0x00000002)
|
||||
#define ARC_REG_INB_MSG0_ABORT_CMD (0x00000003)
|
||||
#define ARC_REG_INB_MSG0_STOP_BGRB (0x00000004)
|
||||
#define ARC_REG_INB_MSG0_FLUSH_CACHE (0x00000005)
|
||||
#define ARC_REG_INB_MSG0_START_BGRB (0x00000006)
|
||||
#define ARC_REG_INB_MSG0_CHK331PENDING (0x00000007)
|
||||
#define ARC_REG_INB_MSG0_SYNC_TIMER (0x00000008)
|
||||
#define ARC_REG_INB_MSG1 0x0014
|
||||
#define ARC_REG_OUTB_ADDR0 0x0018
|
||||
#define ARC_REG_OUTB_ADDR1 0x001c
|
||||
#define ARC_REG_OUTB_ADDR1_FIRMWARE_OK (1<<31)
|
||||
#define ARC_REG_INB_DOORBELL 0x0020
|
||||
#define ARC_REG_INB_DOORBELL_WRITE_OK (1<<0)
|
||||
#define ARC_REG_INB_DOORBELL_READ_OK (1<<1)
|
||||
#define ARC_REG_OUTB_DOORBELL 0x002c
|
||||
#define ARC_REG_OUTB_DOORBELL_WRITE_OK (1<<0)
|
||||
#define ARC_REG_OUTB_DOORBELL_READ_OK (1<<1)
|
||||
#define ARC_REG_INTRSTAT 0x0030
|
||||
#define ARC_REG_INTRSTAT_MSG0 (1<<0)
|
||||
#define ARC_REG_INTRSTAT_MSG1 (1<<1)
|
||||
#define ARC_REG_INTRSTAT_DOORBELL (1<<2)
|
||||
#define ARC_REG_INTRSTAT_POSTQUEUE (1<<3)
|
||||
#define ARC_REG_INTRSTAT_PCI (1<<4)
|
||||
#define ARC_REG_INTRMASK 0x0034
|
||||
#define ARC_REG_INTRMASK_MSG0 (1<<0)
|
||||
#define ARC_REG_INTRMASK_MSG1 (1<<1)
|
||||
#define ARC_REG_INTRMASK_DOORBELL (1<<2)
|
||||
#define ARC_REG_INTRMASK_POSTQUEUE (1<<3)
|
||||
#define ARC_REG_INTRMASK_PCI (1<<4)
|
||||
#define ARC_REG_POST_QUEUE 0x0040
|
||||
#define ARC_REG_POST_QUEUE_ADDR_SHIFT 5
|
||||
#define ARC_REG_POST_QUEUE_IAMBIOS (1<<30)
|
||||
#define ARC_REG_POST_QUEUE_BIGFRAME (1<<31)
|
||||
#define ARC_REG_REPLY_QUEUE 0x0044
|
||||
#define ARC_REG_REPLY_QUEUE_ADDR_SHIFT 5
|
||||
#define ARC_REG_REPLY_QUEUE_ERR (1<<28)
|
||||
#define ARC_REG_REPLY_QUEUE_IAMBIOS (1<<30)
|
||||
#define ARC_REG_MSGBUF 0x0a00
|
||||
#define ARC_REG_MSGBUF_LEN 1024
|
||||
#define ARC_REG_IOC_WBUF_LEN 0x0e00
|
||||
#define ARC_REG_IOC_WBUF 0x0e04
|
||||
#define ARC_REG_IOC_RBUF_LEN 0x0f00
|
||||
#define ARC_REG_IOC_RBUF 0x0f04
|
||||
#define ARC_REG_IOC_RWBUF_MAXLEN 124 /* for both RBUF and WBUF */
|
||||
|
||||
struct arc_msg_firmware_info {
|
||||
uint32_t signature;
|
||||
#define ARC_FWINFO_SIGNATURE_GET_CONFIG (0x87974060)
|
||||
uint32_t request_len;
|
||||
uint32_t queue_len;
|
||||
uint32_t sdram_size;
|
||||
uint32_t sata_ports;
|
||||
uint8_t vendor[40];
|
||||
uint8_t model[8];
|
||||
uint8_t fw_version[16];
|
||||
uint8_t device_map[16];
|
||||
} __packed;
|
||||
|
||||
struct arc_msg_scsicmd {
|
||||
uint8_t bus;
|
||||
uint8_t target;
|
||||
uint8_t lun;
|
||||
uint8_t function;
|
||||
|
||||
uint8_t cdb_len;
|
||||
uint8_t sgl_len;
|
||||
uint8_t flags;
|
||||
#define ARC_MSG_SCSICMD_FLAG_SGL_BSIZE_512 (1<<0)
|
||||
#define ARC_MSG_SCSICMD_FLAG_FROM_BIOS (1<<1)
|
||||
#define ARC_MSG_SCSICMD_FLAG_WRITE (1<<2)
|
||||
#define ARC_MSG_SCSICMD_FLAG_SIMPLEQ (0x00)
|
||||
#define ARC_MSG_SCSICMD_FLAG_HEADQ (0x08)
|
||||
#define ARC_MSG_SCSICMD_FLAG_ORDERQ (0x10)
|
||||
uint8_t reserved;
|
||||
|
||||
uint32_t context;
|
||||
uint32_t data_len;
|
||||
|
||||
#define ARC_MSG_CDBLEN 16
|
||||
uint8_t cdb[ARC_MSG_CDBLEN];
|
||||
|
||||
uint8_t status;
|
||||
#define ARC_MSG_STATUS_SELTIMEOUT 0xf0
|
||||
#define ARC_MSG_STATUS_ABORTED 0xf1
|
||||
#define ARC_MSG_STATUS_INIT_FAIL 0xf2
|
||||
#define ARC_MSG_SENSELEN 15
|
||||
uint8_t sense_data[ARC_MSG_SENSELEN];
|
||||
|
||||
/* followed by an sgl */
|
||||
} __packed;
|
||||
|
||||
struct arc_sge {
|
||||
uint32_t sg_hdr;
|
||||
#define ARC_SGE_64BIT (1<<24)
|
||||
uint32_t sg_lo_addr;
|
||||
uint32_t sg_hi_addr;
|
||||
} __packed;
|
||||
|
||||
#define ARC_MAX_TARGET 16
|
||||
#define ARC_MAX_LUN 8
|
||||
#define ARC_MAX_IOCMDLEN 512
|
||||
#define ARC_BLOCKSIZE 512
|
||||
|
||||
/*
|
||||
* the firmware deals with up to 256 or 512 byte command frames.
|
||||
*/
|
||||
|
||||
/*
|
||||
* sizeof(struct arc_msg_scsicmd) + (sizeof(struct arc_sge) * 38) == 508.
|
||||
*/
|
||||
#define ARC_SGL_MAXLEN 38
|
||||
/*
|
||||
* sizeof(struct arc_msg_scsicmd) + (sizeof(struct arc_sge) * 17) == 252.
|
||||
*/
|
||||
#define ARC_SGL_256LEN 17
|
||||
|
||||
struct arc_io_cmd {
|
||||
struct arc_msg_scsicmd cmd;
|
||||
struct arc_sge sgl[ARC_SGL_MAXLEN];
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
* definitions of the firmware commands sent via the doorbells.
|
||||
*/
|
||||
struct arc_fw_hdr {
|
||||
uint8_t byte1;
|
||||
uint8_t byte2;
|
||||
uint8_t byte3;
|
||||
} __packed;
|
||||
|
||||
struct arc_fw_bufhdr {
|
||||
struct arc_fw_hdr hdr;
|
||||
uint16_t len;
|
||||
} __packed;
|
||||
|
||||
#define ARC_FW_RAIDINFO 0x20 /* opcode + raid# */
|
||||
#define ARC_FW_VOLINFO 0x21 /* opcode + vol# */
|
||||
#define ARC_FW_DISKINFO 0x22 /* opcode + physdisk# */
|
||||
#define ARC_FW_SYSINFO 0x23 /* opcode. reply is fw_sysinfo */
|
||||
#define ARC_FW_MUTE_ALARM 0x30 /* opcode only */
|
||||
#define ARC_FW_SET_ALARM 0x31 /* opcode + 1 byte for setting */
|
||||
#define ARC_FW_SET_ALARM_DISABLE 0x00
|
||||
#define ARC_FW_SET_ALARM_ENABLE 0x01
|
||||
#define ARC_FW_NOP 0x38 /* opcode only */
|
||||
|
||||
#define ARC_FW_CMD_OK 0x41
|
||||
#define ARC_FW_CMD_PASS_REQD 0x4d
|
||||
|
||||
struct arc_fw_comminfo {
|
||||
uint8_t baud_rate;
|
||||
uint8_t data_bits;
|
||||
uint8_t stop_bits;
|
||||
uint8_t parity;
|
||||
uint8_t flow_control;
|
||||
} __packed;
|
||||
|
||||
struct arc_fw_scsiattr {
|
||||
uint8_t channel; /* channel for SCSI target (0/1) */
|
||||
uint8_t target;
|
||||
uint8_t lun;
|
||||
uint8_t tagged;
|
||||
uint8_t cache;
|
||||
uint8_t speed;
|
||||
} __packed;
|
||||
|
||||
struct arc_fw_raidinfo {
|
||||
uint8_t set_name[16];
|
||||
uint32_t capacity;
|
||||
uint32_t capacity2;
|
||||
uint32_t fail_mask;
|
||||
uint8_t device_array[32];
|
||||
uint8_t member_devices;
|
||||
uint8_t new_member_devices;
|
||||
uint8_t raid_state;
|
||||
uint8_t volumes;
|
||||
uint8_t volume_list[16];
|
||||
uint8_t reserved1[3];
|
||||
uint8_t free_segments;
|
||||
uint32_t raw_stripes[8];
|
||||
uint8_t reserved2[12];
|
||||
} __packed;
|
||||
|
||||
struct arc_fw_volinfo {
|
||||
uint8_t set_name[16];
|
||||
uint32_t capacity;
|
||||
uint32_t capacity2;
|
||||
uint32_t fail_mask;
|
||||
uint32_t stripe_size; /* in blocks */
|
||||
uint32_t new_fail_mask;
|
||||
uint32_t new_stripe_size;
|
||||
uint32_t volume_status;
|
||||
#define ARC_FW_VOL_STATUS_NORMAL 0x00
|
||||
#define ARC_FW_VOL_STATUS_INITTING (1<<0)
|
||||
#define ARC_FW_VOL_STATUS_FAILED (1<<1)
|
||||
#define ARC_FW_VOL_STATUS_MIGRATING (1<<2)
|
||||
#define ARC_FW_VOL_STATUS_REBUILDING (1<<3)
|
||||
#define ARC_FW_VOL_STATUS_NEED_INIT (1<<4)
|
||||
#define ARC_FW_VOL_STATUS_NEED_MIGRATE (1<<5)
|
||||
#define ARC_FW_VOL_STATUS_INIT_FLAG (1<<6)
|
||||
#define ARC_FW_VOL_STATUS_NEED_REGEN (1<<7)
|
||||
#define ARC_FW_VOL_STATUS_CHECKING (1<<8)
|
||||
#define ARC_FW_VOL_STATUS_NEED_CHECK (1<<9)
|
||||
uint32_t progress;
|
||||
struct arc_fw_scsiattr scsi_attr;
|
||||
uint8_t member_disks;
|
||||
uint8_t raid_level;
|
||||
#define ARC_FW_VOL_RAIDLEVEL_0 0x00
|
||||
#define ARC_FW_VOL_RAIDLEVEL_1 0x01
|
||||
#define ARC_FW_VOL_RAIDLEVEL_3 0x02
|
||||
#define ARC_FW_VOL_RAIDLEVEL_5 0x03
|
||||
#define ARC_FW_VOL_RAIDLEVEL_6 0x04
|
||||
#define ARC_FW_VOL_RAIDLEVEL_PASSTHRU 0x05
|
||||
uint8_t new_member_disks;
|
||||
uint8_t new_raid_level;
|
||||
uint8_t raid_set_number;
|
||||
uint8_t reserved[5];
|
||||
} __packed;
|
||||
|
||||
struct arc_fw_diskinfo {
|
||||
uint8_t model[40];
|
||||
uint8_t serial[20];
|
||||
uint8_t firmware_rev[8];
|
||||
uint32_t capacity;
|
||||
uint32_t capacity2;
|
||||
uint8_t device_state;
|
||||
uint8_t pio_mode;
|
||||
uint8_t current_udma_mode;
|
||||
uint8_t udma_mode;
|
||||
uint8_t drive_select;
|
||||
uint8_t raid_number; /* 0xff unowned */
|
||||
struct arc_fw_scsiattr scsi_attr;
|
||||
uint8_t reserved[40];
|
||||
} __packed;
|
||||
|
||||
struct arc_fw_sysinfo {
|
||||
uint8_t vendor_name[40];
|
||||
uint8_t serial_number[16];
|
||||
uint8_t firmware_version[16];
|
||||
uint8_t boot_version[16];
|
||||
uint8_t mb_version[16];
|
||||
uint8_t model_name[8];
|
||||
|
||||
uint8_t local_ip[4];
|
||||
uint8_t current_ip[4];
|
||||
|
||||
uint32_t time_tick;
|
||||
uint32_t cpu_speed;
|
||||
uint32_t icache;
|
||||
uint32_t dcache;
|
||||
uint32_t scache;
|
||||
uint32_t memory_size;
|
||||
uint32_t memory_speed;
|
||||
uint32_t events;
|
||||
|
||||
uint8_t gsiMacAddress[6];
|
||||
uint8_t gsiDhcp;
|
||||
|
||||
uint8_t alarm;
|
||||
uint8_t channel_usage;
|
||||
uint8_t max_ata_mode;
|
||||
uint8_t sdram_ecc;
|
||||
uint8_t rebuild_priority;
|
||||
struct arc_fw_comminfo comm_a;
|
||||
struct arc_fw_comminfo comm_b;
|
||||
uint8_t ide_channels;
|
||||
uint8_t scsi_host_channels;
|
||||
uint8_t ide_host_channels;
|
||||
uint8_t max_volume_set;
|
||||
uint8_t max_raid_set;
|
||||
uint8_t ether_port;
|
||||
uint8_t raid6_engine;
|
||||
uint8_t reserved[75];
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
* autconf(9) glue.
|
||||
*/
|
||||
struct arc_ccb;
|
||||
TAILQ_HEAD(arc_ccb_list, arc_ccb);
|
||||
|
||||
struct arc_softc {
|
||||
struct device sc_dev;
|
||||
struct scsipi_channel sc_chan;
|
||||
struct scsipi_adapter sc_adapter;
|
||||
|
||||
pci_chipset_tag_t sc_pc;
|
||||
pcitag_t sc_tag;
|
||||
|
||||
bus_space_tag_t sc_iot;
|
||||
bus_space_handle_t sc_ioh;
|
||||
bus_size_t sc_ios;
|
||||
bus_dma_tag_t sc_dmat;
|
||||
|
||||
void *sc_ih;
|
||||
|
||||
void *sc_shutdownhook;
|
||||
|
||||
int sc_req_count;
|
||||
|
||||
struct arc_dmamem *sc_requests;
|
||||
struct arc_ccb *sc_ccbs;
|
||||
struct arc_ccb_list sc_ccb_free;
|
||||
|
||||
struct lwp *sc_lwp;
|
||||
volatile int sc_talking;
|
||||
|
||||
struct sysmon_envsys *sc_sme;
|
||||
envsys_data_t *sc_sensors;
|
||||
int sc_nsensors;
|
||||
struct callout sc_callout;
|
||||
};
|
||||
|
||||
/*
|
||||
* interface for scsi midlayer to talk to.
|
||||
*/
|
||||
void arc_scsi_cmd(struct scsipi_channel *, scsipi_adapter_req_t, void *);
|
||||
|
||||
/*
|
||||
* code to deal with getting bits in and out of the bus space.
|
||||
*/
|
||||
uint32_t arc_read(struct arc_softc *, bus_size_t);
|
||||
void arc_read_region(struct arc_softc *, bus_size_t, void *, size_t);
|
||||
void arc_write(struct arc_softc *, bus_size_t, uint32_t);
|
||||
void arc_write_region(struct arc_softc *, bus_size_t, void *, size_t);
|
||||
int arc_wait_eq(struct arc_softc *, bus_size_t, uint32_t, uint32_t);
|
||||
int arc_wait_ne(struct arc_softc *, bus_size_t, uint32_t, uint32_t);
|
||||
int arc_msg0(struct arc_softc *, uint32_t);
|
||||
|
||||
#define arc_push(_s, _r) arc_write((_s), ARC_REG_POST_QUEUE, (_r))
|
||||
#define arc_pop(_s) arc_read((_s), ARC_REG_REPLY_QUEUE)
|
||||
|
||||
/*
|
||||
* wrap up the bus_dma api.
|
||||
*/
|
||||
struct arc_dmamem {
|
||||
bus_dmamap_t adm_map;
|
||||
bus_dma_segment_t adm_seg;
|
||||
size_t adm_size;
|
||||
void *adm_kva;
|
||||
};
|
||||
#define ARC_DMA_MAP(_adm) ((_adm)->adm_map)
|
||||
#define ARC_DMA_DVA(_adm) ((_adm)->adm_map->dm_segs[0].ds_addr)
|
||||
#define ARC_DMA_KVA(_adm) ((void *)(_adm)->adm_kva)
|
||||
|
||||
struct arc_dmamem *arc_dmamem_alloc(struct arc_softc *, size_t);
|
||||
void arc_dmamem_free(struct arc_softc *, struct arc_dmamem *);
|
||||
|
||||
/*
|
||||
* stuff to manage a scsi command.
|
||||
*/
|
||||
struct arc_ccb {
|
||||
struct arc_softc *ccb_sc;
|
||||
int ccb_id;
|
||||
|
||||
struct scsipi_xfer *ccb_xs;
|
||||
|
||||
bus_dmamap_t ccb_dmamap;
|
||||
bus_addr_t ccb_offset;
|
||||
struct arc_io_cmd *ccb_cmd;
|
||||
uint32_t ccb_cmd_post;
|
||||
|
||||
TAILQ_ENTRY(arc_ccb) ccb_link;
|
||||
};
|
||||
|
||||
int arc_alloc_ccbs(struct arc_softc *);
|
||||
struct arc_ccb *arc_get_ccb(struct arc_softc *);
|
||||
void arc_put_ccb(struct arc_softc *, struct arc_ccb *);
|
||||
int arc_load_xs(struct arc_ccb *);
|
||||
int arc_complete(struct arc_softc *, struct arc_ccb *, int);
|
||||
void arc_scsi_cmd_done(struct arc_softc *, struct arc_ccb *, uint32_t);
|
||||
|
||||
/*
|
||||
* real stuff for dealing with the hardware.
|
||||
*/
|
||||
int arc_map_pci_resources(struct arc_softc *, struct pci_attach_args *);
|
||||
void arc_unmap_pci_resources(struct arc_softc *);
|
||||
int arc_query_firmware(struct arc_softc *);
|
||||
|
||||
/*
|
||||
* stuff to do messaging via the doorbells.
|
||||
*/
|
||||
void arc_lock(struct arc_softc *);
|
||||
void arc_unlock(struct arc_softc *);
|
||||
void arc_wait(struct arc_softc *);
|
||||
uint8_t arc_msg_cksum(void *, uint16_t);
|
||||
int arc_msgbuf(struct arc_softc *, void *, size_t, void *, size_t);
|
||||
|
||||
#endif /* ! _PCI_ARCMSRVAR_H_ */
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: files.pci,v 1.296 2007/11/07 19:09:09 macallan Exp $
|
||||
# $NetBSD: files.pci,v 1.297 2007/12/04 18:47:51 xtraeme Exp $
|
||||
#
|
||||
# Config file and device description for machine-independent PCI code.
|
||||
# Included by ports that need it. Requires that the SCSI files be
|
||||
|
|
@ -72,6 +72,11 @@ file dev/pci/amr.c amr
|
|||
attach ld at amr with ld_amr
|
||||
file dev/pci/ld_amr.c ld_amr
|
||||
|
||||
# Areca SATA RAID Controllers
|
||||
device arc: scsi
|
||||
attach arc at pci
|
||||
file dev/pci/arc.c arc
|
||||
|
||||
# Compaq RAID controllers
|
||||
attach cac at pci with cac_pci
|
||||
file dev/pci/cac_pci.c cac_pci
|
||||
|
|
|
|||
Loading…
Reference in New Issue