pmax/kn230.h: fix typos and spacing in comments
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/* $NetBSD: kn230.h,v 1.4 2024/05/23 08:52:06 andvar Exp $ */
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/* $NetBSD: kn230.h,v 1.5 2024/05/24 19:00:27 rillig Exp $ */
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/*
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* Copyright (c) 1997,1998 Jonathan Stone.
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@ -35,17 +35,17 @@
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/*
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* Physical addresses of baseboard devices and registers on the
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* the DECstation 5100 motherboard (also known as the kn230).
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* DECstation 5100 motherboard (also known as the kn230).
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*
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* The only options on the kn230 are two slots for daughterboards.
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* Each slot can contain an extra four-port dc708x DZ11 clone chip.
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* Most baseborad chips are the same hardware and at the same
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* address as the DECstation 3100 (kn01), except:
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* Most baseboard chips are the same hardware and at the same
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* address as the DECstation 3100 (kn01), except:
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*
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* The kn230 has more devices than the 3100, so instead
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* of hardwiring each device to a CPU interrupt line,
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* the kn230 provides an interrupt-request register (ICSR).
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* Devices are mapped onto CPU interrupt lines as below:
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* the kn230 provides an interrupt-request register (ICSR).
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* Devices are mapped onto CPU interrupt lines as below:
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* hardint 5: fpu
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* hardint 4: reset switch
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* hardint 3: memory error (write to nonexistent memory)
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@ -75,7 +75,7 @@
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/*
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* Interrupt-request bitmasks in the low-order 16 bits of the CSR.
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* If a bit is set, the corresponding device has an interrupt condition.
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* If a bit is set, the corresponding device has an interrupt condition.
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* There is no equivalent per-device interrupt masking register.
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* (note: these were LED control bits in the kn01).
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*/
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@ -88,7 +88,7 @@
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#define KN230_CSR_INTR_DZ0 0x00000100 /* baseboard DZ */
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/*
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* kn230 LED control register.
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* kn230 LED control register.
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* Writing a 1 bit to any bit turns off the corresponding LED.
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* low bits are or'ed to control registers which have side effects.
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*
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@ -156,7 +156,7 @@
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/*
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* NVRAM state definitions.
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* Used under Ultrix for PrestoServe.
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* Used under Ultrix for PrestoServe.
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*/
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#define KN230_SYS_NVRAM_DIAG 0x1f000300 /* NVRAM diagnostic register */
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#define KN230_NVRAM_PRESENT 0x00000001
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@ -169,7 +169,7 @@
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/*
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* NVRAM has separate control and status registers for each of
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* the two motherboard SIMM banks (even and odd),
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* located at offsets from the value at value at SYS_NVRAM_ADDR.
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* located at offsets from the value at SYS_NVRAM_ADDR.
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*/
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# define KN230_SYS_NVRAM_EVENBNK_STATUS_OFFSET (0x200000)
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# define KN230_SYS_NVRAM_ODDBNK_STATUS_OFFSET (0x200000 +4)
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@ -180,8 +180,8 @@
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#define KN230_NVRAM_BATFAIL 0x00000001 /* battery failure */
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#define KN230_NVRAM_BATKILL 0x00000002 /* battery kill */
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/*
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* To enable the battery, write 0x00 to each nvram control reg.
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* To enable the battery, write 0x00 to each nvram control reg.
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* To disable the battery, write the sequence
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* 0x01, 0x01, 0x00, 0x00, 0x01
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* 0x01, 0x01, 0x00, 0x00, 0x01
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* to both per-bank control registers (do banks in parallel, not in sequence).
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*/
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