- Hide memory mapped VDAC hardware register layouts using the array
element access instead of C bitfield (hello, BCPL). - XXX Some TURBOchannel framebuffers might need shutdownhooks(). It seems not necessarily hardware sprite cursor images are re-initialized by DECstation PROMs upon exits from kernel. - XXX It'd be an arguable point to allow user programs to change the shade of gray freely for pixel value 0 and 1.
This commit is contained in:
nisimura
parent
129b091aa8
commit
8dd0e06ba1
158
sys/dev/tc/mfb.c
158
sys/dev/tc/mfb.c
@ -1,4 +1,4 @@
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/* $NetBSD: mfb.c,v 1.13 1999/06/23 23:48:28 nisimura Exp $ */
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/* $NetBSD: mfb.c,v 1.14 1999/06/24 03:51:14 nisimura Exp $ */
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/*
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* Copyright (c) 1999 Tohru Nishimura. All rights reserved.
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@ -32,7 +32,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mfb.c,v 1.13 1999/06/23 23:48:28 nisimura Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mfb.c,v 1.14 1999/06/24 03:51:14 nisimura Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -59,52 +59,34 @@ __KERNEL_RCSID(0, "$NetBSD: mfb.c,v 1.13 1999/06/23 23:48:28 nisimura Exp $");
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#define machine_btop(x) mips_btop(x)
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#define MACHINE_KSEG0_TO_PHYS(x) MIPS_KSEG0_TO_PHYS(x)
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struct bt455reg {
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u_int8_t bt_reg;
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unsigned : 24;
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u_int8_t bt_cmap;
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unsigned : 24;
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u_int8_t bt_clr;
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unsigned : 24;
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u_int8_t bt_ovly;
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};
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/*
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* N.B. a pair of Bt431s are located adjascently.
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* struct bt431twin {
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* struct {
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* u_int8_t u0; for sprite image
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* u_int8_t u1; for sprite mask
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* unsigned :16;
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* } bt_lo;
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* ...
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*/
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struct bt431reg {
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u_int16_t bt_lo;
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unsigned : 16;
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u_int16_t bt_hi;
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unsigned : 16;
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u_int16_t bt_ram;
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unsigned : 16;
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u_int16_t bt_ctl;
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};
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#define BYTE(base, index) *((u_int8_t *)(base) + ((index)<<2))
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#define HALF(base, index) *((u_int16_t *)(base) + ((index)<<1))
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/* Bt431 hardware registers */
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#define bt_reg 0
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#define bt_cmap 1
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#define bt_clr 2
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#define bt_ovly 3
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/* Bt455 hardware registers */
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#define bt_lo 0
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#define bt_hi 1
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#define bt_ram 2
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#define bt_ctl 3
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#define BT455_SELECT(vdac, regno) do { \
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(vdac)->bt_reg = regno; \
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(vdac)->bt_clr = 0; \
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BYTE(vdac, bt_reg) = (regno); \
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BYTE(vdac, bt_clr) = 0; \
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tc_wmb(); \
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} while (0)
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#define TWIN(x) ((x)|(x) << 8)
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#define TWIN(x) ((x)|((x) << 8))
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#define TWIN_LO(x) (twin = (x) & 0x00ff, twin << 8 | twin)
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#define TWIN_HI(x) (twin = (x) & 0xff00, twin | twin >> 8)
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#define BT431_SELECT(curs, regno) do { \
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(curs)->bt_lo = TWIN(regno); \
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(curs)->bt_hi = 0; \
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HALF(curs, bt_lo) = TWIN(regno);\
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HALF(curs, bt_hi) = 0; \
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tc_wmb(); \
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} while (0);
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@ -504,8 +486,8 @@ mfbintr(arg)
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{
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struct mfb_softc *sc = arg;
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caddr_t mfbbase = (caddr_t)sc->sc_dc->dc_vaddr;
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struct bt455reg *vdac;
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struct bt431reg *curs;
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void *vdac;
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void *curs;
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int v;
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volatile register int junk;
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@ -522,23 +504,23 @@ mfbintr(arg)
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sc->sc_changed = 0;
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if (v & DATA_ENB_CHANGED) {
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BT431_SELECT(curs, BT431_REG_COMMAND);
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curs->bt_ctl = (sc->sc_curenb) ? 0x4444 : 0x0404;
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HALF(curs, bt_ctl) = (sc->sc_curenb) ? 0x4444 : 0x0404;
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}
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if (v & DATA_CURCMAP_CHANGED) {
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u_int8_t *cp = sc->sc_cursor.cc_color;
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BT455_SELECT(vdac, 8);
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vdac->bt_cmap = 0; tc_wmb();
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vdac->bt_cmap = cp[1]; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = cp[1]; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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vdac->bt_cmap = cp[1]; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = cp[1]; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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vdac->bt_ovly = 0; tc_wmb();
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vdac->bt_ovly = cp[0]; tc_wmb();
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vdac->bt_ovly = 0; tc_wmb();
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BYTE(vdac, bt_ovly) = 0; tc_wmb();
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BYTE(vdac, bt_ovly) = cp[0]; tc_wmb();
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BYTE(vdac, bt_ovly) = 0; tc_wmb();
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}
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if (v & DATA_CURSHAPE_CHANGED) {
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u_int8_t *ip, *mp, img, msk;
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@ -553,21 +535,22 @@ mfbintr(arg)
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while (bcnt < sc->sc_cursor.cc_size.y * 16) {
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/* pad right half 32 pixel when smaller than 33 */
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if ((bcnt & 0x8) && sc->sc_cursor.cc_size.x < 33) {
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curs->bt_ram = 0;
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HALF(curs, bt_ram) = 0;
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tc_wmb();
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}
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else {
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img = *ip++;
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msk = *mp++;
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img &= msk; /* cookie off image */
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curs->bt_ram = (flip[msk] << 8) | flip[img];
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HALF(curs, bt_ram)
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= (flip[msk] << 8) | flip[img];
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tc_wmb();
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}
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bcnt += 2;
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}
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/* pad unoccupied scan lines */
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while (bcnt < CURSOR_MAX_SIZE * 16) {
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curs->bt_ram = 0;
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HALF(curs, bt_ram) = 0;
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tc_wmb();
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bcnt += 2;
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}
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@ -580,43 +563,46 @@ mfbinit(dc)
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struct fb_devconfig *dc;
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{
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caddr_t mfbbase = (caddr_t)dc->dc_vaddr;
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struct bt431reg *curs = (void *)(mfbbase + MX_BT431_OFFSET);
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struct bt455reg *vdac = (void *)(mfbbase + MX_BT455_OFFSET);
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void *curs = (void *)(mfbbase + MX_BT431_OFFSET);
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void *vdac = (void *)(mfbbase + MX_BT455_OFFSET);
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int i;
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BT431_SELECT(curs, BT431_REG_COMMAND);
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curs->bt_ctl = 0x0404; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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curs->bt_ctl = 0; tc_wmb();
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HALF(curs, bt_ctl) = 0x0404; tc_wmb();
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HALF(curs, bt_ctl) = 0; /* XLO */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* XHI */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* YLO */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* YHI */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* XWLO */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* XWHI */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* WYLO */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* WYLO */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* WWLO */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* WWHI */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* WHLO */ tc_wmb();
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HALF(curs, bt_ctl) = 0; /* WHHI */ tc_wmb();
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/* 0: black, 1: white, 8,9: cursor mask, ovly: cursor image */
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BT455_SELECT(vdac, 0);
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vdac->bt_cmap = 0; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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vdac->bt_cmap = 0xff; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0xff; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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for (i = 2; i < 16; i++) {
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vdac->bt_cmap = 0; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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vdac->bt_cmap = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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BYTE(vdac, bt_cmap) = 0; tc_wmb();
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}
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BYTE(vdac, bt_ovly) = 0; tc_wmb();
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BYTE(vdac, bt_ovly) = 0xff; tc_wmb();
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BYTE(vdac, bt_ovly) = 0; tc_wmb();
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vdac->bt_ovly = 0; tc_wmb();
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vdac->bt_ovly = 0xff; tc_wmb();
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vdac->bt_ovly = 0; tc_wmb();
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BT431_SELECT(curs, BT431_REG_CRAM_BASE);
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for (i = 0; i < 512; i++) {
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HALF(curs, bt_ram) = 0; tc_wmb();
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}
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}
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static int
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@ -706,7 +692,7 @@ bt431_set_curpos(sc)
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struct mfb_softc *sc;
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{
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caddr_t mfbbase = (caddr_t)sc->sc_dc->dc_vaddr;
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struct bt431reg *curs = (void *)(mfbbase + MX_BT431_OFFSET);
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void *curs = (void *)(mfbbase + MX_BT431_OFFSET);
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u_int16_t twin;
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int x, y, s;
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@ -719,10 +705,10 @@ bt431_set_curpos(sc)
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s = spltty();
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BT431_SELECT(curs, BT431_REG_CURSOR_X_LOW);
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curs->bt_ctl = TWIN_LO(x); tc_wmb();
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curs->bt_ctl = TWIN_HI(x); tc_wmb();
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curs->bt_ctl = TWIN_LO(y); tc_wmb();
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curs->bt_ctl = TWIN_HI(y); tc_wmb();
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HALF(curs, bt_ctl) = TWIN_LO(x); tc_wmb();
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HALF(curs, bt_ctl) = TWIN_HI(x); tc_wmb();
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HALF(curs, bt_ctl) = TWIN_LO(y); tc_wmb();
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HALF(curs, bt_ctl) = TWIN_HI(y); tc_wmb();
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splx(s);
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}
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