Aren
/
NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Add a driver for the Mylex DAC960 family (including DEC SWXCR).

This commit is contained in:
ad 2001-02-04 17:05:11 +00:00
parent d869a18389
commit 8d75ab98d3
28 changed files with 4280 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
distrib/sets/lists/comp/mi
View File

@ -1,4 +1,4 @@
# $NetBSD: mi,v 1.307 2001/02/03 02:44:15 jwise Exp $
# $NetBSD: mi,v 1.308 2001/02/04 17:05:13 ad Exp $
./sys comp-sysutil-root
./usr/bin/addr2line comp-debug-bin
./usr/bin/ar comp-util-bin
@ -210,6 +210,8 @@
./usr/include/dev/ic/mc6845reg.h comp-c-include
./usr/include/dev/ic/midwayreg.h comp-c-include
./usr/include/dev/ic/midwayvar.h comp-c-include
./usr/include/dev/ic/mlxio.h comp-c-include
./usr/include/dev/ic/mlxvar.h comp-c-include
./usr/include/dev/ic/ncr5380reg.h comp-c-include
./usr/include/dev/ic/ncr5380var.h comp-c-include
./usr/include/dev/ic/ncr53c400reg.h comp-c-include

4
distrib/sets/lists/man/mi
View File

@ -1,4 +1,4 @@
# $NetBSD: mi,v 1.318 2001/02/02 22:01:19 is Exp $
# $NetBSD: mi,v 1.319 2001/02/04 17:05:14 ad Exp $
./usr/share/info/am-utils.info man-amd-info
./usr/share/info/as.info man-computil-info
./usr/share/info/awk.info man-util-info
@ -672,6 +672,7 @@
./usr/share/man/cat4/mii.0 man-sys-catman
./usr/share/man/cat4/mixer.0 man-sys-catman
./usr/share/man/cat4/mk48txx.0 man-sys-catman
./usr/share/man/cat4/mlx.0 man-sys-catman
./usr/share/man/cat4/mpu.0 man-sys-catman
./usr/share/man/cat4/mtio.0 man-sys-catman
./usr/share/man/cat4/music.0 man-sys-catman
@ -2143,6 +2144,7 @@
./usr/share/man/man4/mii.4 man-sys-man
./usr/share/man/man4/mixer.4 man-sys-man
./usr/share/man/man4/mk48txx.4 man-sys-man
./usr/share/man/man4/mlx.4 man-sys-man
./usr/share/man/man4/mpu.4 man-sys-man
./usr/share/man/man4/mtio.4 man-sys-man
./usr/share/man/man4/music.4 man-sys-man

10
etc/etc.alpha/MAKEDEV
View File

@ -1,5 +1,5 @@
#!/bin/sh -
# $NetBSD: MAKEDEV,v 1.67 2001/01/08 06:21:19 martin Exp $
# $NetBSD: MAKEDEV,v 1.68 2001/02/04 17:05:14 ad Exp $
#
# Copyright (c) 1990 The Regents of the University of California.
# All rights reserved.
@ -114,6 +114,7 @@
# ss* SCSI scanner
# tun* network tunnel driver
# uk* SCSI unknown
# mlx* Mylex DAC960 control interface
dialin=0
dialout=524288
@ -502,6 +503,13 @@ lkm)
chmod 640 lkm
;;
mlx*)
unit=${i#mlx};
rm -f mlx$unit
mknod mlx$unit c 65 $unit
chmod 600 mlx$unit
;;
wskbd*)
unit=${i#wskbd}
wskbd=wskbd$unit

12
etc/etc.i386/MAKEDEV
View File

@ -1,6 +1,6 @@
#!/bin/sh -
#
# $NetBSD: MAKEDEV,v 1.134 2001/01/08 06:21:19 martin Exp $
# $NetBSD: MAKEDEV,v 1.135 2001/02/04 17:05:14 ad Exp $
#
# Copyright (c) 1990 The Regents of the University of California.
# All rights reserved.
@ -121,6 +121,7 @@
# sysmon System Monitoring hardware
# bktr Brooktree 848/849/878/879 based TV cards
# iop* I2O IOP control interface
# mlx* Mylex DAC960 control interface
#
dialin=0
@ -155,7 +156,7 @@ all)
sh $0 bpf0 bpf1 bpf2 bpf3 bpf4 bpf5 bpf6 bpf7
sh $0 lpt0 lpt1 lpt2 ttyv0 tun0 tun1 tun2 tun3 ipl
sh $0 ccd0 ccd1 ccd2 ccd3 md0 ss0 ch0 uk0 uk1 random
sh $0 speaker lkm mms0 lms0 pms0 joy0 joy1 apm local satlink0 iop0
sh $0 speaker lkm mms0 lms0 pms0 joy0 joy1 apm local satlink0 iop0 mlx0
sh $0 audio
sh $0 usbs
sh $0 isdn
@ -776,6 +777,13 @@ iop*)
chmod 600 iop$unit
;;
mlx*)
unit=${i#mlx};
rm -f mlx$unit
mknod mlx$unit c 78 $unit
chmod 600 mlx$unit
;;
i4b)
rm -f i4b
mknod i4b c 50 0

6
share/man/man4/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.182 2001/01/31 04:32:18 augustss Exp $
# $NetBSD: Makefile,v 1.183 2001/02/04 17:05:15 ad Exp $
# @(#)Makefile 8.1 (Berkeley) 6/18/93
MAN= adv.4 adw.4 ahb.4 ahc.4 an.4 aria.4 atalk.4 audio.4 auich.4 auvia.4 \
@ -9,8 +9,8 @@ MAN= adv.4 adw.4 ahb.4 ahc.4 an.4 aria.4 atalk.4 audio.4 auich.4 auvia.4 \
icsphy.4 idp.4 ifmedia.4 inet.4 inphy.4 intersil7170.4 ioat.4 \
iop.4 iophy.4 iopsp.4 ip.4 ipip.4 ipkdb.4 iso.4 isp.4 \
lc.4 ld.4 lkm.4 lo.4 lxtphy.4 \
mainbus.4 mbe.4 mca.4 md.4 mhzc.4 midi.4 mii.4 mk48txx.4 mpu.4 \
mtio.4 ncr.4 ne.4 neo.4 netintro.4 ns.4 nsip.4 \
mainbus.4 mbe.4 mca.4 md.4 mhzc.4 midi.4 mii.4 mk48txx.4 mlx.4 \
mpu.4 mtio.4 ncr.4 ne.4 neo.4 netintro.4 ns.4 nsip.4 \
nsphy.4 ntwoc.4 null.4 opl.4 options.4 pas.4 pcdisplay.4 \
pciide.4 pckbc.4 pckbd.4 pcppi.4 pcscp.4 pcweasel.4 pms.4 ppp.4 \
pty.4 puc.4 qsphy.4 raid.4 ray.4 rnd.4 route.4 \

8
share/man/man4/ld.4
View File

@ -1,4 +1,4 @@
.\" $NetBSD: ld.4,v 1.1 2000/11/26 17:44:12 ad Exp $
.\" $NetBSD: ld.4,v 1.2 2001/02/04 17:05:15 ad Exp $
.\"
.\" Copyright (c) 2000 The NetBSD Foundation, Inc.
.\" All rights reserved.
@ -43,6 +43,7 @@
.Sh SYNOPSIS
.Cd ld* at cac? unit ?
.Cd ld* at iop? tid ?
.Cd ld* at mlx? unit ?
.Cd ld* at twe? unit ?
.Sh DESCRIPTION
The
@ -67,6 +68,7 @@ partition
.Xr intro 4 ,
.Xr cac 4 ,
.Xr iop 4 ,
.Xr mlx 4 ,
.Xr twe 4
.Sh AUTHOR
The
@ -79,8 +81,8 @@ The
driver first appeared in
.Nx 1.6 .
.Sh BUGS
This driver is in reality a nasty hack intended to reduce code size
and maintenace overheads.
This driver is in reality a kludge intended to reduce code size and
maintenace overheads.
.Pp
The capacity and geometry of units as accessed through the
.Nm

100
share/man/man4/mlx.4 Normal file
View File

@ -0,0 +1,100 @@
.\" $NetBSD: mlx.4,v 1.1 2001/02/04 17:05:15 ad Exp $
.\"
.\" Copyright (c) 2001 The NetBSD Foundation, Inc.
.\" All rights reserved.
.\"
.\" This code is derived from software contributed to The NetBSD Foundation
.\" by Andrew Doran.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\" 3. All advertising materials mentioning features or use of this software
.\" must display the following acknowledgement:
.\" This product includes software developed by the NetBSD
.\" Foundation, Inc. and its contributors.
.\" 4. Neither the name of The NetBSD Foundation nor the names of its
.\" contributors may be used to endorse or promote products derived
.\" from this software without specific prior written permission.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
.\" POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd January 10, 2000
.Dt MLX 4
.Os
.Sh NAME
.Nm mlx
.Nd
.Tn Mylex DAC960 RAID controller driver
.Sh SYNOPSIS
.Cd "mlx* at pci? dev ? function ?"
.Sh DESCRIPTION
The
.Nm
driver provides support for the
.Tn Mylex DAC960
family of RAID controllers, including OEM versions from
.Tn Compaq
and
.Tn DEC .
Attached disk arrays are supported by the
.Nm ld
driver.
.Pp
The
.Nm
driver will warn if a controller firmware upgrade may be necessary, although
as a matter of course, the latest available firmware should always be used.
.Sh HARDWARE
Supported controllers include:
.Pp
.Bl -tag -width -offset indent -compact
.It Tn DEC/Compaq SWXCR
.It Tn Mylex DAC960P
.It Tn Mylex DAC960PD
.It Tn Mylex DAC960PG
.It Tn Mylex DAC960PJ
.It Tn Mylex DAC960PL
.It Tn Mylex DAC960PR
.It Tn Mylex DAC960PRL
.It Tn Mylex DAC960PT
.It Tn Mylex DAC960PTL0
.It Tn Mylex DAC960PTL1
.It Tn Mylex AcceleRAID 150
.It Tn Mylex AcceleRAID 250
.It Tn Mylex eXtremeRAID 1100
.El
.Sh SEE ALSO
.Xr intro 4 ,
.Xr ld 4 ,
.Xr mlxctl 8
.Sh AUTHOR
The
.Nm
driver was written by
by Andrew Doran
.Aq ad@netbsd.org .
It is derived from the
.Fx
driver of the same name, written by Micheal Smith
.Aq msmith@freebsd.org .
.Sh HISTORY
The
.Nm mlx
driver first appeared in
.Nx 1.6 .

5
share/man/man4/pci.4
View File

@ -1,4 +1,4 @@
.\" $NetBSD: pci.4,v 1.42 2001/01/22 01:28:54 augustss Exp $
.\" $NetBSD: pci.4,v 1.43 2001/02/04 17:05:14 ad Exp $
.\"
.\" Copyright (c) 1997 Jason R. Thorpe. All rights reserved.
.\" Copyright (c) 1997 Jonathan Stone
@ -119,6 +119,8 @@ interfaces.
.Bl -tag -width pcdisplay -offset indent
.It cac
Compaq array controllers.
.It mlx
Mylex DAC960 and DEC SWXCR RAID controllers.
.It pciide
IDE disk controllers.
.It twe
@ -305,6 +307,7 @@ VGA graphics boards.
.Xr isp 4 ,
.Xr le 4 ,
.Xr lmc 4 ,
.Xr mlx 4 ,
.Xr ncr 4 ,
.Xr ne 4 ,
.Xr neo 4 ,

5
share/man/man8/man8.alpha/MAKEDEV.8
View File

@ -6,7 +6,7 @@
.\" *** DO NOT EDIT - any changes will be lost!!!
.\" *** ------------------------------------------------------------------
.\"
.\" $NetBSD: MAKEDEV.8,v 1.8 2001/01/08 06:22:42 martin Exp $
.\" $NetBSD: MAKEDEV.8,v 1.9 2001/02/04 17:05:15 ad Exp $
.\"
.\" Copyright (c) 1999 Christopher G. Demetriou
.\" All rights reserved.
@ -280,6 +280,9 @@ Network tunnel driver, see
. It Ar uk#
SCSI unknown, see
.Xr uk 4
. It Ar mlx#
Mylex DAC960 control interface, see
.Xr mlx 4
. El
.El
.Sh FILES

5
share/man/man8/man8.i386/MAKEDEV.8
View File

@ -6,7 +6,7 @@
.\" *** DO NOT EDIT - any changes will be lost!!!
.\" *** ------------------------------------------------------------------
.\"
.\" $NetBSD: MAKEDEV.8,v 1.17 2001/01/08 06:22:43 martin Exp $
.\" $NetBSD: MAKEDEV.8,v 1.18 2001/02/04 17:05:15 ad Exp $
.\"
.\" Copyright (c) 1991, 1993
.\" The Regents of the University of California. All rights reserved.
@ -285,6 +285,9 @@ Brooktree 848/849/878/879 based TV cards, see
. It Ar iop#
I2O IOP control interface, see
.Xr iop 4
. It Ar mlx#
Mylex DAC960 control interface, see
.Xr mlx 4
. El
.El
.Pp

8
sys/arch/alpha/alpha/conf.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: conf.c,v 1.55 2001/01/14 11:17:28 martin Exp $ */
/* $NetBSD: conf.c,v 1.56 2001/02/04 17:05:13 ad Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@ -37,7 +37,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: conf.c,v 1.55 2001/01/14 11:17:28 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: conf.c,v 1.56 2001/02/04 17:05:13 ad Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -161,6 +161,8 @@ cdev_decl(satlink);
cdev_decl(midi);
#include "sequencer.h"
cdev_decl(music);
#include "mlx.h"
cdev_decl(mlx);
#include "a12dc.h"
#include "scc.h"
@ -332,6 +334,7 @@ struct cdevsw cdevsw[] =
cdev_usbdev_init(NURIO,urio), /* 62: Diamond Rio 500 */
cdev_ugen_init(NUSCANNER,uscanner),/* 63: USB scanner */
cdev_altq_init(NALTQ,altq), /* 64: ALTQ control interface */
cdev__oci_init(NMLX,mlx), /* 65: Mylex DAC960 control interface */
};
int nchrdev = sizeof (cdevsw) / sizeof (cdevsw[0]);
@ -438,6 +441,7 @@ static int chrtoblktbl[] = {
/* 62 */ NODEV,
/* 63 */ NODEV,
/* 64 */ NODEV,
/* 65 */ NODEV,
};
/*

6
sys/arch/alpha/conf/ALPHA
View File

@ -1,10 +1,10 @@
# $NetBSD: ALPHA,v 1.144 2001/01/27 03:02:52 lukem Exp $
# $NetBSD: ALPHA,v 1.145 2001/02/04 17:05:16 ad Exp $
#
# Alpha kernel with all the options you'd want, and more.
include "arch/alpha/conf/std.alpha"
ident "ALPHA-$Revision: 1.144 $"
ident "ALPHA-$Revision: 1.145 $"
maxusers 32
@ -252,6 +252,7 @@ isp* at pci? dev ? function ? # Qlogic ISP 10x0 SCSI
le* at pci? dev ? function ? # PCI LANCE Ethernet (untested)
#ncr* at pci? dev ? function ? # NCR 53c8xx SCSI
siop* at pci? dev ? function ? # Symbios 53c8xx SCSI
mlx* at pci? dev ? function ? # Mylex DAC960 / DEC SWXCR (untested)
ne* at pci? dev ? function ? # NE2000-compatible Ethernet
ohci* at pci? dev ? function ? # USB Open Host Controller
pceb* at pci? dev ? function ? # Intel PCI-EISA Bridges
@ -419,6 +420,7 @@ fd* at fdc? drive ?
# Hardware RAID devices
ld* at cac? unit ?
ld* at mlx? unit ?
# USB bus support
usb* at uhci?

6
sys/arch/alpha/conf/GENERIC
View File

@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.180 2001/01/27 03:02:53 lukem Exp $
# $NetBSD: GENERIC,v 1.181 2001/02/04 17:05:16 ad Exp $
#
# Generic Alpha kernel. Enough to get booted, etc., but not much more.
#
@ -6,7 +6,7 @@
include "arch/alpha/conf/std.alpha"
#ident "GENERIC-$Revision: 1.180 $"
#ident "GENERIC-$Revision: 1.181 $"
maxusers 32
@ -225,6 +225,7 @@ isp* at pci? dev ? function ? # Qlogic ISP 10x0 SCSI
le* at pci? dev ? function ? # PCI LANCE Ethernet (untested)
#ncr* at pci? dev ? function ? # NCR 53c8xx SCSI
siop* at pci? dev ? function ? # Symbios 53c8xx SCSI
mlx* at pci? dev ? function ? # Mylex DAC960 / DEC SWXCR (untested)
ne* at pci? dev ? function ? # NE2000-compatible Ethernet
ohci* at pci? dev ? function ? # USB Open Host Controller
pceb* at pci? dev ? function ? # Intel PCI-EISA Bridges
@ -383,6 +384,7 @@ fd* at fdc? drive ?
# Hardware RAID devices
ld* at cac? unit ?
ld* at mlx? unix ?
# USB bus support
usb* at uhci?

4
sys/arch/alpha/conf/INSTALL
View File

@ -1,4 +1,4 @@
# $NetBSD: INSTALL,v 1.49 2000/12/21 23:05:47 thorpej Exp $
# $NetBSD: INSTALL,v 1.50 2001/02/04 17:05:16 ad Exp $
#
# Alpha INSTALL kernel.
@ -177,6 +177,7 @@ isp* at pci? dev ? function ? # Qlogic ISP 10x0 SCSI
le* at pci? dev ? function ? # PCI LANCE Ethernet (untested)
#ncr* at pci? dev ? function ? # NCR 53c8xx SCSI
siop* at pci? dev ? function ? # Symbios 53c8xx SCSI
mlx* at pci? dev ? function ? # Mylex DAC960 / DEC SWXCR (untested)
ne* at pci? dev ? function ? # NE2000-compatible Ethernet
pceb* at pci? dev ? function ? # Intel PCI-EISA Bridges
pciide* at pci? dev ? function ? # PCI IDE controllers
@ -280,6 +281,7 @@ fd* at fdc? drive ?
# Hardware RAID devices
ld* at cac? unit ?
ld* at mlx? unix ?
# Workstation Console attachments
wsdisplay* at vga?

10
sys/arch/i386/conf/GENERIC
View File

@ -1,11 +1,11 @@
# $NetBSD: GENERIC,v 1.398 2001/02/02 10:53:48 fvdl Exp $
# $NetBSD: GENERIC,v 1.399 2001/02/04 17:05:15 ad Exp $
#
# GENERIC -- everything that's currently supported
#
include "arch/i386/conf/std.i386"
#ident "GENERIC-$Revision: 1.398 $"
#ident "GENERIC-$Revision: 1.399 $"
maxusers 32 # estimated number of users
@ -473,10 +473,12 @@ uk* at scsibus? target ? lun ? # SCSI unknown
# RAID controllers and devices
cac* at eisa? # Compaq EISA array controllers
cac* at pci? dev ? function ? # Compaq PCI array controllers
mlx* at pci? dev ? function ? # Mylex DAC960 & DEC SWXCR family
twe* at pci? dev ? function ? # 3ware Escalade RAID controllers
ld* at cac? unit ? # Compaq array disk devices
ld* at twe? unit ? # 3ware array disk devices
ld* at cac? unit ? # logical disk devices
ld* at twe? unit ?
ld* at mlx? unit ?
# IDE and related devices
# PCI IDE controllers - see pciide(4) for supported hardware.

8
sys/arch/i386/conf/INSTALL
View File

@ -1,4 +1,4 @@
# $NetBSD: INSTALL,v 1.162 2001/01/16 03:38:23 augustss Exp $
# $NetBSD: INSTALL,v 1.163 2001/02/04 17:05:15 ad Exp $
#
# INSTALL - Installation kernel.
#
@ -366,10 +366,12 @@ cd* at scsibus? target ? lun ? # SCSI CD-ROM drives
# RAID controllers and devices
cac* at eisa? # Compaq EISA array controllers
cac* at pci? dev ? function ? # Compaq PCI array controllers
mlx* at pci? dev ? function ? # Mylex DAC960 & DEC SWXCR family
twe* at pci? dev ? function ? # 3ware Escalade RAID controllers
ld* at cac? unit ? # Compaq array disk devices
ld* at twe? unit ? # 3ware array disk devices
ld* at cac? unit ? # logical disk devices
ld* at twe? unit ?
ld* at mlx? unit ?
# IDE and related devices
# PCI IDE controllers - see pciide(4) for supported hardware.

9
sys/arch/i386/conf/INSTALL_SMALL
View File

@ -1,4 +1,4 @@
# $NetBSD: INSTALL_SMALL,v 1.63 2001/01/24 18:08:26 jmc Exp $
# $NetBSD: INSTALL_SMALL,v 1.64 2001/02/04 17:05:15 ad Exp $
#
# INSTALL_SMALL - Small Installation kernel.
#
@ -322,9 +322,12 @@ cd* at scsibus? target ? lun ? # SCSI CD-ROM drives
# RAID controllers and devices
#cac* at eisa? # Compaq EISA array controllers
#cac* at pci? dev ? function ? # Compaq PCI array controllers
#mlx* at pci? dev ? function ? # Mylex DAC960 & DEC SWXCR family
#twe* at pci? dev ? function ? # 3ware Escalade RAID controllers
#ld* at cac? unit ? # Compaq array disk devices
#ld* at twe? unit ? # 3ware array disk devices
#ld* at cac? unit ? # logical disk devices
#ld* at twe? unit ?
#ld* at mlx? unit ?
# IDE and related devices

9
sys/arch/i386/conf/INSTALL_TINY
View File

@ -1,4 +1,4 @@
# $NetBSD: INSTALL_TINY,v 1.31 2000/11/26 17:44:09 ad Exp $
# $NetBSD: INSTALL_TINY,v 1.32 2001/02/04 17:05:16 ad Exp $
#
# INSTALL_TINY - Tiny Installation kernel, suitable for 4M machines.
#
@ -323,7 +323,12 @@ pc0 at isa? port 0x60 irq 1 # pccons generic PC console driver
# RAID controllers and devices
#cac* at eisa? # Compaq EISA array controllers
#cac* at pci? dev ? function ? # Compaq PCI array controllers
#ca* at cac? unit ? # Compaq array disk devices
#mlx* at pci? dev ? function ? # Mylex DAC960 & DEC SWXCR family
#twe* at pci? dev ? function ? # 3ware Escalade RAID controllers
#ld* at cac? unit ? # logical disk devices
#ld* at twe? unit ?
#ld* at mlx? unit ?
# IDE and related devices

6
sys/arch/i386/i386/conf.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: conf.c,v 1.137 2001/01/14 11:17:30 martin Exp $ */
/* $NetBSD: conf.c,v 1.138 2001/02/04 17:05:13 ad Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -298,6 +298,8 @@ cdev_decl(i4btel);
cdev_decl(vmegeneric);
#include "iop.h"
cdev_decl(iop);
#include "mlx.h"
cdev_decl(mlx);
#include <altq/altqconf.h>
@ -388,6 +390,7 @@ struct cdevsw cdevsw[] =
cdev_ugen_init(NUSCANNER,uscanner),/* 75: USB scanner */
cdev__oci_init(NIOP,iop), /* 76: I2O IOP control interface */
cdev_altq_init(NALTQ,altq), /* 77: ALTQ control interface */
cdev__oci_init(NMLX,mlx), /* 78: Mylex DAC960 control interface */
};
int nchrdev = sizeof(cdevsw) / sizeof(cdevsw[0]);
@ -507,6 +510,7 @@ static int chrtoblktbl[] = {
/* 75 */ NODEV,
/* 76 */ NODEV,
/* 77 */ NODEV,
/* 78 */ NODEV,
};
/*

9
sys/conf/files
View File

@ -1,4 +1,4 @@
# $NetBSD: files,v 1.418 2001/02/02 04:39:35 tv Exp $
# $NetBSD: files,v 1.419 2001/02/04 17:05:11 ad Exp $
# @(#)files.newconf 7.5 (Berkeley) 5/10/93
@ -244,6 +244,13 @@ file dev/ic/cac.c cac
attach ld at cac with ld_cac
file dev/ic/ld_cac.c ld_cac
# Mylex DAC960 RAID controllers
device mlx {unit = -1}
file dev/ic/mlx.c mlx needs-flag
attach ld at mlx with ld_mlx
file dev/ic/ld_mlx.c ld_mlx
# AdvanSys 1200A, 1200B and ULTRA SCSI controllers
device adv: scsi
file dev/ic/adv.c adv

8
sys/dev/ic/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.12 2000/06/09 05:31:15 onoe Exp $
# $NetBSD: Makefile,v 1.13 2001/02/04 17:05:12 ad Exp $
INCSDIR= /usr/include/dev/ic
@ -13,9 +13,9 @@ INCS= ad1848reg.h ahareg.h ahavar.h aic6360reg.h aic6360var.h \
i82595reg.h ics2101reg.h ims332reg.h intersil7170.h interwavereg.h \
interwavevar.h ispmbox.h ispreg.h ispvar.h lemacreg.h lemacvar.h \
lptreg.h lptvar.h mb86960reg.h mb86960var.h mc146818reg.h \
mc68450reg.h mc6845reg.h midwayreg.h midwayvar.h ncr5380reg.h \
ncr5380var.h ncr53c400reg.h ncr53c9xreg.h ncr53c9xvar.h ne2000reg.h \
ne2000var.h \
mc68450reg.h mc6845reg.h midwayreg.h midwayvar.h mlxio.h mlxreg.h \
ncr5380reg.h ncr5380var.h ncr53c400reg.h ncr53c9xreg.h ncr53c9xvar.h \
ne2000reg.h ne2000var.h \
nec765reg.h ns16450reg.h ns16550reg.h opl3sa3reg.h pcdisplay.h \
pcdisplayvar.h pckbcvar.h pdqreg.h pdqvar.h rrunnerreg.h rrunnervar.h \
smc83c170reg.h smc83c170var.h smc90cx6reg.h smc91cxxreg.h \

278
sys/dev/ic/ld_mlx.c Normal file
View File

@ -0,0 +1,278 @@
/* $NetBSD: ld_mlx.c,v 1.1 2001/02/04 17:05:12 ad Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Andrew Doran.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Mylex DAC960 front-end for ld(4) driver.
*/
#include "rnd.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <sys/buf.h>
#include <sys/endian.h>
#include <sys/dkio.h>
#include <sys/disk.h>
#if NRND > 0
#include <sys/rnd.h>
#endif
#include <machine/vmparam.h>
#include <machine/bus.h>
#include <dev/ldvar.h>
#include <dev/ic/mlxreg.h>
#include <dev/ic/mlxio.h>
#include <dev/ic/mlxvar.h>
struct ld_mlx_softc {
struct ld_softc sc_ld;
int sc_hwunit;
};
static void ld_mlx_attach(struct device *, struct device *, void *);
static int ld_mlx_detach(struct device *, int);
static int ld_mlx_dobio(struct ld_mlx_softc *, void *, int, int, int,
struct buf *);
static int ld_mlx_dump(struct ld_softc *, void *, int, int);
static void ld_mlx_handler(struct mlx_ccb *);
static int ld_mlx_match(struct device *, struct cfdata *, void *);
static int ld_mlx_start(struct ld_softc *, struct buf *);
struct cfattach ld_mlx_ca = {
sizeof(struct ld_mlx_softc),
ld_mlx_match,
ld_mlx_attach,
ld_mlx_detach
};
static int
ld_mlx_match(struct device *parent, struct cfdata *match, void *aux)
{
return (1);
}
static void
ld_mlx_attach(struct device *parent, struct device *self, void *aux)
{
struct mlx_attach_args *mlxa;
struct ld_mlx_softc *sc;
struct ld_softc *ld;
struct mlx_softc *mlx;
struct mlx_sysdrive *ms;
const char *statestr;
sc = (struct ld_mlx_softc *)self;
ld = &sc->sc_ld;
mlx = (struct mlx_softc *)parent;
mlxa = aux;
ms = &mlx->mlx_sysdrive[mlxa->mlxa_unit];
sc->sc_hwunit = mlxa->mlxa_unit;
ld->sc_maxxfer = MLX_MAX_XFER;
ld->sc_secsize = MLX_SECTOR_SIZE;
ld->sc_maxqueuecnt = 1;
ld->sc_start = ld_mlx_start;
ld->sc_dump = ld_mlx_dump;
/*
* Build synthetic geometry.
*/
ld->sc_secperunit = ms->ms_size;
if (ld->sc_secperunit > 0x200000) {
ld->sc_nheads = 255;
ld->sc_nsectors = 63;
ld->sc_ncylinders = ms->ms_size / (255 * 63);
} else {
ld->sc_nheads = 128;
ld->sc_nsectors = 32;
ld->sc_ncylinders = ms->ms_size / (128 * 32);
}
/*
* Report on current status, and attach to the ld driver proper.
*/
switch (ms->ms_state) {
case MLX_SYSD_ONLINE:
statestr = "online";
ld->sc_flags = LDF_ENABLED;
break;
case MLX_SYSD_CRITICAL:
statestr = "critical";
ld->sc_flags = LDF_ENABLED;
break;
case MLX_SYSD_OFFLINE:
statestr = "offline";
break;
default:
statestr = "state unknown";
break;
}
if (ms->ms_raidlevel == MLX_SYS_DRV_JBOD)
printf(": JBOD, %s\n", statestr);
else
printf(": RAID%d, %s\n", ms->ms_raidlevel, statestr);
ldattach(ld);
}
static int
ld_mlx_detach(struct device *dv, int flags)
{
int rv;
if ((rv = ldbegindetach((struct ld_softc *)dv, flags)) != 0)
return (rv);
ldenddetach((struct ld_softc *)dv);
mlx_flush((struct mlx_softc *)dv->dv_parent, 1);
return (0);
}
static int
ld_mlx_dobio(struct ld_mlx_softc *sc, void *data, int datasize, int blkno,
int dowrite, struct buf *bp)
{
struct mlx_ccb *mc;
struct mlx_softc *mlx;
int s, rv;
bus_addr_t sgphys;
mlx = (struct mlx_softc *)sc->sc_ld.sc_dv.dv_parent;
if ((rv = mlx_ccb_alloc(mlx, &mc, bp == NULL)) != 0)
return (rv);
/* Map the data transfer. */
rv = mlx_ccb_map(mlx, mc, data, datasize,
dowrite ? MC_XFER_OUT : MC_XFER_IN);
if (rv != 0) {
mlx_ccb_free(mlx, mc);
return (rv);
}
/* Build the command. */
sgphys = mlx->mlx_sgls_paddr + (MLX_SGL_SIZE * mc->mc_ident);
datasize /= MLX_SECTOR_SIZE;
if (mlx->mlx_iftype == 2)
mlx_make_type1(mc,
dowrite ? MLX_CMD_WRITESG_OLD : MLX_CMD_READSG_OLD,
datasize & 0xff, blkno, sc->sc_hwunit, sgphys,
mc->mc_nsgent);
else
mlx_make_type5(mc,
dowrite ? MLX_CMD_WRITESG : MLX_CMD_READSG,
datasize & 0xff,
(sc->sc_hwunit << 3) | ((datasize >> 8) & 0x07),
blkno, sgphys, mc->mc_nsgent);
if (bp == NULL) {
s = splbio();
rv = mlx_ccb_poll(mlx, mc, 10000);
mlx_ccb_unmap(mlx, mc);
mlx_ccb_free(mlx, mc);
splx(s);
} else {
mc->mc_mx.mx_handler = ld_mlx_handler;
mc->mc_mx.mx_context = bp;
mc->mc_mx.mx_dv = &sc->sc_ld.sc_dv;
mlx_ccb_enqueue(mlx, mc);
rv = 0;
}
return (rv);
}
static int
ld_mlx_start(struct ld_softc *ld, struct buf *bp)
{
return (ld_mlx_dobio((struct ld_mlx_softc *)ld, bp->b_data,
bp->b_bcount, bp->b_rawblkno, (bp->b_flags & B_READ) == 0, bp));
}
static void
ld_mlx_handler(struct mlx_ccb *mc)
{
struct buf *bp;
struct mlx_context *mx;
struct ld_mlx_softc *sc;
struct mlx_softc *mlx;
mx = &mc->mc_mx;
bp = mx->mx_context;
sc = (struct ld_mlx_softc *)mx->mx_dv;
mlx = (struct mlx_softc *)sc->sc_ld.sc_dv.dv_parent;
if (mc->mc_status != MLX_STATUS_OK) {
bp->b_flags |= B_ERROR;
bp->b_error = EIO;
bp->b_resid = bp->b_bcount;
if (mc->mc_status == MLX_STATUS_RDWROFFLINE)
printf("%s: drive offline\n",
sc->sc_ld.sc_dv.dv_xname);
else
printf("%s: I/O error - %s\n",
sc->sc_ld.sc_dv.dv_xname,
mlx_ccb_diagnose(mc));
} else
bp->b_resid = 0;
mlx_ccb_unmap(mlx, mc);
mlx_ccb_free(mlx, mc);
lddone(&sc->sc_ld, bp);
}
static int
ld_mlx_dump(struct ld_softc *ld, void *data, int blkno, int blkcnt)
{
return (ld_mlx_dobio((struct ld_mlx_softc *)ld, data,
blkcnt * ld->sc_secsize, blkno, 1, NULL));
}

2174
sys/dev/ic/mlx.c Normal file
View File

File diff suppressed because it is too large Load Diff

96
sys/dev/ic/mlxio.h Normal file
View File

@ -0,0 +1,96 @@
/* $NetBSD: mlxio.h,v 1.1 2001/02/04 17:05:12 ad Exp $ */
/*-
* Copyright (c) 1999 Michael Smith
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from FreeBSD: mlxio.h,v 1.1.2.2 2000/04/24 19:40:49 msmith Exp
*/
#ifndef _IC_MLXIO_H_
#define _IC_MLXIO_H_
#include <sys/ioccom.h>
/*
* System Disk ioctls
*/
/* system disk status values */
#define MLX_SYSD_ONLINE 0x03
#define MLX_SYSD_CRITICAL 0x04
#define MLX_SYSD_OFFLINE 0xff
#define MLXD_STATUS _IOR('M', 100, int)
#define MLXD_CHECKASYNC _IOR('M', 101, int)
#define MLXD_DETACH _IOW('M', 102, int)
/*
* Controller ioctls
*/
struct mlx_pause {
int mp_which;
#define MLX_PAUSE_ALL 0xff
#define MLX_PAUSE_CANCEL 0x00
int mp_when;
int mp_howlong;
};
struct mlx_usercommand {
size_t mu_datasize; /* size of buffer */
void *mu_buf; /* user address of buffer */
int mu_bufptr; /* offset into command m/b for PA */
int mu_bufdir; /* transfer is to controller */
u_int16_t mu_status; /* command status returned */
u_int8_t mu_command[16]; /* command mailbox contents */
};
#define MU_XFER_IN 0x01
#define MU_XFER_OUT 0x02
#define MU_XFER_MASK 0x03
struct mlx_rebuild_request {
int rr_channel;
int rr_target;
int rr_status;
};
struct mlx_rebuild_status {
u_int16_t rs_code;
#define MLX_REBUILDSTAT_REBUILDCHECK 0x0000
#define MLX_REBUILDSTAT_ADDCAPACITY 0x0400
#define MLX_REBUILDSTAT_ADDCAPACITYINIT 0x0500
#define MLX_REBUILDSTAT_IDLE 0xffff
u_int16_t rs_drive;
int rs_size;
int rs_remaining;
};
#define MLX_RESCAN_DRIVES _IO('M', 0)
#define MLX_PAUSE_CHANNEL _IOW('M', 1, struct mlx_pause)
#define MLX_COMMAND _IOWR('M', 2, struct mlx_usercommand)
#define MLX_REBUILDASYNC _IOWR('M', 3, struct mlx_rebuild_request)
#define MLX_REBUILDSTAT _IOR('M', 4, struct mlx_rebuild_status)
#define MLX_GET_SYSDRIVE _IOWR('M', 5, int)
#endif /* !_IC_MLXIO_H_ */

532
sys/dev/ic/mlxreg.h Normal file
View File

@ -0,0 +1,532 @@
/* $NetBSD: mlxreg.h,v 1.1 2001/02/04 17:05:12 ad Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Andrew Doran.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1999 Michael Smith
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from FreeBSD: mlxreg.h,v 1.5.2.2 2000/04/24 19:40:50 msmith Exp
*/
#ifndef _IC_MLXREG_H_
#define _IC_MLXREG_H_
#define MLX_SECTOR_SIZE 512
/*
* Selected command codes.
*/
#define MLX_CMD_ENQUIRY_OLD 0x05
#define MLX_CMD_ENQUIRY 0x53
#define MLX_CMD_ENQUIRY2 0x1c
#define MLX_CMD_ENQSYSDRIVE 0x19
#define MLX_CMD_READSG 0xb6
#define MLX_CMD_WRITESG 0xb7
#define MLX_CMD_READSG_OLD 0x82
#define MLX_CMD_WRITESG_OLD 0x83
#define MLX_CMD_FLUSH 0x0a
#define MLX_CMD_LOGOP 0x72
#define MLX_CMD_REBUILDASYNC 0x16
#define MLX_CMD_CHECKASYNC 0x1e
#define MLX_CMD_REBUILDSTAT 0x0c
#define MLX_CMD_STOPCHANNEL 0x13
#define MLX_CMD_STARTCHANNEL 0x12
#define MLX_CMD_READ_CONFIG 0x4e
#define MLX_CMD_WRITE_CONFIG 0x4f
#define MLX_CMD_READ_DK_CONFIG 0x4a
#define MLX_CMD_WRITE_DK_CONFIG 0x4b
#define MLX_CMD_DIRECT_CDB 0x04
#define MLX_CMD_DEVICE_STATE 0x50
#define MLX_CMD_READ_CONFIG2 0x3d
#define MLX_CMD_WRITE_CONFIG2 0x3c
#ifdef _KERNEL
/*
* Status values.
*/
#define MLX_STATUS_OK 0x0000
#define MLX_STATUS_RDWROFFLINE 0x0002 /* read/write claims drive is offline */
#define MLX_STATUS_WEDGED 0xdeaf /* controller not listening */
#define MLX_STATUS_LOST 0xdead /* never came back */
#define MLX_STATUS_BUSY 0xdeed /* command is in controller */
/*
* V1 (EISA) interface.
*/
#define MLX_V1REG_IE 0x09
#define MLX_V1REG_IDB 0x0d
#define MLX_V1REG_ODB_EN 0x0e
#define MLX_V1REG_ODB 0x0f
#define MLX_V1REG_MAILBOX 0x10
#define MLX_V1_IDB_FULL 0x01 /* mailbox is full */
#define MLX_V1_IDB_INIT_BUSY 0x02 /* init in progress */
#define MLX_V1_IDB_SACK 0x02 /* acknowledge status read */
#define MLX_V1_ODB_SAVAIL 0x01 /* status is available */
#define MLX_V1_FWERROR_PEND 0x04 /* firmware error pending */
#define MLX_V1_MAILBOX_LEN 13
/*
* V2/V3 interface.
*/
#define MLX_V3REG_MAILBOX 0x00
#define MLX_V3REG_STATUS_IDENT 0x0d
#define MLX_V3REG_STATUS 0x0e
#define MLX_V3REG_IDB 0x40
#define MLX_V3REG_ODB 0x41
#define MLX_V3REG_IE 0x43
#define MLX_V3REG_FWERROR 0x3f
#define MLX_V3REG_FWERROR_PARAM1 0x00
#define MLX_V3REG_FWERROR_PARAM2 0x01
#define MLX_V3_IDB_FULL 0x01 /* mailbox is full */
#define MLX_V3_IDB_INIT_BUSY 0x02 /* init in progress */
#define MLX_V3_IDB_SACK 0x02 /* acknowledge status read */
#define MLX_V3_ODB_SAVAIL 0x01 /* status is available */
#define MLX_V3_FWERROR_PEND 0x04 /* firmware error pending */
#define MLX_V3_MAILBOX_LEN 13
/*
* V4 interface.
*/
#define MLX_V4REG_MAILBOX 0x1000
#define MLX_V4REG_STATUS_IDENT 0x1018
#define MLX_V4REG_STATUS 0x101a
#define MLX_V4REG_IDB 0x0020
#define MLX_V4REG_ODB 0x002c
#define MLX_V4REG_IE 0x0034
#define MLX_V4REG_FWERROR 0x103f
#define MLX_V4REG_FWERROR_PARAM1 0x1000
#define MLX_V4REG_FWERROR_PARAM2 0x1001
#define MLX_V4_IDB_FULL 0x01 /* mailbox is full */
#define MLX_V4_IDB_INIT_BUSY 0x02 /* initialisation in progress */
#define MLX_V4_IDB_HWMBOX_CMD 0x01 /* posted hardware mailbox command */
#define MLX_V4_IDB_SACK 0x02 /* acknowledge status read */
#define MLX_V4_IDB_MEMMBOX_CMD 0x10 /* posted memory mailbox command */
#define MLX_V4_ODB_HWSAVAIL 0x01 /* status available for hardware m/b */
#define MLX_V4_ODB_MEMSAVAIL 0x02 /* status available for memory m/b */
#define MLX_V4_ODB_HWMBOX_ACK 0x01 /* ack status read from hardware m/b */
#define MLX_V4_ODB_MEMMBOX_ACK 0x02 /* ack status read from memory m/b */
#define MLX_V4_IE_MASK 0xfb /* message unit interrupt mask */
#define MLX_V4_IE_DISINT 0x04 /* interrupt disable bit */
#define MLX_V4_FWERROR_PEND 0x04 /* firmware error pending */
#define MLX_V4_MAILBOX_LEN 16
/*
* V5 interface.
*/
#define MLX_V5REG_MAILBOX 0x50
#define MLX_V5REG_STATUS_IDENT 0x5d
#define MLX_V5REG_STATUS 0x5e
#define MLX_V5REG_IDB 0x60
#define MLX_V5REG_ODB 0x61
#define MLX_V5REG_IE 0x34
#define MLX_V5REG_FWERROR 0x63
#define MLX_V5REG_FWERROR_PARAM1 0x50
#define MLX_V5REG_FWERROR_PARAM2 0x51
#define MLX_V5_IDB_EMPTY 0x01 /* mailbox is empty */
#define MLX_V5_IDB_INIT_DONE 0x02 /* initialisation has completed */
#define MLX_V5_IDB_HWMBOX_CMD 0x01 /* posted hardware mailbox command */
#define MLX_V5_IDB_SACK 0x02 /* acknowledge status read */
#define MLX_V5_IDB_RESET 0x08 /* reset request */
#define MLX_V5_IDB_MEMMBOX_CMD 0x10 /* posted memory mailbox command */
#define MLX_V5_ODB_HWSAVAIL 0x01 /* status available for hardware m/b */
#define MLX_V5_ODB_MEMSAVAIL 0x02 /* status available for memory m/b */
#define MLX_V5_ODB_HWMBOX_ACK 0x01 /* ack status read from hardware m/b */
#define MLX_V5_ODB_MEMMBOX_ACK 0x02 /* ack status read from memory m/b */
#define MLX_V5_IE_DISINT 0x04 /* interrupt disable bit */
#define MLX_V5_FWERROR_PEND 0x04 /* firmware error pending */
#define MLX_V5_MAILBOX_LEN 16
#endif /* _KERNEL */
/*
* Scatter-gather list format, type 1, kind 00.
*/
struct mlx_sgentry {
u_int32_t sge_addr;
u_int32_t sge_count;
} __attribute__ ((packed));
/*
* Command result buffers, as placed in system memory by the controller.
*/
struct mlx_enquiry_old {
u_int8_t me_num_sys_drvs;
u_int8_t me_res1[3];
u_int32_t me_drvsize[8];
u_int16_t me_flash_age;
u_int8_t me_status_flags;
u_int8_t me_free_state_change_count;
u_int8_t me_fwminor;
u_int8_t me_fwmajor;
u_int8_t me_rebuild_flag;
u_int8_t me_max_commands;
u_int8_t me_offline_sd_count;
u_int8_t me_res3;
u_int8_t me_critical_sd_count;
u_int8_t me_res4[3];
u_int8_t me_dead_count;
u_int8_t me_res5;
u_int8_t me_rebuild_count;
u_int8_t me_misc_flags;
struct {
u_int8_t dd_targ;
u_int8_t dd_chan;
} __attribute__ ((packed)) me_dead[20];
} __attribute__ ((packed));
struct mlx_enquiry {
u_int8_t me_num_sys_drvs;
u_int8_t me_res1[3];
u_int32_t me_drvsize[32];
u_int16_t me_flash_age;
u_int8_t me_status_flags;
#define MLX_ENQ_SFLAG_DEFWRERR 0x01 /* deferred write error indicator */
#define MLX_ENQ_SFLAG_BATTLOW 0x02 /* battery low */
u_int8_t me_res2;
u_int8_t me_fwminor;
u_int8_t me_fwmajor;
u_int8_t me_rebuild_flag;
u_int8_t me_max_commands;
u_int8_t me_offline_sd_count;
u_int8_t me_res3;
u_int16_t me_event_log_seq_num;
u_int8_t me_critical_sd_count;
u_int8_t me_res4[3];
u_int8_t me_dead_count;
u_int8_t me_res5;
u_int8_t me_rebuild_count;
u_int8_t me_misc_flags;
#define MLX_ENQ_MISC_BBU 0x08 /* battery backup present */
struct {
u_int8_t dd_targ;
u_int8_t dd_chan;
} __attribute__ ((packed)) me_dead[20];
} __attribute__ ((packed));
struct mlx_enquiry2 {
u_int8_t me_hardware_id[4];
u_int8_t me_firmware_id[4];
u_int32_t me_res1;
u_int8_t me_configured_channels;
u_int8_t me_actual_channels;
u_int8_t me_max_targets;
u_int8_t me_max_tags;
u_int8_t me_max_sys_drives;
u_int8_t me_max_arms;
u_int8_t me_max_spans;
u_int8_t me_res2;
u_int32_t me_res3;
u_int32_t me_mem_size;
u_int32_t me_cache_size;
u_int32_t me_flash_size;
u_int32_t me_nvram_size;
u_int16_t me_mem_type;
u_int16_t me_clock_speed;
u_int16_t me_mem_speed;
u_int16_t me_hardware_speed;
u_int8_t me_res4[12];
u_int16_t me_max_commands;
u_int16_t me_max_sg;
u_int16_t me_max_dp;
u_int16_t me_max_iod;
u_int16_t me_max_comb;
u_int8_t me_latency;
u_int8_t me_res5;
u_int8_t me_scsi_timeout;
u_int8_t me_res6;
u_int16_t me_min_freelines;
u_int8_t me_res7[8];
u_int8_t me_rate_const;
u_int8_t me_res8[11];
u_int16_t me_physblk;
u_int16_t me_logblk;
u_int16_t me_maxblk;
u_int16_t me_blocking_factor;
u_int16_t me_cacheline;
u_int8_t me_scsi_cap;
u_int8_t me_res9[5];
u_int16_t me_firmware_build;
u_int8_t me_fault_mgmt_type;
u_int8_t me_res10;
u_int32_t me_firmware_features;
u_int8_t me_res11[8];
} __attribute__ ((packed));
/* MLX_CMD_ENQSYSDRIVE returns an array of 32 of these. */
struct mlx_enq_sys_drive {
u_int32_t sd_size;
u_int8_t sd_state;
u_int8_t sd_raidlevel;
u_int16_t sd_res1;
} __attribute__ ((packed));
/*
* MLX_CMD_LOGOP/MLX_LOGOP_GET
*
* Bitfields:
*
* 0-4 el_target SCSI target
* 5-7 el_target SCSI channel
* 0-6 el_errorcode error code
* 7-7 el_errorcode validity (?)
* 0-3 el_sense sense key
* 4-4 el_sense reserved
* 5-5 el_sense ILI
* 6-6 el_sense EOM
* 7-7 el_sense filemark
*/
struct mlx_eventlog_entry {
u_int8_t el_type;
u_int8_t el_length;
u_int8_t el_target;
u_int8_t el_lun;
u_int16_t el_seqno;
u_int8_t el_errorcode;
u_int8_t el_segment;
u_int8_t el_sense;
u_int8_t el_information[4];
u_int8_t el_addsense;
u_int8_t el_csi[4];
u_int8_t el_asc;
u_int8_t el_asq;
u_int8_t el_res3[12];
} __attribute__ ((packed));
#define MLX_LOGOP_GET 0x00 /* operation codes for MLX_CMD_LOGOP */
#define MLX_LOGMSG_SENSE 0x00 /* log message contents codes */
struct mlx_rebuild_stat {
u_int32_t rb_drive;
u_int32_t rb_size;
u_int32_t rb_remaining;
} __attribute__ ((packed));
struct mlx_config {
u_int16_t cf_flags1;
#define MLX_CF2_ACTV_NEG 0x0002
#define MLX_CF2_NORSTRTRY 0x0080
#define MLX_CF2_STRGWRK 0x0100
#define MLX_CF2_HPSUPP 0x0200
#define MLX_CF2_NODISCN 0x0400
#define MLX_CF2_ARM 0x2000
#define MLX_CF2_OFM 0x8000
#define MLX_CF2_AEMI (MLX_CF2_ARM | MLX_CF2_OFM)
u_int8_t cf_oemid;
u_int8_t cf_oem_model;
u_int8_t cf_physical_sector;
u_int8_t cf_logical_sector;
u_int8_t cf_blockfactor;
u_int8_t cf_flags2;
#define MLX_CF2_READAH 0x01
#define MLX_CF2_BIOSDLY 0x02
#define MLX_CF2_REASS1S 0x10
#define MLX_CF2_FUAENABL 0x40
#define MLX_CF2_R5ALLS 0x80
u_int8_t cf_rcrate;
u_int8_t cf_res1;
u_int8_t cf_blocks_per_cache_line;
u_int8_t cf_blocks_per_stripe;
u_int8_t cf_scsi_param_0;
u_int8_t cf_scsi_param_1;
u_int8_t cf_scsi_param_2;
u_int8_t cf_scsi_param_3;
u_int8_t cf_scsi_param_4;
u_int8_t cf_scsi_param_5;
u_int8_t cf_scsi_initiator_id;
u_int8_t cf_res2;
u_int8_t cf_startup_mode;
u_int8_t cf_simultaneous_spinup_devices;
u_int8_t cf_delay_between_spinups;
u_int8_t cf_res3;
u_int16_t cf_checksum;
} __attribute__ ((packed));
struct mlx_config2 {
struct mlx_config cf2_cf;
u_int8_t cf2_reserved0[26];
u_int8_t cf2_flags;
#define MLX_CF2_BIOS_DIS 0x01
#define MLX_CF2_CDROM_DIS 0x02
#define MLX_CF2_GEOM_255 0x20
u_int8_t cf2_reserved1[9];
u_int16_t cf2_checksum;
} __attribute__ ((__packed__));
struct mlx_sys_drv_span {
u_int32_t sp_start_lba;
u_int32_t sp_nblks;
u_int8_t sp_arm[8];
} __attribute__ ((packed));
struct mlx_sys_drv {
u_int8_t sd_status;
u_int8_t sd_ext_status;
u_int8_t sd_mod1;
u_int8_t sd_mod2;
u_int8_t sd_raidlevel;
#define MLX_SYS_DRV_WRITEBACK (1<<7)
#define MLX_SYS_DRV_RAID0 0
#define MLX_SYS_DRV_RAID1 1
#define MLX_SYS_DRV_RAID3 3
#define MLX_SYS_DRV_RAID5 5
#define MLX_SYS_DRV_RAID6 6
#define MLX_SYS_DRV_JBOD 7
u_int8_t sd_valid_arms;
u_int8_t sd_valid_spans;
u_int8_t sd_init_state;
#define MLX_SYS_DRV_INITTED 0x81;
struct mlx_sys_drv_span sd_span[4];
} __attribute__ ((packed));
struct mlx_phys_drv {
u_int8_t pd_flags1;
#define MLX_PHYS_DRV_PRESENT 0x01
u_int8_t pd_flags2;
#define MLX_PHYS_DRV_OTHER 0x00
#define MLX_PHYS_DRV_DISK 0x01
#define MLX_PHYS_DRV_SEQUENTIAL 0x02
#define MLX_PHYS_DRV_CDROM 0x03
#define MLX_PHYS_DRV_FAST20 0x08
#define MLX_PHYS_DRV_SYNC 0x10
#define MLX_PHYS_DRV_FAST 0x20
#define MLX_PHYS_DRV_WIDE 0x40
#define MLX_PHYS_DRV_TAG 0x80
u_int8_t pd_status;
#define MLX_PHYS_DRV_DEAD 0x00
#define MLX_PHYS_DRV_WRONLY 0x02
#define MLX_PHYS_DRV_ONLINE 0x03
#define MLX_PHYS_DRV_STANDBY 0x10
u_int8_t pd_res1;
u_int8_t pd_period;
u_int8_t pd_offset;
u_int32_t pd_config_size;
} __attribute__ ((packed));
struct mlx_core_cfg {
u_int8_t cc_num_sys_drives;
u_int8_t cc_res1[3];
struct mlx_sys_drv cc_sys_drives[32];
struct mlx_phys_drv cc_phys_drives[5 * 16];
} __attribute__ ((packed));
/*
* Bitfields:
*
* 0-3 dcdb_target SCSI target
* 4-7 dcdb_target SCSI channel
* 0-3 dcdb_length CDB length
* 4-7 dcdb_length high 4 bits of `datasize'
*/
struct mlx_dcdb {
u_int8_t dcdb_target;
u_int8_t dcdb_flags;
#define MLX_DCDB_NO_DATA 0x00
#define MLX_DCDB_DATA_IN 0x01
#define MLX_DCDB_DATA_OUT 0x02
#define MLX_DCDB_EARLY_STATUS 0x04
#define MLX_DCDB_TIMEOUT_10S 0x10 /* This lot is wrong? [ad] */
#define MLX_DCDB_TIMEOUT_60S 0x20
#define MLX_DCDB_TIMEOUT_20M 0x30
#define MLX_DCDB_TIMEOUT_24H 0x40
#define MLX_DCDB_NO_AUTO_SENSE 0x40 /* XXX ?? */
#define MLX_DCDB_DISCONNECT 0x80
u_int16_t dcdb_datasize;
u_int32_t dcdb_physaddr;
u_int8_t dcdb_length;
u_int8_t dcdb_sense_length;
u_int8_t dcdb_cdb[12];
u_int8_t dcdb_sense[64];
u_int8_t dcdb_status;
u_int8_t res1;
} __attribute__ ((packed));
struct mlx_bbtable_entry {
u_int32_t bbt_block_number;
u_int8_t bbt_extent;
u_int8_t bbt_res1;
u_int8_t bbt_entry_type;
u_int8_t bbt_system_drive; /* high 3 bits reserved */
} __attribute__ ((packed));
#endif /* !_IC_MLXREG_H_ */

373
sys/dev/ic/mlxvar.h Normal file
View File

@ -0,0 +1,373 @@
/* $NetBSD: mlxvar.h,v 1.1 2001/02/04 17:05:12 ad Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Andrew Doran.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1999 Michael Smith
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from FreeBSD: mlxvar.h,v 1.5.2.2 2000/04/24 19:40:50 msmith Exp
*/
#ifndef _IC_MLXVAR_H_
#define _IC_MLXVAR_H_
#include "locators.h"
/* Older boards allow up to 17 segments and 64kB transfers. */
#define MLX_MAX_SEGS 17
#define MLX_MAX_XFER 65536
#define MLX_SGL_SIZE (sizeof(struct mlx_sgentry) * MLX_MAX_SEGS)
/* This shouldn't be ajusted lightly... */
#define MLX_MAX_DRIVES 32
/* Maximum queue depth, matching the older controllers. */
#define MLX_MAX_QUEUECNT 63
/* Number of CCBs to reserve for `special' operations. */
#define MLX_NCCBS_RESERVE 7
/* Structure describing a system drive as attached to the controller. */
struct mlx_sysdrive {
u_int32_t ms_size;
u_short ms_state;
u_short ms_raidlevel;
struct device *ms_dv;
};
/* Optional per-CCB context. */
struct mlx_ccb;
struct mlx_context {
void (*mx_handler)(struct mlx_ccb *);
void *mx_context;
struct device *mx_dv;
};
/* Command control block. */
struct mlx_ccb {
union {
SIMPLEQ_ENTRY(mlx_ccb) simpleq;
SLIST_ENTRY(mlx_ccb) slist;
TAILQ_ENTRY(mlx_ccb) tailq;
} mc_chain;
u_int mc_flags;
u_int mc_status;
u_int mc_ident;
time_t mc_expiry;
u_int mc_nsgent;
u_int mc_xfer_size;
bus_addr_t mc_xfer_phys;
bus_dmamap_t mc_xfer_map;
struct mlx_context mc_mx;
u_int8_t mc_mbox[16];
};
#define MC_XFER_IN MU_XFER_IN /* Map describes inbound xfer */
#define MC_XFER_OUT MU_XFER_OUT /* Map describes outbound xfer */
#define MC_WAITING 0x0400 /* We have waiters */
/*
* Per-controller state.
*/
struct mlx_softc {
struct device mlx_dv;
bus_space_tag_t mlx_iot;
bus_space_handle_t mlx_ioh;
bus_dma_tag_t mlx_dmat;
bus_dmamap_t mlx_dmamap;
void *mlx_ih;
SLIST_HEAD(, mlx_ccb) mlx_ccb_freelist;
TAILQ_HEAD(, mlx_ccb) mlx_ccb_worklist;
SIMPLEQ_HEAD(, mlx_ccb) mlx_ccb_queue;
struct mlx_ccb *mlx_ccbs;
int mlx_nccbs;
int mlx_nccbs_free;
caddr_t mlx_sgls;
bus_addr_t mlx_sgls_paddr;
int (*mlx_submit)(struct mlx_softc *, struct mlx_ccb *);
int (*mlx_findcomplete)(struct mlx_softc *, u_int *, u_int *);
void (*mlx_intaction)(struct mlx_softc *, int);
int (*mlx_fw_handshake)(struct mlx_softc *, int *, int *, int *);
int mlx_max_queuecnt;
struct mlx_enquiry2 *mlx_enq2;
int mlx_iftype;
time_t mlx_lastpoll;
u_int mlx_lastevent;
u_int mlx_currevent;
u_int mlx_bg;
struct mlx_rebuild_status mlx_rebuildstat;
struct mlx_pause mlx_pause;
int mlx_flags;
struct mlx_sysdrive mlx_sysdrive[MLX_MAX_DRIVES];
};
#define MLX_BG_CHECK 1 /* we started a check */
#define MLX_BG_REBUILD 2 /* we started a rebuild */
#define MLX_BG_SPONTANEOUS 3 /* it just happened somehow */
#define MLXF_SPINUP_REPORTED 0x0001 /* "spinning up drives" displayed */
#define MLXF_EVENTLOG_BUSY 0x0002 /* currently reading event log */
#define MLXF_FW_INITTED 0x0004 /* firmware init crap done */
#define MLXF_PAUSEWORKS 0x0008 /* channel pause works as expected */
#define MLXF_OPEN 0x0010 /* control device is open */
#define MLXF_INITOK 0x0020 /* controller initalised OK */
#define MLXF_PERIODIC_CTLR 0x0040 /* periodic check running */
#define MLXF_PERIODIC_DRIVE 0x0080 /* periodic check running */
#define MLXF_PERIODIC_REBUILD 0x0100 /* periodic check running */
#define MLXF_EISA 0x0200 /* EISA board */
struct mlx_attach_args {
int mlxa_unit;
};
#define mlxacf_unit cf_loc[MLXCF_UNIT]
int mlx_flush(struct mlx_softc *, int);
void mlx_init(struct mlx_softc *, const char *);
int mlx_intr(void *);
int mlx_ccb_alloc(struct mlx_softc *, struct mlx_ccb **, int);
const char *mlx_ccb_diagnose(struct mlx_ccb *);
void mlx_ccb_enqueue(struct mlx_softc *, struct mlx_ccb *);
void mlx_ccb_free(struct mlx_softc *, struct mlx_ccb *);
int mlx_ccb_map(struct mlx_softc *, struct mlx_ccb *, void *, int, int);
int mlx_ccb_poll(struct mlx_softc *, struct mlx_ccb *, int);
void mlx_ccb_unmap(struct mlx_softc *, struct mlx_ccb *);
int mlx_ccb_wait(struct mlx_softc *, struct mlx_ccb *);
static __inline__ void mlx_make_type1(struct mlx_ccb *, u_int8_t, u_int16_t,
u_int32_t, u_int8_t, u_int32_t,
u_int8_t);
static __inline__ void mlx_make_type2(struct mlx_ccb *, u_int8_t, u_int8_t,
u_int8_t, u_int8_t, u_int8_t,
u_int8_t, u_int8_t, u_int32_t,
u_int8_t);
static __inline__ void mlx_make_type3(struct mlx_ccb *, u_int8_t, u_int8_t,
u_int8_t, u_int16_t, u_int8_t,
u_int8_t, u_int32_t, u_int8_t);
static __inline__ void mlx_make_type4(struct mlx_ccb *, u_int8_t, u_int16_t,
u_int32_t, u_int32_t, u_int8_t);
static __inline__ void mlx_make_type5(struct mlx_ccb *, u_int8_t, u_int8_t,
u_int8_t, u_int32_t, u_int32_t,
u_int8_t);
static __inline__ u_int8_t mlx_inb(struct mlx_softc *, int);
static __inline__ u_int16_t mlx_inw(struct mlx_softc *, int);
static __inline__ u_int32_t mlx_inl(struct mlx_softc *, int);
static __inline__ void mlx_outb(struct mlx_softc *, int, u_int8_t);
static __inline__ void mlx_outw(struct mlx_softc *, int, u_int16_t);
static __inline__ void mlx_outl(struct mlx_softc *, int, u_int32_t);
static __inline__ void
mlx_make_type1(struct mlx_ccb *mc, u_int8_t code, u_int16_t f1, u_int32_t f2,
u_int8_t f3, u_int32_t f4, u_int8_t f5)
{
mc->mc_mbox[0x0] = code;
mc->mc_mbox[0x2] = f1;
mc->mc_mbox[0x3] = (((f2 >> 24) & 0x3) << 6) | ((f1 >> 8) & 0x3f);
mc->mc_mbox[0x4] = f2;
mc->mc_mbox[0x5] = (f2 >> 8);
mc->mc_mbox[0x6] = (f2 >> 16);
mc->mc_mbox[0x7] = f3;
mc->mc_mbox[0x8] = f4;
mc->mc_mbox[0x9] = (f4 >> 8);
mc->mc_mbox[0xa] = (f4 >> 16);
mc->mc_mbox[0xb] = (f4 >> 24);
mc->mc_mbox[0xc] = f5;
}
static __inline__ void
mlx_make_type2(struct mlx_ccb *mc, u_int8_t code, u_int8_t f1, u_int8_t f2,
u_int8_t f3, u_int8_t f4, u_int8_t f5, u_int8_t f6,
u_int32_t f7, u_int8_t f8)
{
mc->mc_mbox[0x0] = code;
mc->mc_mbox[0x2] = f1;
mc->mc_mbox[0x3] = f2;
mc->mc_mbox[0x4] = f3;
mc->mc_mbox[0x5] = f4;
mc->mc_mbox[0x6] = f5;
mc->mc_mbox[0x7] = f6;
mc->mc_mbox[0x8] = f7;
mc->mc_mbox[0x9] = (f7 >> 8);
mc->mc_mbox[0xa] = (f7 >> 16);
mc->mc_mbox[0xb] = (f7 >> 24);
mc->mc_mbox[0xc] = f8;
}
static __inline__ void
mlx_make_type3(struct mlx_ccb *mc, u_int8_t code, u_int8_t f1, u_int8_t f2,
u_int16_t f3, u_int8_t f4, u_int8_t f5, u_int32_t f6,
u_int8_t f7)
{
mc->mc_mbox[0x0] = code;
mc->mc_mbox[0x2] = f1;
mc->mc_mbox[0x3] = f2;
mc->mc_mbox[0x4] = f3;
mc->mc_mbox[0x5] = (f3 >> 8);
mc->mc_mbox[0x6] = f4;
mc->mc_mbox[0x7] = f5;
mc->mc_mbox[0x8] = f6;
mc->mc_mbox[0x9] = (f6 >> 8);
mc->mc_mbox[0xa] = (f6 >> 16);
mc->mc_mbox[0xb] = (f6 >> 24);
mc->mc_mbox[0xc] = f7;
}
static __inline__ void
mlx_make_type4(struct mlx_ccb *mc, u_int8_t code, u_int16_t f1, u_int32_t f2,
u_int32_t f3, u_int8_t f4)
{
mc->mc_mbox[0x0] = code;
mc->mc_mbox[0x2] = f1;
mc->mc_mbox[0x3] = (f1 >> 8);
mc->mc_mbox[0x4] = f2;
mc->mc_mbox[0x5] = (f2 >> 8);
mc->mc_mbox[0x6] = (f2 >> 16);
mc->mc_mbox[0x7] = (f2 >> 24);
mc->mc_mbox[0x8] = f3;
mc->mc_mbox[0x9] = (f3 >> 8);
mc->mc_mbox[0xa] = (f3 >> 16);
mc->mc_mbox[0xb] = (f3 >> 24);
mc->mc_mbox[0xc] = f4;
}
static __inline__ void
mlx_make_type5(struct mlx_ccb *mc, u_int8_t code, u_int8_t f1, u_int8_t f2,
u_int32_t f3, u_int32_t f4, u_int8_t f5)
{
mc->mc_mbox[0x0] = code;
mc->mc_mbox[0x2] = f1;
mc->mc_mbox[0x3] = f2;
mc->mc_mbox[0x4] = f3;
mc->mc_mbox[0x5] = (f3 >> 8);
mc->mc_mbox[0x6] = (f3 >> 16);
mc->mc_mbox[0x7] = (f3 >> 24);
mc->mc_mbox[0x8] = f4;
mc->mc_mbox[0x9] = (f4 >> 8);
mc->mc_mbox[0xa] = (f4 >> 16);
mc->mc_mbox[0xb] = (f4 >> 24);
mc->mc_mbox[0xc] = f5;
}
static __inline__ u_int8_t
mlx_inb(struct mlx_softc *mlx, int off)
{
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 1,
BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
return (bus_space_read_1(mlx->mlx_iot, mlx->mlx_ioh, off));
}
static __inline__ u_int16_t
mlx_inw(struct mlx_softc *mlx, int off)
{
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 2,
BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
return (bus_space_read_2(mlx->mlx_iot, mlx->mlx_ioh, off));
}
static __inline__ u_int32_t
mlx_inl(struct mlx_softc *mlx, int off)
{
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 4,
BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
return (bus_space_read_4(mlx->mlx_iot, mlx->mlx_ioh, off));
}
static __inline__ void
mlx_outb(struct mlx_softc *mlx, int off, u_int8_t val)
{
bus_space_write_1(mlx->mlx_iot, mlx->mlx_ioh, off, val);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 1,
BUS_SPACE_BARRIER_WRITE);
}
static __inline__ void
mlx_outw(struct mlx_softc *mlx, int off, u_int16_t val)
{
bus_space_write_2(mlx->mlx_iot, mlx->mlx_ioh, off, val);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 2,
BUS_SPACE_BARRIER_WRITE);
}
static __inline__ void
mlx_outl(struct mlx_softc *mlx, int off, u_int32_t val)
{
bus_space_write_4(mlx->mlx_iot, mlx->mlx_ioh, off, val);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 4,
BUS_SPACE_BARRIER_WRITE);
}
#endif /* !_IC_MLXVAR_H_ */

6
sys/dev/pci/files.pci
View File

@ -1,4 +1,4 @@
# $NetBSD: files.pci,v 1.118 2001/01/22 17:40:14 ad Exp $
# $NetBSD: files.pci,v 1.119 2001/02/04 17:05:12 ad Exp $
#
# Config file and device description for machine-independent PCI code.
# Included by ports that need it. Requires that the SCSI files be
@ -53,6 +53,10 @@ file dev/pci/ld_twe.c ld_twe
attach cac at pci with cac_pci
file dev/pci/cac_pci.c cac_pci
# Mylex RAID controllers
attach mlx at pci with mlx_pci
file dev/pci/mlx_pci.c mlx_pci
# DPT EATA SCSI controllers
attach dpt at pci with dpt_pci
file dev/pci/dpt_pci.c dpt_pci

619
sys/dev/pci/mlx_pci.c Normal file
View File

@ -0,0 +1,619 @@
/* $NetBSD: mlx_pci.c,v 1.1 2001/02/04 17:05:12 ad Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Andrew Doran.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1999 Michael Smith
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from FreeBSD: mlx_pci.c,v 1.4.2.4 2000/10/28 10:48:09 msmith Exp
*/
/*
* PCI front-end for the mlx(4) driver.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <sys/queue.h>
#include <sys/callout.h>
#include <machine/endian.h>
#include <machine/bus.h>
#include <dev/ic/mlxreg.h>
#include <dev/ic/mlxio.h>
#include <dev/ic/mlxvar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcidevs.h>
static void mlx_pci_attach(struct device *, struct device *, void *);
static int mlx_pci_match(struct device *, struct cfdata *, void *);
static const struct mlx_pci_ident *mlx_pci_findmpi(struct pci_attach_args *);
static int mlx_v3_submit(struct mlx_softc *, struct mlx_ccb *);
static int mlx_v3_findcomplete(struct mlx_softc *, u_int *, u_int *);
static void mlx_v3_intaction(struct mlx_softc *, int);
static int mlx_v3_fw_handshake(struct mlx_softc *, int *, int *, int *);
static int mlx_v4_submit(struct mlx_softc *, struct mlx_ccb *);
static int mlx_v4_findcomplete(struct mlx_softc *, u_int *, u_int *);
static void mlx_v4_intaction(struct mlx_softc *, int);
static int mlx_v4_fw_handshake(struct mlx_softc *, int *, int *, int *);
static int mlx_v5_submit(struct mlx_softc *, struct mlx_ccb *);
static int mlx_v5_findcomplete(struct mlx_softc *, u_int *, u_int *);
static void mlx_v5_intaction(struct mlx_softc *, int);
static int mlx_v5_fw_handshake(struct mlx_softc *, int *, int *, int *);
struct mlx_pci_ident {
u_short mpi_vendor;
u_short mpi_product;
u_short mpi_subvendor;
u_short mpi_subproduct;
int mpi_iftype;
} static const mlx_pci_ident[] = {
{
PCI_VENDOR_MYLEX,
PCI_PRODUCT_MYLEX_RAID_V2,
0x0000,
0x0000,
2,
},
{
PCI_VENDOR_MYLEX,
PCI_PRODUCT_MYLEX_RAID_V3,
0x0000,
0x0000,
3,
},
{
PCI_VENDOR_MYLEX,
PCI_PRODUCT_MYLEX_RAID_V4,
0x0000,
0x0000,
4,
},
{
PCI_VENDOR_DEC,
PCI_PRODUCT_DEC_SWXCR,
PCI_VENDOR_MYLEX,
PCI_PRODUCT_MYLEX_RAID_V5,
5,
},
};
struct cfattach mlx_pci_ca = {
sizeof(struct mlx_softc), mlx_pci_match, mlx_pci_attach
};
/*
* Try to find a `mlx_pci_ident' entry corresponding to this board.
*/
static const struct mlx_pci_ident *
mlx_pci_findmpi(struct pci_attach_args *pa)
{
const struct mlx_pci_ident *mpi, *maxmpi;
pcireg_t reg;
mpi = mlx_pci_ident;
maxmpi = mpi + sizeof(mlx_pci_ident) / sizeof(mlx_pci_ident[0]);
for (; mpi < maxmpi; mpi++) {
if (PCI_VENDOR(pa->pa_id) != mpi->mpi_vendor ||
PCI_PRODUCT(pa->pa_id) != mpi->mpi_product)
continue;
if (mpi->mpi_subvendor == 0x0000)
return (mpi);
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
if (PCI_VENDOR(reg) == mpi->mpi_subvendor &&
PCI_PRODUCT(reg) == mpi->mpi_subproduct)
return (mpi);
}
return (NULL);
}
/*
* Match a supported board.
*/
static int
mlx_pci_match(struct device *parent, struct cfdata *cfdata, void *aux)
{
return (mlx_pci_findmpi(aux) != NULL);
}
/*
* Attach a supported board.
*/
static void
mlx_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa;
struct mlx_softc *mlx;
pci_chipset_tag_t pc;
pci_intr_handle_t ih;
pcireg_t reg;
const char *intrstr;
int ior, memr, i;
const struct mlx_pci_ident *mpi;
mlx = (struct mlx_softc *)self;
pa = aux;
pc = pa->pa_pc;
mpi = mlx_pci_findmpi(aux);
mlx->mlx_dmat = pa->pa_dmat;
mlx->mlx_iftype = mpi->mpi_iftype;
printf(": Mylex RAID (v%d interface)\n", mpi->mpi_iftype);
/*
* Map the PCI register window.
*/
memr = -1;
ior = -1;
for (i = 0x10; i <= 0x14; i += 4) {
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
ior = i;
} else {
if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
memr = i;
}
}
if (memr != -1)
if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
&mlx->mlx_iot, &mlx->mlx_ioh, NULL, NULL))
memr = -1;
if (ior != -1)
if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
&mlx->mlx_iot, &mlx->mlx_ioh, NULL, NULL))
ior = -1;
if (memr == -1 && ior == -1) {
printf("%s: can't map i/o or memory space\n", self->dv_xname);
return;
}
/* Enable the device. */
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
reg | PCI_COMMAND_MASTER_ENABLE);
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &ih)) {
printf("%s: can't map interrupt\n", self->dv_xname);
return;
}
intrstr = pci_intr_string(pc, ih);
mlx->mlx_ih = pci_intr_establish(pc, ih, IPL_BIO, mlx_intr, mlx);
if (mlx->mlx_ih == NULL) {
printf("%s: can't establish interrupt", self->dv_xname);
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
return;
}
/* Select linkage based on controller interface type. */
switch (mlx->mlx_iftype) {
case 2:
case 3:
mlx->mlx_submit = mlx_v3_submit;
mlx->mlx_findcomplete = mlx_v3_findcomplete;
mlx->mlx_intaction = mlx_v3_intaction;
mlx->mlx_fw_handshake = mlx_v3_fw_handshake;
break;
case 4:
mlx->mlx_submit = mlx_v4_submit;
mlx->mlx_findcomplete = mlx_v4_findcomplete;
mlx->mlx_intaction = mlx_v4_intaction;
mlx->mlx_fw_handshake = mlx_v4_fw_handshake;
break;
case 5:
mlx->mlx_submit = mlx_v5_submit;
mlx->mlx_findcomplete = mlx_v5_findcomplete;
mlx->mlx_intaction = mlx_v5_intaction;
mlx->mlx_fw_handshake = mlx_v5_fw_handshake;
break;
}
mlx_init(mlx, intrstr);
}
/*
* ================= V3 interface linkage =================
*/
/*
* Try to give (mc) to the controller. Returns 1 if successful, 0 on
* failure (the controller is not ready to take a command).
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v3_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
{
/* Ready for our command? */
if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_FULL) == 0) {
/* Copy mailbox data to window. */
bus_space_write_region_1(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V3REG_MAILBOX, mc->mc_mbox, MLX_V3_MAILBOX_LEN);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V3REG_MAILBOX, MLX_V3_MAILBOX_LEN,
BUS_SPACE_BARRIER_WRITE);
/* Post command. */
mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_FULL);
return (1);
}
return (0);
}
/*
* See if a command has been completed, if so acknowledge its completion and
* recover the slot number and status code.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v3_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
{
/* Status available? */
if ((mlx_inb(mlx, MLX_V3REG_ODB) & MLX_V3_ODB_SAVAIL) != 0) {
*slot = mlx_inb(mlx, MLX_V3REG_STATUS_IDENT);
*status = mlx_inw(mlx, MLX_V3REG_STATUS);
/* Acknowledge completion. */
mlx_outb(mlx, MLX_V3REG_ODB, MLX_V3_ODB_SAVAIL);
mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_SACK);
return (1);
}
return (0);
}
/*
* Enable/disable interrupts as requested. (No acknowledge required)
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static void
mlx_v3_intaction(struct mlx_softc *mlx, int action)
{
mlx_outb(mlx, MLX_V3REG_IE, action != 0);
}
/*
* Poll for firmware error codes during controller initialisation.
*
* Returns 0 if initialisation is complete, 1 if still in progress but no
* error has been fetched, 2 if an error has been retrieved.
*/
static int
mlx_v3_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
{
u_int8_t fwerror;
/* First time around, clear any hardware completion status. */
if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
mlx_outb(mlx, MLX_V3REG_IDB, MLX_V3_IDB_SACK);
DELAY(1000);
mlx->mlx_flags |= MLXF_FW_INITTED;
}
/* Init in progress? */
if ((mlx_inb(mlx, MLX_V3REG_IDB) & MLX_V3_IDB_INIT_BUSY) == 0)
return (0);
/* Test error value. */
fwerror = mlx_inb(mlx, MLX_V3REG_FWERROR);
if ((fwerror & MLX_V3_FWERROR_PEND) == 0)
return (1);
/* Mask status pending bit, fetch status. */
*error = fwerror & ~MLX_V3_FWERROR_PEND;
*param1 = mlx_inb(mlx, MLX_V3REG_FWERROR_PARAM1);
*param2 = mlx_inb(mlx, MLX_V3REG_FWERROR_PARAM2);
/* Acknowledge. */
mlx_outb(mlx, MLX_V3REG_FWERROR, 0);
return (2);
}
/*
* ================= V4 interface linkage =================
*/
/*
* Try to give (mc) to the controller. Returns 1 if successful, 0 on
* failure (the controller is not ready to take a command).
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v4_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
{
/* Ready for our command? */
if ((mlx_inl(mlx, MLX_V4REG_IDB) & MLX_V4_IDB_FULL) == 0) {
/* Copy mailbox data to window. */
bus_space_write_region_4(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V4REG_MAILBOX, mc->mc_mbox, MLX_V4_MAILBOX_LEN >> 2);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V4REG_MAILBOX, MLX_V4_MAILBOX_LEN,
BUS_SPACE_BARRIER_WRITE);
/* Post command. */
mlx_outl(mlx, MLX_V4REG_IDB, MLX_V4_IDB_HWMBOX_CMD);
return (1);
}
return (0);
}
/*
* See if a command has been completed, if so acknowledge its completion and
* recover the slot number and status code.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v4_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
{
/* Status available? */
if ((mlx_inl(mlx, MLX_V4REG_ODB) & MLX_V4_ODB_HWSAVAIL) != 0) {
*slot = mlx_inb(mlx, MLX_V4REG_STATUS_IDENT);
*status = mlx_inw(mlx, MLX_V4REG_STATUS);
/* Acknowledge completion. */
mlx_outl(mlx, MLX_V4REG_ODB, MLX_V4_ODB_HWMBOX_ACK);
mlx_outl(mlx, MLX_V4REG_IDB, MLX_V4_IDB_SACK);
return (1);
}
return (0);
}
/*
* Enable/disable interrupts as requested.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static void
mlx_v4_intaction(struct mlx_softc *mlx, int action)
{
u_int32_t ier;
if (!action)
ier = MLX_V4_IE_MASK | MLX_V4_IE_DISINT;
else
ier = MLX_V4_IE_MASK & ~MLX_V4_IE_DISINT;
mlx_outl(mlx, MLX_V4REG_IE, ier);
}
/*
* Poll for firmware error codes during controller initialisation.
*
* Returns 0 if initialisation is complete, 1 if still in progress but no
* error has been fetched, 2 if an error has been retrieved.
*/
static int
mlx_v4_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
{
u_int8_t fwerror;
/* First time around, clear any hardware completion status. */
if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
mlx_outl(mlx, MLX_V4REG_IDB, MLX_V4_IDB_SACK);
DELAY(1000);
mlx->mlx_flags |= MLXF_FW_INITTED;
}
/* Init in progress? */
if ((mlx_inl(mlx, MLX_V4REG_IDB) & MLX_V4_IDB_INIT_BUSY) == 0)
return (0);
/* Test error value */
fwerror = mlx_inb(mlx, MLX_V4REG_FWERROR);
if ((fwerror & MLX_V4_FWERROR_PEND) == 0)
return (1);
/* Mask status pending bit, fetch status. */
*error = fwerror & ~MLX_V4_FWERROR_PEND;
*param1 = mlx_inb(mlx, MLX_V4REG_FWERROR_PARAM1);
*param2 = mlx_inb(mlx, MLX_V4REG_FWERROR_PARAM2);
/* Acknowledge. */
mlx_outb(mlx, MLX_V4REG_FWERROR, 0);
return (2);
}
/*
* ================= V5 interface linkage =================
*/
/*
* Try to give (mc) to the controller. Returns 1 if successful, 0 on failure
* (the controller is not ready to take a command).
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v5_submit(struct mlx_softc *mlx, struct mlx_ccb *mc)
{
/* Ready for our command? */
if ((mlx_inb(mlx, MLX_V5REG_IDB) & MLX_V5_IDB_EMPTY) != 0) {
/* Copy mailbox data to window. */
bus_space_write_region_4(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V5REG_MAILBOX, mc->mc_mbox, MLX_V5_MAILBOX_LEN >> 2);
bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh,
MLX_V5REG_MAILBOX, MLX_V5_MAILBOX_LEN,
BUS_SPACE_BARRIER_WRITE);
/* Post command */
mlx_outb(mlx, MLX_V5REG_IDB, MLX_V5_IDB_HWMBOX_CMD);
return (1);
}
return (0);
}
/*
* See if a command has been completed, if so acknowledge its completion and
* recover the slot number and status code.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static int
mlx_v5_findcomplete(struct mlx_softc *mlx, u_int *slot, u_int *status)
{
/* Status available? */
if ((mlx_inb(mlx, MLX_V5REG_ODB) & MLX_V5_ODB_HWSAVAIL) != 0) {
*slot = mlx_inb(mlx, MLX_V5REG_STATUS_IDENT);
*status = mlx_inw(mlx, MLX_V5REG_STATUS);
/* Acknowledge completion. */
mlx_outb(mlx, MLX_V5REG_ODB, MLX_V5_ODB_HWMBOX_ACK);
mlx_outb(mlx, MLX_V5REG_IDB, MLX_V5_IDB_SACK);
return (1);
}
return (0);
}
/*
* Enable/disable interrupts as requested.
*
* Must be called at splbio or in a fashion that prevents reentry.
*/
static void
mlx_v5_intaction(struct mlx_softc *mlx, int action)
{
u_int8_t ier;
if (!action)
ier = 0xff & MLX_V5_IE_DISINT;
else
ier = 0xff & ~MLX_V5_IE_DISINT;
mlx_outb(mlx, MLX_V5REG_IE, ier);
}
/*
* Poll for firmware error codes during controller initialisation.
*
* Returns 0 if initialisation is complete, 1 if still in progress but no
* error has been fetched, 2 if an error has been retrieved.
*/
static int
mlx_v5_fw_handshake(struct mlx_softc *mlx, int *error, int *param1, int *param2)
{
u_int8_t fwerror;
/* First time around, clear any hardware completion status. */
if ((mlx->mlx_flags & MLXF_FW_INITTED) == 0) {
mlx_outb(mlx, MLX_V5REG_IDB, MLX_V5_IDB_SACK);
DELAY(1000);
mlx->mlx_flags |= MLXF_FW_INITTED;
}
/* Init in progress? */
if ((mlx_inb(mlx, MLX_V5REG_IDB) & MLX_V5_IDB_INIT_DONE) != 0)
return (0);
/* Test for error value. */
fwerror = mlx_inb(mlx, MLX_V5REG_FWERROR);
if ((fwerror & MLX_V5_FWERROR_PEND) == 0)
return (1);
/* Mask status pending bit, fetch status. */
*error = fwerror & ~MLX_V5_FWERROR_PEND;
*param1 = mlx_inb(mlx, MLX_V5REG_FWERROR_PARAM1);
*param2 = mlx_inb(mlx, MLX_V5REG_FWERROR_PARAM2);
/* Acknowledge. */
mlx_outb(mlx, MLX_V5REG_FWERROR, 0xff);
return (2);
}