Use uint32_t rather than int for spifi registers.
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tsutsui
parent
044037dd26
commit
8cf78c8c6c
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@ -1,4 +1,4 @@
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/* $NetBSD: spifireg.h,v 1.1 2000/10/30 10:07:35 tsubai Exp $ */
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/* $NetBSD: spifireg.h,v 1.2 2006/08/27 08:56:03 tsutsui Exp $ */
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/*-
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* Copyright (c) 2000 Tsubai Masanari. All rights reserved.
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@ -27,53 +27,53 @@
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*/
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struct spifi_reg {
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volatile int spstat; /* RO: SPIFI state */
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volatile int cmlen; /* RW: Command/message length */
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volatile int cmdpage; /* RW: Command page */
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volatile int count_hi; /* RW: Data count (high) */
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volatile int count_mid; /* RW: (mid) */
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volatile int count_low; /* RW: (low) */
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volatile int svptr_hi; /* RO: Saved data pointer (high)*/
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volatile int svptr_mid; /* RO: (mid) */
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volatile int svptr_low; /* RO: (low) */
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volatile int intr; /* RW: Processor interrupt */
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volatile int imask; /* RW: Processor interrupt mask */
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volatile int prctrl; /* RW: Processor control */
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volatile int prstat; /* RO: Processor status */
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volatile int init_status; /* RO: Initiator status */
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volatile int fifoctrl; /* RW: FIFO control */
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volatile int fifodata; /* RW: FIFO data */
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volatile int config; /* RW: Configuration */
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volatile int data_xfer; /* RW: Data transfer */
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volatile int autocmd; /* RW: Auto command control */
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volatile int autostat; /* RW: Auto status control */
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volatile int resel; /* RW: Reselection */
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volatile int select; /* RW: Selection */
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volatile int prcmd; /* WO: Processor command */
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volatile int auxctrl; /* RW: Aux control */
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volatile int autodata; /* RW: Auto data control */
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volatile int loopctrl; /* RW: Loopback control */
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volatile int loopdata; /* RW: Loopback data */
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volatile int identify; /* WO: Identify (?) */
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volatile int complete; /* WO: Command complete (?) */
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volatile int scsi_status; /* WO: SCSI status (?) */
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volatile int data; /* RW: Data register (?) */
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volatile int icond; /* RO: Interrupt condition */
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volatile int fastwide; /* RW: Fast/wide enable */
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volatile int exctrl; /* RW: Extended control */
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volatile int exstat; /* RW: Extended status */
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volatile int test; /* RW: SPIFI test register */
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volatile int quematch; /* RW: Queue match */
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volatile int quecode; /* RW: Queue code */
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volatile int quetag; /* RW: Queue tag */
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volatile int quepage; /* RW: Queue page */
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int image[88]; /* (image of the above) */
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volatile uint32_t spstat; /* RO: SPIFI state */
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volatile uint32_t cmlen; /* RW: Command/message length */
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volatile uint32_t cmdpage; /* RW: Command page */
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volatile uint32_t count_hi; /* RW: Data count (high) */
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volatile uint32_t count_mid; /* RW: (mid) */
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volatile uint32_t count_low; /* RW: (low) */
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volatile uint32_t svptr_hi; /* RO: Saved data pointer (high)*/
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volatile uint32_t svptr_mid; /* RO: (mid) */
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volatile uint32_t svptr_low; /* RO: (low) */
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volatile uint32_t intr; /* RW: Processor interrupt */
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volatile uint32_t imask; /* RW: Processor interrupt mask */
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volatile uint32_t prctrl; /* RW: Processor control */
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volatile uint32_t prstat; /* RO: Processor status */
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volatile uint32_t init_status; /* RO: Initiator status */
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volatile uint32_t fifoctrl; /* RW: FIFO control */
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volatile uint32_t fifodata; /* RW: FIFO data */
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volatile uint32_t config; /* RW: Configuration */
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volatile uint32_t data_xfer; /* RW: Data transfer */
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volatile uint32_t autocmd; /* RW: Auto command control */
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volatile uint32_t autostat; /* RW: Auto status control */
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volatile uint32_t resel; /* RW: Reselection */
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volatile uint32_t select; /* RW: Selection */
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volatile uint32_t prcmd; /* WO: Processor command */
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volatile uint32_t auxctrl; /* RW: Aux control */
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volatile uint32_t autodata; /* RW: Auto data control */
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volatile uint32_t loopctrl; /* RW: Loopback control */
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volatile uint32_t loopdata; /* RW: Loopback data */
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volatile uint32_t identify; /* WO: Identify (?) */
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volatile uint32_t complete; /* WO: Command complete (?) */
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volatile uint32_t scsi_status; /* WO: SCSI status (?) */
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volatile uint32_t data; /* RW: Data register (?) */
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volatile uint32_t icond; /* RO: Interrupt condition */
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volatile uint32_t fastwide; /* RW: Fast/wide enable */
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volatile uint32_t exctrl; /* RW: Extended control */
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volatile uint32_t exstat; /* RW: Extended status */
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volatile uint32_t test; /* RW: SPIFI test register */
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volatile uint32_t quematch; /* RW: Queue match */
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volatile uint32_t quecode; /* RW: Queue code */
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volatile uint32_t quetag; /* RW: Queue tag */
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volatile uint32_t quepage; /* RW: Queue page */
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uint32_t image[88]; /* (image of the above) */
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struct {
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volatile int cdb[12]; /* RW: Command descriptor block */
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volatile int quecode; /* RW: Queue code */
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volatile int quetag; /* RW: Queue tag */
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volatile int idmsg; /* RW: Identify message */
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volatile int status; /* RW: SCSI status */
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volatile uint32_t cdb[12]; /* RW: Command descriptor block */
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volatile uint32_t quecode; /* RW: Queue code */
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volatile uint32_t quetag; /* RW: Queue tag */
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volatile uint32_t idmsg; /* RW: Identify message */
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volatile uint32_t status; /* RW: SCSI status */
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} cmbuf[8];
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};
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