Process assigned clock parents and rates on clock provider nodes.
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8434fb2752
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8baf3a2138
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@ -1,4 +1,4 @@
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/* $NetBSD: fdt_clock.c,v 1.2 2018/06/10 13:26:29 jmcneill Exp $ */
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/* $NetBSD: fdt_clock.c,v 1.3 2018/06/12 10:28:55 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fdt_clock.c,v 1.2 2018/06/10 13:26:29 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fdt_clock.c,v 1.3 2018/06/12 10:28:55 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -36,6 +36,8 @@ __KERNEL_RCSID(0, "$NetBSD: fdt_clock.c,v 1.2 2018/06/10 13:26:29 jmcneill Exp $
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#include <libfdt.h>
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#include <dev/fdt/fdtvar.h>
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#include <dev/clk/clk_backend.h>
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struct fdtbus_clock_controller {
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device_t cc_dev;
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int cc_phandle;
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@ -60,6 +62,8 @@ fdtbus_register_clock_controller(device_t dev, int phandle,
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cc->cc_next = fdtbus_cc;
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fdtbus_cc = cc;
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fdtbus_clock_assign(phandle);
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return 0;
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}
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@ -77,27 +81,19 @@ fdtbus_get_clock_controller(int phandle)
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return NULL;
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}
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struct clk *
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fdtbus_clock_get_index(int phandle, u_int index)
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static struct clk *
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fdtbus_clock_get_index_prop(int phandle, u_int index, const char *prop)
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{
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struct fdtbus_clock_controller *cc;
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struct clk *clk = NULL;
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uint32_t *clocks = NULL;
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uint32_t *p;
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const u_int *p;
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u_int n, clock_cells;
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int len, resid;
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len = OF_getproplen(phandle, "clocks");
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if (len <= 0)
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p = fdtbus_get_prop(phandle, prop, &len);
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if (p == NULL)
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return NULL;
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clocks = kmem_alloc(len, KM_SLEEP);
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if (OF_getprop(phandle, "clocks", clocks, len) != len) {
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kmem_free(clocks, len);
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return NULL;
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}
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p = clocks;
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for (n = 0, resid = len; resid > 0; n++) {
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const int cc_phandle =
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fdtbus_get_phandle_from_native(be32toh(p[0]));
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@ -106,7 +102,7 @@ fdtbus_clock_get_index(int phandle, u_int index)
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if (n == index) {
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cc = fdtbus_get_clock_controller(cc_phandle);
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if (cc == NULL)
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goto done;
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break;
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clk = cc->cc_funcs->decode(cc->cc_dev,
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clock_cells > 0 ? &p[1] : NULL, clock_cells * 4);
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break;
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@ -115,33 +111,27 @@ fdtbus_clock_get_index(int phandle, u_int index)
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p += clock_cells + 1;
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}
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done:
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if (clocks)
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kmem_free(clocks, len);
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return clk;
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}
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struct clk *
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fdtbus_clock_get(int phandle, const char *clkname)
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fdtbus_clock_get_index(int phandle, u_int index)
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{
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return fdtbus_clock_get_index_prop(phandle, index, "clocks");
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}
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static struct clk *
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fdtbus_clock_get_prop(int phandle, const char *clkname, const char *prop)
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{
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struct clk *clk = NULL;
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char *clock_names = NULL;
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const char *p;
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u_int index;
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int len, resid;
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len = OF_getproplen(phandle, "clock-names");
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if (len <= 0)
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p = fdtbus_get_prop(phandle, prop, &len);
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if (p == NULL)
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return NULL;
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clock_names = kmem_alloc(len, KM_SLEEP);
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if (OF_getprop(phandle, "clock-names", clock_names, len) != len) {
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kmem_free(clock_names, len);
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return NULL;
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}
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p = clock_names;
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for (index = 0, resid = len; resid > 0; index++) {
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if (strcmp(p, clkname) == 0) {
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clk = fdtbus_clock_get_index(phandle, index);
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@ -151,12 +141,37 @@ fdtbus_clock_get(int phandle, const char *clkname)
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p += strlen(p) + 1;
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}
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if (clock_names)
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kmem_free(clock_names, len);
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return clk;
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}
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static u_int
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fdtbus_clock_count_prop(int phandle, const char *prop)
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{
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u_int n, clock_cells;
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int len, resid;
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const u_int *p = fdtbus_get_prop(phandle, prop, &len);
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if (p == NULL)
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return 0;
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for (n = 0, resid = len; resid > 0; n++) {
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const int cc_phandle =
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fdtbus_get_phandle_from_native(be32toh(p[0]));
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if (of_getprop_uint32(cc_phandle, "#clock-cells", &clock_cells))
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break;
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resid -= (clock_cells + 1) * 4;
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p += clock_cells + 1;
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}
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return n;
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}
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struct clk *
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fdtbus_clock_get(int phandle, const char *clkname)
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{
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return fdtbus_clock_get_prop(phandle, clkname, "clock-names");
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}
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/*
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* Search the DT for a clock by "clock-output-names" property.
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*
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@ -190,3 +205,51 @@ fdtbus_clock_byname(const char *clkname)
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return NULL;
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}
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/*
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* Apply assigned clock parents and rates.
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*
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* This is automatically called by fdtbus_register_clock_controller, so clock
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* drivers likely don't need to call this directly.
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*/
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void
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fdtbus_clock_assign(int phandle)
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{
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u_int index, rates_len;
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struct clk *clk, *clk_parent;
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int error;
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const u_int *rates = fdtbus_get_prop(phandle, "assigned-clock-rates", &rates_len);
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if (rates == NULL)
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rates_len = 0;
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const u_int nclocks = fdtbus_clock_count_prop(phandle, "assigned-clocks");
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for (index = 0; index < nclocks; index++) {
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clk = fdtbus_clock_get_index_prop(phandle, index, "assigned-clocks");
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if (clk == NULL) {
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aprint_debug("clk: assigned clock (%u) not found, skipping...\n", index);
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continue;
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}
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clk_parent = fdtbus_clock_get_index_prop(phandle, index, "assigned-clock-parents");
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if (clk_parent != NULL) {
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error = clk_set_parent(clk, clk_parent);
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if (error != 0) {
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aprint_error("clk: failed to set %s parent to %s, error %d\n",
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clk->name, clk_parent->name, error);
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}
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}
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if (rates_len >= sizeof(*rates)) {
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const u_int rate = be32dec(rates);
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if (rate != 0) {
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error = clk_set_rate(clk, rate);
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if (error != 0)
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aprint_error("clk: failed to set %s rate to %u Hz, error %d\n",
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clk->name, rate, error);
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}
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rates_len -= sizeof(*rates);
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}
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}
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: fdtvar.h,v 1.33 2018/06/10 13:26:29 jmcneill Exp $ */
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/* $NetBSD: fdtvar.h,v 1.34 2018/06/12 10:28:55 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -304,6 +304,7 @@ void fdtbus_dma_halt(struct fdtbus_dma *);
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struct clk * fdtbus_clock_get(int, const char *);
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struct clk * fdtbus_clock_get_index(int, u_int);
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struct clk * fdtbus_clock_byname(const char *);
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void fdtbus_clock_assign(int);
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struct fdtbus_reset *fdtbus_reset_get(int, const char *);
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struct fdtbus_reset *fdtbus_reset_get_index(int, u_int);
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