Port from newer gcc:

Add a "mem_noofs_operand" predicate and corresponding "w" constraint.
Use those instead of "memory_reg_operand"/"m" for some atomic instrinsic
patterns: casx (and friends) do not accept an offset from the pointer
register (they are synthetic instructions mapping to e.g. casxa [..]
ASI_P, ... and the opcode space encoding offsets in other instructions
is needed to encode the ASI here).

This fixes the build of gtk+-3.10.6 from pkgsrc on sparc64.

external/gpl3/gcc/dist/gcc/config/sparc/constraints.md

@@ -141,6 +141,10 @@
  "Memory reference for 'e' constraint floating-point register"
  (and (match_code "mem,reg")
       (match_test "memory_ok_for_ldd (op)")))
+  
+(define_memory_constraint "w"
+  "A memory with only a base register"
+  (match_operand 0 "mem_noofs_operand"))
 
 (define_constraint "Y"
  "The vector zero constant"

external/gpl3/gcc/dist/gcc/config/sparc/predicates.md

@@ -427,6 +427,9 @@
   (and (match_code "mem")
        (match_test "call_address_operand (XEXP (op, 0), mode)")))
 
+(define_predicate "mem_noofs_operand"
+  (and (match_code "mem")
+       (match_code "reg" "0")))
 
 ;; Predicates for operators.
 

external/gpl3/gcc/dist/gcc/config/sparc/sync.md

@@ -81,7 +81,7 @@
 
 (define_insn "*sync_compare_and_swap<mode>"
   [(set (match_operand:I48MODE 0 "register_operand" "=r")
-	(match_operand:I48MODE 1 "memory_reg_operand" "+m"))
+	(match_operand:I48MODE 1 "mem_noofs_operand" "+w"))
    (set (match_dup 1)
 	(unspec_volatile:I48MODE
 	  [(match_operand:I48MODE 2 "register_operand" "r")
@@ -93,7 +93,7 @@
 
 (define_insn "*sync_compare_and_swapdi_v8plus"
   [(set (match_operand:DI 0 "register_operand" "=h")
-	(match_operand:DI 1 "memory_reg_operand" "+m"))
+	(match_operand:DI 1 "mem_noofs_operand" "+w"))
    (set (match_dup 1)
 	(unspec_volatile:DI
 	  [(match_operand:DI 2 "register_operand" "h")