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Split out a PCI configuration space read function into a separate file 

so that we could use it in other sources.
This commit is contained in:
tsutsui 2008-03-01 18:13:02 +00:00
parent c85e5be217
commit 8b1c40bc08
4 changed files with 68 additions and 16 deletions
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4
sys/arch/cobalt/stand/boot/Makefile
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@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.13 2008/03/01 17:45:11 tsutsui Exp $
# $NetBSD: Makefile,v 1.14 2008/03/01 18:13:02 tsutsui Exp $
NOMAN= # defined
@ -72,7 +72,7 @@ PROG= boot
# common sources
SRCS+= start.S boot.c devopen.c conf.c clock.c bootinfo.c
SRCS+= prf.c com.c cons.c ns16550.c pciide.c tgets.c wdc.c wd.c
SRCS+= cache.c nif_tlp.c tlp.c
SRCS+= cache.c pci.c nif_tlp.c tlp.c
# XXX dev_net.c should really be in libsa, but it doesn't
# declare ip_convertaddr correctly.

18
sys/arch/cobalt/stand/boot/boot.c
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@ -1,4 +1,4 @@
/* $NetBSD: boot.c,v 1.11 2008/03/01 17:45:11 tsutsui Exp $ */
/* $NetBSD: boot.c,v 1.12 2008/03/01 18:13:02 tsutsui Exp $ */
/*-
* Copyright (c) 2003 The NetBSD Foundation, Inc.
@ -392,25 +392,17 @@ print_banner(unsigned int memsize)
u_int
read_board_id(void)
{
volatile uint32_t *pcicfg_addr, *pcicfg_data;
uint32_t reg;
u_int id;
uint32_t tag, reg;
#define PCIB_PCI_BUS 0
#define PCIB_PCI_DEV 9
#define PCIB_PCI_FUNC 0
#define PCIB_BOARD_ID_REG 0x94
#define COBALT_BOARD_ID(reg) ((reg & 0x000000f0) >> 4)
#define GT_BASE 0x14000000
pcicfg_addr = (uint32_t *)MIPS_PHYS_TO_KSEG1(GT_BASE + GT_PCICFG_ADDR);
pcicfg_data = (uint32_t *)MIPS_PHYS_TO_KSEG1(GT_BASE + GT_PCICFG_DATA);
*pcicfg_addr = PCICFG_ENABLE |
(PCIB_PCI_BUS << 16) | (PCIB_PCI_DEV << 11) | (PCIB_PCI_FUNC << 8) |
PCIB_BOARD_ID_REG;
reg = *pcicfg_data;
*pcicfg_addr = 0;
tag = (PCIB_PCI_BUS << 16) | (PCIB_PCI_DEV << 11) |
(PCIB_PCI_FUNC << 8);
reg = pcicfgread(tag, PCIB_BOARD_ID_REG);
return COBALT_BOARD_ID(reg);
}

7
sys/arch/cobalt/stand/boot/boot.h
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@ -1,4 +1,4 @@
/* $NetBSD: boot.h,v 1.7 2008/03/01 17:45:11 tsutsui Exp $ */
/* $NetBSD: boot.h,v 1.8 2008/03/01 18:13:02 tsutsui Exp $ */
/*-
* Copyright (c) 2003 The NetBSD Foundation, Inc.
@ -102,3 +102,8 @@ int tgets(char *);
void pdcache_wb(uint32_t, u_int);
void pdcache_inv(uint32_t, u_int);
void pdcache_wbinv(uint32_t, u_int);
/*
* pci
*/
uint32_t pcicfgread(uint32_t, uint32_t);

55
sys/arch/cobalt/stand/boot/pci.c Normal file
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@ -0,0 +1,55 @@
/* $NetBSD: pci.c,v 1.1 2008/03/01 18:13:02 tsutsui Exp $ */
/*
* Copyright (c) 2008 Izumi Tsutsui. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/param.h>
#include <lib/libsa/stand.h>
#include <lib/libkern/libkern.h>
#include <mips/cpuregs.h>
#include <cobalt/dev/gtreg.h>
#include "boot.h"
#define GT_BASE 0x14000000
uint32_t
pcicfgread(uint32_t tag, uint32_t off)
{
uint32_t reg;
volatile uint32_t *pcicfg_addr, *pcicfg_data;
pcicfg_addr = (uint32_t *)MIPS_PHYS_TO_KSEG1(GT_BASE + GT_PCICFG_ADDR);
pcicfg_data = (uint32_t *)MIPS_PHYS_TO_KSEG1(GT_BASE + GT_PCICFG_DATA);
*pcicfg_addr = PCICFG_ENABLE | tag | (off & ~3U);
reg = *pcicfg_data;
*pcicfg_addr = 0;
return reg;
}