Don't use cpsr_all/spsr_all with mrs, it doesn't take a mask.
This commit is contained in:
joerg
parent
bfacdd22be
commit
8b058f850e
@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc_asm_arm8.S,v 1.8 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: cpufunc_asm_arm8.S,v 1.9 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 1997 ARM Limited
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@ -65,7 +65,7 @@ ENTRY(arm8_clock_config)
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* addresses that are about to change.
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*/
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ENTRY(arm8_setttb)
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mrs r3, cpsr_all
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mrs r3, cpsr
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orr r2, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r2
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@ -176,7 +176,7 @@ ENTRY(arm8_cache_purgeID)
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mov r0, #0x00000000
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mrs r3, cpsr_all
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mrs r3, cpsr
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orr r2, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r2
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@ -248,7 +248,7 @@ ENTRY(arm8_cache_purgeID_E)
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* mcr p15, 0, rd, c7, c11, 1
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* mcr p15, 0, rd, c7, c7, 1
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*/
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mrs r3, cpsr_all
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mrs r3, cpsr
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orr r2, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r2
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mcr p15, 0, r0, c7, c11, 1 /* clean I+D single entry */
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc_asm_sa1.S,v 1.13 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: cpufunc_asm_sa1.S,v 1.14 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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@ -49,7 +49,7 @@
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*/
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ENTRY(sa1_setttb)
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#ifdef CACHE_CLEAN_BLOCK_INTR
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mrs r3, cpsr_all
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mrs r3, cpsr
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orr r2, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r2
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#else
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@ -146,7 +146,7 @@ _C_LABEL(sa1_cache_clean_size):
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#ifdef CACHE_CLEAN_BLOCK_INTR
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#define SA1_CACHE_CLEAN_BLOCK \
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mrs r3, cpsr_all ; \
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mrs r3, cpsr ; \
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orr r0, r3, #(I32_bit | F32_bit) ; \
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msr cpsr_all, r0
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc_asm_sa11x0.S,v 1.4 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: cpufunc_asm_sa11x0.S,v 1.5 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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@ -79,7 +79,7 @@ ENTRY(sa11x0_cpu_sleep)
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* re-enable clock switching before servicing interrupts.
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*/
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mrs r3, cpsr_all /* 6 */
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mrs r3, cpsr /* 6 */
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orr r2, r3, #(I32_bit|F32_bit) /* 7 */
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msr cpsr_all, r2 /* 8 */
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc_asm_xscale.S,v 1.21 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: cpufunc_asm_xscale.S,v 1.22 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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@ -133,7 +133,7 @@ END(xscale_control)
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*/
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ENTRY(xscale_setttb)
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#ifdef CACHE_CLEAN_BLOCK_INTR
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mrs r3, cpsr_all
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mrs r3, cpsr
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orr r2, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r2
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#else
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@ -273,7 +273,7 @@ _C_LABEL(xscale_minidata_clean_size):
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#ifdef CACHE_CLEAN_BLOCK_INTR
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#define XSCALE_CACHE_CLEAN_BLOCK \
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mrs r3, cpsr_all ; \
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mrs r3, cpsr ; \
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orr r0, r3, #(I32_bit | F32_bit) ; \
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msr cpsr_all, r0
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@ -1,4 +1,4 @@
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/* $NetBSD: fiq_subr.S,v 1.5 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: fiq_subr.S,v 1.6 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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@ -57,7 +57,7 @@
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cps #PSR_FIQ32_MODE
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#else
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#define SWITCH_TO_FIQ_MODE \
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mrs r2, cpsr_all ; \
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mrs r2, cpsr ; \
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mov r3, r2 ; \
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bic r2, r2, #(PSR_MODE) ; \
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orr r2, r2, #(PSR_FIQ32_MODE) ; \
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@ -1,4 +1,4 @@
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/* $NetBSD: exception.S,v 1.19 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: exception.S,v 1.20 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 1994-1997 Mark Brinicombe.
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@ -51,7 +51,7 @@
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#include <arm/locore.h>
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RCSID("$NetBSD: exception.S,v 1.19 2013/08/18 06:28:18 matt Exp $")
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RCSID("$NetBSD: exception.S,v 1.20 2013/12/02 18:36:10 joerg Exp $")
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.text
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.align 0
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@ -178,8 +178,8 @@ ASEND(data_abort_entry)
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* it like a Data Abort.
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*/
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ASENTRY_NP(address_exception_entry)
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mrs r1, cpsr_all
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mrs r2, spsr_all
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mrs r1, cpsr
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mrs r2, spsr
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mov r3, lr
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adr r0, .Laddress_exception_msg
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bl _C_LABEL(printf) /* XXX CLOBBERS LR!! */
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@ -1,4 +1,4 @@
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/* $NetBSD: spl.S,v 1.9 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: spl.S,v 1.10 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 1996-1998 Mark Brinicombe.
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@ -43,7 +43,7 @@
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#include <arm/locore.h>
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#include <arm/arm32/psl.h>
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RCSID("$NetBSD: spl.S,v 1.9 2013/08/18 06:28:18 matt Exp $")
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RCSID("$NetBSD: spl.S,v 1.10 2013/12/02 18:36:10 joerg Exp $")
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.text
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.align 0
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@ -61,7 +61,7 @@ ENTRY(raisespl)
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stmfd sp!, {r0, r1, r4, lr} /* Preserve registers */
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/* Disable interrupts */
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mrs r4, cpsr_all
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mrs r4, cpsr
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orr r2, r4, #(I32_bit)
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msr cpsr_c, r2
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@ -81,7 +81,7 @@ ENTRY(lowerspl)
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stmfd sp!, {r0, r1, r4, lr} /* Preserve registers */
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/* Disable interrupts */
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mrs r4, cpsr_all
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mrs r4, cpsr
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orr r2, r4, #(I32_bit)
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msr cpsr_c, r2
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@ -104,7 +104,7 @@ ENTRY(splx)
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stmfd sp!, {r0, r1, r4, lr}
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/* Disable interrupts */
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mrs r4, cpsr_all
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mrs r4, cpsr
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orr r2, r4, #(I32_bit)
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msr cpsr_c, r2
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@ -1,4 +1,4 @@
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/* $NetBSD: frame.h,v 1.36 2013/08/18 06:37:02 matt Exp $ */
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/* $NetBSD: frame.h,v 1.37 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 1994-1997 Mark Brinicombe.
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@ -351,7 +351,7 @@ LOCK_CAS_DEBUG_LOCALS
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sub sp, sp, #(TF_PC-TF_R0); /* Adjust the stack pointer */ \
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PUSHUSERREGS; /* Push the user mode registers */ \
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mov r0, r0; /* NOP for previous instruction */ \
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mrs r0, spsr_all; /* Get the SPSR */ \
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mrs r0, spsr; /* Get the SPSR */ \
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str r0, [sp, #-TF_R0]! /* Push the SPSR on the stack */
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/*
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@ -364,7 +364,7 @@ LOCK_CAS_DEBUG_LOCALS
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str lr, [sp, #-4]!; /* save SVC32 lr */ \
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str r6, [sp, #(TF_R6-TF_PC)]!; /* save callee-saved r6 */ \
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str r4, [sp, #(TF_R4-TF_R6)]!; /* save callee-saved r4 */ \
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mrs r0, cpsr_all; /* Get the CPSR */ \
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mrs r0, cpsr; /* Get the CPSR */ \
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str r0, [sp, #(-TF_R4)]! /* Push the CPSR on the stack */
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/*
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@ -378,7 +378,7 @@ LOCK_CAS_DEBUG_LOCALS
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str ip, [sp, #TF_SVC_SP]; \
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str lr, [sp, #TF_SVC_LR]; \
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str lr, [sp, #TF_PC]; \
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mrs rX, cpsr_all; /* Get the CPSR */ \
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mrs rX, cpsr; /* Get the CPSR */ \
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str rX, [sp, #TF_SPSR] /* save in trapframe */
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#define PUSHSWITCHFRAME1 \
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@ -394,13 +394,13 @@ LOCK_CAS_DEBUG_LOCALS
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#define PUSHSWITCHFRAME2 \
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strd r10, [sp, #TF_R10]; /* save r10 & r11 */ \
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strd r8, [sp, #TF_R8]; /* save r8 & r9 */ \
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mrs r0, cpsr_all; /* Get the CPSR */ \
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mrs r0, cpsr; /* Get the CPSR */ \
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str r0, [sp, #TF_SPSR] /* save in trapframe */
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#else
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#define PUSHSWITCHFRAME2 \
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add r0, sp, #TF_R8; /* get ptr to r8 and above */ \
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stmia r0, {r8-r11}; /* save rest of registers */ \
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mrs r0, cpsr_all; /* Get the CPSR */ \
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mrs r0, cpsr; /* Get the CPSR */ \
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str r0, [sp, #TF_SPSR] /* save in trapframe */
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#endif
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@ -469,7 +469,7 @@ LOCK_CAS_DEBUG_LOCALS
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sub sp, sp, #(TF_SVC_SP-TF_R0); /* Adjust the stack pointer */ \
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PUSHUSERREGS; /* Push the user mode registers */ \
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mov r0, r0; /* NOP for previous instruction */ \
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mrs r0, spsr_all; /* Get the SPSR */ \
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mrs r0, spsr; /* Get the SPSR */ \
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str r0, [sp, #-TF_R0]! /* Push the SPSR onto the stack */
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: iomd_irq.S,v 1.15 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: iomd_irq.S,v 1.16 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 1994-1998 Mark Brinicombe.
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@ -208,7 +208,7 @@ Lfind_highest_ipl:
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/* Update the IOMD irq masks */
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bl _C_LABEL(irq_setmasks)
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mrs r0, cpsr_all /* Enable IRQ's */
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mrs r0, cpsr /* Enable IRQ's */
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bic r0, r0, #I32_bit
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msr cpsr_all, r0
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@ -331,7 +331,7 @@ exitirq:
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#endif
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/* Kill IRQ's in preparation for exit */
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mrs r0, cpsr_all
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mrs r0, cpsr
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orr r0, r0, #(I32_bit)
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msr cpsr_all, r0
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@ -354,7 +354,7 @@ Lcurrent_mask:
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ENTRY(irq_setmasks)
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/* Disable interrupts */
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mrs r3, cpsr_all
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mrs r3, cpsr
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orr r1, r3, #(I32_bit)
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msr cpsr_all, r1
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@ -1,4 +1,4 @@
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/* $NetBSD: ofw_irq.S,v 1.14 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: ofw_irq.S,v 1.15 2013/12/02 18:36:10 joerg Exp $ */
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/*
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* Copyright (c) 1994-1998 Mark Brinicombe.
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@ -248,7 +248,7 @@ Lfind_highest_ipl:
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/* Update the irq masks */
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bl _C_LABEL(irq_setmasks)
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mrs r0, cpsr_all /* Enable IRQ's */
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mrs r0, cpsr /* Enable IRQ's */
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bic r0, r0, #I32_bit
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msr cpsr_all, r0
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@ -318,7 +318,7 @@ nextirq:
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bl _C_LABEL(dosoftints) /* Handle the soft interrupts */
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/* Kill IRQ's in preparation for exit */
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mrs r0, cpsr_all
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mrs r0, cpsr
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orr r0, r0, #(I32_bit)
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msr cpsr_all, r0
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@ -446,7 +446,7 @@ _C_LABEL(dotickgrovelling):
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str r1, [r0, #0] /* plug spsr */
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/* Sneak into SVC mode to get sp and lr */
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mrs r3, cpsr_all
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mrs r3, cpsr
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bic r3, r3, #(PSR_MODE)
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orr r3, r3, #(PSR_SVC32_MODE)
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msr cpsr_all, r3
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@ -1,4 +1,4 @@
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/* $NetBSD: sa11x0_irq.S,v 1.17 2013/08/18 06:28:18 matt Exp $ */
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/* $NetBSD: sa11x0_irq.S,v 1.18 2013/12/02 18:36:11 joerg Exp $ */
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/*
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* Copyright (c) 1998 Mark Brinicombe.
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@ -150,7 +150,7 @@ Lfind_highest_ipl:
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bl _C_LABEL(printf)
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ldmia sp!, {r0,r1,r2}
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#endif
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mrs r0, cpsr_all /* Enable IRQs */
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mrs r0, cpsr /* Enable IRQs */
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bic r0, r0, #I32_bit
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msr cpsr_all, r0
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@ -234,7 +234,7 @@ nextirq:
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#endif
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/* Kill IRQ's in preparation for exit */
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mrs r0, cpsr_all
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mrs r0, cpsr
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orr r0, r0, #(I32_bit)
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msr cpsr_all, r0
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@ -262,7 +262,7 @@ ENTRY(irq_setmasks)
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stmfd sp!, {r0, r1, r4, lr} /* Preserve registers */
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/* Disable interrupts */
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mrs r1, cpsr_all
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mrs r1, cpsr
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orr r3, r1, #(I32_bit)
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msr cpsr_all, r3
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@ -1,4 +1,4 @@
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/* $NetBSD: ixm1200_start.S,v 1.4 2011/01/31 06:28:04 matt Exp $ */
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/* $NetBSD: ixm1200_start.S,v 1.5 2013/12/02 18:36:11 joerg Exp $ */
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/*
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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@ -39,14 +39,14 @@
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.section .start,"ax",%progbits
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RCSID("$NetBSD: ixm1200_start.S,v 1.4 2011/01/31 06:28:04 matt Exp $")
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RCSID("$NetBSD: ixm1200_start.S,v 1.5 2013/12/02 18:36:11 joerg Exp $")
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.global _C_LABEL(ixm1200_start)
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_C_LABEL(ixm1200_start):
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/*
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* Disable IRQ and FIQ
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*/
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mrs r3, cpsr_all
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mrs r3, cpsr
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orr r1, r3, #(I32_bit | F32_bit)
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msr cpsr_all, r1
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.S,v 1.14 2013/08/26 15:31:44 matt Exp $ */
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/* $NetBSD: locore.S,v 1.15 2013/12/02 18:36:11 joerg Exp $ */
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/*
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* Copyright (C) 1994-1997 Mark Brinicombe
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@ -57,7 +57,7 @@ ENTRY_NP(kernel_text)
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ASENTRY_NP(start)
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/* Put the processer in SVC mode */
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mov r5, sp
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mrs r4, cpsr_all
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mrs r4, cpsr
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bic r4, r4, #(PSR_MODE)
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orr r4, r4, #(PSR_SVC32_MODE)
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msr cpsr_all, r4
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@ -255,7 +255,7 @@ ENTRY(dumpsys)
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stmfd sp!, {r0-r7, lr}
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/* push the status bits onto the stack */
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mrs r0, cpsr_all
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mrs r0, cpsr
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stmfd sp!, {r0}
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/* fill in dumppcb */
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@ -1,4 +1,4 @@
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/* $NetBSD: softintr.c,v 1.14 2008/04/28 20:23:21 martin Exp $ */
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/* $NetBSD: softintr.c,v 1.15 2013/12/02 18:36:11 joerg Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: softintr.c,v 1.14 2008/04/28 20:23:21 martin Exp $");
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__KERNEL_RCSID(0, "$NetBSD: softintr.c,v 1.15 2013/12/02 18:36:11 joerg Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
@ -115,7 +115,7 @@ softintr_schedule(void *cookie)
|
||||
sh->sh_hlink = NULL;
|
||||
|
||||
#ifdef __GNUC__
|
||||
__asm volatile("mrs %0, cpsr_all\n orr r1, %0, %1\n msr cpsr_all, r1" :
|
||||
__asm volatile("mrs %0, cpsr\n orr r1, %0, %1\n msr cpsr_a;;, r1" :
|
||||
"=r" (saved_cpsr) : "i" (I32_bit) : "r1");
|
||||
#else
|
||||
saved_cpsr = SetCPSR(I32_bit, I32_bit);
|
||||
@ -156,7 +156,7 @@ softintr_dispatch(int s)
|
||||
while (1) {
|
||||
/* Protect list operation from interrupts */
|
||||
#ifdef __GNUC__
|
||||
__asm volatile("mrs %0, cpsr_all\n orr r1, %0, %1\n"
|
||||
__asm volatile("mrs %0, cpsr\n orr r1, %0, %1\n"
|
||||
" msr cpsr_all, r1" : "=r" (saved_cpsr) :
|
||||
"i" (I32_bit) : "r1");
|
||||
#else
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: spl.S,v 1.6 2008/01/08 02:07:55 matt Exp $ */
|
||||
/* $NetBSD: spl.S,v 1.7 2013/12/02 18:36:11 joerg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1996-1998 Mark Brinicombe.
|
||||
@ -52,7 +52,7 @@ Lcurrent_spl_level:
|
||||
ENTRY(raisespl)
|
||||
stmfd sp!, {r4}
|
||||
/* Disable interrupts */
|
||||
mrs r4, cpsr_all
|
||||
mrs r4, cpsr
|
||||
orr r1, r4, #(I32_bit)
|
||||
msr cpsr_all, r1
|
||||
|
||||
@ -75,7 +75,7 @@ raisespl_exit:
|
||||
ENTRY(lowerspl)
|
||||
stmfd sp!, {r4}
|
||||
/* Disable interrupts */
|
||||
mrs r4, cpsr_all
|
||||
mrs r4, cpsr
|
||||
orr r1, r4, #(I32_bit)
|
||||
msr cpsr_all, r1
|
||||
|
||||
@ -104,7 +104,7 @@ lowerspl_exit:
|
||||
ENTRY(splx)
|
||||
stmfd sp!, {r4}
|
||||
/* Disable interrupts */
|
||||
mrs r4, cpsr_all
|
||||
mrs r4, cpsr
|
||||
orr r1, r4, #(I32_bit)
|
||||
msr cpsr_all, r1
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: isa_irq.S,v 1.15 2013/08/12 17:32:03 matt Exp $ */
|
||||
/* $NetBSD: isa_irq.S,v 1.16 2013/12/02 18:36:11 joerg Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 1997
|
||||
@ -206,7 +206,7 @@ ASENTRY_NP(irq_entry)
|
||||
/* Update the IOMD irq masks */
|
||||
bl _C_LABEL(irq_setmasks)
|
||||
|
||||
mrs r0, cpsr_all /* Enable IRQ's */
|
||||
mrs r0, cpsr /* Enable IRQ's */
|
||||
bic r0, r0, #I32_bit
|
||||
msr cpsr_all, r0
|
||||
|
||||
@ -274,7 +274,7 @@ nextirq:
|
||||
#endif
|
||||
|
||||
/* Kill IRQ's in preparation for exit */
|
||||
mrs r0, cpsr_all
|
||||
mrs r0, cpsr
|
||||
orr r0, r0, #(I32_bit)
|
||||
msr cpsr_all, r0
|
||||
|
||||
@ -304,7 +304,7 @@ AST_ALIGNMENT_FAULT_LOCALS
|
||||
|
||||
ENTRY(irq_setmasks)
|
||||
/* Disable interrupts */
|
||||
mrs r3, cpsr_all
|
||||
mrs r3, cpsr
|
||||
orr r1, r3, #(I32_bit)
|
||||
msr cpsr_all, r1
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: zbsdmod.c,v 1.8 2011/12/16 14:17:41 nonaka Exp $ */
|
||||
/* $NetBSD: zbsdmod.c,v 1.9 2013/12/02 18:36:11 joerg Exp $ */
|
||||
/* $OpenBSD: zbsdmod.c,v 1.7 2005/05/02 02:45:29 uwe Exp $ */
|
||||
|
||||
/*
|
||||
@ -152,7 +152,7 @@ elf32bsdboot(void)
|
||||
esymp = (vaddr_t *)phdr[i].p_vaddr;
|
||||
}
|
||||
|
||||
__asm volatile ("mrs %0, cpsr_all" : "=r" (cpsr));
|
||||
__asm volatile ("mrs %0, cpsr" : "=r" (cpsr));
|
||||
cpsr |= 0xc0; /* set FI */
|
||||
__asm volatile ("msr cpsr_all, %0" :: "r" (cpsr));
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user