support multicast and promiscious mode
correct mbuf queue bugs, cleanup some extra symbols try to let link0/link1 change while running, will this work?
This commit is contained in:
deraadt
parent
c83756b171
commit
8aca9c1cbc
|
|
@ -21,7 +21,7 @@
|
|||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: if_ep.c,v 1.29 1994/04/13 06:09:00 deraadt Exp $
|
||||
* $Id: if_ep.c,v 1.30 1994/04/15 10:51:28 deraadt Exp $
|
||||
*/
|
||||
|
||||
#include "bpfilter.h"
|
||||
|
|
@ -104,6 +104,8 @@ static void epread __P((struct ep_softc *));
|
|||
static void epmbuffill __P((struct ep_softc *));
|
||||
static void epmbufempty __P((struct ep_softc *));
|
||||
static void epstop __P((struct ep_softc *));
|
||||
static void epsetfilter __P((struct ep_softc *sc));
|
||||
static void epsetlink __P((struct ep_softc *sc));
|
||||
|
||||
static u_short epreadeeprom __P((int id_port, int offset));
|
||||
static int epbusyeeprom __P((struct ep_softc *));
|
||||
|
|
@ -316,7 +318,8 @@ epattach(parent, self, aux)
|
|||
ifp->if_unit = sc->sc_dev.dv_unit;
|
||||
ifp->if_name = epcd.cd_name;
|
||||
ifp->if_mtu = ETHERMTU;
|
||||
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS;
|
||||
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS |
|
||||
IFF_MULTICAST;
|
||||
ifp->if_output = ether_output;
|
||||
ifp->if_start = epstart;
|
||||
ifp->if_ioctl = epioctl;
|
||||
|
|
@ -395,8 +398,40 @@ epinit(sc)
|
|||
outw(BASE + EP_COMMAND, SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE |
|
||||
S_TX_COMPLETE | S_TX_AVAIL);
|
||||
|
||||
outw(BASE + EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
|
||||
FIL_GROUP | FIL_BRDCST);
|
||||
epsetfilter(sc);
|
||||
epsetlink(sc);
|
||||
|
||||
outw(BASE + EP_COMMAND, RX_ENABLE);
|
||||
outw(BASE + EP_COMMAND, TX_ENABLE);
|
||||
|
||||
ifp->if_flags |= IFF_RUNNING;
|
||||
ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
|
||||
sc->tx_start_thresh = 20; /* probably a good starting point. */
|
||||
/* Store up a bunch of mbuf's for use later. (MAX_MBS). */
|
||||
epmbuffill(sc);
|
||||
|
||||
epstart(ifp);
|
||||
splx(s);
|
||||
}
|
||||
|
||||
static void
|
||||
epsetfilter(sc)
|
||||
register struct ep_softc *sc;
|
||||
{
|
||||
register struct ifnet *ifp = &sc->ep_ac.ac_if;
|
||||
|
||||
GO_WINDOW(1); /* Window 1 is operating window */
|
||||
outw(BASE + EP_COMMAND, SET_RX_FILTER |
|
||||
FIL_INDIVIDUAL | FIL_BRDCST |
|
||||
((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0 ) |
|
||||
((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0 ));
|
||||
}
|
||||
|
||||
static void
|
||||
epsetlink(sc)
|
||||
register struct ep_softc *sc;
|
||||
{
|
||||
register struct ifnet *ifp = &sc->ep_ac.ac_if;
|
||||
|
||||
/*
|
||||
* you can `ifconfig (link0|-link0) ep0' to get the following
|
||||
|
|
@ -422,24 +457,6 @@ epinit(sc)
|
|||
GO_WINDOW(1);
|
||||
}
|
||||
}
|
||||
|
||||
outw(BASE + EP_COMMAND, RX_ENABLE);
|
||||
outw(BASE + EP_COMMAND, TX_ENABLE);
|
||||
|
||||
ifp->if_flags |= IFF_RUNNING;
|
||||
ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
|
||||
sc->tx_start_thresh = 20; /* probably a good starting point. */
|
||||
/*
|
||||
* Store up a bunch of mbuf's for use later. (MAX_MBS). First we
|
||||
* free up any that we had in case we're being called from intr or
|
||||
* somewhere else.
|
||||
*/
|
||||
sc->last_mb = 0;
|
||||
sc->next_mb = 0;
|
||||
epmbuffill(sc);
|
||||
|
||||
epstart(ifp);
|
||||
splx(s);
|
||||
}
|
||||
|
||||
static const char padmap[] = {0, 3, 2, 1};
|
||||
|
|
@ -869,14 +886,24 @@ epioctl(ifp, cmd, data)
|
|||
}
|
||||
break;
|
||||
case SIOCSIFFLAGS:
|
||||
if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
|
||||
if ((ifp->if_flags & IFF_UP) == 0 &&
|
||||
(ifp->if_flags & IFF_RUNNING) != 0) {
|
||||
ifp->if_flags &= ~IFF_RUNNING;
|
||||
epstop(sc);
|
||||
epmbufempty(sc);
|
||||
break;
|
||||
}
|
||||
if (ifp->if_flags & IFF_UP && (ifp->if_flags & IFF_RUNNING) == 0)
|
||||
} else if ((ifp->if_flags & IFF_UP) != 0 &&
|
||||
(ifp->if_flags & IFF_RUNNING) == 0) {
|
||||
epinit(sc);
|
||||
} else {
|
||||
/*
|
||||
* deal with flags changes:
|
||||
* IFF_MULTICAST, IFF_PROMISC,
|
||||
* IFF_LINK0, IFF_LINK1,
|
||||
*/
|
||||
epsetfilter(sc);
|
||||
epsetlink(sc);
|
||||
}
|
||||
break;
|
||||
#ifdef notdef
|
||||
case SIOCGHWADDR:
|
||||
|
|
@ -1018,5 +1045,6 @@ epmbufempty(sc)
|
|||
}
|
||||
}
|
||||
sc->last_mb = sc->next_mb = 0;
|
||||
untimeout(epmbuffill, sc);
|
||||
splx(s);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -21,18 +21,16 @@
|
|||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: if_epreg.h,v 1.3 1994/03/29 04:35:56 mycroft Exp $
|
||||
* $Id: if_epreg.h,v 1.4 1994/04/15 10:51:36 deraadt Exp $
|
||||
*/
|
||||
/**************************************************************************
|
||||
* *
|
||||
|
||||
/*
|
||||
* These define the EEPROM data structure. They are used in the probe
|
||||
* function to verify the existance of the adapter after having sent
|
||||
* the ID_Sequence.
|
||||
*
|
||||
* There are others but only the ones we use are defined here.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
*/
|
||||
#define EEPROM_NODE_ADDR_0 0x0 /* Word */
|
||||
#define EEPROM_NODE_ADDR_1 0x1 /* Word */
|
||||
#define EEPROM_NODE_ADDR_2 0x2 /* Word */
|
||||
|
|
@ -41,18 +39,16 @@
|
|||
#define EEPROM_ADDR_CFG 0x8 /* Base addr */
|
||||
#define EEPROM_RESOURCE_CFG 0x9 /* IRQ. Bits 12-15 */
|
||||
|
||||
/**************************************************************************
|
||||
* *
|
||||
* These are the registers for the 3Com 3c509 and their bit patterns when *
|
||||
* applicable. They have been taken out the the "EtherLink III Parallel *
|
||||
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual *
|
||||
* from 3com. *
|
||||
* *
|
||||
**************************************************************************/
|
||||
|
||||
/*
|
||||
* These are the registers for the 3Com 3c509 and their bit patterns when
|
||||
* applicable. They have been taken out the the "EtherLink III Parallel
|
||||
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual
|
||||
* from 3com.
|
||||
*/
|
||||
#define EP_COMMAND 0x0e /* Write. BASE+0x0e is always a command reg. */
|
||||
#define EP_STATUS 0x0e /* Read. BASE+0x0e is always status reg. */
|
||||
#define EP_WINDOW 0x0f /* Read. BASE+0x0f is always window reg. */
|
||||
|
||||
/*
|
||||
* Window 0 registers. Setup.
|
||||
*/
|
||||
|
|
@ -136,11 +132,9 @@
|
|||
#define TX_NO_SQE 0x01
|
||||
#define TX_CD_LOST 0x00
|
||||
|
||||
/****************************************
|
||||
*
|
||||
/*
|
||||
* Register definitions.
|
||||
*
|
||||
****************************************/
|
||||
*/
|
||||
|
||||
/*
|
||||
* Command register. All windows.
|
||||
|
|
@ -164,26 +158,27 @@
|
|||
#define TX_DISABLE (u_short) (0xa<<11)
|
||||
#define TX_RESET (u_short) (0xb<<11)
|
||||
#define REQ_INTR (u_short) (0xc<<11)
|
||||
/*
|
||||
* The following C_* acknowledge the various interrupts.
|
||||
* Some of them don't do anything. See the manual.
|
||||
*/
|
||||
|
||||
/*
|
||||
* The following C_* acknowledge the various interrupts.
|
||||
* Some of them don't do anything. See the manual.
|
||||
*/
|
||||
#define ACK_INTR (u_short) (0x6800)
|
||||
# define C_INTR_LATCH (u_short) (ACK_INTR|0x1)
|
||||
# define C_CARD_FAILURE (u_short) (ACK_INTR|0x2)
|
||||
# define C_TX_COMPLETE (u_short) (ACK_INTR|0x4)
|
||||
# define C_TX_AVAIL (u_short) (ACK_INTR|0x8)
|
||||
# define C_INTR_LATCH (u_short) (ACK_INTR|0x01)
|
||||
# define C_CARD_FAILURE (u_short) (ACK_INTR|0x02)
|
||||
# define C_TX_COMPLETE (u_short) (ACK_INTR|0x04)
|
||||
# define C_TX_AVAIL (u_short) (ACK_INTR|0x08)
|
||||
# define C_RX_COMPLETE (u_short) (ACK_INTR|0x10)
|
||||
# define C_RX_EARLY (u_short) (ACK_INTR|0x20)
|
||||
# define C_INT_RQD (u_short) (ACK_INTR|0x40)
|
||||
# define C_UPD_STATS (u_short) (ACK_INTR|0x80)
|
||||
#define SET_INTR_MASK (u_short) (0xe<<11)
|
||||
#define SET_RD_0_MASK (u_short) (0xf<<11)
|
||||
#define SET_INTR_MASK (u_short) (0x0e<<11)
|
||||
#define SET_RD_0_MASK (u_short) (0x0f<<11)
|
||||
#define SET_RX_FILTER (u_short) (0x10<<11)
|
||||
# define FIL_INDIVIDUAL (u_short) (0x1)
|
||||
# define FIL_GROUP (u_short) (0x2)
|
||||
# define FIL_BRDCST (u_short) (0x4)
|
||||
# define FIL_ALL (u_short) (0x8)
|
||||
# define FIL_INDIVIDUAL (u_short) (0x01)
|
||||
# define FIL_MULTICAST (u_short) (0x02)
|
||||
# define FIL_BRDCST (u_short) (0x04)
|
||||
# define FIL_PROMISC (u_short) (0x08)
|
||||
#define SET_RX_EARLY_THRESH (u_short) (0x11<<11)
|
||||
#define SET_TX_AVAIL_THRESH (u_short) (0x12<<11)
|
||||
#define SET_TX_START_THRESH (u_short) (0x13<<11)
|
||||
|
|
@ -209,14 +204,14 @@
|
|||
* 1: Adapter Failure.
|
||||
* 0: Interrupt Latch.
|
||||
*/
|
||||
#define S_INTR_LATCH (u_short) (0x1)
|
||||
#define S_CARD_FAILURE (u_short) (0x2)
|
||||
#define S_TX_COMPLETE (u_short) (0x4)
|
||||
#define S_TX_AVAIL (u_short) (0x8)
|
||||
#define S_RX_COMPLETE (u_short) (0x10)
|
||||
#define S_RX_EARLY (u_short) (0x20)
|
||||
#define S_INT_RQD (u_short) (0x40)
|
||||
#define S_UPD_STATS (u_short) (0x80)
|
||||
#define S_INTR_LATCH (u_short) (0x0001)
|
||||
#define S_CARD_FAILURE (u_short) (0x0002)
|
||||
#define S_TX_COMPLETE (u_short) (0x0004)
|
||||
#define S_TX_AVAIL (u_short) (0x0008)
|
||||
#define S_RX_COMPLETE (u_short) (0x0010)
|
||||
#define S_RX_EARLY (u_short) (0x0020)
|
||||
#define S_INT_RQD (u_short) (0x0040)
|
||||
#define S_UPD_STATS (u_short) (0x0080)
|
||||
#define S_COMMAND_IN_PROGRESS (u_short) (0x1000)
|
||||
|
||||
/*
|
||||
|
|
@ -243,7 +238,7 @@
|
|||
#define ERR_ALIGNMENT (u_short) (0x1400)
|
||||
#define ERR_CRC (u_short) (0x1500)
|
||||
#define ERR_OVERSIZE (u_short) (0x1100)
|
||||
#define ERR_DRIBBLE (u_short) (0x200)
|
||||
#define ERR_DRIBBLE (u_short) (0x0200)
|
||||
|
||||
/*
|
||||
* TX Status
|
||||
|
|
@ -266,8 +261,8 @@
|
|||
#define TXS_INTR_REQ 0x40
|
||||
#define TXS_JABBER 0x20
|
||||
#define TXS_UNDERRUN 0x10
|
||||
#define TXS_MAX_COLLISION 0x8
|
||||
#define TXS_STATUS_OVERFLOW 0x4
|
||||
#define TXS_MAX_COLLISION 0x08
|
||||
#define TXS_STATUS_OVERFLOW 0x04
|
||||
|
||||
/*
|
||||
* Misc defines for various things.
|
||||
|
|
@ -288,8 +283,6 @@
|
|||
#define EEPROM_BUSY (1<<15)
|
||||
#define EEPROM_TST_MODE (1<<14)
|
||||
#define READ_EEPROM (1<<7)
|
||||
#define ETHER_ADDR_LEN 6
|
||||
#define ETHER_MAX 1536
|
||||
#define ENABLE_UTP 0xc0
|
||||
#define DISABLE_UTP 0x0
|
||||
#define RX_BYTES_MASK (u_short) (0x07ff)
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: if_ep.c,v 1.29 1994/04/13 06:09:00 deraadt Exp $
|
||||
* $Id: if_ep.c,v 1.30 1994/04/15 10:51:28 deraadt Exp $
|
||||
*/
|
||||
|
||||
#include "bpfilter.h"
|
||||
|
|
@ -104,6 +104,8 @@ static void epread __P((struct ep_softc *));
|
|||
static void epmbuffill __P((struct ep_softc *));
|
||||
static void epmbufempty __P((struct ep_softc *));
|
||||
static void epstop __P((struct ep_softc *));
|
||||
static void epsetfilter __P((struct ep_softc *sc));
|
||||
static void epsetlink __P((struct ep_softc *sc));
|
||||
|
||||
static u_short epreadeeprom __P((int id_port, int offset));
|
||||
static int epbusyeeprom __P((struct ep_softc *));
|
||||
|
|
@ -316,7 +318,8 @@ epattach(parent, self, aux)
|
|||
ifp->if_unit = sc->sc_dev.dv_unit;
|
||||
ifp->if_name = epcd.cd_name;
|
||||
ifp->if_mtu = ETHERMTU;
|
||||
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS;
|
||||
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS |
|
||||
IFF_MULTICAST;
|
||||
ifp->if_output = ether_output;
|
||||
ifp->if_start = epstart;
|
||||
ifp->if_ioctl = epioctl;
|
||||
|
|
@ -395,8 +398,40 @@ epinit(sc)
|
|||
outw(BASE + EP_COMMAND, SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE |
|
||||
S_TX_COMPLETE | S_TX_AVAIL);
|
||||
|
||||
outw(BASE + EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
|
||||
FIL_GROUP | FIL_BRDCST);
|
||||
epsetfilter(sc);
|
||||
epsetlink(sc);
|
||||
|
||||
outw(BASE + EP_COMMAND, RX_ENABLE);
|
||||
outw(BASE + EP_COMMAND, TX_ENABLE);
|
||||
|
||||
ifp->if_flags |= IFF_RUNNING;
|
||||
ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
|
||||
sc->tx_start_thresh = 20; /* probably a good starting point. */
|
||||
/* Store up a bunch of mbuf's for use later. (MAX_MBS). */
|
||||
epmbuffill(sc);
|
||||
|
||||
epstart(ifp);
|
||||
splx(s);
|
||||
}
|
||||
|
||||
static void
|
||||
epsetfilter(sc)
|
||||
register struct ep_softc *sc;
|
||||
{
|
||||
register struct ifnet *ifp = &sc->ep_ac.ac_if;
|
||||
|
||||
GO_WINDOW(1); /* Window 1 is operating window */
|
||||
outw(BASE + EP_COMMAND, SET_RX_FILTER |
|
||||
FIL_INDIVIDUAL | FIL_BRDCST |
|
||||
((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0 ) |
|
||||
((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0 ));
|
||||
}
|
||||
|
||||
static void
|
||||
epsetlink(sc)
|
||||
register struct ep_softc *sc;
|
||||
{
|
||||
register struct ifnet *ifp = &sc->ep_ac.ac_if;
|
||||
|
||||
/*
|
||||
* you can `ifconfig (link0|-link0) ep0' to get the following
|
||||
|
|
@ -422,24 +457,6 @@ epinit(sc)
|
|||
GO_WINDOW(1);
|
||||
}
|
||||
}
|
||||
|
||||
outw(BASE + EP_COMMAND, RX_ENABLE);
|
||||
outw(BASE + EP_COMMAND, TX_ENABLE);
|
||||
|
||||
ifp->if_flags |= IFF_RUNNING;
|
||||
ifp->if_flags &= ~IFF_OACTIVE; /* just in case */
|
||||
sc->tx_start_thresh = 20; /* probably a good starting point. */
|
||||
/*
|
||||
* Store up a bunch of mbuf's for use later. (MAX_MBS). First we
|
||||
* free up any that we had in case we're being called from intr or
|
||||
* somewhere else.
|
||||
*/
|
||||
sc->last_mb = 0;
|
||||
sc->next_mb = 0;
|
||||
epmbuffill(sc);
|
||||
|
||||
epstart(ifp);
|
||||
splx(s);
|
||||
}
|
||||
|
||||
static const char padmap[] = {0, 3, 2, 1};
|
||||
|
|
@ -869,14 +886,24 @@ epioctl(ifp, cmd, data)
|
|||
}
|
||||
break;
|
||||
case SIOCSIFFLAGS:
|
||||
if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
|
||||
if ((ifp->if_flags & IFF_UP) == 0 &&
|
||||
(ifp->if_flags & IFF_RUNNING) != 0) {
|
||||
ifp->if_flags &= ~IFF_RUNNING;
|
||||
epstop(sc);
|
||||
epmbufempty(sc);
|
||||
break;
|
||||
}
|
||||
if (ifp->if_flags & IFF_UP && (ifp->if_flags & IFF_RUNNING) == 0)
|
||||
} else if ((ifp->if_flags & IFF_UP) != 0 &&
|
||||
(ifp->if_flags & IFF_RUNNING) == 0) {
|
||||
epinit(sc);
|
||||
} else {
|
||||
/*
|
||||
* deal with flags changes:
|
||||
* IFF_MULTICAST, IFF_PROMISC,
|
||||
* IFF_LINK0, IFF_LINK1,
|
||||
*/
|
||||
epsetfilter(sc);
|
||||
epsetlink(sc);
|
||||
}
|
||||
break;
|
||||
#ifdef notdef
|
||||
case SIOCGHWADDR:
|
||||
|
|
@ -1018,5 +1045,6 @@ epmbufempty(sc)
|
|||
}
|
||||
}
|
||||
sc->last_mb = sc->next_mb = 0;
|
||||
untimeout(epmbuffill, sc);
|
||||
splx(s);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -21,18 +21,16 @@
|
|||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id: if_epreg.h,v 1.3 1994/03/29 04:35:56 mycroft Exp $
|
||||
* $Id: if_epreg.h,v 1.4 1994/04/15 10:51:36 deraadt Exp $
|
||||
*/
|
||||
/**************************************************************************
|
||||
* *
|
||||
|
||||
/*
|
||||
* These define the EEPROM data structure. They are used in the probe
|
||||
* function to verify the existance of the adapter after having sent
|
||||
* the ID_Sequence.
|
||||
*
|
||||
* There are others but only the ones we use are defined here.
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
*/
|
||||
#define EEPROM_NODE_ADDR_0 0x0 /* Word */
|
||||
#define EEPROM_NODE_ADDR_1 0x1 /* Word */
|
||||
#define EEPROM_NODE_ADDR_2 0x2 /* Word */
|
||||
|
|
@ -41,18 +39,16 @@
|
|||
#define EEPROM_ADDR_CFG 0x8 /* Base addr */
|
||||
#define EEPROM_RESOURCE_CFG 0x9 /* IRQ. Bits 12-15 */
|
||||
|
||||
/**************************************************************************
|
||||
* *
|
||||
* These are the registers for the 3Com 3c509 and their bit patterns when *
|
||||
* applicable. They have been taken out the the "EtherLink III Parallel *
|
||||
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual *
|
||||
* from 3com. *
|
||||
* *
|
||||
**************************************************************************/
|
||||
|
||||
/*
|
||||
* These are the registers for the 3Com 3c509 and their bit patterns when
|
||||
* applicable. They have been taken out the the "EtherLink III Parallel
|
||||
* Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual
|
||||
* from 3com.
|
||||
*/
|
||||
#define EP_COMMAND 0x0e /* Write. BASE+0x0e is always a command reg. */
|
||||
#define EP_STATUS 0x0e /* Read. BASE+0x0e is always status reg. */
|
||||
#define EP_WINDOW 0x0f /* Read. BASE+0x0f is always window reg. */
|
||||
|
||||
/*
|
||||
* Window 0 registers. Setup.
|
||||
*/
|
||||
|
|
@ -136,11 +132,9 @@
|
|||
#define TX_NO_SQE 0x01
|
||||
#define TX_CD_LOST 0x00
|
||||
|
||||
/****************************************
|
||||
*
|
||||
/*
|
||||
* Register definitions.
|
||||
*
|
||||
****************************************/
|
||||
*/
|
||||
|
||||
/*
|
||||
* Command register. All windows.
|
||||
|
|
@ -164,26 +158,27 @@
|
|||
#define TX_DISABLE (u_short) (0xa<<11)
|
||||
#define TX_RESET (u_short) (0xb<<11)
|
||||
#define REQ_INTR (u_short) (0xc<<11)
|
||||
/*
|
||||
* The following C_* acknowledge the various interrupts.
|
||||
* Some of them don't do anything. See the manual.
|
||||
*/
|
||||
|
||||
/*
|
||||
* The following C_* acknowledge the various interrupts.
|
||||
* Some of them don't do anything. See the manual.
|
||||
*/
|
||||
#define ACK_INTR (u_short) (0x6800)
|
||||
# define C_INTR_LATCH (u_short) (ACK_INTR|0x1)
|
||||
# define C_CARD_FAILURE (u_short) (ACK_INTR|0x2)
|
||||
# define C_TX_COMPLETE (u_short) (ACK_INTR|0x4)
|
||||
# define C_TX_AVAIL (u_short) (ACK_INTR|0x8)
|
||||
# define C_INTR_LATCH (u_short) (ACK_INTR|0x01)
|
||||
# define C_CARD_FAILURE (u_short) (ACK_INTR|0x02)
|
||||
# define C_TX_COMPLETE (u_short) (ACK_INTR|0x04)
|
||||
# define C_TX_AVAIL (u_short) (ACK_INTR|0x08)
|
||||
# define C_RX_COMPLETE (u_short) (ACK_INTR|0x10)
|
||||
# define C_RX_EARLY (u_short) (ACK_INTR|0x20)
|
||||
# define C_INT_RQD (u_short) (ACK_INTR|0x40)
|
||||
# define C_UPD_STATS (u_short) (ACK_INTR|0x80)
|
||||
#define SET_INTR_MASK (u_short) (0xe<<11)
|
||||
#define SET_RD_0_MASK (u_short) (0xf<<11)
|
||||
#define SET_INTR_MASK (u_short) (0x0e<<11)
|
||||
#define SET_RD_0_MASK (u_short) (0x0f<<11)
|
||||
#define SET_RX_FILTER (u_short) (0x10<<11)
|
||||
# define FIL_INDIVIDUAL (u_short) (0x1)
|
||||
# define FIL_GROUP (u_short) (0x2)
|
||||
# define FIL_BRDCST (u_short) (0x4)
|
||||
# define FIL_ALL (u_short) (0x8)
|
||||
# define FIL_INDIVIDUAL (u_short) (0x01)
|
||||
# define FIL_MULTICAST (u_short) (0x02)
|
||||
# define FIL_BRDCST (u_short) (0x04)
|
||||
# define FIL_PROMISC (u_short) (0x08)
|
||||
#define SET_RX_EARLY_THRESH (u_short) (0x11<<11)
|
||||
#define SET_TX_AVAIL_THRESH (u_short) (0x12<<11)
|
||||
#define SET_TX_START_THRESH (u_short) (0x13<<11)
|
||||
|
|
@ -209,14 +204,14 @@
|
|||
* 1: Adapter Failure.
|
||||
* 0: Interrupt Latch.
|
||||
*/
|
||||
#define S_INTR_LATCH (u_short) (0x1)
|
||||
#define S_CARD_FAILURE (u_short) (0x2)
|
||||
#define S_TX_COMPLETE (u_short) (0x4)
|
||||
#define S_TX_AVAIL (u_short) (0x8)
|
||||
#define S_RX_COMPLETE (u_short) (0x10)
|
||||
#define S_RX_EARLY (u_short) (0x20)
|
||||
#define S_INT_RQD (u_short) (0x40)
|
||||
#define S_UPD_STATS (u_short) (0x80)
|
||||
#define S_INTR_LATCH (u_short) (0x0001)
|
||||
#define S_CARD_FAILURE (u_short) (0x0002)
|
||||
#define S_TX_COMPLETE (u_short) (0x0004)
|
||||
#define S_TX_AVAIL (u_short) (0x0008)
|
||||
#define S_RX_COMPLETE (u_short) (0x0010)
|
||||
#define S_RX_EARLY (u_short) (0x0020)
|
||||
#define S_INT_RQD (u_short) (0x0040)
|
||||
#define S_UPD_STATS (u_short) (0x0080)
|
||||
#define S_COMMAND_IN_PROGRESS (u_short) (0x1000)
|
||||
|
||||
/*
|
||||
|
|
@ -243,7 +238,7 @@
|
|||
#define ERR_ALIGNMENT (u_short) (0x1400)
|
||||
#define ERR_CRC (u_short) (0x1500)
|
||||
#define ERR_OVERSIZE (u_short) (0x1100)
|
||||
#define ERR_DRIBBLE (u_short) (0x200)
|
||||
#define ERR_DRIBBLE (u_short) (0x0200)
|
||||
|
||||
/*
|
||||
* TX Status
|
||||
|
|
@ -266,8 +261,8 @@
|
|||
#define TXS_INTR_REQ 0x40
|
||||
#define TXS_JABBER 0x20
|
||||
#define TXS_UNDERRUN 0x10
|
||||
#define TXS_MAX_COLLISION 0x8
|
||||
#define TXS_STATUS_OVERFLOW 0x4
|
||||
#define TXS_MAX_COLLISION 0x08
|
||||
#define TXS_STATUS_OVERFLOW 0x04
|
||||
|
||||
/*
|
||||
* Misc defines for various things.
|
||||
|
|
@ -288,8 +283,6 @@
|
|||
#define EEPROM_BUSY (1<<15)
|
||||
#define EEPROM_TST_MODE (1<<14)
|
||||
#define READ_EEPROM (1<<7)
|
||||
#define ETHER_ADDR_LEN 6
|
||||
#define ETHER_MAX 1536
|
||||
#define ENABLE_UTP 0xc0
|
||||
#define DISABLE_UTP 0x0
|
||||
#define RX_BYTES_MASK (u_short) (0x07ff)
|
||||
|
|
|
|||
Loading…
Reference in New Issue