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Fix three bugs in the instruction decoder:

Browse Source 
(1) Mode 5 for SIB uses EBP as base, not ESP.
(2) RM register mode 5 needs a segment override for SS when not using an
    immediate in 32bit mode.
(3) Same for mode 6 in 16bit mode.

From anon ymous.
This commit is contained in:
joerg 2009-02-03 19:14:52 +00:00
parent a349a96a6f
commit 89b1aba64b
1 changed files with 10 additions and 6 deletions
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16
common/lib/libx86emu/x86emu.c
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@ -1,4 +1,4 @@
/* $NetBSD: x86emu.c,v 1.5 2008/10/27 00:20:22 joerg Exp $ */
/* $NetBSD: x86emu.c,v 1.6 2009/02/03 19:14:52 joerg Exp $ */
/****************************************************************************
*
@ -809,7 +809,7 @@ decode_sib_address(struct X86EMU *emu, int sib, int mod)
if (mod == 0) {
base = fetch_long_imm(emu);
} else {
base = emu->x86.R_ESP;
base = emu->x86.R_EBP;
emu->x86.mode |= SYSMODE_SEG_DS_SS;
}
break;
@ -884,10 +884,12 @@ decode_rl_address(struct X86EMU *emu)
offset = decode_sib_address(emu, sib, 0);
break;
case 5:
if (emu->cur_mod == 0)
if (emu->cur_mod == 0) {
offset = fetch_long_imm(emu);
else
} else {
emu->x86.mode |= SYSMODE_SEG_DS_SS;
offset = emu->x86.R_EBP;
}
break;
case 6:
offset = emu->x86.R_ESI;
@ -929,10 +931,12 @@ decode_rl_address(struct X86EMU *emu)
offset = emu->x86.R_DI;
break;
case 6:
if (emu->cur_mod == 0)
if (emu->cur_mod == 0) {
offset = fetch_word_imm(emu);
else
} else {
emu->x86.mode |= SYSMODE_SEG_DS_SS;
offset = emu->x86.R_BP;
}
break;
case 7:
offset = emu->x86.R_BX;