One more small step towards a unified m68k pmap:
use the common pmap_copy_page() and pmap_zero_page (copied from Atari).
This commit is contained in:
parent
ad268a2ff8
commit
892e4f60af
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: locore.s,v 1.103 1998/11/11 06:41:23 thorpej Exp $ */
|
||||
/* $NetBSD: locore.s,v 1.104 1999/02/06 22:48:08 is Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
|
@ -1430,61 +1430,6 @@ Lcpydone:
|
|||
clrl a1@(PCB_ONFAULT) | clear error catch
|
||||
rts
|
||||
|
||||
/*
|
||||
* Copy 1 relocation unit (NBPG bytes)
|
||||
* from physical address to physical address
|
||||
*/
|
||||
ENTRY(physcopyseg)
|
||||
movl sp@(4),d0 | source page number
|
||||
moveq #PGSHIFT,d1
|
||||
lsll d1,d0 | convert to address
|
||||
orl #PG_CI+PG_RW+PG_V,d0 | make sure valid and writable
|
||||
movl _CMAP1,a0
|
||||
movl d0,a0@ | load in page table
|
||||
movl _CADDR1,sp@- | destination kernel VA
|
||||
jbsr _TBIS | invalidate any old mapping
|
||||
addql #4,sp
|
||||
|
||||
movl sp@(8),d0 | destination page number
|
||||
moveq #PGSHIFT,d1
|
||||
lsll d1,d0 | convert to address
|
||||
orl #PG_CI+PG_RW+PG_V,d0 | make sure valid and writable
|
||||
movl _CMAP2,a0
|
||||
movl d0,a0@ | load in page table
|
||||
movl _CADDR2,sp@- | destination kernel VA
|
||||
jbsr _TBIS | invalidate any old mapping
|
||||
addql #4,sp
|
||||
|
||||
movl _CADDR1,a0 | source addr
|
||||
movl _CADDR2,a1 | destination addr
|
||||
movl #NBPG/4-1,d0 | count
|
||||
Lpcpy:
|
||||
movl a0@+,a1@+ | copy longword
|
||||
dbf d0,Lpcpy | continue until done
|
||||
rts
|
||||
|
||||
/*
|
||||
* zero out physical memory
|
||||
* specified in relocation units (NBPG bytes)
|
||||
*/
|
||||
ENTRY(clearseg)
|
||||
movl sp@(4),d0 | destination page number
|
||||
moveq #PGSHIFT,d1
|
||||
lsll d1,d0 | convert to address
|
||||
orl #PG_CI+PG_RW+PG_V,d0 | make sure valid and writable
|
||||
movl _CMAP1,a0
|
||||
movl _CADDR1,sp@- | destination kernel VA
|
||||
movl d0,a0@ | load in page map
|
||||
jbsr _TBIS | invalidate any old mapping
|
||||
addql #4,sp
|
||||
movl _CADDR1,a1 | destination addr
|
||||
movl #NBPG/4-1,d0 | count
|
||||
/* simple clear loop is fastest on 68020 */
|
||||
Lclrloop:
|
||||
clrl a1@+ | clear a longword
|
||||
dbf d0,Lclrloop | continue til done
|
||||
rts
|
||||
|
||||
/*
|
||||
* Invalidate entire TLB.
|
||||
*/
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pmap.c,v 1.57 1999/01/16 20:06:47 chuck Exp $ */
|
||||
/* $NetBSD: pmap.c,v 1.58 1999/02/06 22:48:08 is Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1991 Regents of the University of California.
|
||||
|
@ -2011,42 +2011,111 @@ pmap_deactivate(p)
|
|||
}
|
||||
|
||||
/*
|
||||
* pmap_zero_page zeros the specified (machine independent)
|
||||
* page by mapping the page into virtual memory and using
|
||||
* bzero to clear its contents, one machine dependent page
|
||||
* at a time.
|
||||
* pmap_zero_page: [ INTERFACE ]
|
||||
*
|
||||
* Zero the specified (machine independent) page by mapping the page
|
||||
* into virtual memory and using bzero to clear its contents, one
|
||||
* machine dependent page at a time.
|
||||
*
|
||||
* Note: WE DO NOT CURRENTLY LOCK THE TEMPORARY ADDRESSES!
|
||||
* (Actually, we go to splimp(), and since we don't
|
||||
* support multiple processors, this is sufficient.)
|
||||
*/
|
||||
void
|
||||
pmap_zero_page(phys)
|
||||
register vm_offset_t phys;
|
||||
register paddr_t phys;
|
||||
{
|
||||
int s;
|
||||
int dst_pte = PG_RW | PG_V;
|
||||
|
||||
#ifdef DEBUG
|
||||
if (pmapdebug & PDB_FOLLOW)
|
||||
printf("pmap_zero_page(%lx)\n", phys);
|
||||
#endif
|
||||
phys >>= PG_SHIFT;
|
||||
clearseg(phys);
|
||||
#if defined(M68040) || defined(M68060)
|
||||
if (mmutype == MMU_68040) {
|
||||
/*
|
||||
* Set copyback caching on the page; this is required
|
||||
* for cache consistency (since regular mappings are
|
||||
* copyback as well).
|
||||
*/
|
||||
dst_pte |= PG_CCB;
|
||||
}
|
||||
#endif
|
||||
|
||||
s = splimp();
|
||||
|
||||
*CMAP1 = phys | dst_pte;
|
||||
TBIS((vaddr_t)CADDR1);
|
||||
zeropage(CADDR1);
|
||||
|
||||
#ifdef DEBUG
|
||||
/*
|
||||
* XXX: Invalidating is not strictly necessary.... Not doing it
|
||||
* is saving us a few cycles
|
||||
*/
|
||||
*CMAP1 = PG_NV;
|
||||
TBIS((vaddr_t)CADDR1);
|
||||
#endif
|
||||
|
||||
splx(s);
|
||||
}
|
||||
|
||||
/*
|
||||
* pmap_copy_page copies the specified (machine independent)
|
||||
* page by mapping the page into virtual memory and using
|
||||
* bcopy to copy the page, one machine dependent page at a
|
||||
* time.
|
||||
* pmap_copy_page: [ INTERFACE ]
|
||||
*
|
||||
* Copy the specified (machine independent) page by mapping the page
|
||||
* into virtual memory and using bcopy to copy the page, one machine
|
||||
* dependent page at a time.
|
||||
*
|
||||
* Note: WE DO NOT CURRENTLY LOCK THE TEMPORARY ADDRESSES!
|
||||
* (Actually, we go to splimp(), and since we don't
|
||||
* support multiple processors, this is sufficient.)
|
||||
*/
|
||||
void
|
||||
pmap_copy_page(src, dst)
|
||||
register vm_offset_t src, dst;
|
||||
register paddr_t src, dst;
|
||||
{
|
||||
int s;
|
||||
int src_pte = PG_RO | PG_V;
|
||||
int dst_pte = PG_RW | PG_V;
|
||||
|
||||
#ifdef DEBUG
|
||||
if (pmapdebug & PDB_FOLLOW)
|
||||
printf("pmap_copy_page(%lx, %lx)\n", src, dst);
|
||||
#endif
|
||||
src >>= PG_SHIFT;
|
||||
dst >>= PG_SHIFT;
|
||||
physcopyseg(src, dst);
|
||||
}
|
||||
#if defined(M68040) || defined(M68060)
|
||||
if (mmutype == MMU_68040) {
|
||||
/*
|
||||
* Set copyback caching on the page; this is required
|
||||
* for cache consistency (since regular mappings are
|
||||
* copyback as well).
|
||||
*/
|
||||
dst_pte |= PG_CCB;
|
||||
}
|
||||
#endif
|
||||
|
||||
s = splimp();
|
||||
*CMAP1 = src | src_pte;
|
||||
TBIS((vaddr_t)CADDR1);
|
||||
*CMAP2 = dst | dst_pte;
|
||||
TBIS((vaddr_t)CADDR2);
|
||||
|
||||
copypage(CADDR1, CADDR2);
|
||||
|
||||
#ifdef DEBUG
|
||||
/*
|
||||
* XXX: Invalidating is not strictly necessary.... Not doing it
|
||||
* is saving us a few cycles
|
||||
*/
|
||||
*CMAP1 = PG_NV;
|
||||
TBIS((vaddr_t)CADDR1);
|
||||
*CMAP2 = PG_NV;
|
||||
TBIS((vaddr_t)CADDR2);
|
||||
#endif
|
||||
|
||||
splx(s);
|
||||
}
|
||||
|
||||
/*
|
||||
* Routine: pmap_pageable
|
||||
|
|
Loading…
Reference in New Issue