Rework of kernel I/O & memory mappings along with new implementation of
bus_space_map for PCI memory. The mapping of system devices and I/O space has been shuffled to place them at the top of memory leaving a larger contiguous chunk between the kernel itself and the I/O mappings for the kernel VM area. This allows support for kernel VM areas > 48MB. The 144MB fixed mapping of early PCI memory space has been removed and a new version of the bus_space_map() function has been implemented to map PCI memory into the kernel VM area as required rather than using the fixed mapping. A mapping of the first 1MB of PCI memory is maintained for ISA memory accesses and accesses to the VGA memory.
This commit is contained in:
mark
parent
656c8e63b4
commit
8920fc9215
@ -1,4 +1,4 @@
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/* $NetBSD: dc21285mem.h,v 1.1 1998/09/06 02:20:33 mark Exp $ */
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/* $NetBSD: dc21285mem.h,v 1.2 2000/01/10 07:43:07 mark Exp $ */
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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@ -73,7 +73,8 @@
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/*
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* Standard Virtual memory map used for the DC21285 'Footbridge'
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*/
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#if 0
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/* These were the old addresses */
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#define DC21285_ARMCSR_VBASE 0xF4000000
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#define DC21285_ARMCSR_VSIZE 0x00100000 /* 1MB */
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#define DC21285_CACHE_FLUSH_VBASE 0xF4100000
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@ -82,9 +83,27 @@
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#define DC21285_PCI_IO_VSIZE 0x00100000 /* 1MB */
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#define DC21285_PCI_IACK_VBASE 0xF4300000
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#define DC21285_PCI_IACK_VSIZE 0x00100000 /* 1MB */
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#define DC21285_PCI_ISA_MEM_VBASE 0xF4400000
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#define DC21285_PCI_ISA_MEM_VSIZE 0x00100000 /* 1MB */
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#define DC21285_PCI_TYPE_1_CONFIG_VBASE 0xF5000000
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#define DC21285_PCI_TYPE_1_CONFIG_VSIZE 0x01000000 /* 16MB */
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#define DC21285_PCI_TYPE_0_CONFIG_VBASE 0xF6000000
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#define DC21285_PCI_TYPE_0_CONFIG_VSIZE 0x01000000 /* 16MB */
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#define DC21285_PCI_MEM_VBASE 0xF7000000
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#define DC21285_PCI_MEM_VSIZE 0x09000000 /* 144MB */
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#endif
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#define DC21285_ARMCSR_VBASE 0xFD000000
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#define DC21285_ARMCSR_VSIZE 0x00100000 /* 1MB */
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#define DC21285_CACHE_FLUSH_VBASE 0xFD100000
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#define DC21285_CACHE_FLUSH_VSIZE 0x00100000 /* 1MB */
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#define DC21285_PCI_IO_VBASE 0xFD200000
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#define DC21285_PCI_IO_VSIZE 0x00100000 /* 1MB */
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#define DC21285_PCI_IACK_VBASE 0xFD300000
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#define DC21285_PCI_IACK_VSIZE 0x00100000 /* 1MB */
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#define DC21285_PCI_ISA_MEM_VBASE 0xFD400000
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#define DC21285_PCI_ISA_MEM_VSIZE 0x00100000 /* 1MB */
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#define DC21285_PCI_TYPE_1_CONFIG_VBASE 0xFE000000
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#define DC21285_PCI_TYPE_1_CONFIG_VSIZE 0x01000000 /* 16MB */
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#define DC21285_PCI_TYPE_0_CONFIG_VBASE 0xFF000000
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#define DC21285_PCI_TYPE_0_CONFIG_VSIZE 0x01000000 /* 16MB */
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@ -1,4 +1,4 @@
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/* $NetBSD: ebsa285_machdep.c,v 1.9 1999/12/03 22:48:23 thorpej Exp $ */
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/* $NetBSD: ebsa285_machdep.c,v 1.10 2000/01/10 07:43:07 mark Exp $ */
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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@ -214,6 +214,7 @@ extern void dumpsys __P((void));
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#ifndef CONMODE
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#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
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#endif
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int comcnspeed = CONSPEED;
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int comcnmode = CONMODE;
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@ -315,9 +316,9 @@ struct l1_sec_map {
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/* Map 16MB of type 0 PCI config access */
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{ DC21285_PCI_TYPE_0_CONFIG_VBASE, DC21285_PCI_TYPE_0_CONFIG,
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DC21285_PCI_TYPE_0_CONFIG_VSIZE, 0 },
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/* Map 128MB of 32 bit PCI address space for MEM accesses */
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{ DC21285_PCI_MEM_VBASE, DC21285_PCI_MEM_BASE,
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DC21285_PCI_MEM_VSIZE, 0 },
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/* Map 1MB of 32 bit PCI address space for ISA MEM accesses via PCI */
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{ DC21285_PCI_ISA_MEM_VBASE, DC21285_PCI_MEM_BASE,
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DC21285_PCI_ISA_MEM_VSIZE, 0 },
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{ 0, 0, 0, 0 }
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};
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@ -838,8 +839,7 @@ consinit(void)
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#if NISA > 0
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/* Initialise the ISA subsystem early ... */
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isa_cats_init(DC21285_PCI_IO_VBASE, DC21285_PCI_MEM_VBASE);
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isa_cats_init(DC21285_PCI_IO_VBASE, DC21285_PCI_ISA_MEM_VBASE);
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#endif
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footbridge_pci_bs_tag_init();
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@ -1,4 +1,4 @@
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/* $NetBSD: footbridge.c,v 1.2 1998/11/10 04:32:03 mark Exp $ */
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/* $NetBSD: footbridge.c,v 1.3 2000/01/10 07:43:07 mark Exp $ */
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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@ -76,6 +76,9 @@ struct cfattach footbridge_ca = {
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/* Various bus space tags */
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extern struct bus_space footbridge_bs_tag;
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extern void footbridge_create_io_bs_tag(bus_space_tag_t t, void *cookie);
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extern void footbridge_create_mem_bs_tag(bus_space_tag_t t, void *cookie);
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struct bus_space footbridge_csr_tag;
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struct bus_space footbridge_pci_io_bs_tag;
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struct bus_space footbridge_pci_mem_bs_tag;
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extern struct arm32_pci_chipset footbridge_pci_chipset;
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@ -92,10 +95,10 @@ void
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footbridge_pci_bs_tag_init(void)
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{
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/* Set up the PCI bus tags */
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footbridge_pci_io_bs_tag = footbridge_bs_tag;
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footbridge_pci_io_bs_tag.bs_cookie = (void *)DC21285_PCI_IO_VBASE;
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footbridge_pci_mem_bs_tag = footbridge_bs_tag;
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footbridge_pci_mem_bs_tag.bs_cookie = (void *)DC21285_PCI_MEM_VBASE;
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footbridge_create_io_bs_tag(&footbridge_pci_io_bs_tag,
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(void *)DC21285_PCI_IO_VBASE);
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footbridge_create_mem_bs_tag(&footbridge_pci_mem_bs_tag,
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(void *)DC21285_PCI_MEM_BASE);
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}
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/*
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@ -188,10 +191,10 @@ footbridge_attach(parent, self, aux)
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"parity", footbridge_intr, sc);
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/* Set up the PCI bus tags */
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footbridge_pci_io_bs_tag = footbridge_bs_tag;
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footbridge_pci_io_bs_tag.bs_cookie = (void *)DC21285_PCI_IO_VBASE;
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footbridge_pci_mem_bs_tag = footbridge_bs_tag;
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footbridge_pci_mem_bs_tag.bs_cookie = (void *)DC21285_PCI_MEM_VBASE;
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footbridge_create_io_bs_tag(&footbridge_pci_io_bs_tag,
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(void *)DC21285_PCI_IO_VBASE);
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footbridge_create_mem_bs_tag(&footbridge_pci_mem_bs_tag,
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(void *)DC21285_PCI_MEM_BASE);
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/* Attach the PCI bus */
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fba.fba_pba.pba_busname = "pci";
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@ -1,4 +1,4 @@
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/* $NetBSD: footbridge_io.c,v 1.3 1999/02/27 11:14:27 mark Exp $ */
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/* $NetBSD: footbridge_io.c,v 1.4 2000/01/10 07:43:07 mark Exp $ */
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/*
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* Copyright (c) 1997 Causality Limited
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@ -42,11 +42,16 @@
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <arm32/footbridge/dc21285mem.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <uvm/uvm_extern.h>
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/* Proto types for all the bus_space structure functions */
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bs_protos(footbridge);
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bs_protos(bs_notimpl);
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bs_map_proto(footbridge_mem);
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bs_unmap_proto(footbridge_mem);
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/* Declare the footbridge bus space tag */
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@ -121,6 +126,24 @@ struct bus_space footbridge_bs_tag = {
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bs_notimpl_bs_c_8,
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};
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void footbridge_create_io_bs_tag(t, cookie)
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struct bus_space *t;
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void *cookie;
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{
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*t = footbridge_bs_tag;
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t->bs_cookie = cookie;
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}
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void footbridge_create_mem_bs_tag(t, cookie)
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struct bus_space *t;
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void *cookie;
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{
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*t = footbridge_bs_tag;
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t->bs_map = footbridge_mem_bs_map;
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t->bs_unmap = footbridge_mem_bs_unmap;
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t->bs_cookie = cookie;
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}
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/* bus space functions */
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int
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@ -132,18 +155,71 @@ footbridge_bs_map(t, bpa, size, cacheable, bshp)
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bus_space_handle_t *bshp;
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{
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/*
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* Temporary implementation as all I/O is already mapped etc.
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* The whole 64K of PCI space is always completely mapped during
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* boot.
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*
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* Eventually this function will do the mapping check for multiple maps
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* Eventually this function will do the mapping check overlapping /
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* multiple mappings.
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*/
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if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE)
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panic("footbridge_bs_map: Address out of range (%08lx)\n", bpa);
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/* The cookie is the base address for the I/O area */
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*bshp = bpa + (bus_addr_t)t;
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return(0);
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}
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int
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footbridge_mem_bs_map(t, bpa, size, cacheable, bshp)
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void *t;
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bus_addr_t bpa;
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bus_size_t size;
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int cacheable;
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bus_space_handle_t *bshp;
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{
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bus_addr_t startpa, endpa;
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vaddr_t va;
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/* Round the allocation to page boundries */
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startpa = trunc_page(bpa);
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endpa = round_page(bpa + size);
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/*
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* Check for mappings below 1MB as we have this space already
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* mapped. In practice it is only the VGA hole that takes
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* advantage of this.
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*/
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if (endpa < DC21285_PCI_ISA_MEM_VSIZE) {
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/* Store the bus space handle */
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*bshp = DC21285_PCI_ISA_MEM_VBASE + bpa;
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return 0;
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}
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/*
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* Eventually this function will do the mapping check for overlapping /
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* multiple mappings
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*/
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va = uvm_km_valloc(kernel_map, endpa - startpa);
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if (va == 0)
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return ENOMEM;
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/* Store the bus space handle */
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*bshp = va + (bpa & PGOFSET);
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/* Now map the pages */
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/* The cookie is the physical base address for the I/O area */
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while (startpa < endpa) {
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pmap_enter(kernel_pmap, va, (bus_addr_t)t + startpa,
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VM_PROT_READ | VM_PROT_WRITE, 0);
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va += NBPG;
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startpa += NBPG;
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}
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/* if (bpa >= DC21285_PCI_MEM_VSIZE && bpa != DC21285_ARMCSR_VBASE)
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panic("footbridge_bs_map: Address out of range (%08lx)\n", bpa);
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*/
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return(0);
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}
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int
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footbridge_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
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bpap, bshp)
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@ -169,6 +245,30 @@ footbridge_bs_unmap(t, bsh, size)
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*/
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}
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void
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footbridge_mem_bs_unmap(t, bsh, size)
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void *t;
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bus_space_handle_t bsh;
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bus_size_t size;
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{
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vaddr_t startva, endva;
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/*
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* Check for mappings below 1MB as we have this space permenantly
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* mapped. In practice it is only the VGA hole that takes
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* advantage of this.
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*/
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if (bsh >= DC21285_PCI_ISA_MEM_VBASE
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&& bsh < (DC21285_PCI_ISA_MEM_VBASE + DC21285_PCI_ISA_MEM_VSIZE)) {
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return;
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}
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startva = trunc_page(bsh);
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endva = round_page(bsh + size);
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uvm_km_free(kernel_map, startva, endva - startva);
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}
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void
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footbridge_bs_free(t, bsh, size)
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void *t;
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