diff --git a/gnu/dist/toolchain/sim/ppc/gen-idecode.c b/gnu/dist/toolchain/sim/ppc/gen-idecode.c index 397dcde18164..81a687898c25 100644 --- a/gnu/dist/toolchain/sim/ppc/gen-idecode.c +++ b/gnu/dist/toolchain/sim/ppc/gen-idecode.c @@ -757,21 +757,21 @@ print_run_until_stop_body(lf *file, if (!generate_smp) { - lf_putstr(file, " -/* CASE 1: NO SMP (with or with out instruction cache). - - In this case, we can take advantage of the fact that the current - instruction address does not need to be returned to the cpu object - after every execution of an instruction. Instead it only needs to - be saved when either A. the main loop exits or B. A cpu-halt or - cpu-restart call forces the loop to be re-enered. The later - functions always save the current cpu instruction address. - - Two subcases also exist that with and that without an instruction - cache. - - An additional complexity is the need to ensure that a 1:1 ratio - is maintained between the execution of an instruction and the + lf_putstr(file, "\n\ +/* CASE 1: NO SMP (with or with out instruction cache).\n\ +\n\ + In this case, we can take advantage of the fact that the current\n\ + instruction address does not need to be returned to the cpu object\n\ + after every execution of an instruction. Instead it only needs to\n\ + be saved when either A. the main loop exits or B. A cpu-halt or\n\ + cpu-restart call forces the loop to be re-enered. The later\n\ + functions always save the current cpu instruction address.\n\ +\n\ + Two subcases also exist that with and that without an instruction\n\ + cache.\n\ +\n\ + An additional complexity is the need to ensure that a 1:1 ratio\n\ + is maintained between the execution of an instruction and the\n\ incrementing of the simulation clock */"); lf_putstr(file, "\n"); @@ -867,12 +867,12 @@ print_run_until_stop_body(lf *file, if (generate_smp) { - lf_putstr(file, " -/* CASE 2: SMP (With or without ICACHE) - - The complexity here comes from needing to correctly restart the - system when it is aborted. In particular if cpu0 requests a - restart, the next cpu is still cpu1. Cpu0 being restarted after + lf_putstr(file, "\n\ +/* CASE 2: SMP (With or without ICACHE)\n\ +\n\ + The complexity here comes from needing to correctly restart the\n\ + system when it is aborted. In particular if cpu0 requests a\n\ + restart, the next cpu is still cpu1. Cpu0 being restarted after\n\ all the other CPU's and the event queue have been processed */"); lf_putstr(file, "\n"); diff --git a/gnu/dist/toolchain/sim/ppc/gen-model.c b/gnu/dist/toolchain/sim/ppc/gen-model.c index 4ec167717c0c..57d869efa27d 100644 --- a/gnu/dist/toolchain/sim/ppc/gen-model.c +++ b/gnu/dist/toolchain/sim/ppc/gen-model.c @@ -377,7 +377,7 @@ gen_model_c(insn_table *table, lf *file) lf_printf(file, " }\n"); lf_printf(file, " }\n"); lf_printf(file, "\n"); - lf_printf(file, " error(\"Unknown model '%%s', Models which are known are:%%s\n\",\n"); + lf_printf(file, " error(\"Unknown model '%%s', Models which are known are:%%s\",\n"); lf_printf(file, " name,\n"); lf_printf(file, " \""); for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) { diff --git a/gnu/dist/toolchain/sim/ppc/lf.c b/gnu/dist/toolchain/sim/ppc/lf.c index 2a420151efa0..112957090d60 100644 --- a/gnu/dist/toolchain/sim/ppc/lf.c +++ b/gnu/dist/toolchain/sim/ppc/lf.c @@ -274,27 +274,27 @@ lf_print__gnu_copyleft(lf *file) case lf_is_c: case lf_is_h: nr += lf_printf(file, "\ -/* This file is part of the program psim. - - Copyright (C) 1994-1995, Andrew Cagney - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - -- - - This file was generated by the program %s */ +/* This file is part of the program psim.\n\ +\n\ + Copyright (C) 1994-1995, Andrew Cagney \n\ +\n\ + This program is free software; you can redistribute it and/or modify\n\ + it under the terms of the GNU General Public License as published by\n\ + the Free Software Foundation; either version 2 of the License, or\n\ + (at your option) any later version.\n\ +\n\ + This program is distributed in the hope that it will be useful,\n\ + but WITHOUT ANY WARRANTY; without even the implied warranty of\n\ + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n\ + GNU General Public License for more details.\n\ + \n\ + You should have received a copy of the GNU General Public License\n\ + along with this program; if not, write to the Free Software\n\ + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.\n\ + \n\ + --\n\ +\n\ + This file was generated by the program %s */\n\ ", filter_filename(file->program)); break; default: