Replace the ad-hoc "section mapping table" for static device mappings
with a more generic "devmap" structure that can also handle mappings made with large and small pages. Add new pmap routines to enter these mappings during bootstrap (and "remember" the devmap), and routines to look up the static mappings once the kernel is running.
This commit is contained in:
thorpej
parent
d35db0b328
commit
87d5bba5b3
@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.134 2003/05/21 18:07:07 thorpej Exp $ */
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/* $NetBSD: pmap.c,v 1.135 2003/06/15 17:45:21 thorpej Exp $ */
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/*
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* Copyright 2003 Wasabi Systems, Inc.
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@ -210,7 +210,7 @@
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#include <machine/param.h>
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#include <arm/arm32/katelib.h>
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.134 2003/05/21 18:07:07 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.135 2003/06/15 17:45:21 thorpej Exp $");
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#ifdef PMAP_DEBUG
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#define PDEBUG(_lev_,_stat_) \
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@ -4494,6 +4494,75 @@ pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, vsize_t size,
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return (size);
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}
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/********************** Static device map routines ***************************/
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static const struct pmap_devmap *pmap_devmap_table;
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/*
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* Map all of the static regions in the devmap table, and remember
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* the devmap table so other parts of the kernel can look up entries
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* later.
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*/
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void
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pmap_devmap_bootstrap(vaddr_t l1pt, const struct pmap_devmap *table)
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{
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int i;
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KASSERT(pmap_devmap_table == NULL);
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pmap_devmap_table = table;
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for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
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#ifdef VERBOSE_INIT_ARM
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printf("devmap: %08lx -> %08lx @ %08lx\n",
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pmap_devmap_table[i].pd_pa,
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pmap_devmap_table[i].pd_pa +
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pmap_devmap_table[i].pd_size - 1,
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pmap_devmap_table[i].pd_va);
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#endif
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pmap_map_chunk(l1pt, pmap_devmap_table[i].pd_va,
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pmap_devmap_table[i].pd_pa,
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pmap_devmap_table[i].pd_size,
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pmap_devmap_table[i].pd_prot,
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pmap_devmap_table[i].pd_cache);
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}
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}
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const struct pmap_devmap *
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pmap_devmap_find_pa(paddr_t pa, psize_t size)
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{
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int i;
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if (pmap_devmap_table == NULL)
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return (NULL);
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for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
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if (pa >= pmap_devmap_table[i].pd_pa &&
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pa + size <= pmap_devmap_table[i].pd_pa +
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pmap_devmap_table[i].pd_size)
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return (&pmap_devmap_table[i]);
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}
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return (NULL);
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}
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const struct pmap_devmap *
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pmap_devmap_find_va(vaddr_t va, vsize_t size)
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{
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int i;
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if (pmap_devmap_table == NULL)
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return (NULL);
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for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
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if (va >= pmap_devmap_table[i].pd_va &&
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va + size <= pmap_devmap_table[i].pd_va +
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pmap_devmap_table[i].pd_size)
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return (&pmap_devmap_table[i]);
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}
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return (NULL);
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}
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/********************** PTE initialization routines **************************/
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.h,v 1.72 2003/05/21 18:04:43 thorpej Exp $ */
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/* $NetBSD: pmap.h,v 1.73 2003/06/15 17:45:23 thorpej Exp $ */
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/*
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* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
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@ -149,6 +149,18 @@ union pmap_cache_state {
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*/
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#define PMAP_CACHE_STATE_ALL 0xffffffffu
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/*
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* This structure is used by machine-dependent code to describe
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* static mappings of devices, created at bootstrap time.
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*/
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struct pmap_devmap {
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vaddr_t pd_va; /* virtual address */
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paddr_t pd_pa; /* physical address */
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psize_t pd_size; /* size of region */
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vm_prot_t pd_prot; /* protection code */
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int pd_cache; /* cache attributes */
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};
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/*
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* The pmap structure itself
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*/
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@ -252,11 +264,15 @@ void pmap_postinit(void);
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void vector_page_setprot(int);
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const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t);
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const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t);
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/* Bootstrapping routines. */
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void pmap_map_section(vaddr_t, vaddr_t, paddr_t, int, int);
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void pmap_map_entry(vaddr_t, vaddr_t, paddr_t, int, int);
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vsize_t pmap_map_chunk(vaddr_t, vaddr_t, paddr_t, vsize_t, int, int);
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void pmap_link_l2pt(vaddr_t, vaddr_t, pv_addr_t *);
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void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *);
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/*
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* Special page zero routine for use by the idle loop (no cache cleans).
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@ -1,4 +1,4 @@
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/* $NetBSD: brh_machdep.c,v 1.15 2003/06/14 17:01:09 thorpej Exp $ */
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/* $NetBSD: brh_machdep.c,v 1.16 2003/06/15 17:45:24 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
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@ -285,17 +285,8 @@ cpu_reboot(int howto, char *bootstr)
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cpu_reset();
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}
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/*
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* Mapping table for core kernel memory. This memory is mapped at init
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* time with section mappings.
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*/
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struct l1_sec_map {
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vaddr_t va;
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vaddr_t pa;
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vsize_t size;
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vm_prot_t prot;
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int cache;
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} l1_sec_table[] = {
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/* Static device mappings. */
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static const struct pmap_devmap brh_devmap[] = {
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{
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BRH_PCI_CONF_VBASE,
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BECC_PCI_CONF_BASE,
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@ -654,26 +645,8 @@ initarm(void *arg)
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pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/*
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* Map devices we can map w/ section mappings.
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*/
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loop = 0;
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while (l1_sec_table[loop].size) {
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vm_size_t sz;
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#ifdef VERBOSE_INIT_ARM
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printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
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l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
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l1_sec_table[loop].va);
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#endif
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for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
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pmap_map_section(l1pagetable,
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l1_sec_table[loop].va + sz,
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l1_sec_table[loop].pa + sz,
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l1_sec_table[loop].prot,
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l1_sec_table[loop].cache);
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++loop;
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}
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/* Map the statically mapped devices. */
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pmap_devmap_bootstrap(l1pagetable, brh_devmap);
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/*
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* Give the XScale global cache clean code an appropriately
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@ -1,4 +1,4 @@
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/* $NetBSD: integrator_machdep.c,v 1.41 2003/06/14 17:01:10 thorpej Exp $ */
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/* $NetBSD: integrator_machdep.c,v 1.42 2003/06/15 17:45:24 thorpej Exp $ */
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/*
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* Copyright (c) 2001,2002 ARM Ltd
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@ -319,17 +319,8 @@ cpu_reboot(int howto, char *bootstr)
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/*NOTREACHED*/
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}
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/*
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* Mapping table for core kernel memory. This memory is mapped at init
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* time with section mappings.
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*/
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struct l1_sec_map {
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vaddr_t va;
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vaddr_t pa;
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vsize_t size;
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vm_prot_t prot;
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int cache;
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} l1_sec_table[] = {
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/* Statically mapped devices. */
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static const struct pmap_devmap integrator_devmap[] = {
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#if NPLCOM > 0 && defined(PLCONSOLE)
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{
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UART0_BOOT_BASE,
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@ -361,7 +352,8 @@ struct l1_sec_map {
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IFPGA_PCI_CONF_BASE,
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IFPGA_PCI_CONF_VSIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE },
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PTE_NOCACHE
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},
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#endif
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{
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@ -672,24 +664,9 @@ initarm(void *arg)
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pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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#endif
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/* Map the core memory needed before autoconfig */
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loop = 0;
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while (l1_sec_table[loop].size) {
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vm_size_t sz;
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#ifdef VERBOSE_INIT_ARM
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printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
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l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
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l1_sec_table[loop].va);
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#endif
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for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
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pmap_map_section(l1pagetable,
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l1_sec_table[loop].va + sz,
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l1_sec_table[loop].pa + sz,
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l1_sec_table[loop].prot,
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l1_sec_table[loop].cache);
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++loop;
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}
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/* Map the statically mapped devices. */
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pmap_devmap_bootstrap(l1pagetable, integrator_devmap);
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/*
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* Now we have the real page tables in place so we can switch to them.
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@ -1,4 +1,4 @@
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/* $NetBSD: iq80310_machdep.c,v 1.58 2003/06/14 17:01:10 thorpej Exp $ */
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/* $NetBSD: iq80310_machdep.c,v 1.59 2003/06/15 17:45:25 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
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@ -286,17 +286,8 @@ cpu_reboot(int howto, char *bootstr)
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/*NOTREACHED*/
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}
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/*
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* Mapping table for core kernel memory. This memory is mapped at init
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* time with section mappings.
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*/
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struct l1_sec_map {
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vaddr_t va;
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vaddr_t pa;
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vsize_t size;
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vm_prot_t prot;
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int cache;
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} l1_sec_table[] = {
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/* Static device mappings. */
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static const struct pmap_devmap iq80310_devmap[] = {
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/*
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* Map the on-board devices VA == PA so that we can access them
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* with the MMU on or off.
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@ -308,6 +299,27 @@ struct l1_sec_map {
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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IQ80310_PIOW_VBASE,
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I80312_PCI_XLATE_PIOW_BASE,
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I80312_PCI_XLATE_IOSIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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IQ80310_SIOW_VBASE,
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I80312_PCI_XLATE_SIOW_BASE,
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I80312_PCI_XLATE_IOSIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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IQ80310_80312_VBASE,
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I80312_PMMR_BASE,
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I80312_PMMR_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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0,
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@ -630,60 +642,8 @@ initarm(void *arg)
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pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/*
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* Map devices we can map w/ section mappings.
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*/
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loop = 0;
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while (l1_sec_table[loop].size) {
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vm_size_t sz;
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#ifdef VERBOSE_INIT_ARM
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printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
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l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
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l1_sec_table[loop].va);
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#endif
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for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
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pmap_map_section(l1pagetable,
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l1_sec_table[loop].va + sz,
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l1_sec_table[loop].pa + sz,
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l1_sec_table[loop].prot,
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l1_sec_table[loop].cache);
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++loop;
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}
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/*
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* Map the PCI I/O spaces and i80312 registers. These are too
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* small to be mapped w/ section mappings.
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*/
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#ifdef VERBOSE_INIT_ARM
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printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
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I80312_PCI_XLATE_PIOW_BASE,
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I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
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IQ80310_PIOW_VBASE);
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#endif
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pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
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I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
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#ifdef VERBOSE_INIT_ARM
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printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
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I80312_PCI_XLATE_SIOW_BASE,
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I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
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IQ80310_SIOW_VBASE);
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#endif
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pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
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I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
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#ifdef VERBOSE_INIT_ARM
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printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
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I80312_PMMR_BASE,
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I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
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IQ80310_80312_VBASE);
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#endif
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pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
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I80312_PMMR_BASE, I80312_PMMR_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
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/* Map the statically mapped devices. */
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pmap_devmap_bootstrap(l1pagetable, iq80310_devmap);
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/*
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* Give the XScale global cache clean code an appropriately
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@ -1,4 +1,4 @@
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/* $NetBSD: iq80321_machdep.c,v 1.27 2003/06/14 17:01:10 thorpej Exp $ */
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/* $NetBSD: iq80321_machdep.c,v 1.28 2003/06/15 17:45:25 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
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@ -321,17 +321,8 @@ cpu_reboot(int howto, char *bootstr)
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for (;;);
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}
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/*
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* Mapping table for core kernel memory. This memory is mapped at init
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* time with section mappings.
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*/
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struct l1_sec_map {
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vaddr_t va;
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vaddr_t pa;
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vsize_t size;
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vm_prot_t prot;
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int cache;
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} l1_sec_table[] = {
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/* Static device mappings. */
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static const struct pmap_devmap iq80321_devmap[] = {
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/*
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* Map the on-board devices VA == PA so that we can access them
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* with the MMU on or off.
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@ -345,6 +336,22 @@ struct l1_sec_map {
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},
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{
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IQ80321_IOW_VBASE,
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VERDE_OUT_XLATE_IO_WIN0_BASE,
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VERDE_OUT_XLATE_IO_WIN_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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IQ80321_80321_VBASE,
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VERDE_PMMR_BASE,
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VERDE_PMMR_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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0,
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0,
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0,
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@ -648,50 +655,8 @@ initarm(void *arg)
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pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/*
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* Map devices we can map w/ section mappings.
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*/
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loop = 0;
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while (l1_sec_table[loop].size) {
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vm_size_t sz;
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#ifdef VERBOSE_INIT_ARM
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printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
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l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
|
||||
l1_sec_table[loop].va);
|
||||
#endif
|
||||
for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
|
||||
pmap_map_section(l1pagetable,
|
||||
l1_sec_table[loop].va + sz,
|
||||
l1_sec_table[loop].pa + sz,
|
||||
l1_sec_table[loop].prot,
|
||||
l1_sec_table[loop].cache);
|
||||
++loop;
|
||||
}
|
||||
|
||||
/*
|
||||
* Map the PCI I/O spaces and i80321 registers. These are too
|
||||
* small to be mapped w/ section mappings.
|
||||
*/
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("Mapping IOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
|
||||
VERDE_OUT_XLATE_IO_WIN0_BASE,
|
||||
VERDE_OUT_XLATE_IO_WIN0_BASE + VERDE_OUT_XLATE_IO_WIN_SIZE - 1,
|
||||
IQ80321_IOW_VBASE);
|
||||
#endif
|
||||
pmap_map_chunk(l1pagetable, IQ80321_IOW_VBASE,
|
||||
VERDE_OUT_XLATE_IO_WIN0_BASE, VERDE_OUT_XLATE_IO_WIN_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("Mapping 80321 0x%08lx -> 0x%08lx @ 0x%08lx\n",
|
||||
VERDE_PMMR_BASE,
|
||||
VERDE_PMMR_BASE + VERDE_PMMR_SIZE - 1,
|
||||
IQ80321_80321_VBASE);
|
||||
#endif
|
||||
pmap_map_chunk(l1pagetable, IQ80321_80321_VBASE,
|
||||
VERDE_PMMR_BASE, VERDE_PMMR_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
/* Map the statically mapped devices. */
|
||||
pmap_devmap_bootstrap(l1pagetable, iq80321_devmap);
|
||||
|
||||
/*
|
||||
* Give the XScale global cache clean code an appropriately
|
||||
|
||||
Loading…
Reference in New Issue
Block a user