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- Complete vm_offset_t purge for mips processor. 

- bzero() -> memset() and bcopy() -> memcpy().
- Garbage collection in trap.c and db_interface.c.
This commit is contained in:
nisimura 1999-01-06 04:11:25 +00:00
parent 25c5fbcb63
commit 858e67e157
18 changed files with 364 additions and 487 deletions
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8
sys/arch/mips/include/db_machdep.h
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@ -1,4 +1,4 @@
/* $NetBSD: db_machdep.h,v 1.4 1997/11/18 21:13:17 mhitch Exp $ */ /* $NetBSD: db_machdep.h,v 1.5 1999/01/06 04:11:28 nisimura Exp $ */
/* /*
* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author) * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@ -41,7 +41,7 @@
#include <mips/proc.h> /* register state */ #include <mips/proc.h> /* register state */
typedef vm_offset_t db_addr_t; /* address - unsigned */ typedef vaddr_t db_addr_t; /* address - unsigned */
typedef long db_expr_t; /* expression - signed */ typedef long db_expr_t; /* expression - signed */
typedef struct frame db_regs_t; typedef struct frame db_regs_t;
@ -78,8 +78,8 @@ db_addr_t db_disasm_insn __P((int insn, db_addr_t loc, boolean_t altfmt));
/* /*
* Entrypoints to DDB for kernel, keyboard drivers, init hook * Entrypoints to DDB for kernel, keyboard drivers, init hook
*/ */
void kdb_kbd_trap __P((db_regs_t *)); void kdb_kbd_trap __P((int *));
int kdb_trap __P((int type, db_regs_t *)); int kdb_trap __P((int type, int *));
void db_machine_init __P((void)); void db_machine_init __P((void));

23
sys/arch/mips/include/locore.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.h,v 1.14 1998/09/11 16:46:31 jonathan Exp $ */ /* $NetBSD: locore.h,v 1.15 1999/01/06 04:11:27 nisimura Exp $ */
/* /*
* Copyright 1996 The Board of Trustees of The Leland Stanford * Copyright 1996 The Board of Trustees of The Leland Stanford
@ -64,13 +64,13 @@ extern u_int32_t mips_read_statusreg __P((void));
extern void mips1_ConfigCache __P((void)); extern void mips1_ConfigCache __P((void));
extern void mips1_FlushCache __P((void)); extern void mips1_FlushCache __P((void));
extern void mips1_FlushDCache __P((vm_offset_t addr, vm_offset_t len)); extern void mips1_FlushDCache __P((vaddr_t addr, vaddr_t len));
extern void mips1_FlushICache __P((vm_offset_t addr, vm_offset_t len)); extern void mips1_FlushICache __P((vaddr_t addr, vaddr_t len));
extern void mips1_ForceCacheUpdate __P((void)); extern void mips1_ForceCacheUpdate __P((void));
extern void mips1_SetPID __P((int pid)); extern void mips1_SetPID __P((int pid));
extern void mips1_TLBFlush __P((int numtlb)); extern void mips1_TLBFlush __P((int numtlb));
extern void mips1_TLBFlushAddr __P( /* XXX Really pte highpart ? */ extern void mips1_TLBFlushAddr __P( /* XXX Really pte highpart ? */
(vm_offset_t addr)); (vaddr_t addr));
extern int mips1_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int)); extern int mips1_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
extern void mips1_TLBWriteIndexed __P((u_int index, u_int high, extern void mips1_TLBWriteIndexed __P((u_int index, u_int high,
u_int low)); u_int low));
@ -81,14 +81,14 @@ extern void mips1_cpu_switch_resume __P((void));
extern void mips3_ConfigCache __P((void)); extern void mips3_ConfigCache __P((void));
extern void mips3_FlushCache __P((void)); extern void mips3_FlushCache __P((void));
extern void mips3_FlushDCache __P((vm_offset_t addr, vm_offset_t len)); extern void mips3_FlushDCache __P((vaddr_t addr, vaddr_t len));
extern void mips3_FlushICache __P((vm_offset_t addr, vm_offset_t len)); extern void mips3_FlushICache __P((vaddr_t addr, vaddr_t len));
extern void mips3_ForceCacheUpdate __P((void)); extern void mips3_ForceCacheUpdate __P((void));
extern void mips3_HitFlushDCache __P((vm_offset_t, int)); extern void mips3_HitFlushDCache __P((vaddr_t, int));
extern void mips3_SetPID __P((int pid)); extern void mips3_SetPID __P((int pid));
extern void mips3_TLBFlush __P((int numtlb)); extern void mips3_TLBFlush __P((int numtlb));
extern void mips3_TLBFlushAddr __P( /* XXX Really pte highpart ? */ extern void mips3_TLBFlushAddr __P( /* XXX Really pte highpart ? */
(vm_offset_t addr)); (vaddr_t addr));
extern int mips3_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int)); extern int mips3_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
struct tlb; struct tlb;
extern void mips3_TLBRead __P((int, struct tlb *)); extern void mips3_TLBRead __P((int, struct tlb *));
@ -116,12 +116,12 @@ extern void mips3_write_compare __P((u_int32_t));
typedef struct { typedef struct {
void (*configCache) __P((void)); void (*configCache) __P((void));
void (*flushCache) __P((void)); void (*flushCache) __P((void));
void (*flushDCache) __P((vm_offset_t addr, vm_offset_t len)); void (*flushDCache) __P((vaddr_t addr, vaddr_t len));
void (*flushICache) __P((vm_offset_t addr, vm_offset_t len)); void (*flushICache) __P((vaddr_t addr, vaddr_t len));
void (*forceCacheUpdate) __P((void)); void (*forceCacheUpdate) __P((void));
void (*setTLBpid) __P((int pid)); void (*setTLBpid) __P((int pid));
void (*tlbFlush) __P((int numtlb)); void (*tlbFlush) __P((int numtlb));
void (*tlbFlushAddr) __P((vm_offset_t)); /* XXX Really pte highpart ? */ void (*tlbFlushAddr) __P((vaddr_t)); /* XXX Really pte highpart ? */
int (*tlbUpdate) __P((u_int highreg, u_int lowreg)); int (*tlbUpdate) __P((u_int highreg, u_int lowreg));
void (*wbflush) __P((void)); void (*wbflush) __P((void));
void (*proc_trampoline) __P((void)); void (*proc_trampoline) __P((void));
@ -229,7 +229,6 @@ extern u_int mips_L1ICacheLSize;
extern int mips_L2CachePresent; extern int mips_L2CachePresent;
extern u_int mips_L2CacheLSize; extern u_int mips_L2CacheLSize;
extern u_int mips_CacheAliasMask; extern u_int mips_CacheAliasMask;
extern struct intr_tab intr_tab[];
#ifdef MIPS3 #ifdef MIPS3
extern int mips3_L1TwoWayCache; extern int mips3_L1TwoWayCache;

18
sys/arch/mips/include/pmap.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmap.h,v 1.21 1998/11/29 03:18:32 jonathan Exp $ */ /* $NetBSD: pmap.h,v 1.22 1999/01/06 04:11:25 nisimura Exp $ */
/* /*
* Copyright (c) 1987 Carnegie-Mellon University * Copyright (c) 1987 Carnegie-Mellon University
@ -66,8 +66,8 @@
* dynamically allocated at boot time. * dynamically allocated at boot time.
*/ */
#define mips_trunc_seg(x) ((vm_offset_t)(x) & ~SEGOFSET) #define mips_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET)
#define mips_round_seg(x) (((vm_offset_t)(x) + SEGOFSET) & ~SEGOFSET) #define mips_round_seg(x) (((vaddr_t)(x) + SEGOFSET) & ~SEGOFSET)
#define pmap_segmap(m, v) ((m)->pm_segtab->seg_tab[((v) >> SEGSHIFT)]) #define pmap_segmap(m, v) ((m)->pm_segtab->seg_tab[((v) >> SEGSHIFT)])
#define PMAP_SEGTABSIZE 512 #define PMAP_SEGTABSIZE 512
@ -98,7 +98,7 @@ typedef struct pmap {
typedef struct pv_entry { typedef struct pv_entry {
struct pv_entry *pv_next; /* next pv_entry */ struct pv_entry *pv_next; /* next pv_entry */
struct pmap *pv_pmap; /* pmap where mapping lies */ struct pmap *pv_pmap; /* pmap where mapping lies */
vm_offset_t pv_va; /* virtual address for mapping */ vaddr_t pv_va; /* virtual address for mapping */
int pv_flags; /* some flags for the mapping */ int pv_flags; /* some flags for the mapping */
} *pv_entry_t; } *pv_entry_t;
@ -121,8 +121,8 @@ struct pmap kernel_pmap_store;
*/ */
void pmap_bootstrap __P((void)); void pmap_bootstrap __P((void));
void pmap_set_modified __P((vm_offset_t)); void pmap_set_modified __P((paddr_t));
void pmap_set_referenced __P((vm_offset_t)); void pmap_set_referenced __P((paddr_t));
/* /*
* pmap_prefer() helps reduce virtual-coherency exceptions in * pmap_prefer() helps reduce virtual-coherency exceptions in
@ -130,7 +130,7 @@ void pmap_set_referenced __P((vm_offset_t));
*/ */
#ifdef MIPS3 #ifdef MIPS3
#define PMAP_PREFER(pa, va) pmap_prefer((pa), (va)) #define PMAP_PREFER(pa, va) pmap_prefer((pa), (va))
void pmap_prefer __P((vm_offset_t, vm_offset_t *)); void pmap_prefer __P((vaddr_t, vaddr_t *));
#endif /* MIPS3 */ #endif /* MIPS3 */
#define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */ #define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */
@ -144,9 +144,9 @@ void pmap_prefer __P((vm_offset_t, vm_offset_t *));
/* /*
* Kernel cache operations for the user-space API * Kernel cache operations for the user-space API
*/ */
int mips_user_cacheflush __P((struct proc *p, vm_offset_t va, int nbytes, int mips_user_cacheflush __P((struct proc *p, vaddr_t va, int nbytes,
int whichcache)); int whichcache));
int mips_user_cachectl __P((struct proc *p, vm_offset_t va, int nbytes, int mips_user_cachectl __P((struct proc *p, vaddr_t va, int nbytes,
int ctl)); int ctl));
#endif /* _KERNEL */ #endif /* _KERNEL */

22
sys/arch/mips/include/pte.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: pte.h,v 1.5 1997/06/21 04:10:42 mhitch Exp $ */ /* $NetBSD: pte.h,v 1.6 1999/01/06 04:11:25 nisimura Exp $ */
/*- /*-
* Copyright (c) 1997 The NetBSD Foundation, Inc. * Copyright (c) 1997 The NetBSD Foundation, Inc.
@ -80,7 +80,7 @@ typedef union pt_entry {
#define mips_pg_nv_bit() (MIPS1_PG_NV) /* same on mips1 and mips3 */ #define mips_pg_nv_bit() (MIPS1_PG_NV) /* same on mips1 and mips3 */
int pmap_is_page_ro(pmap_t, vm_offset_t, int); int pmap_is_page_ro(pmap_t, vaddr_t, int);
/* MIPS1-only */ /* MIPS1-only */
@ -100,7 +100,7 @@ int pmap_is_page_ro(pmap_t, vm_offset_t, int);
#define PTE_TO_PADDR(pte) MIPS1_PTE_TO_PADDR((pte)) #define PTE_TO_PADDR(pte) MIPS1_PTE_TO_PADDR((pte))
#define PAGE_IS_RDONLY(pte, va) MIPS1_PAGE_IS_RDONLY((pte), (va)) #define PAGE_IS_RDONLY(pte, va) MIPS1_PAGE_IS_RDONLY((pte), (va))
#define pfn_to_vad(x) mips1_pfn_to_vad((vm_offset_t)(x)) #define pfn_to_vad(x) mips1_pfn_to_vad((vaddr_t)(x))
#define vad_to_pfn(x) mips1_vad_to_pfn((x)) #define vad_to_pfn(x) mips1_vad_to_pfn((x))
#endif /* mips1 */ #endif /* mips1 */
@ -122,7 +122,7 @@ int pmap_is_page_ro(pmap_t, vm_offset_t, int);
#define PTE_TO_PADDR(pte) MIPS3_PTE_TO_PADDR((pte)) #define PTE_TO_PADDR(pte) MIPS3_PTE_TO_PADDR((pte))
#define PAGE_IS_RDONLY(pte, va) MIPS3_PAGE_IS_RDONLY((pte), (va)) #define PAGE_IS_RDONLY(pte, va) MIPS3_PAGE_IS_RDONLY((pte), (va))
#define pfn_to_vad(x) mips3_pfn_to_vad((vm_offset_t)(x)) #define pfn_to_vad(x) mips3_pfn_to_vad((vaddr_t)(x))
#define vad_to_pfn(x) mips3_vad_to_pfn((x)) #define vad_to_pfn(x) mips3_vad_to_pfn((x))
#endif /* mips3 */ #endif /* mips3 */
@ -132,7 +132,7 @@ int pmap_is_page_ro(pmap_t, vm_offset_t, int);
static __inline int static __inline int
mips_pg_v(unsigned int entry), mips_pg_v(unsigned int entry),
mips_pg_wired(unsigned int entry), mips_pg_wired(unsigned int entry),
PAGE_IS_RDONLY(unsigned int pte, vm_offset_t va); PAGE_IS_RDONLY(unsigned int pte, vaddr_t va);
static __inline unsigned int static __inline unsigned int
mips_pg_wired_bit(void), mips_pg_m_bit(void), mips_pg_wired_bit(void), mips_pg_m_bit(void),
@ -143,8 +143,8 @@ static __inline unsigned int
mips_pg_global_bit(void), mips_pg_global_bit(void),
PTE_TO_PADDR(unsigned int entry); PTE_TO_PADDR(unsigned int entry);
static __inline vm_offset_t pfn_to_vad(unsigned int x); static __inline vaddr_t pfn_to_vad(unsigned int x);
static __inline int vad_to_pfn(vm_offset_t x); static __inline int vad_to_pfn(vaddr_t x);
static __inline int static __inline int
@ -242,14 +242,14 @@ PTE_TO_PADDR(pte)
static __inline int static __inline int
PAGE_IS_RDONLY(pte, va) PAGE_IS_RDONLY(pte, va)
unsigned int pte; unsigned int pte;
vm_offset_t va; vaddr_t va;
{ {
if (CPUISMIPS3) if (CPUISMIPS3)
return (MIPS3_PAGE_IS_RDONLY(pte, va)); return (MIPS3_PAGE_IS_RDONLY(pte, va));
return (MIPS1_PAGE_IS_RDONLY(pte, va)); return (MIPS1_PAGE_IS_RDONLY(pte, va));
} }
static __inline vm_offset_t static __inline vaddr_t
pfn_to_vad(x) pfn_to_vad(x)
unsigned int x; unsigned int x;
{ {
@ -260,7 +260,7 @@ pfn_to_vad(x)
static __inline int static __inline int
vad_to_pfn(x) vad_to_pfn(x)
vm_offset_t x; vaddr_t x;
{ {
if (CPUISMIPS3) if (CPUISMIPS3)
return (mips3_vad_to_pfn(x)); return (mips3_vad_to_pfn(x));
@ -275,7 +275,7 @@ vad_to_pfn(x)
* Kernel virtual address to page table entry and visa versa. * Kernel virtual address to page table entry and visa versa.
*/ */
#define kvtopte(va) \ #define kvtopte(va) \
(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT)) (Sysmap + (((vaddr_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
#define ptetokv(pte) \ #define ptetokv(pte) \
((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS) ((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)

6
sys/arch/mips/include/sysarch.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: sysarch.h,v 1.2 1998/02/25 21:27:47 perry Exp $ */ /* $NetBSD: sysarch.h,v 1.3 1999/01/06 04:11:27 nisimura Exp $ */
#ifndef _MIPS_SYSARCH_H_ #ifndef _MIPS_SYSARCH_H_
#define _MIPS_SYSARCH_H_ #define _MIPS_SYSARCH_H_
@ -11,13 +11,13 @@
struct mips_cacheflush_args { struct mips_cacheflush_args {
vm_offset_t va; vaddr_t va;
int nbytes; int nbytes;
int whichcache; int whichcache;
}; };
struct mips_cachectl_args { struct mips_cachectl_args {
vm_offset_t va; vaddr_t va;
int nbytes; int nbytes;
int ctl; int ctl;
}; };

32
sys/arch/mips/include/trap.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.h,v 1.10 1998/10/24 01:36:10 jonathan Exp $ */ /* $NetBSD: trap.h,v 1.11 1999/01/06 04:11:27 nisimura Exp $ */
/* /*
* Copyright (c) 1988 University of Utah. * Copyright (c) 1988 University of Utah.
@ -42,22 +42,6 @@
* @(#)trap.h 8.1 (Berkeley) 6/10/93 * @(#)trap.h 8.1 (Berkeley) 6/10/93
*/ */
/*
* special trap-handling support
*/
/* Return the resulting PC as if the branch was executed. */
extern u_int MachEmulateBranch __P((u_int* regs, u_int instPC,
u_int fpcCSR, int allowNonBranch));
#ifdef DEBUG
extern int cpu_singlestep __P((register struct proc *p));
#endif
#if defined(DEBUG) || defined(DDB)
extern int kdbpeek __P((vm_offset_t addr));
#endif
/* /*
* Trap codes * Trap codes
* also known in trap.c for name strings * also known in trap.c for name strings
@ -88,12 +72,10 @@ extern int kdbpeek __P((vm_offset_t addr));
#define T_USER 0x20 /* user-mode flag or'ed with type */ #define T_USER 0x20 /* user-mode flag or'ed with type */
#ifdef _KERNEL
extern int (*mips_hardware_intr) __P((u_int mask, u_int pc, u_int statusReg,
u_int causeReg));
#endif /* _KERNEL */
#ifdef _KERNEL #ifdef DEBUG
extern int (*mips_hardware_intr) __P((u_int mask, u_int pc, u_int statusReg, extern int cpu_singlestep __P((struct proc *));
u_int causeReg)); #endif
#endif /* _KERNEL */ #if defined(DEBUG) || defined(DDB)
extern int kdbpeek __P((vaddr_t addr));
#endif

13
sys/arch/mips/include/types.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: types.h,v 1.16 1998/08/13 02:10:39 eeh Exp $ */ /* $NetBSD: types.h,v 1.17 1999/01/06 04:11:26 nisimura Exp $ */
/*- /*-
* Copyright (c) 1992, 1993 * Copyright (c) 1992, 1993
@ -51,13 +51,10 @@ typedef struct label_t {
/* NB: This should probably be if defined(_KERNEL) */ /* NB: This should probably be if defined(_KERNEL) */
#if !defined(_POSIX_C_SOURCE) && !defined(_XOPEN_SOURCE) #if !defined(_POSIX_C_SOURCE) && !defined(_XOPEN_SOURCE)
typedef unsigned long vm_offset_t; typedef unsigned long paddr_t;
typedef unsigned long vm_size_t; typedef unsigned long psize_t;
typedef unsigned long vaddr_t;
typedef vm_offset_t paddr_t; typedef unsigned long vsize_t;
typedef vm_size_t psize_t;
typedef vm_offset_t vaddr_t;
typedef vm_size_t vsize_t;
#endif #endif
/* /*

12
sys/arch/mips/include/vmparam.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: vmparam.h,v 1.10 1998/02/25 23:26:41 thorpej Exp $ */ /* $NetBSD: vmparam.h,v 1.11 1999/01/06 04:11:26 nisimura Exp $ */
/* /*
* Copyright (c) 1988 University of Utah. * Copyright (c) 1988 University of Utah.
@ -217,11 +217,11 @@
*/ */
/* user/kernel map constants */ /* user/kernel map constants */
#define VM_MIN_ADDRESS ((vm_offset_t)0x00000000) #define VM_MIN_ADDRESS ((vaddr_t)0x00000000)
#define VM_MAXUSER_ADDRESS ((vm_offset_t)0x80000000) #define VM_MAXUSER_ADDRESS ((vaddr_t)0x80000000)
#define VM_MAX_ADDRESS ((vm_offset_t)0x80000000) #define VM_MAX_ADDRESS ((vaddr_t)0x80000000)
#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)0xC0000000) #define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xC0000000)
#define VM_MAX_KERNEL_ADDRESS ((vm_offset_t)0xFFFFC000) #define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xFFFFC000)
/* virtual sizes (bytes) for various kernel submaps */ /* virtual sizes (bytes) for various kernel submaps */
#define VM_MBUF_SIZE (NMBCLUSTERS*MCLBYTES) #define VM_MBUF_SIZE (NMBCLUSTERS*MCLBYTES)

6
sys/arch/mips/mips/compat_13_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: compat_13_machdep.c,v 1.5 1998/12/03 06:28:46 nisimura Exp $ */ /* $NetBSD: compat_13_machdep.c,v 1.6 1999/01/06 04:11:31 nisimura Exp $ */
/* /*
* Copyright 1996 The Board of Trustees of The Leland Stanford * Copyright 1996 The Board of Trustees of The Leland Stanford
@ -15,7 +15,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.5 1998/12/03 06:28:46 nisimura Exp $"); __KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.6 1999/01/06 04:11:31 nisimura Exp $");
#include <sys/param.h> #include <sys/param.h>
#include <sys/systm.h> #include <sys/systm.h>
@ -63,7 +63,7 @@ compat_13_sys_sigreturn(p, v, retval)
if ((error = copyin(scp, &ksc, sizeof(ksc))) != 0) if ((error = copyin(scp, &ksc, sizeof(ksc))) != 0)
return (error); return (error);
if (ksc.sc_regs[ZERO] != 0xACEDBADE) /* magic number */ if ((int)ksc.sc_regs[ZERO] != 0xACEDBADE) /* magic number */
return (EINVAL); return (EINVAL);
/* Resture the register context. */ /* Resture the register context. */

5
sys/arch/mips/mips/cpu_exec.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu_exec.c,v 1.18 1998/12/03 06:28:45 nisimura Exp $ */ /* $NetBSD: cpu_exec.c,v 1.19 1999/01/06 04:11:28 nisimura Exp $ */
/* /*
* Copyright (c) 1992, 1993 * Copyright (c) 1992, 1993
@ -144,9 +144,10 @@ cpu_exec_ecoff_setregs(p, epp, stack)
u_long stack; u_long stack;
{ {
struct ecoff_exechdr *execp = (struct ecoff_exechdr *)epp->ep_hdr; struct ecoff_exechdr *execp = (struct ecoff_exechdr *)epp->ep_hdr;
struct frame *f = (struct frame *)p->p_md.md_regs;
setregs(p, epp, stack); setregs(p, epp, stack);
((struct frame *)p->p_md.md_regs)->f_regs[GP] = execp->a.gp_value; f->f_regs[GP] = (register_t)execp->a.gp_value;
} }
/* /*

172
sys/arch/mips/mips/db_interface.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: db_interface.c,v 1.7 1998/11/25 01:14:48 nisimura Exp $ */ /* $NetBSD: db_interface.c,v 1.8 1999/01/06 04:11:30 nisimura Exp $ */
/* /*
* Mach Operating System * Mach Operating System
@ -66,10 +66,9 @@ void db_trapdump_cmd __P((db_expr_t addr, int have_addr, db_expr_t count,
void db_tlbdump_cmd __P((db_expr_t addr, int have_addr, db_expr_t count, void db_tlbdump_cmd __P((db_expr_t addr, int have_addr, db_expr_t count,
char *modif)); char *modif));
extern int kdbpeek __P((vm_offset_t addr)); extern int kdbpeek __P((vaddr_t));
extern void kdbpoke __P((vm_offset_t addr, int newval)); extern void kdbpoke __P((vaddr_t, int));
extern unsigned MachEmulateBranch __P((unsigned *regsPtr, extern vaddr_t MachEmulateBranch __P((struct frame *, vaddr_t, unsigned, int));
unsigned instPC, unsigned fpcCSR, int allowNonBranch));
extern void mips1_dump_tlb __P((int, int, void (*printfn)(const char*, ...))); extern void mips1_dump_tlb __P((int, int, void (*printfn)(const char*, ...)));
extern void mips3_dump_tlb __P((int, int, void (*printfn)(const char*, ...))); extern void mips3_dump_tlb __P((int, int, void (*printfn)(const char*, ...)));
@ -81,18 +80,20 @@ extern void mips3_dump_tlb __P((int, int, void (*printfn)(const char*, ...)));
* Really belongs wherever kdbpeek() is defined. * Really belongs wherever kdbpeek() is defined.
*/ */
void void
kdbpoke(vm_offset_t addr, int newval) kdbpoke(addr, newval)
vaddr_t addr;
int newval;
{ {
*(int*) addr = newval; *(int*) addr = newval;
wbflush(); wbflush();
if (CPUISMIPS3) { if (CPUISMIPS3) {
#ifdef MIPS3 #ifdef MIPS3
mips3_HitFlushDCache((vm_offset_t) addr, sizeof(int)); mips3_HitFlushDCache(addr, sizeof(int));
mips3_FlushICache((vm_offset_t) addr, sizeof(int)); mips3_FlushICache(addr, sizeof(int));
#endif #endif
} else { } else {
#ifdef MIPS1 #ifdef MIPS1
mips1_FlushICache((vm_offset_t) addr, sizeof(int)); mips1_FlushICache(addr, sizeof(int));
#endif #endif
} }
} }
@ -102,7 +103,7 @@ kdbpoke(vm_offset_t addr, int newval)
*/ */
void void
kdb_kbd_trap(tf) kdb_kbd_trap(tf)
db_regs_t *tf; int *tf;
{ {
if (db_active == 0 && (boothowto & RB_KDB)) { if (db_active == 0 && (boothowto & RB_KDB)) {
printf("\n\nkernel: keyboard interrupt\n"); printf("\n\nkernel: keyboard interrupt\n");
@ -115,8 +116,8 @@ kdb_kbd_trap(tf)
*/ */
int int
kdb_trap(type, tf) kdb_trap(type, tf)
int type; int type;
register db_regs_t *tf; int *tf;
{ {
/* fb_unblank(); */ /* fb_unblank(); */
@ -138,8 +139,8 @@ kdb_trap(type, tf)
/* Should switch to kdb`s own stack here. */ /* Should switch to kdb`s own stack here. */
/* XXX copy trapframe to ddb_regs */ /* XXX copy trapframe to ddb_regs */
ddb_regs = *tf; ddb_regs = *(db_regs_t *)tf;
db_active++; db_active++;
cnpollc(1); cnpollc(1);
@ -148,7 +149,7 @@ kdb_trap(type, tf)
db_active--; db_active--;
/* write ddb_regs back to trapframe */ /* write ddb_regs back to trapframe */
*tf = ddb_regs; *(db_regs_t *)tf = ddb_regs;
return (1); return (1);
} }
@ -165,16 +166,16 @@ Debugger()
*/ */
void void
db_read_bytes(addr, size, data) db_read_bytes(addr, size, data)
register vm_offset_t addr; vaddr_t addr;
register size_t size; size_t size;
register char *data; char *data;
{ {
while (size >= 4) while (size >= 4)
*((int*)data)++ = kdbpeek(addr), addr += 4, size -= 4; *((int*)data)++ = kdbpeek(addr), addr += 4, size -= 4;
if (size) { if (size) {
unsigned tmp; unsigned tmp;
register char *dst = (char*)data; char *dst = (char*)data;
tmp = kdbpeek(addr); tmp = kdbpeek(addr);
while (size--) { while (size--) {
@ -197,9 +198,9 @@ db_read_bytes(addr, size, data)
*/ */
void void
db_write_bytes(addr, size, data) db_write_bytes(addr, size, data)
register vm_offset_t addr; vaddr_t addr;
register size_t size; size_t size;
register char *data; char *data;
{ {
#ifdef DEBUG_DDB #ifdef DEBUG_DDB
printf("db_write_bytes(%lx, %d, %p, val %x)\n", addr, size, data, printf("db_write_bytes(%lx, %d, %p, val %x)\n", addr, size, data,
@ -210,7 +211,7 @@ db_write_bytes(addr, size, data)
kdbpoke(addr++, *(int*)data), addr += 4, size -= 4; kdbpoke(addr++, *(int*)data), addr += 4, size -= 4;
if (size) { if (size) {
unsigned tmp = kdbpeek(addr), tmp1 = 0; unsigned tmp = kdbpeek(addr), tmp1 = 0;
register char *src = (char*)data; char *src = (char*)data;
tmp >>= (size << 3); tmp >>= (size << 3);
tmp <<= (size << 3); tmp <<= (size << 3);
@ -283,82 +284,48 @@ db_machine_init()
db_machine_commands_install(mips_db_command_table); db_machine_commands_install(mips_db_command_table);
} }
/*
* MD functions for software single-step.
* see db_ for a description.
*/
/*
* inst_branch()
* returns TRUE iff the instruction might branch.
*/
boolean_t boolean_t
inst_branch(int inst) inst_branch(inst)
int inst;
{ {
InstFmt i; InstFmt i;
int delay; int delay;
i.word = inst; i.word = inst;
delay = 0; delay = 0;
switch (i.JType.op) { switch (i.JType.op) {
case OP_BCOND: case OP_BCOND:
case OP_J:
case OP_BLEZ: case OP_JAL:
case OP_BLEZL:
case OP_BGTZ:
case OP_BGTZL:
case OP_BEQ: case OP_BEQ:
case OP_BEQL:
case OP_BNE: case OP_BNE:
case OP_BLEZ:
case OP_BGTZ:
case OP_BEQL:
case OP_BNEL: case OP_BNEL:
case OP_BLEZL:
case OP_BGTZL:
delay = 1; delay = 1;
break; break;
case OP_COP0: case OP_COP0:
case OP_COP1:
switch (i.RType.rs) { switch (i.RType.rs) {
case OP_BCx: case OP_BCx:
case OP_BCy: case OP_BCy:
delay = 1; delay = 1;
} }
break; break;
case OP_COP1:
switch (i.RType.rs) {
case OP_BCx:
case OP_BCy:
delay = 1;
break;
default:
break;
};
break;
case OP_J:
case OP_JAL:
delay = 1;
break;
} }
#ifdef DEBUG_DDB
printf(" inst_branch(0x%x) returns %d\n",
inst, delay);
#endif
return delay; return delay;
} }
/*
*
*/
boolean_t boolean_t
inst_call(inst) inst_call(inst)
int inst; int inst;
{ {
boolean_t call;
InstFmt i; InstFmt i;
int call;
i.word = inst; i.word = inst;
if (i.JType.op == OP_SPECIAL if (i.JType.op == OP_SPECIAL
@ -368,71 +335,44 @@ inst_call(inst)
call = 1; call = 1;
else else
call = 0; call = 0;
#ifdef DEBUG_DDB
printf(" inst_call(0x%x) returns 0x%d\n", inst, call);
#endif
return call; return call;
} }
/*
* inst_unconditional_flow_transfer()
* return TRUE if the instruction is an unconditional
* transter of flow (i.e. unconditional branch)
*/
boolean_t boolean_t
inst_unconditional_flow_transfer(int inst) inst_unconditional_flow_transfer(inst)
int inst;
{ {
InstFmt i; InstFmt i;
int jump; boolean_t jump;
i.word = inst; i.word = inst;
jump = (i.JType.op == OP_J); jump = (i.JType.op == OP_J);
#ifdef DEBUG_DDB
printf(" insn_unconditional_flow_transfer(0x%x) returns %d\n",
inst, jump);
#endif
return jump; return jump;
} }
/*
*
*/
db_addr_t db_addr_t
branch_taken(int inst, db_addr_t pc, db_regs_t *regs) branch_taken(inst, pc, regs)
int inst;
db_addr_t pc;
db_regs_t *regs;
{ {
vm_offset_t ra; vaddr_t ra;
unsigned fpucsr;
ra = (vm_offset_t)MachEmulateBranch(regs->f_regs, pc, fpucsr = (curproc) ? curproc->p_addr->u_pcb.pcb_fpregs.r_regs[32] : 0;
(curproc) ? curproc->p_addr->u_pcb.pcb_fpregs.r_regs[32]: 0, 0); ra = MachEmulateBranch((struct frame *)regs, pc, fpucsr, 0);
#ifdef DEBUG_DDB return ra;
printf(" branch_taken(0x%lx) returns 0x%lx\n", pc, ra);
#endif
return (ra);
} }
/*
* Returns the address of the first instruction following the
* one at "pc", which is either in the taken path of the branch
* (bd == TRUE) or not. This is for machines (e.g. mips) with
* branch delays.
*
* XXX (jrs) The above comment makes no sense. Maybe Jason is thinking
* of mips3 squashed branches?
* In any case, the kernel support can already find the address of the
* next instruction. We could just return that and put a single breakpoint
* at that address. All the cruft above can go.
*/
db_addr_t db_addr_t
next_instr_address(db_addr_t pc, boolean_t bd) next_instr_address(pc, bd)
db_addr_t pc;
boolean_t bd;
{ {
vaddr_t ra;
vm_offset_t ra; unsigned fpucsr;
ra = (vm_offset_t)MachEmulateBranch(ddb_regs.f_regs, pc,
(curproc)? curproc->p_addr->u_pcb.pcb_fpregs.r_regs[32]: 0, 1); fpucsr = (curproc) ? curproc->p_addr->u_pcb.pcb_fpregs.r_regs[32] : 0;
#ifdef DEBUG_DDB ra = MachEmulateBranch((struct frame *)&ddb_regs, pc, fpucsr, 1);
printf(" next_instr_addr(0x%lx, %d) returns 0x%lx\n", pc, bd, ra); return ra;
#endif
return ((db_addr_t) ra);
} }

12
sys/arch/mips/mips/db_trace.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: db_trace.c,v 1.3 1998/02/02 12:49:15 jonathan Exp $ */ /* $NetBSD: db_trace.c,v 1.4 1999/01/06 04:11:31 nisimura Exp $ */
/* /*
* Mach Operating System * Mach Operating System
@ -37,7 +37,7 @@
#include <ddb/db_sym.h> #include <ddb/db_sym.h>
extern int __start __P((void)); /* lowest kernel code address */ extern int __start __P((void)); /* lowest kernel code address */
extern vm_offset_t getreg_val __P((db_expr_t regno)); extern vaddr_t getreg_val __P((db_expr_t regno));
#define REG_ARG(i) (4+i) #define REG_ARG(i) (4+i)
#define SAVES_RA(x) isa_spill((x),31) #define SAVES_RA(x) isa_spill((x),31)
@ -73,8 +73,8 @@ extern void stacktrace_subr __P((int a0, int a1, int a2, int a3,
/* /*
* Stack trace helper. * Stack trace helper.
*/ */
void db_mips_stack_trace __P((int count, vm_offset_t stackp, void db_mips_stack_trace __P((int count, vaddr_t stackp,
vm_offset_t the_pc, vm_offset_t the_ra, int flags, vm_offset_t kstackp)); vaddr_t the_pc, vaddr_t the_ra, int flags, vaddr_t kstackp));
#define DB_SETF_REGS FCN_NULL #define DB_SETF_REGS FCN_NULL
@ -143,9 +143,9 @@ db_stack_trace_cmd(addr, have_addr, count, modif)
void void
db_mips_stack_trace(count, stackp, the_pc, the_ra, flags, kstackp) db_mips_stack_trace(count, stackp, the_pc, the_ra, flags, kstackp)
int count; int count;
vm_offset_t stackp, the_pc, the_ra; vaddr_t stackp, the_pc, the_ra;
int flags; int flags;
vm_offset_t kstackp; vaddr_t kstackp;
{ {
return; return;
} }

25
sys/arch/mips/mips/mem.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: mem.c,v 1.14 1998/11/19 15:38:23 mrg Exp $ */ /* $NetBSD: mem.c,v 1.15 1999/01/06 04:11:29 nisimura Exp $ */
/* /*
* Copyright (c) 1988 University of Utah. * Copyright (c) 1988 University of Utah.
@ -63,8 +63,8 @@
#include <uvm/uvm_extern.h> #include <uvm/uvm_extern.h>
#endif #endif
extern vm_offset_t avail_end; extern paddr_t avail_end;
caddr_t zeropage; void *zeropage;
/*ARGSUSED*/ /*ARGSUSED*/
int int
@ -95,9 +95,9 @@ mmrw(dev, uio, flags)
struct uio *uio; struct uio *uio;
int flags; int flags;
{ {
register vm_offset_t v; vaddr_t v;
register int c; int c;
register struct iovec *iov; struct iovec *iov;
int error = 0; int error = 0;
while (uio->uio_resid > 0 && error == 0) { while (uio->uio_resid > 0 && error == 0) {
@ -118,7 +118,7 @@ mmrw(dev, uio, flags)
if (v + c > ctob(physmem)) if (v + c > ctob(physmem))
return (EFAULT); return (EFAULT);
v += MIPS_KSEG0_START; v += MIPS_KSEG0_START;
error = uiomove((caddr_t)v, c, uio); error = uiomove((void *)v, c, uio);
continue; continue;
/* minor device 1 is kernel memory */ /* minor device 1 is kernel memory */
@ -131,14 +131,14 @@ mmrw(dev, uio, flags)
mips_round_page(MSGBUFSIZE)) && mips_round_page(MSGBUFSIZE)) &&
(v < MIPS_KSEG2_START || (v < MIPS_KSEG2_START ||
#if defined(UVM) #if defined(UVM)
!uvm_kernacc((caddr_t)v, c, !uvm_kernacc((void *)v, c,
uio->uio_rw == UIO_READ ? B_READ : B_WRITE))) uio->uio_rw == UIO_READ ? B_READ : B_WRITE)))
#else #else
!kernacc((caddr_t)v, c, !kernacc((void *)v, c,
uio->uio_rw == UIO_READ ? B_READ : B_WRITE))) uio->uio_rw == UIO_READ ? B_READ : B_WRITE)))
#endif #endif
return (EFAULT); return (EFAULT);
error = uiomove((caddr_t)v, c, uio); error = uiomove((void *)v, c, uio);
continue; continue;
/* minor device 2 is EOF/RATHOLE */ /* minor device 2 is EOF/RATHOLE */
@ -154,9 +154,8 @@ mmrw(dev, uio, flags)
break; break;
} }
if (zeropage == NULL) { if (zeropage == NULL) {
zeropage = (caddr_t) zeropage = malloc(CLBYTES, M_TEMP, M_WAITOK);
malloc(CLBYTES, M_TEMP, M_WAITOK); memset(zeropage, 0, CLBYTES);
bzero(zeropage, CLBYTES);
} }
c = min(iov->iov_len, CLBYTES); c = min(iov->iov_len, CLBYTES);
error = uiomove(zeropage, c, uio); error = uiomove(zeropage, c, uio);

209
sys/arch/mips/mips/pmap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.46 1998/12/05 09:13:09 jonathan Exp $ */ /* $NetBSD: pmap.c,v 1.47 1999/01/06 04:11:29 nisimura Exp $ */
/*- /*-
* Copyright (c) 1998 The NetBSD Foundation, Inc. * Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -78,7 +78,7 @@
#include <sys/cdefs.h> #include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.46 1998/12/05 09:13:09 jonathan Exp $"); __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.47 1999/01/06 04:11:29 nisimura Exp $");
/* /*
* Manages physical address maps. * Manages physical address maps.
@ -128,10 +128,9 @@ __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.46 1998/12/05 09:13:09 jonathan Exp $");
#include <uvm/uvm.h> #include <uvm/uvm.h>
#endif #endif
#include <mips/cpuregs.h> #include <mips/cpu.h>
#include <mips/locore.h> #include <mips/locore.h>
#include <mips/pte.h> #include <mips/pte.h>
#include <machine/cpu.h>
#ifdef DEBUG #ifdef DEBUG
struct { struct {
@ -178,11 +177,11 @@ int pmapdebug = 0;
struct pmap kernel_pmap_store; struct pmap kernel_pmap_store;
vm_offset_t avail_start; /* PA of first available physical page */ paddr_t avail_start; /* PA of first available physical page */
vm_offset_t avail_end; /* PA of last available physical page */ paddr_t avail_end; /* PA of last available physical page */
vm_size_t mem_size; /* memory size in bytes */ psize_t mem_size; /* memory size in bytes */
vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss)*/ vaddr_t virtual_avail; /* VA of first avail page (after kernel bss)*/
vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ vaddr_t virtual_end; /* VA of last avail page (end of kernel AS) */
int mipspagesperpage; /* PAGE_SIZE / NBPG */ int mipspagesperpage; /* PAGE_SIZE / NBPG */
@ -217,18 +216,18 @@ boolean_t pmap_initialized = FALSE;
}) })
/* Forward function declarations */ /* Forward function declarations */
int pmap_remove_pv __P((pmap_t pmap, vm_offset_t va, vm_offset_t pa)); int pmap_remove_pv __P((pmap_t pmap, vaddr_t va, paddr_t pa));
int pmap_alloc_tlbpid __P((register struct proc *p)); int pmap_alloc_tlbpid __P((struct proc *p));
void pmap_zero_page __P((vm_offset_t phys)); void pmap_zero_page __P((paddr_t phys));
void pmap_zero_page __P((vm_offset_t)); void pmap_zero_page __P((vaddr_t));
void pmap_enter_pv __P((pmap_t, vm_offset_t, vm_offset_t, u_int *)); void pmap_enter_pv __P((pmap_t, vaddr_t, paddr_t, u_int *));
pt_entry_t *pmap_pte __P((pmap_t, vm_offset_t)); pt_entry_t *pmap_pte __P((pmap_t, vaddr_t));
#ifdef MIPS3 #ifdef MIPS3
void pmap_page_cache __P((vm_offset_t, int)); void pmap_page_cache __P((paddr_t, int));
void mips_dump_segtab __P((struct proc *)); void mips_dump_segtab __P((struct proc *));
#endif #endif
int pmap_is_page_ro __P((pmap_t, vm_offset_t, int)); int pmap_is_page_ro __P((pmap_t, vaddr_t, int));
void pmap_pinit __P((pmap_t)); void pmap_pinit __P((pmap_t));
void pmap_release __P((pmap_t)); void pmap_release __P((pmap_t));
@ -241,7 +240,7 @@ void
pmap_bootstrap() pmap_bootstrap()
{ {
#ifdef MIPS3 #ifdef MIPS3
register pt_entry_t *spte; pt_entry_t *spte;
#endif #endif
extern int physmem; extern int physmem;
@ -340,13 +339,14 @@ pmap_bootstrap()
* Note that this memory will never be freed, and in essence it is wired * Note that this memory will never be freed, and in essence it is wired
* down. * down.
*/ */
vm_offset_t vaddr_t
pmap_steal_memory(size, vstartp, vendp) pmap_steal_memory(size, vstartp, vendp)
vm_size_t size; vsize_t size;
vm_offset_t *vstartp, *vendp; vaddr_t *vstartp, *vendp;
{ {
int bank, npgs, x; int bank, npgs, x;
vm_offset_t pa, va; paddr_t pa;
vaddr_t va;
size = round_page(size); size = round_page(size);
npgs = atop(size); npgs = atop(size);
@ -413,7 +413,7 @@ pmap_steal_memory(size, vstartp, vendp)
void void
pmap_init() pmap_init()
{ {
vm_size_t s; vsize_t s;
int bank; int bank;
pv_entry_t pv; pv_entry_t pv;
@ -454,9 +454,9 @@ pmap_init()
*/ */
pmap_t pmap_t
pmap_create(size) pmap_create(size)
vm_size_t size; vsize_t size;
{ {
register pmap_t pmap; pmap_t pmap;
#ifdef DEBUG #ifdef DEBUG
if (pmapdebug & (PDB_FOLLOW|PDB_CREATE)) if (pmapdebug & (PDB_FOLLOW|PDB_CREATE))
@ -485,9 +485,9 @@ pmap_create(size)
*/ */
void void
pmap_pinit(pmap) pmap_pinit(pmap)
register struct pmap *pmap; struct pmap *pmap;
{ {
register int i; int i;
int s; int s;
extern struct vmspace vmspace0; extern struct vmspace vmspace0;
extern struct user *proc0paddr; extern struct user *proc0paddr;
@ -505,7 +505,7 @@ pmap_pinit(pmap)
pmap->pm_segtab->seg_tab[0] = NULL; pmap->pm_segtab->seg_tab[0] = NULL;
splx(s); splx(s);
} else { } else {
register struct segtab *stp; struct segtab *stp;
vm_page_t mem; vm_page_t mem;
do { do {
@ -565,7 +565,7 @@ pmap_pinit(pmap)
*/ */
void void
pmap_destroy(pmap) pmap_destroy(pmap)
register pmap_t pmap; pmap_t pmap;
{ {
int count; int count;
@ -592,7 +592,7 @@ pmap_destroy(pmap)
*/ */
void void
pmap_release(pmap) pmap_release(pmap)
register pmap_t pmap; pmap_t pmap;
{ {
#ifdef DEBUG #ifdef DEBUG
@ -601,11 +601,11 @@ pmap_release(pmap)
#endif #endif
if (pmap->pm_segtab) { if (pmap->pm_segtab) {
register pt_entry_t *pte; pt_entry_t *pte;
register int i; int i;
int s; int s;
#ifdef DIAGNOSTIC #ifdef DIAGNOSTIC
register int j; int j;
#endif #endif
for (i = 0; i < PMAP_SEGTABSIZE; i++) { for (i = 0; i < PMAP_SEGTABSIZE; i++) {
@ -631,7 +631,7 @@ pmap_release(pmap)
*/ */
if (CPUISMIPS3) if (CPUISMIPS3)
mips3_HitFlushDCache( mips3_HitFlushDCache(
(vm_offset_t)pte, PAGE_SIZE); (vaddr_t)pte, PAGE_SIZE);
#endif #endif
#if defined(UVM) #if defined(UVM)
uvm_pagefree(PHYS_TO_VM_PAGE(MIPS_KSEG0_TO_PHYS(pte))); uvm_pagefree(PHYS_TO_VM_PAGE(MIPS_KSEG0_TO_PHYS(pte)));
@ -681,7 +681,7 @@ pmap_activate(p)
p->p_vmspace->vm_map.pmap->pm_segtab; p->p_vmspace->vm_map.pmap->pm_segtab;
if (p == curproc) { if (p == curproc) {
register int tlbpid = pmap_alloc_tlbpid(p); int tlbpid = pmap_alloc_tlbpid(p);
MachSetPID(tlbpid); MachSetPID(tlbpid);
} }
} }
@ -705,11 +705,11 @@ pmap_deactivate(p)
*/ */
void void
pmap_remove(pmap, sva, eva) pmap_remove(pmap, sva, eva)
register pmap_t pmap; pmap_t pmap;
vm_offset_t sva, eva; vaddr_t sva, eva;
{ {
register vm_offset_t nssva; vaddr_t nssva;
register pt_entry_t *pte; pt_entry_t *pte;
unsigned entry; unsigned entry;
#ifdef DEBUG #ifdef DEBUG
@ -721,7 +721,7 @@ pmap_remove(pmap, sva, eva)
return; return;
if (!pmap->pm_segtab) { if (!pmap->pm_segtab) {
register pt_entry_t *pte; pt_entry_t *pte;
/* remove entries from kernel pmap */ /* remove entries from kernel pmap */
#ifdef DIAGNOSTIC #ifdef DIAGNOSTIC
@ -829,11 +829,11 @@ pmap_remove(pmap, sva, eva)
*/ */
void void
pmap_page_protect(pa, prot) pmap_page_protect(pa, prot)
vm_offset_t pa; vaddr_t pa;
vm_prot_t prot; vm_prot_t prot;
{ {
register pv_entry_t pv; pv_entry_t pv;
register vm_offset_t va; vaddr_t va;
int s; int s;
#ifdef DEBUG #ifdef DEBUG
@ -868,7 +868,7 @@ pmap_page_protect(pa, prot)
if (va >= uvm.pager_sva && va < uvm.pager_eva) if (va >= uvm.pager_sva && va < uvm.pager_eva)
continue; continue;
#else #else
extern vm_offset_t pager_sva, pager_eva; extern vaddr_t pager_sva, pager_eva;
va = pv->pv_va; va = pv->pv_va;
@ -903,13 +903,13 @@ pmap_page_protect(pa, prot)
*/ */
void void
pmap_protect(pmap, sva, eva, prot) pmap_protect(pmap, sva, eva, prot)
register pmap_t pmap; pmap_t pmap;
vm_offset_t sva, eva; vaddr_t sva, eva;
vm_prot_t prot; vm_prot_t prot;
{ {
register vm_offset_t nssva; vaddr_t nssva;
register pt_entry_t *pte; pt_entry_t *pte;
register unsigned entry; unsigned entry;
u_int p; u_int p;
#ifdef DEBUG #ifdef DEBUG
@ -998,9 +998,9 @@ pmap_protect(pmap, sva, eva, prot)
*/ */
int int
pmap_is_page_ro(pmap, va, entry) pmap_is_page_ro(pmap, va, entry)
pmap_t pmap; pmap_t pmap;
vm_offset_t va; vaddr_t va;
int entry; int entry;
{ {
return (entry & mips_pg_ro_bit()); return (entry & mips_pg_ro_bit());
} }
@ -1012,13 +1012,13 @@ pmap_is_page_ro(pmap, va, entry)
* Change all mappings of a page to cached/uncached. * Change all mappings of a page to cached/uncached.
*/ */
void void
pmap_page_cache(pa,mode) pmap_page_cache(pa, mode)
vm_offset_t pa; paddr_t pa;
{ {
register pv_entry_t pv; pv_entry_t pv;
register pt_entry_t *pte; pt_entry_t *pte;
register unsigned entry; unsigned entry;
register unsigned newmode; unsigned newmode;
int s; int s;
#ifdef DEBUG #ifdef DEBUG
@ -1084,15 +1084,15 @@ pmap_page_cache(pa,mode)
*/ */
void void
pmap_enter(pmap, va, pa, prot, wired) pmap_enter(pmap, va, pa, prot, wired)
register pmap_t pmap; pmap_t pmap;
vm_offset_t va; vaddr_t va;
register vm_offset_t pa; paddr_t pa;
vm_prot_t prot; vm_prot_t prot;
boolean_t wired; boolean_t wired;
{ {
register pt_entry_t *pte; pt_entry_t *pte;
u_int npte; u_int npte;
register int i; int i;
vm_page_t mem; vm_page_t mem;
#ifdef DEBUG #ifdef DEBUG
@ -1317,13 +1317,13 @@ pmap_enter(pmap, va, pa, prot, wired)
*/ */
void void
pmap_change_wiring(pmap, va, wired) pmap_change_wiring(pmap, va, wired)
register pmap_t pmap; pmap_t pmap;
vm_offset_t va; vaddr_t va;
boolean_t wired; boolean_t wired;
{ {
register pt_entry_t *pte; pt_entry_t *pte;
u_int p; u_int p;
register int i; int i;
#ifdef DEBUG #ifdef DEBUG
if (pmapdebug & (PDB_FOLLOW|PDB_WIRING)) if (pmapdebug & (PDB_FOLLOW|PDB_WIRING))
@ -1369,12 +1369,12 @@ pmap_change_wiring(pmap, va, wired)
* Extract the physical page address associated * Extract the physical page address associated
* with the given map/virtual_address pair. * with the given map/virtual_address pair.
*/ */
vm_offset_t vaddr_t
pmap_extract(pmap, va) pmap_extract(pmap, va)
register pmap_t pmap; pmap_t pmap;
vm_offset_t va; vaddr_t va;
{ {
register vm_offset_t pa; vaddr_t pa;
#ifdef DEBUG #ifdef DEBUG
if (pmapdebug & PDB_FOLLOW) if (pmapdebug & PDB_FOLLOW)
@ -1388,7 +1388,7 @@ pmap_extract(pmap, va)
#endif #endif
pa = pfn_to_vad(kvtopte(va)->pt_entry); pa = pfn_to_vad(kvtopte(va)->pt_entry);
} else { } else {
register pt_entry_t *pte; pt_entry_t *pte;
if (!(pte = pmap_segmap(pmap, va))) if (!(pte = pmap_segmap(pmap, va)))
pa = 0; pa = 0;
@ -1418,9 +1418,9 @@ void
pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr) pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr)
pmap_t dst_pmap; pmap_t dst_pmap;
pmap_t src_pmap; pmap_t src_pmap;
vm_offset_t dst_addr; vaddr_t dst_addr;
vm_size_t len; vsize_t len;
vm_offset_t src_addr; vaddr_t src_addr;
{ {
#ifdef DEBUG #ifdef DEBUG
@ -1476,9 +1476,9 @@ pmap_collect(pmap)
*/ */
void void
pmap_zero_page(phys) pmap_zero_page(phys)
vm_offset_t phys; paddr_t phys;
{ {
register int *p, *end; int *p, *end;
#ifdef DEBUG #ifdef DEBUG
if (pmapdebug & PDB_FOLLOW) if (pmapdebug & PDB_FOLLOW)
@ -1545,11 +1545,11 @@ pmap_zero_page(phys)
*/ */
void void
pmap_copy_page(src, dst) pmap_copy_page(src, dst)
vm_offset_t src, dst; vaddr_t src, dst;
{ {
register int *s, *d, *end; int *s, *d, *end;
register int tmp0, tmp1, tmp2, tmp3; int tmp0, tmp1, tmp2, tmp3;
register int tmp4, tmp5, tmp6, tmp7; int tmp4, tmp5, tmp6, tmp7;
#ifdef DEBUG #ifdef DEBUG
if (pmapdebug & PDB_FOLLOW) if (pmapdebug & PDB_FOLLOW)
@ -1656,9 +1656,9 @@ pmap_copy_page(src, dst)
*/ */
void void
pmap_pageable(pmap, sva, eva, pageable) pmap_pageable(pmap, sva, eva, pageable)
pmap_t pmap; pmap_t pmap;
vm_offset_t sva, eva; vaddr_t sva, eva;
boolean_t pageable; boolean_t pageable;
{ {
#ifdef DEBUG #ifdef DEBUG
@ -1675,8 +1675,9 @@ pmap_pageable(pmap, sva, eva, pageable)
*/ */
void void
pmap_clear_reference(pa) pmap_clear_reference(pa)
vm_offset_t pa; paddr_t pa;
{ {
#ifdef DEBUG #ifdef DEBUG
if (pmapdebug & PDB_FOLLOW) if (pmapdebug & PDB_FOLLOW)
printf("pmap_clear_reference(%lx)\n", pa); printf("pmap_clear_reference(%lx)\n", pa);
@ -1693,7 +1694,7 @@ pmap_clear_reference(pa)
*/ */
boolean_t boolean_t
pmap_is_referenced(pa) pmap_is_referenced(pa)
vm_offset_t pa; paddr_t pa;
{ {
#if defined(UVM) #if defined(UVM)
if (PAGE_IS_MANAGED(pa)) if (PAGE_IS_MANAGED(pa))
@ -1708,7 +1709,7 @@ pmap_is_referenced(pa)
void void
pmap_set_referenced(pa) pmap_set_referenced(pa)
vm_offset_t pa; paddr_t pa;
{ {
if (PAGE_IS_MANAGED(pa)) if (PAGE_IS_MANAGED(pa))
*pa_to_attribute(pa) |= PV_MODIFIED; *pa_to_attribute(pa) |= PV_MODIFIED;
@ -1723,7 +1724,7 @@ pmap_set_referenced(pa)
*/ */
void void
pmap_clear_modify(pa) pmap_clear_modify(pa)
vm_offset_t pa; paddr_t pa;
{ {
#ifdef DEBUG #ifdef DEBUG
@ -1742,7 +1743,7 @@ pmap_clear_modify(pa)
*/ */
boolean_t boolean_t
pmap_is_modified(pa) pmap_is_modified(pa)
vm_offset_t pa; paddr_t pa;
{ {
if (PAGE_IS_MANAGED(pa)) if (PAGE_IS_MANAGED(pa))
return (*pa_to_attribute(pa) & PV_MODIFIED); return (*pa_to_attribute(pa) & PV_MODIFIED);
@ -1760,7 +1761,7 @@ pmap_is_modified(pa)
*/ */
void void
pmap_set_modified(pa) pmap_set_modified(pa)
vm_offset_t pa; paddr_t pa;
{ {
if (PAGE_IS_MANAGED(pa)) if (PAGE_IS_MANAGED(pa))
*pa_to_attribute(pa) |= PV_MODIFIED; *pa_to_attribute(pa) |= PV_MODIFIED;
@ -1770,7 +1771,7 @@ pmap_set_modified(pa)
#endif #endif
} }
vm_offset_t vaddr_t
pmap_phys_address(ppn) pmap_phys_address(ppn)
int ppn; int ppn;
{ {
@ -1797,10 +1798,10 @@ pmap_phys_address(ppn)
*/ */
int int
pmap_alloc_tlbpid(p) pmap_alloc_tlbpid(p)
register struct proc *p; struct proc *p;
{ {
register pmap_t pmap; pmap_t pmap;
register int id; int id;
pmap = p->p_vmspace->vm_map.pmap; pmap = p->p_vmspace->vm_map.pmap;
if (pmap->pm_tlbgen != tlbpid_gen) { if (pmap->pm_tlbgen != tlbpid_gen) {
@ -1839,10 +1840,11 @@ pmap_alloc_tlbpid(p)
void void
pmap_enter_pv(pmap, va, pa, npte) pmap_enter_pv(pmap, va, pa, npte)
pmap_t pmap; pmap_t pmap;
vm_offset_t va, pa; vaddr_t va;
paddr_t pa;
u_int *npte; u_int *npte;
{ {
register pv_entry_t pv, npv; pv_entry_t pv, npv;
int s; int s;
pv = pa_to_pvh(pa); pv = pa_to_pvh(pa);
@ -1966,9 +1968,10 @@ pmap_enter_pv(pmap, va, pa, npte)
int int
pmap_remove_pv(pmap, va, pa) pmap_remove_pv(pmap, va, pa)
pmap_t pmap; pmap_t pmap;
vm_offset_t va, pa; vaddr_t va;
paddr_t pa;
{ {
register pv_entry_t pv, npv; pv_entry_t pv, npv;
int s, last; int s, last;
#ifdef DEBUG #ifdef DEBUG
@ -2021,7 +2024,7 @@ pmap_remove_pv(pmap, va, pa)
pt_entry_t * pt_entry_t *
pmap_pte(pmap, va) pmap_pte(pmap, va)
pmap_t pmap; pmap_t pmap;
vm_offset_t va; vaddr_t va;
{ {
pt_entry_t *pte = NULL; pt_entry_t *pte = NULL;
@ -2039,11 +2042,11 @@ pmap_pte(pmap, va)
*/ */
void void
pmap_prefer(foff, vap) pmap_prefer(foff, vap)
register vm_offset_t foff; vaddr_t foff;
register vm_offset_t *vap; vaddr_t *vap;
{ {
register vm_offset_t va = *vap; vaddr_t va = *vap;
register long d; vsize_t d;
if (CPUISMIPS3) { if (CPUISMIPS3) {
d = foff - va; d = foff - va;

30
sys/arch/mips/mips/process_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: process_machdep.c,v 1.8 1997/10/19 21:02:08 jonathan Exp $ */ /* $NetBSD: process_machdep.c,v 1.9 1999/01/06 04:11:29 nisimura Exp $ */
/* /*
* Copyright (c) 1994 Adam Glass * Copyright (c) 1994 Adam Glass
@ -42,7 +42,7 @@
*/ */
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.8 1997/10/19 21:02:08 jonathan Exp $"); __KERNEL_RCSID(0, "$NetBSD: process_machdep.c,v 1.9 1999/01/06 04:11:29 nisimura Exp $");
/* /*
* This file may seem a bit stylized, but that so that it's easier to port. * This file may seem a bit stylized, but that so that it's easier to port.
@ -87,7 +87,7 @@ process_read_regs(p, regs)
struct proc *p; struct proc *p;
struct reg *regs; struct reg *regs;
{ {
bcopy(p->p_md.md_regs, (caddr_t)regs, sizeof(struct reg)); memcpy(regs, p->p_md.md_regs, sizeof(struct reg));
return (0); return (0);
} }
@ -96,7 +96,7 @@ process_write_regs(p, regs)
struct proc *p; struct proc *p;
struct reg *regs; struct reg *regs;
{ {
bcopy((caddr_t)regs, p->p_md.md_regs, sizeof(struct reg)); memcpy(p->p_md.md_regs, regs, sizeof(struct reg));
/* /*
* XXX: is it safe to let users set system coprocessor regs? * XXX: is it safe to let users set system coprocessor regs?
* XXX: Clear to user set bits!! * XXX: Clear to user set bits!!
@ -107,34 +107,34 @@ process_write_regs(p, regs)
int int
process_read_fpregs(p, regs) process_read_fpregs(p, regs)
struct proc *p; struct proc *p;
struct fpreg *regs; struct fpreg *regs;
{ {
if (p->p_md.md_flags & MDP_FPUSED) { if (p->p_md.md_flags & MDP_FPUSED) {
if (p == fpcurproc) if (p == fpcurproc)
savefpregs(p); savefpregs(p);
bcopy(&p->p_addr->u_pcb.pcb_fpregs, regs, memcpy(regs, &p->p_addr->u_pcb.pcb_fpregs,
sizeof(struct fpreg)); sizeof(struct fpreg));
} }
else else
bzero((caddr_t)regs, sizeof(struct fpreg)); memset(regs, 0, sizeof(struct fpreg));
return 0; return 0;
} }
int int
process_write_fpregs(p, regs) process_write_fpregs(p, regs)
struct proc *p; struct proc *p;
struct fpreg *regs; struct fpreg *regs;
{ {
if ((p->p_md.md_flags & MDP_FPUSED) == 0) /* XXX */ if ((p->p_md.md_flags & MDP_FPUSED) == 0) /* XXX */
return EINVAL; return EINVAL;
if (p->p_md.md_flags & MDP_FPUSED) { if (p->p_md.md_flags & MDP_FPUSED) {
if (p == fpcurproc) if (p == fpcurproc)
savefpregs(p); savefpregs(p);
} }
bcopy(regs, &p->p_addr->u_pcb.pcb_fpregs, sizeof(struct fpreg)); memcpy(&p->p_addr->u_pcb.pcb_fpregs, regs, sizeof(struct fpreg));
return 0; return 0;
} }
@ -143,7 +143,7 @@ process_sstep(p, sstep)
struct proc *p; struct proc *p;
{ {
/* XXX what are the correct semantics: sstep once, or forevermore? */ /* XXX what are the correct semantics: sstep once, or forevermore? */
if(sstep) if (sstep)
mips_singlestep(p); mips_singlestep(p);
return (0); return (0);
} }
@ -153,6 +153,6 @@ process_set_pc(p, addr)
struct proc *p; struct proc *p;
caddr_t addr; caddr_t addr;
{ {
p->p_md.md_regs[PC] = (int)addr; ((struct frame *)p->p_md.md_regs)->f_regs[PC] = (int)addr;
return (0); return (0);
} }

17
sys/arch/mips/mips/sys_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: sys_machdep.c,v 1.13 1998/02/25 21:41:56 perry Exp $ */ /* $NetBSD: sys_machdep.c,v 1.14 1999/01/06 04:11:30 nisimura Exp $ */
/* /*
* Copyright (c) 1992, 1993 * Copyright (c) 1992, 1993
@ -66,7 +66,7 @@ vtrace(p, v, retval)
void *v; void *v;
register_t *retval; register_t *retval;
{ {
register struct vtrace_args /* { struct vtrace_args /* {
syscallarg(int) request; syscallarg(int) request;
syscallarg(int) value; syscallarg(int) value;
} */ *uap = v; } */ *uap = v;
@ -107,7 +107,7 @@ void
vdoualarm(arg) vdoualarm(arg)
int arg; int arg;
{ {
register struct proc *p; struct proc *p;
p = pfind(arg); p = pfind(arg);
if (p) if (p)
@ -162,8 +162,8 @@ sys_sysarch(p, v, retval)
int int
mips_user_cacheflush(p, va, nbytes, whichcache) mips_user_cacheflush(p, va, nbytes, whichcache)
struct proc *p; struct proc *p;
vm_offset_t va; vaddr_t va;
register int nbytes, whichcache; int nbytes, whichcache;
{ {
/* validate the cache we're going to flush. */ /* validate the cache we're going to flush. */
@ -183,7 +183,7 @@ mips_user_cacheflush(p, va, nbytes, whichcache)
#else #else
void * uncached_physaddr; void * uncached_physaddr;
register u_int len; u_int len;
/* /*
* Invalidate each page in the virtual-address range, * Invalidate each page in the virtual-address range,
@ -209,8 +209,8 @@ mips_user_cacheflush(p, va, nbytes, whichcache)
int int
mips_user_cachectl(p, va, nbytes, cachectl) mips_user_cachectl(p, va, nbytes, cachectl)
struct proc *p; struct proc *p;
vm_offset_t va; vaddr_t va;
register int nbytes, cachectl; int nbytes, cachectl;
{ {
/* validate the cache we're going to flush. */ /* validate the cache we're going to flush. */
switch (cachectl) { switch (cachectl) {
@ -234,4 +234,3 @@ mips_user_cachectl(p, va, nbytes, cachectl)
*/ */
#endif #endif
} }

203
sys/arch/mips/mips/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.97 1998/12/04 04:35:44 nisimura Exp $ */ /* $NetBSD: trap.c,v 1.98 1999/01/06 04:11:29 nisimura Exp $ */
/* /*
* Copyright (c) 1988 University of Utah. * Copyright (c) 1988 University of Utah.
@ -43,7 +43,7 @@
*/ */
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.97 1998/12/04 04:35:44 nisimura Exp $"); __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.98 1999/01/06 04:11:29 nisimura Exp $");
#include "opt_cputype.h" /* which mips CPU levels do we support? */ #include "opt_cputype.h" /* which mips CPU levels do we support? */
#include "opt_inet.h" #include "opt_inet.h"
@ -387,7 +387,6 @@ void trapDump __P((char * msg));
extern void splx_end __P((void)); extern void splx_end __P((void));
extern void cpu_switch_end __P((void)); extern void cpu_switch_end __P((void));
extern void idle_end __P((void)); extern void idle_end __P((void));
extern void bcopy_end __P((void));
extern char start[], edata[]; extern char start[], edata[];
@ -398,10 +397,7 @@ void mips_dump_tlb __P((int, int));
/* /*
* Other forward declarations. * Other forward declarations.
*/ */
unsigned MachEmulateBranch __P((unsigned *regsPtr, vaddr_t MachEmulateBranch __P((struct frame *, vaddr_t, unsigned, int));
unsigned instPC,
unsigned fpcCSR,
int allowNonBranch));
struct proc *fpcurproc; struct proc *fpcurproc;
struct pcb *curpcb; struct pcb *curpcb;
@ -522,7 +518,7 @@ syscall(status, cause, opc, frame)
sticks = p->p_sticks; sticks = p->p_sticks;
if (DELAYBRANCH(cause)) if (DELAYBRANCH(cause))
frame->f_regs[PC] = MachEmulateBranch(frame->f_regs, opc, 0, 0); frame->f_regs[PC] = MachEmulateBranch(frame, opc, 0, 0);
else else
frame->f_regs[PC] = opc + sizeof(int); frame->f_regs[PC] = opc + sizeof(int);
callp = p->p_emul->e_sysent; callp = p->p_emul->e_sysent;
@ -713,7 +709,7 @@ trap(status, cause, vaddr, opc, frame)
if (KERNLAND(vaddr)) { if (KERNLAND(vaddr)) {
pt_entry_t *pte; pt_entry_t *pte;
unsigned entry; unsigned entry;
vm_offset_t pa; vaddr_t pa;
pte = kvtopte(vaddr); pte = kvtopte(vaddr);
entry = pte->pt_entry; entry = pte->pt_entry;
@ -742,7 +738,7 @@ trap(status, cause, vaddr, opc, frame)
{ {
pt_entry_t *pte; pt_entry_t *pte;
unsigned entry; unsigned entry;
vm_offset_t pa; vaddr_t pa;
pmap_t pmap; pmap_t pmap;
pmap = p->p_vmspace->vm_map.pmap; pmap = p->p_vmspace->vm_map.pmap;
@ -797,14 +793,14 @@ trap(status, cause, vaddr, opc, frame)
ftype = VM_PROT_WRITE; ftype = VM_PROT_WRITE;
pagefault: ; pagefault: ;
{ {
vm_offset_t va; vaddr_t va;
struct vmspace *vm; struct vmspace *vm;
vm_map_t map; vm_map_t map;
int rv; int rv;
vm = p->p_vmspace; vm = p->p_vmspace;
map = &vm->vm_map; map = &vm->vm_map;
va = trunc_page((vm_offset_t)vaddr); va = trunc_page(vaddr);
#if defined(UVM) #if defined(UVM)
rv = uvm_fault(map, va, 0, ftype); rv = uvm_fault(map, va, 0, ftype);
#ifdef VMFAULT_TRACE #ifdef VMFAULT_TRACE
@ -852,10 +848,10 @@ trap(status, cause, vaddr, opc, frame)
} }
kernelfault: ; kernelfault: ;
{ {
vm_offset_t va; vaddr_t va;
int rv; int rv;
va = trunc_page((vm_offset_t)vaddr); va = trunc_page(vaddr);
#if defined(UVM) #if defined(UVM)
rv = uvm_fault(kernel_map, va, 0, ftype); rv = uvm_fault(kernel_map, va, 0, ftype);
#else #else
@ -884,7 +880,7 @@ trap(status, cause, vaddr, opc, frame)
case T_BREAK: case T_BREAK:
#ifdef DDB #ifdef DDB
kdb_trap(type, &frame); kdb_trap(type, (int *)&frame);
return; /* KERN */ return; /* KERN */
#else #else
goto dopanic; goto dopanic;
@ -913,9 +909,9 @@ trap(status, cause, vaddr, opc, frame)
#ifndef NO_PROCFS_SUBR #ifndef NO_PROCFS_SUBR
rv = suiword((caddr_t)va, p->p_md.md_ss_instr); rv = suiword((caddr_t)va, p->p_md.md_ss_instr);
if (rv < 0) { if (rv < 0) {
vm_offset_t sa, ea; vaddr_t sa, ea;
sa = trunc_page((vm_offset_t)va); sa = trunc_page(va);
ea = round_page((vm_offset_t)va + sizeof(int) - 1); ea = round_page(va + sizeof(int) - 1);
#if defined(UVM) #if defined(UVM)
rv = uvm_map_protect(&p->p_vmspace->vm_map, rv = uvm_map_protect(&p->p_vmspace->vm_map,
sa, ea, VM_PROT_DEFAULT, FALSE); sa, ea, VM_PROT_DEFAULT, FALSE);
@ -1152,9 +1148,7 @@ void
trapDump(msg) trapDump(msg)
char *msg; char *msg;
{ {
register int i; int i, cause, s;
int s;
int cause;
s = splhigh(); s = splhigh();
printf("trapDump(%s)\n", msg); printf("trapDump(%s)\n", msg);
@ -1181,58 +1175,32 @@ trapDump(msg)
#endif #endif
/* /*
* forward declaration * Analyse 'next' PC address taking account of branch/jump instructions
*/ */
static unsigned GetBranchDest __P((InstFmt *InstPtr)); vaddr_t
MachEmulateBranch(f, instpc, fpuCSR, allowNonBranch)
struct frame *f;
/* vaddr_t instpc;
* Compute destination of a branch instruction. unsigned fpuCSR;
* XXX Compute desination of r4000 squashed branches?
*/
static unsigned
GetBranchDest(InstPtr)
InstFmt *InstPtr;
{
return ((unsigned)InstPtr + 4 + ((short)InstPtr->IType.imm << 2));
}
/*
* Return the resulting PC as if the branch was executed.
*/
unsigned
MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch)
unsigned *regsPtr;
unsigned instPC;
unsigned fpcCSR;
int allowNonBranch; int allowNonBranch;
{ {
#define BRANCHTARGET(p) (4 + (p) + ((short)((InstFmt *)(p))->IType.imm << 2))
InstFmt inst; InstFmt inst;
unsigned retAddr; vaddr_t nextpc;
int condition;
inst.word = (instPC < MIPS_KSEG0_START) ? if (instpc < MIPS_KSEG0_START)
fuiword((caddr_t)instPC) : *(unsigned*)instPC; inst.word = fuiword((void *)instpc);
else
inst.word = *(unsigned *)instpc;
#if 0
printf("regsPtr=%x PC=%x Inst=%x fpcCsr=%x\n", regsPtr, instPC,
inst.word, fpcCSR); /* XXX */
#endif
switch ((int)inst.JType.op) { switch ((int)inst.JType.op) {
case OP_SPECIAL: case OP_SPECIAL:
switch ((int)inst.RType.func) { if (inst.RType.func == OP_JR || inst.RType.func == OP_JALR)
case OP_JR: nextpc = f->f_regs[inst.RType.rs];
case OP_JALR: else if (allowNonBranch)
retAddr = regsPtr[inst.RType.rs]; nextpc = instpc + 4;
break; else
panic("MachEmulateBranch: Non-branch");
default:
if (!allowNonBranch)
panic("MachEmulateBranch: Non-branch");
retAddr = instPC + 4;
break;
}
break; break;
case OP_BCOND: case OP_BCOND:
@ -1241,22 +1209,20 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch)
case OP_BLTZAL: case OP_BLTZAL:
case OP_BLTZL: /* squashed */ case OP_BLTZL: /* squashed */
case OP_BLTZALL: /* squashed */ case OP_BLTZALL: /* squashed */
if ((int)(f->f_regs[inst.RType.rs]) < 0)
if ((int)(regsPtr[inst.RType.rs]) < 0) nextpc = BRANCHTARGET(instpc);
retAddr = GetBranchDest((InstFmt *)instPC);
else else
retAddr = instPC + 8; nextpc = instpc + 8;
break; break;
case OP_BGEZ: case OP_BGEZ:
case OP_BGEZAL: case OP_BGEZAL:
case OP_BGEZL: /* squashed */ case OP_BGEZL: /* squashed */
case OP_BGEZALL: /* squashed */ case OP_BGEZALL: /* squashed */
if ((int)(f->f_regs[inst.RType.rs]) >= 0)
if ((int)(regsPtr[inst.RType.rs]) >= 0) nextpc = BRANCHTARGET(instpc);
retAddr = GetBranchDest((InstFmt *)instPC);
else else
retAddr = instPC + 8; nextpc = instpc + 8;
break; break;
default: default:
@ -1266,79 +1232,67 @@ MachEmulateBranch(regsPtr, instPC, fpcCSR, allowNonBranch)
case OP_J: case OP_J:
case OP_JAL: case OP_JAL:
retAddr = (inst.JType.target << 2) | nextpc = (inst.JType.target << 2) |
((unsigned)instPC & 0xF0000000); ((unsigned)instpc & 0xF0000000);
break; break;
case OP_BEQ: case OP_BEQ:
case OP_BEQL: /* squashed */ case OP_BEQL: /* squashed */
if (f->f_regs[inst.RType.rs] == f->f_regs[inst.RType.rt])
if (regsPtr[inst.RType.rs] == regsPtr[inst.RType.rt]) nextpc = BRANCHTARGET(instpc);
retAddr = GetBranchDest((InstFmt *)instPC);
else else
retAddr = instPC + 8; nextpc = instpc + 8;
break; break;
case OP_BNE: case OP_BNE:
case OP_BNEL: /* squashed */ case OP_BNEL: /* squashed */
if (f->f_regs[inst.RType.rs] != f->f_regs[inst.RType.rt])
if (regsPtr[inst.RType.rs] != regsPtr[inst.RType.rt]) nextpc = BRANCHTARGET(instpc);
retAddr = GetBranchDest((InstFmt *)instPC);
else else
retAddr = instPC + 8; nextpc = instpc + 8;
break; break;
case OP_BLEZ: case OP_BLEZ:
case OP_BLEZL: /* squashed */ case OP_BLEZL: /* squashed */
if ((int)(f->f_regs[inst.RType.rs]) <= 0)
if ((int)(regsPtr[inst.RType.rs]) <= 0) nextpc = BRANCHTARGET(instpc);
retAddr = GetBranchDest((InstFmt *)instPC);
else else
retAddr = instPC + 8; nextpc = instpc + 8;
break; break;
case OP_BGTZ: case OP_BGTZ:
case OP_BGTZL: /* squashed */ case OP_BGTZL: /* squashed */
if ((int)(f->f_regs[inst.RType.rs]) > 0)
if ((int)(regsPtr[inst.RType.rs]) > 0) nextpc = BRANCHTARGET(instpc);
retAddr = GetBranchDest((InstFmt *)instPC);
else else
retAddr = instPC + 8; nextpc = instpc + 8;
break; break;
case OP_COP1: case OP_COP1:
switch (inst.RType.rs) { if (inst.RType.rs == OP_BCx || inst.RType.rs == OP_BCy) {
case OP_BCx: int condition = (fpuCSR & MIPS_FPU_COND_BIT) != 0;
case OP_BCy: if ((inst.RType.rt & COPz_BC_TF_MASK) != COPz_BC_TRUE)
if ((inst.RType.rt & COPz_BC_TF_MASK) == COPz_BC_TRUE) condition = !condition;
condition = fpcCSR & MIPS_FPU_COND_BIT;
else
condition = !(fpcCSR & MIPS_FPU_COND_BIT);
if (condition) if (condition)
retAddr = GetBranchDest((InstFmt *)instPC); nextpc = BRANCHTARGET(instpc);
else else
retAddr = instPC + 8; nextpc = instpc + 8;
break;
default:
if (!allowNonBranch)
panic("MachEmulateBranch: Bad coproc branch instruction");
retAddr = instPC + 4;
} }
else if (allowNonBranch)
nextpc = instpc + 4;
else
panic("MachEmulateBranch: Bad COP1 branch instruction");
break; break;
default: default:
if (!allowNonBranch) if (!allowNonBranch)
panic("MachEmulateBranch: Non-branch instruction"); panic("MachEmulateBranch: Non-branch instruction");
retAddr = instPC + 4; nextpc = instpc + 4;
} }
#if 0 return nextpc;
printf("Target addr=%x\n", retAddr); /* XXX */ #undef BRANCHTARGET
#endif
return (retAddr);
} }
/* /*
* This routine is called by procxmt() to single step one instruction. * This routine is called by procxmt() to single step one instruction.
* We do this by storing a break instruction after the current instruction, * We do this by storing a break instruction after the current instruction,
@ -1350,7 +1304,7 @@ mips_singlestep(p)
{ {
#ifdef NO_PROCFS_SUBR #ifdef NO_PROCFS_SUBR
struct frame *f = (struct frame *)p->p_md.md_regs; struct frame *f = (struct frame *)p->p_md.md_regs;
unsigned va = 0; vaddr_t pc, va;
int rv; int rv;
if (p->p_md.md_ss_addr) { if (p->p_md.md_ss_addr) {
@ -1358,8 +1312,9 @@ mips_singlestep(p)
p->p_comm, p->p_pid, p->p_md.md_ss_addr, va); /* XXX */ p->p_comm, p->p_pid, p->p_md.md_ss_addr, va); /* XXX */
return EFAULT; return EFAULT;
} }
if (fuiword((caddr_t)f->f_regs[PC]) != 0) /* not a NOP instruction */ pc = (vaddr_t)f->f_regs[PC];
va = MachEmulateBranch(f->f_regs, f->f_regs[PC], if (fuiword((void *)pc) != 0) /* not a NOP instruction */
va = MachEmulateBranch(f, pc,
p->p_addr->u_pcb.pcb_fpregs.r_regs[32], 1); p->p_addr->u_pcb.pcb_fpregs.r_regs[32], 1);
else else
va = f->f_regs[PC] + sizeof(int); va = f->f_regs[PC] + sizeof(int);
@ -1367,9 +1322,9 @@ mips_singlestep(p)
p->p_md.md_ss_instr = fuiword((caddr_t)va); p->p_md.md_ss_instr = fuiword((caddr_t)va);
rv = suiword((caddr_t)va, MIPS_BREAK_SSTEP); rv = suiword((caddr_t)va, MIPS_BREAK_SSTEP);
if (rv < 0) { if (rv < 0) {
vm_offset_t sa, ea; vaddr_t sa, ea;
sa = trunc_page((vm_offset_t)va); sa = trunc_page(va);
ea = round_page((vm_offset_t)va + sizeof(int) - 1); ea = round_page(va + sizeof(int) - 1);
#if defined(UVM) #if defined(UVM)
rv = uvm_map_protect(&p->p_vmspace->vm_map, rv = uvm_map_protect(&p->p_vmspace->vm_map,
sa, ea, VM_PROT_DEFAULT, FALSE); sa, ea, VM_PROT_DEFAULT, FALSE);
@ -1426,7 +1381,7 @@ mips_singlestep(p)
/* compute next address after current location */ /* compute next address after current location */
if (curinstr != 0) if (curinstr != 0)
va = MachEmulateBranch(f->f_regs, pc, va = MachEmulateBranch(f, pc,
p->p_addr->u_pcb.pcb_fpregs.r_regs[32], 1); p->p_addr->u_pcb.pcb_fpregs.r_regs[32], 1);
else else
va = pc + sizeof(int); va = pc + sizeof(int);
@ -1459,7 +1414,7 @@ mips_singlestep(p)
#if defined(DEBUG) || defined(DDB) #if defined(DEBUG) || defined(DDB)
int int
kdbpeek(addr) kdbpeek(addr)
vm_offset_t addr; vaddr_t addr;
{ {
if (addr & 3) { if (addr & 3) {
printf("kdbpeek: unaligned address %lx\n", addr); printf("kdbpeek: unaligned address %lx\n", addr);

38
sys/arch/mips/mips/vm_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: vm_machdep.c,v 1.31 1998/12/03 06:28:46 nisimura Exp $ */ /* $NetBSD: vm_machdep.c,v 1.32 1999/01/06 04:11:30 nisimura Exp $ */
/* /*
* Copyright (c) 1988 University of Utah. * Copyright (c) 1988 University of Utah.
@ -43,7 +43,7 @@
*/ */
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.31 1998/12/03 06:28:46 nisimura Exp $"); __KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.32 1999/01/06 04:11:30 nisimura Exp $");
#include "opt_uvm.h" #include "opt_uvm.h"
@ -72,7 +72,7 @@ __KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.31 1998/12/03 06:28:46 nisimura Exp
/* XXX will be declared in mips/include/cpu.h XXX */ /* XXX will be declared in mips/include/cpu.h XXX */
extern struct proc *fpcurproc; extern struct proc *fpcurproc;
extern vm_offset_t kvtophys __P((vm_offset_t kva)); /* XXX */ extern paddr_t kvtophys __P((vaddr_t kva)); /* XXX */
/* /*
* cpu_fork() now returns just once. * cpu_fork() now returns just once.
@ -94,7 +94,7 @@ cpu_fork(p1, p2)
#ifdef MIPS3 #ifdef MIPS3
if (CPUISMIPS3) if (CPUISMIPS3)
mips3_HitFlushDCache((vm_offset_t)p2->p_addr, USPACE); mips3_HitFlushDCache((vaddr_t)p2->p_addr, USPACE);
#endif #endif
if (p1 == fpcurproc) if (p1 == fpcurproc)
@ -251,12 +251,12 @@ pagemove(from, to, size)
if (CPUISMIPS3 && if (CPUISMIPS3 &&
((int)from & mips_CacheAliasMask) != ((int)from & mips_CacheAliasMask) !=
((int)to & mips_CacheAliasMask)) { ((int)to & mips_CacheAliasMask)) {
mips3_HitFlushDCache((vm_offset_t)from, size); mips3_HitFlushDCache((vaddr_t)from, size);
} }
#endif #endif
while (size > 0) { while (size > 0) {
MachTLBFlushAddr((vm_offset_t)from); MachTLBFlushAddr((vaddr_t)from);
MachTLBUpdate((vm_offset_t)to, fpte->pt_entry); MachTLBUpdate((vaddr_t)to, fpte->pt_entry);
*tpte = *fpte; *tpte = *fpte;
if (CPUISMIPS3) if (CPUISMIPS3)
fpte->pt_entry = MIPS3_PG_NV | MIPS3_PG_G; fpte->pt_entry = MIPS3_PG_NV | MIPS3_PG_G;
@ -281,17 +281,18 @@ extern vm_map_t phys_map;
void void
vmapbuf(bp, len) vmapbuf(bp, len)
struct buf *bp; struct buf *bp;
vm_size_t len; vsize_t len;
{ {
vm_offset_t faddr, taddr, off; vaddr_t faddr, taddr;
vsize_t off;
pt_entry_t *fpte, *tpte; pt_entry_t *fpte, *tpte;
pt_entry_t *pmap_pte __P((pmap_t, vm_offset_t)); pt_entry_t *pmap_pte __P((pmap_t, vaddr_t));
register u_int pt_mask; u_int pt_mask;
if ((bp->b_flags & B_PHYS) == 0) if ((bp->b_flags & B_PHYS) == 0)
panic("vmapbuf"); panic("vmapbuf");
faddr = trunc_page(bp->b_saveaddr = bp->b_data); faddr = trunc_page(bp->b_saveaddr = bp->b_data);
off = (vm_offset_t)bp->b_data - faddr; off = (vaddr_t)bp->b_data - faddr;
len = round_page(off + len); len = round_page(off + len);
#if defined(UVM) #if defined(UVM)
taddr = uvm_km_valloc_wait(phys_map, len); taddr = uvm_km_valloc_wait(phys_map, len);
@ -323,14 +324,15 @@ vmapbuf(bp, len)
void void
vunmapbuf(bp, len) vunmapbuf(bp, len)
struct buf *bp; struct buf *bp;
vm_size_t len; vsize_t len;
{ {
vm_offset_t addr, off; vaddr_t addr;
vsize_t off;
if ((bp->b_flags & B_PHYS) == 0) if ((bp->b_flags & B_PHYS) == 0)
panic("vunmapbuf"); panic("vunmapbuf");
addr = trunc_page(bp->b_data); addr = trunc_page(bp->b_data);
off = (vm_offset_t)bp->b_data - addr; off = (vaddr_t)bp->b_data - addr;
len = round_page(off + len); len = round_page(off + len);
#if defined(UVM) #if defined(UVM)
uvm_km_free_wakeup(phys_map, addr, len); uvm_km_free_wakeup(phys_map, addr, len);
@ -359,11 +361,11 @@ vunmapbuf(bp, len)
* XXX the double-mapped u-area holding the current process's kernel stack * XXX the double-mapped u-area holding the current process's kernel stack
* and u-area at a fixed address should be fixed. * and u-area at a fixed address should be fixed.
*/ */
vm_offset_t paddr_t
kvtophys(vm_offset_t kva) kvtophys(vaddr_t kva)
{ {
pt_entry_t *pte; pt_entry_t *pte;
vm_offset_t phys; paddr_t phys;
if (kva >= MIPS_KSEG0_START && kva < MIPS_KSEG1_START) if (kva >= MIPS_KSEG0_START && kva < MIPS_KSEG1_START)
{ {