Clean up bogus whitespace

This commit is contained in:
blymn 2006-05-28 13:01:46 +00:00
parent 2dba0c5647
commit 8582430c8c
3 changed files with 48 additions and 48 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: fwohci.c,v 1.99 2006/05/03 00:37:44 kiyohara Exp $ */
/* $NetBSD: fwohci.c,v 1.100 2006/05/28 13:01:46 blymn Exp $ */
/*-
* Copyright (c) 2003 Hidetoshi Shimokawa
@ -32,7 +32,7 @@
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*
* $FreeBSD: /repoman/r/ncvs/src/sys/dev/firewire/fwohci.c,v 1.81 2005/03/29 01:44:59 sam Exp $
*
*/
@ -58,7 +58,7 @@
#include <sys/ktr.h>
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: fwohci.c,v 1.99 2006/05/03 00:37:44 kiyohara Exp $");
__KERNEL_RCSID(0, "$NetBSD: fwohci.c,v 1.100 2006/05/28 13:01:46 blymn Exp $");
#if defined(__DragonFly__) || __FreeBSD_version < 500000
#include <machine/clock.h> /* for DELAY() */
@ -138,7 +138,7 @@ SYSCTL_SETUP(sysctl_fwohci, "sysctl fwohci(4) subtree setup")
/* fwohci no cyclemaster flag */
if ((rc = sysctl_createv(clog, 0, NULL, &node,
CTLFLAG_PERMANENT | CTLFLAG_READWRITE, CTLTYPE_INT,
CTLFLAG_PERMANENT | CTLFLAG_READWRITE, CTLTYPE_INT,
"nocyclemaster", SYSCTL_DESCR("Do not send cycle start packets"),
NULL, 0, &nocyclemaster,
0, CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) != 0) {
@ -423,7 +423,7 @@ again:
}
}
if (firewire_debug || retry >= MAX_RETRY)
device_printf(sc->fc.dev,
device_printf(sc->fc.dev,
"fwphy_rddata: 0x%x loop=%d, retry=%d\n", addr, i, retry);
#undef MAX_RETRY
return((fun >> PHYDEV_RDDATA )& 0xff);
@ -500,7 +500,7 @@ fwohci_probe_phy(struct fwohci_softc *sc, device_t dev)
/*
* probe PHY parameters
* 0. to prove PHY version, whether compliance of 1394a.
* 1. to probe maximum speed supported by the PHY and
* 1. to probe maximum speed supported by the PHY and
* number of port supported by core-logic.
* It is not actually available port on your PC .
*/
@ -576,7 +576,7 @@ fwohci_reset(struct fwohci_softc *sc, device_t dev)
uint32_t reg, reg2;
struct fwohcidb_tr *db_tr;
/* Disable interrupts */
/* Disable interrupts */
OWRITE(sc, FWOHCI_INTMASKCLR, ~0);
/* Now stopping all DMA channels */
@ -667,8 +667,8 @@ fwohci_reset(struct fwohci_softc *sc, device_t dev)
/* Enable interrupts */
OWRITE(sc, FWOHCI_INTMASK,
OHCI_INT_ERR | OHCI_INT_PHY_SID
| OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS
OHCI_INT_ERR | OHCI_INT_PHY_SID
| OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS
| OHCI_INT_DMA_PRRQ | OHCI_INT_DMA_PRRS
| OHCI_INT_PHY_BUS_R | OHCI_INT_PW_ERR);
fwohci_set_intr(&sc->fc, 1);
@ -890,7 +890,7 @@ FWOHCI_DETACH()
int _cnt = _dbtr->dbcnt; \
db = &_dbtr->db[ (_cnt > 2) ? (_cnt -1) : 0]; \
} while (0)
static void
fwohci_execute_db(void *arg, bus_dma_segment_t *segs, int nseg, int error)
{
@ -1037,7 +1037,7 @@ again:
m_copydata(xfer->mbuf, 0,
xfer->mbuf->m_pkthdr.len,
mtod(m0, caddr_t));
m0->m_len = m0->m_pkthdr.len =
m0->m_len = m0->m_pkthdr.len =
xfer->mbuf->m_pkthdr.len;
m_freem(xfer->mbuf);
xfer->mbuf = m0;
@ -1375,7 +1375,7 @@ fwohci_itx_disable(struct firewire_comm *fc, int dmach)
struct fwohci_softc *sc = (struct fwohci_softc *)fc;
int sleepch;
OWRITE(sc, OHCI_ITCTLCLR(dmach),
OWRITE(sc, OHCI_ITCTLCLR(dmach),
OHCI_CNTL_DMA_RUN | OHCI_CNTL_CYCMATCH_S);
OWRITE(sc, OHCI_IT_MASKCLR, 1 << dmach);
OWRITE(sc, OHCI_IT_STATCLR, 1 << dmach);
@ -1620,7 +1620,7 @@ fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach)
OHCI_BRANCH_ALWAYS);
#endif
#if 0 /* if bulkxfer->npacket changes */
db[ldesc].db.desc.depend = db[0].db.desc.depend =
db[ldesc].db.desc.depend = db[0].db.desc.depend =
((struct fwohcidb_tr *)
(chunk->start))->bus_addr | dbch->ndesc;
#else
@ -1813,9 +1813,9 @@ FWOHCI_STOP()
OWRITE(sc, FWOHCI_INTMASKCLR,
OHCI_INT_EN | OHCI_INT_ERR | OHCI_INT_PHY_SID
| OHCI_INT_PHY_INT
| OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS
| OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS
| OHCI_INT_DMA_PRRQ | OHCI_INT_DMA_PRRS
| OHCI_INT_DMA_ARRQ | OHCI_INT_DMA_ARRS
| OHCI_INT_DMA_ARRQ | OHCI_INT_DMA_ARRS
| OHCI_INT_PHY_BUS_R);
if (sc->fc.arq !=0 && sc->fc.arq->maxq > 0)
@ -1914,7 +1914,7 @@ fwohci_intr_body(struct fwohci_softc *sc, uint32_t stat, int count)
stat & OHCI_INT_DMA_ARRQ ? "DMA_ARRQ " :"",
stat & OHCI_INT_DMA_ATRS ? "DMA_ATRS " :"",
stat & OHCI_INT_DMA_ATRQ ? "DMA_ATRQ " :"",
stat, OREAD(sc, FWOHCI_INTMASK)
stat, OREAD(sc, FWOHCI_INTMASK)
);
#endif
/* Bus reset */
@ -1923,7 +1923,7 @@ fwohci_intr_body(struct fwohci_softc *sc, uint32_t stat, int count)
goto busresetout;
/* Disable bus reset interrupt until sid recv. */
OWRITE(sc, FWOHCI_INTMASKCLR, OHCI_INT_PHY_BUS_R);
device_printf(fc->dev, "BUS reset\n");
OWRITE(sc, FWOHCI_INTMASKCLR, OHCI_INT_CYC_LOST);
OWRITE(sc, OHCI_LNKCTLCLR, OHCI_CNTL_CYCSRC);
@ -2034,7 +2034,7 @@ busresetout:
/* Set ATRetries register */
OWRITE(sc, OHCI_ATRETRY, 1<<(13+16) | 0xfff);
/*
** Checking whether the node is root or not. If root, turn on
** Checking whether the node is root or not. If root, turn on
** cycle master.
*/
node_id = OREAD(sc, FWOHCI_NODEID);
@ -2157,7 +2157,7 @@ fwochi_check_stat(struct fwohci_softc *sc)
stat = OREAD(sc, FWOHCI_INTSTAT);
CTR1(KTR_DEV, "fwoch_check_stat 0x%08x", stat);
if (stat == 0xffffffff) {
device_printf(sc->fc.dev,
device_printf(sc->fc.dev,
"device physically ejected?\n");
return(stat);
}
@ -2281,7 +2281,7 @@ fwohci_tbuf_update(struct fwohci_softc *sc, int dmach)
dump_db(sc, ITX_CH + dmach);
while ((chunk = STAILQ_FIRST(&it->stdma)) != NULL) {
db = ((struct fwohcidb_tr *)(chunk->end))->db;
stat = FWOHCI_DMA_READ(db[ldesc].db.desc.res)
stat = FWOHCI_DMA_READ(db[ldesc].db.desc.res)
>> OHCI_STATUS_SHIFT;
db = ((struct fwohcidb_tr *)(chunk->start))->db;
/* timestamp */
@ -2362,7 +2362,7 @@ fwohci_rbuf_update(struct fwohci_softc *sc, int dmach)
}
splx(s);
if (w) {
if (ir->flag & FWXFERQ_HANDLER)
if (ir->flag & FWXFERQ_HANDLER)
ir->hand(ir);
else
wakeup(ir);
@ -2393,8 +2393,8 @@ dump_dma(struct fwohci_softc *sc, uint32_t ch)
device_printf(sc->fc.dev, "ch %1x cntl:0x%08x cmd:0x%08x match:0x%08x\n",
ch,
cntl,
cmd,
cntl,
cmd,
match);
stat &= 0xffff ;
if (stat) {
@ -2554,7 +2554,7 @@ print_db(struct fwohcidb_tr *db_tr, struct fwohcidb *db,
printf(" Nostat\n");
}
if(key == OHCI_KEY_ST2 ){
printf("0x%08x 0x%08x 0x%08x 0x%08x\n",
printf("0x%08x 0x%08x 0x%08x 0x%08x\n",
FWOHCI_DMA_READ(db[i+1].db.immed[0]),
FWOHCI_DMA_READ(db[i+1].db.immed[1]),
FWOHCI_DMA_READ(db[i+1].db.immed[2]),
@ -2563,15 +2563,15 @@ print_db(struct fwohcidb_tr *db_tr, struct fwohcidb *db,
if(key == OHCI_KEY_DEVICE){
return;
}
if((cmd & OHCI_BRANCH_MASK)
if((cmd & OHCI_BRANCH_MASK)
== OHCI_BRANCH_ALWAYS){
return;
}
if((cmd & OHCI_CMD_MASK)
if((cmd & OHCI_CMD_MASK)
== OHCI_OUTPUT_LAST){
return;
}
if((cmd & OHCI_CMD_MASK)
if((cmd & OHCI_CMD_MASK)
== OHCI_INPUT_LAST){
return;
}
@ -2642,8 +2642,8 @@ device_printf(sc->fc.dev, "DB %08x %08x %08x\n", bulkxfer, db_tr->bus_addr, fdb_
ohcifp->mode.stream.chtag = chtag;
ohcifp->mode.stream.tcode = 0xa;
#if BYTE_ORDER == BIG_ENDIAN
FWOHCI_DMA_WRITE(db[1].db.immed[0], db[1].db.immed[0]);
FWOHCI_DMA_WRITE(db[1].db.immed[1], db[1].db.immed[1]);
FWOHCI_DMA_WRITE(db[1].db.immed[0], db[1].db.immed[0]);
FWOHCI_DMA_WRITE(db[1].db.immed[1], db[1].db.immed[1]);
#endif
FWOHCI_DMA_CLEAR(db[2].db.desc.cmd, OHCI_COUNT_MASK);
@ -3021,7 +3021,7 @@ fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)
if ((vec[nvec-1].iov_len -=
sizeof(struct fwohci_trailer)) == 0)
nvec--;
nvec--;
rb.fc = &sc->fc;
rb.vec = vec;
rb.nvec = nvec;
@ -3030,7 +3030,7 @@ fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)
break;
}
case FWOHCIEV_BUSRST:
if (sc->fc.status != FWBUSRESET)
if (sc->fc.status != FWBUSRESET)
printf("got BUSRST packet!?\n");
break;
default:
@ -3116,8 +3116,8 @@ err:
int
fwohci_print(void *aux, const char *pnp)
{
char *name = aux;
{
char *name = aux;
if (pnp)
aprint_normal("%s at %s", name, pnp);

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_bge.c,v 1.106 2006/04/27 18:09:54 jonathan Exp $ */
/* $NetBSD: if_bge.c,v 1.107 2006/05/28 13:07:21 blymn Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.106 2006/04/27 18:09:54 jonathan Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.107 2006/05/28 13:07:21 blymn Exp $");
#include "bpfilter.h"
#include "vlan.h"
@ -263,7 +263,7 @@ int bge_tso_debug = 0;
/*
* XXX: how to handle variants based on 5750 and derivatives:
* 5750 5751, 5721, possibly 5714, 5752, and 5708?, which
* 5750 5751, 5721, possibly 5714, 5752, and 5708?, which
* in general behave like a 5705, except with additional quirks.
* This driver's current handling of the 5721 is wrong;
* how we map ASIC revision to "quirks" needs more thought.
@ -1262,11 +1262,11 @@ bge_chipinit(struct bge_softc *sc)
(0x2 << BGE_PCIDMARWCTL_WR_WAT_SHIFT));
/* jonathan: alternative from Linux driver */
#define DMA_CTRL_WRITE_PCIE_H20MARK_128 0x00180000
#define DMA_CTRL_WRITE_PCIE_H20MARK_128 0x00180000
#define DMA_CTRL_WRITE_PCIE_H20MARK_256 0x00380000
dma_rw_ctl = 0x76000000; /* XXX XXX XXX */;
device_ctl = pci_conf_read(pa->pa_pc, pa->pa_tag,
device_ctl = pci_conf_read(pa->pa_pc, pa->pa_tag,
BGE_PCI_CONF_DEV_CTRL);
printf("%s: pcie mode=0x%x\n", sc->bge_dev.dv_xname, device_ctl);
@ -3444,7 +3444,7 @@ bge_encap(struct bge_softc *sc, struct mbuf *m_head, u_int32_t *txidx)
int i = 0;
struct m_tag *mtag;
int use_tso, maxsegsize, error;
cur = frag = *txidx;
if (m_head->m_pkthdr.csum_flags) {
@ -3585,7 +3585,7 @@ doit:
csum_flags &= ~(BGE_TXBDFLAG_TCP_UDP_CSUM);
} else {
/*
* XXX jonathan@NetBSD.org: 5705 untested.
* XXX jonathan@NetBSD.org: 5705 untested.
* Requires TSO firmware patch for 5701/5703/5704.
*/
th->th_sum = in_cksum_phdr(ip->ip_src.s_addr,
@ -3593,7 +3593,7 @@ doit:
}
mss = m_head->m_pkthdr.segsz;
txbd_tso_flags |=
txbd_tso_flags |=
BGE_TXBDFLAG_CPU_PRE_DMA |
BGE_TXBDFLAG_CPU_POST_DMA;
@ -3644,7 +3644,7 @@ doit:
f = &sc->bge_rdata->bge_tx_ring[frag];
if (sc->bge_cdata.bge_tx_chain[frag] != NULL)
break;
bge_set_hostaddr(&f->bge_addr, dmamap->dm_segs[i].ds_addr);
f->bge_len = dmamap->dm_segs[i].ds_len;
@ -3831,7 +3831,7 @@ bge_init(struct ifnet *ifp)
/* Specify MTU. */
CSR_WRITE_4(sc, BGE_RX_MTU, ifp->if_mtu +
ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN);
ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN);
/* Load our MAC address. */
m = (u_int16_t *)&(LLADDR(ifp->if_sadl)[0]);

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_ipw.c,v 1.25 2006/05/01 20:43:46 rpaulo Exp $ */
/* $NetBSD: if_ipw.c,v 1.26 2006/05/28 13:09:48 blymn Exp $ */
/* FreeBSD: src/sys/dev/ipw/if_ipw.c,v 1.15 2005/11/13 17:17:40 damien Exp */
/*-
@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_ipw.c,v 1.25 2006/05/01 20:43:46 rpaulo Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_ipw.c,v 1.26 2006/05/28 13:09:48 blymn Exp $");
/*-
* Intel(R) PRO/Wireless 2100 MiniPCI driver
@ -1272,7 +1272,7 @@ ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
case IPW_SBD_TYPE_HEADER:
shdr = sbd->priv;
bus_dmamap_sync(sc->sc_dmat, sc->hdr_map,
bus_dmamap_sync(sc->sc_dmat, sc->hdr_map,
shdr->offset, sizeof(struct ipw_hdr), BUS_DMASYNC_POSTWRITE);
TAILQ_INSERT_TAIL(&sc->sc_free_shdr, shdr, next);
break;
@ -1281,7 +1281,7 @@ ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
ic = &sc->sc_ic;
sbuf = sbd->priv;
bus_dmamap_sync(sc->sc_dmat, sbuf->map,
bus_dmamap_sync(sc->sc_dmat, sbuf->map,
0, MCLBYTES, BUS_DMASYNC_POSTWRITE);
bus_dmamap_unload(sc->sc_dmat, sbuf->map);
m_freem(sbuf->m);
@ -1759,7 +1759,7 @@ ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
sizeof(sc->sc_fwname));
ipw_free_firmware(sc);
/* FALLTRHOUGH */
/* FALLTRHOUGH */
default:
error = ieee80211_ioctl(&sc->sc_ic, cmd, data);
if (error != ENETRESET)