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Remove HIPPI support and the esh(4) driver that uses it. There have not 

been any users of HIPPI for some time, and it is unlikely to be resurrected.
This commit is contained in:
thorpej 2020-01-19 06:55:21 +00:00
parent 9cfa6b201b
commit 85654ec7a9
39 changed files with 49 additions and 5984 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
distrib/sets/lists/base/mi
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@ -1,4 +1,4 @@
# $NetBSD: mi,v 1.1224 2019/12/23 06:45:36 maxv Exp $
# $NetBSD: mi,v 1.1225 2020/01/19 06:55:22 thorpej Exp $
#
# Note: Don't delete entries from here - mark them as "obsolete" instead,
# unless otherwise stated below.
@ -1732,7 +1732,7 @@
./usr/sbin/editmap base-obsolete obsolete
./usr/sbin/edquota base-sysutil-bin
./usr/sbin/envstat base-sysutil-bin
./usr/sbin/eshconfig base-sysutil-bin
./usr/sbin/eshconfig base-obsolete obsolete
./usr/sbin/etcupdate base-sysutil-bin
./usr/sbin/extattrctl base-sysutil-bin
./usr/sbin/execsnoop base-debug-bin dtrace

6
distrib/sets/lists/comp/mi
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@ -1,4 +1,4 @@
# $NetBSD: mi,v 1.2300 2020/01/13 08:25:02 kamil Exp $
# $NetBSD: mi,v 1.2301 2020/01/19 06:55:22 thorpej Exp $
#
# Note: don't delete entries from here - mark them as "obsolete" instead.
./etc/mtree/set.comp comp-sys-root
@ -519,8 +519,8 @@
./usr/include/dev/ic/pdqreg.h comp-obsolete obsolete
./usr/include/dev/ic/pdqvar.h comp-obsolete obsolete
./usr/include/dev/ic/qemufwcfgio.h comp-c-include
./usr/include/dev/ic/rrunnerreg.h comp-c-include
./usr/include/dev/ic/rrunnervar.h comp-c-include
./usr/include/dev/ic/rrunnerreg.h comp-obsolete obsolete
./usr/include/dev/ic/rrunnervar.h comp-obsolete obsolete
./usr/include/dev/ic/smc83c170reg.h comp-obsolete obsolete
./usr/include/dev/ic/smc83c170var.h comp-obsolete obsolete
./usr/include/dev/ic/smc90cx6reg.h comp-obsolete obsolete

5
sys/arch/alpha/conf/GENERIC
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@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.397 2020/01/19 01:25:04 thorpej Exp $
# $NetBSD: GENERIC,v 1.398 2020/01/19 06:55:22 thorpej Exp $
#
# This machine description file is used to generate the default NetBSD
# kernel.
@ -19,7 +19,7 @@ include "arch/alpha/conf/std.alpha"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
ident "GENERIC-$Revision: 1.397 $"
ident "GENERIC-$Revision: 1.398 $"
maxusers 32
@ -308,7 +308,6 @@ dpt* at pci? dev ? function ? # DPT SmartCache/SmartRAID
eap* at pci? dev ? function ? # Ensoniq AudioPCI
ep* at pci? dev ? function ? # 3COM 3c59x/3c90x Ethernet
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
eso* at pci? dev ? function ? # ESS Solo-1 PCI AudioDrive
ex* at pci? dev ? function ? # 3COM 3c90x[BC] Ethernet
fpa* at pci? dev ? function ? # DEC DEFPA FDDI

3
sys/arch/alpha/conf/RAWHIDE
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@ -1,4 +1,4 @@
# $NetBSD: RAWHIDE,v 1.43 2018/09/06 05:36:49 maxv Exp $
# $NetBSD: RAWHIDE,v 1.44 2020/01/19 06:55:22 thorpej Exp $
#
# Alpha 4100 stripped for action server kernel.
#
@ -60,7 +60,6 @@ ahc* at pci? dev ? function ? # Adaptec [23]94x, aic78x0 SCSI
bha* at pci? dev ? function ? # BusLogic 9xx SCSI (untested)
cy* at pci? dev ? function ? # Cyclades Cyclom-Y (untested)
ep* at pci? dev ? function ? # 3COM 3c59x/3c90x Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EEPRO 10+/100B
isp* at pci? dev ? function ? # Qlogic ISP 10x0 SCSI

5
sys/arch/amd64/conf/ALL
View File

@ -1,4 +1,4 @@
# $NetBSD: ALL,v 1.137 2020/01/19 01:25:04 thorpej Exp $
# $NetBSD: ALL,v 1.138 2020/01/19 06:55:22 thorpej Exp $
# From NetBSD: GENERIC,v 1.787 2006/10/01 18:37:54 bouyer Exp
#
# ALL machine description file
@ -17,7 +17,7 @@ include "arch/amd64/conf/std.amd64"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "ALL-$Revision: 1.137 $"
#ident "ALL-$Revision: 1.138 $"
maxusers 64 # estimated number of users
@ -974,7 +974,6 @@ dge* at pci? dev ? function ? # Intel 82597 10GbE LR
ena* at pci? dev ? function ? # Amazon Elastic Network Adapter
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
et* at pci? dev ? function ? # Agere/LSI ET1310/ET1301 Gigabit
ex* at pci? dev ? function ? # 3Com 3c90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI

5
sys/arch/amd64/conf/GENERIC
View File

@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.555 2020/01/19 01:25:04 thorpej Exp $
# $NetBSD: GENERIC,v 1.556 2020/01/19 06:55:22 thorpej Exp $
#
# GENERIC machine description file
#
@ -22,7 +22,7 @@ include "arch/amd64/conf/std.amd64"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "GENERIC-$Revision: 1.555 $"
#ident "GENERIC-$Revision: 1.556 $"
maxusers 64 # estimated number of users
@ -792,7 +792,6 @@ dge* at pci? dev ? function ? # Intel 82597 10GbE LR
ena* at pci? dev ? function ? # Amazon.com Elastic Network Adapter
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
et* at pci? dev ? function ? # Agere/LSI ET1310/ET1301 Gigabit
ex* at pci? dev ? function ? # 3Com 90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI

5
sys/arch/amd64/conf/XEN3_DOM0
View File

@ -1,4 +1,4 @@
# $NetBSD: XEN3_DOM0,v 1.170 2020/01/01 10:36:43 ryo Exp $
# $NetBSD: XEN3_DOM0,v 1.171 2020/01/19 06:55:22 thorpej Exp $
include "arch/amd64/conf/std.xen"
@ -11,7 +11,7 @@ options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#options UVMHIST_PRINT
#options SYSCALL_DEBUG
#ident "XEN3_DOM0-$Revision: 1.170 $"
#ident "XEN3_DOM0-$Revision: 1.171 $"
maxusers 32 # estimated number of users
@ -340,7 +340,6 @@ bnx* at pci? dev ? function ? # Broadcom NetXtremeII gigabit Ethernet
dge* at pci? dev ? function ? # Intel 82597 10GbE LR
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
et* at pci? dev ? function ? # Agere/LSI ET1310/ET1301 Gigabit
ex* at pci? dev ? function ? # 3Com 90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI

5
sys/arch/arc/conf/GENERIC
View File

@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.194 2020/01/19 01:25:04 thorpej Exp $
# $NetBSD: GENERIC,v 1.195 2020/01/19 06:55:22 thorpej Exp $
#
# GENERIC machine description file
#
@ -22,7 +22,7 @@ include "arch/arc/conf/std.arc"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "GENERIC-$Revision: 1.194 $"
#ident "GENERIC-$Revision: 1.195 $"
maxusers 32 # estimated number of users
@ -319,7 +319,6 @@ viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
bge* at pci? dev ? function ? # Broadcom 570x gigabit Ethernet
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
#esh* at pci? dev ? function ? # Essential HIPPI card
ex* at pci? dev ? function ? # 3Com 90x[BC]
#fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EtherExpress PRO

3
sys/arch/cats/conf/GENERIC
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@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.174 2020/01/19 01:25:04 thorpej Exp $
# $NetBSD: GENERIC,v 1.175 2020/01/19 06:55:23 thorpej Exp $
#
# GENERIC machine description file
#
@ -288,7 +288,6 @@ uk* at atapibus? drive ? flags 0x0000 # ATAPI unknown
ep* at pci? dev ? function ? # 3C590 ethernet cards
ex* at pci? dev ? function ? # 3Com 90x[B]
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
#esh* at pci? dev ? function ? # Essential HIPPI card
#fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B
#le* at pci? dev ? function ? # PCnet-PCI Ethernet

3
sys/arch/cats/conf/INSTALL
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@ -1,4 +1,4 @@
# $NetBSD: INSTALL,v 1.110 2020/01/19 01:25:04 thorpej Exp $
# $NetBSD: INSTALL,v 1.111 2020/01/19 06:55:23 thorpej Exp $
#
# CATSINST -- CHALTECH CATS Install kernel
#
@ -234,7 +234,6 @@ sd* at atapibus? drive ? flags 0x0000 # ATAPI disk drives
ep* at pci? dev ? function ? # 3C590 ethernet cards
ex* at pci? dev ? function ? # 3Com 90x[B]
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
#esh* at pci? dev ? function ? # Essential HIPPI card
#fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B
#le* at pci? dev ? function ? # PCnet-PCI Ethernet

5
sys/arch/cobalt/conf/GENERIC
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@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.163 2020/01/19 01:25:04 thorpej Exp $
# $NetBSD: GENERIC,v 1.164 2020/01/19 06:55:23 thorpej Exp $
#
# GENERIC machine description file
#
@ -22,7 +22,7 @@ include "arch/cobalt/conf/std.cobalt"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "GENERIC-$Revision: 1.163 $"
#ident "GENERIC-$Revision: 1.164 $"
maxusers 32
@ -238,7 +238,6 @@ wd* at atabus? drive ? flags 0x0000
#ep* at pci? dev ? function ? # 3Com 3c59x
#ex* at pci? dev ? function ? # 3Com 90x[BC]
#epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
#esh* at pci? dev ? function ? # Essential HIPPI card
#fpa* at pci? dev ? function ? # DEC DEFPA FDDI
#fxp* at pci? dev ? function ? # Intel EtherExpress PRO10+/100B
#le* at pci? dev ? function ? # PCnet-PCI Ethernet

5
sys/arch/cobalt/conf/INSTALL
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@ -1,4 +1,4 @@
# $NetBSD: INSTALL,v 1.71 2020/01/19 01:25:04 thorpej Exp $
# $NetBSD: INSTALL,v 1.72 2020/01/19 06:55:23 thorpej Exp $
#
# INSTALL -- installation and rescue kernel.
#
@ -10,7 +10,7 @@ include "arch/cobalt/conf/std.cobalt"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "INSTALL-$Revision: 1.71 $"
#ident "INSTALL-$Revision: 1.72 $"
makeoptions COPTS="-Os -mmemcpy"
makeoptions CPUFLAGS="-march=vr5000 -mabi=32"
@ -228,7 +228,6 @@ wd* at atabus? drive ? flags 0x0000
#ep* at pci? dev ? function ? # 3Com 3c59x
#ex* at pci? dev ? function ? # 3Com 90x[BC]
#epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
#esh* at pci? dev ? function ? # Essential HIPPI card
#fpa* at pci? dev ? function ? # DEC DEFPA FDDI
#fxp* at pci? dev ? function ? # Intel EtherExpress PRO10+/100B
#le* at pci? dev ? function ? # PCnet-PCI Ethernet

3
sys/arch/evbarm/conf/IXDP425
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@ -1,4 +1,4 @@
# $NetBSD: IXDP425,v 1.56 2018/12/12 06:29:36 maxv Exp $
# $NetBSD: IXDP425,v 1.57 2020/01/19 06:55:23 thorpej Exp $
#
# IXDP425 -- Intel IXDP425/IXCDP1100 Development Platform
#
@ -168,7 +168,6 @@ an* at pci? dev ? function ? # Aironet PC4500/PC4800 (802.11)
bge* at pci? dev ? function ? # Broadcom 570x gigabit Ethernet
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
ex* at pci? dev ? function ? # 3Com 90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B

3
sys/arch/evbarm/conf/ZAO425
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@ -1,4 +1,4 @@
# $NetBSD: ZAO425,v 1.64 2018/12/12 06:29:36 maxv Exp $
# $NetBSD: ZAO425,v 1.65 2020/01/19 06:55:23 thorpej Exp $
#
# ZAO425 -- Intel IXP425
#
@ -155,7 +155,6 @@ an* at pci? dev ? function ? # Aironet PC4500/PC4800 (802.11)
bge* at pci? dev ? function ? # Broadcom 570x gigabit Ethernet
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
ex* at pci? dev ? function ? # 3Com 90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B

5
sys/arch/evbmips/conf/MALTA
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@ -1,10 +1,10 @@
# $NetBSD: MALTA,v 1.97 2020/01/19 01:25:05 thorpej Exp $
# $NetBSD: MALTA,v 1.98 2020/01/19 06:55:23 thorpej Exp $
include "arch/evbmips/conf/std.malta"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "MALTA-$Revision: 1.97 $"
#ident "MALTA-$Revision: 1.98 $"
maxusers 32
@ -217,7 +217,6 @@ ath* at pci? dev ? function ? # Atheros WLAN
#ep* at pci? dev ? function ? # 3Com 3c59x
#ex* at pci? dev ? function ? # 3Com 90x[B]
#epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
#esh* at pci? dev ? function ? # Essential HIPPI card
#fpa* at pci? dev ? function ? # DEC DEFPA FDDI
#fxp* at pci? dev ? function ? # Intel EtherExpress PRO10+/100B
#le* at pci? dev ? function ? # PCnet-PCI Ethernet

3
sys/arch/evbppc/conf/PMPPC
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@ -1,4 +1,4 @@
# $NetBSD: PMPPC,v 1.50 2019/04/26 21:40:29 sevan Exp $
# $NetBSD: PMPPC,v 1.51 2020/01/19 06:55:23 thorpej Exp $
#
# PMPPC
#
@ -229,7 +229,6 @@ icpsp* at icp? unit ? # SCSI pass-through
an* at pci? dev ? function ? # Aironet PC4500/PC4800 (802.11)
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
ex* at pci? dev ? function ? # 3Com 90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B

5
sys/arch/hppa/conf/GENERIC
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@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.28 2020/01/19 01:25:05 thorpej Exp $
# $NetBSD: GENERIC,v 1.29 2020/01/19 06:55:23 thorpej Exp $
#
# GENERIC machine description file
#
@ -23,7 +23,7 @@ include "arch/hppa/conf/std.hppa"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
options SYSCTL_INCLUDE_DESCR # Include sysctl descriptions in kernel
#ident "GENERIC-$Revision: 1.28 $"
#ident "GENERIC-$Revision: 1.29 $"
maxusers 32 # estimated number of users
@ -464,7 +464,6 @@ bce* at pci? dev ? function ? # Broadcom 4401 10/100 Ethernet
bge* at pci? dev ? function ? # Broadcom 570x gigabit Ethernet
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
ex* at pci? dev ? function ? # 3Com 90x[BC]
# fpa is broken, does funky things with bus_dma
#fpa* at pci? dev ? function ? # DEC DEFPA FDDI

5
sys/arch/i386/conf/ALL
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@ -1,4 +1,4 @@
# $NetBSD: ALL,v 1.481 2020/01/19 01:25:05 thorpej Exp $
# $NetBSD: ALL,v 1.482 2020/01/19 06:55:23 thorpej Exp $
# From NetBSD: GENERIC,v 1.787 2006/10/01 18:37:54 bouyer Exp
#
# ALL machine description file
@ -17,7 +17,7 @@ include "arch/i386/conf/std.i386"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "ALL-$Revision: 1.481 $"
#ident "ALL-$Revision: 1.482 $"
maxusers 64 # estimated number of users
@ -1056,7 +1056,6 @@ cas* at pci? dev ? function ? # Sun Cassini/Cassini+ Ethernet
dge* at pci? dev ? function ? # Intel 82597 10GbE LR
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
et* at pci? dev ? function ? # Agere/LSI ET1310/ET1301 Gigabit
ex* at pci? dev ? function ? # 3Com 3c90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI

5
sys/arch/i386/conf/GENERIC
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@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.1219 2020/01/19 01:25:05 thorpej Exp $
# $NetBSD: GENERIC,v 1.1220 2020/01/19 06:55:23 thorpej Exp $
#
# GENERIC machine description file
#
@ -22,7 +22,7 @@ include "arch/i386/conf/std.i386"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "GENERIC-$Revision: 1.1219 $"
#ident "GENERIC-$Revision: 1.1220 $"
maxusers 64 # estimated number of users
@ -971,7 +971,6 @@ bwfm* at pci? dev ? function ? # Broadcom FullMAC
dge* at pci? dev ? function ? # Intel 82597 10GbE LR
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
et* at pci? dev ? function ? # Agere/LSI ET1310/ET1301 Gigabit
ex* at pci? dev ? function ? # 3Com 3c90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI

3
sys/arch/i386/conf/GENERIC_TINY
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@ -1,4 +1,4 @@
# $NetBSD: GENERIC_TINY,v 1.164 2020/01/19 01:25:05 thorpej Exp $
# $NetBSD: GENERIC_TINY,v 1.165 2020/01/19 06:55:23 thorpej Exp $
#
# GENERIC_TINY -- suitable default for 4M machines
# No EISA, PCI, or SCSI.
@ -365,7 +365,6 @@ fd* at fdc? drive ? # the drives themselves
# PCI network interfaces
#ep* at pci? dev ? function ? # 3Com 3c59x/3c90x Ethernet
#epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
#esh* at pci? dev ? function ? # Essential HIPPI card
#fpa* at pci? dev ? function ? # DEC DEFPA FDDI
#fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B
#le* at pci? dev ? function ? # PCnet-PCI Ethernet

3
sys/arch/i386/conf/INSTALL_FLOPPY
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@ -1,4 +1,4 @@
# $NetBSD: INSTALL_FLOPPY,v 1.50 2020/01/19 01:25:05 thorpej Exp $
# $NetBSD: INSTALL_FLOPPY,v 1.51 2020/01/19 06:55:23 thorpej Exp $
#
# INSTALL - Installation kernel.
#
@ -482,7 +482,6 @@ bge* at pci? dev ? function ? # Broadcom 570x Gigabit Ethernet
ep* at pci? dev ? function ? # 3Com 3c59x
ex* at pci? dev ? function ? # 3Com 3c90x[BC]
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
#esh* at pci? dev ? function ? # Essential HIPPI card
fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B
gsip* at pci? dev ? function ? # NS83820 Gigabit Ethernet

3
sys/arch/i386/conf/XEN3PAE_DOM0
View File

@ -1,4 +1,4 @@
# $NetBSD: XEN3PAE_DOM0,v 1.16 2020/01/19 01:25:05 thorpej Exp $
# $NetBSD: XEN3PAE_DOM0,v 1.17 2020/01/19 06:55:23 thorpej Exp $
#
# XEN3_0: Xen 3.0 domain0 kernel
@ -321,7 +321,6 @@ bnx* at pci? dev ? function ? # Broadcom NetXtremeII gigabit Ethernet
dge* at pci? dev ? function ? # Intel 82597 10GbE LR
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
et* at pci? dev ? function ? # Agere/LSI ET1310/ET1301 Gigabit
ex* at pci? dev ? function ? # 3Com 3c90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI

5
sys/arch/sgimips/conf/GENERIC32_IP3x
View File

@ -1,4 +1,4 @@
# $NetBSD: GENERIC32_IP3x,v 1.127 2020/01/19 01:25:07 thorpej Exp $
# $NetBSD: GENERIC32_IP3x,v 1.128 2020/01/19 06:55:23 thorpej Exp $
#
# GENERIC32_IP3x machine description file
#
@ -28,7 +28,7 @@ makeoptions TEXTADDR="0x80069000" # entry point
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "GENERIC32_IP3x-$Revision: 1.127 $"
#ident "GENERIC32_IP3x-$Revision: 1.128 $"
maxusers 32
@ -180,7 +180,6 @@ ubsec* at pci? dev ? function ? # Broadcom 5501/5601/580x/582x
#bge* at pci? dev ? function ? # Broadcom 570x gigabit Ethernet
ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card
ex* at pci? dev ? function ? # 3Com 90x[BC]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI
fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B

5
sys/arch/sparc64/conf/GENERIC
View File

@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.219 2020/01/19 01:25:07 thorpej Exp $
# $NetBSD: GENERIC,v 1.220 2020/01/19 06:55:24 thorpej Exp $
#
# GENERIC machine description file
#
@ -22,7 +22,7 @@ include "arch/sparc64/conf/std.sparc64"
options INCLUDE_CONFIG_FILE # embed config file in kernel binary
#ident "GENERIC-$Revision: 1.219 $"
#ident "GENERIC-$Revision: 1.220 $"
maxusers 64
@ -490,7 +490,6 @@ cas* at pci? dev ? function ? # Sun Cassini/Cassini+ Ethernet
# XXX causes ICE
#ep* at pci? dev ? function ? # 3Com 3c59x
epic* at pci? dev ? function ? # SMC EPIC/100 Ethernet
esh* at pci? dev ? function ? # Essential HIPPI card UT
ex* at pci? dev ? function ? # 3Com 90x[B]
fpa* at pci? dev ? function ? # DEC DEFPA FDDI UT
fxp* at pci? dev ? function ? # Intel EtherExpress PRO 10+/100B

7
sys/conf/files
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@ -1,4 +1,4 @@
# $NetBSD: files,v 1.1249 2020/01/08 12:04:56 ad Exp $
# $NetBSD: files,v 1.1250 2020/01/19 06:55:24 thorpej Exp $
# @(#)files.newconf 7.5 (Berkeley) 5/10/93
version 20171118
@ -924,11 +924,6 @@ file dev/ic/clmpcc.c clmpcc needs-flag
device ug: sysmon_envsys
file dev/ic/ug.c ug needs-flag
# Essential Communications Corp. HIPPI Interface
#
device esh: hippi, ifnet
file dev/ic/rrunner.c esh needs-flag
# SMC 90c26, SMC 90C56 (and 90C66 if in compat mode) chip driver
#
device bah: ifnet, arcnet, arp

5
sys/dev/ic/Makefile
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@ -1,10 +1,9 @@
# $NetBSD: Makefile,v 1.26 2017/11/25 16:31:03 jmcneill Exp $
# $NetBSD: Makefile,v 1.27 2020/01/19 06:55:21 thorpej Exp $
INCSDIR= /usr/include/dev/ic
# Only install includes which are used by userland
INCS= athioctl.h bt8xx.h hd44780var.h icpreg.h icp_ioctl.h isp_ioctl.h \
mlxreg.h mlxio.h nvmeio.h nvmereg.h qemufwcfgio.h rrunnerreg.h \
rrunnervar.h wdcreg.h wi_ieee.h
mlxreg.h mlxio.h nvmeio.h nvmereg.h qemufwcfgio.h wdcreg.h wi_ieee.h
.include <bsd.kinc.mk>

3648
sys/dev/ic/rrunner.c
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File diff suppressed because it is too large Load Diff

541
sys/dev/ic/rrunnerreg.h
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@ -1,541 +0,0 @@
/* $NetBSD: rrunnerreg.h,v 1.10 2018/09/03 16:29:31 riastradh Exp $ */
/*
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code contributed to The NetBSD Foundation by Kevin M. Lahey
* of the Numerical Aerospace Simulation Facility, NASA Ames Research
* Center.
*
* Partially based on a HIPPI driver written by Essential Communications
* Corporation. Thanks to Jason Thorpe, Matt Jacob, and Fred Templin
* for invaluable advice and encouragement!
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Description of RoadRunner registers and hardware constructs.
*
* We're trying to support version 1 AND version 2 of the RunCode.
* The fields that changed for version 2 are prefixed with RR2_ instead
* of RR_. If version 1 disappears (it is currently deprecated),
* we can remove compatibility, but it seems a shame to lose functionality
* for no good reason.
*/
/* PCI registers */
#define RR_PCI_BIST 0x0c /* Built-In Self Test */
/* General control registers */
#define RR_MISC_HOST_CTL 0x40 /* Misc. Host Control */
#define RR_MISC_LOCAL_CTL 0x44 /* Misc. Local Control */
#define RR_PROC_PC 0x48 /* i960 program counter */
#define RR_PROC_BREAKPT 0x4c /* set breakpoint on i960 */
#define RR_TIMER 0x54 /* clock */
#define RR_TIMER_REF 0x58 /* When this matches the TIMER, interrupt */
#define RR_PCI_STATE 0x5c /* misc configuration */
#define RR_MAIN_EVENT 0x60 /* main event register for i960 & RoadRunner */
#define RR_WINDOW_BASE 0x68 /* pointer to internal memory*/
#define RR_WINDOW_DATA 0x6c /* value of mem at WINDOW_BASE */
#define RR_RX_STATE 0x70 /* HIPPI receiver state */
#define RR_TX_STATE 0x74 /* HIPPI transmitter state */
#define RR_EXT_SER_DATA 0x7c /* controls hardware besides RR on board */
/* Host DMA registers */
#define RR_WRITE_HOST 0x80 /* 64-bit pointer to data on host */
#define RR_READ_HOST 0x90
#define RR_WRITE_LENGTH 0x9c /* length of data to be moved */
#define RR_READ_LENGTH 0xac
#define RR_DMA_WRITE_STATE 0xa0 /* controls DMA */
#define RR_DMA_READ_STATE 0xb0
#define RR_WRITE_DST 0xa4 /* Internal destination of DMA */
#define RR_READ_DST 0xb4
/* RunCode registers */
#define RR_EVENT_CONSUMER 0x200 /* index of consumer in event ring */
#define RR_SEND_PRODUCER 0x218 /* index of producer in sender ring */
#define RR_SNAP_RECV_PRODUCER 0x21c /* index of producer in SNAP ring */
#define RR_RECVS_PRODUCER 0x220 /* index of producer in recv rings */
#define RR_COMMAND_RING 0x240 /* set of 16 command ring elements */
#define RR_ULA 0x280 /* Universal LAN Address */
#define RR_RECV_RING_PTR 0x288 /* receive ring address */
#define RR_GEN_INFO_PTR 0x290 /* general info block address */
#define RR_MODE_AND_STATUS 0x298 /* operating mode and status */
#define RR_CONN_RETRY_COUNT 0x29c /* when no campon, try count */
#define RR_CONN_RETRY_TIMER 0x2a0 /* clock ticks to delay retry */
#define RR_CONN_TIMEOUT 0x2a4 /* campon delay timeout */
#define RR_STATS_TIMER 0x2a8 /* clock ticks between stats copy */
#define RR_MAX_RECV_RINGS 0x2ac /* max receive rings (RO) */
#define RR_INTERRUPT_TIMER 0x2b0 /* clock ticks between interrupts */
#define RR_TX_TIMEOUT 0x2b4 /* transmit data not moving timer */
#define RR_RX_TIMEOUT 0x2b8 /* receive data not moving timer */
#define RR_EVENT_PRODUCER 0x2bc /* index of producer in event ring */
#define RR_TRACE_INDEX 0x2c0 /* RunCode trace pointer */
#define RR_RUNCODE_FAIL1 0x2c4 /* failure codes */
#define RR_RUNCODE_FAIL2 0x2c8
#define RR_FILTER_LA 0x2d0 /* internal debug, filtering */
#define RR_RUNCODE_VERSION 0x2d4 /* RunCode version data */
#define RR_RUNCODE_RECV_CONS 0x300 /* Runcode receive ring consumption */
#define RR_DRIVER_RECV_CONS 0x320 /* Driver receive ring consumption */
#define RR_MEMORY_WINDOW 0x800 /* Memory window */
/*
* Event codes
*/
/* General events */
#define RR_EC_RUNCODE_UP 0x01
#define RR_EC_WATCHDOG 0x02
#define RR_EC_TRACE 0x03
#define RR_EC_STATS_RETRIEVED 0x04
#define RR_EC_INVALID_CMD 0x05
#define RR_EC_SET_CMD_CONSUMER 0x06
#define RR_EC_LINK_ON 0x07
#define RR_EC_LINK_OFF 0x08
#define RR2_EC_INTERNAL_ERROR 0x09
#define RR_EC_INTERNAL_ERROR 0x0a
#define RR2_EC_SOFTWARE_ERROR 0x0a
#define RR_EC_STATS_UPDATE 0x0b
#define RR_EC_REJECTING 0x0c
/* Send events */
#define RR_EC_SET_SND_CONSUMER 0x10
#define RR_EC_PACKET_SENT 0x11
#define RR_EC_SEND_RING_LOW 0x12
#define RR_EC_CONN_REJECT 0x13
#define RR_EC_CAMPON_TIMEOUT 0x14
#define RR_EC_CONN_TIMEOUT 0x15
#define RR_EC_DISCONN_ERR 0x16
#define RR_EC_INTERNAL_PARITY 0x17
#define RR_EC_TX_IDLE 0x18
#define RR_EC_SEND_LINK_OFF 0x19
#define RR_EC_BAD_SEND_RING 0x1a
#define RR_EC_BAD_SEND_BUF 0x1b
#define RR_EC_BAD_SEND_DESC 0x1c
/* Receive events */
#define RR_EC_RING_ENABLED 0x20
#define RR_EC_RING_ENABLE_ERR 0x21
#define RR_EC_RING_DISABLED 0x22
#define RR_EC_RECV_RING_LOW 0x23
#define RR_EC_RECV_RING_OUT 0x24
#define RR_EC_PACKET_DISCARDED 0x25
#define RR_EC_RECV_RING_FLUSH 0x26
#define RR_EC_RECV_ERROR_INFO 0x27
#define RR_EC_SET_RECV_CONSUMER 0x29
#define RR_EC_PACKET_RECVED 0x2a
#define RR_EC_PARITY_ERR 0x2b
#define RR_EC_LLRC_ERR 0x2c
#define RR_EC_IP_HDR_CKSUM_ERR 0x2d
#define RR_EC_DATA_CKSUM_ERR 0x2e
#define RR_EC_SHORT_BURST_ERR 0x2f
#define RR_EC_RECV_LINK_OFF 0x30
#define RR_EC_FLAG_SYNC_ERR 0x31
#define RR_EC_FRAME_ERR 0x32
#define RR_EC_RECV_IDLE 0x33
#define RR_EC_PKT_LENGTH_ERR 0x34
#define RR_EC_STATE_TRANS_ERR 0x35
#define RR_EC_NO_READY_PULSE 0x3c
#define RR_EC_BAD_RECV_BUF 0x36
#define RR_EC_BAD_RECV_DESC 0x37
#define RR_EC_BAD_RECV_RING 0x38
#define RR_EC_NO_RING_FOR_ULP 0x3a
#define RR_EC_OUT_OF_BUF 0x3b
#define RR_EC_UNIMPLEMENTED 0x40
/*
* Command codes
*/
#define RR_CC_START_RUNCODE 0x01
#define RR_CC_UPDATE_STATS 0x02
#define RR_CC_DISCONN_SRC 0x03
#define RR_CC_DISCONN_DST 0x04
#define RR_CC_WATCHDOG 0x05
#define RR_CC_TRACE 0x06
#define RR_CC_SET_SEND_PRODUCER 0x07
#define RR_CC_SET_RECV_PRODUCER 0x08
#define RR_CC_DISABLE_RING 0x09
#define RR_CC_ENABLE_RING 0x0a
#define RR_CC_DISCARD_PKT 0x0b
#define RR_CC_FLUSH_RECV_RING 0x0c /* unimplemented */
#define RR_CC_CONN_MGT 0x0d
/*
* Masks for registers
*/
/* Misc Host Control */
#define RR_MH_INTERRUPT 0x001 /* interrupt state */
#define RR_MH_CLEAR_INT 0x002 /* clear interrupt */
#define RR_MH_NO_SWAP 0x004 /* disable normal endian swap to host */
#define RR_MH_HALT_PROC 0x010 /* set to halt processor, clear to start */
#define RR_MH_STEP 0x020 /* set to single step processor */
#define RR_MH_PROC_HALT 0x100 /* indicates processor has been halted */
#define RR_MH_BAD_INSTR 0x200 /* indicates invalid instruction executed */
#define RR_MH_REVISION_MASK 0xf0000000 /* mask to retrieve revision code */
/* Misc Local Control */
#define RR_LC_CLEAR_INT 0x0002 /* clear interrupt */
#define RR_LC_FAST_PROM 0x0008 /* use fast EEPROM access */
#define RR_LC_ADD_SRAM 0x0100 /* > 1MB SRAM present */
#define RR_LC_ADD_HIPPI 0x0200 /* double number of HIPPI descriptors */
#define RR_LC_PARITY_ON 0x0400 /* enable local parity checking */
#define RR_LC_WRITE_PROM 0x1000 /* EEPROM write enable */
/* PCI State */
#define RR_PS_READ_MASK 0x1c
#define RR_PS_READ_SHIFT 2
#define RR_PS_READ_DISABLE (0 << RR_PS_READ_SHIFT)
#define RR_PS_READ_4 (1 << RR_PS_READ_SHIFT)
#define RR_PS_READ_16 (2 << RR_PS_READ_SHIFT)
#define RR_PS_READ_32 (3 << RR_PS_READ_SHIFT)
#define RR_PS_READ_64 (4 << RR_PS_READ_SHIFT)
#define RR_PS_READ_128 (5 << RR_PS_READ_SHIFT)
#define RR_PS_READ_256 (6 << RR_PS_READ_SHIFT)
#define RR_PS_READ_1024 (7 << RR_PS_READ_SHIFT)
#define RR_PS_WRITE_MASK 0xe0
#define RR_PS_WRITE_SHIFT 5
#define RR_PS_WRITE_DISABLE (0 << RR_PS_WRITE_SHIFT)
#define RR_PS_WRITE_4 (1 << RR_PS_WRITE_SHIFT)
#define RR_PS_WRITE_16 (2 << RR_PS_WRITE_SHIFT)
#define RR_PS_WRITE_32 (3 << RR_PS_WRITE_SHIFT)
#define RR_PS_WRITE_64 (4 << RR_PS_WRITE_SHIFT)
#define RR_PS_WRITE_128 (5 << RR_PS_WRITE_SHIFT)
#define RR_PS_WRITE_256 (6 << RR_PS_WRITE_SHIFT)
#define RR_PS_WRITE_1024 (7 << RR_PS_WRITE_SHIFT)
#define RR_PS_MIN_DMA_MASK 0xff00
#define RR_PS_MIN_DMA_SHIFT 8
/* HIPPI Receive State */
#define RR_RS_ENABLE 0x01 /* enable new connections */
#define RR_RS_RESET 0x02 /* reset receive interface */
#define RR_RS_REJECT_NONE 0x00 /* don't ever reject connections */
#define RR_RS_REJECT_2K 0x20 /* reject if only 2KB free */
#define RR_RS_REJECT_4K 0x30 /* reject if only 4KB free */
#define RR_RS_REJECT_8K 0x40 /* reject if only 8KB free */
#define RR_RS_REJECT_16K 0x50 /* reject if only 16KB free */
#define RR_RS_REJECT_32K 0x60 /* reject if only 32KB free */
#define RR_RS_REJECT_64K 0x70 /* reject if only 64KB free */
/* HIPPI Transmit State */
#define RR_TS_ENABLE 0x01 /* enable transmit state machine */
#define RR_TS_PERMANENT 0x02 /* this connection permanent while set */
/* External Serial Data */
/*
* This controls hardware that is external to the RoadRunner.
* Bits 0-15 are set on write, 16-31 are read on read.
*/
#define RR_ES_TDAV 0x004 /* transmit data available */
#define RR_ES_LED1 0x008 /* LED1 control */
#define RR_ES_LED2 0x010 /* LED2 control */
#define RR_ES_RX_PERM 0x020 /* set permanent receive connection */
#define RR_ES_LEDAUTO 0x040 /* clear to let LED1 and LED2 control LEDs */
#define RR_ES_LLB_ENA 0x080 /* local loopback enable */
#define RR_ES_TP_START 0x100 /* test points (bits 8-13) */
#define RR_ES_REGINT 0x10000 /* interrupt from SEEQ-8100 (Gig-E) */
#define RR_ES_MISC 0x20000 /* misc input */
#define RR_ES_RXSIGDET 0x40000 /* fiber optic RXSIGDET output */
/* DMA Read State */
#define RR_DR_RESET 0x001 /* set to reset read DMA */
#define RR_DR_ACTIVE 0x008 /* set to start DMA */
#define RR_DR_THRESHOLD_MASK 0x1f0 /* mask off threshold values */
#define RR_DR_THRESHOLD_SHIFT 4 /* shift to set threshold values */
#define RR_DR_THRESHOLD_MAX 16
/* DMA Write State */
#define RR_DW_RESET 0x001 /* set to reset write DMA */
#define RR_DW_CKSUM 0x004 /* set to enable checksum calc on DMA */
#define RR_DW_ACTIVE 0x008 /* set to start DMA */
#define RR_DW_THRESHOLD_MASK 0x1f0 /* mask off threshold values */
#define RR_DW_THRESHOLD_SHIFT 4 /* shift to set threshold values */
#define RR_DW_THRESHOLD_MAX 18
/* Operating Mode and Status */
#define RR_MS_LOOPBACK 0x0001 /* loopback through the GLink hardware */
#define RR_MS_PH_MODE 0x0002 /* set for PH, clear for FP */
#define RR_MS_LONG_PTRS 0x0004 /* set indicates 64-bit pointers */
#define RR_MS_WORD_SWAP 0x0008 /* set to swap words in 64-bit pointers */
#define RR_MS_WARNINGS 0x0010 /* set to enable warning events */
#define RR_MS_ERR_TERM 0x0020 /* set to terminate connection on error */
#define RR_MS_DIRECT 0x0040 /* debug flag. enable filterLA checks */
#define RR_MS_NO_WATCHDOG 0x0080 /* set to disable watchdog */
#define RR_MS_SWAP_DATA 0x0100 /* set to byte swap data */
#define RR_MS_SWAP_CNTRL 0x0200 /* set to byte swap control structures */
#define RR_MS_ERR_HALT 0x0400 /* set to halt NIC on RunCode error */
#define RR_MS_NO_RESTART 0x0800 /* set to prevent NIC restart after error */
#define RR_MS_TX_HALFDUP 0x1000 /* NIC does half-duplex transmit */
#define RR_MS_RX_HALFDUP 0x2000 /* NIC does half-duplex receive */
#define RR_MS_GIG_E 0x4000 /* NIC does Gig-E instead of HIPPI */
#define RR_MS_FATAL_ERR 0x4000000 /* fatal error on NIC */
#define RR_MS_EVENT_OVER 0x8000000 /* event ring overflow */
/* Options field (top half of high word of ULA in RunCode) */
#define RR_OP_GIGE 0x01 /* Support for Gig-E NIC */
#define RR_OP_TRACED 0x02 /* Runcode generates debug traces */
#define RR_OP_1MEG 0x04 /* Support for 1MB of SRAM */
#define RR_OP_CDI 0x08 /* Support for Character Device Interace */
#define RR_OP_MSDOS 0x10 /* For testing RunCode under MS-DOS!? */
#define RR_OP_COMEV 0x20 /* New v2 Command/Event interface */
#define RR_OP_LONG_TX 0x40 /* Long transmit descr */
#define RR_OP_LONG_RX 0x80 /* Long receive descr (set when not CDI) */
/*
* EEPROM locations
*
* The EEPROM layout is a little weird. There is a valid byte every
* eight bytes. Words are then smeared out over 32 bytes.
* All addresses listed here are the actual starting addresses.
* The programmer is responsible for assembling a word from each of the
* bytes available.
*
* NB: This is incomplete. I just ran out of patience for entering values.
*/
#define RR_EE_OFFSET 0x80000000 /* offset to the start of EEPROM mem */
#define RR_EE_WORD_LEN 0x20 /* jump between words in the EEPROM */
#define RR_EE_BYTE_LEN 0x08 /* jump between bytes in the EEPROM */
#define RR_EE_MAX_LEN 8192 /* maximum number of words in EEPROM */
#define RR_EE_SEG_SIZE 512 /* maximum size of a segment */
#define RR_EE_PROM_INIT 0x801ff00 /* jump here to start RunCode loader */
#define RR_EE_HEADER_FORMAT_MAGIC 1 /* version number we can handle*/
#define RR_EE_SRAM_SIZE 0x0040 /* SRAM size */
#define RR_EE_PHASE1_START 0x0060 /* target byte address in SRAM */
#define RR_EE_PHASE1_LEN 0x0080 /* length in words of phase 1 */
#define RR_EE_PHASE1_EE_START 0x00a0 /* address of phase 1 in EEPROM */
#define RR_EE_PCI_DEV_VEND 0x0100 /* PCI device/vendor */
#define RR_EE_PCI_REV_CLASS 0x0120 /* PCI revision/class */
#define RR_EE_PCI_LATENCY 0x0140 /* PCI latency timer */
#define RR_EE_PCI_BAR0 0x0160 /* PCI bar0 address */
#define RR_EE_PCI_COMM_STAT 0x0180 /* PCI command/status */
#define RR_EE_PCI_LAT_GNT 0x01a0 /* PCI max latency/ minimum grant */
#define RR_EE_PCI_CHECKSUM 0x01f0 /* PCI area checksum */
#define RR_EE_HEADER_FORMAT 0x0200 /* revision of header format
(should be 1) */
#define RR_EE_ULA_HI 0x0500 /* Universal LAN Address (ULA) */
#define RR_EE_ULA_LO 0x0520
#define RR_EE_RUNCODE_START 0x0a00 /* runcode start PC */
#define RR_EE_RUNCODE_VERSION 0x0a20 /* runcode revision number */
#define RR_EE_RUNCODE_DATE 0x0a40 /* runcode revision date */
#define RR_EE_RUNCODE_SEGMENTS 0x0a80 /* address of count of segments */
#define RR_EE_MODE_AND_STATUS 0x0e00 /* mode and status saved value */
#define RR_EE_CONN_RETRY_COUNT 0x0e20 /* connection retry count */
#define RR_EE_CONN_RETRY_TIMER 0x0e40 /* clock ticks to delay retry */
#define RR_EE_CONN_TIMEOUT 0x0e60 /* campon delay timeout */
#define RR_EE_STATS_TIMER 0x0e80 /* clock ticks between stats copy */
#define RR_EE_INTERRUPT_TIMER 0x0ea0 /* clock ticks between interrupts */
#define RR_EE_TX_TIMEOUT 0x0ec0 /* transmit data not moving timer */
#define RR_EE_RX_TIMEOUT 0x0ee0 /* receive data not moving timer */
#define RR_EE_PCI_STATE 0x0f00 /* misc PCI DMA config */
#define RR_EE_DMA_WRITE_STATE 0x0f20 /* dma write config */
#define RR_EE_DMA_READ_STATE 0x0f40 /* dma read config */
#define RR_EE_DRIVER_PARAM 0x0f60 /* driver-specific params (unused) */
#define RR_EE_HEADER_CHECKSUM 0x0fe0 /* checksum for manufacturing header
(0x200 - 0xfc0) */
#define RR_EE_PHASE2_START 0x1040 /* phase 2 start in SRAM */
#define RR_EE_PHASE2_LENGTH 0x1060 /* phase 2 length in words */
#define RR_EE_PHASE2_EE_START 0x1080 /* phase 2 EEPROM start */
/*
* Event descriptor
*/
struct rr_event {
u_int16_t re_index; /* merge? Different event types? */
u_int8_t re_ring;
u_int8_t re_code;
u_int32_t re_timestamp;
};
/*
* Command descriptor
*/
union rr_cmd {
struct {
u_int16_t rc_index;
u_int8_t rc_ring;
u_int8_t rc_code;
} b;
u_int32_t l;
};
/*
* Scatter/gather descriptor -- points to buffers to be DMA'ed in and
* out of host space.
*/
struct rr_descr {
u_int32_t rd_reserved1;
u_int32_t rd_buffer_addr;
u_int32_t rd_reserved2;
u_int16_t rd_length;
u_int8_t rd_ring;
u_int8_t rd_control;
#define RR_CT_TX_IPCKSUM 0x04
#define RR_CT_PACKET_END 0x08
#define RR_CT_PACKET_START 0x10
#define RR_CT_INTERRUPT 0x20
#define RR_CT_SHORT_BURST 0x40
#define RR_CT_SAME_IFIELD 0x80
};
/*
* Long scatter/gather descriptor -- similar to above descriptor,
* but closer to RR's Assist register layout, so that it can just
* be DMA'ed into the NIC, and let loose. Required by Runcode v. 2
* and greater.
*/
struct rr2_descr {
u_int32_t rd_reserved1;
u_int32_t rd_buffer_addr;
u_int32_t rd_reserved2;
u_int16_t rd_length;
u_int8_t rd_reserved3;
u_int8_t rd_control;
u_int32_t rd_dma_state;
#define RR_DM_TX 0x00606 /* swap code for dma_state on tx */
#define RR_DM_RX 0x20606 /* swap code for dma_state on rx */
u_int32_t rd_reserved4;
u_int32_t rd_pkt_length;
u_int32_t rd_reserved5;
#define RR2_CT_INTERRUPT 0x02
#define RR2_CT_TX_IPCKSUM 0x04
#define RR2_CT_PACKET_END 0x08
#define RR2_CT_PACKET_START 0x10
#define RR2_CT_RING_OUT 0x20
#define RR2_CT_SHORT_BURST 0x40
#define RR2_CT_SAME_IFIELD 0x80
};
/*
* Ring control structure -- points to array of buffer descriptors
*/
struct rr_ring_ctl {
u_int32_t rr_reserved1;
u_int32_t rr_ring_addr; /* pointer to array of s/g descrs */
u_int16_t rr_entries;
u_int8_t rr_free_bufs;
#define RR_RR_DONT_COMPLAIN 0xff /* disable free_bufs warning */
u_int8_t rr_entry_size;
u_int16_t rr_prod_index;
u_int16_t rr_mode;
/* XXX: Picture in docs is right, description is wrong */
#define RR_RR_CHARACTER 0x01 /* character mode interface */
#define RR_RR_SEPARATE 0x02 /* separate headers from data */
#define RR_RR_CHECKSUM 0x04 /* doing IP checksums (requires IP on) */
#define RR_RR_IP 0x08 /* receiving IP packets to this ring */
};
/* Statistics block, for now, undifferentiated. */
struct rr_stats {
u_int32_t rs_stats[128];
};
/*
* General information block
*/
struct rr_gen_info {
struct rr_stats ri_stats;
struct rr_ring_ctl ri_event_ring_ctl;
struct rr_ring_ctl ri_cmd_ring_ctl;
struct rr_ring_ctl ri_send_ring_ctl;
u_int8_t ri_reserved1[464];
u_int8_t ri_nic_trace[3072];
};
/*
* A few constants:
*/
#define RR_DMA_BOUNDARY (64 * 1024) /* can't cross 64K boundaries on DMA */
#define RR_DMA_MAX 65535 /* maximum that can be transferred in
one DMA operation */
#define RR_ULP_COUNT 256 /* number of possible ULPs */
#define RR_INIT_CMD 15 /* initial command index */
/* NB: All of the ring sizes have to be powers of two */
#define RR_MAX_RECV_RING 32 /* maximum number of receive rings */
#define RR_MAX_DESCR 256 /* maximum number of possible
descriptors. XXX: increase
with caution, as this allocates
static space! */
#define RR_EVENT_RING_SIZE 128 /* why not go for it? */
#define RR_SEND_RING_SIZE 32 /* firmware restriction! */
#define RR_SNAP_RECV_RING_SIZE 32 /* seems to work */
#define RR_FP_RECV_RING_SIZE 32 /* seems to work */
#define RR2_SEND_RING_SIZE 16 /* firmware restriction! */
#define RR2_SNAP_RECV_RING_SIZE 16 /* firmware restriction! */
#define RR_MAX_SEND_RING_SIZE uimax(RR_SEND_RING_SIZE, RR2_SEND_RING_SIZE)
#define RR_MAX_SNAP_RECV_RING_SIZE \
uimax(RR_SNAP_RECV_RING_SIZE, RR_SNAP_RECV_RING_SIZE)

265
sys/dev/ic/rrunnervar.h
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@ -1,265 +0,0 @@
/* $NetBSD: rrunnervar.h,v 1.14 2012/10/27 17:18:22 chs Exp $ */
/* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code contributed to The NetBSD Foundation by Kevin M. Lahey
* of the Numerical Aerospace Simulation Facility, NASA Ames Research
* Center.
*
* Partially based on a HIPPI driver written by Essential Communications
* Corporation. Thanks to Jason Thorpe, Matt Jacob, and Fred Templin
* for invaluable advice and encouragement!
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/* RoadRunner software status per interface */
struct rr_tuning {
/* Performance tuning registers: */
u_int32_t rt_mode_and_status;
u_int32_t rt_conn_retry_count;
u_int32_t rt_conn_retry_timer;
u_int32_t rt_conn_timeout;
u_int32_t rt_stats_timer;
u_int32_t rt_interrupt_timer;
u_int32_t rt_tx_timeout;
u_int32_t rt_rx_timeout;
/* DMA performance tuning registers: */
u_int32_t rt_pci_state;
u_int32_t rt_dma_write_state;
u_int32_t rt_dma_read_state;
u_int32_t rt_driver_param;
};
struct rr_eeprom {
u_int32_t ifr_offset; /* initial offset in bytes */
u_int32_t ifr_length; /* length in bytes to write */
u_int32_t *ifr_buffer; /* data to be written */
};
#define EIOCGTUNE 1 /* retrieve tuning */
#define EIOCSTUNE 2 /* set tuning */
#define EIOCGEEPROM 3 /* get eeprom */
#define EIOCSEEPROM 4 /* set eeprom */
#define EIOCGSTATS 5 /* get statistics */
#define EIOCRESET 6 /* reset the card */
#ifdef _KERNEL
/* Per-ring information for the SNAP (network) receive ring */
struct esh_snap_ring_ctl {
bus_dmamap_t ec_dma[RR_MAX_DESCR];
struct mbuf *ec_m[RR_MAX_DESCR];
struct mbuf *ec_cur_pkt; /* current packet being processed */
struct mbuf *ec_cur_mbuf; /* current mbuf being processed */
int ec_error; /* encountered error? */
u_int16_t ec_producer; /* latest buffer driver produced */
u_int16_t ec_consumer; /* latest buffer runcode consumed */
struct rr_descr *ec_descr; /* array of descriptors for ring */
};
TAILQ_HEAD(esh_dmainfo_list, esh_dmainfo);
struct esh_dmainfo {
u_int32_t ed_flags;
#define ESH_DI_BUSY 0x1
#define ESH_DI_READING 0x2
bus_dmamap_t ed_dma;
struct buf *ed_buf;
int ed_read_len;
int ed_error;
TAILQ_ENTRY(esh_dmainfo) ed_list;
};
struct esh_send_ring_ctl {
bus_dmamap_t ec_dma; /* dmamap for data to transmit */
int ec_offset; /* offset in dmamap to send next */
size_t ec_len; /* total length of current buf */
struct mbuf *ec_cur_mbuf; /* current mbuf being processed */
struct buf *ec_cur_buf; /* current buf being processed */
struct esh_dmainfo *ec_cur_dmainfo;
/* current dmainfo being processed */
struct bufq_state *ec_buf_queue;/* queue of bufs to send */
int ec_error; /* encountered error? */
u_int16_t ec_producer; /* latest buffer driver produced */
u_int16_t ec_consumer; /* latest buffer runcode consumed */
struct rr_descr *ec_descr; /* array of descriptors for ring */
struct esh_dmainfo_list ec_di_queue;
};
struct esh_fp_ring_ctl {
struct esh_dmainfo *ec_dmainfo[RR_MAX_DESCR];
struct esh_dmainfo *ec_cur_dmainfo;
int ec_offset; /* offset of current buf */
int ec_error; /* encountered error? */
int ec_seen_end; /* seen the end of the buffer? */
int ec_dmainfo_count; /* dmainfo buffers in use count */
u_int16_t ec_producer; /* latest buffer driver produced */
u_int16_t ec_consumer; /* latest buffer runcode consumed */
u_int32_t ec_read_len; /* length of packet being read in */
struct rr_descr *ec_descr; /* array of descriptors for ring */
struct esh_dmainfo_list ec_queue;
u_int ec_ulp; /* ULP for this ring */
int ec_index; /* index into list of active rings */
bus_dmamap_t ec_dma;
bus_dma_segment_t ec_dmaseg;
};
struct esh_softc {
device_t sc_dev;
struct ifnet sc_if;
struct ifmedia sc_media;
volatile int sc_flags;
#define ESH_FL_INITIALIZING 0x001
#define ESH_FL_INITIALIZED 0x002
#define ESH_FL_RUNCODE_UP 0x004
#define ESH_FL_LINK_UP 0x008
#define ESH_FL_SNAP_RING_UP 0x010
#define ESH_FL_FP_RING_UP 0x020
#define ESH_FL_EEPROM_BUSY 0x040
#define ESH_FL_FP_OPEN 0x080
#define ESH_FL_CRASHED 0x100
#define ESH_FL_CLOSING_SNAP 0x200
void *sc_ih;
bus_space_tag_t sc_iot; /* bus cookie */
bus_space_handle_t sc_ioh; /* bus i/o handle */
bus_dma_tag_t sc_dmat; /* dma tag */
bus_dma_segment_t sc_dmaseg; /* segment holding the various
data structures in host memory
that are DMA'ed to the NIC */
bus_dmamap_t sc_dma; /* dma map for the segment */
char *sc_dma_addr; /* address in kernel of DMA mem */
bus_size_t sc_dma_size; /* size of dma-able region */
u_int8_t (*sc_bist_read)(struct esh_softc *);
void (*sc_bist_write)(struct esh_softc *, u_int8_t);
/*
* Definitions for the various driver structures that sit in host
* memory and are read by the NIC via DMA:
*/
struct rr_gen_info *sc_gen_info; /* gen info block pointer */
bus_addr_t sc_gen_info_dma;
struct rr_ring_ctl *sc_recv_ring_table;
bus_addr_t sc_recv_ring_table_dma;
struct rr_event *sc_event_ring;
bus_addr_t sc_event_ring_dma;
struct rr_descr *sc_send_ring;
struct rr2_descr *sc2_send_ring;
bus_addr_t sc_send_ring_dma;
struct rr_descr *sc_snap_recv_ring;
struct rr2_descr *sc2_snap_recv_ring;
bus_addr_t sc_snap_recv_ring_dma;
/*
* Control structures for the various rings that we definitely
* know we want to keep track of.
*/
struct esh_send_ring_ctl
sc_send;
struct esh_snap_ring_ctl
sc_snap_recv;
struct esh_fp_ring_ctl *sc_fp_recv[RR_ULP_COUNT];
struct esh_fp_ring_ctl *sc_fp_recv_index[RR_MAX_RECV_RING];
int sc_event_consumer;
int sc_event_producer;
int sc_cmd_consumer;
int sc_cmd_producer;
/*
* Various maintainance values we need
*/
int sc_watchdog;
/*
* Various hardware parameters we need to keep track of.
*/
u_int32_t sc_sram_size;
u_int32_t sc_runcode_start;
u_int32_t sc_runcode_version;
u_int32_t sc_version; /* interface of runcode (1 or 2) */
u_int16_t sc_options; /* options in current RunCode */
u_int sc_max_rings;
u_int32_t sc_pci_latency;
u_int32_t sc_pci_lat_gnt;
u_int32_t sc_pci_cache_line;
/* ULA assigned to hardware */
u_int8_t sc_ula[6];
/* Tuning parameters */
struct rr_tuning sc_tune;
/* Measure of how ugly this is. */
u_int32_t sc_misaligned_bufs;
u_int32_t sc_bad_lens;
struct esh_dmainfo_list sc_dmainfo_freelist;
u_int sc_dmainfo_freelist_count;
u_int sc_fp_rings;
};
void eshconfig(struct esh_softc *);
int eshintr(void *);
#endif /* _KERNEL */
/* Define a few constants for future use */
#define ESH_MAX_NSEGS 512 /* room for 2MB of data */
#define ESH_STATS_TIMER_DEFAULT 1030900
/* 1000000 usecs / 0.97 usecs/tick */
#define NEXT_EVENT(i) (((i) + 1) & (RR_EVENT_RING_SIZE - 1))
#define NEXT_SEND(i) (((i) + 1) & (RR_SEND_RING_SIZE - 1))
#define NEXT_RECV(i) (((i) + 1) & (RR_SNAP_RECV_RING_SIZE - 1))
#define PREV_SEND(i) (((i) + RR_SEND_RING_SIZE - 1) & (RR_SEND_RING_SIZE - 1))
#define PREV_RECV(i) \
(((i) + RR_SNAP_RECV_RING_SIZE - 1) & (RR_SNAP_RECV_RING_SIZE - 1))

7
sys/dev/pci/files.pci
View File

@ -1,4 +1,4 @@
# $NetBSD: files.pci,v 1.421 2020/01/17 05:22:42 ryo Exp $
# $NetBSD: files.pci,v 1.422 2020/01/19 06:55:21 thorpej Exp $
#
# Config file and device description for machine-independent PCI code.
# Included by ports that need it. Requires that the SCSI files be
@ -432,11 +432,6 @@ file dev/pci/if_tl.c tl
attach ntwoc at pci with ntwoc_pci
file dev/pci/if_ntwoc_pci.c ntwoc_pci
# Essential Communications HIPPI interface
# device declaration in sys/conf/files
attach esh at pci with esh_pci
file dev/pci/if_esh_pci.c esh_pci
# generic PCI VGA
defflag opt_vga.h VGA_POST: X86EMU
attach vga at pci with vga_pci

192
sys/dev/pci/if_esh_pci.c
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@ -1,192 +0,0 @@
/* $NetBSD: if_esh_pci.c,v 1.33 2018/12/09 11:14:02 jdolecek Exp $ */
/*
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code contributed to The NetBSD Foundation by Kevin M. Lahey
* of the Numerical Aerospace Simulation Facility, NASA Ames Research
* Center.
*
* Partially based on a HIPPI driver written by Essential Communications
* Corporation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_esh_pci.c,v 1.33 2018/12/09 11:14:02 jdolecek Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/mbuf.h>
#include <sys/socket.h>
#include <sys/ioctl.h>
#include <sys/errno.h>
#include <sys/syslog.h>
#include <sys/select.h>
#include <sys/device.h>
#include <sys/buf.h>
#include <sys/bufq.h>
#include <net/if.h>
#include <net/if_dl.h>
#include <net/if_hippi.h>
#include <net/if_media.h>
#include <sys/cpu.h>
#include <sys/bus.h>
#include <sys/intr.h>
#include <dev/ic/rrunnerreg.h>
#include <dev/ic/rrunnervar.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcidevs.h>
/*
* PCI constants.
* XXX These should be in a common file!
*/
#define PCI_CONN 0x48 /* Connector type */
#define PCI_CBIO PCI_BAR(0) /* Configuration Base IO Address */
#define MEM_MAP_REG PCI_BAR(0)
static int esh_pci_match(device_t, cfdata_t, void *);
static void esh_pci_attach(device_t, device_t, void *);
static u_int8_t esh_pci_bist_read(struct esh_softc *);
static void esh_pci_bist_write(struct esh_softc *, u_int8_t);
CFATTACH_DECL_NEW(esh_pci, sizeof(struct esh_softc),
esh_pci_match, esh_pci_attach, NULL, NULL);
static int
esh_pci_match(device_t parent, cfdata_t match, void *aux)
{
struct pci_attach_args *pa = (struct pci_attach_args *) aux;
if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_ESSENTIAL)
return 0;
switch (PCI_PRODUCT(pa->pa_id)) {
case PCI_PRODUCT_ESSENTIAL_RR_HIPPI:
case PCI_PRODUCT_ESSENTIAL_RR_GIGE:
break;
default:
return 0;
}
return 1;
}
static void
esh_pci_attach(device_t parent, device_t self, void *aux)
{
struct esh_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
pci_chipset_tag_t pc = pa->pa_pc;
pci_intr_handle_t ih;
const char *model;
const char *intrstr = NULL;
char intrbuf[PCI_INTRSTR_LEN];
aprint_naive(": HIPPI controller\n");
if (pci_mapreg_map(pa, MEM_MAP_REG,
PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_iot,
&sc->sc_ioh, NULL, NULL) != 0) {
aprint_error(": unable to map memory device registers\n");
return;
}
sc->sc_dev = self;
sc->sc_dmat = pa->pa_dmat;
switch (PCI_PRODUCT(pa->pa_id)) {
case PCI_PRODUCT_ESSENTIAL_RR_HIPPI:
model = "RoadRunner HIPPI";
break;
case PCI_PRODUCT_ESSENTIAL_RR_GIGE:
model = "RoadRunner Gig-E";
break;
default:
model = "unknown model";
break;
}
aprint_normal(": %s\n", model);
sc->sc_bist_read = esh_pci_bist_read;
sc->sc_bist_write = esh_pci_bist_write;
eshconfig(sc);
/* Enable the card. */
pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
PCI_COMMAND_MASTER_ENABLE);
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &ih)) {
aprint_error_dev(sc->sc_dev, "couldn't map interrupt\n");
return;
}
intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_NET, eshintr, sc,
device_xname(self));
if (sc->sc_ih == NULL) {
aprint_error_dev(sc->sc_dev, "couldn't establish interrupt");
if (intrstr != NULL)
aprint_error(" at %s", intrstr);
aprint_error("\n");
return;
}
aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
}
static u_int8_t
esh_pci_bist_read(struct esh_softc *sc)
{
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
u_int32_t pci_bist;
pci_bist = bus_space_read_4(iot, ioh, RR_PCI_BIST);
return ((u_int8_t) (pci_bist >> 24));
}
static void
esh_pci_bist_write(struct esh_softc *sc, u_int8_t value)
{
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
u_int32_t pci_bist;
u_int32_t new_bist;
pci_bist = bus_space_read_4(iot, ioh, RR_PCI_BIST);
new_bist = ((u_int32_t) value << 24) | (pci_bist & 0x00ffffff);
bus_space_write_4(iot, ioh, RR_PCI_BIST, new_bist);
}

4
sys/net/Makefile
View File

@ -1,10 +1,10 @@
# $NetBSD: Makefile,v 1.38 2018/09/06 06:42:00 maxv Exp $
# $NetBSD: Makefile,v 1.39 2020/01/19 06:55:21 thorpej Exp $
INCSDIR= /usr/include/net
INCS= bpf.h bpfjit.h bpfdesc.h dlt.h ethertypes.h if.h if_arc.h if_arp.h \
if_bridgevar.h if_dl.h if_ether.h if_fddi.h if_gif.h \
if_gre.h if_hippi.h if_ieee1394.h if_ipsec.h if_llc.h if_media.h if_mpls.h \
if_gre.h if_ieee1394.h if_ipsec.h if_llc.h if_media.h if_mpls.h \
if_pflog.h if_ppp.h if_pppoe.h if_l2tp.h if_sppp.h if_srt.h if_stf.h \
if_tap.h if_token.h if_tun.h if_types.h if_vlanvar.h net_stats.h \
netisr.h pfil.h pfkeyv2.h pfvar.h ppp-comp.h ppp_defs.h radix.h \

3
sys/net/files.net
View File

@ -1,4 +1,4 @@
# $NetBSD: files.net,v 1.21 2020/01/19 01:25:03 thorpej Exp $
# $NetBSD: files.net,v 1.22 2020/01/19 06:55:21 thorpej Exp $
# XXX CLEANUP
define net
@ -18,7 +18,6 @@ file net/if_faith.c faith & (inet | inet6) needs-flag
file net/if_fddisubr.c fddi needs-flag
file net/if_gif.c gif needs-flag
file net/if_gre.c gre needs-flag
file net/if_hippisubr.c hippi needs-flag
file net/if_ieee1394subr.c ieee1394
file net/if_ipsec.c ipsec & ipsecif
file net/if_llatbl.c inet | inet6

80
sys/net/if_hippi.h
View File

@ -1,80 +0,0 @@
/* $NetBSD: if_hippi.h,v 1.13 2008/04/28 20:24:09 martin Exp $ */
/*
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code contributed to The NetBSD Foundation by Kevin M. Lahey
* of the Numerical Aerospace Simulation Facility, NASA Ames Research
* Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _NET_IF_HIPPI_H_
#define _NET_IF_HIPPI_H_
#include <net/if_ether.h>
struct hippi_fp {
uint8_t fp_ulp;
uint8_t fp_flags;
#define HIPPI_FP_D1_PRESENT 0x80
#define HIPPI_FP_D2_ON_BURST 0x40
uint16_t fp_offsets;
#define HIPPI_FP_D2_MASK 0x07
uint32_t fp_d2_len;
} __packed;
struct hippi_le {
uint32_t le_dest_switch;
uint32_t le_src_switch;
uint16_t le_reserved;
uint8_t le_dest_addr[6];
uint16_t le_local_admin;
uint8_t le_src_addr[6];
} __packed;
struct hippi_header {
struct hippi_fp hi_fp;
struct hippi_le hi_le;
} __packed;
#define HIPPI_HDRLEN (sizeof(struct hippi_header))
/* Link-layer ULP identifiers: */
#define HIPPI_ULP_802 4
#define HIPPI_ULP_IPI3_SLAVE 5
#define HIPPI_ULP_IPI3_MASTER 6
#define HIPPI_ULP_IPI3_PEER 7
/* Need some flags here for the rest of it! */
#define HIPPIMTU 65280 /* Argh, this oughta change! */
#ifdef _KERNEL
void hippi_ifattach(struct ifnet *, void *);
void hippi_ip_input(struct ifnet *, struct mbuf *);
#endif /* _KERNEL */
#endif /* !_NET_IF_HIPPI_H_ */

294
sys/net/if_hippisubr.c
View File

@ -1,294 +0,0 @@
/* $NetBSD: if_hippisubr.c,v 1.48 2017/01/11 13:08:29 ozaki-r Exp $ */
/*
* Copyright (c) 1982, 1989, 1993
* The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_hippisubr.c,v 1.48 2017/01/11 13:08:29 ozaki-r Exp $");
#ifdef _KERNEL_OPT
#include "opt_inet.h"
#endif
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/mbuf.h>
#include <sys/ioctl.h>
#include <sys/errno.h>
#include <sys/syslog.h>
#include <sys/cpu.h>
#include <net/if.h>
#include <net/netisr.h>
#include <net/route.h>
#include <net/if_llc.h>
#include <net/if_dl.h>
#include <net/if_types.h>
#include <net/bpf.h>
#include <net/if_hippi.h>
#include <netinet/in.h>
#if defined(INET) || defined(INET6)
#include <netinet/in_var.h>
#endif
#define senderr(e) { error = (e); goto bad;}
#ifndef llc_snap
#define llc_snap llc_un.type_snap
#endif
static int hippi_output(struct ifnet *, struct mbuf *,
const struct sockaddr *, const struct rtentry *);
static void hippi_input(struct ifnet *, struct mbuf *);
/*
* HIPPI output routine.
* Encapsulate a packet of type family for the local net.
* I don't know anything about the mapping of AppleTalk or OSI
* protocols to HIPPI, so I don't include any code for them.
*/
static int
hippi_output(struct ifnet *ifp, struct mbuf *m0, const struct sockaddr *dst,
const struct rtentry *rt)
{
uint16_t htype;
uint32_t ifield = 0;
int error = 0;
struct mbuf *m = m0;
struct hippi_header *hh;
uint32_t *cci;
uint32_t d2_len;
if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) != (IFF_UP|IFF_RUNNING))
senderr(ENETDOWN);
/* HIPPI doesn't really do broadcast or multicast right now */
if (m->m_flags & (M_BCAST | M_MCAST))
senderr(EOPNOTSUPP); /* XXX: some other error? */
/*
* If the queueing discipline needs packet classification,
* do it before prepending link headers.
*/
IFQ_CLASSIFY(&ifp->if_snd, m, dst->sa_family);
switch (dst->sa_family) {
#ifdef INET
case AF_INET:
if (rt) {
const struct sockaddr_dl *sdl =
satocsdl(rt->rt_gateway);
if (sdl->sdl_family == AF_LINK && sdl->sdl_alen != 0)
memcpy(&ifield, CLLADDR(sdl), sizeof(ifield));
}
if (!ifield) /* XXX: bogus check, but helps us get going */
senderr(EHOSTUNREACH);
htype = htons(ETHERTYPE_IP);
break;
#endif
#ifdef INET6
case AF_INET6:
if (rt) {
const struct sockaddr_dl *sdl =
satocsdl(rt->rt_gateway);
if (sdl->sdl_family == AF_LINK && sdl->sdl_alen != 0)
memcpy(&ifield, CLLADDR(sdl), sizeof(ifield));
}
if (!ifield) /* XXX: bogus check, but helps us get going */
senderr(EHOSTUNREACH);
htype = htons(ETHERTYPE_IPV6);
break;
#endif
default:
printf("%s: can't handle af%d\n", ifp->if_xname,
dst->sa_family);
senderr(EAFNOSUPPORT);
}
if (htype != 0) {
struct llc *l;
M_PREPEND(m, sizeof (struct llc), M_DONTWAIT);
if (m == 0)
senderr(ENOBUFS);
l = mtod(m, struct llc *);
l->llc_control = LLC_UI;
l->llc_dsap = l->llc_ssap = LLC_SNAP_LSAP;
l->llc_snap.org_code[0] = l->llc_snap.org_code[1] =
l->llc_snap.org_code[2] = 0;
memcpy((void *) &l->llc_snap.ether_type, (void *) &htype,
sizeof(uint16_t));
}
d2_len = m->m_pkthdr.len;
/*
* Add local net header. If no space in first mbuf,
* allocate another.
*/
M_PREPEND(m, sizeof (struct hippi_header) + 8, M_DONTWAIT);
if (m == 0)
senderr(ENOBUFS);
cci = mtod(m, uint32_t *);
memset(cci, 0, sizeof(struct hippi_header) + 8);
cci[0] = 0;
cci[1] = ifield;
hh = (struct hippi_header *) &cci[2];
hh->hi_fp.fp_ulp = HIPPI_ULP_802;
hh->hi_fp.fp_flags = HIPPI_FP_D1_PRESENT;
hh->hi_fp.fp_offsets = htons(sizeof(struct hippi_le));
hh->hi_fp.fp_d2_len = htonl(d2_len);
/* Pad out the D2 area to end on a quadword (64-bit) boundry. */
if (d2_len % 8 != 0) {
static uint32_t buffer[2] = {0, 0};
m_copyback(m, m->m_pkthdr.len, 8 - d2_len % 8, (void *) buffer);
}
return ifq_enqueue(ifp, m);
bad:
if (m)
m_freem(m);
return (error);
}
/*
* Process a received HIPPI packet;
* the packet is in the mbuf chain m with
* the HIPPI header.
*/
static void
hippi_input(struct ifnet *ifp, struct mbuf *m)
{
pktqueue_t *pktq;
struct llc *l;
uint16_t htype;
struct hippi_header *hh;
if ((ifp->if_flags & IFF_UP) == 0) {
m_freem(m);
return;
}
/* XXX: need to check flags and drop if bogus! */
hh = mtod(m, struct hippi_header *);
ifp->if_ibytes += m->m_pkthdr.len;
if (hh->hi_le.le_dest_addr[0] & 1) {
if (memcmp(etherbroadcastaddr, hh->hi_le.le_dest_addr,
sizeof(etherbroadcastaddr)) == 0)
m->m_flags |= M_BCAST;
else
m->m_flags |= M_MCAST;
}
if (m->m_flags & (M_BCAST|M_MCAST))
ifp->if_imcasts++;
/* Skip past the HIPPI header. */
m_adj(m, sizeof(struct hippi_header));
l = mtod(m, struct llc *);
if (l->llc_dsap != LLC_SNAP_LSAP) {
m_freem(m);
return;
}
htype = ntohs(l->llc_snap.ether_type);
m_adj(m, 8);
switch (htype) {
#ifdef INET
case ETHERTYPE_IP:
pktq = ip_pktq;
break;
#endif
#ifdef INET6
case ETHERTYPE_IPV6:
pktq = ip6_pktq;
break;
#endif
default:
m_freem(m);
return;
}
if (__predict_false(!pktq_enqueue(pktq, m, 0))) {
m_freem(m);
}
}
/*
* Handle packet from HIPPI that has no MAC header
*/
#ifdef INET
void
hippi_ip_input(struct ifnet *ifp, struct mbuf *m)
{
int s;
s = splnet();
if (__predict_false(!pktq_enqueue(ip_pktq, m, 0))) {
m_freem(m);
}
splx(s);
}
#endif
/*
* Perform common duties while attaching to interface list
*/
void
hippi_ifattach(struct ifnet *ifp, void *lla)
{
ifp->if_type = IFT_HIPPI;
ifp->if_hdrlen = sizeof(struct hippi_header) + 8; /* add CCI */
ifp->if_dlt = DLT_HIPPI;
ifp->if_mtu = HIPPIMTU;
ifp->if_output = hippi_output;
ifp->_if_input = hippi_input;
ifp->if_baudrate = IF_Mbps(800); /* XXX double-check */
if_set_sadl(ifp, lla, 6, true);
bpf_attach(ifp, DLT_HIPPI, sizeof(struct hippi_header));
}

4
usr.sbin/Makefile
View File

@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.282 2019/10/28 13:04:18 maxv Exp $
# $NetBSD: Makefile,v 1.283 2020/01/19 06:55:24 thorpej Exp $
# from: @(#)Makefile 5.20 (Berkeley) 6/12/93
.include <bsd.own.mk>
@ -7,7 +7,7 @@ SUBDIR= ac accton acpitools altq apm apmd arp autofs \
bad144 bootp bta2dpd btattach btconfig btdevctl bthcid btpand catman \
chroot cnwctl cpuctl crash \
dev_mkdb diskpart dumpfs dumplfs \
edquota eeprom envstat eshconfig etcupdate extattrctl \
edquota eeprom envstat etcupdate extattrctl \
flashctl fssconfig fstyp fusermount fwctl \
gpioctl grfconfig gspa \
hdaudioctl \

8
usr.sbin/eshconfig/Makefile
View File

@ -1,8 +0,0 @@
# $NetBSD: Makefile,v 1.2 2019/10/13 07:28:18 mrg Exp $
PROG= eshconfig
MAN= eshconfig.8
COPTS.eshconfig.c+= ${GCC_NO_STRINGOP_TRUNCATION}
.include <bsd.prog.mk>

120
usr.sbin/eshconfig/eshconfig.8
View File

@ -1,120 +0,0 @@
.\" $NetBSD: eshconfig.8,v 1.8 2008/04/30 13:11:02 martin Exp $
.\"
.\" Copyright (c) 1998 The NetBSD Foundation, Inc.
.\" All rights reserved.
.\"
.\" This code is derived from software contributed to The NetBSD Foundation
.\" by Kevin Lahey of the Numerical Aerospace Simulation Facility,
.\" NASA Ames Research Center.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
.\" POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd June 17, 2005
.Dt ESHCONFIG 8
.Os
.Sh NAME
.Nm eshconfig
.Nd configure Essential Communications' HIPPI network interface
.Sh SYNOPSIS
.Nm eshconfig
.Op Fl estx
.Op Fl b Ar bytes
.Op Fl c Ar bytes
.Op Fl d Ar filename
.Op Fl i Ar usecs
.Op Fl m Ar bytes
.Op Fl r Ar bytes
.Op Fl u Ar filename
.Op Fl w Ar bytes
.Op Ar interface
.Sh DESCRIPTION
.Nm
is used to configure device-specific parameters and download new firmware
to the Essential Communications RoadRunner-based HIPPI network interface.
The interface is very sensitive to the DMA performance characteristics
of the host, and so requires careful tuning to achieve reasonable
performance.
In addition, firmware is likely to change frequently, which necessitates
a reasonably easy way to update that firmware.
.Pp
Available operands for
.Nm eshconfig :
.Bl -tag -width Ds
.It Fl b Ar bytes
Adjust the burst size for read (by NIC of host memory) DMA.
.It Fl c Ar bytes
Adjust the burst size for write (by NIC of host memory) DMA.
.It Fl d Ar filename
Filename for file to download into NIC firmware.
This must be a file in the standard Essential format, with :04 preceding
every line, and a tag line at the end indicating the characteristics
of the firmware file.
.It Fl e
Write data to EEPROM.
Normally, setting tuning parameters will only persist until the
system is rebooted.
Setting this parameter ensures that the changes will be written to
EEPROM.
.It Fl i Ar usecs
Interrupt delay in microseconds.
.It Fl m Ar bytes
Minimum number of bytes to DMA in one direction (read or write)
before allowing a DMA in the other direction.
Tuning this prevents one direction from dominating the flow of
bytes, and artificially throttling the NIC.
.It Fl r Ar bytes
Bytes before DMA starts for read (from host to NIC).
This controls how soon the DMA is triggered; until this many bytes
are requested, the DMA will not begin.
.It Fl s
Show statistics for the HIPPI NIC.
Repeat the option to suppress non-zero statistics.
.It Fl t
Show current tuning parameters on the host.
.It Fl u Ar filename
Name of file to which the NIC firmware should be uploaded.
Not currently supported.
.It Fl w Ar bytes
Number of bytes required before write (from NIC to host) DMA
is started.
Until this many bytes are ready to be written, the DMA will not start.
.It Fl x
Reset the NIC.
This is necessary for the HIPPI-FP support, as
.Xr ifconfig 8
will no longer physically reset the NIC when the interfaces goes
up and down.
.El
.Pp
Only the super-user may modify the configuration of a network interface.
.Sh DIAGNOSTICS
Messages indicating the specified interface does not exist
or the user is not privileged and
tried to alter an interface's configuration.
.Sh SEE ALSO
.Xr esh 4 ,
.Xr ifconfig 8
.Sh HISTORY
The
.Nm
command first appeared in
.Nx 1.4 .

753
usr.sbin/eshconfig/eshconfig.c
View File

@ -1,753 +0,0 @@
/* $NetBSD: eshconfig.c,v 1.10 2011/08/30 18:28:59 joerg Exp $ */
/*
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code contributed to The NetBSD Foundation by Kevin M. Lahey
* of the Numerical Aerospace Simulation Facility, NASA Ames Research
* Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
#ifndef lint
__RCSID("$NetBSD: eshconfig.c,v 1.10 2011/08/30 18:28:59 joerg Exp $");
#endif /* not lint */
#include <sys/param.h>
#include <sys/socket.h>
#include <sys/ioctl.h>
#include <sys/sockio.h>
#include <fcntl.h>
#include <net/if.h>
#include <net/if_dl.h>
#include <net/if_media.h>
#include <netinet/in.h>
#include <arpa/inet.h>
#include <ctype.h>
#include <err.h>
#include <errno.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <dev/ic/rrunnerreg.h>
#include <dev/ic/rrunnervar.h>
/*
* Create a simple pair of tables to map possible burst DMA values
* to the values required by the RoadRunner.
*/
struct map_dma {
int value;
u_int32_t rr_value;
};
static struct map_dma read_dma_map[] = {{0, RR_PS_READ_DISABLE},
{4, RR_PS_READ_4},
{16, RR_PS_READ_16},
{32, RR_PS_READ_32},
{64, RR_PS_READ_64},
{128, RR_PS_READ_128},
{256, RR_PS_READ_256},
{1024, RR_PS_READ_1024},
{-1, 0}};
static struct map_dma write_dma_map[] = {{0, RR_PS_WRITE_DISABLE},
{4, RR_PS_WRITE_4},
{16, RR_PS_WRITE_16},
{32, RR_PS_WRITE_32},
{64, RR_PS_WRITE_64},
{128, RR_PS_WRITE_128},
{256, RR_PS_WRITE_256},
{1024, RR_PS_WRITE_1024},
{-1, 0}};
/*
* The RunCode is composed of separate segments, each of which has a
* starting address in SRAM memory (for running) and in EEPROM
* (for storage).
*/
struct rr_seg_descr {
u_int32_t start_addr;
u_int32_t length;
u_int32_t ee_addr;
};
static u_int32_t do_map(int, struct map_dma *);
static void eeprom_upload(const char *);
static void eeprom_download(const char *);
static u_int32_t rr_checksum(const u_int32_t *, int);
static void esh_tune(void);
static void esh_tune_eeprom(void);
static void esh_tuning_stats(void);
static void esh_stats(int);
static void esh_reset(void);
static int drvspec_ioctl(char *, int, int, int, caddr_t);
__dead static void usage(void);
static char name[30] = "esh0";
static int s;
#define RR_EE_SIZE 8192
static u_int32_t eeprom[RR_EE_SIZE];
static u_int32_t runcode[RR_EE_SIZE];
static struct ifdrv ifd;
/* drvspec_ioctl
*
* We defined a driver-specific socket ioctl to allow us to tweak
* the characteristics of network devices. This routine will
* provide a shortcut to calling this routine, which would otherwise
* require lots of costly and annoying setup.
*/
static int
drvspec_ioctl(char *lname, int fd, int cmd, int len, caddr_t data)
{
strcpy(ifd.ifd_name, lname);
ifd.ifd_cmd = cmd;
ifd.ifd_len = len;
ifd.ifd_data = data;
return ioctl(fd, SIOCSDRVSPEC, (caddr_t) &ifd);
}
static void
usage(void)
{
fprintf(stderr, "eshconfig -- configure Essential Communications "
"HIPPI driver\n");
fprintf(stderr, "-b burst size for read\n");
fprintf(stderr, "-c burst size for write:\n");
fprintf(stderr, "\t0 (no limit), 5, 16, 32, 64, 128, 256, 1024\n");
fprintf(stderr, "-d download filename\n");
fprintf(stderr, "-e write data to EEPROM\n");
fprintf(stderr, "-m minimum bytes DMA per direction\n");
fprintf(stderr, "-r bytes before DMA starts for read\n");
fprintf(stderr, "-s show statistics (-ss to display only non-zero)\n");
fprintf(stderr, "-t show tuning parameters\n");
fprintf(stderr, "-u upload filename [not working]\n");
fprintf(stderr, "-w bytes before DMA starts for write\n");
fprintf(stderr, "-i interrupt delay in usecs\n");
fprintf(stderr, "-x reset interface\n");
exit(1);
}
/* do_map
*
* Map between values for burst DMA sizes and the values expected by
* the RoadRunner chip.
*/
static u_int32_t
do_map(int value, struct map_dma *map)
{
int i;
for (i = 0; map[i].value != -1; i++)
if (value == map[i].value)
return map[i].rr_value;
return -1;
}
/* do_map_dma
*
* Reverse the mapping.
*/
static int
do_map_dma(uint32_t value, struct map_dma *map)
{
int i;
for (i = 0; map[i].value != -1; i++)
if (value == map[i].rr_value)
return map[i].value;
return 0;
}
static int dma_thresh_read = -1;
static int dma_thresh_write = -1;
static int dma_min_grab = -1;
static int dma_max_read = -1;
static int dma_max_write = -1;
static int interrupt_delay = -1;
static int get_stats = 0;
static int get_tuning_stats = 0;
static int eeprom_write = 0;
static char *eeprom_download_filename = NULL;
static char *eeprom_upload_filename = NULL;
static int reset = 0;
static struct rr_tuning rr_tune;
struct rr_eeprom rr_eeprom;
struct rr_stats rr_stats;
int
main(int argc, char *argv[])
{
int ch;
/* Parse command-line options */
while ((ch = getopt(argc, argv, "b:c:d:ei:m:r:stu:w:x")) != -1) {
switch (ch) {
case 'b':
dma_max_read = atoi(optarg);
break;
case 'c':
dma_max_write = atoi(optarg);
break;
case 'd':
eeprom_download_filename = optarg;
break;
case 'e':
eeprom_write++;
break;
case 'i':
interrupt_delay = atoi(optarg);
break;
case 'm':
dma_min_grab = atoi(optarg);
break;
case 'r':
dma_thresh_read = atoi(optarg);
break;
case 's':
get_stats++;
break;
case 't':
get_tuning_stats++;
break;
case 'u':
eeprom_upload_filename = optarg;
break;
case 'w':
dma_thresh_write = atoi(optarg);
break;
case 'x':
reset = 1;
break;
default:
usage();
/* NOTREACHED */
}
}
argc -= optind;
argv += optind;
if (argc > 1)
usage();
if (argc == 1) {
(void) strncpy(name, argv[0], sizeof(name));
argc--; argv++;
}
s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0)
err(1, "socket");
if (eeprom_upload_filename)
eeprom_upload(eeprom_upload_filename);
if (eeprom_download_filename)
eeprom_download(eeprom_download_filename);
if (get_stats) {
esh_stats(get_stats);
}
if (drvspec_ioctl(name, s, EIOCGTUNE, sizeof(struct rr_tuning),
(caddr_t) &rr_tune) < 0) {
err(1, "ioctl(EIOCGTUNE)");
}
if (get_tuning_stats) {
if (get_stats)
printf("\n");
esh_tuning_stats();
}
if (eeprom_write || dma_thresh_read != -1 ||
dma_thresh_write != -1 ||
dma_min_grab != -1 ||
dma_max_read != -1 ||
dma_max_write != -1 ||
interrupt_delay != -1) {
esh_tune();
}
if (eeprom_write)
esh_tune_eeprom();
if (reset)
esh_reset();
exit(0);
}
static void
esh_tune(void)
{
dma_max_read = do_map(dma_max_read, read_dma_map);
if (dma_max_read != -1) {
rr_tune.rt_pci_state &= ~RR_PS_READ_MASK;
rr_tune.rt_pci_state |= dma_max_read;
}
dma_max_write = do_map(dma_max_write, write_dma_map);
if (dma_max_write != -1) {
rr_tune.rt_pci_state &= ~RR_PS_WRITE_MASK;
rr_tune.rt_pci_state |= dma_max_write;
}
if (dma_min_grab != -1) {
if ((dma_min_grab & (RR_PS_MIN_DMA_MASK >> RR_PS_MIN_DMA_SHIFT))
!= dma_min_grab)
usage();
rr_tune.rt_pci_state &= ~RR_PS_MIN_DMA_MASK;
rr_tune.rt_pci_state |=
(dma_min_grab << RR_PS_MIN_DMA_SHIFT);
}
if (dma_thresh_write != -1) {
if (dma_thresh_write < 1 || dma_thresh_write > RR_DW_THRESHOLD_MAX)
usage();
rr_tune.rt_dma_write_state &= ~RR_DW_THRESHOLD_MASK;
rr_tune.rt_dma_write_state |=
dma_thresh_write << RR_DW_THRESHOLD_SHIFT;
}
if (dma_thresh_read != -1) {
if (dma_thresh_read < 1 || dma_thresh_read > RR_DR_THRESHOLD_MAX)
usage();
rr_tune.rt_dma_read_state &= ~RR_DR_THRESHOLD_MASK;
rr_tune.rt_dma_read_state |=
dma_thresh_read << RR_DR_THRESHOLD_SHIFT;
}
rr_tune.rt_stats_timer = ESH_STATS_TIMER_DEFAULT;
if (interrupt_delay != -1)
rr_tune.rt_interrupt_timer = interrupt_delay;
if (drvspec_ioctl(name, s, EIOCSTUNE, sizeof(struct rr_tuning),
(caddr_t) &rr_tune) < 0)
err(1, "EIOCSTUNE");
}
/* esh_tune_eeprom
*
* Store the current tuning data into the eeprom.
*/
static void
esh_tune_eeprom(void)
{
#define LAST (RR_EE_HEADER_CHECKSUM / RR_EE_WORD_LEN)
#define FIRST (RR_EE_HEADER_CHECKSUM / RR_EE_WORD_LEN)
u_int32_t tuning_data[LAST + 1];
rr_eeprom.ifr_buffer = tuning_data;
rr_eeprom.ifr_length = sizeof(tuning_data);
rr_eeprom.ifr_offset = 0;
if (drvspec_ioctl(name, s, EIOCGEEPROM, sizeof(struct rr_eeprom),
(caddr_t) &rr_eeprom) == -1)
err(6, "ioctl to retrieve tuning information from EEPROM");
tuning_data[RR_EE_PCI_STATE / RR_EE_WORD_LEN] =
rr_tune.rt_pci_state;
tuning_data[RR_EE_DMA_WRITE_STATE / RR_EE_WORD_LEN] =
rr_tune.rt_dma_write_state;
tuning_data[RR_EE_DMA_READ_STATE / RR_EE_WORD_LEN] =
rr_tune.rt_dma_read_state;
tuning_data[RR_EE_INTERRUPT_TIMER / RR_EE_WORD_LEN] = rr_tune.rt_interrupt_timer;
tuning_data[RR_EE_STATS_TIMER / RR_EE_WORD_LEN] =
ESH_STATS_TIMER_DEFAULT;
tuning_data[RR_EE_HEADER_CHECKSUM / RR_EE_WORD_LEN] =
rr_checksum(&tuning_data[FIRST], LAST - FIRST);
rr_eeprom.ifr_buffer = tuning_data;
rr_eeprom.ifr_length = sizeof(tuning_data);
rr_eeprom.ifr_offset = 0;
if (drvspec_ioctl(name, s, EIOCSEEPROM, sizeof(struct rr_eeprom),
(caddr_t) &rr_eeprom) == -1)
err(7, "ioctl to set tuning information from EEPROM");
}
/* eeprom_upload
*
* Upload the EEPROM from the card and store in the data file.
*/
static void
eeprom_upload(const char *filename)
{
int fd;
bzero(eeprom, sizeof(eeprom));
if ((fd = open(filename, O_WRONLY | O_CREAT, 0644)) < 0)
err(4, "Couldn't open %s for output", filename);
rr_eeprom.ifr_buffer = eeprom;
rr_eeprom.ifr_length = sizeof(eeprom);
rr_eeprom.ifr_offset = 0;
if (drvspec_ioctl(name, s, EIOCGEEPROM, sizeof(struct rr_eeprom),
(caddr_t) &rr_eeprom) == -1)
err(5, "ioctl to retrieve all of EEPROM");
write(fd, eeprom, sizeof(eeprom));
close(fd);
}
/* eeprom_download
*
* Download into eeprom the contents of a file. The file is made up
* of ASCII text; the first three characters can be ignored, the next
* four hex characters define an address, the next two characters can
* be ignored, and the final eight hex characters are the data.
*/
static void
eeprom_download(const char *filename)
{
FILE *fp;
struct rr_seg_descr *segd = NULL, *nsegd;
char id[BUFSIZ];
char pad[BUFSIZ];
char buffer[BUFSIZ];
u_int32_t address = 0;
u_int32_t last_address = 0;
u_int32_t value;
u_int32_t length = 0;
int segment_start = 0;
int seg_table_start;
int seg_count_offset;
int phase2_start;
int phase2_checksum;
int in_segment = 0;
int segment = 0;
int eof = 0;
int line = 0;
int zero_count = 0;
int i;
/* Clear out eeprom storage space, then read in the value on the card */
bzero(eeprom, sizeof(eeprom));
bzero(runcode, sizeof(runcode));
rr_eeprom.ifr_buffer = eeprom;
rr_eeprom.ifr_length = sizeof(eeprom);
rr_eeprom.ifr_offset = 0;
if (drvspec_ioctl(name, s, EIOCGEEPROM, sizeof(struct rr_eeprom),
(caddr_t) &rr_eeprom) == -1)
err(5, "ioctl to retrieve EEPROM");
/*
* Open the input file and proceed to read the data file, storing
* the data and counting the number of segments.
*/
if ((fp = fopen(filename, "r")) == NULL)
err(2, "fopen");
do {
if (fgets(buffer, sizeof(buffer), fp) == NULL)
errx(3, "premature, unmarked end of file, line %d", line);
line++;
if (!strncmp(buffer + 7, "01", 2)) { /* check for EOF marker... */
eof = 1;
} else {
sscanf(buffer, "%3s%4x%2s%8x%2s",
id, &address, pad, &value, pad);
if (strcmp(id, ":04") != 0)
errx(3, "bad initial id on line %d", line);
}
/*
* Check to see if we terminated a segment; this happens
* when we are at end of file, or we hit a non-sequential
* address value, or we see three or more zeroes in a row.
*/
if ((length == RR_EE_SEG_SIZE || eof || zero_count >= 3 ||
(last_address && last_address != address - 1)) && in_segment) {
length -= zero_count;
segment_start += length;
segd[segment].length = length;
printf("segment %d, %d words\n", segment, length);
last_address = in_segment = zero_count = length = 0;
segment++;
}
if (eof)
break;
/* Skip zero values starting a segment */
if (!in_segment && value == 0)
continue;
last_address = address;
/*
* If we haven't started a segment yet, do so now.
* Store away the address at which this code should be placed
* in memory and the address of the code in the EEPROM.
*/
if (!in_segment) {
in_segment = 1;
nsegd = realloc(segd, sizeof(struct rr_seg_descr) * (segment + 1));
if (nsegd == NULL)
err(6, "couldn't realloc segment descriptor space");
segd = nsegd;
segd[segment].start_addr = address * sizeof(u_int32_t);
segd[segment].ee_addr = segment_start;
}
/* Keep track of consecutive zeroes */
if (in_segment && value == 0)
zero_count++;
else
zero_count = 0;
/* Store away the actual data */
runcode[segment_start + length++] = value;
} while (!eof);
fclose(fp);
/* Now that we have a segment count, fill in the EEPROM image. */
seg_count_offset = eeprom[RR_EE_RUNCODE_SEGMENTS / RR_EE_WORD_LEN];
seg_count_offset = (seg_count_offset - RR_EE_OFFSET) / RR_EE_WORD_LEN;
seg_table_start = seg_count_offset + 1;
phase2_checksum = seg_table_start + 3 * segment;
phase2_start = eeprom[RR_EE_PHASE2_EE_START / RR_EE_WORD_LEN];
phase2_start = (phase2_start - RR_EE_OFFSET) / RR_EE_WORD_LEN;
printf("segment table start = %x, segments = %d\n",
seg_table_start, eeprom[seg_count_offset]);
/* We'll fill in anything after the segment count, so clear it */
bzero(eeprom + seg_count_offset,
sizeof(eeprom) - seg_count_offset * sizeof(eeprom[0]));
eeprom[seg_count_offset] = segment;
for (i = 0; i < segment; i++)
segd[i].ee_addr = RR_EE_OFFSET +
(segd[i].ee_addr + phase2_checksum + 1) * RR_EE_WORD_LEN;
bcopy(segd, &eeprom[seg_table_start],
sizeof(struct rr_seg_descr) * segment);
bcopy(runcode, &eeprom[phase2_checksum + 1],
segment_start * sizeof(u_int32_t));
eeprom[phase2_checksum] = rr_checksum(&eeprom[phase2_start],
phase2_checksum - phase2_start);
eeprom[segment_start + phase2_checksum + 1] =
rr_checksum(&eeprom[phase2_checksum + 1], segment_start);
printf("phase2 checksum %x, runcode checksum %x\n",
eeprom[phase2_checksum],
eeprom[segment_start + phase2_checksum + 1]);
rr_eeprom.ifr_buffer = eeprom;
rr_eeprom.ifr_length = sizeof(eeprom);
rr_eeprom.ifr_offset = 0;
if (drvspec_ioctl(name, s, EIOCSEEPROM, sizeof(struct rr_eeprom),
(caddr_t) &rr_eeprom) == -1)
err(5, "ioctl to retrieve EEPROM");
}
/* rr_checksum
*
* Perform checksum on RunCode. Length is in words. Ugh.
*/
static u_int32_t
rr_checksum(const u_int32_t *data, int length)
{
u_int32_t checksum = 0;
while (length--)
checksum += *data++;
checksum = 0 - checksum;
return checksum;
}
static struct stats_values {
int offset;
const char *name;
} stats_values[] = {
{0x04, "receive rings created"},
{0x08, "receive rings deleted"},
{0x0c, "interrupts"},
{0x10, "event overflows"},
{0x14, "invalid commands"},
{0x18, "DMA read errors"},
{0x1c, "DMA write errors"},
{0x20, "stats updates per timer"},
{0x24, "stats updates per host"},
{0x28, "watchdog"},
{0x2c, "trace"},
{0x30, "link ready sync established"},
{0x34, "GLink errors"},
{0x38, "alternating flag errors"},
{0x3c, "overhead bit 8 synchronized"},
{0x40, "remote serial parity errors"},
{0x44, "remote parallel parity errors"},
{0x48, "remote loopback requested"},
{0x50, "transmit connections established"},
{0x54, "transmit connections rejected"},
{0x58, "transmit connections retried"},
{0x5c, "transmit connections timed out"},
{0x60, "transmit connections disconnected"},
{0x64, "transmit parity errors"},
{0x68, "packets sent"},
{0x74, "short first burst sent"},
{0x80, "transmit data not moving"},
{0x90, "receive connections accepted"},
{0x94, "receive connections rejected -- bad parity"},
{0x98, "receive connections rejected -- 64-bit width"},
{0x9c, "receive connections rejected -- buffers low"},
{0xa0, "receive connections disconnected"},
{0xa4, "receive connections with no data"},
{0xa8, "packets received"},
{0xb4, "short first burst received"},
{0xc0, "receive parity error"},
{0xc4, "receive LLRC error"},
{0xc8, "receive burst size error"},
{0xcc, "receive state error"},
{0xd0, "receive ready ULP"},
{0xd4, "receive invalid ULP"},
{0xd8, "receive packets flow control due to buffer space"},
{0xdc, "receive packets flow control due to descriptors"},
{0xe0, "receive ring fulls"},
{0xe4, "packet length errors"},
{0xe8, "packets with checksum error"},
{0xec, "packets dropped"},
{0xf0, "ring low on space"},
{0xf4, "data in ring at close"},
{0xf8, "receives to ring not moving data"},
{0xfc, "receiver idles"},
{0, 0},
};
static void
esh_reset(void)
{
if (drvspec_ioctl(name, s, EIOCRESET, 0, 0) < 0)
err(1, "ioctl(EIOCRESET)");
}
static void
esh_stats(int lget_stats)
{
u_int32_t *stats;
long long value;
int offset;
if (drvspec_ioctl(name, s, EIOCGSTATS, sizeof(struct rr_stats),
(caddr_t) &rr_stats) < 0)
err(1, "ioctl(EIOCGTUNE)");
stats = rr_stats.rs_stats;
value = (((long long) stats[0x78 / 4]) << 32) | stats[0x7c / 4];
if (lget_stats == 1 || value > 0)
printf("%12lld bytes sent\n", value);
value = ((long long) stats[0xb8 / 4] << 32) | stats[0xbc / 4];
if (lget_stats == 1 || value > 0)
printf("%12lld bytes received\n", value);
for (offset = 0; stats_values[offset].offset != 0; offset++) {
if (lget_stats == 1 || stats[stats_values[offset].offset / 4] > 0)
printf("%12d %s\n", stats[stats_values[offset].offset / 4],
stats_values[offset].name);
}
}
static void
esh_tuning_stats(void)
{
printf("rt_mode_and_status = %x\n",
rr_tune.rt_mode_and_status);
printf("rt_conn_retry_count = %x\n",
rr_tune.rt_conn_retry_count);
printf("rt_conn_retry_timer = %x\n",
rr_tune.rt_conn_retry_timer);
printf("rt_conn_timeout = %x\n", rr_tune.rt_conn_timeout);
printf("rt_stats_timer = %x\n", rr_tune.rt_stats_timer);
printf("rt_interrupt_timer = %x\n",
rr_tune.rt_interrupt_timer);
printf("rt_tx_timeout = %x\n", rr_tune.rt_tx_timeout);
printf("rt_rx_timeout = %x\n", rr_tune.rt_rx_timeout);
printf("rt_pci_state = %x"
" min DMA %x read max %x write max %x\n",
rr_tune.rt_pci_state,
(rr_tune.rt_pci_state & RR_PS_MIN_DMA_MASK)
>> RR_PS_MIN_DMA_SHIFT,
do_map_dma(rr_tune.rt_pci_state & RR_PS_READ_MASK,
read_dma_map),
do_map_dma(rr_tune.rt_pci_state & RR_PS_WRITE_MASK,
write_dma_map));
printf("rt_dma_write_state = %x\n",
rr_tune.rt_dma_write_state);
printf("rt_dma_read_state = %x\n", rr_tune.rt_dma_read_state);
printf("rt_driver_param = %x\n", rr_tune.rt_driver_param);
}