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Update these for Milan addresses.

This commit is contained in:
leo 2001-04-12 07:17:30 +00:00
parent bc6820dd0d
commit 8507fcec54
2 changed files with 48 additions and 12 deletions
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55
sys/arch/atari/include/iomap.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: iomap.h,v 1.8 2000/01/06 12:15:04 leo Exp $ */
/* $NetBSD: iomap.h,v 1.9 2001/04/12 07:17:30 leo Exp $ */
/*
* Copyright (c) 1995 Leo Weppelman.
@ -32,6 +32,8 @@
#ifndef _MACHINE_IOMAP_H
#define _MACHINE_IOMAP_H
#include "opt_mbtype.h"
/*
* Atari TT hardware:
* I/O Address maps
@ -45,17 +47,34 @@ vaddr_t stio_addr; /* Where the st io-area is mapped */
* the config-space, they should be used for a PCI-console only. Other
* cards should use the bus-functions to map io & mem spaces.
* Each card gets an config area of NBPG bytes.
* 'pci_mem_uncached' is used by the Milan interrupt handler that frobs
* with the PLX. Also, the Milan uses the first page of 'pci_io_addr' for
* access to some of it's ISA I/O devices (RTC, Interrupt controller, etc.)
*/
vaddr_t pci_conf_addr; /* KVA base of PCI config space */
vaddr_t pci_io_addr; /* KVA base of PCI io-space */
vaddr_t pci_mem_addr; /* KVA base of PCI mem-space */
vaddr_t pci_mem_uncached; /* KVA base of an uncached PCI mem-page */
#endif /* _KERNEL */
#define PCI_CONFB_PHYS (0xA0000000L)
#define PCI_CONFM_PHYS (0x00010000L)
#define PCI_IO_PHYS (0xB0000000L)
#define PCI_MEM_PHYS (0x80000000L)
#define PCI_VGA_PHYS (0x800a0000L)
#define PCI_CONFB_PHYS (0xA0000000L)
#define PCI_CONFM_PHYS (0x00010000L)
#if defined(_ATARIHW_)
#define PCI_IO_PHYS (0xB0000000L)
#define PCI_MEM_PHYS (0x80000000L)
#define PCI_VGA_PHYS (0x800a0000L)
#define ISA_IOSTART (0xfff30000L) /* XXX: With byte frobbing */
#define ISA_MEMSTART (0xff000000L)
#endif /* defined(_ATARIHW_) */
#if defined(_MILANHW_)
#define PCI_IO_PHYS (0x80000000L)
#define PCI_MEM_PHYS (0x40000000L)
#define PCI_VGA_PHYS (0x400a0000L)
#define ISA_IOSTART (0x80000000L) /* !NO! byte frobbing */
#define ISA_MEMSTART (0x40000000L)
#endif /* defined(_MILANHW_) */
#define PCI_CONF_SIZE (4 * NBPG)
#define PCI_IO_SIZE (NBPG)
@ -71,10 +90,12 @@ vaddr_t pci_mem_addr; /* KVA base of PCI mem-space */
/*
* Physical address of I/O area. Use only for pte initialisation!
*/
#define STIO_PHYS ((machineid & ATARI_HADES) \
? 0xffff8000L \
#define STIO_PHYS ((machineid & (ATARI_HADES | ATARI_MILAN)) \
? 0xffff8000L \
: 0x00ff8000L)
#if defined(_ATARIHW_)
/*
* I/O addresses in the STIO area:
*/
@ -93,4 +114,22 @@ vaddr_t pci_mem_addr; /* KVA base of PCI mem-space */
#define AD_MFP (AD_STIO + 0x7A00) /* 68901 */
#define AD_MFP2 (AD_STIO + 0x7A80) /* 68901-TT */
#define AD_ACIA (AD_STIO + 0x7C00) /* 2 * 6850 */
#endif /* defined(_ATARIHW_) */
#if defined(_MILANHW_)
/*
* Milan onboard I/O
*/
#define AD_MFP (AD_STIO + 0x4100) /* 68901 */
#define AD_PLX (AD_STIO + 0x4200) /* PLX9080 */
/*
* Milan special locations in the first page of the PCI I/O space.
*/
#define AD_8259_MASTER (pci_io_addr + 0x20) /* Master int. contr. */
#define AD_8259_SLAVE (pci_io_addr + 0xA0) /* Slave int. contr. */
#define AD_RTC (pci_io_addr + 0x70) /* MC146818 compat. RTC */
#endif /* defined(_MILANHW_) */
#endif /* _MACHINE_IOMAP_H */

5
sys/arch/atari/include/isa_machdep.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: isa_machdep.h,v 1.9 2000/06/04 19:14:33 cgd Exp $ */
/* $NetBSD: isa_machdep.h,v 1.10 2001/04/12 07:17:30 leo Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -73,9 +73,6 @@
#include <dev/isa/isadmavar.h>
#include <atari/atari/intr.h>
#define ISA_IOSTART 0xfff30000 /* XXX: Range with byte frobbing */
#define ISA_MEMSTART 0xff000000 /* XXX: Hades only */
struct atari_isa_chipset {
struct isa_dma_state ic_dmastate;
};