Add interrupt/iwin/owin / netbsd_configure code.
This commit is contained in:
matt
parent
4432170774
commit
84bc5974e2
@ -27,18 +27,20 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#define _ARM32_BUS_DMA_PRIVATE
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#define PCIE_PRIVATE
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#include "locators.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.3 2012/09/16 12:10:57 he Exp $");
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__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.4 2012/09/22 01:47:46 matt Exp $");
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/extent.h>
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#include <sys/intr.h>
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#include <sys/kmem.h>
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#include <sys/systm.h>
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#include <dev/pci/pcireg.h>
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@ -48,6 +50,10 @@ __KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.3 2012/09/16 12:10:57 he Exp $");
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#include <arm/broadcom/bcm53xx_reg.h>
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#include <arm/broadcom/bcm53xx_var.h>
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#ifndef __HAVE_PCI_CONF_HOOK
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#error __HAVE_PCI_CONF_HOOK must be defined
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#endif
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static const struct {
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paddr_t owin_base;
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psize_t owin_size;
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@ -60,6 +66,15 @@ static const struct {
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static int bcmpax_ccb_match(device_t, cfdata_t, void *);
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static void bcmpax_ccb_attach(device_t, device_t, void *);
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struct bcmpax_intrhand {
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TAILQ_ENTRY(bcmpax_intrhand) ih_link;
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int (*ih_func)(void *);
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void *ih_arg;
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int ih_ipl;
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};
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TAILQ_HEAD(bcmpax_ihqh, bcmpax_intrhand);
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struct bcmpax_softc {
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device_t sc_dev;
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bus_space_tag_t sc_bst;
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@ -69,7 +84,12 @@ struct bcmpax_softc {
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kmutex_t *sc_cfg_lock;
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bool sc_linkup;
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int sc_pba_flags;
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uint32_t sc_intrgen;
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struct arm32_pci_chipset sc_pc;
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struct bcmpax_ihqh sc_intrs;
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void *sc_ih[6];
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int sc_port;
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char sc_intrstring[4][32];
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};
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static inline uint32_t
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@ -98,11 +118,10 @@ static void *bcmpax_intr_establish(void *, pci_intr_handle_t, int,
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int (*)(void *), void *);
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static void bcmpax_intr_disestablish(void *, void *);
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#ifdef __HAVE_PCI_CONF_HOOK
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static int bcmpax_conf_hook(void *, int, int, int, pcireg_t);
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#endif
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static void bcmpax_conf_interrupt(void *, int, int, int, int, int *);
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static int bcmpax_intr(void *);
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CFATTACH_DECL_NEW(bcmpax_ccb, sizeof(struct bcmpax_softc),
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bcmpax_ccb_match, bcmpax_ccb_attach, NULL, NULL);
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@ -124,26 +143,78 @@ bcmpax_ccb_match(device_t parent, cfdata_t cf, void *aux)
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return 1;
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}
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static int
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bcmpax_iwin_init(struct bcmpax_softc *sc)
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{
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uint32_t megs = (physical_end + 0xfffff - physical_start) >> 20;
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uint32_t iwin_megs = min(256, megs);
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#if 1
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#if 1
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bus_addr_t iwin1_start = physical_start;
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#else
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bus_addr_t iwin1_start = 0;
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#endif
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#if 1
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bcmpax_write_4(sc, PCIE_IARR_1_LOWER, iwin1_start | min(megs, 128));
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bcmpax_write_4(sc, PCIE_FUNC0_IMAP1, iwin1_start | 1);
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#else
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bcmpax_write_4(sc, PCIE_FUNC0_IMAP1, iwin1_start | min(megs, 128));
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bcmpax_write_4(sc, PCIE_IARR_1_LOWER, iwin1_start | 1);
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#endif
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bcmpax_conf_write(sc, 0, PCI_MAPREG_START+4, iwin1_start);
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if (iwin_megs > 128) {
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bus_addr_t iwin2_start = iwin1_start + 128*1024*1024;
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#if 1
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bcmpax_write_4(sc, PCIE_IARR_2_LOWER, iwin2_start | min(megs - 128, 128));
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bcmpax_write_4(sc, PCIE_FUNC0_IMAP2, iwin2_start | 1);
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#else
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bcmpax_write_4(sc, PCIE_FUNC0_IMAP2, iwin2_start | min(megs - 128, 128));
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bcmpax_write_4(sc, PCIE_IARR_2_LOWER, iwin2_start | 1);
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#endif
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bcmpax_conf_write(sc, 0, PCI_MAPREG_START+8, iwin2_start);
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}
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#endif
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if (megs <= iwin_megs) {
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/*
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* We could can DMA to all of memory so we don't need to subregion!
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*/
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return 0;
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}
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return bus_dmatag_subregion(sc->sc_dmat, physical_start,
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physical_start + (iwin_megs << 20) - 1, &sc->sc_dmat, 0);
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}
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static void
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bcmpax_ccb_attach(device_t parent, device_t self, void *aux)
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{
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struct bcmpax_softc * const sc = device_private(self);
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struct bcmccb_attach_args * const ccbaa = aux;
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const struct bcm_locators * const loc = &ccbaa->ccbaa_loc;
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const char * const xname = device_xname(self);
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sc->sc_dev = self;
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sc->sc_bst = ccbaa->ccbaa_ccb_bst;
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sc->sc_dmat = ccbaa->ccbaa_dmat;
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for (u_int i = 0; i < 4; i++) {
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snprintf(sc->sc_intrstring[i], sizeof(sc->sc_intrstring[i]),
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"%s int%c", xname, 'a' + i);
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}
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sc->sc_bst = ccbaa->ccbaa_ccb_bst;
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bus_space_subregion(sc->sc_bst, ccbaa->ccbaa_ccb_bsh,
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loc->loc_offset, loc->loc_size, &sc->sc_bsh);
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/*
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* Kick the hardware into RC mode.
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*/
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bcmpax_write_4(sc, PCIE_CLK_CONTROL, 3);
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delay(250);
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bcmpax_write_4(sc, PCIE_CLK_CONTROL, 1);
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// delay(100*1000);
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uint32_t v = bcmpax_read_4(sc, PCIE_STRAP_STATUS);
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const bool enabled = (v & STRAP_PCIE_IF_ENABLE) != 0;
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const bool is_v2_p = (v & STRAP_PCIE_USER_FOR_CE_GEN1) == 0;
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@ -162,6 +233,8 @@ bcmpax_ccb_attach(device_t parent, device_t self, void *aux)
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sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
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sc->sc_cfg_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
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TAILQ_INIT(&sc->sc_intrs);
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sc->sc_pc.pc_conf_v = sc;
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sc->sc_pc.pc_attach_hook = bcmpax_attach_hook;
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sc->sc_pc.pc_bus_maxdevs = bcmpax_bus_maxdevs;
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@ -177,21 +250,43 @@ bcmpax_ccb_attach(device_t parent, device_t self, void *aux)
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sc->sc_pc.pc_intr_establish = bcmpax_intr_establish;
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sc->sc_pc.pc_intr_disestablish = bcmpax_intr_disestablish;
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#ifdef __HAVE_PCI_CONF_HOOK
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sc->sc_pc.pc_conf_hook = bcmpax_conf_hook;
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#endif
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sc->sc_pc.pc_conf_interrupt = bcmpax_conf_interrupt;
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sc->sc_pba_flags |= PCI_FLAGS_MRL_OKAY;
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sc->sc_pba_flags |= PCI_FLAGS_MRM_OKAY;
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sc->sc_pba_flags |= PCI_FLAGS_MWI_OKAY;
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// sc->sc_pba_flags |= PCI_FLAGS_MSI_OKAY;
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// sc->sc_pba_flags |= PCI_FLAGS_MSIX_OKAY;
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for (size_t i = 0; i < loc->loc_nintrs; i++) {
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sc->sc_ih[i] = intr_establish(loc->loc_intrs[0] + i, IPL_VM,
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IST_LEVEL, bcmpax_intr, sc);
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if (sc->sc_ih[i] == NULL) {
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aprint_error_dev(self,
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"failed to establish interrupt #%zu (%zu)\n", i,
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loc->loc_intrs[0] + i);
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while (i-- > 0) {
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intr_disestablish(sc->sc_ih[i]);
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}
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return;
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}
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}
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aprint_normal_dev(self, "interrupting on irqs %d-%d\n",
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loc->loc_intrs[0], loc->loc_intrs[0] + loc->loc_nintrs - 1);
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/*
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* Enable INTA-INTD
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*/
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bcmpax_write_4(sc, PCIE_SYS_RC_INTX_EN, 0x0f);
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int offset;
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const bool ok = pci_get_capability(&sc->sc_pc, 0, PCI_CAP_PCIEXPRESS,
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&offset, NULL);
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KASSERT(ok);
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/*
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* Now we wait (.1sec) for the link to come up.
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* Now we wait (.25 sec) for the link to come up.
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*/
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offset += PCI_PCIE_LCSR;
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for (size_t timo = 0;; timo++) {
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@ -209,6 +304,22 @@ bcmpax_ccb_attach(device_t parent, device_t self, void *aux)
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}
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if (sc->sc_linkup) {
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/*
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* Enable the inbound (device->memory) map.
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*/
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int error = bcmpax_iwin_init(sc);
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if (error) {
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aprint_error_dev(sc->sc_dev,
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"failed to subregion dma tag: %d\n", error);
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return;
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}
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aprint_normal_dev(self, "iwin[1]=%#x/%#x iwin[2]=%#x/%#x\n",
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bcmpax_read_4(sc, PCIE_FUNC0_IMAP1),
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bcmpax_read_4(sc, PCIE_IARR_1_LOWER),
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bcmpax_read_4(sc, PCIE_FUNC0_IMAP2),
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bcmpax_read_4(sc, PCIE_IARR_2_LOWER));
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paddr_t base = bcmpax_owins[loc->loc_port].owin_base;
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psize_t size = bcmpax_owins[loc->loc_port].owin_size;
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KASSERT((size & ~PCIE_OARR_ADDR) == 0);
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@ -225,7 +336,7 @@ bcmpax_ccb_attach(device_t parent, device_t self, void *aux)
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struct extent *memext = extent_create("pcimem", base,
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base + size, NULL, 0, EX_NOWAIT);
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int error = pci_configure_bus(&sc->sc_pc,
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error = pci_configure_bus(&sc->sc_pc,
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NULL, memext, NULL, 0, arm_pcache.dcache_line_size);
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extent_destroy(memext);
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@ -367,26 +478,64 @@ bcmpax_conf_interrupt(void *v, int bus, int dev, int ipin, int swiz, int *ilinep
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*ilinep = 5; /* (ipin + swiz) & 3; */
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}
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#ifdef __HAVE_PCI_CONF_HOOK
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static int
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bcmpax_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
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{
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if (func > 0)
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return 0;
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return PCI_CONF_ENABLE_MEM | PCI_CONF_MAP_MEM;
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return PCI_CONF_ENABLE_MEM | PCI_CONF_MAP_MEM | PCI_CONF_ENABLE_BM;
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}
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static int
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bcmpax_intr(void *v)
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{
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struct bcmpax_softc * const sc = v;
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while (bcmpax_read_4(sc, PCIE_SYS_RC_INTX_CSR)) {
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struct bcmpax_intrhand *ih;
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mutex_enter(sc->sc_lock);
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const uint32_t lastgen = sc->sc_intrgen;
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TAILQ_FOREACH(ih, &sc->sc_intrs, ih_link) {
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int (* const func)(void *) = ih->ih_func;
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void * const arg = ih->ih_arg;
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mutex_exit(sc->sc_lock);
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int rv = (*func)(arg);
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if (rv) {
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return rv;
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}
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mutex_enter(sc->sc_lock);
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/*
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* Check to see if the interrupt list changed.
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* If so, restart from the beginning.
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*/
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if (lastgen != sc->sc_intrgen)
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break;
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}
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mutex_exit(sc->sc_lock);
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}
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return 0;
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}
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#endif
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static int
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bcmpax_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *pihp)
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{
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return EINVAL;
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if (pa->pa_intrpin == 0)
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return EINVAL;
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*pihp = pa->pa_intrpin;
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return 0;
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}
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static const char *
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bcmpax_intr_string(void *v, pci_intr_handle_t pih)
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{
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struct bcmpax_softc * const sc = v;
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if (pih)
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return sc->sc_intrstring[pih - PCI_INTERRUPT_PIN_A];
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return NULL;
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}
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@ -400,10 +549,39 @@ static void *
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bcmpax_intr_establish(void *v, pci_intr_handle_t pih, int ipl,
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int (*func)(void *), void *arg)
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{
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return NULL;
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struct bcmpax_softc * const sc = v;
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KASSERT(!cpu_intr_p());
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KASSERT(!cpu_softintr_p());
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KASSERT(ipl == IPL_VM);
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KASSERT(func != NULL);
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KASSERT(arg != NULL);
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if (pih == 0)
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return NULL;
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struct bcmpax_intrhand * const ih = kmem_alloc(sizeof(*ih), KM_SLEEP);
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ih->ih_func = func;
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ih->ih_arg = arg;
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mutex_enter(sc->sc_lock);
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TAILQ_INSERT_TAIL(&sc->sc_intrs, ih, ih_link);
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mutex_exit(sc->sc_lock);
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return ih;
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}
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static void
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bcmpax_intr_disestablish(void *v, void *ih)
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bcmpax_intr_disestablish(void *v, void *vih)
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{
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struct bcmpax_softc * const sc = v;
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struct bcmpax_intrhand * const ih = vih;
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mutex_enter(sc->sc_lock);
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TAILQ_REMOVE(&sc->sc_intrs, ih, ih_link);
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sc->sc_intrgen++;
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mutex_exit(sc->sc_lock);
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kmem_free(ih, sizeof(*ih));
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}
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