Commented out some bus_dma code, until I can fix.
(bus_dma.c needs sync with alpha port!) Continued progress on scsi driver. A couple of other compiler warning level of tweaks.
This commit is contained in:
parent
b4b261bbb0
commit
84676442e2
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@ -1,4 +1,4 @@
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/* $NetBSD: bus_dma.c,v 1.2 1998/07/17 21:10:01 thorpej Exp $ */
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/* $NetBSD: bus_dma.c,v 1.3 1998/07/19 21:41:16 dbj Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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@ -40,7 +40,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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#if 0
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.2 1998/07/17 21:10:01 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.3 1998/07/19 21:41:16 dbj Exp $");
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#endif
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#include <sys/param.h>
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@ -337,6 +337,7 @@ _bus_dmamap_load_uio_direct(t, map, uio, flags)
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struct uio *uio;
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int flags;
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{
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#if 0
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vm_offset_t lastaddr;
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int seg, i, error, first;
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bus_size_t minlen, resid;
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@ -383,7 +384,8 @@ _bus_dmamap_load_uio_direct(t, map, uio, flags)
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addr = (caddr_t)iov[i].iov_base + offset;
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error = _bus_dmamap_load_buffer_direct_common(map, addr,
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minlen, p, flags, &lastaddr, &seg, first);
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minlen, p, flags,
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&lastaddr, &seg, first);
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first = 0;
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offset = 0;
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@ -394,6 +396,16 @@ _bus_dmamap_load_uio_direct(t, map, uio, flags)
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map->dm_nsegs = seg + 1;
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}
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return (error);
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#else
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/* @@@ This needs to be re-synced with the
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* arch/alpha/common/bus_dma.c driver. (and probably
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* that should be moved to MI code. Unfortunately,
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* the above addition won't compile until this is updated.
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* Hopefully, I will get to this shortly.
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* Darrin B. Jewell <dbj@netbsd.org> Sun Jul 19 17:28:16 1998
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*/
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panic("_bus_dmamap_load_uio_direct: not implemented");
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#endif
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}
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: esp.c,v 1.2 1998/07/13 04:01:39 dbj Exp $ */
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/* $NetBSD: esp.c,v 1.3 1998/07/19 21:41:16 dbj Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -151,8 +151,6 @@ bus_dmamap_t esp_dmacb_continue __P((void *arg));
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void esp_dmacb_completed __P((bus_dmamap_t map, void *arg));
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void esp_dmacb_shutdown __P((void *arg));
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void espattach __P((struct esp_softc *));
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/* Linkup to the rest of the kernel */
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struct cfattach esp_ca = {
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sizeof(struct esp_softc), espmatch_intio, espattach_intio
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@ -208,8 +206,12 @@ espmatch_intio(parent, cf, aux)
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/* should probably probe here */
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/* Should also probably set up data from config */
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#if 1
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/* this code isn't working yet, don't match on it */
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return(0);
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#else
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return(1);
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#endif
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}
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void
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@ -223,58 +225,13 @@ espattach_intio(parent, self, aux)
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esc->sc_bst = NEXT68K_INTIO_BUS_SPACE;
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if (bus_space_map(esc->sc_bst, NEXT_P_SCSI,
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ESP_DEVICE_SIZE, 0, &esc->sc_bsh)) {
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panic("\n%s: can't map ncr53c90 registers\n",
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panic("\n%s: can't map ncr53c90 registers",
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sc->sc_dev.dv_xname);
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}
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sc->sc_id = 7;
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sc->sc_freq = 20; /* Mhz */
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/* @@@ Some ESP_DCTL bits probably need setting */
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/* Set up SCSI DMA */
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{
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esc->sc_scsi_dma.nd_bst = NEXT68K_INTIO_BUS_SPACE;
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if (bus_space_map(esc->sc_scsi_dma.nd_bst, NEXT_P_SCSI_CSR,
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sizeof(struct dma_dev),0, &esc->sc_scsi_dma.nd_bsh)) {
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panic("\n%s: can't map scsi DMA registers\n",
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sc->sc_dev.dv_xname);
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}
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esc->sc_scsi_dma.nd_intr = NEXT_I_SCSI_DMA;
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esc->sc_scsi_dma.nd_chaining_flag = 0;
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esc->sc_scsi_dma.nd_shutdown_cb = &esp_dmacb_shutdown;
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esc->sc_scsi_dma.nd_continue_cb = &esp_dmacb_continue;
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esc->sc_scsi_dma.nd_completed_cb = &esp_dmacb_completed;
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esc->sc_scsi_dma.nd_cb_arg = sc;
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nextdma_config(&esc->sc_scsi_dma);
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nextdma_init(&esc->sc_scsi_dma);
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/* @@@ maxxfer is not set yet here */
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{
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int error;
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if ((error = bus_dmamap_create(esc->sc_scsi_dma.nd_dmat,
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sc->sc_maxxfer, 1, sc->sc_maxxfer,
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0, BUS_DMA_ALLOCNOW, &esc->sc_dmamap)) != 0) {
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panic("%s: can't create i/o DMA map, error = %d\n",
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sc->sc_dev.dv_xname,error);
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}
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}
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espattach(esc);
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}
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}
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/*
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* Attach this instance, and then all the sub-devices
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*/
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void
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espattach(esc)
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struct esp_softc *esc;
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{
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struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
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/*
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* Set up glue for MI code early; we use some of it here.
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*/
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break;
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}
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/* Establish interrupt channel */
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isrlink_autovec((int(*)__P((void*)))ncr53c9x_intr, sc,
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NEXT_I_IPL(NEXT_I_SCSI), 0);
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INTR_ENABLE(NEXT_I_SCSI);
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/* @@@ Some ESP_DCTL bits probably need setting */
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NCR_WRITE_REG(sc, ESP_DCTL,
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ESPDCTL_20MHZ | ESPDCTL_INTENB | ESPDCTL_RESET);
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DELAY(10);
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NCR_WRITE_REG(sc, ESP_DCTL, ESPDCTL_20MHZ | ESPDCTL_INTENB);
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DELAY(10);
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/* Set up SCSI DMA */
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{
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esc->sc_scsi_dma.nd_bst = NEXT68K_INTIO_BUS_SPACE;
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if (bus_space_map(esc->sc_scsi_dma.nd_bst, NEXT_P_SCSI_CSR,
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sizeof(struct dma_dev),0, &esc->sc_scsi_dma.nd_bsh)) {
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panic("\n%s: can't map scsi DMA registers",
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sc->sc_dev.dv_xname);
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}
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esc->sc_scsi_dma.nd_intr = NEXT_I_SCSI_DMA;
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esc->sc_scsi_dma.nd_chaining_flag = 0;
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esc->sc_scsi_dma.nd_shutdown_cb = &esp_dmacb_shutdown;
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esc->sc_scsi_dma.nd_continue_cb = &esp_dmacb_continue;
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esc->sc_scsi_dma.nd_completed_cb = &esp_dmacb_completed;
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esc->sc_scsi_dma.nd_cb_arg = sc;
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nextdma_config(&esc->sc_scsi_dma);
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nextdma_init(&esc->sc_scsi_dma);
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{
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int error;
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if ((error = bus_dmamap_create(esc->sc_scsi_dma.nd_dmat,
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sc->sc_maxxfer, 1, sc->sc_maxxfer,
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0, BUS_DMA_ALLOCNOW, &esc->sc_dmamap)) != 0) {
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panic("%s: can't create i/o DMA map, error = %d",
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sc->sc_dev.dv_xname,error);
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}
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}
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}
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/* register interrupt stats */
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evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);
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#if 0
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/* Turn on target selection using the `dma' method */
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ncr53c9x_dmaselect = 1;
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bootpath_store(1, NULL);
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#else
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ncr53c9x_dmaselect = 0;
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#endif
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esc->sc_slop_bgn_addr = 0;
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esc->sc_slop_bgn_size = 0;
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esc->sc_slop_end_addr = 0;
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esc->sc_slop_end_size = 0;
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esc->sc_datain = -1;
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/* Establish interrupt channel */
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isrlink_autovec((int(*)__P((void*)))ncr53c9x_intr, sc,
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NEXT_I_IPL(NEXT_I_SCSI), 0);
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INTR_ENABLE(NEXT_I_SCSI);
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}
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/*
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struct ncr53c9x_softc *sc;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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if (esc->sc_dmamap->dm_mapsize != 0) {
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bus_dmamap_unload(esc->sc_scsi_dma.nd_dmat, esc->sc_dmamap);
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}
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nextdma_reset(&esc->sc_scsi_dma);
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esc->sc_slop_bgn_addr = 0;
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esc->sc_slop_bgn_size = 0;
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esc->sc_slop_end_addr = 0;
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esc->sc_slop_end_size = 0;
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esc->sc_datain = -1;
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}
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int
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struct esp_softc *esc = (struct esp_softc *)sc;
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#ifdef DIAGNOSTIC
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if (esc->sc_datain != -1) {
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panic("%s: map already loaded in esp_dma_setup, datain = %d",
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sc->sc_dev.dv_xname,esc->sc_datain);
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if ((esc->sc_datain != -1) ||
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(esc->sc_dmamap->dm_mapsize != 0)) {
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panic("%s: map already loaded in esp_dma_setup\n"
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"\tdatain = %d\n\tmapsize=%d",
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sc->sc_dev.dv_xname,esc->sc_datain,esc->sc_dmamap->dm_mapsize);
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}
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#endif
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/* Deal with DMA alignment issues, by stuffing the FIFO.
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* This assumes that if bus_dmamap_load is given an aligned
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* buffer, then it will generate aligned hardware addresses
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* to give to the device. Perhaps that is not a good assumption,
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* but it is probably true. [dbj@netbsd.org:19980719.0135EDT]
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*/
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{
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int error;
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error = bus_dmamap_load(esc->sc_scsi_dma.nd_dmat,
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esc->sc_dmamap, *addr, *dmasize, NULL, BUS_DMA_NOWAIT);
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if (error) {
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panic("%s: can't start DMA\n");
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int slop_bgn_size; /* # bytes to be fifo'd at beginning */
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int slop_end_size; /* # bytes to be fifo'd at end */
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{
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u_long bgn = (u_long)(*addr);
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u_long end = (u_long)(*addr+*dmasize);
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slop_bgn_size = DMA_BEGINALIGNMENT-(bgn % DMA_BEGINALIGNMENT);
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slop_end_size = end % DMA_ENDALIGNMENT;
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}
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/* Check to make sure we haven't counted the slop twice
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* as would happen for a very short dma buffer */
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if (slop_bgn_size+slop_end_size > *dmasize) {
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#if defined(DIAGNOSTIC)
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if ((slop_bgn_size != *dmasize) ||
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(slop_end_size != *dmasize)) {
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printf("slop_bgn_size %d",slop_bgn_size);
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printf("slop_end_size %d",slop_bgn_size);
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panic("%s: confused alignment calculation\n"
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"\tslop_bgn_size %d\n\tslop_end_size %d\n\tdmasize %d",
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sc->sc_dev.dv_xname,slop_bgn_size,slop_end_size,*dmasize);
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}
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#endif
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slop_end_size = 0;
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}
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if (slop_bgn_size+slop_end_size < *dmasize) {
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int error;
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error = bus_dmamap_load(esc->sc_scsi_dma.nd_dmat,
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esc->sc_dmamap,
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*addr+slop_bgn_size,
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*dmasize-(slop_bgn_size+slop_end_size),
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NULL, BUS_DMA_NOWAIT);
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if (error) {
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panic("%s: can't load dma map. error = %d",error);
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}
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} else {
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/* If there's no DMA, then coalesce the fifo buffers */
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slop_bgn_size += slop_end_size;
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slop_end_size = 0;
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}
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esc->sc_slop_bgn_addr = *addr;
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esc->sc_slop_bgn_size = slop_bgn_size;
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esc->sc_slop_end_addr = (*addr+*dmasize)-slop_end_size;
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esc->sc_slop_end_size = slop_end_size;
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}
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esc->sc_datain = datain;
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struct ncr53c9x_softc *sc;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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nextdma_start(&esc->sc_scsi_dma,
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(esc->sc_datain ? DMACSR_READ : DMACSR_WRITE));
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/* @@@ Stuff the bgn slop into fifo */
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if (esc->sc_dmamap->dm_mapsize != 0) {
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nextdma_start(&esc->sc_scsi_dma,
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(esc->sc_datain ? DMACSR_READ : DMACSR_WRITE));
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} else {
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#if defined(DIAGNOSTIC)
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/* @@@ verify that end slop is 0, since the shutdown
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* callback will not be called.
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*/
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#endif
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esc->sc_slop_bgn_addr = 0;
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esc->sc_slop_bgn_size = 0;
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esc->sc_slop_end_addr = 0;
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esc->sc_slop_end_size = 0;
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}
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}
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void
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@ -545,5 +620,12 @@ esp_dmacb_shutdown(arg)
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#endif
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bus_dmamap_unload(esc->sc_scsi_dma.nd_dmat, esc->sc_dmamap);
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/* @@@ Stuff the end slop into fifo */
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esc->sc_datain = -1;
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esc->sc_slop_bgn_addr = 0;
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esc->sc_slop_bgn_size = 0;
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esc->sc_slop_end_addr = 0;
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esc->sc_slop_end_size = 0;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: espvar.h,v 1.2 1998/07/13 04:01:39 dbj Exp $ */
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/* $NetBSD: espvar.h,v 1.3 1998/07/19 21:41:16 dbj Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -44,4 +44,8 @@ struct esp_softc {
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bus_space_handle_t sc_bsh; /* the device registers */
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bus_dmamap_t sc_dmamap; /* i/o dma map */
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int sc_datain; /* dma direction for map */
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caddr_t sc_slop_bgn_addr; /* bytes to be fifo'd at beginning */
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caddr_t sc_slop_end_addr; /* bytes to be fifo'd at end */
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int sc_slop_bgn_size; /* # bytes to be fifo'd at beginning */
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int sc_slop_end_size; /* # bytes to be fifo'd at end */
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};
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@ -1,4 +1,4 @@
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/* $NetBSD: mb8795.c,v 1.6 1998/07/11 07:06:16 dbj Exp $ */
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/* $NetBSD: mb8795.c,v 1.7 1998/07/19 21:41:16 dbj Exp $ */
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/*
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* Copyright (c) 1998 Darrin B. Jewell
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* All rights reserved.
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@ -240,7 +240,7 @@ mb8795_config(sc)
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/****************************************************************/
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#if 0
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#define XCHR(x) "0123456789abcdef"[(x) & 0xf]
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static void
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hex_dump(unsigned char *pkt, size_t len)
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@ -260,7 +260,7 @@ hex_dump(unsigned char *pkt, size_t len)
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}
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printf("\n");
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}
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#endif
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/*
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* Controller receive interrupt.
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@ -854,7 +854,6 @@ mb8795_txdma_completed(map, arg)
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void *arg;
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{
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struct mb8795_softc *sc = arg;
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname));
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@ -1,4 +1,4 @@
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/* $NetBSD: nextdma.c,v 1.2 1998/07/01 22:14:44 dbj Exp $ */
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/* $NetBSD: nextdma.c,v 1.3 1998/07/19 21:41:17 dbj Exp $ */
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/*
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* Copyright (c) 1998 Darrin B. Jewell
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* All rights reserved.
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@ -185,7 +185,8 @@ next_dmamap_sync(t, map, offset, len, ops)
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{
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/* flush/purge the cache.
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* assumes pointers are aligned
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* should probably be fixed to use offset and len
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* @@@ should probably be fixed to use offset and len args.
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* should also optimize this to work on pages for larger regions?
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*/
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if (ops & BUS_DMASYNC_PREWRITE) {
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int i;
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@ -1,4 +1,4 @@
|
|||
/* $NetBSD: nextdmareg.h,v 1.1.1.1 1998/06/09 07:53:05 dbj Exp $ */
|
||||
/* $NetBSD: nextdmareg.h,v 1.2 1998/07/19 21:41:17 dbj Exp $ */
|
||||
/*
|
||||
* Copyright (c) 1998 Darrin B. Jewell
|
||||
* All rights reserved.
|
||||
|
@ -29,6 +29,10 @@
|
|||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/* I think the chip can handle 64k per chain, but I don't
|
||||
* know how much per segment for sure. We might try
|
||||
* experimenting with this value. Can we cross page boundaries?
|
||||
*/
|
||||
#define MAX_DMASIZE 8192
|
||||
|
||||
/* from nextdev/dma.h */
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: machdep.c,v 1.5 1998/07/04 22:18:34 jonathan Exp $ */
|
||||
/* $NetBSD: machdep.c,v 1.6 1998/07/19 21:41:17 dbj Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
|
@ -174,6 +174,15 @@ next68k_init()
|
|||
{
|
||||
int i;
|
||||
|
||||
#if 0
|
||||
/* @@@ Since the boot rom doesn't know how to pass in
|
||||
* these parameters yet, I manually set them here while debugging
|
||||
* the scsi driver.
|
||||
* Darrin B. Jewell <dbj@netbsd.org> Sun Jul 19 06:14:52 1998
|
||||
*/
|
||||
boothowto = RB_KDB | RB_ASKNAME;
|
||||
#endif
|
||||
|
||||
/* Initialize the interrupt handlers. */
|
||||
isrinit();
|
||||
|
||||
|
@ -228,13 +237,11 @@ consinit()
|
|||
cninit();
|
||||
|
||||
#ifdef DDB
|
||||
#ifdef DEBUG
|
||||
#if 0
|
||||
printf("This kernel was compiled with DEBUG: entering debugger\n");
|
||||
Debugger();
|
||||
#endif
|
||||
#endif
|
||||
if (boothowto & RB_KDB) {
|
||||
Debugger();
|
||||
}
|
||||
#endif
|
||||
|
||||
init = 1;
|
||||
}
|
||||
else
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: nextrom.c,v 1.4 1998/07/11 07:06:17 dbj Exp $ */
|
||||
/* $NetBSD: nextrom.c,v 1.5 1998/07/19 21:41:17 dbj Exp $ */
|
||||
/*
|
||||
* Copyright (c) 1998 Darrin B. Jewell
|
||||
* All rights reserved.
|
||||
|
@ -114,6 +114,11 @@ next68k_bootargs(args)
|
|||
msize4 = 0x200000;
|
||||
msize1 = 0x80000; /* ? */
|
||||
ROM_PUTS("Looks like a NeXT_WARP9C\r\n");
|
||||
} else if (MONRELOC(char,MG_machine_type) == NeXT_WARP9) {
|
||||
msize16 = 0x1000000;
|
||||
msize4 = 0x400000;
|
||||
msize1 = 0x100000;
|
||||
ROM_PUTS("Looks like a NeXT_WARP9\r\n");
|
||||
} else {
|
||||
msize16 = 0x100000;
|
||||
msize4 = 0x100000;
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: Makefile,v 1.2 1998/07/07 00:16:34 dbj Exp $
|
||||
# $NetBSD: Makefile,v 1.3 1998/07/19 21:41:17 dbj Exp $
|
||||
|
||||
S= ${.CURDIR}/../../../..
|
||||
|
||||
|
@ -24,8 +24,7 @@ RELOC= 4380000
|
|||
INCLUDES+= -I${.CURDIR} -I${.CURDIR}/obj.${MACHINE} -I${S}/arch -I${S} -I${S}/lib/libsa -I${S}/lib/libkern
|
||||
DEFS+= -D_STANDALONE -DMC68040 -DSUPPORT_BOOTP -DSUPPORT_DHCP -DDEBUG # -DEN_DEBUG -DNETIF_DEBUG # -DSD_DEBUG -DSCSI_DEBUG
|
||||
SAMISCCPPFLAGS= -DSUPPORT_DHCP -DSUPPORT_BOOTP -DINSECURE # -DBOOTP_DEBUG -DETHER_DEBUG -DNET_DEBUG # -DNETIF_DEBUG -DNFS_DEBUG -DARP_DEBUG
|
||||
#COPTS+= -Wall -Wno-main
|
||||
COPTS+= -Wall
|
||||
COPTS+= -Wall -Wno-main
|
||||
CFLAGS+= -nostdinc ${INCLUDES} ${DEFS}
|
||||
LIBCRT0=
|
||||
|
||||
|
|
Loading…
Reference in New Issue