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skrll 2020-11-04 07:41:34 +00:00
parent 25d0daa97c
commit 84305e753a
1 changed files with 13 additions and 13 deletions
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26
sys/arch/riscv/include/reg.h
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@ -1,4 +1,4 @@
/* $NetBSD: reg.h,v 1.4 2020/11/04 07:40:15 skrll Exp $ */
/* $NetBSD: reg.h,v 1.5 2020/11/04 07:41:34 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -32,18 +32,18 @@
#ifndef _RISCV_REG_H_
#define _RISCV_REG_H_
// x0 = 0
// x1 = ra (return address)
// x2 = sp (stack pointer)
// x3 = gp (global pointer)
// x4 = tp (thread pointer)
// x5-x7 = t0-t2 (temporary)
// x8 = s0/fp (saved register / frame pointer)
// x9 = s1 (saved register)
// x10-x11 = a0-a1 (arguments/return values)
// x12-x17 = a2-a7 (arguments)
// x18-x27 = s2-s11 (saved registers)
// x28-x31 = t3-r6 (temporaries)
// x0 = 0
// x1 = ra (return address)
// x2 = sp (stack pointer)
// x3 = gp (global pointer)
// x4 = tp (thread pointer)
// x5 - x7 = t0 - t2 (temporary)
// x8 = s0/fp (saved register / frame pointer)
// x9 = s1 (saved register)
// x10 - x11 = a0 - a1 (arguments/return values)
// x12 - x17 = a2 - a7 (arguments)
// x18 - x27 = s2 - s11 (saved registers)
// x28 - x31 = t3 - r6 (temporaries)
struct reg { // synced with register_t in <riscv/types.h>
#ifdef _LP64