Define interrupt information for SHARK.
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/* $NetBSD: irqhandler.h,v 1.11 1998/02/21 23:16:28 mark Exp $ */
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/* $NetBSD: irqhandler.h,v 1.12 1998/06/17 19:36:33 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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#define IRQ_EXPCARD7 0x1F
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#endif /* RISCPC */
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#ifdef OFWGENCFG
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/* These are just made up for now! -JJK */
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#define IRQ_TIMER0 0
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#define IRQ_RESERVED0 0x08
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#define IRQ_RESERVED1 0x09
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#define IRQ_RESERVED2 0x0A
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#define IRQ_RESERVED3 0x0B
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#endif
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/* XXX why is this in ARM7500? */
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#ifdef SHARK
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/* shark hardware requirements for IRQ's:
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IDE: 14 (hardwired)
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PCI: 5, 9, 10, 11, 15 (mapped to UMIPCI inta, intb, intc, intd)
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UMIISA: 10, 11, 12
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SuperIO: 1, 3..12, 14, 15 (all may be remapped. defaults as follows.)
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KBC: 1
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USI: 3 (UART with Slow Infrared support)
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UART: 4
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FLOPPY: 6 (not currently used on shark)
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PARALLEL: 7
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RTC: 8 (not used on shark: RTC in sequoia used)
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MOUSE: 12
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Sequoia: 8 (internal RTC hardwired to irq 8)
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Codec: 5, 7, 9, 10, 15 (irqe, connected to 15, has special status.)
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CS8900: 5, 10, 11, 12 (P.14 of datasheet sez only 1 used/time)
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FERR#: 13 (unconnected floating point error)
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total of 15 irqs:
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timer, ide, 2 umi = isa/pci, ethernet, 2 codec, kb, usi, uart, floppy,
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parallel, rtc, mouse, ferr (irq 13)
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eventually, need to read the OFW dev info tree, and allocate IRQs.
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hardcoded for now.
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*/
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#define IRQ_TIMER0 0x00 /* hardwired to 8254 counter 0 in sequoia */
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#define IRQ_KEYBOARD 0x01
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#define IRQ_CASCADE 0x02 /* hardwired IRQ for second 8259 = IRQ_SLAVE */
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#define IRQ_USI 0x03
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#define IRQ_UART 0x04
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#define IRQ_ETHERNET 0x05
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#define IRQ_FLOPPY 0x06
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#define IRQ_PARALLEL 0x07
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#define IRQ_RTC 0x08 /* hardwired to the sequoia RTC */
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#define IRQ_CODEC1 0x09
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#define IRQ_UMI1 0x0A /* isa or pci */
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#define IRQ_UMI2 0x0B /* isa or pci */
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#define IRQ_MOUSE 0x0C
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#define IRQ_FERR 0x0D /* FERR# pin on sequoia needs to be connected */
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#define IRQ_IDE 0x0E /* hardwired to the IDE connector */
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#define IRQ_CODEC2 0x0F /* special interrupt on codec */
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#define IRQ_RESERVED0 0x10
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#define IRQ_RESERVED1 0x11
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#define IRQ_RESERVED2 0x12
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#define IRQ_RESERVED3 0x13
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/* XXX should this go into isa_machdep.h. Somewhere else? */
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/* Interrupt sharing types. */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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#endif /* SHARK */
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#endif /* CPU_ARM7500 */
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#define IRQ_VSYNC IRQ_FLYBACK /* Aliased */
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