From 83ef3d492840aa3eb07f28b89ba20de1bc3f58f0 Mon Sep 17 00:00:00 2001 From: fvdl Date: Fri, 9 Jan 1998 22:34:58 +0000 Subject: [PATCH] Switch off CPU-PCI write posting for the Saturn chipset; it is known to cause problems with PCI busmasters. --- sys/arch/i386/pci/pchb.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/sys/arch/i386/pci/pchb.c b/sys/arch/i386/pci/pchb.c index 2d295278cc43..791477553cad 100644 --- a/sys/arch/i386/pci/pchb.c +++ b/sys/arch/i386/pci/pchb.c @@ -1,4 +1,4 @@ -/* $NetBSD: pchb.c,v 1.9 1997/10/09 08:48:33 jtc Exp $ */ +/* $NetBSD: pchb.c,v 1.10 1998/01/09 22:34:58 fvdl Exp $ */ /*- * Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -56,6 +56,15 @@ #define PCISET_BRIDGE_NUMBER(reg) (((reg) >> 8) & 0xff) #define PCISET_PCI_BUS_NUMBER(reg) (((reg) >> 16) & 0xff) +/* XXX should be in dev/ic/i82424{reg.var}.h */ +#define I82424_CPU_BCTL_REG 0x53 +#define I82424_PCI_BCTL_REG 0x54 + +#define I82424_BCTL_CPUMEM_POSTEN 0x01 +#define I82424_BCTL_CPUPCI_POSTEN 0x02 +#define I82424_BCTL_PCIMEM_BURSTEN 0x01 +#define I82424_BCTL_PCI_BURSTEN 0x02 + int pchbmatch __P((struct device *, void *, void *)); void pchbattach __P((struct device *, struct device *, void *)); @@ -216,6 +225,17 @@ pchbattach(parent, self, aux) break; } break; + case PCI_PRODUCT_INTEL_CDC: + bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag, + I82424_CPU_BCTL_REG); + if (bcreg & I82424_BCTL_CPUPCI_POSTEN) { + bcreg &= ~I82424_BCTL_CPUPCI_POSTEN; + pci_conf_write(pa->pa_pc, pa->pa_tag, + I82424_CPU_BCTL_REG, bcreg); + printf("%s: disabled CPU-PCI write posting\n", + self->dv_xname); + } + break; } } }