Move undefined.c from sys/arch/{arm32/arm32,hpcarm/hpcarm} to sys/arch/arm/arm
in preparation for making it usable on arm26 as well.
This commit is contained in:
bjh21
parent
f28b5d3d94
commit
83b8de43dd
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@ -1,4 +1,4 @@
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/* $NetBSD: undefined.c,v 1.2 2001/02/28 18:15:45 bjh21 Exp $ */
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/* $NetBSD: undefined.c,v 1.1 2001/03/05 23:06:14 bjh21 Exp $ */
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/*
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* Copyright (c) 1995 Mark Brinicombe.
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@ -1,4 +1,4 @@
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# $NetBSD: files.arm,v 1.17 2001/03/04 23:25:01 bjh21 Exp $
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# $NetBSD: files.arm,v 1.18 2001/03/05 23:06:16 bjh21 Exp $
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# temporary define to allow easy moving to ../arch/arm/arm32
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defopt ARM32
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@ -47,6 +47,7 @@ file arch/arm/arm/compat_13_machdep.c compat_13
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file arch/arm/arm/process_machdep.c
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file arch/arm/arm/sig_machdep.c
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file arch/arm/arm/sigcode.S
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file arch/arm/arm/undefined.c arm32
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file arch/arm/arm/vm_machdep_arm.c
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file arch/arm/arm/disksubr.c disk
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@ -1,275 +0,0 @@
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/* $NetBSD: undefined.c,v 1.23 2001/02/28 18:15:44 bjh21 Exp $ */
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/*
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* Copyright (c) 1995 Mark Brinicombe.
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* Copyright (c) 1995 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* undefined.c
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*
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* Fault handler
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*
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* Created : 06/01/95
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*/
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#define FAST_FPE
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/syslog.h>
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#include <sys/vmmeter.h>
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#ifdef FAST_FPE
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#include <sys/acct.h>
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#endif
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#include <uvm/uvm_extern.h>
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#include <machine/cpu.h>
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#include <machine/frame.h>
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#include <machine/katelib.h>
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#include <machine/undefined.h>
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#include <machine/trap.h>
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#include <arch/arm/arm/disassem.h>
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#ifdef FAST_FPE
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extern int want_resched;
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#endif
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undef_handler_t undefined_handlers[MAX_COPROCS];
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int
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default_undefined_handler(address, instruction, frame, fault_code)
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u_int address;
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u_int instruction;
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trapframe_t *frame;
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int fault_code;
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{
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struct proc *p;
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p = curproc;
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if (p == NULL)
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p = &proc0;
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#ifdef VERBOSE_ARM32
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log(LOG_ERR, "Undefined instruction 0x%08x @ 0x%08x in process %s (pid %d)\n",
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instruction, address, p->p_comm, p->p_pid);
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#endif
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return(1);
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}
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int
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install_coproc_handler(coproc, handler)
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int coproc;
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undef_handler_t handler;
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{
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if (coproc < 0 || coproc > MAX_COPROCS)
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return(EINVAL);
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if (handler == (undef_handler_t)0)
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handler = default_undefined_handler;
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undefined_handlers[coproc] = handler;
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return(0);
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}
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void
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undefined_init()
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{
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int loop;
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for (loop = 0; loop < MAX_COPROCS; ++loop)
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undefined_handlers[loop] = default_undefined_handler;
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}
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void
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undefinedinstruction(frame)
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trapframe_t *frame;
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{
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struct proc *p;
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u_int fault_pc;
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int fault_instruction;
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int fault_code;
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int coprocessor;
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/* Enable interrupts if they were enabled before the exception. */
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if (!(frame->tf_spsr & I32_bit))
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enable_interrupts(I32_bit);
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/* Update vmmeter statistics */
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uvmexp.traps++;
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fault_pc = frame->tf_pc - INSN_SIZE;
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/*
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* Should use fuword() here .. but in the interests of squeezing every
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* bit of speed we will just use ReadWord(). We know the instruction
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* can be read as was just executed so this will never fail unless the
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* kernel is screwed up in which case it does not really matter does
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* it ?
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*/
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fault_instruction = ReadWord(fault_pc);
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/* Check for coprocessor instruction */
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/*
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* According to the datasheets you only need to look at bit 27 of the
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* instruction to tell the difference between and undefined
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* instruction and a coprocessor instruction following an undefined
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* instruction trap.
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*/
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if ((fault_instruction & (1 << 27)) != 0)
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coprocessor = (fault_instruction >> 8) & 0x0f;
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else
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coprocessor = 0;
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/* Get the current proc structure or proc0 if there is none */
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if ((p = curproc) == 0)
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p = &proc0;
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if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
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/* Modify the fault_code to reflect the USR/SVC state at time of fault */
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fault_code = FAULT_USER;
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p->p_addr->u_pcb.pcb_tf = frame;
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} else
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fault_code = 0;
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/* OK this is were we do something about the instruction */
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/* Check for coprocessor instruction */
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/* Special cases */
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if (coprocessor == 0 && fault_instruction == GDB_BREAKPOINT
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&& fault_code == FAULT_USER) {
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frame->tf_pc -= INSN_SIZE; /* Adjust to point to the BP */
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trapsignal(curproc, SIGTRAP, 0);
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} else if ((undefined_handlers[coprocessor](fault_pc, fault_instruction,
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frame, fault_code)) != 0) {
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/* Fault has not been handled */
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#ifdef VERBOSE_ARM32
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{ s = spltty();
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if ((fault_instruction & 0x0f000010) == 0x0e000000) {
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printf("CDP\n");
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disassemble(fault_pc);
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}
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else if ((fault_instruction & 0x0e000000) == 0x0c000000) {
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printf("LDC/STC\n");
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disassemble(fault_pc);
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}
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else if ((fault_instruction & 0x0f000010) == 0x0e000010) {
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printf("MRC/MCR\n");
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disassemble(fault_pc);
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}
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else if ((fault_instruction & ~INSN_COND_MASK)
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!= (KERNEL_BREAKPOINT & ~INSN_COND_MASK)) {
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printf("Undefined instruction\n");
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disassemble(fault_pc);
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}
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(void)splx(s); }
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#endif
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if ((fault_code & FAULT_USER) == 0) {
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printf("Undefined instruction in kernel: Heavy man !\n");
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#ifdef DDB
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Debugger();
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#endif /* DDB */
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}
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trapsignal(p, SIGILL, fault_instruction);
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}
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if ((fault_code & FAULT_USER) == 0)
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return;
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#ifdef FAST_FPE
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/* Optimised exit code */
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{
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int sig;
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/* take pending signals */
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while ((sig = (CURSIG(p))) != 0) {
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postsig(sig);
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}
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p->p_priority = p->p_usrpri;
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/*
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* Check for reschedule request, at the moment there is only
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* 1 ast so this code should always be run
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*/
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if (want_resched) {
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/*
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* We are being preempted.
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*/
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preempt(NULL);
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while ((sig = (CURSIG(p))) != 0) {
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postsig(sig);
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}
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}
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curcpu()->ci_schedstate.spc_curpriority = p->p_priority;
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}
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#else
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userret(p);
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#endif
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}
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void
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resethandler(frame)
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trapframe_t *frame;
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{
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#ifdef DDB
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/* Extra info incase panic drops us into the debugger */
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printf("Trap frame at %p\n", frame);
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#endif /* DDB */
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panic("Branch to never-never land (zero)..... we're dead\n");
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}
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/* End of undefined.c */
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@ -1,4 +1,4 @@
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# $NetBSD: files.arm32,v 1.98 2001/03/04 08:25:38 matt Exp $
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# $NetBSD: files.arm32,v 1.99 2001/03/05 23:06:16 bjh21 Exp $
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#
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# First try for arm-specific configuration info
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#
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@ -327,7 +327,6 @@ file arch/arm32/arm32/stubs.c
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file arch/arm32/arm32/exception.S
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file arch/arm32/arm32/ast.c
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file arch/arm32/arm32/fault.c
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file arch/arm32/arm32/undefined.c
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file arch/arm32/arm32/mem.c
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file arch/arm32/arm32/procfs_machdep.c procfs
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file arch/arm32/arm32/machdep.c
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@ -1,4 +1,4 @@
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# $NetBSD: files.hpcarm,v 1.8 2001/03/04 08:25:38 matt Exp $
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# $NetBSD: files.hpcarm,v 1.9 2001/03/05 23:06:17 bjh21 Exp $
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#
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# First try for arm-specific configuration info
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#
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@ -46,7 +46,6 @@ file arch/hpcarm/hpcarm/setcpsr.S
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file arch/hpcarm/hpcarm/setstack.S
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file arch/hpcarm/hpcarm/spl.S
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file arch/hpcarm/hpcarm/stubs.c
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file arch/hpcarm/hpcarm/undefined.c
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file arch/hpcarm/hpcarm/vm_machdep.c
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#
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