From 8345db18a3230947d3eeb2e7a592f44f1547beae Mon Sep 17 00:00:00 2001
From: thorpej <thorpej@NetBSD.org>
Date: Thu, 28 Mar 2002 20:44:07 +0000
Subject: [PATCH] Example gzboot config for the IQ80321.

---
 .../gzboot/IQ80321_flash_0xf0080000/Makefile  | 17 ++++
 .../gzboot/IQ80321_flash_0xf0080000/ldscript  | 82 +++++++++++++++++++
 2 files changed, 99 insertions(+)
 create mode 100644 sys/arch/evbarm/stand/gzboot/IQ80321_flash_0xf0080000/Makefile
 create mode 100644 sys/arch/evbarm/stand/gzboot/IQ80321_flash_0xf0080000/ldscript

diff --git a/sys/arch/evbarm/stand/gzboot/IQ80321_flash_0xf0080000/Makefile b/sys/arch/evbarm/stand/gzboot/IQ80321_flash_0xf0080000/Makefile
new file mode 100644
index 000000000000..52da76b06713
--- /dev/null
+++ b/sys/arch/evbarm/stand/gzboot/IQ80321_flash_0xf0080000/Makefile
@@ -0,0 +1,17 @@
+#	$NetBSD: Makefile,v 1.1 2002/03/28 20:44:07 thorpej Exp $
+
+S=	${.CURDIR}/../../../../..
+
+PLATFORM= IQ80321
+RELOC= 0xf0080000
+MAXIMAGESIZE= 2097152	# 2M
+LOADADDR= 0xa0200000
+
+CPPFLAGS+= -DCONSPEED=115200
+CPPFLAGS+= -DCONADDR=0xfe800000UL
+
+LDSCRIPT= ${.CURDIR}/ldscript
+
+SRCS+=	ns16550.c i80321_mem.c
+
+.include "${S}/arch/evbarm/stand/gzboot/Makefile.gzboot"
diff --git a/sys/arch/evbarm/stand/gzboot/IQ80321_flash_0xf0080000/ldscript b/sys/arch/evbarm/stand/gzboot/IQ80321_flash_0xf0080000/ldscript
new file mode 100644
index 000000000000..f7192e559d38
--- /dev/null
+++ b/sys/arch/evbarm/stand/gzboot/IQ80321_flash_0xf0080000/ldscript
@@ -0,0 +1,82 @@
+/*	$NetBSD: ldscript,v 1.1 2002/03/28 20:44:07 thorpej Exp $	*/
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
+	      "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(FLASH)
+MEMORY
+{
+  /* We will locate the .text section in flash, and will run directly
+     from there just long enough to relocate our .text and .data into
+     a small chunk of SDRAM starting at (SDRAM + 1M).  */
+  flash : o = 0xf0080000, l = 6M
+  sdram : o = 0xa0100000, l = 1M	/* kernel loads at 0xa0200000 */
+}
+SECTIONS
+{
+  FLASH = 0xf0080000;
+
+  /* Read-only sections, merged into text segment: */
+  __text_store = FLASH;
+  .text      :
+  AT (FLASH)
+  {
+    *(.text)
+    *(.text.*)
+    *(.stub)
+    *(.glue_7t) *(.glue_7)
+    *(.rodata) *(.rodata.*)
+  } > sdram =0
+  PROVIDE (__etext = .);
+  PROVIDE (_etext = .);
+  PROVIDE (etext = .);
+  __data_store = FLASH + SIZEOF(.text);
+  .data    :
+  AT (FLASH + SIZEOF(.text))
+  {
+    __data_start = . ;
+    *(.data)
+    *(.data.*)
+  } > sdram
+  .sdata     : 
+  AT (FLASH + SIZEOF(.text) + SIZEOF(.data))
+  {
+    *(.sdata) 
+    *(.sdata.*)
+  } > sdram
+  _edata = .;
+  PROVIDE (edata = .);
+  __bss_start = .;
+  __bss_start__ = .;
+  .sbss      :
+  {
+    PROVIDE (__sbss_start = .);
+    PROVIDE (___sbss_start = .);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.scommon)
+    PROVIDE (__sbss_end = .);
+    PROVIDE (___sbss_end = .);
+  } > sdram
+  .bss       :
+  {
+   *(.dynbss)
+   *(.bss)
+   *(.bss.*)
+   *(COMMON)
+   /* Align here to ensure that the .bss section occupies space up to
+      _end.  Align after .bss to ensure correct alignment even if the
+      .bss section disappears because there are no input sections.  */
+   . = ALIGN(32 / 8);
+  } > sdram
+  . = ALIGN(32 / 8);
+  _end = .;
+  _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
+  PROVIDE (end = .);
+  .image   (FLASH + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.sdata)) :
+  AT (FLASH + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.sdata))
+  {
+    *(.image)
+  }
+}