Dump some enums that make lint unhappy and we never really use anyway.
This commit is contained in:
parent
fb5f7652b6
commit
830be13fa2
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pte.h,v 1.6 2001/06/21 00:24:22 eeh Exp $ */
|
||||
/* $NetBSD: pte.h,v 1.7 2001/07/31 06:55:46 eeh Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1996-1999 Eduardo Horvath
|
||||
|
@ -77,6 +77,8 @@
|
|||
* we had a 64-bit compiler w/64-bit longs. Otherwise it's
|
||||
* a real pain to do this in C.
|
||||
*/
|
||||
#if 0
|
||||
/* We don't use bitfeilds anyway. */
|
||||
struct sun4u_tag_fields {
|
||||
u_int64_t tag_g:1, /* global flag */
|
||||
tag_ctxt:15, /* context for mapping */
|
||||
|
@ -109,6 +111,12 @@ struct sun4u_tte {
|
|||
union sun4u_tag tag;
|
||||
union sun4u_data data;
|
||||
};
|
||||
#else
|
||||
struct sun4u_tte {
|
||||
int64_t tag;
|
||||
int64_t data;
|
||||
};
|
||||
#endif
|
||||
typedef struct sun4u_tte pte_t;
|
||||
|
||||
/* Assembly routine to flush a mapping */
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: db_interface.c,v 1.60 2001/07/07 15:16:14 eeh Exp $ */
|
||||
/* $NetBSD: db_interface.c,v 1.61 2001/07/31 06:55:47 eeh Exp $ */
|
||||
|
||||
/*
|
||||
* Mach Operating System
|
||||
|
@ -670,14 +670,14 @@ db_dump_dtsb(addr, have_addr, count, modif)
|
|||
db_printf("TSB:\n");
|
||||
for (i=0; i<TSBENTS; i++) {
|
||||
db_printf("%4d:%4d:%08x %08x:%08x ", i,
|
||||
(int)((tsb[i].tag.tag&TSB_TAG_G)?-1:TSB_TAG_CTX(tsb[i].tag.tag)),
|
||||
(int)((i<<13)|TSB_TAG_VA(tsb[i].tag.tag)),
|
||||
(int)(tsb[i].data.data>>32), (int)tsb[i].data.data);
|
||||
(int)((tsb[i].tag&TSB_TAG_G)?-1:TSB_TAG_CTX(tsb[i].tag)),
|
||||
(int)((i<<13)|TSB_TAG_VA(tsb[i].tag)),
|
||||
(int)(tsb[i].data>>32), (int)tsb[i].data);
|
||||
i++;
|
||||
db_printf("%4d:%4d:%08x %08x:%08x\n", i,
|
||||
(int)((tsb[i].tag.tag&TSB_TAG_G)?-1:TSB_TAG_CTX(tsb[i].tag.tag)),
|
||||
(int)((i<<13)|TSB_TAG_VA(tsb[i].tag.tag)),
|
||||
(int)(tsb[i].data.data>>32), (int)tsb[i].data.data);
|
||||
(int)((tsb[i].tag&TSB_TAG_G)?-1:TSB_TAG_CTX(tsb[i].tag)),
|
||||
(int)((i<<13)|TSB_TAG_VA(tsb[i].tag)),
|
||||
(int)(tsb[i].data>>32), (int)tsb[i].data);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pmap.c,v 1.104 2001/07/24 16:50:41 wiz Exp $ */
|
||||
/* $NetBSD: pmap.c,v 1.105 2001/07/31 06:55:47 eeh Exp $ */
|
||||
#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
|
||||
#define HWREF
|
||||
/*
|
||||
|
@ -68,7 +68,7 @@
|
|||
|
||||
paddr_t cpu0paddr;/* XXXXXXXXXXXXXXXX */
|
||||
|
||||
extern int64_t asmptechk __P((union sun4u_data* pseg[], int addr)); /* DEBUG XXXXX */
|
||||
extern int64_t asmptechk __P((int64_t *pseg[], int addr)); /* DEBUG XXXXX */
|
||||
|
||||
#if 0
|
||||
static int pseg_check __P((struct pmap*, vaddr_t addr, int64_t tte, paddr_t spare));
|
||||
|
@ -1970,16 +1970,16 @@ pmap_kenter_pa(va, pa, prot)
|
|||
if (pa & (PMAP_NVC|PMAP_NC))
|
||||
enter_stats.ci ++;
|
||||
#endif
|
||||
tte.tag.tag = TSB_TAG(0,pm->pm_ctx,va);
|
||||
tte.data.data = TSB_DATA(0, PGSZ_8K, pa, pm == pmap_kernel(),
|
||||
tte.tag = TSB_TAG(0,pm->pm_ctx,va);
|
||||
tte.data = TSB_DATA(0, PGSZ_8K, pa, pm == pmap_kernel(),
|
||||
(VM_PROT_WRITE & prot),
|
||||
(!(pa & PMAP_NC)), pa & (PMAP_NVC), 1, 0);
|
||||
/* We don't track modification here. */
|
||||
if (VM_PROT_WRITE & prot) tte.data.data |= TLB_REAL_W|TLB_W; /* HWREF -- XXXX */
|
||||
tte.data.data |= TLB_TSB_LOCK; /* wired */
|
||||
ASSERT((tte.data.data & TLB_NFO) == 0);
|
||||
if (VM_PROT_WRITE & prot) tte.data |= TLB_REAL_W|TLB_W; /* HWREF -- XXXX */
|
||||
tte.data |= TLB_TSB_LOCK; /* wired */
|
||||
ASSERT((tte.data & TLB_NFO) == 0);
|
||||
pg = NULL;
|
||||
while ((i = pseg_set(pm, va, tte.data.data, pg)) == 1) {
|
||||
while ((i = pseg_set(pm, va, tte.data, pg)) == 1) {
|
||||
pg = NULL;
|
||||
if (uvm.page_init_done || !uvm_page_physget(&pg)) {
|
||||
struct vm_page *page;
|
||||
|
@ -2013,17 +2013,17 @@ pmap_kenter_pa(va, pa, prot)
|
|||
i = ptelookup_va(va);
|
||||
if( pmapdebug & PDB_ENTER )
|
||||
prom_printf("pmap_kenter_pa: va=%08x tag=%x:%08x data=%08x:%08x tsb[%d]=%08x\r\n", va,
|
||||
(int)(tte.tag.tag>>32), (int)tte.tag.tag,
|
||||
(int)(tte.data.data>>32), (int)tte.data.data,
|
||||
(int)(tte.tag>>32), (int)tte.tag,
|
||||
(int)(tte.data>>32), (int)tte.data,
|
||||
i, &tsb[i]);
|
||||
if( pmapdebug & PDB_MMU_STEAL && tsb[i].data.data ) {
|
||||
if( pmapdebug & PDB_MMU_STEAL && tsb[i].data ) {
|
||||
prom_printf("pmap_kenter_pa: evicting entry tag=%x:%08x data=%08x:%08x tsb[%d]=%08x\r\n",
|
||||
(int)(tsb[i].tag.tag>>32), (int)tsb[i].tag.tag,
|
||||
(int)(tsb[i].data.data>>32), (int)tsb[i].data.data,
|
||||
(int)(tsb[i].tag>>32), (int)tsb[i].tag,
|
||||
(int)(tsb[i].data>>32), (int)tsb[i].data,
|
||||
i, &tsb[i]);
|
||||
prom_printf("with va=%08x tag=%x:%08x data=%08x:%08x tsb[%d]=%08x\r\n", va,
|
||||
(int)(tte.tag.tag>>32), (int)tte.tag.tag,
|
||||
(int)(tte.data.data>>32), (int)tte.data.data,
|
||||
(int)(tte.tag>>32), (int)tte.tag,
|
||||
(int)(tte.data>>32), (int)tte.data,
|
||||
i, &tsb[i]);
|
||||
}
|
||||
#endif
|
||||
|
@ -2032,7 +2032,7 @@ pmap_kenter_pa(va, pa, prot)
|
|||
simple_unlock(&pm->pm_lock);
|
||||
#endif
|
||||
splx(s);
|
||||
ASSERT((tsb[i].data.data & TLB_NFO) == 0);
|
||||
ASSERT((tsb[i].data & TLB_NFO) == 0);
|
||||
/* this is correct */
|
||||
dcache_flush_page(pa);
|
||||
}
|
||||
|
@ -2103,8 +2103,8 @@ pmap_kremove(va, size)
|
|||
#endif
|
||||
|
||||
i = ptelookup_va(va);
|
||||
if (tsb[i].tag.tag > 0
|
||||
&& tsb[i].tag.tag == TSB_TAG(0,pm->pm_ctx,va))
|
||||
if (tsb[i].tag > 0
|
||||
&& tsb[i].tag == TSB_TAG(0,pm->pm_ctx,va))
|
||||
{
|
||||
/*
|
||||
* Invalidate the TSB
|
||||
|
@ -2112,7 +2112,7 @@ pmap_kremove(va, size)
|
|||
* While we can invalidate it by clearing the
|
||||
* valid bit:
|
||||
*
|
||||
* ptp->data.data_v = 0;
|
||||
* ptp->data_v = 0;
|
||||
*
|
||||
* it's faster to do store 1 doubleword.
|
||||
*/
|
||||
|
@ -2120,8 +2120,8 @@ pmap_kremove(va, size)
|
|||
if (pmapdebug & PDB_DEMAP)
|
||||
printf(" clearing TSB [%d]\n", i);
|
||||
#endif
|
||||
tsb[i].data.data = 0LL;
|
||||
ASSERT((tsb[i].data.data & TLB_NFO) == 0);
|
||||
tsb[i].data = 0LL;
|
||||
ASSERT((tsb[i].data & TLB_NFO) == 0);
|
||||
/* Flush the TLB */
|
||||
}
|
||||
#ifdef DEBUG
|
||||
|
@ -2181,11 +2181,11 @@ pmap_enter(pm, va, pa, prot, flags)
|
|||
*/
|
||||
s = splvm();
|
||||
simple_lock(&pm->pm_lock);
|
||||
if ((tte.data.data = pseg_get(pm, va))<0) {
|
||||
if ((tte.data = pseg_get(pm, va))<0) {
|
||||
simple_unlock(&pm->pm_lock);
|
||||
pmap_remove(pm, va, va+NBPG-1);
|
||||
simple_lock(&pm->pm_lock);
|
||||
tte.data.data = pseg_get(pm, va);
|
||||
tte.data = pseg_get(pm, va);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -2199,9 +2199,9 @@ pmap_enter(pm, va, pa, prot, flags)
|
|||
panic("pmap_enter: access_type exceeds prot");
|
||||
#endif
|
||||
/* If we don't have the traphandler do it, set the ref/mod bits now */
|
||||
if ((flags & VM_PROT_ALL) || (tte.data.data & TLB_ACCESS))
|
||||
if ((flags & VM_PROT_ALL) || (tte.data & TLB_ACCESS))
|
||||
pv->pv_va |= PV_REF;
|
||||
if (flags & VM_PROT_WRITE || (tte.data.data & (TLB_MODIFY)))
|
||||
if (flags & VM_PROT_WRITE || (tte.data & (TLB_MODIFY)))
|
||||
pv->pv_va |= PV_MOD;
|
||||
#ifdef DEBUG
|
||||
enter_stats.managed ++;
|
||||
|
@ -2221,13 +2221,13 @@ pmap_enter(pm, va, pa, prot, flags)
|
|||
#endif
|
||||
/*
|
||||
* Not used any more.
|
||||
tte.tag.tag = TSB_TAG(0,pm->pm_ctx,va);
|
||||
tte.tag = TSB_TAG(0,pm->pm_ctx,va);
|
||||
*/
|
||||
tte.data.data = TSB_DATA(0, size, pa, pm == pmap_kernel(),
|
||||
tte.data = TSB_DATA(0, size, pa, pm == pmap_kernel(),
|
||||
(flags & VM_PROT_WRITE),
|
||||
(!(pa & PMAP_NC)),aliased,1,(pa & PMAP_LITTLE));
|
||||
#ifdef HWREF
|
||||
if (prot & VM_PROT_WRITE) tte.data.data |= TLB_REAL_W;
|
||||
if (prot & VM_PROT_WRITE) tte.data |= TLB_REAL_W;
|
||||
#else
|
||||
/* If it needs ref accounting do nothing. */
|
||||
if (!(flags&VM_PROT_READ)) {
|
||||
|
@ -2240,14 +2240,14 @@ pmap_enter(pm, va, pa, prot, flags)
|
|||
return 0;
|
||||
}
|
||||
#endif
|
||||
if (wired) tte.data.data |= TLB_TSB_LOCK;
|
||||
ASSERT((tte.data.data & TLB_NFO) == 0);
|
||||
if (wired) tte.data |= TLB_TSB_LOCK;
|
||||
ASSERT((tte.data & TLB_NFO) == 0);
|
||||
pg = NULL;
|
||||
#ifdef NOTDEF_DEBUG
|
||||
printf("pmap_enter: inserting %x:%x at %x\n",
|
||||
(int)(tte.data.data>>32), (int)tte.data.data, (int)va);
|
||||
(int)(tte.data>>32), (int)tte.data, (int)va);
|
||||
#endif
|
||||
while (pseg_set(pm, va, tte.data.data, pg) == 1) {
|
||||
while (pseg_set(pm, va, tte.data, pg) == 1) {
|
||||
pg = NULL;
|
||||
if (uvm.page_init_done || !uvm_page_physget(&pg)) {
|
||||
struct vm_page *page;
|
||||
|
@ -2273,7 +2273,7 @@ pmap_enter(pm, va, pa, prot, flags)
|
|||
#endif
|
||||
#ifdef NOTDEF_DEBUG
|
||||
printf("pmap_enter: inserting %x:%x at %x with %x\n",
|
||||
(int)(tte.data.data>>32), (int)tte.data.data, (int)va, (int)pg);
|
||||
(int)(tte.data>>32), (int)tte.data, (int)va, (int)pg);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
@ -2285,39 +2285,39 @@ pmap_enter(pm, va, pa, prot, flags)
|
|||
#ifdef DEBUG
|
||||
if( pmapdebug & PDB_ENTER )
|
||||
prom_printf("pmap_enter: va=%08x tag=%x:%08x data=%08x:%08x tsb[%d]=%08x\r\n", va,
|
||||
(int)(tte.tag.tag>>32), (int)tte.tag.tag,
|
||||
(int)(tte.data.data>>32), (int)tte.data.data,
|
||||
(int)(tte.tag>>32), (int)tte.tag,
|
||||
(int)(tte.data>>32), (int)tte.data,
|
||||
i, &tsb[i]);
|
||||
if( pmapdebug & PDB_MMU_STEAL && tsb[i].data.data ) {
|
||||
if( pmapdebug & PDB_MMU_STEAL && tsb[i].data ) {
|
||||
prom_printf("pmap_enter: evicting entry tag=%x:%08x data=%08x:%08x tsb[%d]=%08x\r\n",
|
||||
(int)(tsb[i].tag.tag>>32), (int)tsb[i].tag.tag,
|
||||
(int)(tsb[i].data.data>>32), (int)tsb[i].data.data,
|
||||
(int)(tsb[i].tag>>32), (int)tsb[i].tag,
|
||||
(int)(tsb[i].data>>32), (int)tsb[i].data,
|
||||
i, &tsb[i]);
|
||||
prom_printf("with va=%08x tag=%x:%08x data=%08x:%08x tsb[%d]=%08x\r\n", va,
|
||||
(int)(tte.tag.tag>>32), (int)tte.tag.tag,
|
||||
(int)(tte.data.data>>32), (int)tte.data.data,
|
||||
(int)(tte.tag>>32), (int)tte.tag,
|
||||
(int)(tte.data>>32), (int)tte.data,
|
||||
i, &tsb[i]);
|
||||
}
|
||||
#endif
|
||||
if (pm->pm_ctx || pm == pmap_kernel()) {
|
||||
if (tsb[i].tag.tag > 0 &&
|
||||
tsb[i].tag.tag == TSB_TAG(0,pm->pm_ctx,va)) {
|
||||
if (tsb[i].tag > 0 &&
|
||||
tsb[i].tag == TSB_TAG(0,pm->pm_ctx,va)) {
|
||||
/*
|
||||
* Invalidate the TSB
|
||||
*
|
||||
* While we can invalidate it by clearing the
|
||||
* valid bit:
|
||||
*
|
||||
* ptp->data.data_v = 0;
|
||||
* ptp->data_v = 0;
|
||||
*
|
||||
* it's faster to do store 1 doubleword.
|
||||
*/
|
||||
tsb[i].data.data = 0LL;
|
||||
ASSERT((tsb[i].data.data & TLB_NFO) == 0);
|
||||
tsb[i].data = 0LL;
|
||||
ASSERT((tsb[i].data & TLB_NFO) == 0);
|
||||
}
|
||||
/* Force reload -- protections may be changed */
|
||||
tlb_flush_pte(va, pm->pm_ctx);
|
||||
ASSERT((tsb[i].data.data & TLB_NFO) == 0);
|
||||
ASSERT((tsb[i].data & TLB_NFO) == 0);
|
||||
}
|
||||
/* this is correct */
|
||||
dcache_flush_page(pa);
|
||||
|
@ -2396,8 +2396,8 @@ pmap_remove(pm, va, endva)
|
|||
#endif
|
||||
if (!pm->pm_ctx && pm != pmap_kernel()) continue;
|
||||
i = ptelookup_va(va);
|
||||
if (tsb[i].tag.tag > 0
|
||||
&& tsb[i].tag.tag == TSB_TAG(0,pm->pm_ctx,va))
|
||||
if (tsb[i].tag > 0
|
||||
&& tsb[i].tag == TSB_TAG(0,pm->pm_ctx,va))
|
||||
{
|
||||
/*
|
||||
* Invalidate the TSB
|
||||
|
@ -2405,7 +2405,7 @@ pmap_remove(pm, va, endva)
|
|||
* While we can invalidate it by clearing the
|
||||
* valid bit:
|
||||
*
|
||||
* ptp->data.data_v = 0;
|
||||
* ptp->data_v = 0;
|
||||
*
|
||||
* it's faster to do store 1 doubleword.
|
||||
*/
|
||||
|
@ -2413,19 +2413,19 @@ pmap_remove(pm, va, endva)
|
|||
if (pmapdebug & PDB_REMOVE)
|
||||
printf(" clearing TSB [%d]\n", i);
|
||||
#endif
|
||||
tsb[i].data.data = 0LL;
|
||||
ASSERT((tsb[i].data.data & TLB_NFO) == 0);
|
||||
tsb[i].data = 0LL;
|
||||
ASSERT((tsb[i].data & TLB_NFO) == 0);
|
||||
/* Flush the TLB */
|
||||
}
|
||||
#ifdef NOTDEF_DEBUG
|
||||
else if (pmapdebug & PDB_REMOVE) {
|
||||
printf("TSB[%d] has ctx %d va %x: ",
|
||||
i,
|
||||
TSB_TAG_CTX(tsb[i].tag.tag),
|
||||
(int)(TSB_TAG_VA(tsb[i].tag.tag)|(i<<13)));
|
||||
TSB_TAG_CTX(tsb[i].tag),
|
||||
(int)(TSB_TAG_VA(tsb[i].tag)|(i<<13)));
|
||||
printf("%08x:%08x %08x:%08x\n",
|
||||
(int)(tsb[i].tag.tag>>32), (int)tsb[i].tag.tag,
|
||||
(int)(tsb[i].data.data>>32), (int)tsb[i].data.data);
|
||||
(int)(tsb[i].tag>>32), (int)tsb[i].tag,
|
||||
(int)(tsb[i].data>>32), (int)tsb[i].data);
|
||||
}
|
||||
#endif
|
||||
#ifdef DEBUG
|
||||
|
@ -2526,10 +2526,10 @@ pmap_protect(pm, sva, eva, prot)
|
|||
|
||||
if (!pm->pm_ctx && pm != pmap_kernel()) continue;
|
||||
i = ptelookup_va(sva);
|
||||
if (tsb[i].tag.tag > 0
|
||||
&& tsb[i].tag.tag == TSB_TAG(0,pm->pm_ctx,sva)) {
|
||||
tsb[i].data.data = data;
|
||||
ASSERT((tsb[i].data.data & TLB_NFO) == 0);
|
||||
if (tsb[i].tag > 0
|
||||
&& tsb[i].tag == TSB_TAG(0,pm->pm_ctx,sva)) {
|
||||
tsb[i].data = data;
|
||||
ASSERT((tsb[i].data & TLB_NFO) == 0);
|
||||
|
||||
}
|
||||
tlb_flush_pte(sva, pm->pm_ctx);
|
||||
|
@ -2793,15 +2793,15 @@ tsb_enter(ctx, va, data)
|
|||
|
||||
i = ptelookup_va(va);
|
||||
s = splvm();
|
||||
pa = tsb[i].data.data&TLB_PA_MASK;
|
||||
pa = tsb[i].data&TLB_PA_MASK;
|
||||
/*
|
||||
* If we use fast DMMU access fault handlers to track
|
||||
* referenced and modified bits, we should save the
|
||||
* TSB entry's state here. Since we don't, we don't.
|
||||
*/
|
||||
/* Do not use global entries */
|
||||
tsb[i].tag.tag = TSB_TAG(0,ctx,va);
|
||||
tsb[i].data.data = data;
|
||||
tsb[i].tag = TSB_TAG(0,ctx,va);
|
||||
tsb[i].data = data;
|
||||
tlb_flush_pte(va, ctx); /* Force reload -- protections may be changed */
|
||||
splx(s);
|
||||
}
|
||||
|
@ -2871,8 +2871,8 @@ pmap_clear_modify(pg)
|
|||
}
|
||||
if (pv->pv_pmap->pm_ctx || pv->pv_pmap == pmap_kernel()) {
|
||||
i = ptelookup_va(pv->pv_va&PV_VAMASK);
|
||||
if (tsb[i].tag.tag == TSB_TAG(0, pv->pv_pmap->pm_ctx, pv->pv_va&PV_VAMASK))
|
||||
tsb[i].data.data = /* data */ 0;
|
||||
if (tsb[i].tag == TSB_TAG(0, pv->pv_pmap->pm_ctx, pv->pv_va&PV_VAMASK))
|
||||
tsb[i].data = /* data */ 0;
|
||||
tlb_flush_pte(pv->pv_va&PV_VAMASK,
|
||||
pv->pv_pmap->pm_ctx);
|
||||
}
|
||||
|
@ -2964,10 +2964,10 @@ pmap_clear_reference(pg)
|
|||
pv->pv_pmap == pmap_kernel()) {
|
||||
i = ptelookup_va(pv->pv_va&PV_VAMASK);
|
||||
/* Invalidate our TSB entry since ref info is in the PTE */
|
||||
if (tsb[i].tag.tag ==
|
||||
if (tsb[i].tag ==
|
||||
TSB_TAG(0,pv->pv_pmap->pm_ctx,pv->pv_va&
|
||||
PV_VAMASK))
|
||||
tsb[i].data.data = 0;
|
||||
tsb[i].data = 0;
|
||||
/*
|
||||
tlb_flush_pte(pv->pv_va&PV_VAMASK,
|
||||
pv->pv_pmap->pm_ctx);
|
||||
|
@ -3224,8 +3224,8 @@ pmap_page_protect(pg, prot)
|
|||
if (pv->pv_pmap->pm_ctx || pv->pv_pmap == pmap_kernel()) {
|
||||
i = ptelookup_va(pv->pv_va&PV_VAMASK);
|
||||
/* since we already know the va for each mapping we don't need to scan the entire TSB */
|
||||
if (tsb[i].tag.tag == TSB_TAG(0, pv->pv_pmap->pm_ctx, pv->pv_va&PV_VAMASK))
|
||||
tsb[i].data.data = /* data */ 0;
|
||||
if (tsb[i].tag == TSB_TAG(0, pv->pv_pmap->pm_ctx, pv->pv_va&PV_VAMASK))
|
||||
tsb[i].data = /* data */ 0;
|
||||
tlb_flush_pte(pv->pv_va&PV_VAMASK, pv->pv_pmap->pm_ctx);
|
||||
}
|
||||
simple_unlock(&pv->pv_pmap->pm_lock);
|
||||
|
@ -3291,8 +3291,8 @@ pmap_page_protect(pg, prot)
|
|||
/* clear the entry in the TSB */
|
||||
i = ptelookup_va(npv->pv_va&PV_VAMASK);
|
||||
/* since we already know the va for each mapping we don't need to scan the entire TSB */
|
||||
if (tsb[i].tag.tag == TSB_TAG(0, npv->pv_pmap->pm_ctx, npv->pv_va&PV_VAMASK))
|
||||
tsb[i].data.data = 0LL;
|
||||
if (tsb[i].tag == TSB_TAG(0, npv->pv_pmap->pm_ctx, npv->pv_va&PV_VAMASK))
|
||||
tsb[i].data = 0LL;
|
||||
tlb_flush_pte(npv->pv_va&PV_VAMASK, npv->pv_pmap->pm_ctx);
|
||||
}
|
||||
simple_unlock(&npv->pv_pmap->pm_lock);
|
||||
|
@ -3338,8 +3338,8 @@ pmap_page_protect(pg, prot)
|
|||
if (pv->pv_pmap->pm_ctx || pv->pv_pmap == pmap_kernel()) {
|
||||
i = ptelookup_va(pv->pv_va&PV_VAMASK);
|
||||
/* since we already know the va for each mapping we don't need to scan the entire TSB */
|
||||
if (tsb[i].tag.tag == TSB_TAG(0, pv->pv_pmap->pm_ctx, pv->pv_va&PV_VAMASK))
|
||||
tsb[i].data.data = 0LL;
|
||||
if (tsb[i].tag == TSB_TAG(0, pv->pv_pmap->pm_ctx, pv->pv_va&PV_VAMASK))
|
||||
tsb[i].data = 0LL;
|
||||
tlb_flush_pte(pv->pv_va&PV_VAMASK, pv->pv_pmap->pm_ctx);
|
||||
}
|
||||
simple_unlock(&pv->pv_pmap->pm_lock);
|
||||
|
@ -3434,8 +3434,8 @@ ctx_alloc(pm)
|
|||
#endif
|
||||
/* We gotta steal this context */
|
||||
for (i = 0; i < TSBENTS; i++) {
|
||||
if (TSB_TAG_CTX(tsb[i].tag.tag) == cnum)
|
||||
tsb[i].data.data = 0LL;
|
||||
if (TSB_TAG_CTX(tsb[i].tag) == cnum)
|
||||
tsb[i].data = 0LL;
|
||||
}
|
||||
tlb_flush_ctx(cnum);
|
||||
}
|
||||
|
@ -3757,7 +3757,7 @@ pmap_page_cache(pm, pa, mode)
|
|||
simple_unlock(&pv->pv_pmap->pm_lock);
|
||||
if (pv->pv_pmap->pm_ctx || pv->pv_pmap == pmap_kernel()) {
|
||||
i = ptelookup_va(va);
|
||||
if (tsb[i].tag.tag > 0 && tsb[i].tag.tag ==
|
||||
if (tsb[i].tag > 0 && tsb[i].tag ==
|
||||
TSB_TAG(0, pv->pv_pmap->pm_ctx, va)) {
|
||||
/*
|
||||
* Invalidate the TSB
|
||||
|
@ -3765,12 +3765,12 @@ pmap_page_cache(pm, pa, mode)
|
|||
* While we can invalidate it by clearing the
|
||||
* valid bit:
|
||||
*
|
||||
* ptp->data.data_v = 0;
|
||||
* ptp->data_v = 0;
|
||||
*
|
||||
* it's faster to do store 1 doubleword.
|
||||
*/
|
||||
tsb[i].data.data = 0LL;
|
||||
ASSERT((tsb[i].data.data & TLB_NFO) == 0);
|
||||
tsb[i].data = 0LL;
|
||||
ASSERT((tsb[i].data & TLB_NFO) == 0);
|
||||
}
|
||||
/* Force reload -- protections may be changed */
|
||||
tlb_flush_pte(va, pv->pv_pmap->pm_ctx);
|
||||
|
|
Loading…
Reference in New Issue