ANSIify. Use uint<N>_t. Drop trailing whitespace.
Same binary code is generated.
This commit is contained in:
uwe
parent
95355c05c7
commit
8247051e62
@ -1,4 +1,4 @@
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/* $NetBSD: fpu.c,v 1.24 2005/05/31 00:57:40 christos Exp $ */
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/* $NetBSD: fpu.c,v 1.25 2005/11/16 23:24:44 uwe Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -41,7 +41,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.24 2005/05/31 00:57:40 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.25 2005/11/16 23:24:44 uwe Exp $");
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#include <sys/param.h>
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#include <sys/proc.h>
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@ -72,7 +72,7 @@ fpu_dumpfpn(struct fpn *fp)
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printf("%s %c.%x %x %x %xE%d", class[fp->fp_class + 2],
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fp->fp_sign ? '-' : ' ',
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fp->fp_mant[0], fp->fp_mant[1],
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fp->fp_mant[2], fp->fp_mant[3],
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fp->fp_mant[2], fp->fp_mant[3],
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fp->fp_exp);
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}
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#endif
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@ -294,9 +294,7 @@ fpu_emulate(l, tf, fs)
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* multiply two integers this way.
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*/
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int
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fpu_execute(fe, instr)
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struct fpemu *fe;
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union instr instr;
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fpu_execute(struct fpemu *fe, union instr instr)
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{
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struct fpn *fp;
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#ifndef SUN4U
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@ -349,7 +347,7 @@ fpu_execute(fe, instr)
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#ifdef SUN4U
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/*
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* Check to see if we're dealing with a fancy cmove and handle
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* it first.
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* it first.
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*/
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if (instr.i_op3.i_op3 == IOP3_FPop2 && (opf&0xff0) != (FCMP&0xff0)) {
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switch (opf >>= 2) {
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@ -383,14 +381,14 @@ fpu_execute(fe, instr)
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cond = (curlwp->l_md.md_tf->tf_tstate>>TSTATE_CCR_SHIFT)&PSR_ICC;
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if (instr.i_fmovcc.i_cond != cond) return(0); /* success */
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rs1 = fs->fs_regs[rs2];
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goto mov;
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goto mov;
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case FMVXC >> 2:
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/* Presume we're curlwp */
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DPRINTF(FPE_INSN, ("fpu_execute: FMVXC\n"));
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cond = (curlwp->l_md.md_tf->tf_tstate>>(TSTATE_CCR_SHIFT+XCC_SHIFT))&PSR_ICC;
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if (instr.i_fmovcc.i_cond != cond) return(0); /* success */
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rs1 = fs->fs_regs[rs2];
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goto mov;
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goto mov;
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case FMVRZ >> 2:
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/* Presume we're curlwp */
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DPRINTF(FPE_INSN, ("fpu_execute: FMVRZ\n"));
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@ -398,7 +396,7 @@ fpu_execute(fe, instr)
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if (rs1 != 0 && (int64_t)curlwp->l_md.md_tf->tf_global[rs1] != 0)
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return (0); /* success */
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rs1 = fs->fs_regs[rs2];
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goto mov;
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goto mov;
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case FMVRLEZ >> 2:
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/* Presume we're curlwp */
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DPRINTF(FPE_INSN, ("fpu_execute: FMVRLEZ\n"));
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@ -406,7 +404,7 @@ fpu_execute(fe, instr)
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if (rs1 != 0 && (int64_t)curlwp->l_md.md_tf->tf_global[rs1] > 0)
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return (0); /* success */
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rs1 = fs->fs_regs[rs2];
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goto mov;
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goto mov;
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case FMVRLZ >> 2:
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/* Presume we're curlwp */
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DPRINTF(FPE_INSN, ("fpu_execute: FMVRLZ\n"));
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@ -414,7 +412,7 @@ fpu_execute(fe, instr)
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if (rs1 == 0 || (int64_t)curlwp->l_md.md_tf->tf_global[rs1] >= 0)
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return (0); /* success */
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rs1 = fs->fs_regs[rs2];
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goto mov;
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goto mov;
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case FMVRNZ >> 2:
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/* Presume we're curlwp */
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DPRINTF(FPE_INSN, ("fpu_execute: FMVRNZ\n"));
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@ -422,7 +420,7 @@ fpu_execute(fe, instr)
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if (rs1 == 0 || (int64_t)curlwp->l_md.md_tf->tf_global[rs1] == 0)
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return (0); /* success */
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rs1 = fs->fs_regs[rs2];
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goto mov;
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goto mov;
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case FMVRGZ >> 2:
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/* Presume we're curlwp */
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DPRINTF(FPE_INSN, ("fpu_execute: FMVRGZ\n"));
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@ -430,7 +428,7 @@ fpu_execute(fe, instr)
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if (rs1 == 0 || (int64_t)curlwp->l_md.md_tf->tf_global[rs1] <= 0)
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return (0); /* success */
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rs1 = fs->fs_regs[rs2];
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goto mov;
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goto mov;
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case FMVRGEZ >> 2:
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/* Presume we're curlwp */
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DPRINTF(FPE_INSN, ("fpu_execute: FMVRGEZ\n"));
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@ -438,10 +436,10 @@ fpu_execute(fe, instr)
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if (rs1 != 0 && (int64_t)curlwp->l_md.md_tf->tf_global[rs1] < 0)
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return (0); /* success */
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rs1 = fs->fs_regs[rs2];
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goto mov;
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goto mov;
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default:
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DPRINTF(FPE_INSN,
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("fpu_execute: unknown v9 FP inst %x opf %x\n",
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DPRINTF(FPE_INSN,
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("fpu_execute: unknown v9 FP inst %x opf %x\n",
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instr.i_int, opf));
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return (NOTFPU);
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}
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@ -450,7 +448,7 @@ fpu_execute(fe, instr)
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switch (opf >>= 2) {
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default:
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DPRINTF(FPE_INSN,
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DPRINTF(FPE_INSN,
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("fpu_execute: unknown basic FP inst %x opf %x\n",
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instr.i_int, opf));
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return (NOTFPU);
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@ -474,7 +472,7 @@ fpu_execute(fe, instr)
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#else /* SUN4U */
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i = 1<<(type-1);
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fs->fs_regs[rd++] = rs1;
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while (--i > 0)
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while (--i > 0)
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fs->fs_regs[rd++] = fs->fs_regs[++rs2];
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#endif /* SUN4U */
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fs->fs_fsr = fe->fe_fsr;
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_add.c,v 1.5 2003/08/07 16:29:36 agc Exp $ */
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/* $NetBSD: fpu_add.c,v 1.6 2005/11/16 23:24:44 uwe Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -47,7 +47,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.5 2003/08/07 16:29:36 agc Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.6 2005/11/16 23:24:44 uwe Exp $");
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#include <sys/types.h>
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#ifdef DIAGNOSTIC
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@ -62,8 +62,7 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_add.c,v 1.5 2003/08/07 16:29:36 agc Exp $");
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#include <sparc/fpu/fpu_extern.h>
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struct fpn *
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fpu_add(fe)
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register struct fpemu *fe;
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fpu_add(struct fpemu *fe)
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{
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register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
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register u_int r0, r1, r2, r3;
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_div.c,v 1.4 2003/08/07 16:29:37 agc Exp $ */
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/* $NetBSD: fpu_div.c,v 1.5 2005/11/16 23:24:44 uwe Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -45,7 +45,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.4 2003/08/07 16:29:37 agc Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.5 2005/11/16 23:24:44 uwe Exp $");
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#include <sys/types.h>
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@ -150,8 +150,7 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.4 2003/08/07 16:29:37 agc Exp $");
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*/
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struct fpn *
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fpu_div(fe)
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register struct fpemu *fe;
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fpu_div(struct fpemu *fe)
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{
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register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
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register u_int q, bit;
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_explode.c,v 1.11 2003/08/07 16:29:37 agc Exp $ */
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/* $NetBSD: fpu_explode.c,v 1.12 2005/11/16 23:24:44 uwe Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -46,7 +46,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.11 2003/08/07 16:29:37 agc Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.12 2005/11/16 23:24:44 uwe Exp $");
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#if defined(_KERNEL_OPT)
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#include "opt_sparc_arch.h"
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@ -86,9 +86,7 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.11 2003/08/07 16:29:37 agc Exp $")
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* int -> fpn.
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*/
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int
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fpu_itof(fp, i)
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register struct fpn *fp;
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register u_int i;
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fpu_itof(struct fpn *fp, u_int i)
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{
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if (i == 0)
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@ -113,9 +111,7 @@ fpu_itof(fp, i)
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* 64-bit int -> fpn.
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*/
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int
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fpu_xtof(fp, i)
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register struct fpn *fp;
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register u_int64_t i;
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fpu_xtof(struct fpn *fp, uint64_t i)
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{
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if (i == 0)
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@ -175,9 +171,7 @@ fpu_xtof(fp, i)
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* format: i.e., needs at most fp_mant[0] and fp_mant[1].
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*/
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int
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fpu_stof(fp, i)
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register struct fpn *fp;
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register u_int i;
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fpu_stof(struct fpn *fp, u_int i)
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{
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register int exp;
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register u_int frac, f0, f1;
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@ -195,9 +189,7 @@ fpu_stof(fp, i)
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* We assume this uses at most (96-FP_LG) bits.
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*/
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int
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fpu_dtof(fp, i, j)
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register struct fpn *fp;
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register u_int i, j;
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fpu_dtof(struct fpn *fp, u_int i, u_int j)
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{
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register int exp;
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register u_int frac, f0, f1, f2;
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@ -216,9 +208,7 @@ fpu_dtof(fp, i, j)
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* 128-bit extended -> fpn.
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*/
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int
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fpu_qtof(fp, i, j, k, l)
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register struct fpn *fp;
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register u_int i, j, k, l;
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fpu_qtof(register struct fpn *fp, u_int i, u_int j, u_int k, u_int l)
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{
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register int exp;
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register u_int frac, f0, f1, f2, f3;
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@ -244,16 +234,13 @@ fpu_qtof(fp, i, j, k, l)
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* operations are performed.)
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*/
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void
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fpu_explode(fe, fp, type, reg)
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register struct fpemu *fe;
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register struct fpn *fp;
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int type, reg;
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fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg)
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{
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register u_int s, *space;
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#ifdef SUN4U
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u_int64_t l, *xspace;
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uint64_t l, *xspace;
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xspace = (u_int64_t *)&fe->fe_fpstate->fs_regs[reg & ~1];
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xspace = (uint64_t *)&fe->fe_fpstate->fs_regs[reg & ~1];
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l = xspace[0];
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#endif /* SUN4U */
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space = &fe->fe_fpstate->fs_regs[reg];
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@ -301,10 +288,10 @@ fpu_explode(fe, fp, type, reg)
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}
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fp->fp_class = s;
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DPRINTF(FPE_REG, ("fpu_explode: %%%c%d => ", (type == FTYPE_LNG) ? 'x' :
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((type == FTYPE_INT) ? 'i' :
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((type == FTYPE_INT) ? 'i' :
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((type == FTYPE_SNG) ? 's' :
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((type == FTYPE_DBL) ? 'd' :
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((type == FTYPE_EXT) ? 'q' : '?')))),
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((type == FTYPE_EXT) ? 'q' : '?')))),
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reg));
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#ifdef DEBUG
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if (fpe_debug & FPE_REG) {
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_extern.h,v 1.7 2003/10/12 19:48:52 pk Exp $ */
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/* $NetBSD: fpu_extern.h,v 1.8 2005/11/16 23:24:44 uwe Exp $ */
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/*-
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* Copyright (c) 1995 The NetBSD Foundation, Inc.
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@ -54,50 +54,50 @@ struct fpn;
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/* fpu.c */
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#ifndef SUN4U
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int fpu_cleanup __P((struct lwp *, struct fpstate *));
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int fpu_emulate __P((struct lwp *, struct trapframe *, struct fpstate *));
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int fpu_cleanup(struct lwp *, struct fpstate *);
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int fpu_emulate(struct lwp *, struct trapframe *, struct fpstate *);
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#else /* SUN4U */
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int fpu_cleanup __P((struct lwp *, struct fpstate64 *));
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int fpu_emulate __P((struct lwp *, struct trapframe64 *, struct fpstate64 *));
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int fpu_cleanup(struct lwp *, struct fpstate64 *);
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int fpu_emulate(struct lwp *, struct trapframe64 *, struct fpstate64 *);
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#endif /* SUN4U */
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int fpu_execute __P((struct fpemu *, union instr));
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int fpu_execute(struct fpemu *, union instr);
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/* fpu_add.c */
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struct fpn *fpu_add __P((struct fpemu *));
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struct fpn *fpu_add(struct fpemu *);
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/* fpu_compare.c */
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void fpu_compare __P((struct fpemu *, int));
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void fpu_compare(struct fpemu *, int);
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/* fpu_div.c */
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struct fpn *fpu_div __P((struct fpemu *));
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struct fpn *fpu_div(struct fpemu *);
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/* fpu_explode.c */
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int fpu_itof __P((struct fpn *, u_int));
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int fpu_itof(struct fpn *, u_int);
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#ifdef SUN4U
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int fpu_xtof __P((struct fpn *, u_int64_t));
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int fpu_xtof(struct fpn *, uint64_t);
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#endif /* SUN4U */
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int fpu_stof __P((struct fpn *, u_int));
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int fpu_dtof __P((struct fpn *, u_int, u_int ));
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int fpu_qtof __P((struct fpn *, u_int, u_int , u_int , u_int ));
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void fpu_explode __P((struct fpemu *, struct fpn *, int, int ));
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int fpu_stof(struct fpn *, u_int);
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int fpu_dtof(struct fpn *, u_int, u_int );
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int fpu_qtof(struct fpn *, u_int, u_int , u_int , u_int );
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void fpu_explode(struct fpemu *, struct fpn *, int, int );
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/* fpu_implode.c */
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u_int fpu_ftoi __P((struct fpemu *, struct fpn *));
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u_int fpu_ftoi(struct fpemu *, struct fpn *);
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#ifdef SUN4U
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u_int fpu_ftox __P((struct fpemu *, struct fpn *, u_int *));
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u_int fpu_ftox(struct fpemu *, struct fpn *, u_int *);
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#endif /* SUN4U */
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u_int fpu_ftos __P((struct fpemu *, struct fpn *));
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u_int fpu_ftod __P((struct fpemu *, struct fpn *, u_int *));
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u_int fpu_ftoq __P((struct fpemu *, struct fpn *, u_int *));
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void fpu_implode __P((struct fpemu *, struct fpn *, int, u_int *));
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u_int fpu_ftos(struct fpemu *, struct fpn *);
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u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *);
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u_int fpu_ftoq(struct fpemu *, struct fpn *, u_int *);
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void fpu_implode(struct fpemu *, struct fpn *, int, u_int *);
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/* fpu_mul.c */
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struct fpn *fpu_mul __P((struct fpemu *));
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struct fpn *fpu_mul(struct fpemu *);
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/* fpu_sqrt.c */
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struct fpn *fpu_sqrt __P((struct fpemu *));
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struct fpn *fpu_sqrt(struct fpemu *);
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/* fpu_subr.c */
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int fpu_shr __P((register struct fpn *, register int));
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void fpu_norm __P((register struct fpn *));
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struct fpn *fpu_newnan __P((register struct fpemu *));
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int fpu_shr(register struct fpn *, register int);
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void fpu_norm(register struct fpn *);
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struct fpn *fpu_newnan(register struct fpemu *);
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_implode.c,v 1.12 2003/08/07 16:29:37 agc Exp $ */
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/* $NetBSD: fpu_implode.c,v 1.13 2005/11/16 23:24:44 uwe Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -46,7 +46,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.12 2003/08/07 16:29:37 agc Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.13 2005/11/16 23:24:44 uwe Exp $");
|
||||
|
||||
#if defined(_KERNEL_OPT)
|
||||
#include "opt_sparc_arch.h"
|
||||
@ -63,8 +63,8 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.12 2003/08/07 16:29:37 agc Exp $")
|
||||
#include <sparc/fpu/fpu_emu.h>
|
||||
#include <sparc/fpu/fpu_extern.h>
|
||||
|
||||
static int round __P((register struct fpemu *, register struct fpn *));
|
||||
static int toinf __P((struct fpemu *, int));
|
||||
static int round(struct fpemu *, struct fpn *);
|
||||
static int toinf(struct fpemu *, int);
|
||||
|
||||
/*
|
||||
* Round a number (algorithm from Motorola MC68882 manual, modified for
|
||||
@ -79,7 +79,7 @@ static int toinf __P((struct fpemu *, int));
|
||||
* responsibility to fix this if necessary.
|
||||
*/
|
||||
static int
|
||||
round(register struct fpemu *fe, register struct fpn *fp)
|
||||
round(struct fpemu *fe, struct fpn *fp)
|
||||
{
|
||||
register u_int m0, m1, m2, m3;
|
||||
register int gr, s;
|
||||
@ -194,9 +194,7 @@ toinf(struct fpemu *fe, int sign)
|
||||
* of the SPARC instruction set).
|
||||
*/
|
||||
u_int
|
||||
fpu_ftoi(fe, fp)
|
||||
struct fpemu *fe;
|
||||
register struct fpn *fp;
|
||||
fpu_ftoi(struct fpemu *fe, struct fpn *fp)
|
||||
{
|
||||
register u_int i;
|
||||
register int sign, exp;
|
||||
@ -244,12 +242,9 @@ fpu_ftoi(fe, fp)
|
||||
* of the SPARC instruction set).
|
||||
*/
|
||||
u_int
|
||||
fpu_ftox(fe, fp, res)
|
||||
struct fpemu *fe;
|
||||
register struct fpn *fp;
|
||||
u_int *res;
|
||||
fpu_ftox(struct fpemu *fe, struct fpn *fp, u_int *res)
|
||||
{
|
||||
register u_int64_t i;
|
||||
register uint64_t i;
|
||||
register int sign, exp;
|
||||
|
||||
sign = fp->fp_sign;
|
||||
@ -275,8 +270,8 @@ fpu_ftox(fe, fp, res)
|
||||
/* NB: the following includes exp < 0 cases */
|
||||
if (fpu_shr(fp, FP_NMANT - 1 - exp) != 0)
|
||||
fe->fe_cx |= FSR_NX;
|
||||
i = ((u_int64_t)fp->fp_mant[2]<<32)|fp->fp_mant[3];
|
||||
if (i >= ((u_int64_t)0x8000000000000000LL + sign))
|
||||
i = ((uint64_t)fp->fp_mant[2]<<32)|fp->fp_mant[3];
|
||||
if (i >= ((uint64_t)0x8000000000000000LL + sign))
|
||||
break;
|
||||
if (sign) i = -i;
|
||||
res[1] = (int)i;
|
||||
@ -296,9 +291,7 @@ fpu_ftox(fe, fp, res)
|
||||
* We assume <= 29 bits in a single-precision fraction (1.f part).
|
||||
*/
|
||||
u_int
|
||||
fpu_ftos(fe, fp)
|
||||
struct fpemu *fe;
|
||||
register struct fpn *fp;
|
||||
fpu_ftos(struct fpemu *fe, struct fpn *fp)
|
||||
{
|
||||
register u_int sign = fp->fp_sign << 31;
|
||||
register int exp;
|
||||
@ -380,10 +373,7 @@ done:
|
||||
* This code mimics fpu_ftos; see it for comments.
|
||||
*/
|
||||
u_int
|
||||
fpu_ftod(fe, fp, res)
|
||||
struct fpemu *fe;
|
||||
register struct fpn *fp;
|
||||
u_int *res;
|
||||
fpu_ftod(struct fpemu *fe, struct fpn *fp, u_int *res)
|
||||
{
|
||||
register u_int sign = fp->fp_sign << 31;
|
||||
register int exp;
|
||||
@ -441,10 +431,7 @@ done:
|
||||
* so we can avoid a small bit of work.
|
||||
*/
|
||||
u_int
|
||||
fpu_ftoq(fe, fp, res)
|
||||
struct fpemu *fe;
|
||||
register struct fpn *fp;
|
||||
u_int *res;
|
||||
fpu_ftoq(struct fpemu *fe, struct fpn *fp, u_int *res)
|
||||
{
|
||||
register u_int sign = fp->fp_sign << 31;
|
||||
register int exp;
|
||||
@ -501,11 +488,7 @@ done:
|
||||
* Implode an fpn, writing the result into the given space.
|
||||
*/
|
||||
void
|
||||
fpu_implode(fe, fp, type, space)
|
||||
struct fpemu *fe;
|
||||
register struct fpn *fp;
|
||||
int type;
|
||||
register u_int *space;
|
||||
fpu_implode(struct fpemu *fe, struct fpn *fp, int type, u_int *space)
|
||||
{
|
||||
|
||||
DPRINTF(FPE_REG, ("\n imploding: "));
|
||||
@ -541,10 +524,10 @@ fpu_implode(fe, fp, type, space)
|
||||
panic("fpu_implode");
|
||||
}
|
||||
#ifdef SUN4U
|
||||
DPRINTF(FPE_REG, ("fpu_implode: %x %x %x %x\n",
|
||||
DPRINTF(FPE_REG, ("fpu_implode: %x %x %x %x\n",
|
||||
space[0], space[1], space[2], space[3]));
|
||||
#else
|
||||
DPRINTF(FPE_REG, ("fpu_implode: %x %x\n",
|
||||
DPRINTF(FPE_REG, ("fpu_implode: %x %x\n",
|
||||
space[0], space[1]));
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: fpu_mul.c,v 1.4 2003/08/07 16:29:37 agc Exp $ */
|
||||
/* $NetBSD: fpu_mul.c,v 1.5 2005/11/16 23:24:44 uwe Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1992, 1993
|
||||
@ -45,7 +45,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.4 2003/08/07 16:29:37 agc Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.5 2005/11/16 23:24:44 uwe Exp $");
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
@ -99,8 +99,7 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_mul.c,v 1.4 2003/08/07 16:29:37 agc Exp $");
|
||||
* until we reach a nonzero word.
|
||||
*/
|
||||
struct fpn *
|
||||
fpu_mul(fe)
|
||||
register struct fpemu *fe;
|
||||
fpu_mul(struct fpemu *fe)
|
||||
{
|
||||
register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
|
||||
register u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m;
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: fpu_sqrt.c,v 1.4 2003/08/07 16:29:37 agc Exp $ */
|
||||
/* $NetBSD: fpu_sqrt.c,v 1.5 2005/11/16 23:24:44 uwe Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1992, 1993
|
||||
@ -45,7 +45,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.4 2003/08/07 16:29:37 agc Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.5 2005/11/16 23:24:44 uwe Exp $");
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
@ -186,8 +186,7 @@ __KERNEL_RCSID(0, "$NetBSD: fpu_sqrt.c,v 1.4 2003/08/07 16:29:37 agc Exp $");
|
||||
* this, so we have some justification in assuming it.
|
||||
*/
|
||||
struct fpn *
|
||||
fpu_sqrt(fe)
|
||||
struct fpemu *fe;
|
||||
fpu_sqrt(struct fpemu *fe)
|
||||
{
|
||||
register struct fpn *x = &fe->fe_f1;
|
||||
register u_int bit, q, tt;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user