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Ifdef out all the MPC601 code with PPC_OEA601. Now only arches that have the

Browse Source 
possibility of running on an MPC601, are infected with all the extra code
and nops that it added.

Also, fix compilation that I broke with the pmap code, by adding
oeacpufeat to the locores of various ppc arches.  Noted by mlelstv.
This commit is contained in:
garbled 2008-02-05 22:31:48 +00:00
parent 54cb18b2a9
commit 81953d91fb
19 changed files with 172 additions and 98 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
sys/arch/amigappc/amigappc/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.14 2005/12/11 12:16:36 christos Exp $ */
/* $NetBSD: locore.S,v 1.15 2008/02/05 22:31:48 garbled Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -64,6 +64,8 @@
.data
GLOBAL(proc0paddr)
.long 0
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
GLOBAL(ssir)
.word 0
GLOBAL(delaydivisor)
@ -89,7 +91,6 @@ openfirmware_entry:
srsave:
.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
/*
* This symbol is here for the benefit of kvm_mkdb, and is supposed to
* mark the start of kernel text.

5
sys/arch/bebox/bebox/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.15 2007/10/17 19:53:58 garbled Exp $ */
/* $NetBSD: locore.S,v 1.16 2008/02/05 22:31:48 garbled Exp $ */
/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
/*
@ -67,7 +67,10 @@ GLOBAL(endsym)
.long 0 /* end symbol table */
GLOBAL(proc0paddr)
.long 0 /* proc0 p_addr */
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
/* XXX All of this should die */
GLOBAL(intrnames)
.asciz "clock", "irq1", "irq2", "irq3"
.asciz "irq4", "irq5", "irq6", "irq7"

4
sys/arch/evbppc/ev64260/ev64260_locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: ev64260_locore.S,v 1.8 2005/12/11 12:17:12 christos Exp $ */
/* $NetBSD: ev64260_locore.S,v 1.9 2008/02/05 22:31:49 garbled Exp $ */
/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
/*
@ -68,6 +68,8 @@ GLOBAL(endsym)
.long 0 /* end symbol table */
GLOBAL(proc0paddr)
.long 0 /* proc0 p_addr */
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
/*
* File-scope for locore.S
*/

5
sys/arch/evbppc/pmppc/pmppc_locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmppc_locore.S,v 1.2 2007/10/17 19:54:19 garbled Exp $ */
/* $NetBSD: pmppc_locore.S,v 1.3 2008/02/05 22:31:49 garbled Exp $ */
/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
/*
@ -70,7 +70,8 @@ GLOBAL(endsym)
.long 0 /* end symbol table */
GLOBAL(proc0paddr)
.long 0 /* proc0 p_addr */
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
/*
* This symbol is here for the benefit of kvm_mkdb, and is supposed to
* mark the start of kernel text.

5
sys/arch/ibmnws/ibmnws/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.4 2006/05/09 18:13:57 rjs Exp $ */
/* $NetBSD: locore.S,v 1.5 2008/02/05 22:31:49 garbled Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -66,7 +66,8 @@ GLOBAL(endsym)
.long 0 /* end symbol table */
GLOBAL(proc0paddr)
.long 0 /* proc0 p_addr */
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
/*
* This symbol is here for the benefit of kvm_mkdb, and is supposed to

5
sys/arch/mvmeppc/mvmeppc/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.6 2005/12/11 12:18:20 christos Exp $ */
/* $NetBSD: locore.S,v 1.7 2008/02/05 22:31:49 garbled Exp $ */
/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
/*
@ -68,7 +68,10 @@ GLOBAL(endsym)
.long 0 /* end symbol table */
GLOBAL(proc0paddr)
.long 0 /* proc0 p_addr */
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
/* XXX All of this should die */
GLOBAL(intrnames)
.asciz "clock", "irq1", "irq2", "irq3"
.asciz "irq4", "irq5", "irq6", "irq7"

16
sys/arch/powerpc/conf/files.powerpc
View File

@ -1,9 +1,9 @@
# $NetBSD: files.powerpc,v 1.68 2008/02/05 18:10:46 garbled Exp $
# $NetBSD: files.powerpc,v 1.69 2008/02/05 22:31:49 garbled Exp $
defflag opt_altivec.h ALTIVEC K_ALTIVEC
defflag opt_openpic.h OPENPIC OPENPIC_SERIAL_MODE
defparam opt_ppcparam.h L2CR_CONFIG L3CR_CONFIG INTSTK CLOCKBASE
defflag opt_ppcarch.h PPC_OEA PPC_OEA64 PPC_OEA64_BRIDGE PPC_MPC8XX PPC_IBM4XX PPC_IBM403
defflag opt_ppcarch.h PPC_OEA PPC_OEA601 PPC_OEA64 PPC_OEA64_BRIDGE PPC_MPC8XX PPC_IBM4XX PPC_IBM403
defflag opt_pmap.h PMAPDEBUG PMAPCHECK PMAPCOUNTERS
defparam opt_pmap.h PTEGCOUNT PMAP_MEMLIMIT
@ -16,7 +16,7 @@ file arch/powerpc/powerpc/kobj_machdep.c modular
file arch/powerpc/powerpc/lock_stubs.S
file arch/powerpc/powerpc/mem.c
file arch/powerpc/powerpc/openpic.c openpic
file arch/powerpc/powerpc/pmap_subr.c ppc_oea | ppc_oea64 | ppc_oea64_bridge
file arch/powerpc/powerpc/pmap_subr.c ppc_oea | ppc_oea64 | ppc_oea64_bridge | ppc_oea601
file arch/powerpc/powerpc/powerpc_machdep.c
file arch/powerpc/powerpc/process_machdep.c
file arch/powerpc/powerpc/setfault.S
@ -45,13 +45,13 @@ file arch/powerpc/ibm4xx/copyoutstr.c ppc_ibm4xx
#
defparam opt_oea.h EXTMAP_RANGES=20
file arch/powerpc/oea/altivec.c (ppc_oea |ppc_oea64 | ppc_oea64_bridge) & altivec
file arch/powerpc/oea/cpu_subr.c ppc_oea | ppc_oea64 | ppc_oea64_bridge
file arch/powerpc/oea/oea_machdep.c ppc_oea | ppc_oea64 | ppc_oea64_bridge
file arch/powerpc/oea/pmap.c ppc_oea
file arch/powerpc/oea/cpu_subr.c ppc_oea | ppc_oea64 | ppc_oea64_bridge | ppc_oea601
file arch/powerpc/oea/oea_machdep.c ppc_oea | ppc_oea64 | ppc_oea64_bridge | ppc_oea601
file arch/powerpc/oea/pmap.c ppc_oea | ppc_oea601
file arch/powerpc/oea/pmap64.c ppc_oea64
file arch/powerpc/oea/pmap64_bridge.c ppc_oea64_bridge
file arch/powerpc/powerpc/fpu.c ppc_oea | ppc_oea64 | ppc_oea64_bridge
file arch/powerpc/powerpc/trap.c ppc_oea | ppc_oea64 | ppc_oea64_bridge
file arch/powerpc/powerpc/fpu.c ppc_oea | ppc_oea64 | ppc_oea64_bridge | ppc_oea601
file arch/powerpc/powerpc/trap.c ppc_oea | ppc_oea64 | ppc_oea64_bridge | ppc_oea601
# Binary compatibility with previous NetBSD releases (COMPAT_XX)
file arch/powerpc/powerpc/compat_13_machdep.c compat_13

4
sys/arch/powerpc/include/cpu_counter.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu_counter.h,v 1.5 2007/10/17 19:56:40 garbled Exp $ */
/* $NetBSD: cpu_counter.h,v 1.6 2008/02/05 22:31:49 garbled Exp $ */
/*-
* Copyright (c) 2000 Tsubai Masanari. All rights reserved.
@ -46,6 +46,7 @@ cpu_counter32(void)
uint32_t rv, rtcu, scratch;
__asm volatile (
#ifdef PPC_OEA601
"mfpvr %0 \n"
"srwi %0,%0,16 \n"
"cmpwi %0,%3 \n"
@ -59,6 +60,7 @@ cpu_counter32(void)
"add %1,%2,%0 \n"
"b 2f \n"
"1: \n"
#endif /* PPC_OEA601 */
#ifdef PPC_IBM403
"mftblo %1 \n"
#else

43
sys/arch/powerpc/oea/oea_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: oea_machdep.c,v 1.39 2008/01/28 18:24:21 garbled Exp $ */
/* $NetBSD: oea_machdep.c,v 1.40 2008/02/05 22:31:49 garbled Exp $ */
/*
* Copyright (C) 2002 Matt Thomas
@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.39 2008/01/28 18:24:21 garbled Exp $");
__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.40 2008/02/05 22:31:49 garbled Exp $");
#include "opt_compat_netbsd.h"
#include "opt_ddb.h"
@ -107,12 +107,14 @@ paddr_t msgbuf_paddr;
void
oea_init(void (*handler)(void))
{
extern int trapstart[], trapend[];
extern int trapcode[], trapsize[];
extern int sctrap[], scsize[];
extern int alitrap[], alisize[];
extern int dsitrap[], dsisize[];
#ifdef PPC_OEA601
extern int trapstart[], trapend[];
extern int dsi601trap[], dsi601size[];
#endif
extern int decrint[], decrsize[];
extern int tlbimiss[], tlbimsize[];
extern int tlbdlmiss[], tlbdlmsize[];
@ -198,6 +200,7 @@ oea_init(void (*handler)(void))
memcpy((void *)EXC_ALI, alitrap, size);
break;
case EXC_DSI:
#ifdef PPC_OEA601
if (cpuvers == MPC601) {
size = (size_t)dsi601size;
memcpy((void *)EXC_DSI, dsi601trap, size);
@ -205,6 +208,10 @@ oea_init(void (*handler)(void))
size = (size_t)dsisize;
memcpy((void *)EXC_DSI, dsitrap, size);
}
#else
size = (size_t)dsisize;
memcpy((void *)EXC_DSI, dsitrap, size);
#endif /* PPC_OEA601 */
break;
case EXC_DECR:
size = (size_t)decrsize;
@ -312,6 +319,7 @@ oea_init(void (*handler)(void))
}
#endif
#ifdef PPC_OEA601
/*
* If we aren't on a MPC601 processor, we need to zap any of the
* sequences we save/restore the MQ SPR into NOPs, and skip over the
@ -359,16 +367,19 @@ oea_init(void (*handler)(void))
__syncicache(ip, sizeof(*ip));
}
}
#endif /* PPC_OEA601 */
/*
* Configure a PSL user mask matching this processor.
*/
cpu_psluserset = PSL_EE | PSL_PR | PSL_ME | PSL_IR | PSL_DR | PSL_RI;
cpu_pslusermod = PSL_FP | PSL_FE0 | PSL_FE1 | PSL_LE | PSL_SE | PSL_BE;
#ifdef PPC_OEA601
if (cpuvers == MPC601) {
cpu_psluserset &= PSL_601_MASK;
cpu_pslusermod &= PSL_601_MASK;
}
#endif
#ifdef ALTIVEC
if (cpu_altivec)
cpu_pslusermod |= PSL_VEC;
@ -394,6 +405,7 @@ oea_init(void (*handler)(void))
KASSERT(curcpu() == ci);
}
#ifdef PPC_OEA601
void
mpc601_ioseg_add(paddr_t pa, register_t len)
{
@ -411,7 +423,7 @@ mpc601_ioseg_add(paddr_t pa, register_t len)
:: "r"(iosrtable[i]),
"r"(pa));
}
#endif /* PPC_OEA601 */
#if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE)
void
@ -495,7 +507,6 @@ void
oea_batinit(paddr_t pa, ...)
{
struct mem_region *allmem, *availmem, *mp;
int i;
unsigned int cpuvers;
register_t msr = mfmsr();
va_list ap;
@ -515,12 +526,15 @@ oea_batinit(paddr_t pa, ...)
* supervisor/user mode.
*/
if ((msr & (PSL_IR|PSL_DR)) == 0) {
#ifdef PPC_OEA601
if (cpuvers == MPC601) {
__asm volatile ("mtibatl 0,%0" :: "r"(0));
__asm volatile ("mtibatl 1,%0" :: "r"(0));
__asm volatile ("mtibatl 2,%0" :: "r"(0));
__asm volatile ("mtibatl 3,%0" :: "r"(0));
} else {
} else
#endif /* PPC_OEA601 */
{
__asm volatile ("mtibatu 0,%0" :: "r"(0));
__asm volatile ("mtibatu 1,%0" :: "r"(0));
__asm volatile ("mtibatu 2,%0" :: "r"(0));
@ -535,7 +549,10 @@ oea_batinit(paddr_t pa, ...)
/*
* Set up BAT to map physical memory
*/
#ifdef PPC_OEA601
if (cpuvers == MPC601) {
int i;
/*
* Set up battable to map the lowest 256 MB area.
* Map the lowest 32 MB area via BAT[0-3];
@ -559,7 +576,9 @@ oea_batinit(paddr_t pa, ...)
__asm volatile ("mtibatu 3,%1; mtibatl 3,%0"
:: "r"(battable[0x01800000 >> 23].batl),
"r"(battable[0x01800000 >> 23].batu));
} else {
} else
#endif /* PPC_OEA601 */
{
/*
* Set up BAT0 to only map the lowest 256 MB area
*/
@ -584,13 +603,16 @@ oea_batinit(paddr_t pa, ...)
* Add any I/O BATs specificed;
* use I/O segments on the BAT-starved 601.
*/
#ifdef PPC_OEA601
if (cpuvers == MPC601) {
while (pa != 0) {
register_t len = va_arg(ap, register_t);
mpc601_ioseg_add(pa, len);
pa = va_arg(ap, paddr_t);
}
} else {
} else
#endif
{
while (pa != 0) {
register_t len = va_arg(ap, register_t);
oea_iobat_add(pa, len);
@ -605,6 +627,7 @@ oea_batinit(paddr_t pa, ...)
* This is here because mem_regions() call needs bat0 set up.
*/
mem_regions(&allmem, &availmem);
#ifdef PPC_OEA601
if (cpuvers == MPC601) {
for (mp = allmem; mp->size; mp++) {
paddr_t paddr = mp->start & 0xff800000;
@ -620,7 +643,9 @@ oea_batinit(paddr_t pa, ...)
paddr += (1 << 23);
} while (paddr < end);
}
} else {
} else
#endif
{
for (mp = allmem; mp->size; mp++) {
paddr_t paddr = mp->start & 0xf0000000;
paddr_t end = mp->start + mp->size;

36
sys/arch/powerpc/oea/pmap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.54 2008/02/05 22:15:30 mlelstv Exp $ */
/* $NetBSD: pmap.c,v 1.55 2008/02/05 22:31:49 garbled Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
@ -70,7 +70,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.54 2008/02/05 22:15:30 mlelstv Exp $");
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.55 2008/02/05 22:31:49 garbled Exp $");
#define PMAP_NOOPNAMES
@ -555,10 +555,11 @@ pmap_interrupts_restore(register_t msr)
static inline u_int32_t
mfrtcltbl(void)
{
#ifdef PPC_OEA601
if ((MFPVR() >> 16) == MPC601)
return (mfrtcl() >> 7);
else
#endif
return (mftbl());
}
@ -2120,19 +2121,8 @@ pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap)
(KERNEL2_SR < 15 && VM_MAX_KERNEL_ADDRESS <= va))) {
KASSERT((va >> ADDR_SR_SHFT) != USER_SR);
#if defined (PMAP_OEA)
if ((MFPVR() >> 16) != MPC601) {
register_t batu = battable[va >> ADDR_SR_SHFT].batu;
if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) {
register_t batl =
battable[va >> ADDR_SR_SHFT].batl;
register_t mask =
(~(batu & BAT_BL) << 15) & ~0x1ffffL;
if (pap)
*pap = (batl & mask) | (va & ~mask);
PMAP_UNLOCK();
return true;
}
} else {
#ifdef PPC_OEA601
if ((MFPVR() >> 16) == MPC601) {
register_t batu = battable[va >> 23].batu;
register_t batl = battable[va >> 23].batl;
register_t sr = iosrtable[va >> ADDR_SR_SHFT];
@ -2151,6 +2141,20 @@ pmap_extract(pmap_t pm, vaddr_t va, paddr_t *pap)
PMAP_UNLOCK();
return true;
}
} else
#endif /* PPC_OEA601 */
{
register_t batu = battable[va >> ADDR_SR_SHFT].batu;
if (BAT_VALID_P(batu,0) && BAT_VA_MATCH_P(batu,va)) {
register_t batl =
battable[va >> ADDR_SR_SHFT].batl;
register_t mask =
(~(batu & BAT_BL) << 15) & ~0x1ffffL;
if (pap)
*pap = (batl & mask) | (va & ~mask);
PMAP_UNLOCK();
return true;
}
}
return false;
#elif defined (PMAP_OEA64_BRIDGE)

80
sys/arch/powerpc/powerpc/bus_space.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: bus_space.c,v 1.14 2008/02/05 18:10:48 garbled Exp $ */
/* $NetBSD: bus_space.c,v 1.15 2008/02/05 22:31:50 garbled Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.14 2008/02/05 18:10:48 garbled Exp $");
__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.15 2008/02/05 22:31:50 garbled Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -565,7 +565,19 @@ memio_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags,
pa = t->pbs_offset + bpa;
#if !defined (PPC_OEA64) && !defined(PPC_IBM4XX)
if ((mfpvr() >> 16) != MPC601) {
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601) {
/*
* Map via the MPC601's I/O segments
*/
register_t sr = iosrtable[pa >> ADDR_SR_SHFT];
if (SR601_VALID_P(sr) && ((pa >> ADDR_SR_SHFT) ==
((pa + size - 1) >> ADDR_SR_SHFT))) {
*bshp = pa;
return (0);
}
} else {
#endif /* PPC_OEA601 */
/*
* Let's try to BAT map this address if possible
*/
@ -574,19 +586,11 @@ memio_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags,
BAT_VA_MATCH_P(batu, pa + size - 1)) {
*bshp = pa;
return (0);
}
} else {
/*
* Same as above, but via the MPC601's I/O segments
*/
register_t sr = iosrtable[pa >> ADDR_SR_SHFT];
if (SR601_VALID_P(sr) && ((pa >> ADDR_SR_SHFT) ==
((pa + size - 1) >> ADDR_SR_SHFT))) {
*bshp = pa;
return (0);
}
#ifdef PPC_OEA601
}
#endif
#endif /* PPC_OEA601 */
#endif /* !defined (PPC_OEA64) && !defined(PPC_IBM4XX) */
#ifndef PPC_IBM4XX
if (extent_flags == 0) {
extent_free(t->pbs_extent, bpa, size, EX_NOWAIT);
@ -631,16 +635,8 @@ memio_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
size = _BUS_SPACE_STRIDE(t, size);
#if !defined (PPC_OEA64) && !defined (PPC_IBM4XX)
if ((mfpvr() >> 16) != MPC601) {
register_t batu = battable[va >> ADDR_SR_SHFT].batu;
if (BAT_VALID_P(batu, 0) && BAT_VA_MATCH_P(batu, va) &&
BAT_VA_MATCH_P(batu, va + size - 1)) {
pa = va;
va = 0;
} else {
pmap_extract(pmap_kernel(), va, &pa);
}
} else {
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601) {
register_t sr = iosrtable[va >> ADDR_SR_SHFT];
if (SR601_VALID_P(sr) && ((pa >> ADDR_SR_SHFT) ==
((pa + size - 1) >> ADDR_SR_SHFT))) {
@ -649,10 +645,22 @@ memio_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
} else {
pmap_extract(pmap_kernel(), va, &pa);
}
} else {
#endif /* PPC_OEA601 */
register_t batu = battable[va >> ADDR_SR_SHFT].batu;
if (BAT_VALID_P(batu, 0) && BAT_VA_MATCH_P(batu, va) &&
BAT_VA_MATCH_P(batu, va + size - 1)) {
pa = va;
va = 0;
} else {
pmap_extract(pmap_kernel(), va, &pa);
}
#ifdef PPC_OEA601
}
#endif /* PPC_OEA601 */
#else
pmap_extract(pmap_kernel(), va, &pa);
#endif
#endif /* !defined (PPC_OEA64) && !defined (PPC_IBM4XX) */
bpa = pa - t->pbs_offset;
if (extent_free(t->pbs_extent, bpa, size, EX_NOWAIT | extent_flags)) {
@ -699,22 +707,26 @@ memio_alloc(bus_space_tag_t t, bus_addr_t rstart, bus_addr_t rend,
*bpap = bpa;
pa = t->pbs_offset + bpa;
#if !defined (PPC_OEA64) && !defined (PPC_IBM4XX)
if ((mfpvr() >> 16) != MPC601) {
register_t batu = battable[pa >> ADDR_SR_SHFT].batu;
if (BAT_VALID_P(batu, 0) && BAT_VA_MATCH_P(batu, pa) &&
BAT_VA_MATCH_P(batu, pa + size - 1)) {
*bshp = pa;
return (0);
}
} else {
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601) {
register_t sr = iosrtable[pa >> ADDR_SR_SHFT];
if (SR601_VALID_P(sr) && SR601_PA_MATCH_P(sr, pa) &&
SR601_PA_MATCH_P(sr, pa + size - 1)) {
*bshp = pa;
return (0);
}
} else {
#endif /* PPC_OEA601 */
register_t batu = battable[pa >> ADDR_SR_SHFT].batu;
if (BAT_VALID_P(batu, 0) && BAT_VA_MATCH_P(batu, pa) &&
BAT_VA_MATCH_P(batu, pa + size - 1)) {
*bshp = pa;
return (0);
}
#ifdef PPC_OEA601
}
#endif
#endif /* PPC_OEA601 */
#endif /* !defined (PPC_OEA64) && !defined (PPC_IBM4XX) */
*bshp = (bus_space_handle_t) mapiodev(pa, size);
if (*bshp == 0) {
extent_free(t->pbs_extent, bpa, size, EX_NOWAIT | extent_flags);

21
sys/arch/powerpc/powerpc/clock.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: clock.c,v 1.5 2008/01/08 12:05:49 joerg Exp $ */
/* $NetBSD: clock.c,v 1.6 2008/02/05 22:31:50 garbled Exp $ */
/* $OpenBSD: clock.c,v 1.3 1997/10/13 13:42:53 pefo Exp $ */
/*
@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.5 2008/01/08 12:05:49 joerg Exp $");
__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.6 2008/02/05 22:31:50 garbled Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@ -76,10 +76,12 @@ cpu_initclocks(void)
ticks_per_intr = ticks_per_sec / hz;
cpu_timebase = ticks_per_sec;
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601)
__asm volatile
("mfspr %0,%1" : "=r"(ci->ci_lasttb) : "n"(SPR_RTCL_R));
else
#endif
__asm volatile ("mftb %0" : "=r"(ci->ci_lasttb));
__asm volatile ("mtdec %0" :: "r"(ticks_per_intr));
init_powerpc_tc();
@ -140,12 +142,14 @@ decr_intr(struct clockframe *frame)
* lasttb is used during microtime. Set it to the virtual
* start of this tick interval.
*/
if ((mfpvr() >> 16) == MPC601) {
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601)
__asm volatile
("mfspr %0,%1" : "=r"(tb) : "n"(SPR_RTCL_R));
} else {
else
#endif
__asm volatile ("mftb %0" : "=r"(tb));
}
ci->ci_lasttb = tb + ticks - ticks_per_intr;
/*
@ -176,6 +180,7 @@ delay(unsigned int n)
u_quad_t tb;
u_long tbh, tbl, scratch;
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601) {
u_int32_t rtc[2];
@ -194,7 +199,9 @@ delay(unsigned int n)
: "=&r"(scratch)
: "r"(rtc[0]), "r"(rtc[1]), "n"(SPR_RTCU_R), "n"(SPR_RTCL_R)
: "cr0");
} else {
} else
#endif
{
tb = mftb();
tb += (n * 1000 + ns_per_tick - 1) / ns_per_tick;
tbh = tb >> 32;
@ -214,9 +221,11 @@ get_powerpc_timecount(struct timecounter *tc)
__asm volatile ("mfmsr %0; andi. %1,%0,%2; mtmsr %1"
: "=r"(msr), "=r"(scratch) : "K"((u_short)~PSL_EE));
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601)
__asm volatile ("mfspr %0,%1" : "=r"(tb) : "n"(SPR_RTCL_R));
else
#endif
__asm volatile ("mftb %0" : "=r"(tb));
mtmsr(msr);

8
sys/arch/powerpc/powerpc/db_trace.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: db_trace.c,v 1.46 2007/02/22 16:57:57 thorpej Exp $ */
/* $NetBSD: db_trace.c,v 1.47 2008/02/05 22:31:50 garbled Exp $ */
/* $OpenBSD: db_trace.c,v 1.3 1997/03/21 02:10:48 niklas Exp $ */
/*
@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.46 2007/02/22 16:57:57 thorpej Exp $");
__KERNEL_RCSID(0, "$NetBSD: db_trace.c,v 1.47 2008/02/05 22:31:50 garbled Exp $");
#include "opt_ppcarch.h"
@ -250,9 +250,11 @@ db_stack_trace_print(db_expr_t addr, bool have_addr, db_expr_t count,
#ifdef PPC_OEA
if (tf->exc == EXC_DSI)
(*pr)(" dsisr=%#x", tf->dsisr);
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601)
(*pr)(" mq=%#x", tf->tf_xtra[TF_MQ]);
#endif
#endif /* PPC_OEA601 */
#endif /* PPC_OEA */
#ifdef PPC_IBM4XX
if (tf->exc == EXC_DSI)
(*pr)(" dear=%#x", tf->dar);

8
sys/arch/powerpc/powerpc/kgdb_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: kgdb_machdep.c,v 1.19 2008/02/05 18:10:48 garbled Exp $ */
/* $NetBSD: kgdb_machdep.c,v 1.20 2008/02/05 22:31:50 garbled Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: kgdb_machdep.c,v 1.19 2008/02/05 18:10:48 garbled Exp $");
__KERNEL_RCSID(0, "$NetBSD: kgdb_machdep.c,v 1.20 2008/02/05 22:31:50 garbled Exp $");
#include "opt_ddb.h"
@ -78,6 +78,7 @@ kgdb_acc(vaddr_t va, size_t len)
#if !defined (PPC_OEA64) && !defined (PPC_IBM4XX)
/* Now check battable registers */
#ifdef PPC_OEA601
if ((mfpvr() >> 16) == MPC601) {
__asm volatile ("mfibatl %0,0" : "=r"(batl));
__asm volatile ("mfibatu %0,0" : "=r"(batu));
@ -100,6 +101,7 @@ kgdb_acc(vaddr_t va, size_t len)
BAT601_VA_MATCH_P(batu,batl,va))
return 1;
} else {
#endif /* PPC_OEA601 */
__asm volatile ("mfdbatu %0,0" : "=r"(batu));
if (BAT_VALID_P(batu,msr) &&
BAT_VA_MATCH_P(batu,va) &&
@ -123,7 +125,9 @@ kgdb_acc(vaddr_t va, size_t len)
BAT_VA_MATCH_P(batu,va) &&
(batu & BAT_PP) != BAT_PP_NONE) {
return 1;
#ifdef PPC_OEA601
}
#endif
}
#endif /* !defined (PPC_OEA64) && !defined (PPC_IBM4XX) */

8
sys/arch/powerpc/powerpc/trap_subr.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap_subr.S,v 1.61 2008/02/05 18:10:49 garbled Exp $ */
/* $NetBSD: trap_subr.S,v 1.62 2008/02/05 22:31:50 garbled Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@ -138,7 +138,7 @@
* Save/restore MPC601 MQ register.
* Note: oea_init() relies on this instruction sequence.
*/
#if !defined(PPC_OEA64)
#if defined(PPC_OEA601)
#define SAVE_MQ(tf,b) \
mfspr b,SPR_MQ; \
streg b,(FRAME_MQ+(2*SZREG))(tf);
@ -264,7 +264,7 @@ _C_LABEL(dsitrap):
bla disitrap
_C_LABEL(dsisize) = .-_C_LABEL(dsitrap)
#if !defined(PPC_OEA64)
#if defined(PPC_OEA601)
/*
* Dedicated MPC601 version of the above.
* Considers different BAT format and combined implementation
@ -325,7 +325,7 @@ _C_LABEL(dsi601trap):
mtsprg1 %r1
bla disitrap
_C_LABEL(dsi601size) = .-_C_LABEL(dsi601trap)
#endif /* !defined(PPC_OEA64) */
#endif /* defined(PPC_OEA601) */
/*
* This one for the external interrupt handler.

3
sys/arch/prep/conf/std.prep
View File

@ -1,4 +1,4 @@
# $NetBSD: std.prep,v 1.11 2006/05/10 17:28:41 garbled Exp $
# $NetBSD: std.prep,v 1.12 2008/02/05 22:31:50 garbled Exp $
#
# standard, required NetBSD/prep 'options'
@ -6,6 +6,7 @@ machine prep powerpc
include "conf/std" # MI standard options
options PPC_OEA
options PPC_OEA601
makeoptions PPCDIR="oea" # Tell Makefile.powerpc what dir to use
options EXEC_SCRIPT # exec #! scripts

4
sys/arch/prep/prep/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.9 2006/05/08 17:08:34 garbled Exp $ */
/* $NetBSD: locore.S,v 1.10 2008/02/05 22:31:50 garbled Exp $ */
/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
/*
@ -79,6 +79,8 @@ GLOBAL(endsym)
.long 0 /* end symbol table */
GLOBAL(proc0paddr)
.long 0 /* proc0 p_addr */
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
/*
* This symbol is here for the benefit of kvm_mkdb, and is supposed to

5
sys/arch/rs6000/rs6000/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.1 2007/12/17 19:11:58 garbled Exp $ */
/* $NetBSD: locore.S,v 1.2 2008/02/05 22:31:50 garbled Exp $ */
/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
/*
@ -83,7 +83,8 @@ GLOBAL(endsym)
.long 0 /* end symbol table */
GLOBAL(proc0paddr)
.long 0 /* proc0 p_addr */
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
/*
* This symbol is here for the benefit of kvm_mkdb, and is supposed to
* mark the start of kernel text.

5
sys/arch/sandpoint/sandpoint/locore.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.11 2007/10/17 19:57:00 garbled Exp $ */
/* $NetBSD: locore.S,v 1.12 2008/02/05 22:31:51 garbled Exp $ */
/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
/*
@ -69,7 +69,8 @@ GLOBAL(endsym)
.long 0 /* end symbol table */
GLOBAL(proc0paddr)
.long 0 /* proc0 p_addr */
GLOBAL(oeacpufeat)
.long 0 /* cpu features */
/*
* This symbol is here for the benefit of kvm_mkdb, and is supposed to
* mark the start of kernel text.