If we get a TX interrupt with no packets buffered, ignore it. This can occur
if the chip is reset while transmitting. XXX This occurs at boot time because the SIOCADDMULTI always resets the interface when adding the `all hosts groups' -- usually while the ARP packet is being transmitted. All drivers should be fixed to not reset the interface when changing the multicast filter, if possible.
This commit is contained in:
mycroft
parent
b8974fbf40
commit
8146c925da
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@ -1,4 +1,4 @@
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/* $NetBSD: dp8390.c,v 1.13 1998/07/05 06:49:11 jonathan Exp $ */
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/* $NetBSD: dp8390.c,v 1.14 1998/11/12 13:18:26 mycroft Exp $ */
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/*
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* Device driver for National Semiconductor DS8390/WD83C690 based ethernet
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@ -305,12 +305,6 @@ dp8390_init(sc)
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NIC_PUT(regt, regh, ED_P0_PSTART, sc->rec_page_start);
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NIC_PUT(regt, regh, ED_P0_PSTOP, sc->rec_page_stop);
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/*
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* Clear all interrupts. A '1' in each bit position clears the
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* corresponding flag.
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*/
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NIC_PUT(regt, regh, ED_P0_ISR, 0xff);
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/*
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* Enable the following interrupts: receive/transmit complete,
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* receive/transmit error, and Receiver OverWrite.
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@ -321,6 +315,12 @@ dp8390_init(sc)
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ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE |
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ED_IMR_OVWE);
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/*
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* Clear all interrupts. A '1' in each bit position clears the
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* corresponding flag.
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*/
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NIC_PUT(regt, regh, ED_P0_ISR, 0xff);
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/* Program command register for page 1. */
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NIC_PUT(regt, regh, ED_P0_CR,
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sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
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@ -346,6 +346,7 @@ dp8390_init(sc)
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NIC_PUT(regt, regh, ED_P1_CR,
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sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STP);
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/* Accept broadcast and multicast packets by default. */
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i = ED_RCR_AB | ED_RCR_AM;
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if (ifp->if_flags & IFF_PROMISC) {
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/*
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@ -387,6 +388,15 @@ dp8390_xmit(sc)
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struct ifnet *ifp = &sc->sc_ec.ec_if;
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u_short len;
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#ifdef DIAGNOSTIC
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if ((sc->txb_next_tx + sc->txb_inuse) % sc->txb_cnt != sc->txb_new)
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panic("dp8390_xmit: desync, next_tx=%d inuse=%d cnt=%d new=%d",
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sc->txb_next_tx, sc->txb_inuse, sc->txb_cnt, sc->txb_new);
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if (sc->txb_inuse == 0)
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panic("dp8390_xmit: no packets to xmit\n");
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#endif
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len = sc->txb_len[sc->txb_next_tx];
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/* Set NIC for page 0 register access. */
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@ -406,8 +416,7 @@ dp8390_xmit(sc)
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sc->cr_proto | ED_CR_PAGE_0 | ED_CR_TXP | ED_CR_STA);
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/* Point to next transmit buffer slot and wrap if necessary. */
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sc->txb_next_tx++;
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if (sc->txb_next_tx == sc->txb_cnt)
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if (++sc->txb_next_tx == sc->txb_cnt)
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sc->txb_next_tx = 0;
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/* Set a timer just in case we never hear from the board again. */
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@ -468,15 +477,13 @@ outloop:
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m_freem(m0);
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sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN);
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/* Start the first packet transmitting. */
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if (sc->txb_inuse == 0)
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dp8390_xmit(sc);
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/* Point to next buffer slot and wrap if necessary. */
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if (++sc->txb_new == sc->txb_cnt)
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sc->txb_new = 0;
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sc->txb_inuse++;
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/* Start the first packet transmitting. */
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if (sc->txb_inuse++ == 0)
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dp8390_xmit(sc);
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/* Loop back to the top to possibly buffer more packets. */
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goto outloop;
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@ -634,10 +641,15 @@ dp8390_intr(arg)
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/*
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* Handle transmitter interrupts. Handle these first because
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* the receiver will reset the board under some conditions.
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*
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* If the chip was reset while a packet was transmitting, it
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* may still deliver a TX interrupt. In this case, just ignore
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* the interrupt.
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*/
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if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
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u_char collisions = NIC_GET(regt, regh,
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ED_P0_NCR) & 0x0f;
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if (isr & (ED_ISR_PTX | ED_ISR_TXE) &&
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sc->txb_inuse != 0) {
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u_char collisions =
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NIC_GET(regt, regh, ED_P0_NCR) & 0x0f;
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/*
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* Check for transmit error. If a TX completed with an
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@ -648,7 +660,6 @@ dp8390_intr(arg)
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* course, with UDP we're screwed, but this is expected
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* when a network is heavily loaded.
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*/
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(void)NIC_GET(regt, regh, ED_P0_TSR);
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if (isr & ED_ISR_TXE) {
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/*
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* Excessive collisions (16).
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@ -666,6 +677,15 @@ dp8390_intr(arg)
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/* Update output errors counter. */
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++ifp->if_oerrors;
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} else {
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/*
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* Throw away the non-error status bits.
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*
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* XXX
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* It may be useful to detect loss of carrier
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* and late collisions here.
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*/
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(void)NIC_GET(regt, regh, ED_P0_TSR);
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/*
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* Update total number of successfully
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* transmitted packets.
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@ -673,9 +693,6 @@ dp8390_intr(arg)
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++ifp->if_opackets;
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}
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/* Done with the buffer. */
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sc->txb_inuse--;
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/* Clear watchdog timer. */
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ifp->if_timer = 0;
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ifp->if_flags &= ~IFF_OACTIVE;
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@ -693,7 +710,7 @@ dp8390_intr(arg)
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* If data is ready to transmit, start it transmitting,
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* otherwise defer until after handling receiver.
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*/
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if (sc->txb_inuse > 0)
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if (--sc->txb_inuse != 0)
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dp8390_xmit(sc);
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}
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