Updating to be like i386 version.
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phil
parent
6664ae1ddd
commit
8142065452
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@ -1,4 +1,4 @@
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/* $NetBSD: endian.h,v 1.7 1994/10/26 08:24:25 cgd Exp $ */
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/* $NetBSD: endian.h,v 1.8 1995/06/18 07:13:46 phil Exp $ */
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/*
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* Copyright (c) 1987, 1991 Regents of the University of California.
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@ -35,8 +35,8 @@
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* @(#)endian.h 7.8 (Berkeley) 4/3/91
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*/
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#ifndef _MACHINE_ENDIAN_H_
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#define _MACHINE_ENDIAN_H_
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#ifndef _PC532_ENDIAN_H_
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#define _PC532_ENDIAN_H_
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/*
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* Define the order of 32-bit words in 64-bit words.
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@ -67,20 +67,45 @@ __END_DECLS
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#ifdef __GNUC__
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#define __byte_swap_long(x) \
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#define __byte_swap_long_variable(x) \
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({ register unsigned long __x = (x); \
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__asm ("rotw 8,%1; rotd 16,%1; rotw 8,%1" \
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: "=r" (__x) \
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: "0" (__x)); \
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__x; })
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#define __byte_swap_word(x) \
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#define __byte_swap_word_variable(x) \
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({ register unsigned short __x = (x); \
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__asm ("rotw 8,%1" \
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: "=r" (__x) \
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: "0" (__x)); \
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__x; })
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#ifdef __OPTIMIZE__
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#define __byte_swap_long_constant(x) \
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((((x) & 0xff000000) >> 24) | \
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(((x) & 0x00ff0000) >> 8) | \
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(((x) & 0x0000ff00) << 8) | \
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(((x) & 0x000000ff) << 24))
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#define __byte_swap_word_constant(x) \
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((((x) & 0xff00) >> 8) | \
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(((x) & 0x00ff) << 8))
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#define __byte_swap_long(x) \
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(__builtin_constant_p((x)) ? \
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__byte_swap_long_constant(x) : __byte_swap_long_variable(x))
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#define __byte_swap_word(x) \
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(__builtin_constant_p((x)) ? \
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__byte_swap_word_constant(x) : __byte_swap_word_variable(x))
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#else /* __OPTIMIZE__ */
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#define __byte_swap_long(x) __byte_swap_long_variable(x)
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#define __byte_swap_word(x) __byte_swap_word_variable(x)
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#endif /* __OPTIMIZE__ */
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#define ntohl(x) __byte_swap_long(x)
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#define ntohs(x) __byte_swap_word(x)
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#define htonl(x) __byte_swap_long(x)
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@ -99,4 +124,4 @@ __END_DECLS
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#endif /* _POSIX_SOURCE */
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#endif /* _MACHINE_ENDIAN_H_ */
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#endif /* _PC532_ENDIAN_H_ */
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@ -1,4 +1,4 @@
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/* $NetBSD: icu.h,v 1.3 1995/05/16 07:30:41 phil Exp $ */
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/* $NetBSD: icu.h,v 1.4 1995/06/18 07:13:48 phil Exp $ */
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/*
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* Copyright (c) 1993 Philip A. Nelson.
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@ -35,6 +35,9 @@
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/* icu.h: defines for use with the ns32532 icu. */
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#ifndef _MACHINE_ICU_H_
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#define _MACHINE_ICU_H_
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/* We don't use vector interrupts, but make it right anyway */
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#define VEC_ICU 0x10
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@ -68,19 +71,30 @@
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#define LCCV 28
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#define HCCV 30
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/* Byte and Word access to ICU registers
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*/
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#define ICUB(n) *((unsigned char *)(ICU_ADR + n))
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#define ICUW(n) *((unsigned short *)(ICU_ADR + n))
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#ifndef LOCORE
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/* Interrupt trigger modes
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*/
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enum {HIGH_LEVEL, LOW_LEVEL, RAISING_EDGE, FALLING_EDGE} int_modes;
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#endif /* !LOCORE */
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/* Hardware interrupt request lines.
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*/
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#define IR_CLK 2 /* highest priority */
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#define IR_SCSI0 5 /* Adaptec 6250 */
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#define IR_SCSI1 4 /* NCR DP8490 */
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#define IR_TTY0 13
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#define IR_TTY0RDY 12
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#define IR_TTY1 11
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#define IR_TTY1RDY 10
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#define IR_TTY2 9
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#define IR_TTY2RDY 8
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#define IR_TTY3 7
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/* SCSI controllers */
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#define AIC6250 0
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#define DP8490 1
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#define IR_TTY3RDY 6
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/* edge polarity
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* 0 0 falling edge
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@ -94,3 +108,27 @@
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#define ints_off bicpsrw PSR_I
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#define ints_on bispsrw PSR_I
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/* SCSI controllers */
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#define AIC6250 0
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#define DP8490 1
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#define ICU_SCSI_BIT 0x80
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#ifndef LOCORE
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/*
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* Select a SCSI controller.
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*/
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static __inline int
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scsi_select_ctlr(int ctlr)
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{
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int old;
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old = (ICUB(PDAT) & ICU_SCSI_BIT) == 0;
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if (ctlr == DP8490)
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ICUB(PDAT) &= ~ICU_SCSI_BIT; /* select = 0 for 8490 */
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else
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ICUB(PDAT) |= ICU_SCSI_BIT; /* select = 1 for AIC6250 */
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return(old);
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}
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#endif /* !LOCORE */
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#endif /* _MACHINE_ICU_H_ */
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@ -1,4 +1,4 @@
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/* $NetBSD: psl.h,v 1.7 1995/05/16 07:30:42 phil Exp $ */
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/* $NetBSD: psl.h,v 1.8 1995/06/18 07:13:50 phil Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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@ -69,9 +69,6 @@
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#ifdef _KERNEL
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#include <machine/icu.h>
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enum {HIGH_LEVEL, LOW_LEVEL, RAISING_EDGE, FALLING_EDGE} int_modes;
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#define ICU(n) *((unsigned short *)(ICU_ADR + n))
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struct iv {
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void (*iv_vec)();
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void *iv_arg;
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@ -104,13 +101,13 @@ extern struct iv ivt[];
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#define intr_disable(ir) do { \
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di(); \
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ICU(IMSK) = Cur_pl | (idisabled |= (1 << ir)); \
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ICUW(IMSK) = Cur_pl | (idisabled |= (1 << ir)); \
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ei(); \
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} while(0)
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#define intr_enable(ir) do { \
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di(); \
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ICU(IMSK) = Cur_pl | (idisabled &= ~(1 << ir)); \
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ICUW(IMSK) = Cur_pl | (idisabled &= ~(1 << ir)); \
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ei(); \
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} while(0)
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@ -124,7 +121,7 @@ splraise(register int ncpl)
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di();
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ocpl = Cur_pl;
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ncpl |= ocpl;
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ICU(IMSK) = ncpl | idisabled;
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ICUW(IMSK) = ncpl | idisabled;
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Cur_pl = ncpl;
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ei();
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return(ocpl);
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@ -146,7 +143,7 @@ splx(register int ncpl)
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register int ocpl;
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di();
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ocpl = Cur_pl;
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ICU(IMSK) = ncpl | idisabled;
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ICUW(IMSK) = ncpl | idisabled;
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Cur_pl = ncpl;
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ei();
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if (ncpl == imask[IPL_ZERO])
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