Don't use saved EREG registers because sljit 0.91 can generate
bogus code on amd64. The A and X registers are saved on the stack. The most recent version of sljit fixes bogus code generation but it's not backward compatible with sljit 0.91.
This commit is contained in:
alnsn
parent
23f4f87d63
commit
80a2991627
131
sys/net/bpfjit.c
131
sys/net/bpfjit.c
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@ -1,4 +1,4 @@
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/* $NetBSD: bpfjit.c,v 1.31 2014/07/24 22:54:38 alnsn Exp $ */
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/* $NetBSD: bpfjit.c,v 1.32 2014/07/26 11:23:46 alnsn Exp $ */
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/*-
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* Copyright (c) 2011-2014 Alexander Nasonov.
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@ -31,9 +31,9 @@
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#include <sys/cdefs.h>
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#ifdef _KERNEL
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__KERNEL_RCSID(0, "$NetBSD: bpfjit.c,v 1.31 2014/07/24 22:54:38 alnsn Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bpfjit.c,v 1.32 2014/07/26 11:23:46 alnsn Exp $");
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#else
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__RCSID("$NetBSD: bpfjit.c,v 1.31 2014/07/24 22:54:38 alnsn Exp $");
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__RCSID("$NetBSD: bpfjit.c,v 1.32 2014/07/26 11:23:46 alnsn Exp $");
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#endif
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#include <sys/types.h>
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@ -89,12 +89,11 @@ __RCSID("$NetBSD: bpfjit.c,v 1.31 2014/07/24 22:54:38 alnsn Exp $");
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#define BJ_BUF SLJIT_SAVED_REG1
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//#define BJ_ARGS SLJIT_SAVED_REG2
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#define BJ_BUFLEN SLJIT_SAVED_REG3
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#define BJ_XREG SLJIT_SAVED_EREG1
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#define BJ_ASAVE SLJIT_SAVED_EREG2
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#define BJ_AREG SLJIT_SCRATCH_REG1
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#define BJ_TMP1REG SLJIT_SCRATCH_REG2
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#define BJ_TMP2REG SLJIT_SCRATCH_REG3
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#define BJ_TMP3REG SLJIT_TEMPORARY_EREG1
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#define BJ_XREG SLJIT_TEMPORARY_EREG1
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#define BJ_TMP3REG SLJIT_TEMPORARY_EREG2
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#ifdef _KERNEL
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#define MAX_MEMWORDS BPF_MAX_MEMWORDS
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@ -136,6 +135,7 @@ struct bpfjit_stack
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{
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bpf_ctx_t *ctx;
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uint32_t *extmem; /* pointer to external memory store */
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uint32_t reg; /* saved A or X register */
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#ifdef _KERNEL
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int err; /* 3rd argument for m_xword/m_xhalf/m_xbyte function call */
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#endif
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@ -259,8 +259,16 @@ nscratches(bpfjit_hint_t hints)
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if (hints & BJ_HINT_COP)
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rv = 3; /* calls copfunc with three arguments */
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if (hints & BJ_HINT_XREG)
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rv = 4; /* uses BJ_XREG */
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#ifdef _KERNEL
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if (hints & BJ_HINT_LDX)
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rv = 5; /* uses BJ_TMP3REG */
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#endif
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if (hints & BJ_HINT_COPX)
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rv = 4; /* uses BJ_TMP3REG */
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rv = 5; /* uses BJ_TMP3REG */
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return rv;
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}
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@ -274,14 +282,6 @@ nsaveds(bpfjit_hint_t hints)
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{
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sljit_si rv = 3;
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if (hints & BJ_HINT_XREG)
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rv = 4; /* uses BJ_XREG */
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#ifdef _KERNEL
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if (hints & BJ_HINT_LDX)
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rv = 5; /* uses BJ_ASAVE */
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#endif
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return rv;
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}
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@ -528,21 +528,30 @@ emit_read32(struct sljit_compiler *compiler, sljit_si src, uint32_t k)
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* BPF_LDX+BPF_B+BPF_MSH X <- 4*(P[k:1]&0xf)
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*/
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static int
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emit_xcall(struct sljit_compiler *compiler, const struct bpf_insn *pc,
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int dst, struct sljit_jump ***ret0, size_t *ret0_size, size_t *ret0_maxsize,
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emit_xcall(struct sljit_compiler *compiler, bpfjit_hint_t hints,
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const struct bpf_insn *pc, int dst, struct sljit_jump ***ret0,
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size_t *ret0_size, size_t *ret0_maxsize,
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uint32_t (*fn)(const struct mbuf *, uint32_t, int *))
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{
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#if BJ_XREG == SLJIT_RETURN_REG || \
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BJ_XREG == SLJIT_SCRATCH_REG1 || \
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BJ_XREG == SLJIT_SCRATCH_REG2 || \
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BJ_XREG == SLJIT_SCRATCH_REG3
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#error "Not supported assignment of registers."
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#endif
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struct sljit_jump *jump;
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sljit_si save_reg;
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int status;
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BJ_ASSERT(dst != BJ_ASAVE);
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save_reg = (BPF_CLASS(pc->code) == BPF_LDX) ? BJ_AREG : BJ_XREG;
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if (BPF_CLASS(pc->code) == BPF_LDX) {
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/* save A */
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if (save_reg == BJ_AREG || (hints & BJ_HINT_XREG)) {
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/* save A or X */
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status = sljit_emit_op1(compiler,
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SLJIT_MOV,
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BJ_ASAVE, 0,
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BJ_AREG, 0);
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SLJIT_MOV_UI, /* uint32_t destination */
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SLJIT_MEM1(SLJIT_LOCALS_REG),
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offsetof(struct bpfjit_stack, reg),
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save_reg, 0);
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if (status != SLJIT_SUCCESS)
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return status;
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}
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@ -634,12 +643,13 @@ emit_xcall(struct sljit_compiler *compiler, const struct bpf_insn *pc,
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if (!append_jump(jump, ret0, ret0_size, ret0_maxsize))
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return SLJIT_ERR_ALLOC_FAILED;
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if (BPF_CLASS(pc->code) == BPF_LDX) {
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/* restore A */
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if (save_reg == BJ_AREG || (hints & BJ_HINT_XREG)) {
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/* restore A or X */
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status = sljit_emit_op1(compiler,
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SLJIT_MOV,
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BJ_AREG, 0,
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BJ_ASAVE, 0);
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SLJIT_MOV_UI, /* uint32_t source */
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save_reg, 0,
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SLJIT_MEM1(SLJIT_LOCALS_REG),
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offsetof(struct bpfjit_stack, reg));
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if (status != SLJIT_SUCCESS)
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return status;
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}
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@ -652,11 +662,15 @@ emit_xcall(struct sljit_compiler *compiler, const struct bpf_insn *pc,
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* Emit code for BPF_COP and BPF_COPX instructions.
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*/
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static int
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emit_cop(struct sljit_compiler *compiler,
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emit_cop(struct sljit_compiler *compiler, bpfjit_hint_t hints,
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const bpf_ctx_t *bc, const struct bpf_insn *pc,
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struct sljit_jump ***ret0, size_t *ret0_size, size_t *ret0_maxsize)
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{
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#if BJ_TMP3REG == SLJIT_SCRATCH_REG1 || \
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#if BJ_XREG == SLJIT_RETURN_REG || \
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BJ_XREG == SLJIT_SCRATCH_REG1 || \
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BJ_XREG == SLJIT_SCRATCH_REG2 || \
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BJ_XREG == SLJIT_SCRATCH_REG3 || \
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BJ_TMP3REG == SLJIT_SCRATCH_REG1 || \
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BJ_TMP3REG == SLJIT_SCRATCH_REG2 || \
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BJ_TMP3REG == SLJIT_SCRATCH_REG3
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#error "Not supported assignment of registers."
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@ -669,6 +683,17 @@ emit_cop(struct sljit_compiler *compiler,
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BJ_ASSERT(bc != NULL && bc->copfuncs != NULL);
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if (hints & BJ_HINT_LDX) {
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/* save X */
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status = sljit_emit_op1(compiler,
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SLJIT_MOV_UI, /* uint32_t destination */
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SLJIT_MEM1(SLJIT_LOCALS_REG),
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offsetof(struct bpfjit_stack, reg),
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BJ_XREG, 0);
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if (status != SLJIT_SUCCESS)
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return status;
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}
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if (BPF_MISCOP(pc->code) == BPF_COP) {
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call_reg = SLJIT_IMM;
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call_off = SLJIT_FUNC_OFFSET(bc->copfuncs[pc->k]);
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@ -762,6 +787,17 @@ emit_cop(struct sljit_compiler *compiler,
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return status;
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#endif
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if (hints & BJ_HINT_LDX) {
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/* restore X */
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status = sljit_emit_op1(compiler,
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SLJIT_MOV_UI, /* uint32_t source */
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BJ_XREG, 0,
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SLJIT_MEM1(SLJIT_LOCALS_REG),
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offsetof(struct bpfjit_stack, reg));
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if (status != SLJIT_SUCCESS)
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return status;
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}
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return SLJIT_SUCCESS;
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}
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@ -775,7 +811,7 @@ emit_cop(struct sljit_compiler *compiler,
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* BPF_LD+BPF_B+BPF_IND A <- P[X+k:1]
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*/
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static int
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emit_pkt_read(struct sljit_compiler *compiler,
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emit_pkt_read(struct sljit_compiler *compiler, bpfjit_hint_t hints,
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const struct bpf_insn *pc, struct sljit_jump *to_mchain_jump,
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struct sljit_jump ***ret0, size_t *ret0_size, size_t *ret0_maxsize)
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{
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@ -875,15 +911,15 @@ emit_pkt_read(struct sljit_compiler *compiler,
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switch (width) {
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case 4:
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status = emit_xcall(compiler, pc, BJ_AREG,
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status = emit_xcall(compiler, hints, pc, BJ_AREG,
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ret0, ret0_size, ret0_maxsize, &m_xword);
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break;
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case 2:
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status = emit_xcall(compiler, pc, BJ_AREG,
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status = emit_xcall(compiler, hints, pc, BJ_AREG,
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ret0, ret0_size, ret0_maxsize, &m_xhalf);
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break;
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case 1:
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status = emit_xcall(compiler, pc, BJ_AREG,
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status = emit_xcall(compiler, hints, pc, BJ_AREG,
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ret0, ret0_size, ret0_maxsize, &m_xbyte);
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break;
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}
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@ -960,7 +996,7 @@ emit_memstore(struct sljit_compiler *compiler,
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* Emit code for BPF_LDX+BPF_B+BPF_MSH X <- 4*(P[k:1]&0xf).
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*/
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static int
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emit_msh(struct sljit_compiler *compiler,
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emit_msh(struct sljit_compiler *compiler, bpfjit_hint_t hints,
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const struct bpf_insn *pc, struct sljit_jump *to_mchain_jump,
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struct sljit_jump ***ret0, size_t *ret0_size, size_t *ret0_maxsize)
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{
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@ -1014,7 +1050,7 @@ emit_msh(struct sljit_compiler *compiler,
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return SLJIT_ERR_ALLOC_FAILED;
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}
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status = emit_xcall(compiler, pc, BJ_TMP1REG,
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status = emit_xcall(compiler, hints, pc, BJ_TMP1REG,
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ret0, ret0_size, ret0_maxsize, &m_xbyte);
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if (status != SLJIT_SUCCESS)
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return status;
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@ -1088,6 +1124,13 @@ emit_division(struct sljit_compiler *compiler, int divt, sljit_sw divw)
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{
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int status;
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#if BJ_XREG == SLJIT_RETURN_REG || \
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BJ_XREG == SLJIT_SCRATCH_REG1 || \
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BJ_XREG == SLJIT_SCRATCH_REG2 || \
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BJ_AREG == SLJIT_SCRATCH_REG2
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#error "Not supported assignment of registers."
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#endif
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#if BJ_AREG != SLJIT_SCRATCH_REG1
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status = sljit_emit_op1(compiler,
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SLJIT_MOV,
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@ -1588,9 +1631,9 @@ kx_to_reg_arg(const struct bpf_insn *pc)
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}
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static bool
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generate_insn_code(struct sljit_compiler *compiler, const bpf_ctx_t *bc,
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const struct bpf_insn *insns, struct bpfjit_insn_data *insn_dat,
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size_t insn_count)
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generate_insn_code(struct sljit_compiler *compiler, bpfjit_hint_t hints,
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const bpf_ctx_t *bc, const struct bpf_insn *insns,
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struct bpfjit_insn_data *insn_dat, size_t insn_count)
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{
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/* a list of jumps to out-of-bound return from a generated function */
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struct sljit_jump **ret0;
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@ -1736,7 +1779,7 @@ generate_insn_code(struct sljit_compiler *compiler, const bpf_ctx_t *bc,
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if (unconditional_ret)
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continue;
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status = emit_pkt_read(compiler, pc,
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status = emit_pkt_read(compiler, hints, pc,
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to_mchain_jump, &ret0, &ret0_size, &ret0_maxsize);
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if (status != SLJIT_SUCCESS)
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goto fail;
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@ -1796,7 +1839,7 @@ generate_insn_code(struct sljit_compiler *compiler, const bpf_ctx_t *bc,
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if (unconditional_ret)
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continue;
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status = emit_msh(compiler, pc,
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status = emit_msh(compiler, hints, pc,
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to_mchain_jump, &ret0, &ret0_size, &ret0_maxsize);
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if (status != SLJIT_SUCCESS)
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goto fail;
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@ -2004,7 +2047,7 @@ generate_insn_code(struct sljit_compiler *compiler, const bpf_ctx_t *bc,
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goto fail;
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}
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status = emit_cop(compiler, bc, pc,
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status = emit_cop(compiler, hints, bc, pc,
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&ret0, &ret0_size, &ret0_maxsize);
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if (status != SLJIT_SUCCESS)
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goto fail;
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@ -2177,8 +2220,10 @@ bpfjit_generate_code(const bpf_ctx_t *bc,
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if (status != SLJIT_SUCCESS)
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goto fail;
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if (!generate_insn_code(compiler, bc, insns, insn_dat, insn_count))
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if (!generate_insn_code(compiler, hints,
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bc, insns, insn_dat, insn_count)) {
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goto fail;
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}
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rv = sljit_generate_code(compiler);
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