Initial VAX port merging.

This commit is contained in:
ragge 1994-08-02 20:18:46 +00:00
parent 3fd2818a03
commit 8026fb53f2
70 changed files with 17920 additions and 0 deletions

57
sys/arch/vax/README Normal file
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$Id: README,v 1.1 1994/08/02 20:18:46 ragge Exp $
Some information and status of VAX port:
We are trying to make a more easy-to-port-to-new-vax-cpu structure than the old
Berkeley code provides. autoconf.c was a real mess! We will here try to keep
cpu-dependent autoconfig code in ka???.c, so we don't have to bother with
those old structures.
The file skit.c shouldn't exist; it contains all currently undefined symbols
(even undefined pointers, bleh!) It is actually created from an awk script
taking input from ld :) Things are taken out of there as soon they are
implemented.
Device drivers for UDA50 and DELUA are almost unchanged from the 4.4BSD
release, and at least uda/ra routines seem to work.
There are done some very ugly things in some file files, that assumes
for example a special hardware config :( Watch out for them, there
are probably some swedish comments around there too. :)
Config code isn't working yet, there are more important things to fix
first :) To glue together IO devices there are a file glue.c. Config.new
just creates some header files right now.
Current state of VAX port of NetBSD:
- Some locore init works fine.
- Virtual memory starts ok.
- It may find some devices :)
- It mounts root filesystem from RA81 OK.
- It forks twice, copies out icode, start icode, calls execve and bails out...
Lots important things to do:
- Boot blocks and routines. (We currently use old 4.3 boot)
- Whole skit.c should be emptied.
- Fix pmap so that it works with user processes. (VERY important!)
- Fix some fast-hack-implementations of various things.
- Clean the code almost everywhere from foolish printouts.
As base code for our work we have used 0.9b distribution. For development
we used gas 1.35 with patches for bit instructions and gcc 2.5.8.
The kernel can currently only be compiled without -O option, because
we lacks some volatile definitions in device code. It anyway takes
about 2 1/2 hours to recompile the whole kernel...
We are developing on 11/750's with Massbuss disks, because of the ease to share
disks between computers, but have root filesystem on an RA81 on an UDA50.
In the future we have the possibility to try it out on almost all VAX cpu
types, ka730, ka780, ka420, ka630, ka650, ka8200, ka8600 and ka8800. Phew :)
I have only included relevant files from old berkeley VAX distributions.
If you want to look at other files get them from nearest ftp site with
an 4.4BSD distribution, or from ftp.luth.se:/pub/unix/4_4bsd_l directory.
/ragge@ludd.luth.se

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sys/arch/vax/conf/GENERIC Normal file
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#
# GENERIC VAX, currently only supports 11/750 anyway.
# $Id: GENERIC,v 1.1 1994/08/02 20:19:21 ragge Exp $
#
include "std.vax"
options "VAX750"
options SWAPPAGER, DEVPAGER, VNODEPAGER
options INET
options FFS
options COMPAT_09
maxusers 16
options GENERIC
config vmunix swap generic
uba0 at nexus ?
uda0 at uba? csr 0172150
ra0 at uda0 drive 0
de0 at uba? csr 0174510
pseudo-device loop
pseudo-device pty 48

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# @(#)Makefile.vax 7.18 (Berkeley) 12/16/90
# $Id: Makefile.vax,v 1.1 1994/08/02 20:19:22 ragge Exp $
#
# This makefile is constructed from a machine description:
# config machineid
# Most changes should be made in the machine description
# /sys/vax/conf/``machineid''
# after which you should do
# config machineid
# Machine generic makefile changes should be made in
# /sys/conf/Makefile.``machinetype''
# after which config should be rerun for all machines of that type.
#
# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
# IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
#
# -DTRACE compile in kernel tracing hooks
# -DQUOTA compile in file system quotas
# -DUUDMA compile in unibus tu58 pseudo-dma code
#
C2= /usr/libexec/cc1
CC= cc
CPP= cpp
LD= /usr/bin/ld
S= ../../../..
VAX= ../..
INCLUDES= -I. -I$S/arch -I$S -I$S/sys
COPTS= ${INCLUDES} ${IDENT} -DKERNEL
AOPTS= ${COPTS} -DASSEMBLER
CFLAGS= ${COPTS}
LOAD_ADDRESS=80000000
INLINECMD= ${VAX}/inline/obj/inline
INLINE= ${INLINECMD} ${INLINEOPTS}
#AHEADS= ${VAX}/vax/pcb.m
### find out what to use for libkern
.include "$S/lib/libkern/Makefile.inc"
.ifndef PROF
LIBKERN=../../../../lib/libkern/libkern.a # ${KERNLIB}
.else
LIBKERN= ${KERNLIB_PROF}
.endif
NORMAL_C= ${CC} -c ${CFLAGS} ${PROF} $<
NORMAL_C_C= ${CC} -c ${CFLAGS} ${PROF} ${PARAM} $<
NORMAL_S= ${CPP} -I. -DLOCORE ${COPTS} $< | ${AS} ${ASFLAGS} -o $*.o
DRIVER_C= ${CC} -c ${CFLAGS} ${PROF} $<
DRIVER_C_C= ${CC} -c ${CFLAGS} ${PROF} ${PARAM} $<
SYSTEM_ASMS=intvec.o locore.o locon.o
SYSTEM_OBJS=${SYSTEM_ASMS} ${OBJS} glue.o param.o ioconf.o ${LIBKERN}
#SYSTEM_DEP=${SYSTEM_ASMS} lovm.o pmap.o
SYSTEM_DEP=${SYSTEM_ASMS} ${SYSTEM_OBJS}
SYSTEM_LD_HEAD= @echo loading $@; rm -f $@
SYSTEM_LD= ${LD} -d -e start -T ${LOAD_ADDRESS} -o $@ ${SYSTEM_OBJS} vers.o
#SYSTEM_LD_TAIL= @echo rearranging symbols; symorder symbols.sort $@; ${DBSYM} -f
SYSTEM_LD_TAIL=@echo Nu {r k{rnan klar!!!!
%OBJS
%CFILES
%LOAD
clean:
rm -f eddep *vmunix tags *.o locore.i [a-tv-z]*.s \
Errs errs linterrs makelinks
lint: /tmp param.c
@lint -hbxn -DGENERIC ${COPTS} ${PARAM} \
${VAX}/vax/Locore.c ${CFILES} ioconf.c param.c | \
grep -v 'struct/union .* never defined' | \
grep -v 'possible pointer alignment problem'
symbols.sort: ${VAX}/vax/symbols.raw
grep -v '^#' ${VAX}/vax/symbols.raw \
| sed 's/^ //' | sort -u > symbols.sort
${INLINECMD}:
cd ${VAX}/inline; make
locon.o: ${VAX}/vax/locon.s
${CC} -x assembler-with-cpp -E ${AOPTS} ${VAX}/vax/locon.s| as -o locon.o
intvec.o: ${VAX}/vax/intvec.s
${CC} -x assembler-with-cpp -E ${AOPTS} ${VAX}/vax/intvec.s| as -o intvec.o
locore.o: ${VAX}/vax/locore.s
${CC} -x assembler-with-cpp -E ${AOPTS} ${VAX}/vax/locore.s| as -o locore.o
#
# Den h{r filen borde st{das upp och fixas till, det blir nog n{r
# glue-filerna g|r vad dom ska :)
#emulate.o: ${VAX}/vax/emulate.s
# cpp -I. ${COPTS} ${VAX}/vax/emulate.s | ${AS} -o emulate.o
# the following is necessary because autoconf.o depends on #if GENERIC
autoconf.o tu.o: Makefile
# the following are necessary because the files depend on the types of
# vax cpu's included in the system configuration
clock.o machdep.o autoconf.o conf.o cons.o cpudata.o : Makefile
crl.o flp.o mba.o uba.o vaxcpu.o : Makefile
# depend on network configuration
#af.o uipc_proto.o uipc_domain.o locore.o: Makefile
# depends on kdb being configured
trap.o: Makefile
# depend on maxusers
assym.s: Makefile
assym.s: genassym
./genassym >assym.s
genassym:
${CC} ${INCLUDES} ${IDENT} ${PARAM} -o genassym ${VAX}/vax/genassym.c
depend: assym.s ${CFILES}
mkdep ${COPTS} ${.ALLSRC:M*.c} ioconf.c
mkdep -a -p ${INCLUDES} ${IDENT} ${PARAM} ${VAX}/vax/genassym.c
links:
egrep '#if' ${CFILES} | sed -f $S/conf/defines | \
sed -e 's/:.*//' -e 's/\.c/.o/' | sort -u > dontlink
echo ${CFILES} | tr -s ' ' '\12' | sed 's/\.c/.o/' | \
sort -u | comm -23 - dontlink | \
sed 's,../.*/\(.*.o\),rm -f \1;ln -s ../GENERIC/\1 \1,' > makelinks
echo 'rm -f udiv.o;ln -s ../GENERIC/udiv.o udiv.o' >> makelinks
echo 'rm -f urem.o;ln -s ../GENERIC/urem.o urem.o' >> makelinks
sh makelinks && rm -f dontlink
tags:
@echo "see $S/kern/Makefile for tags"
ioconf.o:
${CC} -c ${CFLAGS} ${PARAM} ioconf.c
# ${CC} -c -S ${COPTS} ioconf.c
# cat ioconf.s | ${INLINE} | ${AS} -o ioconf.o
# rm -f ioconf.s
param.c: $S/conf/param.c
rm -f param.c
cp $S/conf/param.c .
param.o: param.c Makefile
${CC} -c ${CFLAGS} ${PARAM} param.c
glue.o: ${VAX}/vax/glue.c
${CC} -c ${CFLAGS} ${PARAM} glue.c
conf.o: ${VAX}/vax/conf.c
${CC} -c -traditional ${CFLAGS} ${PARAM} conf.c
newvers:
sh $S/conf/newvers.sh
${CC} ${CFLAGS} -c vers.c
%RULES

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#
# new style config file for vax architecture
# $Id: files.vax,v 1.1 1994/08/02 20:19:26 ragge Exp $
#
maxusers 8 32 64
device nexus at root { }
device mba at nexus { drive = -1 }
file arch/vax/mba/mba.c mba needs-count
device hp at mba
file arch/vax/mba/hp.c hp needs-count
device uba at nexus { csr }
file arch/vax/uba/uba.c uba needs-count
device uda at uba { drive=-1 }
file arch/vax/uba/uda.c uda needs-count
device ra at uda
file arch/vax/vax/mscp.c ra needs-count
device de at uba:ifnet, ether
file arch/vax/if/if_uba.c de
file arch/vax/if/if_de.c de needs-count
# These devices aren't tested (or even compiled!)
# They are just included here to make some files happy ;)
#
# Ikonas framebuffer
device ik at uba
file arch/vax/uba/ik.c ik needs-count
device vs at uba
file arch/vax/uba/vs.c vs needs-count
# TU58 on 750/730
device tu at root
file arch/vax/vax/tu.c tu needs-count
# RK06/07 on UBA
device rk at uba
file arch/vax/uba/rk.c rk needs-count
# TM11/TE10 at UBA
device te at uba
file arch/vax/uba/tm.c te needs-count
# TK50/TU81 at UBA
device tms at uba
file arch/vax/uba/tmscp.c tms needs-count
# TS11 at UBA
device ts at uba
file arch/vax/uba/ts.c ts needs-count
# TU78 at MBA
device mu at mba
file arch/vax/mba/mt.c mu needs-count
# BI-bus on root
device bi at root { node=-1 }
file arch/vax/bi/bi.c bi needs-count
# KDB50 on BI
device kra at bi
file arch/vax/bi/kdb.c kra needs-count
# DMF32 on UBA
device dmf at uba
file arch/vax/uba/dmf.c dmf needs-count
file arch/vax/uba/dmz.c dmf needs-count
# DMZ32 on UBA
device dmz at uba
file arch/vax/uba/dmx.c dmz needs-count
# DN-11 on UBA
device dn at uba
file arch/vax/uba/dn.c dn needs-count
# DZ11 at UBA
device dz at uba
file arch/vax/uba/dz.c dz needs-count
# IDC (RB730) on UBA (VAX 11/730)
device idc at uba { drive=-1 }
device rb at idc
file arch/vax/uba/idc.c rb needs-count
# LP-11 at UBA
device lp at uba
file arch/vax/uba/lp.c lp needs-count
# ???? at UBA
device lpa at uba
file arch/vax/uba/lpa.c lpa needs-count
# PS2 at UBA
device ps at uba
file arch/vax/uba/ps.c ps needs-count
# RL02/RL11 at UBA
device hl at uba { drive=-1 }
device rl at hl
file arch/vax/uba/rl.c rl needs-count
# RX211/RX02 at UBA
device fx at uba { drive=-1 }
device rx at fx
file arch/vax/uba/rx.c rx needs-count
# SC-21/SC-31 at UBA
device sc at uba { drive=-1 }
device up at sc
file arch/vax/uba/up.c up needs-count
# TU45 at UBA
device ut at uba { drive=-1}
device tj at ut
file arch/vax/uba/ut.c tj needs-count
# TU58/DECtape II
device uu at uba
file arch/vax/uba/uu.c uu needs-count
# Benson-Varian plotter at UBA
device va at uba { drive=-1}
device vz at va
file arch/vax/uba/va.c va needs-count
# Versatec plotter at UBA
device vp at uba
file arch/vax/uba/vp.c vp needs-count
# QVSS at UBA
device qv at uba
file arch/vax/uba/qv.c qv needs-count
file arch/vax/uba/qfont.c qv needs-count
# QDSS at UBA
device qd at uba
file arch/vax/uba/qd.c qd needs-count
# Interlan NP100 at UBA
device np at uba
file arch/vax/if/if_ix.c np needs-count
file arch/vax/uba/np.c np needs-count
# ACC LH/DH IMP on UBA
device acc at uba
file arch/vax/if/if_acc.c acc needs-count
# DR11C at UBA
device ct at uba
file arch/vax/uba/ct.c ct needs-count
# A/D-converter on UBA
device ad at uba
file arch/vax/uba/ad.c ad needs-count
# DH-11/DM-11 on UBA
device dh at uba
file arch/vax/uba/dh.c dh needs-count
# DHU-11 at UBA
device dhu at uba
file arch/vax/uba/dhu.c dhu needs-count
# These are general files needed for compilation.
file arch/vax/vax/pmap.c
file arch/vax/vax/skit.c
file arch/vax/vax/machdep.c
#file arch/vax/vax/lovm.c
#file arch/vax/vax/cpudata.c
file arch/vax/vax/ka750.c
#file arch/vax/vax/disksubr.c
file arch/vax/vax/conf.c
file arch/vax/vax/urem.s
file arch/vax/vax/udiv.s
file arch/vax/vax/rootfil.c
file arch/vax/vax/bcopy.s
file arch/vax/vax/trap.c
file arch/vax/vax/vm_machdep.c
file arch/vax/vax/in_cksum.c inet
file arch/vax/vax/disksubr.c ffs
file arch/vax/vax/random.s inet
# Dom h{ra f}r vara kvar s} l{nge f}r vi se vilka vi beh|ver...
#arch/vax/vax/clock.c standard
#arch/vax/vax/cons.c standard
#arch/vax/vax/crl.c standard
#arch/vax/vax/dkbad.c standard
#arch/vax/vax/flp.c standard
#arch/vax/vax/ka650.c standard
#arch/vax/vax/ka630.c standard
#arch/vax/vax/ka730.c standard
#arch/vax/vax/ka750.c standard
#arch/vax/vax/ka780.c standard
#arch/vax/vax/ka820.c standard
#arch/vax/vax/ka860.c standard
#arch/vax/vax/kdb_machdep.c optional kadb
#arch/vax/vax/kdb_opset.c optional kadb
#arch/vax/vax/mem.c standard
#arch/vax/vax/mscp.c optional kra
#arch/vax/vax/ns_cksum.c optional ns
#arch/vax/vax/rx50.c standard
#arch/vax/vax/sys_machdep.c standard
#arch/vax/vax/trap.c standard
#arch/vax/vax/iidr.o optional ii
#arch/vax/vax/iidrsys.o optional ii
#arch/vax/vax/iidr_glob.o optional ii
#arch/vax/if/if_css.c optional css imp device-driver
#arch/vax/if/if_dp.c optional dp device-driver
#arch/vax/if/if_ddn.c optional ddn device-driver
#arch/vax/if/if_dmc.c optional dmc device-driver
#arch/vax/if/if_dmv.c optional dmv device-driver
#arch/vax/if/if_ec.c optional ec device-driver
#arch/vax/if/if_en.c optional en device-driver
#arch/vax/if/if_ex.c optional ex device-driver
#arch/vax/if/if_hdh.c optional hdh device-driver
#arch/vax/if/if_hy.c optional hy device-driver
#arch/vax/if/if_il.c optional il device-driver
#arch/vax/if/if_pcl.c optional pcl device-driver
#arch/vax/if/if_qe.c optional qe device-driver
##arch/vax/if/if_uba.c optional ns device-driver
#arch/vax/if/if_vv.c optional vv device-driver
#arch/vax/if/raw_hy.c optional hy device-driver

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#
# new style config file for vax architecture
# $Id: files.vax.newconf,v 1.1 1994/08/02 20:19:26 ragge Exp $
#
maxusers 8 32 64
device nexus at root { }
device mba at nexus { drive = -1 }
file arch/vax/mba/mba.c mba needs-count
device hp at mba
file arch/vax/mba/hp.c hp needs-count
device uba at nexus { csr }
file arch/vax/uba/uba.c uba needs-count
device uda at uba { drive=-1 }
file arch/vax/uba/uda.c uda needs-count
device ra at uda
file arch/vax/vax/mscp.c ra needs-count
device de at uba:ifnet, ether
file arch/vax/if/if_uba.c de
file arch/vax/if/if_de.c de needs-count
# These devices aren't tested (or even compiled!)
# They are just included here to make some files happy ;)
#
# Ikonas framebuffer
device ik at uba
file arch/vax/uba/ik.c ik needs-count
device vs at uba
file arch/vax/uba/vs.c vs needs-count
# TU58 on 750/730
device tu at root
file arch/vax/vax/tu.c tu needs-count
# RK06/07 on UBA
device rk at uba
file arch/vax/uba/rk.c rk needs-count
# TM11/TE10 at UBA
device te at uba
file arch/vax/uba/tm.c te needs-count
# TK50/TU81 at UBA
device tms at uba
file arch/vax/uba/tmscp.c tms needs-count
# TS11 at UBA
device ts at uba
file arch/vax/uba/ts.c ts needs-count
# TU78 at MBA
device mu at mba
file arch/vax/mba/mt.c mu needs-count
# BI-bus on root
device bi at root { node=-1 }
file arch/vax/bi/bi.c bi needs-count
# KDB50 on BI
device kra at bi
file arch/vax/bi/kdb.c kra needs-count
# DMF32 on UBA
device dmf at uba
file arch/vax/uba/dmf.c dmf needs-count
file arch/vax/uba/dmz.c dmf needs-count
# DMZ32 on UBA
device dmz at uba
file arch/vax/uba/dmx.c dmz needs-count
# DN-11 on UBA
device dn at uba
file arch/vax/uba/dn.c dn needs-count
# DZ11 at UBA
device dz at uba
file arch/vax/uba/dz.c dz needs-count
# IDC (RB730) on UBA (VAX 11/730)
device idc at uba { drive=-1 }
device rb at idc
file arch/vax/uba/idc.c rb needs-count
# LP-11 at UBA
device lp at uba
file arch/vax/uba/lp.c lp needs-count
# ???? at UBA
device lpa at uba
file arch/vax/uba/lpa.c lpa needs-count
# PS2 at UBA
device ps at uba
file arch/vax/uba/ps.c ps needs-count
# RL02/RL11 at UBA
device hl at uba { drive=-1 }
device rl at hl
file arch/vax/uba/rl.c rl needs-count
# RX211/RX02 at UBA
device fx at uba { drive=-1 }
device rx at fx
file arch/vax/uba/rx.c rx needs-count
# SC-21/SC-31 at UBA
device sc at uba { drive=-1 }
device up at sc
file arch/vax/uba/up.c up needs-count
# TU45 at UBA
device ut at uba { drive=-1}
device tj at ut
file arch/vax/uba/ut.c tj needs-count
# TU58/DECtape II
device uu at uba
file arch/vax/uba/uu.c uu needs-count
# Benson-Varian plotter at UBA
device va at uba { drive=-1}
device vz at va
file arch/vax/uba/va.c va needs-count
# Versatec plotter at UBA
device vp at uba
file arch/vax/uba/vp.c vp needs-count
# QVSS at UBA
device qv at uba
file arch/vax/uba/qv.c qv needs-count
file arch/vax/uba/qfont.c qv needs-count
# QDSS at UBA
device qd at uba
file arch/vax/uba/qd.c qd needs-count
# Interlan NP100 at UBA
device np at uba
file arch/vax/if/if_ix.c np needs-count
file arch/vax/uba/np.c np needs-count
# ACC LH/DH IMP on UBA
device acc at uba
file arch/vax/if/if_acc.c acc needs-count
# DR11C at UBA
device ct at uba
file arch/vax/uba/ct.c ct needs-count
# A/D-converter on UBA
device ad at uba
file arch/vax/uba/ad.c ad needs-count
# DH-11/DM-11 on UBA
device dh at uba
file arch/vax/uba/dh.c dh needs-count
# DHU-11 at UBA
device dhu at uba
file arch/vax/uba/dhu.c dhu needs-count
# These are general files needed for compilation.
file arch/vax/vax/pmap.c
file arch/vax/vax/skit.c
file arch/vax/vax/machdep.c
#file arch/vax/vax/lovm.c
#file arch/vax/vax/cpudata.c
file arch/vax/vax/ka750.c
#file arch/vax/vax/disksubr.c
file arch/vax/vax/conf.c
file arch/vax/vax/urem.s
file arch/vax/vax/udiv.s
file arch/vax/vax/rootfil.c
file arch/vax/vax/bcopy.s
file arch/vax/vax/trap.c
file arch/vax/vax/vm_machdep.c
file arch/vax/vax/in_cksum.c inet
file arch/vax/vax/disksubr.c ffs
file arch/vax/vax/random.s inet
# Dom h{ra f}r vara kvar s} l{nge f}r vi se vilka vi beh|ver...
#arch/vax/vax/clock.c standard
#arch/vax/vax/cons.c standard
#arch/vax/vax/crl.c standard
#arch/vax/vax/dkbad.c standard
#arch/vax/vax/flp.c standard
#arch/vax/vax/ka650.c standard
#arch/vax/vax/ka630.c standard
#arch/vax/vax/ka730.c standard
#arch/vax/vax/ka750.c standard
#arch/vax/vax/ka780.c standard
#arch/vax/vax/ka820.c standard
#arch/vax/vax/ka860.c standard
#arch/vax/vax/kdb_machdep.c optional kadb
#arch/vax/vax/kdb_opset.c optional kadb
#arch/vax/vax/mem.c standard
#arch/vax/vax/mscp.c optional kra
#arch/vax/vax/ns_cksum.c optional ns
#arch/vax/vax/rx50.c standard
#arch/vax/vax/sys_machdep.c standard
#arch/vax/vax/trap.c standard
#arch/vax/vax/iidr.o optional ii
#arch/vax/vax/iidrsys.o optional ii
#arch/vax/vax/iidr_glob.o optional ii
#arch/vax/if/if_css.c optional css imp device-driver
#arch/vax/if/if_dp.c optional dp device-driver
#arch/vax/if/if_ddn.c optional ddn device-driver
#arch/vax/if/if_dmc.c optional dmc device-driver
#arch/vax/if/if_dmv.c optional dmv device-driver
#arch/vax/if/if_ec.c optional ec device-driver
#arch/vax/if/if_en.c optional en device-driver
#arch/vax/if/if_ex.c optional ex device-driver
#arch/vax/if/if_hdh.c optional hdh device-driver
#arch/vax/if/if_hy.c optional hy device-driver
#arch/vax/if/if_il.c optional il device-driver
#arch/vax/if/if_pcl.c optional pcl device-driver
#arch/vax/if/if_qe.c optional qe device-driver
##arch/vax/if/if_uba.c optional ns device-driver
#arch/vax/if/if_vv.c optional vv device-driver
#arch/vax/if/raw_hy.c optional hy device-driver

10
sys/arch/vax/conf/std.vax Normal file
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#
# Std vaxfiles, will be completed with Abus etc. later.
# $Id: std.vax,v 1.1 1994/08/02 20:19:27 ragge Exp $
#
machine vax
nexus0 at root
options MAXFDESCS=2048
options TIMEZONE=-60, DST=1

719
sys/arch/vax/if/if_de.c Normal file
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/*
* Copyright (c) 1982, 1986, 1989 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)if_de.c 7.12 (Berkeley) 12/16/90
* $Id: if_de.c,v 1.1 1994/08/02 20:19:45 ragge Exp $
*/
#include "de.h"
#if NDE > 0
/*
* DEC DEUNA interface
*
* Lou Salkind
* New York University
*
* TODO:
* timeout routine (get statistics)
*/
#include "vax/include/pte.h"
#include "vax/include/sid.h"
#include "sys/param.h"
#include "sys/systm.h"
#include "sys/mbuf.h"
#include "sys/buf.h"
#include "sys/protosw.h"
#include "sys/socket.h"
/* #include "sys/vmmac.h" */
#include "sys/ioctl.h"
#include "sys/errno.h"
#include "sys/syslog.h"
#include "sys/device.h"
#include "net/if.h"
#include "net/netisr.h"
#include "net/route.h"
#ifdef INET
#include "netinet/in.h"
#include "netinet/in_systm.h"
#include "netinet/in_var.h"
#include "netinet/ip.h"
#include "netinet/if_ether.h"
#endif
#ifdef NS
#include "netns/ns.h"
#include "netns/ns_if.h"
#endif
#ifdef ISO
#include "netiso/iso.h"
#include "netiso/iso_var.h"
extern char all_es_snpa[], all_is_snpa[];
#endif
#include "../include/cpu.h"
#include "../include/mtpr.h"
#include "if_dereg.h"
#include "if_uba.h"
#include "../uba/ubareg.h"
#include "../uba/ubavar.h"
#define NXMT 3 /* number of transmit buffers */
#define NRCV 7 /* number of receive buffers (must be > 1) */
int dedebug = 0;
struct cfdriver decd;
int deprobe(), deattach(), deintr();
struct uba_device *deinfo[NDE];
u_short destd[] = { 0 };
struct uba_driver dedriver =
{ deprobe, 0, deattach, 0, destd, "de", deinfo };
int deinit(),ether_output(),deioctl(),dereset(),destart();
/*
* Ethernet software status per interface.
*
* Each interface is referenced by a network interface structure,
* ds_if, which the routing code uses to locate the interface.
* This structure contains the output queue for the interface, its address, ...
* We also have, for each interface, a UBA interface structure, which
* contains information about the UNIBUS resources held by the interface:
* map registers, buffered data paths, etc. Information is cached in this
* structure for use by the if_uba.c routines in running the interface
* efficiently.
*/
struct de_softc {
struct arpcom ds_ac; /* Ethernet common part */
#define ds_if ds_ac.ac_if /* network-visible interface */
#define ds_addr ds_ac.ac_enaddr /* hardware Ethernet address */
int ds_flags;
#define DSF_RUNNING 2 /* board is enabled */
#define DSF_SETADDR 4 /* physical address is changed */
int ds_ubaddr; /* map info for incore structs */
struct ifubinfo ds_deuba; /* unibus resource structure */
struct ifrw ds_ifr[NRCV]; /* unibus receive maps */
struct ifxmt ds_ifw[NXMT]; /* unibus xmt maps */
/* the following structures are always mapped in */
struct de_pcbb ds_pcbb; /* port control block */
struct de_ring ds_xrent[NXMT]; /* transmit ring entrys */
struct de_ring ds_rrent[NRCV]; /* receive ring entrys */
struct de_udbbuf ds_udbbuf; /* UNIBUS data buffer */
/* end mapped area */
#define INCORE_BASE(p) ((char *)&(p)->ds_pcbb)
#define RVAL_OFF(n) ((char *)&de_softc[0].n - INCORE_BASE(&de_softc[0]))
#define LVAL_OFF(n) ((char *)de_softc[0].n - INCORE_BASE(&de_softc[0]))
#define PCBB_OFFSET RVAL_OFF(ds_pcbb)
#define XRENT_OFFSET LVAL_OFF(ds_xrent)
#define RRENT_OFFSET LVAL_OFF(ds_rrent)
#define UDBBUF_OFFSET RVAL_OFF(ds_udbbuf)
#define INCORE_SIZE RVAL_OFF(ds_xindex)
int ds_xindex; /* UNA index into transmit chain */
int ds_rindex; /* UNA index into receive chain */
int ds_xfree; /* index for next transmit buffer */
int ds_nxmit; /* # of transmits in progress */
} de_softc[NDE];
deprobe(reg)
caddr_t reg;
{
register int br, cvec; /* r11, r10 value-result */
register struct dedevice *addr = (struct dedevice *)reg;
register i;
#ifdef lint
br = 0; cvec = br; br = cvec;
i = 0; derint(i); deintr(i);
#endif
/*
* Make sure self-test is finished before we screw with the board.
* Self-test on a DELUA can take 15 seconds (argh).
*/
for (i = 0;
i < 160 &&
(addr->pcsr0 & PCSR0_FATI) == 0 &&
(addr->pcsr1 & PCSR1_STMASK) == STAT_RESET;
++i)
DELAY(100000);
if ((addr->pcsr0 & PCSR0_FATI) != 0 ||
(addr->pcsr1 & PCSR1_STMASK) != STAT_READY &&
(addr->pcsr1 & PCSR1_STMASK) != STAT_RUN)
return(0);
addr->pcsr0 = 0;
DELAY(100);
addr->pcsr0 = PCSR0_RSET;
while ((addr->pcsr0 & PCSR0_INTR) == 0)
;
/* make board interrupt by executing a GETPCBB command */
addr->pcsr0 = PCSR0_INTE;
addr->pcsr2 = 0;
addr->pcsr3 = 0;
addr->pcsr0 = PCSR0_INTE|CMD_GETPCBB;
DELAY(100000);
return(1);
}
/*
* Interface exists: make available by filling in network interface
* record. System will initialize the interface when it is ready
* to accept packets. We get the ethernet address here.
*/
deattach(ui)
struct uba_device *ui;
{
register struct de_softc *ds = &de_softc[ui->ui_unit];
register struct ifnet *ifp = &ds->ds_if;
register struct dedevice *addr = (struct dedevice *)ui->ui_addr;
int csr1;
ifp->if_unit = ui->ui_unit;
ifp->if_name = "de";
ifp->if_mtu = ETHERMTU;
ifp->if_flags = IFF_BROADCAST;
/*
* What kind of a board is this?
* The error bits 4-6 in pcsr1 are a device id as long as
* the high byte is zero.
*/
csr1 = addr->pcsr1;
if (csr1 & 0xff60)
printf("de%d: broken\n", ui->ui_unit);
else if (csr1 & 0x10)
printf("de%d: delua\n", ui->ui_unit);
else
printf("de%d: deuna\n", ui->ui_unit);
/*
* Reset the board and temporarily map
* the pcbb buffer onto the Unibus.
*/
addr->pcsr0 = 0; /* reset INTE */
DELAY(100);
addr->pcsr0 = PCSR0_RSET;
(void)dewait(ui, "reset");
ds->ds_ubaddr = uballoc(ui->ui_ubanum, (char *)&ds->ds_pcbb,
sizeof (struct de_pcbb), 0);
addr->pcsr2 = ds->ds_ubaddr & 0xffff;
addr->pcsr3 = (ds->ds_ubaddr >> 16) & 0x3;
addr->pclow = CMD_GETPCBB;
(void)dewait(ui, "pcbb");
ds->ds_pcbb.pcbb0 = FC_RDPHYAD;
addr->pclow = CMD_GETCMD;
(void)dewait(ui, "read addr ");
ubarelse(ui->ui_ubanum, &ds->ds_ubaddr);
bcopy((caddr_t)&ds->ds_pcbb.pcbb2, (caddr_t)ds->ds_addr,
sizeof (ds->ds_addr));
printf("de%d: hardware address %s\n", ui->ui_unit,
ether_sprintf(ds->ds_addr));
printf("if_de: ifp->if_init = deinit\n");
/* XXX ifp->if_init = deinit; */
ifp->if_output = ether_output;
ifp->if_ioctl = deioctl;
ifp->if_reset = dereset;
ifp->if_start = destart;
ds->ds_deuba.iff_flags = UBA_CANTWAIT;
#ifdef notdef
/* CAN WE USE BDP's ??? */
ds->ds_deuba.iff_flags |= UBA_NEEDBDP;
#endif
if_attach(ifp);
}
/*
* Reset of interface after UNIBUS reset.
* If interface is on specified uba, reset its state.
*/
dereset(unit, uban)
int unit, uban;
{
register struct uba_device *ui;
if (unit >= NDE || (ui = deinfo[unit]) == 0 || ui->ui_alive == 0 ||
ui->ui_ubanum != uban)
return;
printf(" de%d", unit);
de_softc[unit].ds_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
de_softc[unit].ds_flags &= ~DSF_RUNNING;
((struct dedevice *)ui->ui_addr)->pcsr0 = PCSR0_RSET;
(void)dewait(ui, "reset");
deinit(unit);
}
/*
* Initialization of interface; clear recorded pending
* operations, and reinitialize UNIBUS usage.
*/
deinit(unit)
int unit;
{
register struct de_softc *ds = &de_softc[unit];
register struct uba_device *ui = deinfo[unit];
register struct dedevice *addr;
register struct ifrw *ifrw;
register struct ifxmt *ifxp;
struct ifnet *ifp = &ds->ds_if;
int s;
struct de_ring *rp;
int incaddr;
/* not yet, if address still unknown */
if (ifp->if_addrlist == (struct ifaddr *)0)
return;
if (ds->ds_flags & DSF_RUNNING)
return;
if ((ifp->if_flags & IFF_RUNNING) == 0) {
if (if_ubaminit(&ds->ds_deuba, ui->ui_ubanum,
sizeof (struct ether_header), (int)btoc(ETHERMTU),
ds->ds_ifr, NRCV, ds->ds_ifw, NXMT) == 0) {
printf("de%d: can't initialize\n", unit);
ds->ds_if.if_flags &= ~IFF_UP;
return;
}
ds->ds_ubaddr = uballoc(ui->ui_ubanum, INCORE_BASE(ds),
INCORE_SIZE, 0);
}
addr = (struct dedevice *)ui->ui_addr;
/* set the pcbb block address */
incaddr = ds->ds_ubaddr + PCBB_OFFSET;
addr->pcsr2 = incaddr & 0xffff;
addr->pcsr3 = (incaddr >> 16) & 0x3;
addr->pclow = 0; /* reset INTE */
DELAY(100);
addr->pclow = CMD_GETPCBB;
(void)dewait(ui, "pcbb");
/* set the transmit and receive ring header addresses */
incaddr = ds->ds_ubaddr + UDBBUF_OFFSET;
ds->ds_pcbb.pcbb0 = FC_WTRING;
ds->ds_pcbb.pcbb2 = incaddr & 0xffff;
ds->ds_pcbb.pcbb4 = (incaddr >> 16) & 0x3;
incaddr = ds->ds_ubaddr + XRENT_OFFSET;
ds->ds_udbbuf.b_tdrbl = incaddr & 0xffff;
ds->ds_udbbuf.b_tdrbh = (incaddr >> 16) & 0x3;
ds->ds_udbbuf.b_telen = sizeof (struct de_ring) / sizeof (short);
ds->ds_udbbuf.b_trlen = NXMT;
incaddr = ds->ds_ubaddr + RRENT_OFFSET;
ds->ds_udbbuf.b_rdrbl = incaddr & 0xffff;
ds->ds_udbbuf.b_rdrbh = (incaddr >> 16) & 0x3;
ds->ds_udbbuf.b_relen = sizeof (struct de_ring) / sizeof (short);
ds->ds_udbbuf.b_rrlen = NRCV;
addr->pclow = CMD_GETCMD;
(void)dewait(ui, "wtring");
/* initialize the mode - enable hardware padding */
ds->ds_pcbb.pcbb0 = FC_WTMODE;
/* let hardware do padding - set MTCH bit on broadcast */
ds->ds_pcbb.pcbb2 = MOD_TPAD|MOD_HDX;
addr->pclow = CMD_GETCMD;
(void)dewait(ui, "wtmode");
/* set up the receive and transmit ring entries */
ifxp = &ds->ds_ifw[0];
for (rp = &ds->ds_xrent[0]; rp < &ds->ds_xrent[NXMT]; rp++) {
rp->r_segbl = ifxp->ifw_info & 0xffff;
rp->r_segbh = (ifxp->ifw_info >> 16) & 0x3;
rp->r_flags = 0;
ifxp++;
}
ifrw = &ds->ds_ifr[0];
for (rp = &ds->ds_rrent[0]; rp < &ds->ds_rrent[NRCV]; rp++) {
rp->r_slen = sizeof (struct de_buf);
rp->r_segbl = ifrw->ifrw_info & 0xffff;
rp->r_segbh = (ifrw->ifrw_info >> 16) & 0x3;
rp->r_flags = RFLG_OWN; /* hang receive */
ifrw++;
}
/* start up the board (rah rah) */
s = splimp();
ds->ds_rindex = ds->ds_xindex = ds->ds_xfree = ds->ds_nxmit = 0;
ds->ds_if.if_flags |= IFF_RUNNING;
addr->pclow = PCSR0_INTE; /* avoid interlock */
destart(&ds->ds_if); /* queue output packets */
ds->ds_flags |= DSF_RUNNING; /* need before de_setaddr */
if (ds->ds_flags & DSF_SETADDR)
de_setaddr(ds->ds_addr, unit);
addr->pclow = CMD_START | PCSR0_INTE;
splx(s);
}
/*
* Setup output on interface.
* Get another datagram to send off of the interface queue,
* and map it to the interface before starting the output.
* Must be called from ipl >= our interrupt level.
*/
destart(ifp)
struct ifnet *ifp;
{
int len;
int unit = ifp->if_unit;
struct uba_device *ui = deinfo[unit];
struct dedevice *addr = (struct dedevice *)ui->ui_addr;
register struct de_softc *ds = &de_softc[unit];
register struct de_ring *rp;
struct mbuf *m;
register int nxmit;
/*
* the following test is necessary, since
* the code is not reentrant and we have
* multiple transmission buffers.
*/
if (ds->ds_if.if_flags & IFF_OACTIVE)
return;
for (nxmit = ds->ds_nxmit; nxmit < NXMT; nxmit++) {
IF_DEQUEUE(&ds->ds_if.if_snd, m);
if (m == 0)
break;
rp = &ds->ds_xrent[ds->ds_xfree];
if (rp->r_flags & XFLG_OWN)
panic("deuna xmit in progress");
len = if_ubaput(&ds->ds_deuba, &ds->ds_ifw[ds->ds_xfree], m);
if (ds->ds_deuba.iff_flags & UBA_NEEDBDP)
UBAPURGE(ds->ds_deuba.iff_uba,
ds->ds_ifw[ds->ds_xfree].ifw_bdp);
rp->r_slen = len;
rp->r_tdrerr = 0;
rp->r_flags = XFLG_STP|XFLG_ENP|XFLG_OWN;
ds->ds_xfree++;
if (ds->ds_xfree == NXMT)
ds->ds_xfree = 0;
}
if (ds->ds_nxmit != nxmit) {
ds->ds_nxmit = nxmit;
if (ds->ds_flags & DSF_RUNNING)
addr->pclow = PCSR0_INTE|CMD_PDMD;
}
}
/*
* Command done interrupt.
*/
deintr(unit)
int unit;
{
struct uba_device *ui = deinfo[unit];
register struct dedevice *addr = (struct dedevice *)ui->ui_addr;
register struct de_softc *ds = &de_softc[unit];
register struct de_ring *rp;
register struct ifxmt *ifxp;
short csr0;
unit=0; /* XXX J{tteful grej f|r att f} igenom... */
/* save flags right away - clear out interrupt bits */
csr0 = addr->pcsr0;
addr->pchigh = csr0 >> 8;
ds->ds_if.if_flags |= IFF_OACTIVE; /* prevent entering destart */
/*
* if receive, put receive buffer on mbuf
* and hang the request again
*/
derecv(unit);
/*
* Poll transmit ring and check status.
* Be careful about loopback requests.
* Then free buffer space and check for
* more transmit requests.
*/
for ( ; ds->ds_nxmit > 0; ds->ds_nxmit--) {
rp = &ds->ds_xrent[ds->ds_xindex];
if (rp->r_flags & XFLG_OWN)
break;
ds->ds_if.if_opackets++;
ifxp = &ds->ds_ifw[ds->ds_xindex];
/* check for unusual conditions */
if (rp->r_flags & (XFLG_ERRS|XFLG_MTCH|XFLG_ONE|XFLG_MORE)) {
if (rp->r_flags & XFLG_ERRS) {
/* output error */
ds->ds_if.if_oerrors++;
if (dedebug)
printf("de%d: oerror, flags=%b tdrerr=%b (len=%d)\n",
unit, rp->r_flags, XFLG_BITS,
rp->r_tdrerr, XERR_BITS, rp->r_slen);
} else if (rp->r_flags & XFLG_ONE) {
/* one collision */
ds->ds_if.if_collisions++;
} else if (rp->r_flags & XFLG_MORE) {
/* more than one collision */
ds->ds_if.if_collisions += 2; /* guess */
} else if (rp->r_flags & XFLG_MTCH) {
/* received our own packet */
ds->ds_if.if_ipackets++;
deread(ds, &ifxp->ifrw,
rp->r_slen - sizeof (struct ether_header));
}
}
if (ifxp->ifw_xtofree) {
m_freem(ifxp->ifw_xtofree);
ifxp->ifw_xtofree = 0;
}
/* check if next transmit buffer also finished */
ds->ds_xindex++;
if (ds->ds_xindex == NXMT)
ds->ds_xindex = 0;
}
ds->ds_if.if_flags &= ~IFF_OACTIVE;
destart(&ds->ds_if);
if (csr0 & PCSR0_RCBI) {
if (dedebug)
log(LOG_WARNING, "de%d: buffer unavailable\n", unit);
addr->pclow = PCSR0_INTE|CMD_PDMD;
}
}
/*
* Ethernet interface receiver interface.
* If input error just drop packet.
* Otherwise purge input buffered data path and examine
* packet to determine type. If can't determine length
* from type, then have to drop packet. Othewise decapsulate
* packet based on type and pass to type specific higher-level
* input routine.
*/
derecv(unit)
int unit;
{
register struct de_softc *ds = &de_softc[unit];
register struct de_ring *rp;
int len;
rp = &ds->ds_rrent[ds->ds_rindex];
while ((rp->r_flags & RFLG_OWN) == 0) {
ds->ds_if.if_ipackets++;
if (ds->ds_deuba.iff_flags & UBA_NEEDBDP)
UBAPURGE(ds->ds_deuba.iff_uba,
ds->ds_ifr[ds->ds_rindex].ifrw_bdp);
len = (rp->r_lenerr&RERR_MLEN) - sizeof (struct ether_header)
- 4; /* don't forget checksum! */
/* check for errors */
if ((rp->r_flags & (RFLG_ERRS|RFLG_FRAM|RFLG_OFLO|RFLG_CRC)) ||
(rp->r_flags&(RFLG_STP|RFLG_ENP)) != (RFLG_STP|RFLG_ENP) ||
(rp->r_lenerr & (RERR_BUFL|RERR_UBTO|RERR_NCHN)) ||
len < ETHERMIN || len > ETHERMTU) {
ds->ds_if.if_ierrors++;
if (dedebug)
printf("de%d: ierror, flags=%b lenerr=%b (len=%d)\n",
unit, rp->r_flags, RFLG_BITS, rp->r_lenerr,
RERR_BITS, len);
} else
deread(ds, &ds->ds_ifr[ds->ds_rindex], len);
/* hang the receive buffer again */
rp->r_lenerr = 0;
rp->r_flags = RFLG_OWN;
/* check next receive buffer */
ds->ds_rindex++;
if (ds->ds_rindex == NRCV)
ds->ds_rindex = 0;
rp = &ds->ds_rrent[ds->ds_rindex];
}
}
/*
* Pass a packet to the higher levels.
* We deal with the trailer protocol here.
*/
deread(ds, ifrw, len)
register struct de_softc *ds;
struct ifrw *ifrw;
int len;
{
struct ether_header *eh;
struct mbuf *m;
int off, resid;
int s;
register struct ifqueue *inq;
/*
* Deal with trailer protocol: if type is trailer type
* get true type from first 16-bit word past data.
* Remember that type was trailer by setting off.
*/
eh = (struct ether_header *)ifrw->ifrw_addr;
eh->ether_type = ntohs((u_short)eh->ether_type);
#define dedataaddr(eh, off, type) ((type)(((caddr_t)((eh)+1)+(off))))
if (eh->ether_type >= ETHERTYPE_TRAIL &&
eh->ether_type < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) {
off = (eh->ether_type - ETHERTYPE_TRAIL) * 512;
if (off >= ETHERMTU)
return; /* sanity */
eh->ether_type = ntohs(*dedataaddr(eh, off, u_short *));
resid = ntohs(*(dedataaddr(eh, off+2, u_short *)));
if (off + resid > len)
return; /* sanity */
len = off + resid;
} else
off = 0;
if (len == 0)
return;
/*
* Pull packet off interface. Off is nonzero if packet
* has trailing header; if_ubaget will then force this header
* information to be at the front.
*/
m = if_ubaget(&ds->ds_deuba, ifrw, len, off, &ds->ds_if);
if (m)
ether_input(&ds->ds_if, eh, m);
}
/*
* Process an ioctl request.
*/
deioctl(ifp, cmd, data)
register struct ifnet *ifp;
int cmd;
caddr_t data;
{
register struct ifaddr *ifa = (struct ifaddr *)data;
register struct de_softc *ds = &de_softc[ifp->if_unit];
int s = splimp(), error = 0;
switch (cmd) {
case SIOCSIFADDR:
ifp->if_flags |= IFF_UP;
deinit(ifp->if_unit);
switch (ifa->ifa_addr->sa_family) {
#ifdef INET
case AF_INET:
((struct arpcom *)ifp)->ac_ipaddr =
IA_SIN(ifa)->sin_addr;
arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr);
break;
#endif
#ifdef NS
case AF_NS:
{
register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
if (ns_nullhost(*ina))
ina->x_host = *(union ns_host *)(ds->ds_addr);
else
de_setaddr(ina->x_host.c_host,ifp->if_unit);
break;
}
#endif
}
break;
case SIOCSIFFLAGS:
if ((ifp->if_flags & IFF_UP) == 0 &&
ds->ds_flags & DSF_RUNNING) {
((struct dedevice *)
(deinfo[ifp->if_unit]->ui_addr))->pclow = 0;
DELAY(100);
((struct dedevice *)
(deinfo[ifp->if_unit]->ui_addr))->pclow = PCSR0_RSET;
ds->ds_flags &= ~DSF_RUNNING;
ds->ds_if.if_flags &= ~IFF_OACTIVE;
} else if (ifp->if_flags & IFF_UP &&
(ds->ds_flags & DSF_RUNNING) == 0)
deinit(ifp->if_unit);
break;
default:
error = EINVAL;
}
splx(s);
return (error);
}
/*
* set ethernet address for unit
*/
de_setaddr(physaddr, unit)
u_char *physaddr;
int unit;
{
register struct de_softc *ds = &de_softc[unit];
struct uba_device *ui = deinfo[unit];
register struct dedevice *addr= (struct dedevice *)ui->ui_addr;
if (! (ds->ds_flags & DSF_RUNNING))
return;
bcopy((caddr_t) physaddr, (caddr_t) &ds->ds_pcbb.pcbb2, 6);
ds->ds_pcbb.pcbb0 = FC_WTPHYAD;
addr->pclow = PCSR0_INTE|CMD_GETCMD;
if (dewait(ui, "address change") == 0) {
ds->ds_flags |= DSF_SETADDR;
bcopy((caddr_t) physaddr, (caddr_t) ds->ds_addr, 6);
}
}
/*
* Await completion of the named function
* and check for errors.
*/
dewait(ui, fn)
register struct uba_device *ui;
char *fn;
{
register struct dedevice *addr = (struct dedevice *)ui->ui_addr;
register csr0;
while ((addr->pcsr0 & PCSR0_INTR) == 0)
;
csr0 = addr->pcsr0;
addr->pchigh = csr0 >> 8;
if (csr0 & PCSR0_PCEI)
printf("de%d: %s failed, csr0=%b csr1=%b\n",
ui->ui_unit, fn, csr0, PCSR0_BITS,
addr->pcsr1, PCSR1_BITS);
return (csr0 & PCSR0_PCEI);
}
#endif

219
sys/arch/vax/if/if_dereg.h Normal file
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/*
* Copyright (c) 1982, 1986 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)if_dereg.h 7.3 (Berkeley) 6/28/90
* $Id: if_dereg.h,v 1.1 1994/08/02 20:19:48 ragge Exp $
*/
/*
* DEC DEUNA interface
*/
struct dedevice {
union {
short p0_w;
char p0_b[2];
} u_p0;
#define pcsr0 u_p0.p0_w
#define pclow u_p0.p0_b[0]
#define pchigh u_p0.p0_b[1]
short pcsr1;
short pcsr2;
short pcsr3;
};
/*
* PCSR 0 bit descriptions
*/
#define PCSR0_SERI 0x8000 /* Status error interrupt */
#define PCSR0_PCEI 0x4000 /* Port command error interrupt */
#define PCSR0_RXI 0x2000 /* Receive done interrupt */
#define PCSR0_TXI 0x1000 /* Transmit done interrupt */
#define PCSR0_DNI 0x0800 /* Done interrupt */
#define PCSR0_RCBI 0x0400 /* Receive buffer unavail intrpt */
#define PCSR0_FATI 0x0100 /* Fatal error interrupt */
#define PCSR0_INTR 0x0080 /* Interrupt summary */
#define PCSR0_INTE 0x0040 /* Interrupt enable */
#define PCSR0_RSET 0x0020 /* DEUNA reset */
#define PCSR0_CMASK 0x000f /* command mask */
#define PCSR0_BITS "\20\20SERI\17PCEI\16RXI\15TXI\14DNI\13RCBI\11FATI\10INTR\7INTE\6RSET"
/* bits 0-3 are for the PORT_COMMAND */
#define CMD_NOOP 0x0
#define CMD_GETPCBB 0x1 /* Get PCB Block */
#define CMD_GETCMD 0x2 /* Execute command in PCB */
#define CMD_STEST 0x3 /* Self test mode */
#define CMD_START 0x4 /* Reset xmit and receive ring ptrs */
#define CMD_BOOT 0x5 /* Boot DEUNA */
#define CMD_PDMD 0x8 /* Polling demand */
#define CMD_TMRO 0x9 /* Sanity timer on */
#define CMD_TMRF 0xa /* Sanity timer off */
#define CMD_RSTT 0xb /* Reset sanity timer */
#define CMD_STOP 0xf /* Suspend operation */
/*
* PCSR 1 bit descriptions
*/
#define PCSR1_XPWR 0x8000 /* Transceiver power BAD */
#define PCSR1_ICAB 0x4000 /* Interconnect cabling BAD */
#define PCSR1_STCODE 0x3f00 /* Self test error code */
#define PCSR1_PCTO 0x0080 /* Port command timed out */
#define PCSR1_ILLINT 0x0040 /* Illegal interrupt */
#define PCSR1_TIMEOUT 0x0020 /* Timeout */
#define PCSR1_POWER 0x0010 /* Power fail */
#define PCSR1_RMTC 0x0008 /* Remote console reserved */
#define PCSR1_STMASK 0x0007 /* State */
/* bit 0-3 are for STATE */
#define STAT_RESET 0x0
#define STAT_PRIMLD 0x1 /* Primary load */
#define STAT_READY 0x2
#define STAT_RUN 0x3
#define STAT_UHALT 0x5 /* UNIBUS halted */
#define STAT_NIHALT 0x6 /* NI halted */
#define STAT_NIUHALT 0x7 /* NI and UNIBUS Halted */
#define PCSR1_BITS "\20\20XPWR\17ICAB\10PCTO\7ILLINT\6TIMEOUT\5POWER\4RMTC"
/*
* Port Control Block Base
*/
struct de_pcbb {
short pcbb0; /* function */
short pcbb2; /* command specific */
short pcbb4;
short pcbb6;
};
/* PCBB function codes */
#define FC_NOOP 0x00 /* NO-OP */
#define FC_LSUADDR 0x01 /* Load and start microaddress */
#define FC_RDDEFAULT 0x02 /* Read default physical address */
#define FC_RDPHYAD 0x04 /* Read physical address */
#define FC_WTPHYAD 0x05 /* Write physical address */
#define FC_RDMULTI 0x06 /* Read multicast address list */
#define FC_WTMULTI 0x07 /* Read multicast address list */
#define FC_RDRING 0x08 /* Read ring format */
#define FC_WTRING 0x09 /* Write ring format */
#define FC_RDCNTS 0x0a /* Read counters */
#define FC_RCCNTS 0x0b /* Read and clear counters */
#define FC_RDMODE 0x0c /* Read mode */
#define FC_WTMODE 0x0d /* Write mode */
#define FC_RDSTATUS 0x0e /* Read port status */
#define FC_RCSTATUS 0x0f /* Read and clear port status */
#define FC_DUMPMEM 0x10 /* Dump internal memory */
#define FC_LOADMEM 0x11 /* Load internal memory */
#define FC_RDSYSID 0x12 /* Read system ID parameters */
#define FC_WTSYSID 0x13 /* Write system ID parameters */
#define FC_RDSERAD 0x14 /* Read load server address */
#define FC_WTSERAD 0x15 /* Write load server address */
/*
* Unibus Data Block Base (UDBB) for ring buffers
*/
struct de_udbbuf {
short b_tdrbl; /* Transmit desc ring base low 16 bits */
char b_tdrbh; /* Transmit desc ring base high 2 bits */
char b_telen; /* Length of each transmit entry */
short b_trlen; /* Number of entries in the XMIT desc ring */
short b_rdrbl; /* Receive desc ring base low 16 bits */
char b_rdrbh; /* Receive desc ring base high 2 bits */
char b_relen; /* Length of each receive entry */
short b_rrlen; /* Number of entries in the RECV desc ring */
};
/*
* Transmit/Receive Ring Entry
*/
struct de_ring {
short r_slen; /* Segment length */
short r_segbl; /* Segment address (low 16 bits) */
char r_segbh; /* Segment address (hi 2 bits) */
u_char r_flags; /* Status flags */
u_short r_tdrerr; /* Errors */
#define r_lenerr r_tdrerr
short r_rid; /* Request ID */
};
#define XFLG_OWN 0x80 /* If 0 then owned by driver */
#define XFLG_ERRS 0x40 /* Error summary */
#define XFLG_MTCH 0x20 /* Address match on xmit request */
#define XFLG_MORE 0x10 /* More than one entry required */
#define XFLG_ONE 0x08 /* One collision encountered */
#define XFLG_DEF 0x04 /* Transmit deferred */
#define XFLG_STP 0x02 /* Start of packet */
#define XFLG_ENP 0x01 /* End of packet */
#define XFLG_BITS "\10\10OWN\7ERRS\6MTCH\5MORE\4ONE\3DEF\2STP\1ENP"
#define XERR_BUFL 0x8000 /* Buffer length error */
#define XERR_UBTO 0x4000 /* UNIBUS tiemout
#define XERR_LCOL 0x1000 /* Late collision */
#define XERR_LCAR 0x0800 /* Loss of carrier */
#define XERR_RTRY 0x0400 /* Failed after 16 retries */
#define XERR_TDR 0x03ff /* TDR value */
#define XERR_BITS "\20\20BUFL\17UBTO\15LCOL\14LCAR\13RTRY"
#define RFLG_OWN 0x80 /* If 0 then owned by driver */
#define RFLG_ERRS 0x40 /* Error summary */
#define RFLG_FRAM 0x20 /* Framing error */
#define RFLG_OFLO 0x10 /* Message overflow */
#define RFLG_CRC 0x08 /* CRC error */
#define RFLG_STP 0x02 /* Start of packet */
#define RFLG_ENP 0x01 /* End of packet */
#define RFLG_BITS "\10\10OWN\7ERRS\6FRAM\5OFLO\4CRC\2STP\1ENP"
#define RERR_BUFL 0x8000 /* Buffer length error */
#define RERR_UBTO 0x4000 /* UNIBUS tiemout */
#define RERR_NCHN 0x2000 /* No data chaining */
#define RERR_MLEN 0x0fff /* Message length */
#define RERR_BITS "\20\20BUFL\17UBTO\16NCHN"
/* mode description bits */
#define MOD_HDX 0x0001 /* Half duplex mode */
#define MOD_LOOP 0x0004 /* Enable internal loopback */
#define MOD_DTCR 0x0008 /* Disables CRC generation */
#define MOD_DMNT 0x0200 /* Disable maintenance features */
#define MOD_ECT 0x0400 /* Enable collision test */
#define MOD_TPAD 0x1000 /* Transmit message pad enable */
#define MOD_DRDC 0x2000 /* Disable data chaining */
#define MOD_ENAL 0x4000 /* Enable all multicast */
#define MOD_PROM 0x8000 /* Enable promiscuous mode */
struct de_buf {
struct ether_header db_head; /* header */
char db_data[ETHERMTU]; /* packet data */
int db_crc; /* CRC - on receive only */
};

399
sys/arch/vax/if/if_uba.c Normal file
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@ -0,0 +1,399 @@
/*
* Copyright (c) 1982, 1986, 1988 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)if_uba.c 7.16 (Berkeley) 12/16/90
* $Id: if_uba.c,v 1.1 1994/08/02 20:19:49 ragge Exp $
*/
#include "sys/param.h"
#include "sys/systm.h"
#include "sys/malloc.h"
#include "sys/mbuf.h"
#include "sys/map.h"
#include "sys/buf.h"
/* #include "sys/cmap.h" */
/* #include "sys/vmmac.h" */
#include "sys/socket.h"
#include "sys/syslog.h"
#include "net/if.h"
#include "vax/include/pte.h"
#include "vax/include/mtpr.h"
#include "if_uba.h"
#include "vax/include/vmparam.h"
#include "vax/uba/ubareg.h"
#include "vax/uba/ubavar.h"
/*
* Routines supporting UNIBUS network interfaces.
*
* TODO:
* Support interfaces using only one BDP statically.
*/
/*
* Init UNIBUS for interface on uban whose headers of size hlen are to
* end on a page boundary. We allocate a UNIBUS map register for the page
* with the header, and nmr more UNIBUS map registers for i/o on the adapter,
* doing this once for each read and once for each write buffer. We also
* allocate page frames in the mbuffer pool for these pages.
*/
if_ubaminit(ifu, uban, hlen, nmr, ifr, nr, ifw, nw)
register struct ifubinfo *ifu;
int uban, hlen, nmr, nr, nw;
register struct ifrw *ifr;
register struct ifxmt *ifw;
{
register caddr_t p;
caddr_t cp;
int i, nclbytes, off;
if (hlen)
off = MCLBYTES - hlen;
else
off = 0;
nclbytes = roundup(nmr * NBPG, MCLBYTES);
if (hlen)
nclbytes += MCLBYTES;
if (ifr[0].ifrw_addr)
cp = ifr[0].ifrw_addr - off;
else {
cp = (caddr_t)malloc((u_long)((nr + nw) * nclbytes), M_DEVBUF,
M_NOWAIT);
if (cp == 0)
return (0);
p = cp;
for (i = 0; i < nr; i++) {
ifr[i].ifrw_addr = p + off;
p += nclbytes;
}
for (i = 0; i < nw; i++) {
ifw[i].ifw_base = p;
ifw[i].ifw_addr = p + off;
p += nclbytes;
}
ifu->iff_hlen = hlen;
ifu->iff_uban = uban;
ifu->iff_uba = uba_hd[uban].uh_uba;
ifu->iff_ubamr = uba_hd[uban].uh_mr;
}
for (i = 0; i < nr; i++)
if (if_ubaalloc(ifu, &ifr[i], nmr) == 0) {
nr = i;
nw = 0;
goto bad;
}
for (i = 0; i < nw; i++)
if (if_ubaalloc(ifu, &ifw[i].ifrw, nmr) == 0) {
nw = i;
goto bad;
}
while (--nw >= 0) {
for (i = 0; i < nmr; i++)
ifw[nw].ifw_wmap[i] = ifw[nw].ifw_mr[i];
ifw[nw].ifw_xswapd = 0;
ifw[nw].ifw_flags = IFRW_W;
ifw[nw].ifw_nmr = nmr;
}
return (1);
bad:
while (--nw >= 0)
ubarelse(ifu->iff_uban, &ifw[nw].ifw_info);
while (--nr >= 0)
ubarelse(ifu->iff_uban, &ifr[nr].ifrw_info);
free(cp, M_DEVBUF);
ifr[0].ifrw_addr = 0;
return (0);
}
/*
* Setup an ifrw structure by allocating UNIBUS map registers,
* possibly a buffered data path, and initializing the fields of
* the ifrw structure to minimize run-time overhead.
*/
static
if_ubaalloc(ifu, ifrw, nmr)
struct ifubinfo *ifu;
register struct ifrw *ifrw;
int nmr;
{
register int info;
info =
uballoc(ifu->iff_uban, ifrw->ifrw_addr, nmr*NBPG + ifu->iff_hlen,
ifu->iff_flags);
if (info == 0)
return (0);
ifrw->ifrw_info = info;
ifrw->ifrw_bdp = UBAI_BDP(info);
ifrw->ifrw_proto = UBAMR_MRV | (UBAI_BDP(info) << UBAMR_DPSHIFT);
ifrw->ifrw_mr = &ifu->iff_ubamr[UBAI_MR(info) + (ifu->iff_hlen? 1 : 0)];
return (1);
}
/*
* Pull read data off a interface.
* Totlen is length of data, with local net header stripped.
* Off is non-zero if a trailer protocol was used, and
* gives the offset of the trailer information.
* We copy the header from the trailer and then all the normal
* data into mbufs. When full cluster sized units are present
* on the interface on cluster boundaries we can get them more
* easily by remapping, and take advantage of this here.
* Save a pointer to the interface structure and the total length,
* so that protocols can determine where incoming packets arrived.
* Note: we may be called to receive from a transmit buffer by some
* devices. In that case, we must force normal mapping of the buffer,
* so that the correct data will appear (only unibus maps are
* changed when remapping the transmit buffers).
*/
struct mbuf *
if_ubaget(ifu, ifr, totlen, off, ifp)
struct ifubinfo *ifu;
register struct ifrw *ifr;
register int totlen;
int off;
struct ifnet *ifp;
{
struct mbuf *top, **mp;
register struct mbuf *m;
register caddr_t cp = ifr->ifrw_addr + ifu->iff_hlen, pp;
register int len;
caddr_t epkt = cp + totlen;
top = 0;
mp = &top;
/*
* Skip the trailer header (type and trailer length).
*/
if (off) {
off += 2 * sizeof(u_short);
totlen -= 2 * sizeof(u_short);
cp += off;
}
MGETHDR(m, M_DONTWAIT, MT_DATA);
if (m == 0)
return ((struct mbuf *)NULL);
m->m_pkthdr.rcvif = ifp;
m->m_pkthdr.len = totlen;
m->m_len = MHLEN;
if (ifr->ifrw_flags & IFRW_W)
rcv_xmtbuf((struct ifxmt *)ifr);
while (totlen > 0) {
if (top) {
MGET(m, M_DONTWAIT, MT_DATA);
if (m == 0) {
m_freem(top);
top = 0;
goto out;
}
m->m_len = MLEN;
}
len = min(totlen, epkt - cp);
if (len >= MINCLSIZE) {
struct pte *cpte, *ppte;
int x, *ip, i;
MCLGET(m, M_DONTWAIT);
if ((m->m_flags & M_EXT) == 0)
goto nopage;
len = min(len, MCLBYTES);
m->m_len = len;
if (!claligned(cp))
goto copy;
/*
* Switch pages mapped to UNIBUS with new page pp,
* as quick form of copy. Remap UNIBUS and invalidate.
*/
pp = mtod(m, char *);
cpte = kvtopte(cp);
ppte = kvtopte(pp);
x = vax_btop(cp - ifr->ifrw_addr);
ip = (int *)&ifr->ifrw_mr[x];
for (i = 0; i < MCLBYTES/NBPG; i++) {
struct pte t;
t = *ppte; *ppte++ = *cpte; *cpte = t;
*ip++ = cpte++->pg_pfn|ifr->ifrw_proto;
mtpr(PR_TBIS, cp);
cp += NBPG;
mtpr(PR_TBIS, (caddr_t)pp);
pp += NBPG;
}
goto nocopy;
}
nopage:
if (len < m->m_len) {
/*
* Place initial small packet/header at end of mbuf.
*/
if (top == 0 && len + max_linkhdr <= m->m_len)
m->m_data += max_linkhdr;
m->m_len = len;
} else
len = m->m_len;
copy:
bcopy(cp, mtod(m, caddr_t), (unsigned)len);
cp += len;
nocopy:
*mp = m;
mp = &m->m_next;
totlen -= len;
if (cp == epkt)
cp = ifr->ifrw_addr + ifu->iff_hlen;
}
out:
if (ifr->ifrw_flags & IFRW_W)
restor_xmtbuf((struct ifxmt *)ifr);
return (top);
}
/*
* Change the mapping on a transmit buffer so that if_ubaget may
* receive from that buffer. Copy data from any pages mapped to Unibus
* into the pages mapped to normal kernel virtual memory, so that
* they can be accessed and swapped as usual. We take advantage
* of the fact that clusters are placed on the xtofree list
* in inverse order, finding the last one.
*/
static
rcv_xmtbuf(ifw)
register struct ifxmt *ifw;
{
register struct mbuf *m;
struct mbuf **mprev;
register i;
char *cp;
while (i = ffs((long)ifw->ifw_xswapd)) {
cp = ifw->ifw_base + i * MCLBYTES;
i--;
ifw->ifw_xswapd &= ~(1<<i);
mprev = &ifw->ifw_xtofree;
for (m = ifw->ifw_xtofree; m && m->m_next; m = m->m_next)
mprev = &m->m_next;
if (m == NULL)
break;
bcopy(mtod(m, caddr_t), cp, MCLBYTES);
(void) m_free(m);
*mprev = NULL;
}
ifw->ifw_xswapd = 0;
for (i = 0; i < ifw->ifw_nmr; i++)
ifw->ifw_mr[i] = ifw->ifw_wmap[i];
}
/*
* Put a transmit buffer back together after doing an if_ubaget on it,
* which may have swapped pages.
*/
static
restor_xmtbuf(ifw)
register struct ifxmt *ifw;
{
register i;
for (i = 0; i < ifw->ifw_nmr; i++)
ifw->ifw_wmap[i] = ifw->ifw_mr[i];
}
/*
* Map a chain of mbufs onto a network interface
* in preparation for an i/o operation.
* The argument chain of mbufs includes the local network
* header which is copied to be in the mapped, aligned
* i/o space.
*/
if_ubaput(ifu, ifw, m)
struct ifubinfo *ifu;
register struct ifxmt *ifw;
register struct mbuf *m;
{
register struct mbuf *mp;
register caddr_t cp, dp;
register int i;
int xswapd = 0;
int x, cc, t;
cp = ifw->ifw_addr;
while (m) {
dp = mtod(m, char *);
if (claligned(cp) && claligned(dp) &&
(m->m_len == MCLBYTES || m->m_next == (struct mbuf *)0)) {
struct pte *pte;
int *ip;
pte = kvtopte(dp);
x = vax_btop(cp - ifw->ifw_addr);
ip = (int *)&ifw->ifw_mr[x];
for (i = 0; i < MCLBYTES/NBPG; i++)
*ip++ = ifw->ifw_proto | pte++->pg_pfn;
xswapd |= 1 << (x>>(MCLSHIFT-PGSHIFT));
mp = m->m_next;
m->m_next = ifw->ifw_xtofree;
ifw->ifw_xtofree = m;
cp += m->m_len;
} else {
bcopy(mtod(m, caddr_t), cp, (unsigned)m->m_len);
cp += m->m_len;
MFREE(m, mp);
}
m = mp;
}
/*
* Xswapd is the set of clusters we just mapped out. Ifu->iff_xswapd
* is the set of clusters mapped out from before. We compute
* the number of clusters involved in this operation in x.
* Clusters mapped out before and involved in this operation
* should be unmapped so original pages will be accessed by the device.
*/
cc = cp - ifw->ifw_addr;
x = ((cc - ifu->iff_hlen) + MCLBYTES - 1) >> MCLSHIFT;
ifw->ifw_xswapd &= ~xswapd;
while (i = ffs((long)ifw->ifw_xswapd)) {
i--;
if (i >= x)
break;
ifw->ifw_xswapd &= ~(1<<i);
i *= MCLBYTES/NBPG;
for (t = 0; t < MCLBYTES/NBPG; t++) {
ifw->ifw_mr[i] = ifw->ifw_wmap[i];
i++;
}
}
ifw->ifw_xswapd |= xswapd;
return (cc);
}

135
sys/arch/vax/if/if_uba.h Normal file
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/*
* Copyright (c) 1982, 1986 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)if_uba.h 7.4 (Berkeley) 6/28/90
* $Id: if_uba.h,v 1.1 1994/08/02 20:19:51 ragge Exp $
*/
/*
* Structure and routine definitions
* for UNIBUS network interfaces.
*/
#define IF_MAXNUBAMR 10
/*
* Each interface has structures giving information
* about UNIBUS resources held by the interface
* for each send and receive buffer.
*
* We hold IF_NUBAMR map registers for datagram data, starting
* at ifr_mr. Map register ifr_mr[-1] maps the local network header
* ending on the page boundary. Bdp's are reserved for read and for
* write, given by ifr_bdp. The prototype of the map register for
* read and for write is saved in ifr_proto.
*
* When write transfers are not full pages on page boundaries we just
* copy the data into the pages mapped on the UNIBUS and start the
* transfer. If a write transfer is of a (1024 byte) page on a page
* boundary, we swap in UNIBUS pte's to reference the pages, and then
* remap the initial pages (from ifu_wmap) when the transfer completes.
*
* When read transfers give whole pages of data to be input, we
* allocate page frames from a network page list and trade them
* with the pages already containing the data, mapping the allocated
* pages to replace the input pages for the next UNIBUS data input.
*/
/*
* Information per interface.
*/
struct ifubinfo {
short iff_uban; /* uba number */
short iff_hlen; /* local net header length */
struct uba_regs *iff_uba; /* uba adaptor regs, in vm */
struct pte *iff_ubamr; /* uba map regs, in vm */
short iff_flags; /* used during uballoc's */
};
/*
* Information per buffer.
*/
struct ifrw {
caddr_t ifrw_addr; /* virt addr of header */
short ifrw_bdp; /* unibus bdp */
short ifrw_flags; /* type, etc. */
#define IFRW_W 0x01 /* is a transmit buffer */
int ifrw_info; /* value from ubaalloc */
int ifrw_proto; /* map register prototype */
struct pte *ifrw_mr; /* base of map registers */
};
/*
* Information per transmit buffer, including the above.
*/
struct ifxmt {
struct ifrw ifrw;
caddr_t ifw_base; /* virt addr of buffer */
struct pte ifw_wmap[IF_MAXNUBAMR]; /* base pages for output */
struct mbuf *ifw_xtofree; /* pages being dma'd out */
short ifw_xswapd; /* mask of clusters swapped */
short ifw_nmr; /* number of entries in wmap */
};
#define ifw_addr ifrw.ifrw_addr
#define ifw_bdp ifrw.ifrw_bdp
#define ifw_flags ifrw.ifrw_flags
#define ifw_info ifrw.ifrw_info
#define ifw_proto ifrw.ifrw_proto
#define ifw_mr ifrw.ifrw_mr
/*
* Most interfaces have a single receive and a single transmit buffer,
* and use struct ifuba to store all of the unibus information.
*/
struct ifuba {
struct ifubinfo ifu_info;
struct ifrw ifu_r;
struct ifxmt ifu_xmt;
};
#define ifu_uban ifu_info.iff_uban
#define ifu_hlen ifu_info.iff_hlen
#define ifu_uba ifu_info.iff_uba
#define ifu_ubamr ifu_info.iff_ubamr
#define ifu_flags ifu_info.iff_flags
#define ifu_w ifu_xmt.ifrw
#define ifu_xtofree ifu_xmt.ifw_xtofree
#ifdef KERNEL
#define if_ubainit(ifuba, uban, hlen, nmr) \
if_ubaminit(&(ifuba)->ifu_info, uban, hlen, nmr, \
&(ifuba)->ifu_r, 1, &(ifuba)->ifu_xmt, 1)
#define if_rubaget(ifu, totlen, off0, ifp) \
if_ubaget(&(ifu)->ifu_info, &(ifu)->ifu_r, totlen, off0, ifp)
#define if_wubaput(ifu, m) \
if_ubaput(&(ifu)->ifu_info, &(ifu)->ifu_xmt, m)
struct mbuf *if_ubaget();
#endif

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/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)ansi.h 7.1 (Berkeley) 3/9/91
* $Id: ansi.h,v 1.1 1994/08/02 20:20:07 ragge Exp $
*/
#ifndef _ANSI_H_
#define _ANSI_H_
/*
* Types which are fundamental to the implementation and may appear in
* more than one standard header are defined here. Standard headers
* then use:
* #ifdef _SIZE_T_
* typedef _SIZE_T_ size_t;
* #undef _SIZE_T_
* #endif
*
* Thanks, ANSI!
*/
#define _CLOCK_T_ unsigned long /* clock() */
#define _PTRDIFF_T_ int /* ptr1 - ptr2 */
#define _SIZE_T_ unsigned int /* sizeof() */
#define _TIME_T_ long /* time() */
#define _VA_LIST_ char * /* va_list */
#define _WCHAR_T_ unsigned short /* wchar_t */
#endif /* _ANSI_H_ */

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: aout_machdep.h,v 1.1 1994/08/02 20:20:20 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#define __LDPGSZ 8192 /* XXX This is not important now... */

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/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)asm.h 5.5 (Berkeley) 5/7/91
* $Id: asm.h,v 1.1 1994/08/02 20:20:10 ragge Exp $
*/
#ifndef _SYS_ASM_H_
#define _SYS_ASM_H_
/*
* XXX assumes that arguments are not passed in %eax
*/
#ifdef PROF
# define _BEGIN_ENTRY .data; 1:; .long 0; .text; .align 2
# define _END_ENTRY moval 1b,r0; jsb mcount
#else
# define _BEGIN_ENTRY .text; .align 2
# define _END_ENTRY
#endif
#ifdef __STDC__
# define _C_FUNC(x) _ ## x
#else
# define _C_FUNC(x) _/**/x
#endif
#define _ASM_FUNC(x) x
#define _ENTRY(x) .globl x; x:
#define ENTRY(y) _BEGIN_ENTRY; _ENTRY(_C_FUNC(y)); _END_ENTRY
#define TWOENTRY(y,z) _BEGIN_ENTRY; _ENTRY(_C_FUNC(y)); _ENTRY(_C_FUNC(z)); \
_END_ENTRY
#define ASENTRY(y) _BEGIN_ENTRY; _ENTRY(_ASM_FUNC(y)); _END_ENTRY
#define ASMSTR .asciz
#endif /* !_SYS_ASM_H_ */

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sys/arch/vax/include/cpu.h Normal file
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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: cpu.h,v 1.1 1994/08/02 20:20:13 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#include "cdefs.h"
#include "vax/include/mtpr.h"
#define enablertclock()
#define setsoftclock() mtpr(8,PR_SIRR)
struct clockframe {
int pc;
int ps;
};
struct cpuops {
int *nisse;
int (*cpu_memenable)();
int (*cpu_memerr)();
int (*cpu_mchk)();
int (*cpu_init)();
};
struct percpu {
int pc_cputype;
int pc_cpuspeed;
int pc_nioa;
struct iobus *pc_io;
struct cpuops *pc_ops;
};
struct clockops {
int (*p1)();
int (*p2)();
int (*p3)();
};
/*
* Return timeofdayregister
*/
#define todr() mfpr(PR_TODR)
/*
* The following code are from the hp300 port/ragge.
* from: Utah Hdr: cpu.h 1.16 91/03/25
* from: @(#)cpu.h 7.7 (Berkeley) 6/27/91
* $Id: cpu.h,v 1.1 1994/08/02 20:20:13 ragge Exp $
*/
/*
* Preempt the current process if in interrupt from user mode,
* or after the current trap/syscall if in system mode.
*/
#define need_resched(){ \
want_resched++; \
mtpr(AST_OK,PR_ASTLVL); \
}
/*
* Give a profiling tick to the current process from the softclock
* interrupt. On hp300, request an ast to send us through trap(),
* marking the proc as needing a profiling tick.
*/
/* #define profile_tick(p, framep) { (p)->p_flag |= SOWEUPC; aston(); } */
/*
* Notify the current process (p) that it has a signal pending,
* process as soon as possible.
*/
#define signotify(p) mtpr(AST_OK,PR_ASTLVL);
/* extern int astpending; /* need to trap before returning to user mode */
extern int want_resched; /* resched() was called */

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/*
* Copyright (c) 1987, 1991 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)endian.h 7.8 (Berkeley) 4/3/91
* $Id: endian.h,v 1.1 1994/08/02 20:20:17 ragge Exp $
*/
/*
* Definitions for byte order, according to byte significance from low
* address to high.
*/
#define LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
#define BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */
#define PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */
#define _QUAD_HIGHWORD 1
#define _QUAD_LOWWORD 0
#define BYTE_ORDER LITTLE_ENDIAN
#include <sys/cdefs.h>
__BEGIN_DECLS
unsigned long htonl __P((unsigned long));
unsigned short htons __P((unsigned short));
unsigned long ntohl __P((unsigned long));
unsigned short ntohs __P((unsigned short));
__END_DECLS
/*
* Macros for network/external number representation conversion.
*/
#if BYTE_ORDER == BIG_ENDIAN && !defined(lint)
#define ntohl(x) (x)
#define ntohs(x) (x)
#define htonl(x) (x)
#define htons(x) (x)
#define NTOHL(x) (x)
#define NTOHS(x) (x)
#define HTONL(x) (x)
#define HTONS(x) (x)
#else
#define NTOHL(x) (x) = ntohl((u_long)x)
#define NTOHS(x) (x) = ntohs((u_short)x)
#define HTONL(x) (x) = htonl((u_long)x)
#define HTONS(x) (x) = htons((u_short)x)
#endif

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: exec.h,v 1.1 1994/08/02 20:20:20 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#define __LDPGSZ 8192 /* XXX This is not important now... */

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/*
* Copyright (c) 1989 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)float.h 7.2 (Berkeley) 6/28/90
* $Id: float.h,v 1.1 1994/08/02 20:20:22 ragge Exp $
*/
#define FLT_RADIX 2 /* b */
#define FLT_ROUNDS 1 /* FP addition rounds to nearest */
#define FLT_MANT_DIG 24 /* p */
#define FLT_EPSILON 1.19209290E-07F /* b**(1-p) */
#define FLT_DIG 6 /* floor((p-1)*log10(b))+(b == 10) */
#define FLT_MIN_EXP -127 /* emin */
#define FLT_MIN 2.93873588E-39F /* b**(emin-1) */
#define FLT_MIN_10_EXP -38 /* ceil(log10(b**(emin-1))) */
#define FLT_MAX_EXP 127 /* emax */
#define FLT_MAX 1.70141173E+38F /* (1-b**(-p))*b**emax */
#define FLT_MAX_10_EXP 38 /* floor(log10((1-b**(-p))*b**emax)) */
#define DBL_MANT_DIG 56
#define DBL_EPSILON 2.775557561562891351E-17
#define DBL_DIG 16
#define DBL_MIN_EXP -127
#define DBL_MIN 2.938735877055718770E-39
#define DBL_MIN_10_EXP -38
#define DBL_MAX_EXP 127
#define DBL_MAX 1.701411834604692294E+38
#define DBL_MAX_10_EXP 38
#define LDBL_MANT_DIG DBL_MANT_DIG
#define LDBL_EPSILON DBL_EPSILON
#define LDBL_DIG DBL_DIG
#define LDBL_MIN_EXP DBL_MIN_EXP
#define LDBL_MIN DBL_MIN
#define LDBL_MIN_10_EXP DBL_MIN_10_EXP
#define LDBL_MAX_EXP DBL_MAX_EXP
#define LDBL_MAX DBL_MAX
#define LDBL_MAX_10_EXP DBL_MAX_10_EXP

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: ioa.h,v 1.1 1994/08/02 20:20:28 ragge Exp $
*/
/* All bugs are subject to removal without further notice */

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: ka750.h,v 1.1 1994/08/02 20:20:30 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
/* ka750.h - definitioner enbart f|r VAX 750 940328/ragge */
#define V750UCODE(x) ((x>>8)&255)
#define V750HARDW(x) (x&255)

36
sys/arch/vax/include/kg.h Normal file
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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: kg.h,v 1.1 1994/08/02 20:20:31 ragge Exp $
*/
/* All bugs are subject to removal without further notice */

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/*
* Copyright (c) 1988 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)limits.h 7.2 (Berkeley) 6/28/90
* $Id: limits.h,v 1.1 1994/08/02 20:20:32 ragge Exp $
*/
#define CHAR_BIT 8 /* number of bits in a char */
/* #define CLK_TCK 60 /* ticks per second */
#define MB_LEN_MAX 1 /* no multibyte characters */
#define SCHAR_MIN 0x80 /* max value for a signed char */
#define SCHAR_MAX 0x7f /* min value for a signed char */
#define UCHAR_MAX 0xff /* max value for an unsigned char */
#define CHAR_MAX 0x7f /* max value for a char */
#define CHAR_MIN 0x80 /* min value for a char */
#define USHRT_MAX 0xffff /* max value for an unsigned short */
#define SHRT_MAX 0x7fff /* max value for a short */
#define SHRT_MIN 0x8000 /* min value for a short */
#define UINT_MAX 0xffffffff /* max value for an unsigned int */
#define INT_MAX 0x7fffffff /* max value for an int */
#define INT_MIN 0x80000000 /* min value for an int */
#define ULONG_MAX 0xffffffff /* max value for an unsigned long */
#define LONG_MAX 0x7fffffff /* max value for a long */
#define LONG_MIN 0x80000000 /* min value for a long */

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: loconf.h,v 1.1 1994/08/02 20:20:34 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#define ISTACK_SIZE 4*NBPG
/* XXX If kernel never crashes with kernel stack overflow trap
* kstack can be removed altogether. (Was 4*NBPG)
*/
#define PROC_PAGES 0
#define MAX_UCODE 1024*1024*6
#define MAX_UDATA 1024*1024*32
#define MAX_USTCK 1024*1024*8
#define MAX_PROCESSES 32
#define PROCOFFSET (MAX_UCODE+MAX_UDATA+MAX_USTCK)/16384
/* Add 1 to USERPAGES if (MAX_PROCESSES mod 8) != 0 */
#define USERPAGES (MAX_UCODE+MAX_UDATA+MAX_USTCK)*MAX_PROCESSES/(512*128*128)

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: macros.h,v 1.1 1994/08/02 20:20:36 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
/* Here general macros are supposed to be stored */
#define PRINT_HEXF(x) (((x)<0x10) ? "0000000" : \
((x)<0x100) ? "000000" : \
((x)<0x1000) ? "00000" : \
((x)<0x10000) ? "0000" : \
((x)<0x100000) ? "000" : \
((x)<0x1000000) ? "00" : \
((x)<0x10000000) ? "0" : \
"" )
#define PRINT_BOOL(x) ((x)?"TRUE":"FALSE")
#define PRINT_PROT(x) (((x)==0) ? "NONE" : \
((x)==1) ? "READ" : \
((x)==2) ? "WRITE" : \
((x)==3) ? "READ/WRITE" : \
((x)==4) ? "EXECUTE" : \
((x)==5) ? "EXECUTE/READ" : \
((x)==6) ? "EXECUTE/WRITE" : \
"EXECUTE/READ/WRITE")

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: mtpr.h,v 1.1 1994/08/02 20:20:38 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
/******************************************************************************
Processor register numbers in the VAX /IC
******************************************************************************/
#define PR_KSP 0 /* Kernel Stack Pointer */
#define PR_ESP 1 /* Executive Stack Pointer */
#define PR_SSP 2 /* Supervisor Stack Pointer */
#define PR_USP 3 /* User Stack Pointer */
#define PR_ISP 4 /* Interrupt Stack Pointer */
#define PR_P0BR 8 /* P0 Base Register */
#define PR_P0LR 9 /* P0 Length Register */
#define PR_P1BR 10 /* P1 Base Register */
#define PR_P1LR 11 /* P1 Length Register */
#define PR_SBR 12 /* System Base Register */
#define PR_SLR 13 /* System Limit Register */
#define PR_PCBB 16 /* Process Control Block Base */
#define PR_SCBB 17 /* System Control Block Base */
#define PR_IPL 18 /* Interrupt Priority Level */
#define PR_ASTLVL 19 /* AST Level */
#define PR_SIRR 20 /* Software Interrupt Request */
#define PR_SISR 21 /* Software Interrupt Summary */
#define PR_MCSR 23 /* Machine Check Status Register 11/750 */
#define PR_ICCS 24 /* Interval Clock Control */
#define PR_NICR 25 /* Next Interval Count */
#define PR_ICR 26 /* Interval Count */
#define PR_TODR 27 /* Time Of Year (optional) */
#define PR_RXCS 32 /* Console Receiver C/S */
#define PR_RXDB 33 /* Console Receiver D/B */
#define PR_TXCS 34 /* Console Transmit C/S */
#define PR_TXDB 35 /* Console Transmit D/B */
#define PR_TBDR 36 /* Translation Buffer Group Disable Register 11/750 */
#define PR_IUR 37 /* Initialize Unibus Register 11/750 */
#define PR_MCESR 38 /* Machiune Check Error Summary Register 11/750 */
#define PR_MAPEN 56 /* Memory Management Enable */
#define PR_TBIA 57 /* Trans. Buf. Invalidate All */
#define PR_TBIS 58 /* Trans. Buf. Invalidate Single */
#define PR_PMR 61 /* Performance Monnitor Enable */
#define PR_SID 62 /* System ID Register */
#define PR_TBCHK 63 /* Translation Buffer Check */
/* Definitions for AST */
#define AST_NO 4
#define AST_OK 3
#define mtpr(val,reg) \
{ \
asm __volatile ("mtpr %0,%1" \
: /* No output */ \
: "g" (val), "g" (reg)); \
}
#define mfpr(reg) \
({ \
register int val; \
asm __volatile ("mfpr %1,%0" \
: "=g" (val) \
: "g" (reg)); \
val; \
})

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/*-
* Copyright (c) 1982, 1986 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)nexus.h 7.3 (Berkeley) 5/9/91
* $Id: nexus.h,v 1.1 1994/08/02 20:20:39 ragge Exp $
*/
/*
* Information about nexus's.
*
* Each machine has an address of backplane slots (nexi).
* Each nexus is some type of adapter, whose code is the low
* byte of the first word of the adapter address space.
* At boot time the system looks through the array of available
* slots and finds the interconnects for the machine.
*/
#define IO_CMI750 2
#define MAXNMCR 1
#define NNEXSBI 16
#if VAX8600
#define NNEX8600 NNEXSBI
#define NEXA8600 ((struct nexus *)(0x20000000))
#define NEXB8600 ((struct nexus *)(0x22000000))
#endif
#if VAX780
#define NNEX780 NNEXSBI
#define NEX780 ((struct nexus *)0x20000000)
#endif
#if VAX750
#define NNEX750 NNEXSBI
#ifndef ASSEMBLER
#define NEX750 ((struct nexus*)0xf20000)
#else
#define NEX750 (0xF20000)
#endif
#endif
#if VAX730
#define NNEX730 NNEXSBI
#define NEX730 ((struct nexus *)0xf20000)
#endif
#define NEXSIZE 0x2000
#if VAX8600
#define MAXNNEXUS (2 * NNEXSBI)
#else
#define MAXNNEXUS NNEXSBI
#endif
#ifndef ASSEMBLER
#include "sys/types.h"
struct nexus {
union nexcsr {
long nex_csr;
u_char nex_type;
} nexcsr;
long nex_pad[NEXSIZE / sizeof (long) - 1];
};
struct iobus {
int io_type;
int io_addr;
int io_size;
int io_details;
};
struct nexusconnect {
int psb_nnexus;
struct nexus *psb_nexbase;
int psb_ubatype;
int psb_nubabdp;
caddr_t *psb_umaddr;
int *psb_nextype;
};
extern caddr_t *nex_vec;
#define nex_vec_num(ipl, nexnum) nex_vec[(ipl-14)*16+nexnum]
/* XXX
#ifdef KERNEL
struct nexus nexus[MAXNNEXUS];
#endif
*/
#endif
/*
* Bits in high word of nexus's.
*/
#define SBI_PARFLT (1<<31) /* sbi parity fault */
#define SBI_WSQFLT (1<<30) /* write sequence fault */
#define SBI_URDFLT (1<<29) /* unexpected read data fault */
#define SBI_ISQFLT (1<<28) /* interlock sequence fault */
#define SBI_MXTFLT (1<<27) /* multiple transmitter fault */
#define SBI_XMTFLT (1<<26) /* transmit fault */
#define NEX_CFGFLT (0xfc000000)
#ifndef LOCORE
#if defined(VAX780) || defined(VAX8600)
#define NEXFLT_BITS \
"\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT"
#endif
#endif
#define NEX_APD (1<<23) /* adaptor power down */
#define NEX_APU (1<<22) /* adaptor power up */
#define MBA_OT (1<<21) /* overtemperature */
#define UBA_UBINIT (1<<18) /* unibus init */
#define UBA_UBPDN (1<<17) /* unibus power down */
#define UBA_UBIC (1<<16) /* unibus initialization complete */
/*
* Types for nex_type.
*/
#define NEX_ANY 0 /* pseudo for handling 11/750 */
#define NEX_MEM4 0x08 /* 4K chips, non-interleaved mem */
#define NEX_MEM4I 0x09 /* 4K chips, interleaved mem */
#define NEX_MEM16 0x10 /* 16K chips, non-interleaved mem */
#define NEX_MEM16I 0x11 /* 16K chips, interleaved mem */
#define NEX_MBA 0x20 /* Massbus adaptor */
#define NEX_UBA0 0x28 /* Unibus adaptor */
#define NEX_UBA1 0x29 /* 4 flavours for 4 addr spaces */
#define NEX_UBA2 0x2a
#define NEX_UBA3 0x2b
#define NEX_DR32 0x30 /* DR32 user i'face to SBI */
#define NEX_CI 0x38 /* CI adaptor */
#define NEX_MPM0 0x40 /* Multi-port mem */
#define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */
#define NEX_MPM2 0x42
#define NEX_MPM3 0x43
#define NEX_MEM64L 0x68 /* 64K chips, non-interleaved, lower */
#define NEX_MEM64LI 0x69 /* 64K chips, ext-interleaved, lower */
#define NEX_MEM64U 0x6a /* 64K chips, non-interleaved, upper */
#define NEX_MEM64UI 0x6b /* 64K chips, ext-interleaved, upper */
#define NEX_MEM64I 0x6c /* 64K chips, interleaved */
#define NEX_MEM256L 0x70 /* 256K chips, non-interleaved, lower */
#define NEX_MEM256LI 0x71 /* 256K chips, ext-interleaved, lower */
#define NEX_MEM256U 0x72 /* 256K chips, non-interleaved, upper */
#define NEX_MEM256UI 0x73 /* 256K chips, ext-interleaved, upper */
#define NEX_MEM256I 0x74 /* 256K chips, interleaved */

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/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* Modified for VAX 940213/Ragge
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)param.h 5.8 (Berkeley) 6/28/91
* $Id: param.h,v 1.1 1994/08/02 20:20:40 ragge Exp $
*/
#ifndef PARAM_H
#define PARAM_H
#include "psl.h"
/*
* Machine dependent constants for VAX.
*/
#define MACHINE "vax"
#define MID_MACHINE MID_VAX
#define UNIX "vmunix"
/*
* Round p (pointer or byte index) up to a correctly-aligned value
* for all data types (int, long, ...). The result is u_int and
* must be cast to any desired pointer type.
*/
#define ALIGNBYTES (sizeof(int) - 1)
#define ALIGN(p) (((u_int)(p) + ALIGNBYTES) &~ ALIGNBYTES)
#define PGSHIFT 9 /* LOG2(NBPG) */
#define NBPG (1<<PGSHIFT) /* (1 << PGSHIFT) bytes/page */
#define PGOFSET (NBPG-1) /* byte offset into page */
#define NPTEPG (NBPG/(sizeof (struct pte)))
#define KERNBASE 0x80000000 /* start of kernel virtual */
#define BTOPKERNBASE ((u_long)KERNBASE >> PGSHIFT)
#define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */
#define DEV_BSIZE (1 << DEV_BSHIFT)
#define BLKDEV_IOSIZE 2048
#define MAXPHYS (63 * 1024) /* max raw I/O transfer size */
#define CLSIZELOG2 2
#define CLSIZE (1 << CLSIZELOG2)
/* NOTE: SSIZE, SINCR and UPAGES must be multiples of CLSIZE */
#define SSIZE 4 /* initial stack size/NBPG */
#define SINCR 4 /* increment of stack/NBPG */
#define UPAGES 16 /* pages of u-area */
/*
* Constants related to network buffer management.
* MCLBYTES must be no larger than CLBYTES (the software page size), and,
* on machines that exchange pages of input or output buffers with mbuf
* clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
* of the hardware page size.
*/
#ifndef MSIZE
#define MSIZE 128 /* size of an mbuf */
#endif /* MSIZE */
#ifndef MCLSHIFT
#define MCLSHIFT 10 /* convert bytes to m_buf clusters */
#endif /* MCLSHIFT */
#define MCLBYTES (1 << MCLSHIFT) /* size of an m_buf cluster */
#define MCLOFSET (MCLBYTES - 1) /* offset within an m_buf cluster */
#ifndef NMBCLUSTERS
#ifdef GATEWAY
#define NMBCLUSTERS 512 /* map size, max cluster allocation */
#else
#define NMBCLUSTERS 256 /* map size, max cluster allocation */
#endif /* GATEWAY */
#endif /* NMBCLUSTERS */
/*
* Size of kernel malloc arena in CLBYTES-sized logical pages
*/
#ifndef NKMEMCLUSTERS
#define NKMEMCLUSTERS (512*1024/CLBYTES)
#endif
/*
* Some macros for units conversion
*/
/* Core clicks (4096 bytes) to segments and vice versa */
#define ctos(x) (x)
#define stoc(x) (x)
/* Core clicks (4096 bytes) to disk blocks */
#define ctod(x) ((x)<<(PGSHIFT-DEV_BSHIFT))
#define dtoc(x) ((x)>>(PGSHIFT-DEV_BSHIFT))
#define dtob(x) ((x)<<DEV_BSHIFT)
/* clicks to bytes */
#define ctob(x) ((x)<<PGSHIFT)
/* bytes to clicks */
#define btoc(x) (((unsigned)(x)+(NBPG-1))>>PGSHIFT)
#define btodb(bytes) /* calculates (bytes / DEV_BSIZE) */ \
((unsigned)(bytes) >> DEV_BSHIFT)
#define dbtob(db) /* calculates (db * DEV_BSIZE) */ \
((unsigned)(db) << DEV_BSHIFT)
/*
* Map a ``block device block'' to a file system block.
* This should be device dependent, and will be if we
* add an entry to cdevsw/bdevsw for that purpose.
* For now though just use DEV_BSIZE.
*/
#define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE/DEV_BSIZE))
/*
* Mach derived conversion macros
*/
#define vax_round_pdr(x) ((((unsigned)(x)) + NBPDR - 1) & ~(NBPDR-1))
#define vax_trunc_pdr(x) ((unsigned)(x) & ~(NBPDR-1))
#define vax_round_page(x) ((((unsigned)(x)) + NBPG - 1) & ~(NBPG-1))
#define vax_trunc_page(x) ((unsigned)(x) & ~(NBPG-1))
#define vax_btod(x) ((unsigned)(x) >> PDRSHIFT)
#define vax_dtob(x) ((unsigned)(x) << PDRSHIFT)
#define vax_btop(x) ((unsigned)(x) >> PGSHIFT)
#define vax_ptob(x) ((unsigned)(x) << PGSHIFT)
#define DELAY(x) kern_delay(x)
/*
#define _spl(s) \
({ \
register int _spl_r; \
\
asm __volatile ("mfpr $18,%0; mtpr $%1,$18; " : \
"&=r" (_spl_r) : "ir" (s)); \
_spl_r; \
})
*/
/* spl0 requires checking for software interrupts */
#define splsoftclock() _spl(PSL2IPL(PSL_IPL08))
#define splnet() _spl(PSL2IPL(PSL_IPL0C))
#define spl4() _spl(PSL2IPL(PSL_IPL14))
#define spltty() _spl(PSL2IPL(PSL_IPL15))
#define splbio() _spl(PSL2IPL(PSL_IPL15))
#define splimp() _spl(PSL2IPL(PSL_IPL16))
#define splclock() _spl(PSL2IPL(PSL_IPL18))
#define splhigh() _spl(PSL2IPL(PSL_IPL1F))
#define splstatclock() splclock()
/*
#define splvm() _spl(PSL2IPL(PSL_IPL14))
#define splsched() _spl(PSL2IPL(PSL_IPL14))
*/
/* watch out for side effects */
#define splx(s) (s ? _spl(s) : spl0())
#define ovbcopy(x,y,z) bcopy(x,y,z) /* This should work i hope... */
#endif

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: pcb.h,v 1.1 1994/08/02 20:20:42 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
struct pcb {
/* Hardware registers */
long KSP; /* Kernel Stack Pointer */
long ESP; /* Executive Stack Pointer */
long SSP; /* Supervisor Stack Pointer */
long USP; /* User Stack Pointer */
long R[12]; /* Register 0-11 */
long AP; /* Argument Pointer */
long FP; /* Frame Pointer */
long PC; /* Program Counter */
long PSL; /* Program Status Longword */
void *P0BR; /* Page 0 Base Register */
long P0LR; /* Page 0 Length Register */
void *P1BR; /* Page 1 Base Register */
long P1LR; /* Page 1 Length Register */
/* Software registers */
};

123
sys/arch/vax/include/pmap.h Normal file
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/*
* Copyright (c) 1987 Carnegie-Mellon University
* Copyright (c) 1991 Regents of the University of California.
* All rights reserved.
*
* Changed for the VAX port. /IC
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)pmap.h 7.6 (Berkeley) 5/10/91
* $Id: pmap.h,v 1.1 1994/08/02 20:20:44 ragge Exp $
*/
#ifndef PMAP_H
#define PMAP_H
#include "vm/vm_param.h"
#include "vm/lock.h"
/* #include "vm/vm_statistics.h" */
#define VAX_PAGE_SIZE NBPG
#define VAX_SEG_SIZE NBSEG
/*
* Pmap structure
*/
/* XXX Should reside in #include "include/pmap.h" */
typedef struct pmap {
simple_lock_data_t lock; /* lock on pmap */
int ref_count; /* reference count */
struct pmap_statistics stats; /* statistics */
struct pmap *next; /* list for free pmaps */
struct pte *pm_ptab; /* KVA of page table */
} *pmap_t;
#if 0
struct pmap {
struct pte *pm_ptab; /* KVA of page table */
short pm_count; /* pmap reference count */
simple_lock_data_t pm_lock; /* lock on pmap */
};
#endif
/*typedef struct pmap *pmap_t;*/
extern pmap_t kernel_pmap;
/*
* Macros for speed
*/
#define PMAP_ACTIVATE(pmapp, pcbp, iscurproc) \
if ((pmapp) != NULL && (pmapp)->pm_stchanged) { \
(pcbp)->pcb_ustp = \
vax_btop(pmap_extract(kernel_pmap, (pmapp)->pm_stab)); \
if (iscurproc) \
loadustp((pcbp)->pcb_ustp); \
(pmapp)->pm_stchanged = FALSE; \
}
#define PMAP_DEACTIVATE(pmapp, pcbp)
/*
* For each vm_page_t, there is a list of all currently valid virtual
* mappings of that page. An entry is a pv_entry_t, the list is pv_table.
*/
typedef struct pv_entry {
struct pv_entry *pv_next; /* next pv_entry */
struct pmap *pv_pmap; /* if not NULL, pmap where mapping lies */
vm_offset_t pv_va; /* virtual address for mapping */
int pv_flags; /* flags */
} *pv_entry_t;
#define PV_CI 0x01 /* all entries must be cache inhibited */
#define PV_PTPAGE 0x02 /* entry maps a page table page */
#ifdef KERNEL
pv_entry_t pv_table; /* array of entries, one per page */
#define pa_index(pa) atop(pa)
#define pa_to_pvh(pa) (&pv_table[atop(pa)])
#define pmap_kernel() (kernel_pmap)
/* #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) */
extern struct pte *Sysmap;
extern char *vmmap; /* map for mem, dumps, etc. */
#endif KERNEL
#endif PMAP_H

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/*
* Copyright (c) 1991 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)proc.h 7.1 (Berkeley) 5/15/91
* $Id: proc.h,v 1.1 1994/08/02 20:20:46 ragge Exp $
*/
/*
* Machine-dependent part of the proc structure for hp300.
*/
struct mdproc {
int md_flags; /* machine-dependent flags */
#if 0
int *md_regs; /* registers on current frame */
#endif
};
/* md_flags */
#define MDP_AST 0x0001 /* async trap pending */

111
sys/arch/vax/include/psl.h Normal file
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/*
* Rewritten for the VAX port. Based on Berkeley code. /IC
*
* Copyright (c) 1982, 1986 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)psl.h 7.2 (Berkeley) 5/4/91
* $Id: psl.h,v 1.1 1994/08/02 20:20:47 ragge Exp $
*/
#ifndef PSL_C
/*
* VAX program status longword
*/
#define PSL_C 0x00000001 /* carry bit */
#define PSL_V 0x00000002 /* overflow bit */
#define PSL_Z 0x00000004 /* zero bit */
#define PSL_N 0x00000008 /* negative bit */
#define PSL_ALLCC 0x0000000F /* all cc bits - unlikely */
#define PSL_T 0x00000010 /* trace enable bit */
#define PSL_IPL00 0x00000000 /* interrupt priority level 0 */
#define PSL_IPL01 0x00010000 /* interrupt priority level 1 */
#define PSL_IPL02 0x00020000 /* interrupt priority level 2 */
#define PSL_IPL03 0x00030000 /* interrupt priority level 3 */
#define PSL_IPL04 0x00040000 /* interrupt priority level 4 */
#define PSL_IPL05 0x00050000 /* interrupt priority level 5 */
#define PSL_IPL06 0x00060000 /* interrupt priority level 6 */
#define PSL_IPL07 0x00070000 /* interrupt priority level 7 */
#define PSL_IPL08 0x00080000 /* interrupt priority level 8 */
#define PSL_IPL09 0x00090000 /* interrupt priority level 9 */
#define PSL_IPL0A 0x000a0000 /* interrupt priority level 10 */
#define PSL_IPL0B 0x000b0000 /* interrupt priority level 11 */
#define PSL_IPL0C 0x000c0000 /* interrupt priority level 12 */
#define PSL_IPL0D 0x000d0000 /* interrupt priority level 13 */
#define PSL_IPL0E 0x000e0000 /* interrupt priority level 14 */
#define PSL_IPL0F 0x000f0000 /* interrupt priority level 15 */
#define PSL_IPL10 0x00100000 /* interrupt priority level 16 */
#define PSL_IPL11 0x00110000 /* interrupt priority level 17 */
#define PSL_IPL12 0x00120000 /* interrupt priority level 18 */
#define PSL_IPL13 0x00130000 /* interrupt priority level 19 */
#define PSL_IPL14 0x00140000 /* interrupt priority level 20 */
#define PSL_IPL15 0x00150000 /* interrupt priority level 21 */
#define PSL_IPL16 0x00160000 /* interrupt priority level 22 */
#define PSL_IPL17 0x00170000 /* interrupt priority level 23 */
#define PSL_IPL18 0x00180000 /* interrupt priority level 24 */
#define PSL_IPL19 0x00190000 /* interrupt priority level 25 */
#define PSL_IPL1A 0x001a0000 /* interrupt priority level 26 */
#define PSL_IPL1B 0x001b0000 /* interrupt priority level 27 */
#define PSL_IPL1C 0x001c0000 /* interrupt priority level 28 */
#define PSL_IPL1D 0x001d0000 /* interrupt priority level 29 */
#define PSL_IPL1E 0x001e0000 /* interrupt priority level 30 */
#define PSL_IPL1F 0x001f0000 /* interrupt priority level 31 */
#define PSL_K 0x00000000 /* user mode */
#define PSL_E 0x01000000 /* supervisor mode */
#define PSL_S 0x02000000 /* executive mode */
#define PSL_U 0x03000000 /* kernel mode */
#define PSL_IS 0x04000000 /* interrupt stack select */
#define PSL_FPD 0x04000000 /* first part done flag */
#define PSL_TP 0x40000000 /* trace pending */
#define PSL_CM 0x80000000 /* compatibility mode */
#define PSL_LOWIPL (PSL_K)
#define PSL_HIGHIPL (PSL_K | PSL_IPL1F)
#define PSL_IPL (PSL_IPL1F)
#define PSL_USER (0)
#define PSL_MBZ 0x3020ff00 /* must be zero bits */
#define PSL_USERSET (0)
#define PSL_USERCLR (PSL_S | PSL_IPL1F | PSL_MBZ)
/*
* Macros to decode processor status word.
*/
#define CLKF_USERMODE(framep) ((((framep)->ps) & (PSL_U)) != 0)
#define CLKF_BASEPRI(framep) ((((framep)->ps) & (PSL_IPL1F)) == 0)
#define CLKF_PC(framep) ((framep)->pc)
#define CLKF_INTR(framep) 0
#define PSL2IPL(ps) ((ps) >> 16)
#endif

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: pte.h,v 1.1 1994/08/02 20:20:50 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#ifndef ASSEMBLER
/*
* VAX page table entries
*/
struct pte {
unsigned int pg_pfn:21; /* Page Frame Number or 0 */
unsigned int pg_u:1; /* Uniform bit, does WHAT?? XXX */
unsigned int pg_w:1; /* Wired bit */
unsigned int pg_sref:1; /* Help for ref simulation */
unsigned int pg_ref:1; /* Simulated reference bit */
unsigned int pg_z:1; /* Zero DIGITAL = 0 */
unsigned int pg_m:1; /* Modify DIGITAL */
unsigned int pg_prot:4; /* reserved at zero */
unsigned int pg_v:1; /* valid bit */
};
typedef struct pte pt_entry_t; /* Mach page table entry */
#endif ASSEMBLER
#define PT_ENTRY_NULL ((pt_entry_t *) 0)
#define PG_V 0x80000000
#define PG_NV 0x00000000
#define PG_PROT 0x78000000
#define PG_RW 0x20000000
#define PG_KW 0x10000000
#define PG_RO 0x78000000
#define PG_NONE 0x00000000
#define PG_M 0x04000000
#define PG_REF 0x01000000
#define PG_SREF 0x00800000
#define PG_W 0x00400000
#define PG_U 0x00200000
#define PG_FRAME 0x001fffff
#define PG_SHIFT 9
#define PG_PFNUM(x) ((x) >> PG_SHIFT)
#define VAX_MAX_KPTSIZE VM_KERNEL_PT_PAGES
#ifndef ASSEMBLER
extern struct pte *Sysmap;
/*
* Kernel virtual address to page table entry and to physical address.
*/
#endif
#define kvtopte(va) \
(&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT])
#define ptetokv(pt) \
((((pt_entry_t *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
#define kvtophys(va) \
((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET))

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: ptrace.h,v 1.1 1994/08/02 20:20:51 ragge Exp $
*/
/* All bugs are subject to removal without further notice */

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: reg.h,v 1.1 1994/08/02 20:20:53 ragge Exp $
*/
/* All bugs are subject to removal without further notice */

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: scb.h,v 1.1 1994/08/02 20:20:56 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
struct scb {
};

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: sid.h,v 1.1 1994/08/02 20:20:57 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#define VAX_780 1
#define VAX_750 2
#define VAX_730 3
#define VAX_8600 4
#define VAX_8200 5
#define VAX_8800 6
#define VAX_610 7
#define VAX_630 8
#define VAX_650 10
#define MACHID(x) ((x>>24)&255)
#define V750UCODE(x) ((x>>8)&255)
#define V750HARDW(x) (cpu_type&255)
extern int cpu_type;
/* Definitioner f|r system id register */
/*
union cpusid {
int cpusid;
struct cpu750 {
int cp_hrev:8,
cp_urev:8,
:8,
cpu:8;
}
struct cpuany {
int :24,
cp_type:8;
}
};
*/

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: signal.h,v 1.1 1994/08/02 20:20:58 ragge Exp $
*/
/* All bugs are subject to removal without further notice */

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/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)stdarg.h 7.2 (Berkeley) 5/4/91
* $Id: stdarg.h,v 1.1 1994/08/02 20:21:00 ragge Exp $
*/
typedef char *va_list;
#ifdef KERNEL
#define va_arg(ap, type) \
((type *)(ap += sizeof(type)))[-1]
#else
#define va_arg(ap, type) \
((type *)(ap += sizeof(type) < sizeof(int) ? \
(abort(), 0) : sizeof(type)))[-1]
#endif
#define va_end(ap)
#define __va_promote(type) \
(((sizeof(type) + sizeof(int) - 1) / sizeof(int)) * sizeof(int))
#define va_start(ap, last) \
(ap = ((char *)&(last) + __va_promote(last)))

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/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)trap.h 5.4 (Berkeley) 5/9/91
* $Id: trap.h,v 1.1 1994/08/02 20:21:01 ragge Exp $
*/
/*
* Trap type values
* also known in trap.c for name strings
*/
#define T_RESADFLT 0 /* reserved addressing */
#define T_PRIVINFLT 1 /* privileged instruction */
#define T_RESOPFLT 2 /* reserved operand */
#define T_BPTFLT 3 /* breakpoint instruction */
#define T_SYSCALL 5 /* system call (kcall) */
#define T_ARITHTRAP 6 /* arithmetic trap */
#define T_ASTFLT 7 /* system forced exception */
#define T_SEGFLT 8 /* segmentation (limit) fault */
#define T_PROTFLT 9 /* protection fault */
#define T_TRCTRAP 10 /* trace trap */
/* 11: Was compatibility mode fault on VAX */
#define T_PAGEFLT 12 /* page fault */
#define T_TABLEFLT 13 /* page table fault */
/* #define T_ALIGNFLT 14 /* alignment fault */
/* #define T_KSPNOTVAL 15 /* kernel stack pointer not valid */
/* #define T_BUSERR 16 /* bus error */
#define T_KDBTRAP 17 /* kernel debugger trap */
/* #define T_DIVIDE 18 /* integer divide fault */
/* #define T_NMI 19 /* non-maskable trap */
/* #define T_OFLOW 20 /* overflow trap */
/* #define T_BOUND 21 /* bound instruction fault */
/* #define T_DNA 22 /* device not available fault */
/* #define T_DOUBLEFLT 23 /* double fault */
/* #define T_FPOPFLT 24 /* fp coprocessor operand fetch fault */
/* #define T_TSSFLT 25 /* invalid tss fault */
/* #define T_SEGNPFLT 26 /* segment not present fault */
/* #define T_STKFLT 27 /* stack fault */
/* #define T_RESERVED 28 /* reserved fault base */
/* definitions for <sys/signal.h> */
#define ILL_RESAD_FAULT T_RESADFLT
#define ILL_PRIVIN_FAULT T_PRIVINFLT
#define ILL_RESOP_FAULT T_RESOPFLT
#define ILL_ALIGN_FAULT T_ALIGNFLT
#define ILL_FPOP_FAULT T_FPOPFLT /* coprocessor operand fault */
/* codes for SIGFPE/ARITHTRAP */
#define FPE_INTOVF_TRAP 0x1 /* integer overflow */
#define FPE_INTDIV_TRAP 0x2 /* integer divide by zero */
#define FPE_FLTDIV_TRAP 0x3 /* floating/decimal divide by zero */
#define FPE_FLTOVF_TRAP 0x4 /* floating overflow */
#define FPE_FLTUND_TRAP 0x5 /* floating underflow */
#define FPE_FPU_NP_TRAP 0x6 /* floating point unit not present */
#define FPE_SUBRNG_TRAP 0x7 /* subrange out of bounds */
/* codes for SIGBUS */
#define BUS_PAGE_FAULT T_PAGEFLT /* page fault protection base */
#define BUS_SEGNP_FAULT T_SEGNPFLT /* segment not present */
#define BUS_STK_FAULT T_STKFLT /* stack segment */
#define BUS_SEGM_FAULT T_RESERVED /* segment protection base */
/* Trap's coming from user mode */
/* #define T_USER 0x100 */

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/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)types.h 7.5 (Berkeley) 3/9/91
* $Id: types.h,v 1.1 1994/08/02 20:21:03 ragge Exp $
*/
#ifndef _MACHTYPES_H_
#define _MACHTYPES_H_
/*
typedef struct _physadr {
int r[1];
} *physadr;
typedef struct label_t {
int val[6];
} label_t;
*/
typedef u_long vm_offset_t;
typedef u_long vm_size_t;
#endif /* _MACHTYPES_H_ */

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/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)varargs.h 5.3 (Berkeley) 4/3/91
* $Id: varargs.h,v 1.1 1994/08/02 20:21:04 ragge Exp $
*/
#ifndef _MACHINE_VARARGS_H_
#define _MACHINE_VARARGS_H_
#include <machine/stdarg.h>
#undef va_dcl
#define va_dcl int va_alist;
#undef va_start
#define va_start(ap) \
ap = (char *)&va_alist
#endif /* !_MACHINE_VARARGS_H_ */

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/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Slightly modified for the VAX port /IC
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91
* $Id: vmparam.h,v 1.1 1994/08/02 20:21:05 ragge Exp $
*/
#ifndef ASSEMBLER
#include <vm/vm_param.h>
#endif
/*
* Machine dependent constants for VAX.
*/
/*
* Virtual address space arrangement. On 386, both user and kernel
* share the address space, not unlike the vax.
* USRTEXT is the start of the user text/data space, while USRSTACK
* is the top (end) of the user stack. Immediately above the user stack
* resides the user structure, which is UPAGES long and contains the
* kernel stack.
*
*/
#define USRTEXT 0
#define USRSTACK 0x80000000
/*#define BTOPUSRSTACK (0xFDC00-(UPAGES)) /* btop(USRSTACK) */
/*#define LOWPAGES 0 */
/*#define HIGHPAGES UPAGES */
/*
* Virtual memory related constants, all in bytes
*/
#ifndef MAXTSIZ
#define MAXTSIZ (4*1024*1024) /* max text size */
#endif
#ifndef MAXDSIZ
#define MAXDSIZ (10*1024*1024) /* max data size */
#endif
#ifndef MAXSSIZ
#define MAXSSIZ (2*1024*1024) /* max stack size */
#endif
#ifndef DFLDSIZ
#define DFLDSIZ (4*1024*1024) /* initial data size limit */
#endif
#ifndef DFLSSIZ
#define DFLSSIZ (512*1024) /* initial stack size limit */
#endif
/* (We think) the page table will only need to grow this much */
#define VAX_MAX_PT_SIZE ((MAXTSIZ+MAXDSIZ+MAXSSIZ)/0x80)
/*
* Default sizes of swap allocation chunks (see dmap.h).
* The actual values may be changed in vminit() based on MAXDSIZ.
* With MAXDSIZ of 16Mb and NDMAP of 38, dmmax will be 1024.
*/
#define DMMIN 32 /* smallest swap allocation */
#define DMMAX 4096 /* largest potential swap allocation */
#define DMTEXT 1024 /* swap allocation for text */
/*
* Size of shared memory map
*/
#ifndef SHMMAXPGS
#define SHMMAXPGS 64 /* XXXX should be 1024 */
#endif
/*
* Sizes of the system and user portions of the system page table.
*/
/*
#define SYSPTSIZE (2*NPTEPG)
#define USRPTSIZE (2*NPTEPG)
*/
/*
* Size of User Raw I/O map
*/
/* #define USRIOSIZE 300 */
/*
* The size of the clock loop.
*/
/* #define LOOPPAGES (maxfree - firstfree) */
/*
* The time for a process to be blocked before being very swappable.
* This is a number of seconds which the system takes as being a non-trivial
* amount of real time. You probably shouldn't change this;
* it is used in subtle ways (fractions and multiples of it are, that is, like
* half of a ``long time'', almost a long time, etc.)
* It is related to human patience and other factors which don't really
* change over time.
*/
#define MAXSLP 20
/*
* A swapped in process is given a small amount of core without being bothered
* by the page replacement algorithm. Basically this says that if you are
* swapped in you deserve some resources. We protect the last SAFERSS
* pages against paging and will just swap you out rather than paging you.
* Note that each process has at least UPAGES+CLSIZE pages which are not
* paged anyways (this is currently 8+2=10 pages or 5k bytes), so this
* number just means a swapped in process is given around 25k bytes.
* Just for fun: current memory prices are 4600$ a megabyte on VAX (4/22/81),
* so we loan each swapped in process memory worth 100$, or just admit
* that we don't consider it worthwhile and swap it out to disk which costs
* $30/mb or about $0.75.
*/
#define SAFERSS 8 /* nominal ``small'' resident set size
protected against replacement */
/*
* DISKRPM is used to estimate the number of paging i/o operations
* which one can expect from a single disk controller.
*/
/* #define DISKRPM 60 */
/*
* Klustering constants. Klustering is the gathering
* of pages together for pagein/pageout, while clustering
* is the treatment of hardware page size as though it were
* larger than it really is.
*
* KLMAX gives maximum cluster size in CLSIZE page (cluster-page)
* units. Note that KLMAX*CLSIZE must be <= DMMIN in dmap.h.
*/
/*#define KLMAX (4/CLSIZE) /* */
/*#define KLSEQL (2/CLSIZE) /* in klust if vadvise(VA_SEQL) */
/*#define KLIN (4/CLSIZE) /* default data/stack in klust */
/*#define KLTXT (4/CLSIZE) /* default text in klust */
/*#define KLOUT (4/CLSIZE) /* */
/*
* KLSDIST is the advance or retard of the fifo reclaim for sequential
* processes data space.
*/
/*#define KLSDIST 3 /* klusters advance/retard for seq. fifo */
/*
* Paging thresholds (see vm_sched.c).
* Strategy of 1/19/85:
* lotsfree is 512k bytes, but at most 1/4 of memory
* desfree is 200k bytes, but at most 1/8 of memory
* minfree is 64k bytes, but at most 1/2 of desfree
*/
#define LOTSFREE (512 * 1024)
#define LOTSFREEFRACT 4
#define DESFREE (200 * 1024)
#define DESFREEFRACT 8
#define MINFREE (64 * 1024)
#define MINFREEFRACT 2
/*
* There are two clock hands, initially separated by HANDSPREAD bytes
* (but at most all of user memory). The amount of time to reclaim
* a page once the pageout process examines it increases with this
* distance and decreases as the scan rate rises.
*/
#define HANDSPREAD (2 * 1024 * 1024)
/*
* The number of times per second to recompute the desired paging rate
* and poke the pagedaemon.
*/
#define RATETOSCHEDPAGING 4
/*
* Believed threshold (in megabytes) for which interleaved
* swapping area is desirable.
*/
#define LOTSOFMEM 2
#define mapin(pte, v, pfnum, prot) \
{(*(int *)(pte) = ((pfnum)<<PGSHIFT) | (prot)) ; }
/*
* Mach derived constants
*/
/* # of kernel PT pages */
#define VM_KERNEL_PT_PAGES 2*1024 /* XXX: SYSPTSIZE */
/* Will give this # times 64 */
/* kilobytes virtual memory */
/* user/kernel map constants */
#define VM_MIN_ADDRESS ((vm_offset_t)0)
#define VM_MAXUSER_ADDRESS ((vm_offset_t)0x40000000)
#define VM_MAX_ADDRESS ((vm_offset_t)0x80000000)
#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)0x80000000)
#define VM_MAX_KERNEL_ADDRESS ((vm_offset_t)(VM_MIN_KERNEL_ADDRESS+\
(VM_KERNEL_PT_PAGES*0x10000)))
/* virtual sizes (bytes) for various kernel submaps */
#define VM_MBUF_SIZE (NMBCLUSTERS*MCLBYTES)
#define VM_KMEM_SIZE (NKMEMCLUSTERS*CLBYTES)
#define VM_PHYS_SIZE (USRIOSIZE*CLBYTES)
/* pcb base */
#define pcbb(p) ((u_int)(p)->p_addr)

1125
sys/arch/vax/uba/uba.c Normal file

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/*-
* Copyright (c) 1982, 1986 The Regents of the University of California.
* All rights reserved.
* (c) UNIX System Laboratories, Inc.
* All or some portions of this file are derived from material licensed
* to the University of California by American Telephone and Telegraph
* Co. or Unix System Laboratories, Inc. and are reproduced herein with
* the permission of UNIX System Laboratories, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)ubareg.h 7.8 (Berkeley) 5/9/91
* $Id: ubareg.h,v 1.1 1994/08/02 20:21:27 ragge Exp $
*/
/*
* VAX UNIBUS adapter registers
*/
/*
* "UNIBUS" adaptor types.
* This code is used for both UNIBUSes and Q-buses
* with different types of adaptors.
* Definition of a type includes support code for that type.
*/
#if VAX780 || VAX8600
#define DW780 1 /* has adaptor regs, sr: 780/785/8600 */
#else
#undef DW780
#endif
#if VAX750
#define DW750 2 /* has adaptor regs, no sr: 750, 730 */
#endif
#if VAX730
#define DW730 3 /* has adaptor regs, no sr: 750, 730 */
#endif
#if VAX630 || VAX650
#define QBA 4 /* 22-bit Q-bus, no adaptor regs: uVAX II */
#endif
#if VAX8200 || VAX8500 || VAX8800
#define DWBUA 5 /* BI UNIBUS adaptor: 8200/8500/8800 */
#endif
/*
* Size of unibus memory address space in pages
* (also number of map registers).
* QBAPAGES should be 8192, but we don't need nearly that much
* address space, and the return from the allocation routine
* can accommodate at most 2047 (ubavar.h: UBA_MAXMR);
* QBAPAGES must be at least UBAPAGES. Choose pragmatically.
*/
#define UBAPAGES 496
#define NUBMREG 496
#if defined(GATEWAY) && !defined(QNIVERT)
#define QBAPAGES 1024
#else
#define QBAPAGES UBAPAGES
#endif
#define UBAIOADDR 0760000 /* start of I/O page */
#define UBAIOPAGES 16
#ifndef LOCORE
/*
* DWBUA hardware registers.
*/
struct dwbua_regs {
int pad1[456]; /* actually bii regs + pad */
int bua_csr; /* control and status register */
int bua_offset; /* vector offset register */
int bua_fubar; /* failed UNIBUS address register */
int bua_bifar; /* BI failed address register */
int bua_udiag[5]; /* micro diagnostics (R/O) */
int pad2[3];
/* dpr[0] is for DDP; dpr's 1 through 5 are for BPD's 1 through 5 */
int bua_dpr[6]; /* data path registers */
int pad3[10];
int bua_bdps[20]; /* buffered data path space *//*???*/
int pad4[8];
struct pte bua_map[UBAPAGES]; /* unibus map registers */
int pad5[UBAIOPAGES]; /* no maps for device address space */
};
#ifdef DWBUA
/* bua_csr */
#define BUACSR_ERR 0x80000000 /* composite error */
#define BUACSR_BIF 0x10000000 /* BI failure */
#define BUACSR_SSYNTO 0x08000000 /* slave sync timeout */
#define BUACSR_UIE 0x04000000 /* unibus interlock error */
#define BUACSR_IVMR 0x02000000 /* invalid map register */
#define BUACSR_BADBDP 0x01000000 /* bad BDP select */
#define BUACSR_BUAEIE 0x00100000 /* bua error interrupt enable (?) */
#define BUACSR_UPI 0x00020000 /* unibus power init */
#define BUACSR_UREGDUMP 0x00010000 /* microdiag register dump */
#define BUACSR_IERRNO 0x000000ff /* mask for internal errror number */
/* bua_offset */
#define BUAOFFSET_MASK 0x00003e00 /* hence max offset = 15872 */
/* bua_dpr */
#define BUADPR_DPSEL 0x00e00000 /* data path select (?) */
#define BUADPR_PURGE 0x00000001 /* purge bdp */
/* bua_map -- in particular, those bits that are not in DW780s & DW750s */
#define BUAMR_IOADR 0x40000000 /* I/O address space */
#define BUAMR_LAE 0x04000000 /* longword access enable */
/* I see no reason to use either one, though ... act 6 Aug 1987 */
#define UBA_PURGEBUA(uba, bdp) \
(((struct dwbua_regs *)(uba))->bua_dpr[bdp] |= BUADPR_PURGE)
#else
#define UBA_PURGEBUA(uba, bdp)
#endif
/*
* DW780/DW750 hardware registers
*/
struct uba_regs {
int uba_cnfgr; /* configuration register */
int uba_cr; /* control register */
int uba_sr; /* status register */
int uba_dcr; /* diagnostic control register */
int uba_fmer; /* failed map entry register */
int uba_fubar; /* failed UNIBUS address register */
int pad1[2];
int uba_brsvr[4];
int uba_brrvr[4]; /* receive vector registers */
int uba_dpr[16]; /* buffered data path register */
int pad2[480];
struct pte uba_map[UBAPAGES]; /* unibus map register */
int pad3[UBAIOPAGES]; /* no maps for device address space */
};
#endif
#ifdef DW780
/* uba_cnfgr */
#define UBACNFGR_UBINIT 0x00040000 /* unibus init asserted */
#define UBACNFGR_UBPDN 0x00020000 /* unibus power down */
#define UBACNFGR_UBIC 0x00010000 /* unibus init complete */
#define UBACNFGR_BITS \
"\40\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT\30ADPDN\27ADPUP\23UBINIT\22UBPDN\21UBIC"
/* uba_cr */
#define UBACR_MRD16 0x40000000 /* map reg disable bit 4 */
#define UBACR_MRD8 0x20000000 /* map reg disable bit 3 */
#define UBACR_MRD4 0x10000000 /* map reg disable bit 2 */
#define UBACR_MRD2 0x08000000 /* map reg disable bit 1 */
#define UBACR_MRD1 0x04000000 /* map reg disable bit 0 */
#define UBACR_IFS 0x00000040 /* interrupt field switch */
#define UBACR_BRIE 0x00000020 /* BR interrupt enable */
#define UBACR_USEFIE 0x00000010 /* UNIBUS to SBI error field IE */
#define UBACR_SUEFIE 0x00000008 /* SBI to UNIBUS error field IE */
#define UBACR_CNFIE 0x00000004 /* configuration IE */
#define UBACR_UPF 0x00000002 /* UNIBUS power fail */
#define UBACR_ADINIT 0x00000001 /* adapter init */
/* uba_sr */
#define UBASR_BR7FULL 0x08000000 /* BR7 receive vector reg full */
#define UBASR_BR6FULL 0x04000000 /* BR6 receive vector reg full */
#define UBASR_BR5FULL 0x02000000 /* BR5 receive vector reg full */
#define UBASR_BR4FULL 0x01000000 /* BR4 receive vector reg full */
#define UBASR_RDTO 0x00000400 /* UNIBUS to SBI read data timeout */
#define UBASR_RDS 0x00000200 /* read data substitute */
#define UBASR_CRD 0x00000100 /* corrected read data */
#define UBASR_CXTER 0x00000080 /* command transmit error */
#define UBASR_CXTMO 0x00000040 /* command transmit timeout */
#define UBASR_DPPE 0x00000020 /* data path parity error */
#define UBASR_IVMR 0x00000010 /* invalid map register */
#define UBASR_MRPF 0x00000008 /* map register parity failure */
#define UBASR_LEB 0x00000004 /* lost error */
#define UBASR_UBSTO 0x00000002 /* UNIBUS select timeout */
#define UBASR_UBSSYNTO 0x00000001 /* UNIBUS slave sync timeout */
#define UBASR_BITS \
"\20\13RDTO\12RDS\11CRD\10CXTER\7CXTMO\6DPPE\5IVMR\4MRPF\3LEB\2UBSTO\1UBSSYNTO"
/* uba_brrvr[] */
#define UBABRRVR_AIRI 0x80000000 /* adapter interrupt request */
#define UBABRRVR_DIV 0x0000ffff /* device interrupt vector field */
#endif
/* uba_dpr */
#ifdef DW780
#define UBADPR_BNE 0x80000000 /* buffer not empty - purge */
#define UBADPR_BTE 0x40000000 /* buffer transfer error */
#define UBADPR_DPF 0x20000000 /* DP function (RO) */
#define UBADPR_BS 0x007f0000 /* buffer state field */
#define UBADPR_BUBA 0x0000ffff /* buffered UNIBUS address */
#define UBA_PURGE780(uba, bdp) \
((uba)->uba_dpr[bdp] |= UBADPR_BNE)
#else
#define UBA_PURGE780(uba, bdp)
#endif
#ifdef DW750
#define UBADPR_ERROR 0x80000000 /* error occurred */
#define UBADPR_NXM 0x40000000 /* nxm from memory */
#define UBADPR_UCE 0x20000000 /* uncorrectable error */
#define UBADPR_PURGE 0x00000001 /* purge bdp */
/* the DELAY is for a hardware problem */
#define UBA_PURGE750(uba, bdp) { \
((uba)->uba_dpr[bdp] |= (UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE)); \
DELAY(8); \
}
#else
#define UBA_PURGE750(uba, bdp)
#endif
/*
* Macros for fast buffered data path purging in time-critical routines.
*
* Too bad C pre-processor doesn't have the power of LISP in macro
* expansion...
*/
/* THIS IS WRONG, should use pointer to uba_hd */
#if DWBUA || DW780 || DW750
#define UBAPURGE(uba, bdp) { \
switch (MACHID(cpu_type)) { \
case VAX_8200: UBA_PURGEBUA(uba, bdp); break; \
case VAX_8600: case VAX_780: UBA_PURGE780((uba), (bdp)); break; \
case VAX_750: UBA_PURGE750((uba), (bdp)); break; \
} \
}
#else
#define UBAPURGE(uba, bdp)
#endif
/* uba_mr[] */
#define UBAMR_MRV 0x80000000 /* map register valid */
#define UBAMR_BO 0x02000000 /* byte offset bit */
#define UBAMR_DPDB 0x01e00000 /* data path designator field */
#define UBAMR_SBIPFN 0x001fffff /* SBI page address field */
#define UBAMR_DPSHIFT 21 /* shift to data path designator */
/*
* Number of unibus buffered data paths and possible uba's per cpu type.
*/
#define NBDP8600 15
#define NBDP780 15
#define NBDPBUA 5
#define NBDP750 3
#define NBDP730 0
#define MAXNBDP 15
/*
* Symbolic BUS addresses for UBAs.
*/
#if VAX630 || VAX650
#define QBAMAP630 ((struct pte *)0x20088000)
#define QMEM630 0x30000000
#define QIOPAGE630 0x20000000
/*
* Q-bus control registers
*/
#define QIPCR 0x1f40 /* from start of iopage */
/* bits in QIPCR */
#define Q_DBIRQ 0x0001 /* doorbell interrupt request */
#define Q_LMEAE 0x0020 /* local mem external access enable */
#define Q_DBIIE 0x0040 /* doorbell interrupt enable */
#define Q_AUXHLT 0x0100 /* auxiliary processor halt */
#define Q_DMAQPE 0x8000 /* Q22 bus address space parity error */
#endif
#if VAX730
#define UMEM730 0xfc0000
#endif
#if VAX750
#define UMEM750(i) (0xfc0000-(i)*0x40000)
#endif
#if VAX780
#define UMEM780(i) (0x20100000+(i)*0x40000)
#endif
#if VAX8200 /* BEWARE, argument is node, not ubanum */
#define UMEM8200(i) (0x20400000+(i)*0x40000)
#endif
#if VAX8600
#define UMEMA8600(i) (0x20100000+(i)*0x40000)
#define UMEMB8600(i) (0x22100000+(i)*0x40000)
#endif
/*
* Macro to offset a UNIBUS device address, often expressed as
* something like 0172520, by forcing it into the last 8K
* of UNIBUS memory space.
*/
#define ubdevreg(addr) ((addr) & 017777)

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/*
* Copyright (c) 1982, 1986 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)ubavar.h 7.7 (Berkeley) 6/28/90
* $Id: ubavar.h,v 1.1 1994/08/02 20:21:28 ragge Exp $
*/
/*
* This file contains definitions related to the kernel structures
* for dealing with the unibus adapters.
*
* Each uba has a uba_hd structure.
* Each unibus controller which is not a device has a uba_ctlr structure.
* Each unibus device has a uba_device structure.
*/
#ifndef LOCORE
#include "buf.h"
/*
* Per-uba structure.
*
* This structure holds the interrupt vector for the uba,
* and its address in physical and virtual space. At boot time
* we determine the devices attached to the uba's and their
* interrupt vectors, filling in uh_vec. We free the map
* register and bdp resources of the uba into the structures
* defined here.
*
* During normal operation, resources are allocated and returned
* to the structures here. We watch the number of passive releases
* on each uba, and if the number is excessive may reset the uba.
*
* When uba resources are needed and not available, or if a device
* which can tolerate no other uba activity (rk07) gets on the bus,
* then device drivers may have to wait to get to the bus and are
* queued here. It is also possible for processes to block in
* the unibus driver in resource wait (mrwant, bdpwant); these
* wait states are also recorded here.
*/
struct uba_hd {
int uh_type; /* type of adaptor */
struct uba_regs *uh_uba; /* virt addr of uba adaptor regs */
struct uba_regs *uh_physuba; /* phys addr of uba adaptor regs */
struct pte *uh_mr; /* start of page map */
int uh_memsize; /* size of uba memory, pages */
caddr_t uh_mem; /* start of uba memory address space */
caddr_t uh_iopage; /* start of uba io page */
int (**Nuh_vec)(); /* interrupt vector */
struct uba_device *uh_actf; /* head of queue to transfer */
struct uba_device *uh_actl; /* tail of queue to transfer */
short uh_mrwant; /* someone is waiting for map reg */
short uh_bdpwant; /* someone awaits bdp's */
int uh_bdpfree; /* free bdp's */
int uh_hangcnt; /* number of ticks hung */
int uh_zvcnt; /* number of recent 0 vectors */
long uh_zvtime; /* time over which zvcnt accumulated */
int uh_zvtotal; /* total number of 0 vectors */
int uh_errcnt; /* number of errors */
int uh_lastiv; /* last free interrupt vector */
short uh_users; /* transient bdp use count */
short uh_xclu; /* an rk07 is using this uba! */
int uh_lastmem; /* limit of any unibus memory */
#define UAMSIZ 100
struct map *uh_map; /* register free map */
};
/* given a pointer to uba_regs, find DWBUA registers */
/* this should be replaced with a union in uba_hd */
#define BUA(uba) ((struct dwbua_regs *)(uba))
/*
* Per-controller structure.
* (E.g. one for each disk and tape controller, and other things
* which use and release buffered data paths.)
*
* If a controller has devices attached, then there are
* cross-referenced uba_drive structures.
* This structure is the one which is queued in unibus resource wait,
* and saves the information about unibus resources which are used.
* The queue of devices waiting to transfer is also attached here.
*/
struct uba_ctlr {
struct uba_driver *um_driver;
short um_ctlr; /* controller index in driver */
short um_ubanum; /* the uba it is on */
short um_alive; /* controller exists */
int (*um_intr)(); /* interrupt handler(s) */
caddr_t um_addr; /* address of device in i/o space */
struct uba_hd *um_hd;
/* the driver saves the prototype command here for use in its go routine */
int um_cmd; /* communication to dgo() */
int um_ubinfo; /* save unibus registers, etc */
int um_bdp; /* for controllers that hang on to bdp's */
struct buf um_tab; /* queue of devices for this controller */
};
/*
* Per ``device'' structure.
* (A controller has devices or uses and releases buffered data paths).
* (Everything else is a ``device''.)
*
* If a controller has many drives attached, then there will
* be several uba_device structures associated with a single uba_ctlr
* structure.
*
* This structure contains all the information necessary to run
* a unibus device such as a dz or a dh. It also contains information
* for slaves of unibus controllers as to which device on the slave
* this is. A flags field here can also be given in the system specification
* and is used to tell which dz lines are hard wired or other device
* specific parameters.
*/
struct uba_device {
struct uba_driver *ui_driver;
short ui_unit; /* unit number on the system */
short ui_ctlr; /* mass ctlr number; -1 if none */
short ui_ubanum; /* the uba it is on */
short ui_slave; /* slave on controller */
int (*ui_intr)(); /* interrupt handler(s) */
caddr_t ui_addr; /* address of device in i/o space */
short ui_dk; /* if init 1 set to number for iostat */
int ui_flags; /* parameter from system specification */
short ui_alive; /* device exists */
short ui_type; /* driver specific type information */
caddr_t ui_physaddr; /* phys addr, for standalone (dump) code */
/* this is the forward link in a list of devices on a controller */
struct uba_device *ui_forw;
/* if the device is connected to a controller, this is the controller */
struct uba_ctlr *ui_mi;
struct uba_hd *ui_hd;
};
/*
* Per-driver structure.
*
* Each unibus driver defines entries for a set of routines
* as well as an array of types which are acceptable to it.
* These are used at boot time by the configuration program.
*/
struct uba_driver {
int (*ud_probe)(); /* see if a driver is really there */
int (*ud_slave)(); /* see if a slave is there */
int (*ud_attach)(); /* setup driver for a slave */
int (*ud_dgo)(); /* fill csr/ba to start transfer */
u_short *ud_addr; /* device csr addresses */
char *ud_dname; /* name of a device */
struct uba_device **ud_dinfo; /* backpointers to ubdinit structs */
char *ud_mname; /* name of a controller */
struct uba_ctlr **ud_minfo; /* backpointers to ubminit structs */
short ud_xclu; /* want exclusive use of bdp's */
short ud_keepbdp; /* hang on to bdp's once allocated */
int (*ud_ubamem)(); /* see if dedicated memory is present */
};
#endif
/*
* Flags to UBA map/bdp allocation routines
*/
#define UBA_NEEDBDP 0x01 /* transfer needs a bdp */
#define UBA_CANTWAIT 0x02 /* don't block me */
#define UBA_NEED16 0x04 /* need 16 bit addresses only */
#define UBA_HAVEBDP 0x08 /* use bdp specified in high bits */
/*
* Macros to bust return word from map allocation routines.
* SHOULD USE STRUCTURE TO STORE UBA RESOURCE ALLOCATION:
*/
#ifdef notyet
struct ubinfo {
long ub_addr; /* unibus address: mr + boff */
int ub_nmr; /* number of registers, 0 if empty */
int ub_bdp; /* bdp number, 0 if none */
};
#define UBAI_MR(i) (((i) >> 9) & 0x7ff) /* starting map register */
#define UBAI_BOFF(i) ((i)&0x1ff) /* page offset */
#else
#define UBAI_BDP(i) ((int)(((unsigned)(i)) >> 28))
#define BDPMASK 0xf0000000
#define UBAI_NMR(i) ((int)((i) >> 20) & 0xff) /* max 255 (=127.5K) */
#define UBA_MAXNMR 255
#define UBAI_MR(i) ((int)((i) >> 9) & 0x7ff) /* max 2047 */
#define UBA_MAXMR 2047
#define UBAI_BOFF(i) ((int)((i) & 0x1ff))
#define UBAI_ADDR(i) ((int)((i) & 0xfffff)) /* uba addr (boff+mr) */
#define UBAI_INFO(off, mr, nmr, bdp) \
(((bdp) << 28) | ((nmr) << 20) | ((mr) << 9) | (off))
#endif
#ifndef LOCORE
#ifdef KERNEL
#define ubago(ui) ubaqueue(ui, 0)
/*
* UBA related kernel variables
*/
int numuba; /* number of uba's */
struct uba_hd uba_hd[];
/*
* Ubminit and ubdinit initialize the mass storage controller and
* device tables specifying possible devices.
*/
extern struct uba_ctlr ubminit[];
extern struct uba_device ubdinit[];
/*
* UNIBUS device address space is mapped by UMEMmap
* into virtual address umem[][].
* The IO page is mapped to the last 8K of each.
* This should be enlarged for the Q22 bus.
*/
extern struct pte *UMEMmap[]; /* uba device addr pte's */
/* extern char umem[][512*NBPG]; /* uba device addr space */
extern char *Numem;
#define Tumem(x) (Numem+(UBAPAGES+UBAIOPAGES)*NBPG*x)
/*
* Since some VAXen vector their unibus interrupts
* just adjacent to the system control block, we must
* allocate space there when running on ``any'' cpu. This space is
* used for the vectors for all ubas.
*/
extern int (*UNIvec[][128])(); /* unibus vec for ubas */
extern int (*eUNIvec)(); /* end of unibus vec */
#if defined(VAX780) || defined(VAX8600)
/*
* On DW780's, we must set the scb vectors for the nexus of the
* UNIbus adaptors to vector to locore unibus adaptor interrupt dispatchers
* which make 780's look like the other VAXen.
*/
extern Xua0int(), Xua1int(), Xua2int(), Xua3int();
#endif VAX780
#endif KERNEL
#endif !LOCORE

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/*
* Copyright (c) 1988 Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Chris Torek.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)udareg.h 7.3 (Berkeley) 5/8/91
* $Id: udareg.h,v 1.1 1994/08/02 20:21:31 ragge Exp $
*/
/*
* UDA50 registers and structures
*/
/*
* Writing any value to udaip starts initialisation. Reading from it
* when the UDA is running makes the UDA look through the command ring
* to find any new commands. Reading udasa gives status; writing it
* during initialisation sets things up.
*/
struct udadevice {
u_short udaip; /* initialisation and polling */
u_short udasa; /* status and address */
};
/*
* Bits in UDA status register during initialisation
*/
#define UDA_ERR 0x8000 /* error */
#define UDA_STEP4 0x4000 /* step 4 has started */
#define UDA_STEP3 0x2000 /* step 3 has started */
#define UDA_STEP2 0x1000 /* step 2 has started */
#define UDA_STEP1 0x0800 /* step 1 has started */
#define UDA_NV 0x0400 /* no host settable interrupt vector */
#define UDA_QB 0x0200 /* controller supports Q22 bus */
#define UDA_DI 0x0100 /* controller implements diagnostics */
#define UDA_IE 0x0080 /* interrupt enable */
#define UDA_NCNRMASK 0x003f /* in STEP1, bits 0-2=NCMDL2, 3-5=NRSPL2 */
#define UDA_IVECMASK 0x007f /* in STEP2, bits 0-6 are interruptvec / 4 */
#define UDA_PI 0x0001 /* host requests adapter purge interrupts */
/*
* Bits in UDA status register after initialisation
*/
#define UDA_GO 0x0001 /* run */
#define UDASR_BITS \
"\20\20ERR\17STEP4\16STEP3\15STEP2\14STEP1\13NV\12QB\11DI\10IE\1GO"
/*
* UDA Communications Area. Note that this structure definition
* requires NRSP and NCMD to be defined already.
*/
struct udaca {
short ca_xxx1; /* unused */
char ca_xxx2; /* unused */
char ca_bdp; /* BDP to purge */
short ca_cmdint; /* command ring transition flag */
short ca_rspint; /* response ring transition flag */
long ca_rspdsc[NRSP];/* response descriptors */
long ca_cmddsc[NCMD];/* command descriptors */
};
/*
* Simplified routines (e.g., uddump) reprogram the UDA50 for one command
* and one response at a time; uda1ca is like udaca except that it provides
* exactly one command and response descriptor.
*/
struct uda1ca {
short ca_xxx1;
char ca_xxx2;
char ca_bdp;
short ca_cmdint;
short ca_rspint;
long ca_rspdsc;
long ca_cmddsc;
};

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/*-
* Copyright (c) 1982, 1986 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)conf.c 7.18 (Berkeley) 5/9/91
* $Id: conf.c,v 1.1 1994/08/02 20:21:48 ragge Exp $
*/
#include "param.h"
#include "systm.h"
#include "buf.h"
#include "ioctl.h"
#include "tty.h"
#include "conf.h"
int nullop(), enxio(), enodev(), rawread(), rawwrite(), swstrategy();
int rawread(), rawwrite(), swstrategy();
#include "hp.h"
#if NHP > 0
int hpopen(),hpclose(),hpstrategy();
int hpioctl(),hpdump(),hpsize();
#else
#define hpopen enxio
#define hpclose enxio
#define hpstrategy enxio
#define hpioctl enxio
#define hpdump enxio
#define hpsize 0
#endif
#include "tu.h"
#if NHT > 0
int htopen(),htclose(),htstrategy(),htdump(),htioctl();
#else
#define htopen enxio
#define htclose enxio
#define htstrategy enxio
#define htdump enxio
#define htioctl enxio
#endif
#include "rk.h"
#if NHK > 0
int rkopen(),rkstrategy(),rkintr(),rkdump(),rkreset(),rksize();
#else
#define rkopen enxio
#define rkstrategy enxio
#define rkintr enxio
#define rkdump enxio
#define rkreset enxio
#define rksize 0
#endif
#include "te.h"
#if NTE > 0
int tmopen(),tmclose(),tmstrategy(),tmioctl(),tmdump(),tmreset();
#else
#define tmopen enxio
#define tmclose enxio
#define tmstrategy enxio
#define tmioctl enxio
#define tmdump enxio
#define tmreset nullop
#endif
#include "tms.h"
#if NTMS > 0
int tmscpopen(),tmscpclose(),tmscpstrategy();
int tmscpioctl(),tmscpdump(),tmscpreset();
#else
#define tmscpopen enxio
#define tmscpclose enxio
#define tmscpstrategy enxio
#define tmscpioctl enxio
#define tmscpdump enxio
#define tmscpreset nullop
#endif
#include "ts.h"
#if NTS > 0
int tsopen(),tsclose(),tsstrategy(),tsioctl(),tsdump(),tsreset();
#else
#define tsopen enxio
#define tsclose enxio
#define tsstrategy enxio
#define tsioctl enxio
#define tsdump enxio
#define tsreset nullop
#endif
#include "mu.h"
#if NMT > 0
int mtopen(),mtclose(),mtstrategy(),mtioctl(),mtdump();
#else
#define mtopen enxio
#define mtclose enxio
#define mtstrategy enxio
#define mtioctl enxio
#define mtdump enxio
#endif
#include "uda.h"
#if NUDA > 0
extern int udaopen(),udaclose();
extern int udaioctl(),udareset(),udadump(),udasize();
extern void udastrategy();
#else
jkdfhgskdfjgsadfjhgasdjfh
#define udaopen enxio
#define udaclose enxio
#define udastrategy enxio
#define udaioctl enxio
#define udareset nullop
#define udadump enxio
#define udasize 0
#endif
#include "kra.h"
#if NKDB > 0
int kdbopen(),kdbstrategy(),kdbdump(),kdbsize();
#else
#define kdbopen enxio
#define kdbstrategy enxio
#define kdbdump enxio
#define kdbsize 0
#endif
#include "up.h"
#if NSC > 0
int upopen(),upstrategy(),upreset(),updump(),upsize();
#else
#define upopen enxio
#define upstrategy enxio
#define upreset nullop
#define updump enxio
#define upsize 0
#endif
#include "tj.h"
#if NUT > 0
int utopen(),utclose(),utstrategy(),utioctl(),utreset(),utdump();
#else
#define utopen enxio
#define utclose enxio
#define utstrategy enxio
#define utreset nullop
#define utioctl enxio
#define utdump enxio
#endif
#include "rb.h"
#if NIDC > 0
int idcopen(),idcstrategy(),idcreset(),idcdump(),idcsize();;
#else
#define idcopen enxio
#define idcstrategy enxio
#define idcreset nullop
#define idcdump enxio
#define idcsize 0
#endif
#if defined(VAX750) || defined(VAX730)
int tuopen(),tuclose(),tustrategy();
#else
#define tuopen enxio
#define tuclose enxio
#define tustrategy enxio
#endif
#include "rx.h"
#if NFX > 0
int rxopen(),rxstrategy(),rxclose(),rxread(),rxwrite(),rxreset(),rxioctl();
#else
#define rxopen enxio
#define rxstrategy enxio
#define rxclose enxio
#define rxread enxio
#define rxwrite enxio
#define rxreset nullop
#define rxioctl enxio
#endif
#include "uu.h"
#if NUU > 0
int uuopen(),uustrategy(),uuclose(),uureset(),uuioctl();
#else
#define uuopen enxio
#define uustrategy enxio
#define uuclose enxio
#define uureset nullop
#define uuioctl enxio
#endif
#include "rl.h"
#if NRL > 0
int rlopen(),rlstrategy(),rlreset(),rldump(),rlsize();
#else
#define rlopen enxio
#define rlstrategy enxio
#define rlreset nullop
#define rldump enxio
#define rlsize 0
#endif
#include "np.h"
#if NNP > 0
int npopen(),npclose(),npread(),npwrite();
int npreset(),npioctl();
#else
#define npopen enxio
#define npclose enxio
#define npread enxio
#define npwrite enxio
#define npreset nullop
#define npioctl enxio
#endif
struct bdevsw bdevsw[] =
{
{ hpopen, hpclose, (int)hpstrategy, hpioctl,/*0*/
hpdump, hpsize, 0 },
{ htopen, htclose, (int)htstrategy, htioctl,/*1*/
htdump, 0, B_TAPE },
{ upopen, nullop, upstrategy, enodev, /*2*/
updump, upsize, 0 },
{ rkopen, nullop, rkstrategy, enodev, /*3*/
rkdump, rksize, 0 },
{ enodev, enodev, swstrategy, enodev, /*4*/
enodev, 0, 0 },
{ tmopen, tmclose, tmstrategy, tmioctl, /*5*/
tmdump, 0, B_TAPE },
{ tsopen, tsclose, tsstrategy, tsioctl, /*6*/
tsdump, 0, B_TAPE },
{ mtopen, mtclose, mtstrategy, mtioctl, /*7*/
mtdump, 0, B_TAPE },
{ tuopen, tuclose, tustrategy, enodev, /*8*/
enodev, 0, B_TAPE },
{ udaopen, udaclose, udastrategy, udaioctl, /*9*/
udadump, udasize, 0 },
{ utopen, utclose, utstrategy, utioctl, /*10*/
utdump, 0, B_TAPE },
{ idcopen, nullop, idcstrategy, enodev, /*11*/
idcdump, idcsize, 0 },
{ rxopen, rxclose, rxstrategy, enodev, /*12*/
enodev, 0, 0 },
{ uuopen, uuclose, uustrategy, enodev, /*13*/
enodev, 0, 0 },
{ rlopen, nullop, rlstrategy, enodev, /*14*/
rldump, rlsize, 0 },
{ tmscpopen, tmscpclose, tmscpstrategy, tmscpioctl, /*15*/
tmscpdump, 0, B_TAPE },
{ kdbopen, nullop, kdbstrategy, enodev, /*16*/
kdbdump, kdbsize, 0 },
};
int nblkdev = sizeof (bdevsw) / sizeof (bdevsw[0]);
int cnopen(),cnclose(),cnread(),cnwrite(),cnioctl();
struct tty cons;
#include "acc.h"
#if NACC > 0
int accreset();
#else
#define accreset nullop
#endif
#include "ct.h"
#if NCT > 0
int ctopen(),ctclose(),ctwrite();
#else
#define ctopen nullop
#define ctclose nullop
#define ctwrite nullop
#endif
#include "dh.h"
#if NDH == 0
#define dhopen enxio
#define dhclose enxio
#define dhread enxio
#define dhwrite enxio
#define dhioctl enxio
#define dhstop enxio
#define dhreset nullop
#define dh11 0
#else
int dhopen(),dhclose(),dhread(),dhwrite(),dhioctl(),dhstop(),dhreset();
struct tty dh11[];
#endif
#include "dmf.h"
#if NDMF == 0
#define dmfopen enxio
#define dmfclose enxio
#define dmfread enxio
#define dmfwrite enxio
#define dmfioctl enxio
#define dmfstop enxio
#define dmfreset nullop
#define dmf_tty 0
#else
int dmfopen(),dmfclose(),dmfread(),dmfwrite(),dmfioctl(),dmfstop(),dmfreset();
struct tty dmf_tty[];
#endif
#if VAX8600
int crlopen(),crlclose(),crlrw();
#else
#define crlopen enxio
#define crlclose enxio
#define crlrw enxio
#endif
#if VAX8200
int rx50open(),rx50close(),rx50rw();
#else
#define rx50open enxio
#define rx50close enxio
#define rx50rw enxio
#endif
#if VAX780
int flopen(),flclose(),flrw();
#else
#define flopen enxio
#define flclose enxio
#define flrw enxio
#endif
#include "dz.h"
#if NDZ == 0
#define dzopen enxio
#define dzclose enxio
#define dzread enxio
#define dzwrite enxio
#define dzioctl enxio
#define dzstop enxio
#define dzreset nullop
#define dz_tty 0
#else
int dzopen(),dzclose(),dzread(),dzwrite(),dzioctl(),dzstop(),dzreset();
struct tty dz_tty[];
#endif
#include "lp.h"
#if NLP > 0
int lpopen(),lpclose(),lpwrite(),lpreset();
#else
#define lpopen enxio
#define lpclose enxio
#define lpwrite enxio
#define lpreset nullop
#endif
int syopen(),syread(),sywrite(),syioctl(),syselect();
int mmrw();
#define mmselect seltrue
#include "va.h"
#if NVA > 0
int vaopen(),vaclose(),vawrite(),vaioctl(),vareset(),vaselect();
#else
#define vaopen enxio
#define vaclose enxio
#define vawrite enxio
#define vaopen enxio
#define vaioctl enxio
#define vareset nullop
#define vaselect enxio
#endif
#include "vp.h"
#if NVP > 0
int vpopen(),vpclose(),vpwrite(),vpioctl(),vpreset(),vpselect();
#else
#define vpopen enxio
#define vpclose enxio
#define vpwrite enxio
#define vpioctl enxio
#define vpreset nullop
#define vpselect enxio
#endif
#include "pty.h"
#if NPTY > 0
int ptsopen(),ptsclose(),ptsread(),ptswrite(),ptsstop();
int ptcopen(),ptcclose(),ptcread(),ptcwrite(),ptcselect();
int ptyioctl();
struct tty pt_tty[];
#else
#define ptsopen enxio
#define ptsclose enxio
#define ptsread enxio
#define ptswrite enxio
#define ptcopen enxio
#define ptcclose enxio
#define ptcread enxio
#define ptcwrite enxio
#define ptyioctl enxio
#define pt_tty 0
#define ptcselect enxio
#define ptsstop nullop
#endif
#include "lpa.h"
#if NLPA > 0
int lpaopen(),lpaclose(),lparead(),lpawrite(),lpaioctl();
#else
#define lpaopen enxio
#define lpaclose enxio
#define lparead enxio
#define lpawrite enxio
#define lpaioctl enxio
#endif
#include "dn.h"
#if NDN > 0
int dnopen(),dnclose(),dnwrite();
#else
#define dnopen enxio
#define dnclose enxio
#define dnwrite enxio
#endif
#include "ik.h"
#if NIK > 0
int ikopen(),ikclose(),ikread(),ikwrite(),ikioctl(),ikreset();
#else
#define ikopen enxio
#define ikclose enxio
#define ikread enxio
#define ikwrite enxio
#define ikioctl enxio
#define ikreset nullop
#endif
#include "ps.h"
#if NPS > 0
int psopen(),psclose(),psread(),pswrite(),psioctl(),psreset();
#else
#define psopen enxio
#define psclose enxio
#define psread enxio
#define pswrite enxio
#define psopen enxio
#define psioctl enxio
#define psreset nullop
#endif
#include "ad.h"
#if NAD > 0
int adopen(),adclose(),adioctl(),adreset();
#else
#define adopen enxio
#define adclose enxio
#define adioctl enxio
#define adreset nullop
#endif
#include "dhu.h"
#if NDHU > 0
int dhuopen(),dhuclose(),dhuread(),dhuwrite(),dhuioctl(),dhustop(),dhureset();
struct tty dhu_tty[];
#else
#define dhuopen enxio
#define dhuclose enxio
#define dhuread enxio
#define dhuwrite enxio
#define dhuioctl enxio
#define dhustop enxio
#define dhureset nullop
#define dhu_tty 0
#endif
#include "vs.h"
#if NVS > 0
int vsopen(),vsclose(),vsioctl(),vsreset(),vsselect();
#else
#define vsopen enxio
#define vsclose enxio
#define vsioctl enxio
#define vsreset enxio
#define vsselect enxio
#endif
#include "dmz.h"
#if NDMZ > 0
int dmzopen(),dmzclose(),dmzread(),dmzwrite(),dmzioctl(),dmzstop(),dmzreset();
struct tty dmz_tty[];
#else
#define dmzopen enxio
#define dmzclose enxio
#define dmzread enxio
#define dmzwrite enxio
#define dmzioctl enxio
#define dmzstop enxio
#define dmzreset nullop
#define dmz_tty 0
#endif
#include "qv.h"
#if NQV > 0
int qvopen(), qvclose(), qvread(), qvwrite(), qvioctl(), qvstop(),
qvreset(), qvselect(), qvcons_init();
#else
#define qvopen enxio
#define qvclose enxio
#define qvread enxio
#define qvwrite enxio
#define qvioctl enxio
#define qvstop enxio
#define qvreset nullop
#define qvselect enxio
#define qvcons_init enxio
#endif
#include "qd.h"
#if NQD > 0
int qdopen(), qdclose(), qdread(), qdwrite(), qdioctl(), qdstop(),
qdreset(), qdselect(), qdcons_init();
#else
#define qdopen enxio
#define qdclose enxio
#define qdread enxio
#define qdwrite enxio
#define qdioctl enxio
#define qdstop enxio
#define qdreset nullop
#define qdselect enxio
#define qdcons_init enxio
#endif
#if defined(INGRES)
int iiioctl(), iiclose(), iiopen();
#else
#define iiopen enxio
#define iiclose enxio
#define iiioctl enxio
#endif
#ifdef DATAKIT
#include "datakit.h"
#include "dktty.h"
#include "kmc.h"
#endif
#if !defined(NDATAKIT) || NDATAKIT == 0
#define dkopen enxio
#define dkclose enxio
#define dkread enxio
#define dkwrite enxio
#define dkioctl enxio
#else
int dkopen(),dkclose(),dkread(),dkwrite(),dkioctl();
#endif
#if !defined(NDKTTY) || NDKTTY == 0
#define dktopen enxio
#define dktclose enxio
#define dktread enxio
#define dktwrite enxio
#define dktioctl enxio
#define dktstop nullop
#define dkt 0
#else
int dktopen(),dktclose(),dktread(),dktwrite(),dktioctl(), dktstop();
struct tty dkt[];
#endif
#if NKMC > 0
int kmcopen(), kmcclose(), kmcwrite(), kmcioctl(), kmcread();
int kmcrint(), kmcload(), kmcset(), kmcdclr();
#else
#define kmcopen enxio
#define kmcclose enxio
#define kmcwrite enxio
#define kmcioctl enxio
#define kmcread enxio
#define kmcdclr enxio
#endif
int logopen(), logclose(), logread(), logioctl(), logselect();
int fdopen();
int ttselect(), seltrue();
struct cdevsw cdevsw[] =
{
cnopen, cnclose, cnread, cnwrite, /*0*/
cnioctl, nullop, nullop, &cons,
ttselect, enodev, NULL,
dzopen, dzclose, dzread, dzwrite, /*1*/
dzioctl, dzstop, dzreset, dz_tty,
ttselect, enodev, NULL,
syopen, nullop, syread, sywrite, /*2*/
syioctl, nullop, nullop, NULL,
syselect, enodev, NULL,
nullop, nullop, mmrw, mmrw, /*3*/
enodev, nullop, nullop, NULL,
mmselect, enodev, NULL,
hpopen, hpclose, rawread, rawwrite, /*4*/
hpioctl, enodev, nullop, NULL,
seltrue, enodev, hpstrategy,
htopen, htclose, rawread, rawwrite, /*5*/
htioctl, enodev, nullop, NULL,
seltrue, enodev, htstrategy,
vpopen, vpclose, enodev, vpwrite, /*6*/
vpioctl, nullop, vpreset, NULL,
vpselect, enodev, NULL,
nullop, nullop, rawread, rawwrite, /*7*/
enodev, enodev, nullop, NULL,
enodev, enodev, swstrategy,
flopen, flclose, flrw, flrw, /*8*/
enodev, enodev, nullop, NULL,
seltrue, enodev, NULL,
udaopen, udaclose, rawread, rawwrite, /*9*/
udaioctl, enodev, udareset, NULL,
seltrue, enodev, udastrategy,
vaopen, vaclose, enodev, vawrite, /*10*/
vaioctl, nullop, vareset, NULL,
vaselect, enodev, NULL,
rkopen, nullop, rawread, rawwrite, /*11*/
enodev, enodev, rkreset, NULL,
seltrue, enodev, rkstrategy,
dhopen, dhclose, dhread, dhwrite, /*12*/
dhioctl, dhstop, dhreset, dh11,
ttselect, enodev, NULL,
upopen, nullop, rawread, rawwrite, /*13*/
enodev, enodev, upreset, NULL,
seltrue, enodev, upstrategy,
tmopen, tmclose, rawread, rawwrite, /*14*/
tmioctl, enodev, tmreset, NULL,
seltrue, enodev, tmstrategy,
lpopen, lpclose, enodev, lpwrite, /*15*/
enodev, enodev, lpreset, NULL,
seltrue, enodev, NULL,
tsopen, tsclose, rawread, rawwrite, /*16*/
tsioctl, enodev, tsreset, NULL,
seltrue, enodev, tsstrategy,
utopen, utclose, rawread, rawwrite, /*17*/
utioctl, enodev, utreset, NULL,
seltrue, enodev, utstrategy,
ctopen, ctclose, enodev, ctwrite, /*18*/
enodev, enodev, nullop, NULL,
seltrue, enodev, NULL,
mtopen, mtclose, rawread, rawwrite, /*19*/
mtioctl, enodev, enodev, NULL,
seltrue, enodev, mtstrategy,
ptsopen, ptsclose, ptsread, ptswrite, /*20*/
ptyioctl, ptsstop, nullop, pt_tty,
ttselect, enodev, NULL,
ptcopen, ptcclose, ptcread, ptcwrite, /*21*/
ptyioctl, nullop, nullop, pt_tty,
ptcselect, enodev, NULL,
dmfopen, dmfclose, dmfread, dmfwrite, /*22*/
dmfioctl, dmfstop, dmfreset, dmf_tty,
ttselect, enodev, NULL,
idcopen, nullop, rawread, rawwrite, /*23*/
enodev, enodev, idcreset, NULL,
seltrue, enodev, idcstrategy,
dnopen, dnclose, enodev, dnwrite, /*24*/
enodev, enodev, nullop, NULL,
seltrue, enodev, NULL,
/* 25-29 reserved to local sites */
enodev, enodev, enodev, enodev, /*25*/
enodev, nullop, nullop, NULL,
enodev, enodev, NULL,
lpaopen, lpaclose, lparead, lpawrite, /*26*/
lpaioctl, enodev, nullop, NULL,
seltrue, enodev, NULL,
psopen, psclose, psread, pswrite, /*27*/
psioctl, enodev, psreset, NULL,
seltrue, enodev, NULL,
enodev, enodev, enodev, enodev, /*28*/
enodev, nullop, nullop, NULL,
enodev, enodev, NULL,
adopen, adclose, enodev, enodev, /*29*/
adioctl, enodev, adreset, NULL,
seltrue, enodev, NULL,
rxopen, rxclose, rxread, rxwrite, /*30*/
rxioctl, enodev, rxreset, NULL,
seltrue, enodev, NULL,
ikopen, ikclose, ikread, ikwrite, /*31*/
ikioctl, enodev, ikreset, NULL,
seltrue, enodev, NULL,
rlopen, enodev, rawread, rawwrite, /*32*/
enodev, enodev, rlreset, NULL,
seltrue, enodev, rlstrategy,
logopen, logclose, logread, enodev, /*33*/
logioctl, enodev, nullop, NULL,
logselect, enodev, NULL,
dhuopen, dhuclose, dhuread, dhuwrite, /*34*/
dhuioctl, dhustop, dhureset, dhu_tty,
ttselect, enodev, NULL,
crlopen, crlclose, crlrw, crlrw, /*35*/
enodev, enodev, nullop, NULL,
seltrue, enodev, NULL,
vsopen, vsclose, enodev, enodev, /*36*/
vsioctl, enodev, vsreset, NULL,
vsselect, enodev, NULL,
dmzopen, dmzclose, dmzread, dmzwrite, /*37*/
dmzioctl, dmzstop, dmzreset, dmz_tty,
ttselect, enodev, NULL,
tmscpopen, tmscpclose, rawread, rawwrite, /*38*/
tmscpioctl, enodev, tmscpreset, NULL,
seltrue, enodev, tmscpstrategy,
npopen, npclose, npread, npwrite, /*39*/
npioctl, enodev, npreset, NULL,
seltrue, enodev, NULL,
qvopen, qvclose, qvread, qvwrite, /*40*/
qvioctl, qvstop, qvreset, NULL,
qvselect, enodev, NULL,
qdopen, qdclose, qdread, qdwrite, /*41*/
qdioctl, qdstop, qdreset, NULL,
qdselect, enodev, NULL,
/* 42-50 reserved to local sites */
enodev, enodev, enodev, enodev, /*42*/
enodev, nullop, nullop, NULL,
enodev, enodev, NULL,
iiopen, iiclose, nullop, nullop, /*43*/
iiioctl, nullop, nullop, NULL,
seltrue, enodev, NULL,
dkopen, dkclose, dkread, dkwrite, /*44*/
dkioctl, nullop, nullop, NULL,
seltrue, enodev, NULL,
dktopen, dktclose, dktread, dktwrite, /*45*/
dktioctl, dktstop, nullop, dkt,
ttselect, enodev, NULL,
kmcopen, kmcclose, kmcread, kmcwrite, /*46*/
kmcioctl, nullop, kmcdclr, NULL,
seltrue, enodev, NULL,
enodev, enodev, enodev, enodev, /*47*/
enodev, nullop, nullop, NULL,
enodev, enodev, NULL,
enodev, enodev, enodev, enodev, /*48*/
enodev, nullop, nullop, NULL,
enodev, enodev, NULL,
enodev, enodev, enodev, enodev, /*49*/
enodev, nullop, nullop, NULL,
enodev, enodev, NULL,
enodev, enodev, enodev, enodev, /*50*/
enodev, nullop, nullop, NULL,
enodev, enodev, NULL,
rx50open, rx50close, rx50rw, rx50rw, /*51*/
enodev, enodev, nullop, 0,
seltrue, enodev, NULL,
/* kdb50 ra */
kdbopen, nullop/*XXX*/, rawread, rawwrite, /*52*/
enodev, enodev, nullop, 0,
seltrue, enodev, kdbstrategy,
fdopen, enodev, enodev, enodev, /*53*/
enodev, enodev, enodev, NULL,
enodev, enodev, NULL,
};
int nchrdev = sizeof (cdevsw) / sizeof (cdevsw[0]);
int mem_no = 3; /* major device number of memory special file */
/*
* Swapdev is a fake device implemented
* in sw.c used only internally to get to swstrategy.
* It cannot be provided to the users, because the
* swstrategy routine munches the b_dev and b_blkno entries
* before calling the appropriate driver. This would horribly
* confuse, e.g. the hashing routines. Instead, /dev/drum is
* provided as a character (raw) device.
*/
dev_t swapdev = makedev(4, 0);

292
sys/arch/vax/vax/disksubr.c Normal file
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@ -0,0 +1,292 @@
/*
* Copyright (c) 1982, 1986, 1988 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)ufs_disksubr.c 7.16 (Berkeley) 5/4/91
* $Id: disksubr.c,v 1.1 1994/08/02 20:21:51 ragge Exp $
*/
#include "param.h"
#include "systm.h"
#include "buf.h"
#include "dkbad.h"
#include "disklabel.h"
#include "syslog.h"
/* XXX encoding of disk minor numbers, should be elsewhere... */
#define dkunit(dev) (minor(dev) >> 3)
#define dkpart(dev) (minor(dev) & 7)
#define dkminor(unit, part) (((unit) << 3) | (part))
#define b_cylin b_resid
#define RAW_PART 3
/*
* Determine the size of the transfer, and make sure it is
* within the boundaries of the partition. Adjust transfer
* if needed, and signal errors or early completion.
*/
int
bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
{
struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
int labelsect = lp->d_partitions[0].p_offset;
int maxsz = p->p_size,
sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
/* overwriting disk label ? */
/* XXX should also protect bootstrap in first 8K */
if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
#if LABELSECTOR != 0
bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
#endif
(bp->b_flags & B_READ) == 0 && wlabel == 0) {
bp->b_error = EROFS;
goto bad;
}
#if defined(DOSBBSECTOR) && defined(notyet)
/* overwriting master boot record? */
if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
(bp->b_flags & B_READ) == 0 && wlabel == 0) {
bp->b_error = EROFS;
goto bad;
}
#endif
/* beyond partition? */
if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
/* if exactly at end of disk, return an EOF */
if (bp->b_blkno == maxsz) {
bp->b_resid = bp->b_bcount;
return(0);
}
/* or truncate if part of it fits */
sz = maxsz - bp->b_blkno;
if (sz <= 0) {
bp->b_error = EINVAL;
goto bad;
}
bp->b_bcount = sz << DEV_BSHIFT;
}
/* calculate cylinder for disksort to order transfers with */
bp->b_cylin = (bp->b_blkno + p->p_offset) / lp->d_secpercyl;
return(1);
bad:
bp->b_flags |= B_ERROR;
return(-1);
}
/* NYFIL */
/* encoding of disk minor numbers, should be elsewhere... */
#define dkunit(dev) (minor(dev) >> 3)
#define dkpart(dev) (minor(dev) & 7)
#define dkminor(unit, part) (((unit) << 3) | (part))
/*
* Check new disk label for sensibility
* before setting it.
*/
setdisklabel(olp, nlp, openmask, osdep)
register struct disklabel *olp, *nlp;
u_long openmask;
struct cpu_disklabel *osdep;
{
return cpu_setdisklabel(olp, nlp, openmask, osdep);
}
/*
* Write disk label back to device after modification.
*/
writedisklabel(dev, strat, lp, osdep)
dev_t dev;
void (*strat)();
register struct disklabel *lp;
struct cpu_disklabel *osdep;
{
return cpu_writedisklabel(dev, strat, lp, osdep);
}
/*
* from: @(#)ufs_disksubr.c 7.16 (Berkeley) 5/4/91
* $Id: disksubr.c,v 1.1 1994/08/02 20:21:51 ragge Exp $
*/
/*
* Attempt to read a disk label from a device
* using the indicated stategy routine.
* The label must be partly set up before this:
* secpercyl and anything required in the strategy routine
* (e.g., sector size) must be filled in before calling us.
* Returns null on success and an error string on failure.
*/
char *
readdisklabel(dev, strat, lp, osdep)
dev_t dev;
void (*strat)();
register struct disklabel *lp;
struct cpu_disklabel *osdep;
{
register struct buf *bp;
struct disklabel *dlp;
char *msg = NULL;
if (lp->d_secperunit == 0)
lp->d_secperunit = 0x1fffffff;
lp->d_npartitions = 1;
if (lp->d_partitions[0].p_size == 0)
lp->d_partitions[0].p_size = 0x1fffffff;
lp->d_partitions[0].p_offset = 0;
bp = geteblk((int)lp->d_secsize);
bp->b_dev = dev;
bp->b_blkno = LABELSECTOR;
bp->b_bcount = lp->d_secsize;
bp->b_flags = B_BUSY | B_READ;
bp->b_cylin = LABELSECTOR / lp->d_secpercyl;
(*strat)(bp);
if (biowait(bp)) {
msg = "I/O error";
} else for (dlp = (struct disklabel *)bp->b_un.b_addr;
dlp <= (struct disklabel *)(bp->b_un.b_addr+DEV_BSIZE-sizeof(*dlp));
dlp = (struct disklabel *)((char *)dlp + sizeof(long))) {
if (dlp->d_magic != DISKMAGIC || dlp->d_magic2 != DISKMAGIC) {
if (msg == NULL)
msg = "no disk label";
} else if (dlp->d_npartitions > MAXPARTITIONS ||
dkcksum(dlp) != 0)
msg = "disk label corrupted";
else {
*lp = *dlp;
msg = NULL;
break;
}
}
bp->b_flags = B_INVAL | B_AGE;
brelse(bp);
return (msg);
}
/*
* Check new disk label for sensibility
* before setting it.
*/
cpu_setdisklabel(olp, nlp, openmask, osdep)
register struct disklabel *olp, *nlp;
u_long openmask;
struct cpu_disklabel *osdep;
{
register i;
register struct partition *opp, *npp;
if (nlp->d_magic != DISKMAGIC || nlp->d_magic2 != DISKMAGIC ||
dkcksum(nlp) != 0)
return (EINVAL);
while ((i = ffs((long)openmask)) != 0) {
i--;
openmask &= ~(1 << i);
if (nlp->d_npartitions <= i)
return (EBUSY);
opp = &olp->d_partitions[i];
npp = &nlp->d_partitions[i];
if (npp->p_offset != opp->p_offset || npp->p_size < opp->p_size)
return (EBUSY);
/*
* Copy internally-set partition information
* if new label doesn't include it. XXX
*/
if (npp->p_fstype == FS_UNUSED && opp->p_fstype != FS_UNUSED) {
npp->p_fstype = opp->p_fstype;
npp->p_fsize = opp->p_fsize;
npp->p_frag = opp->p_frag;
npp->p_cpg = opp->p_cpg;
}
}
nlp->d_checksum = 0;
nlp->d_checksum = dkcksum(nlp);
*olp = *nlp;
return (0);
}
/* encoding of disk minor numbers, should be elsewhere... */
#define dkunit(dev) (minor(dev) >> 3)
#define dkminor(unit, part) (((unit) << 3) | (part))
/*
* Write disk label back to device after modification.
*/
cpu_writedisklabel(dev, strat, lp, osdep)
dev_t dev;
int (*strat)();
register struct disklabel *lp;
struct cpu_disklabel *osdep;
{
struct buf *bp;
struct disklabel *dlp;
int labelpart;
int error = 0;
labelpart = dkpart(dev);
if (lp->d_partitions[labelpart].p_offset != 0) {
if (lp->d_partitions[0].p_offset != 0)
return (EXDEV); /* not quite right */
labelpart = 0;
}
bp = geteblk((int)lp->d_secsize);
bp->b_dev = makedev(major(dev), dkminor(dkunit(dev), labelpart));
bp->b_blkno = LABELSECTOR;
bp->b_bcount = lp->d_secsize;
bp->b_flags = B_READ;
(*strat)(bp);
if (error = biowait(bp))
goto done;
for (dlp = (struct disklabel *)bp->b_un.b_addr;
dlp <= (struct disklabel *)
(bp->b_un.b_addr + lp->d_secsize - sizeof(*dlp));
dlp = (struct disklabel *)((char *)dlp + sizeof(long))) {
if (dlp->d_magic == DISKMAGIC && dlp->d_magic2 == DISKMAGIC &&
dkcksum(dlp) == 0) {
*dlp = *lp;
bp->b_flags = B_WRITE;
(*strat)(bp);
error = biowait(bp);
goto done;
}
}
error = ESRCH;
done:
brelse(bp);
return (error);
}

27
sys/arch/vax/vax/glue.c Normal file
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@ -0,0 +1,27 @@
/* This glue file will go away SOON! */
#include "vax/include/pte.h"
#include "sys/param.h"
#include "sys/buf.h"
#include "sys/map.h"
#include "vax/uba/ubavar.h"
#define C (caddr_t)
extern struct uba_driver udadriver;
extern udaintr();
extern struct uba_driver dedriver;
extern deintr();
struct uba_ctlr ubminit[] = {
{ &udadriver,0,'?',0,udaintr, C 0172150 },
0
};
struct uba_device ubdinit[] = {
{ &udadriver,0,0,'?',0,0,C 00,1,0x0},
{ &dedriver,0,-1,'?',-1,deintr,C 0174510,0,0x0},
0
};

727
sys/arch/vax/vax/intvec.s Normal file
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@ -0,0 +1,727 @@
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: intvec.s,v 1.1 1994/08/02 20:21:57 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#include "vax/include/mtpr.h"
#include "vax/include/pte.h"
#include "uba.h"
.globl Interrupt_scb
Interrupt_scb:
.long trp_0x00+1 # Unused.
_V_MACHINE_CHK: .long trp_0x04+1 # Machine Check.
_V_K_STK_INV: .long trp_0x08+1 # Kernel Stack Invalid.
_V_POWER_FAIL: .long trp_0x0C+1 # Power Failed.
_V_PRIV_INSTR: .long trp_0x10+1 # Privileged/Reserved Instruction.
_V_CUSTOMER: .long trp_0x14+1 # Customer Reserved Instruction.
_V_RES_OP: .long trp_0x18+1 # Reserved Operand/Boot Vector(?)
_V_RES_ADD_MODE:.long trp_0x1C+1 # Reserved Address Mode.
_V_ACC_CNTL_VIO:.long trp_0x20+1 # Access Control Violation.
_V_TRANSL_INV: .long trp_0x24 # Translation Invalid.
_V_TRACE_PEND: .long trp_0x28+1 # Trace Pending.
_V_BREAKPOINT: .long trp_0x2C+1 # Breakpoint Instruction.
_V_COMPAT: .long trp_0x30+1 # Compatibility Exception.
_V_ARITHMETIC: .long trp_0x34+1 # Arithmetic Fault.
.long trp_0x38+1 # Unused.
.long trp_0x3C+1 # Unused.
_V_CHMK: .long trp_0x40 # Mode Change Trap.
_V_CHME: .long trp_0x44+1 # Mode Change Trap.
_V_CHMS: .long trp_0x48+1 # Mode Change Trap.
_V_CHMU: .long trp_0x4C+1 # Mode Change Trap.
_V_SBI_SILO: .long trp_0x50+1 # System Backplane Exception.
_V_CORR_READ: .long trp_0x54+1 # Corrected Memory Read.
_V_SBI_ALERT: .long trp_0x58+1 # System Backplane Alert.
_V_SBI_FAULT: .long trp_0x5C+1 # System Backplane Fault.
_V_MEM_W_TOUT: .long trp_0x60+1 # Memory Write Timeout
.long trp_0x64+1 # Unused
.long trp_0x68+1 # Unused
.long trp_0x6C+1 # Unused
.long trp_0x70+1 # Unused
.long trp_0x74+1 # Unused
.long trp_0x78+1 # Unused
.long trp_0x7C+1 # Unused
.long trp_0x80+1 # Unused
_V_SW_LVL1: .long trp_0x84+1 # Software Lvl1 Interrupt
_V_SW_LVL2: .long trp_0x88 # AST interrupt
_V_SW_LVL3: .long trp_0x8C+1 # Software Lvl3 Interrupt
_V_SW_LVL4: .long trp_0x90+1 # Software Lvl4 Interrupt
_V_SW_LVL5: .long trp_0x94+1 # Software Lvl5 Interrupt
_V_SW_LVL6: .long trp_0x98+1 # Software Lvl6 Interrupt
_V_SW_LVL7: .long trp_0x9C+1 # Software Lvl7 Interrupt
_V_SW_LVL8: .long trp_0xA0+1 # Software Lvl8 Interrupt
_V_SW_LVL9: .long trp_0xA4+1 # Software Lvl9 Interrupt
_V_SW_LVL10: .long trp_0xA8+1 # Software Lvl10 Interrupt
_V_SW_LVL11: .long trp_0xAC+1 # Software Lvl11 Interrupt
_V_SW_LVL12: .long trp_0xB0+1 # Software Lvl12 Interrupt
_V_SW_LVL13: .long trp_0xB4+1 # Software Lvl13 Interrupt
_V_SW_LVL14: .long trp_0xB8+1 # Software Lvl14 Interrupt
_V_SW_LVL15: .long trp_0xBC+1 # Software Lvl15 Interrupt
_V_INTERVAL: .long trp_0xC0+1 # Interval Timer
.long trp_0xC4+1 # Unused
.long trp_0xC8+1 # Unused
.long trp_0xCC+1 # Unused
.long trp_0xD0+1 # Unused
.long trp_0xD4+1 # Unused
.long trp_0xD8+1 # Unused
.long trp_0xDC+1 # Unused
.long trp_0xE0+1 # Unused
.long trp_0xE4+1 # Unused
.long trp_0xE8+1 # Unused
.long trp_0xEC+1 # Unused
_V_CONSOLE_SR: .long trp_0xF0+1 # Console Storage Recieve Interrupt
_V_CONSOLE_ST: .long trp_0xF4+1 # Console Storage Transmit Interrupt
_V_CONSOLE_TR: .long trp_0xF8+1 # Console Terminal Recieve Interrupt
_V_CONSOLE_TT: .long trp_0xFC+1 # Console Terminal Transmit Interrupt
.globl _V_DEVICE_VEC
_V_DEVICE_VEC: .space 0x100
_UNIvec: .globl _UNIvec
# Unibus vector space
#if NUBA>0
.long _uba_00+1,_uba_01+1,_uba_02+1,_uba_03+1,_uba_04+1,_uba_05+1,_uba_06+1,_uba_07+1
.long _uba_08+1,_uba_09+1,_uba_0a+1,_uba_0b+1,_uba_0c+1,_uba_0d+1,_uba_0e+1,_uba_0f+1
.long _uba_10+1,_uba_11+1,_uba_12+1,_uba_13+1,_uba_14+1,_uba_15+1,_uba_16+1,_uba_17+1
.long _uba_18+1,_uba_19+1,_uba_1a+1,_uba_1b+1,_uba_1c+1,_uba_1d+1,_uba_1e+1,_uba_1f+1
.long _uba_20+1,_uba_21+1,_uba_22+1,_uba_23+1,_uba_24+1,_uba_25+1,_uba_26+1,_uba_27+1
.long _uba_28+1,_uba_29+1,_uba_2a+1,_uba_2b+1,_uba_2c+1,_uba_2d+1,_uba_2e+1,_uba_2f+1
.long _uba_30+1,_uba_31+1,_uba_32+1,_uba_33+1,_uba_34+1,_uba_35+1,_uba_36+1,_uba_37+1
.long _uba_38+1,_uba_39+1,_uba_3a+1,_uba_3b+1,_uba_3c+1,_uba_3d+1,_uba_3e+1,_uba_3f+1
.long _uba_40+1,_uba_41+1,_uba_42+1,_uba_43+1,_uba_44+1,_uba_45+1,_uba_46+1,_uba_47+1
.long _uba_48+1,_uba_49+1,_uba_4a+1,_uba_4b+1,_uba_4c+1,_uba_4d+1,_uba_4e+1,_uba_4f+1
.long _uba_50+1,_uba_51+1,_uba_52+1,_uba_53+1,_uba_54+1,_uba_55+1,_uba_56+1,_uba_57+1
.long _uba_58+1,_uba_59+1,_uba_5a+1,_uba_5b+1,_uba_5c+1,_uba_5d+1,_uba_5e+1,_uba_5f+1
.long _uba_60+1,_uba_61+1,_uba_62+1,_uba_63+1,_uba_64+1,_uba_65+1,_uba_66+1,_uba_67+1
.long _uba_68+1,_uba_69+1,_uba_6a+1,_uba_6b+1,_uba_6c+1,_uba_6d+1,_uba_6e+1,_uba_6f+1
.long _uba_70+1,_uba_71+1,_uba_72+1,_uba_73+1,_uba_74+1,_uba_75+1,_uba_76+1,_uba_77+1
.long _uba_78+1,_uba_79+1,_uba_7a+1,_uba_7b+1,_uba_7c+1,_uba_7d+1,_uba_7e+1,_uba_7f+1
#if NUBA>1
.long _uba_00+1,_uba_01+1,_uba_02+1,_uba_03+1,_uba_04+1,_uba_05+1,_uba_06+1,_uba_07+1
.long _uba_08+1,_uba_09+1,_uba_0a+1,_uba_0b+1,_uba_0c+1,_uba_0d+1,_uba_0e+1,_uba_0f+1
.long _uba_10+1,_uba_11+1,_uba_12+1,_uba_13+1,_uba_14+1,_uba_15+1,_uba_16+1,_uba_17+1
.long _uba_18+1,_uba_19+1,_uba_1a+1,_uba_1b+1,_uba_1c+1,_uba_1d+1,_uba_1e+1,_uba_1f+1
.long _uba_20+1,_uba_21+1,_uba_22+1,_uba_23+1,_uba_24+1,_uba_25+1,_uba_26+1,_uba_27+1
.long _uba_28+1,_uba_29+1,_uba_2a+1,_uba_2b+1,_uba_2c+1,_uba_2d+1,_uba_2e+1,_uba_2f+1
.long _uba_30+1,_uba_31+1,_uba_32+1,_uba_33+1,_uba_34+1,_uba_35+1,_uba_36+1,_uba_37+1
.long _uba_38+1,_uba_39+1,_uba_3a+1,_uba_3b+1,_uba_3c+1,_uba_3d+1,_uba_3e+1,_uba_3f+1
.long _uba_40+1,_uba_41+1,_uba_42+1,_uba_43+1,_uba_44+1,_uba_45+1,_uba_46+1,_uba_47+1
.long _uba_48+1,_uba_49+1,_uba_4a+1,_uba_4b+1,_uba_4c+1,_uba_4d+1,_uba_4e+1,_uba_4f+1
.long _uba_50+1,_uba_51+1,_uba_52+1,_uba_53+1,_uba_54+1,_uba_55+1,_uba_56+1,_uba_57+1
.long _uba_58+1,_uba_59+1,_uba_5a+1,_uba_5b+1,_uba_5c+1,_uba_5d+1,_uba_5e+1,_uba_5f+1
.long _uba_60+1,_uba_61+1,_uba_62+1,_uba_63+1,_uba_64+1,_uba_65+1,_uba_66+1,_uba_67+1
.long _uba_68+1,_uba_69+1,_uba_6a+1,_uba_6b+1,_uba_6c+1,_uba_6d+1,_uba_6e+1,_uba_6f+1
.long _uba_70+1,_uba_71+1,_uba_72+1,_uba_73+1,_uba_74+1,_uba_75+1,_uba_76+1,_uba_77+1
.long _uba_78+1,_uba_79+1,_uba_7a+1,_uba_7b+1,_uba_7c+1,_uba_7d+1,_uba_7e+1,_uba_7f+1
#if NUBA>2
.long _uba_00+1,_uba_01+1,_uba_02+1,_uba_03+1,_uba_04+1,_uba_05+1,_uba_06+1,_uba_07+1
.long _uba_08+1,_uba_09+1,_uba_0a+1,_uba_0b+1,_uba_0c+1,_uba_0d+1,_uba_0e+1,_uba_0f+1
.long _uba_10+1,_uba_11+1,_uba_12+1,_uba_13+1,_uba_14+1,_uba_15+1,_uba_16+1,_uba_17+1
.long _uba_18+1,_uba_19+1,_uba_1a+1,_uba_1b+1,_uba_1c+1,_uba_1d+1,_uba_1e+1,_uba_1f+1
.long _uba_20+1,_uba_21+1,_uba_22+1,_uba_23+1,_uba_24+1,_uba_25+1,_uba_26+1,_uba_27+1
.long _uba_28+1,_uba_29+1,_uba_2a+1,_uba_2b+1,_uba_2c+1,_uba_2d+1,_uba_2e+1,_uba_2f+1
.long _uba_30+1,_uba_31+1,_uba_32+1,_uba_33+1,_uba_34+1,_uba_35+1,_uba_36+1,_uba_37+1
.long _uba_38+1,_uba_39+1,_uba_3a+1,_uba_3b+1,_uba_3c+1,_uba_3d+1,_uba_3e+1,_uba_3f+1
.long _uba_40+1,_uba_41+1,_uba_42+1,_uba_43+1,_uba_44+1,_uba_45+1,_uba_46+1,_uba_47+1
.long _uba_48+1,_uba_49+1,_uba_4a+1,_uba_4b+1,_uba_4c+1,_uba_4d+1,_uba_4e+1,_uba_4f+1
.long _uba_50+1,_uba_51+1,_uba_52+1,_uba_53+1,_uba_54+1,_uba_55+1,_uba_56+1,_uba_57+1
.long _uba_58+1,_uba_59+1,_uba_5a+1,_uba_5b+1,_uba_5c+1,_uba_5d+1,_uba_5e+1,_uba_5f+1
.long _uba_60+1,_uba_61+1,_uba_62+1,_uba_63+1,_uba_64+1,_uba_65+1,_uba_66+1,_uba_67+1
.long _uba_68+1,_uba_69+1,_uba_6a+1,_uba_6b+1,_uba_6c+1,_uba_6d+1,_uba_6e+1,_uba_6f+1
.long _uba_70+1,_uba_71+1,_uba_72+1,_uba_73+1,_uba_74+1,_uba_75+1,_uba_76+1,_uba_77+1
.long _uba_78+1,_uba_79+1,_uba_7a+1,_uba_7b+1,_uba_7c+1,_uba_7d+1,_uba_7e+1,_uba_7f+1
#if NUBA>3
.long _uba_00+1,_uba_01+1,_uba_02+1,_uba_03+1,_uba_04+1,_uba_05+1,_uba_06+1,_uba_07+1
.long _uba_08+1,_uba_09+1,_uba_0a+1,_uba_0b+1,_uba_0c+1,_uba_0d+1,_uba_0e+1,_uba_0f+1
.long _uba_10+1,_uba_11+1,_uba_12+1,_uba_13+1,_uba_14+1,_uba_15+1,_uba_16+1,_uba_17+1
.long _uba_18+1,_uba_19+1,_uba_1a+1,_uba_1b+1,_uba_1c+1,_uba_1d+1,_uba_1e+1,_uba_1f+1
.long _uba_20+1,_uba_21+1,_uba_22+1,_uba_23+1,_uba_24+1,_uba_25+1,_uba_26+1,_uba_27+1
.long _uba_28+1,_uba_29+1,_uba_2a+1,_uba_2b+1,_uba_2c+1,_uba_2d+1,_uba_2e+1,_uba_2f+1
.long _uba_30+1,_uba_31+1,_uba_32+1,_uba_33+1,_uba_34+1,_uba_35+1,_uba_36+1,_uba_37+1
.long _uba_38+1,_uba_39+1,_uba_3a+1,_uba_3b+1,_uba_3c+1,_uba_3d+1,_uba_3e+1,_uba_3f+1
.long _uba_40+1,_uba_41+1,_uba_42+1,_uba_43+1,_uba_44+1,_uba_45+1,_uba_46+1,_uba_47+1
.long _uba_48+1,_uba_49+1,_uba_4a+1,_uba_4b+1,_uba_4c+1,_uba_4d+1,_uba_4e+1,_uba_4f+1
.long _uba_50+1,_uba_51+1,_uba_52+1,_uba_53+1,_uba_54+1,_uba_55+1,_uba_56+1,_uba_57+1
.long _uba_58+1,_uba_59+1,_uba_5a+1,_uba_5b+1,_uba_5c+1,_uba_5d+1,_uba_5e+1,_uba_5f+1
.long _uba_60+1,_uba_61+1,_uba_62+1,_uba_63+1,_uba_64+1,_uba_65+1,_uba_66+1,_uba_67+1
.long _uba_68+1,_uba_69+1,_uba_6a+1,_uba_6b+1,_uba_6c+1,_uba_6d+1,_uba_6e+1,_uba_6f+1
.long _uba_70+1,_uba_71+1,_uba_72+1,_uba_73+1,_uba_74+1,_uba_75+1,_uba_76+1,_uba_77+1
.long _uba_78+1,_uba_79+1,_uba_7a+1,_uba_7b+1,_uba_7c+1,_uba_7d+1,_uba_7e+1,_uba_7f+1
#if NUBA>4
#error "Number of bus adapters must be increased in intvec.s"
#endif
#endif
#endif
#endif
#endif
.globl _eUNIvec
_eUNIvec:
.align 2
trp_0x00: pushal msg_trp_0x00
calls $1,_conout
halt
.align 2
#
# trp_0x04 is the badaddress trap, also called when referencing
# a invalid address (busserror)
# _memtest (memtest in C) holds the address to continue execution
# at when returning from a intentional test.
#
trp_0x04:
cmpl $0,_memtest # Ar we running the memory test?
bneq 1f # Yes.
# Get number of extra
addl2 (sp)+,sp # long:s on interrupt stack
# Remove all the overhead
pushl r0
pushl r1
movl 8(sp),r1
pushl r1 # The address
pushl (r1) # The instruction
pushal msg_trp_0x04
calls $1,_printf
movq (sp)+,r1
movq (sp)+,r0
halt # halt for debugging
rei
1: # Ok, we got the last address
# Get number of extra
addl2 (sp)+,sp # long:s on interrupt stack
# Remove all the overhead
movl _memtest,(sp) # Do not redo the address
# that generated the trap
mtpr $0xF,$PR_MCESR # clear the bus error bit
# XXX What if there was another error?
movl $0,_memtest
rei
.align 2
trp_0x08: pushal msg_trp_0x08
calls $1,_conout
halt
rei
.align 2
trp_0x0C: pushal msg_trp_0x0C
calls $1,_conout
halt
rei
.align 2
trp_0x10:
pushl r0
pushl r1
movl 8(sp),r1
pushl r1
pushl (r1)
pushal msg_trp_0x10
calls $1,_printf
movq (sp)+,r1
movq (sp)+,r0
halt
rei
.align 2
trp_0x14: pushal msg_trp_0x14
calls $1,_conout
halt
rei
.align 2
trp_0x18: # halt
pushl r0 # Reserved operand
pushl r1
movl 8(sp),r1
pushl r1 # The address
pushl (r1) # The instruction
pushal msg_trp_0x18
calls $1,_printf
movq (sp)+,r1
movq (sp)+,r0
halt
rei
.align 2
trp_0x1C: pushal msg_trp_0x1C # Reserved address
calls $1,_conout
halt
rei
.align 2
trp_0x20:
pushl r0
pushl r1
pushl 16(sp)
pushl 16(sp)
pushal msg_trp_0x20
calls $1,_printf
movq (sp)+,r1
movq (sp)+,r0
addl2 $8,sp
halt
rei
trp_0x24: .align 2
pushl r0 # We first check for a simulated
movl 8(sp),r0 # page reference
bicl2 $0x800001ff,r0
ashl $-7,r0,r0
addl2 _Sysmap,r0 # Now we have calculated pte addr...
bbsc $PG_SREF,(r0),1f # Funny instruction :)
pushl r1 # A 'real' page fault...
pushl 20(sp)
pushl 20(sp)
pushl 20(sp)
pushl 20(sp)
calls $4,_ingen_v
movl (sp)+,r1
movl (sp)+,r0
halt
rei
1: bisl2 $(PG_REF|PG_V),(r0) # Set valid & ref bit
movl (sp),r0
addl2 $12,sp # pop params off stack
rei
trp_0x28: .align 2
pushal msg_trp_0x28
calls $1,_conout
halt
rei
.align 2
trp_0x2C: pushal msg_trp_0x2C
calls $1,_conout
halt
rei
.align 2
trp_0x30: pushal msg_trp_0x30
calls $1,_conout
halt
rei
.align 2
trp_0x34: pushal msg_trp_0x34
calls $1,_conout
halt
rei
.align 2
trp_0x38: pushal msg_trp_0x38
calls $1,_conout
halt
rei
.align 2
trp_0x3C: pushal msg_trp_0x3C
calls $1,_conout
halt
rei
.align 2 # Main system call
.globl trp_0x40
trp_0x40:
# halt
pushl r0
pushl r1
pushl ap
pushl sp
calls $2,_syscall
movl (sp),r1
movl 4(sp),r0
addl2 $12,sp
mtpr $0x1f,$PR_IPL
# halt
rei
.align 2
trp_0x44: pushal msg_trp_0x44
calls $1,_conout
halt
rei
.align 2
trp_0x48: pushal msg_trp_0x48
calls $1,_conout
halt
rei
.align 2
trp_0x4C: pushal msg_trp_0x4C
calls $1,_conout
halt
rei
.align 2
trp_0x50: pushal msg_trp_0x50
calls $1,_conout
halt
.align 2
trp_0x54: pushal msg_trp_0x54
calls $1,_conout
halt
.align 2
trp_0x58: pushal msg_trp_0x58
calls $1,_conout
halt
.align 2
trp_0x5C: pushal msg_trp_0x5C
calls $1,_conout
halt
.align 2
trp_0x60: pushl r0
pushl r1
pushl 16(sp)
pushl 16(sp)
pushal msg_trp_0x60
calls $1,_printf
movq (sp)+,r1
movq (sp)+,r0
addl2 $8,sp
halt
rei
.align 2
trp_0x64: pushal msg_trp_0x64
calls $1,_conout
halt
.align 2
trp_0x68: pushal msg_trp_0x68
calls $1,_conout
halt
.align 2
trp_0x6C: pushal msg_trp_0x6C
calls $1,_conout
halt
.align 2
trp_0x70: pushal msg_trp_0x70
calls $1,_conout
halt
.align 2
trp_0x74: pushal msg_trp_0x74
calls $1,_conout
halt
.align 2
trp_0x78: pushal msg_trp_0x78
calls $1,_conout
halt
.align 2
trp_0x7C: pushal msg_trp_0x7C
calls $1,_conout
halt
.align 2
trp_0x80: pushal msg_trp_0x80
calls $1,_conout
halt
.align 2
trp_0x84: pushal msg_trp_0x84
calls $1,_conout
halt
.align 2
trp_0x88: pushr $0x3 # AST trap
calls $0,_astint
popr $0x3
rei
.align 2
trp_0x8C: pushal msg_trp_0x8C
calls $1,_conout
halt
.align 2
trp_0x90: pushal msg_trp_0x90
calls $1,_conout
halt
.align 2
trp_0x94: pushal msg_trp_0x94
calls $1,_conout
halt
.align 2
trp_0x98: pushal msg_trp_0x98
calls $1,_conout
halt
.align 2
trp_0x9C: pushal msg_trp_0x9C
calls $1,_conout
halt
.align 2
trp_0xA0:
pushr $0x7fff # Software interrupt vector
# pushl sp
# addl2 $8,(sp)
calls $0,_softclock
popr $0x7fff
rei
.align 2
trp_0xA4: pushal msg_trp_0xA4
calls $1,_conout
halt
.align 2
trp_0xA8: pushal msg_trp_0xA8
calls $1,_conout
halt
.align 2
trp_0xAC: pushal msg_trp_0xAC
calls $1,_conout
halt
.align 2
trp_0xB0: pushal msg_trp_0xB0
calls $1,_conout
halt
.align 2
trp_0xB4: pushal msg_trp_0xB4
calls $1,_conout
halt
.align 2
trp_0xB8: pushal msg_trp_0xB8
calls $1,_conout
halt
.align 2
trp_0xBC: pushal msg_trp_0xBC
calls $1,_conout
halt
.align 2
trp_0xC0:
mtpr $0xc1,$PR_ICCS # Reset interrupt flag
pushr $0x7fff
pushl sp
addl2 $60,(sp)
# halt
calls $1,_hardclock
popr $0x7fff
rei
.align 2
trp_0xC4: pushal msg_trp_0xC4
calls $1,_conout
halt
.align 2
trp_0xC8: pushal msg_trp_0xC8
calls $1,_conout
halt
.align 2
trp_0xCC: pushal msg_trp_0xCC
calls $1,_conout
halt
.align 2
trp_0xD0: pushal msg_trp_0xD0
calls $1,_conout
halt
.align 2
trp_0xD4: pushal msg_trp_0xD4
calls $1,_conout
halt
.align 2
trp_0xD8: pushal msg_trp_0xD8
calls $1,_conout
halt
.align 2
trp_0xDC: pushal msg_trp_0xDC
calls $1,_conout
halt
.align 2
trp_0xE0: pushal msg_trp_0xE0
calls $1,_conout
halt
.align 2
trp_0xE4: pushal msg_trp_0xE4
calls $1,_conout
halt
.align 2
trp_0xE8: pushal msg_trp_0xE8
calls $1,_conout
halt
.align 2
trp_0xEC: pushal msg_trp_0xEC
calls $1,_conout
halt
.align 2
trp_0xF0: pushal msg_trp_0xF0
calls $1,_conout
halt
.align 2
trp_0xF4: pushal msg_trp_0xF4
calls $1,_conout
halt
.align 2
trp_0xF8: pushal msg_trp_0xF8
calls $1,_conout
halt
.align 2
trp_0xFC: pushal msg_trp_0xFC
calls $1,_conout
halt
msg_end_of_memtest: .asciz "Memory check, at addr: 0x%x, MCESR: 0x%x, MCESR cleared\n"
msg_trp_0x00: .asciz "\r\nTrap: 0x00 Unused.\r\n"
msg_trp_0x04: .asciz "\r\nTrap: 0x04 V_MACHINE_CHK\nTried to execute op: 0x%x\n from address: 0x%x\n"
msg_trp_0x08: .asciz "\r\nTrap: 0x08 V_K_STK_INV\r\n"
msg_trp_0x0C: .asciz "\r\nTrap: 0x0C V_POWER_FAIL\r\n"
msg_trp_0x10: .asciz "\r\nTrap: 0x10 V_PRIV_INSTR\nTried to execute op: 0x%x\n from address: 0x%x\n"
msg_trp_0x14: .asciz "\r\nTrap: 0x14 V_CUSTOMER\n"
msg_trp_0x18: .asciz "\r\nTrap: 0x18 V_RES_OP\nTried to execute op: 0x%x\n from address: 0x%x\n"
msg_trp_0x1C: .asciz "\r\nTrap: 0x1C V_RES_ADD_MODE.\r\n"
msg_trp_0x20: .asciz "\r\nTrap: 0x20 V_ACC_CNTL_VIO\nTried to access virtual adress: 0x%x\n from address: 0x%x\n"
msg_trp_0x24: .asciz "\r\nTrap: 0x24 V_TRANSL_INV\nTried to access virtual adress: 0x%x\n from address: 0x%x\nObserve: YOU forgot to set the pte valid bit!\n"
msg_trp_0x28: .asciz "\r\nTrap: 0x28 V_TRACE_PEND\r\n"
msg_trp_0x2C: .asciz "\r\nTrap: 0x2C V_BREAKPOINT\r\n"
msg_trp_0x30: .asciz "\r\nTrap: 0x30 V_COMPAT\r\n"
msg_trp_0x34: .asciz "\r\nTrap: 0x34 V_ARITHMETIC\r\n"
msg_trp_0x38: .asciz "\r\nTrap: 0x38 Unused.\r\n"
msg_trp_0x3C: .asciz "\r\nTrap: 0x3C Unused.\r\n"
msg_trp_0x40: .asciz "\r\nTrap: 0x40 V_CHMK\r\n"
msg_trp_0x44: .asciz "\r\nTrap: 0x44 V_CHME\r\n"
msg_trp_0x48: .asciz "\r\nTrap: 0x48 V_CHMS.\r\n"
msg_trp_0x4C: .asciz "\r\nTrap: 0x4C V_CHMU\r\n"
msg_trp_0x50: .asciz "\r\nTrap: 0x50 V_SBI_SILO\r\n"
msg_trp_0x54: .asciz "\r\nTrap: 0x54 V_CORR_READ\r\n"
msg_trp_0x58: .asciz "\r\nTrap: 0x58 V_SBI_ALERT\r\n"
msg_trp_0x5C: .asciz "\r\nTrap: 0x5C V_SBI_FAULT\r\n"
msg_trp_0x60: .asciz "\r\nTrap: 0x24 V_MEM_W_TOUT\nTried to access virtual adress: 0x%x\n from address: 0x%x\n\n"
msg_trp_0x64: .asciz "\r\nTrap: 0x64 Unused.\r\n"
msg_trp_0x68: .asciz "\r\nTrap: 0x68 Unused.\r\n"
msg_trp_0x6C: .asciz "\r\nTrap: 0x6C Unused.\r\n"
msg_trp_0x70: .asciz "\r\nTrap: 0x70 Unused.\r\n"
msg_trp_0x74: .asciz "\r\nTrap: 0x74 Unused.\r\n"
msg_trp_0x78: .asciz "\r\nTrap: 0x78 Unused.\r\n"
msg_trp_0x7C: .asciz "\r\nTrap: 0x7C Unused.\r\n"
msg_trp_0x80: .asciz "\r\nTrap: 0x80 Unused.\r\n"
msg_trp_0x84: .asciz "\r\nTrap: 0x84 V_SW_LVL1\r\n"
msg_trp_0x88: .asciz "\r\nTrap: 0x88 V_SW_LVL2\r\n"
msg_trp_0x8C: .asciz "\r\nTrap: 0x8C V_SW_LVL3\r\n"
msg_trp_0x90: .asciz "\r\nTrap: 0x90 V_SW_LVL4\r\n"
msg_trp_0x94: .asciz "\r\nTrap: 0x94 V_SW_LVL5\r\n"
msg_trp_0x98: .asciz "\r\nTrap: 0x98 V_SW_LVL6\r\n"
msg_trp_0x9C: .asciz "\r\nTrap: 0x9C V_SW_LVL7\r\n"
msg_trp_0xA0: .asciz "\r\nTrap: 0xA0 V_SW_LVL8\r\n"
msg_trp_0xA4: .asciz "\r\nTrap: 0xA4 V_SW_LVL9\r\n"
msg_trp_0xA8: .asciz "\r\nTrap: 0xA8 V_SW_LVL10\r\n"
msg_trp_0xAC: .asciz "\r\nTrap: 0xAC V_SW_LVL11\r\n"
msg_trp_0xB0: .asciz "\r\nTrap: 0xB0 V_SW_LVL12\r\n"
msg_trp_0xB4: .asciz "\r\nTrap: 0xB4 V_SW_LVL13\r\n"
msg_trp_0xB8: .asciz "\r\nTrap: 0xB8 V_SW_LVL14\r\n"
msg_trp_0xBC: .asciz "\r\nTrap: 0xBC V_SW_LVL15\r\n"
msg_trp_0xC0: .asciz "\r\nTrap: 0xC0 V_INTERVAL\r\n"
msg_trp_0xC4: .asciz "\r\nTrap: 0xC4 Unused.\r\n"
msg_trp_0xC8: .asciz "\r\nTrap: 0xC8 Unused.\r\n"
msg_trp_0xCC: .asciz "\r\nTrap: 0xCC Unused.\r\n"
msg_trp_0xD0: .asciz "\r\nTrap: 0xD0 Unused.\r\n"
msg_trp_0xD4: .asciz "\r\nTrap: 0xD4 Unused.\r\n"
msg_trp_0xD8: .asciz "\r\nTrap: 0xD8 Unused.\r\n"
msg_trp_0xDC: .asciz "\r\nTrap: 0xDC Unused.\r\n"
msg_trp_0xE0: .asciz "\r\nTrap: 0xE0 Unused.\r\n"
msg_trp_0xE4: .asciz "\r\nTrap: 0xE4 Unused.\r\n"
msg_trp_0xE8: .asciz "\r\nTrap: 0xE8 Unused.\r\n"
msg_trp_0xEC: .asciz "\r\nTrap: 0xEC Unused.\r\n"
msg_trp_0xF0: .asciz "\r\nTrap: 0xF0 V_CONSOLE_SR\r\n"
msg_trp_0xF4: .asciz "\r\nTrap: 0xF4 V_CONSOLE_ST\r\n"
msg_trp_0xF8: .asciz "\r\nTrap: 0xF8 V_CONSOLE_TR\r\n"
msg_trp_0xFC: .asciz "\r\nTrap: 0xFC V_CONSOLE_TT\r\n"

326
sys/arch/vax/vax/ka750.c Normal file
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@ -0,0 +1,326 @@
/*-
* Copyright (c) 1982, 1986, 1988 The Regents of the University of California.
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)ka750.c 7.4 (Berkeley) 5/9/91
* also from: @(#)autoconf.c 7.20 (Berkeley) 5/9/91
* $Id: ka750.c,v 1.1 1994/08/02 20:21:58 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#if VAX750
#include "sys/param.h"
#include "sys/types.h"
#include "vax/include/ka750.h"
#include "vax/include/nexus.h"
#include "vax/include/pte.h"
#include "vax/include/mtpr.h"
#include "vax/uba/ubavar.h"
#include "vax/uba/ubareg.h"
#include "mba.h"
#include "uba.h"
#include "vm/vm.h"
#include "vm/vm_kern.h"
#include "vax/include/pmap.h"
struct nexus *nexus;
conf_750(){
extern int cpu_type, nmcr, nmba, numuba;
int i,j,k,l,m,cardinfo,nexnum;
void *tempaddr;
union nexcsr nexcsr;
extern caddr_t mcraddr[];
printf("VAX 11/750, hardware rev %d, ucode rev %d\n",
V750HARDW(cpu_type), V750UCODE(cpu_type));
/*
* First we map up so that we have virtual I/O-adresses for each nexus.
*/
phys_map=kmem_suballoc(kernel_map, &nexus, &tempaddr,
(16*sizeof(struct nexus)), FALSE);
/* XXX 16==NNEXUS */
pmap_map(nexus, 0xf20000, 0xf40000, VM_PROT_READ|VM_PROT_WRITE);
/* XXX 0xf20000 == NEXBASE */
/*
* Check out what type of nexus there is. On 750 nexus don't identify
* themselves, so we check them for specific places. :-/
*/
for(nexnum=0;nexnum<4;nexnum++){ /* First mcr at 0-3 */
if(badaddr((caddr_t)&nexus[nexnum],4))continue;
mcraddr[nmcr]=(caddr_t)&nexus[nexnum];
printf("mcr%d at tr%d: mcr type ", nmcr++, nexnum);
/* We will use this info for error reporting - later! */
cardinfo=*((int *)(nexus+nexnum)+2);
switch((cardinfo>>24)&3){
case 0: printf("L0011 ");
break;
case 1: printf("L0016 ");
m=cardinfo&0xaaaa;
for(k=l=0;k<16;k++){if(m&1)l++;m>>=1;}
printf("with %d M8750",l);
break;
case 3: printf("L0022 ");
m=cardinfo&0x5555;
for(k=l=0;k<16;k++){if(m&1)l++;m>>=1;}
printf("with %d M7199",l);
m=cardinfo&0xaaaa;
if(m){
for(k=l=0;k<16;k++){if(m&1)l++;m>>=1;}
printf(" and %d M8750",l);
}
break;
}
printf("\n");
}
for(nexnum=4;nexnum<8;nexnum++){ /* Check mba at 4-7 */
if(badaddr((caddr_t)&nexus[nexnum],4)) continue;
printf("mba%d at tr%d", nmba, nexnum);
if(nmba>=NMBA){
printf(" not configured.\n");
} else {
printf("\n");
#if NMBA > 0
mbafind(nexnum,&nexus[nexnum]);
#endif
}
nmba++;
}
for(nexnum=8;nexnum<10;nexnum++){
if(badaddr((caddr_t)&nexus[nexnum],4)) continue;
printf("uba%d at tr%d", numuba, nexnum);
if(numuba>=NUBA){
printf(" not configured.\n");
} else {
printf("\n");
#if NUBA > 0
uba750(nexnum,&nexus[nexnum]);
#endif
}
numuba++;
}
for(nexnum=10;nexnum<16;nexnum++){
if(badaddr((caddr_t)&nexus[nexnum],4)) continue;
nexcsr=nexus[nexnum].nexcsr;
switch(nexcsr.nex_type){
case NEX_UBA0:
case NEX_UBA1:
case NEX_UBA2:
case NEX_UBA3:
printf("uba%d at tr%d ", numuba, nexnum);
if(nmba>=NUBA){
printf(" not configured.\n");
}
break;
default:
printf("nexus type %x", nexcsr.nex_type);
unsupp:
printf(" unsupported (at tr %d)\n", nexnum);
continue;
}
}
/*
* Enable memory error reporting.
*/
ka750_memenable();
}
clock_750(){
int i;
/*
* It's time to start clocks in system...
*/
i=~10000; /* Complement of 10000 milliseconds */
mtpr(i,PR_NICR); /* Load in count register */
mtpr(0x51,PR_ICCS); /* Start clock and enable interrupt */
if(mfpr(PR_TODR)){
/* todr running */
return 0;
} else {
/* Start TODR register. */
mtpr(1,PR_TODR);
return 1;
}
}
#if NMBA < 1
/*
* Dummy routine; should never be called. :)
* Should also be somewhere else, but it doesn't matter right now :)
*/
mbainterrupt(){return;}
#endif
#if NUBA > 0
uba750(int nexnum,caddr_t nexaddr){
extern struct uba_hd uba_hd[];
extern int numuba;
struct uba_regs *ubar=(struct uba_regs *)nexaddr;
void *tempaddr;
unsigned int i;
struct uba_hd *uhp = &uba_hd[numuba];
uhp->uh_mr = ubar->uba_map;
uhp->uh_type = DW750;
uhp->uh_uba = (void*)nexaddr;
uhp->uh_physuba = (void*)0xf20000+nexnum*0x2000;
uhp->uh_memsize = UBAPAGES;
uhp->uh_mem = Tumem(numuba);
uhp->uh_iopage = Tumem(numuba) + (uhp->uh_memsize * NBPG);
/*
* First we map up so that we have virtual I/O-adresses for each nexus.
*/
/* phys_map=kmem_suballoc(kernel_map, &Numem, &tempaddr,
(UBAPAGES+UBAIOPAGES)*NBPG, FALSE);
pmap_map(Numem, UMEM750(numuba), UMEM750(numuba)+
(UBAPAGES+UBAIOPAGES)*NBPG, VM_PROT_READ|VM_PROT_WRITE);
*/
ioaccess(UMEM750(numuba), UMEMmap[numuba], (UBAPAGES+UBAIOPAGES)*NBPG);
unifind(uhp, UMEM750(numuba) + (uhp->uh_memsize * NBPG));
}
#else
ubainterrupt(){return;}
#endif
/*
* 750-specific code.
*/
#include "sys/param.h"
/* #include "mem.h" */
#include "../include/mtpr.h"
extern caddr_t mcraddr[];
struct mcr750 {
int mc_err; /* error bits */
int mc_inh; /* inhibit crd */
};
#define M750_ICRD 0x10000000 /* inhibit crd interrupts, in [1] */
#define M750_UNCORR 0xc0000000 /* uncorrectable error, in [0] */
#define M750_CORERR 0x20000000 /* correctable error, in [0] */
#define M750_INH(mcr) ((mcr)->mc_inh = 0)
#define M750_ENA(mcr) ((mcr)->mc_err = (M750_UNCORR|M750_CORERR), \
(mcr)->mc_inh = M750_ICRD)
#define M750_ERR(mcr) ((mcr)->mc_err & (M750_UNCORR|M750_CORERR))
#define M750_SYN(err) ((err) & 0x7f)
#define M750_ADDR(err) (((err) >> 9) & 0x7fff)
/* enable crd interrupts */
ka750_memenable()
{
M750_ENA((struct mcr750 *)mcraddr[0]);
}
/* log crd errors */
ka750_memerr()
{
register struct mcr750 *mcr = (struct mcr750 *)mcraddr[0];
register int err;
if (M750_ERR(mcr)) {
err = mcr->mc_err; /* careful with i/o space refs */
printf("mcr0: %s", err & M750_UNCORR ?
"hard error" : "soft ecc");
printf(" addr %x syn %x\n", M750_ADDR(err), M750_SYN(err));
M750_INH(mcr);
}
}
char mc750[]={"0","1","2","3","4","5","6","7","8","9","10","11","12","13",
"14","15"};
struct mc750frame {
int mc5_bcnt; /* byte count == 0x28 */
int mc5_summary; /* summary parameter (as above) */
int mc5_va; /* virtual address register */
int mc5_errpc; /* error pc */
int mc5_mdr;
int mc5_svmode; /* saved mode register */
int mc5_rdtimo; /* read lock timeout */
int mc5_tbgpar; /* tb group parity error register */
int mc5_cacherr; /* cache error register */
int mc5_buserr; /* bus error register */
int mc5_mcesr; /* machine check status register */
int mc5_pc; /* trapped pc */
int mc5_psl; /* trapped psl */
};
#define MC750_TBERR 2 /* type code of cp tbuf par */
#define MC750_TBPAR 4 /* tbuf par bit in mcesr */
ka750_mchk(cmcf)
caddr_t cmcf;
{
register struct mc750frame *mcf = (struct mc750frame *)cmcf;
register int type = mcf->mc5_summary;
int mcsr = mfpr(PR_MCSR);
printf("machine check %x: %s%s\n", type, mc750[type&0xf],
(type&0xf0) ? " abort" : " fault");
mtpr(PR_TBIA, 0);
mtpr(PR_MCESR, 0xf);
printf(
"\tva %x errpc %x mdr %x smr %x rdtimo %x tbgpar %x cacherr %x\n",
mcf->mc5_va, mcf->mc5_errpc, mcf->mc5_mdr, mcf->mc5_svmode,
mcf->mc5_rdtimo, mcf->mc5_tbgpar, mcf->mc5_cacherr);
printf("\tbuserr %x mcesr %x pc %x psl %x mcsr %x\n",
mcf->mc5_buserr, mcf->mc5_mcesr, mcf->mc5_pc, mcf->mc5_psl,
mcsr);
if (type == MC750_TBERR && (mcf->mc5_mcesr&0xe) == MC750_TBPAR) {
printf("tbuf par: flushing and returning\n");
return (0);
}
return (-1);
}
#endif

90
sys/arch/vax/vax/locon.s Normal file
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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: locon.s,v 1.1 1994/08/02 20:21:59 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#include "vax/include/mtpr.h"
.text
/******************************************************************************
_conout(char* message);
Routine to print message to console.
******************************************************************************/
.globl _consinit
.globl _conout
_conout: .word 0x3
movl 4(ap),r0
1: tstb (r0) # Test for end of string.
beql 3f # If end, exit.
2: mfpr $ PR_TXCS,r1 # Wait until ready to Tx.
# bbc $7,r1,2b
.long 0xf95107e1
clrl r1 # Need to make a 32 bit write with
movb (r0)+,r1 # all except 8 low bits cleared.
mtpr r1,$ PR_TXDB # Send the character.
brb 1b # Loop for next character.
3: ret
_consinit: .word 0x0
ret # No init currently needed.
.globl _cnputc
_cnputc: .word 0x3
movl 4(ap),r0
4: mfpr $ PR_TXCS,r1
bbc $7,r1,4b
mtpr r0,$ PR_TXDB
cmpb r0,$10
beql 5f
ret
5: movl $13,r0
brb 4b
.data
.space 512
temp_stack:
.globl _cngetc
_cngetc: .word 0x2
6: mfpr $ PR_RXCS,r1
bbc $7,r1,6b
mfpr $ PR_RXDB,r0
bicl2 $0xffffff80,r0
ret

1110
sys/arch/vax/vax/locore.s Normal file

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369
sys/arch/vax/vax/machdep.c Normal file
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/*
* Copyright (c) 1988 University of Utah.
* Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: Utah Hdr: machdep.c 1.63 91/04/24
* from: @(#)machdep.c 7.16 (Berkeley) 6/3/91
* $Id: machdep.c,v 1.1 1994/08/02 20:22:02 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#include "sys/param.h"
#include "vax/include/sid.h"
#include "sys/map.h"
#include "buf.h"
#include "mbuf.h"
#include "vax/include/pte.h"
#include "uba.h"
#include "reboot.h"
#include "sys/callout.h"
#include "sys/device.h"
#include "conf.h"
#include "sys/proc.h"
#include "sys/user.h"
#include "sys/time.h"
#include "sys/kernel.h"
#include "vax/include/mtpr.h"
#include "vax/include/cpu.h"
#include "vm/vm.h"
#include "vm/vm_kern.h"
#include "vm/vm_page.h"
#include "vax/include/macros.h"
#include "vax/include/nexus.h"
/*
* We do these external declarations here, maybe they should be done
* somewhere else...
*/
int nmcr, nmba, numuba, cold=1;
caddr_t mcraddr[MAXNMCR];
int astpending;
int want_resched;
char machine[]="VAX";
char cpu_model[100];
int msgbufmapped=0;
struct msgbuf *msgbufp;
int physmem=0;
struct cfdriver nexuscd;
int todrstopped;
/* */
#define valloc(name, type, num) \
(name) = (type *)v; v = (caddr_t)((name)+(num))
#define valloclim(name, type, num, lim) \
(name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
#ifdef BUFPAGES
int bufpages = BUFPAGES;
#else
int bufpages = 0;
#endif
int nswbuf = 0;
#ifdef NBUF
int nbuf = NBUF;
#else
int nbuf = 0;
#endif
cpu_startup() {
caddr_t v,tempaddr;
extern char version[];
int base, residual,i;
vm_offset_t minaddr, maxaddr;
vm_size_t size;
extern int cpu_type,boothowto;
extern char *panicstr;
printf("%s\n", version);
printf("RealMem = 0x%s%x\n", PRINT_HEXF(mem_size), mem_size);
panicstr=NULL;
mtpr(AST_NO,PR_ASTLVL);
spl0();
/* printf("avail mem = %d\n", ptoa(vm_page_free_count)); */
boothowto=0; /* XXX Vi l}ser s} att vi alltid f}r root-fr}{ga */
/*
* Allocate space for system data structures.
* First the sizes of the buffers are calculated and then
* memory is allocated for those buffers. The first
* available kernel virtual address is then saved to "v".
* Last of all, the pointers to the buffers are set to point
* to their respective memory area.
*
* An index into the kernel page table corresponding to the
* virtual memory address maintained in "v" is kept in "mapaddr".
*/
bufpages = bufpages ? bufpages : mem_size/NBPG/CLSIZE/10;
nbuf = nbuf ? nbuf : max(bufpages, 16);
nswbuf = nswbuf ? nswbuf : min((nbuf/2)&~1, 256);
/*
printf("cpu_startup(): Mapping 0x%x bytes from kernel_map into v\n",
(nswbuf+nbuf)*sizeof(struct buf));
printf(" Must allocate 0x%x bytes for the operation.\n",
round_page((nswbuf+nbuf)*sizeof(struct buf)));
*/
v = (caddr_t) kmem_alloc(kernel_map,(nswbuf+nbuf)*sizeof(struct buf));
if (v == 0) {
panic("cpu_startup(): Cannot allocate physical memory for buffers");
}
swbuf = (struct buf *) v;
buf = swbuf + nswbuf;
v += round_page((nswbuf+nbuf)*sizeof(struct buf));
/* printf("avail mem = %d\n", ptoa(vm_page_free_count)); */
/* printf("cpu_startup(), after allocation:\n"); XXX */
/* printf("swbuf=0x%x, buf=0x%x, v=0x%x\n", swbuf, buf, v); XXX */
/* printf("nswbuf=0x%x, nbuf=0x%x\n", nswbuf, nbuf); XXX */
/*
* XXX Now allocate buffers proper. They are different than the above
* in that they usually occupy more virtual memory than physical.
*/
size = MAXBSIZE * nbuf;
buffer_map = kmem_suballoc(kernel_map, (vm_offset_t) &buffers,
&maxaddr, size, FALSE);
minaddr = (vm_offset_t) buffers;
if (vm_map_find(buffer_map, vm_object_allocate(size), (vm_offset_t)0,
&minaddr, size, FALSE) != KERN_SUCCESS)
panic("cpu_startup(): Cannot allocate buffers");
/* printf("cpu_startup(): avail mem = %d\n",
ptoa(vm_page_free_count)); /* XXX */
base = bufpages / nbuf;
residual = bufpages % nbuf;
/*
* The first (residual) buffers get (base+1) number of
* physical pages allocated from the beginning.
* The other buffers only get (base) number of physical
* pages allocated. The remaining virtual space of the
* buffers stays unmapped.
*/
for (i = 0; i < nbuf; i++) {
vm_size_t curbufsize;
vm_offset_t curbuf;
curbuf = (vm_offset_t) buffers + i * MAXBSIZE;
curbufsize = CLBYTES * (i < residual ? base+1 : base);
vm_map_pageable(buffer_map, curbuf, curbuf + curbufsize, FALSE);
vm_map_simplify(buffer_map, curbuf);
}
/* We found it cleaner to allocate the i/o buffers in autoconf.c
* instead of here, as the previous (horrid) code did.
* Look in autoconf.c for its specification. (Aqua)
*/
/* printf("cpu_startup(): avail mem = %d\n",
ptoa(vm_page_free_count)); /* XXX */
/*
* Finally, allocate mbuf pool. Since mclrefcnt is an off-size
* we use the more space efficient malloc in place of kmem_alloc.
*/
mclrefcnt = (char *)malloc(NMBCLUSTERS+CLBYTES/MCLBYTES,
M_MBUF, M_NOWAIT);
bzero(mclrefcnt, NMBCLUSTERS+CLBYTES/MCLBYTES);
mb_map = kmem_suballoc(kernel_map, (vm_offset_t)&mbutl, &maxaddr,
VM_MBUF_SIZE, FALSE);
/* printf("Available physical memory = %d.\n", ptoa(vm_page_free_count));*/
printf("Using %d buffers containing %d bytes of memory.\n",
nbuf, bufpages * CLBYTES);
/*
* Set up buffers, so they can be used to read disk labels.
*/
bufinit();
/*
* Initialize callouts
*/
callout=(struct callout *)
kmem_alloc(kernel_map, ncallout*sizeof(struct callout));
callfree = callout;
for (i = 1; i < ncallout; i++)
callout[i-1].c_next = &callout[i];
/*
* XXX Det h{r skall inte alls g|ras s} h{r! (och inte h{r :)
*/
swapmap=(struct map *)
kmem_alloc(kernel_map, (sizeof(struct map)*512)); /* XXX */
nswapmap=512;
/*
* Configure the system.
*/
switch(MACHID(cpu_type)){
#ifdef VAX750
case VAX_750:
strcpy(cpu_model,"VAX 11/750");
conf_750();
break;
#endif
default:
printf("Cpu type %d not configured.\n",MACHID(cpu_type));
asm("halt");
}
#if GENERIC
if ((boothowto & RB_ASKNAME) == 0)
setroot();
setconf();
#else
setroot();
#endif
/*
* Configure swap area and related system
* parameter based on device(s) used.
*/
swapconf();
cold=0;
lastinit();
return;
}
inittodr(time_t disktid){
/*
* disktid contains time from superblock of the root filesystem.
* We compare this with the time in mfpr(PR_TODR) which updates
* 100 times/second. Because todr is only 32 bits, it is simplest
* to start counting from 1/1 00.00 and reset todr an year later.
* One year is about 3153600000 in todr.
*/
int todrtid,nytid;
if(todrstopped){
printf(
"TODR clock not started - time taken from file system.\n");
nytid=disktid;
} else {
/* XXX This is ugly time counting :( */
todrtid=(disktid/(3600*24*365))+1970+(mfpr(PR_TODR)/100);
if(disktid>todrtid){
/* Old well known message :) */
printf(
"WARNING: todr too small -- CHECK AND RESET THE DATE!\n");
/* Use filesystem time anyway */
nytid=disktid;
} else {
nytid=todrtid;
}
}
time.tv_sec=nytid;
}
resettodr(){
printf("Time reset routine resettodr() not implemented yet.\n");
}
dumpconf(){
printf("dumpconf() not implemented - yet!\n");
}
cpu_initclocks(){
todrstopped=clock_750();
}
cpu_sysctl(){
printf("cpu_sysctl:\n");
return(EOPNOTSUPP);
}
setstatclockrate(){
printf("setstatclockrate\n");
asm("halt");
}
struct queue {
struct queue *q_next, *q_prev;
};
/*
* insert an element into a queue
*/
void
_insque(elem, head)
register struct queue *elem, *head;
{
register struct queue *next;
next = head->q_next;
elem->q_next = next;
head->q_next = elem;
elem->q_prev = head;
next->q_prev = elem;
}
/*
* remove an element from a queue
*/
void
_remque(elem)
register struct queue *elem;
{
register struct queue *next, *prev;
next = elem->q_next;
prev = elem->q_prev;
next->q_prev = prev;
prev->q_next = next;
elem->q_prev = 0;
}
lastinit()
{
caddr_t plats;
plats=malloc(4096,M_PCB,M_NOWAIT);
mtpr(plats,PR_P0BR);
mtpr(1,PR_P0LR);
mtpr(plats+4096-0x800000,PR_P1BR);
mtpr(0x1ffffe,PR_P1LR);
mtpr(0x7ffffffc,PR_USP);
printf("lastinit: plats %x\n",plats);
*(int *)plats=0xa0002800;
*(int *)(plats+4092)=0xa0002801;
}

965
sys/arch/vax/vax/mscp.c Normal file
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/*
* Copyright (c) 1988 Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Chris Torek.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)mscp.c 7.5 (Berkeley) 12/16/90
* $Id: mscp.c,v 1.1 1994/08/02 20:22:04 ragge Exp $
*/
/*
* MSCP generic driver routines
*/
#include "sys/param.h"
#include "sys/buf.h"
#include "sys/errno.h"
#include "sys/dkstat.h"
#include "sys/ioctl.h"
#include "sys/disklabel.h"
#include "sys/syslog.h"
#include "../uba/ubavar.h"
#include "mscp.h"
#include "mscpvar.h"
#define PCMD PSWP /* priority for command packet waits */
/*
* During transfers, mapping info is saved in the buffer's b_resid.
*/
#define b_info b_resid
/*
* Get a command packet. Second argument is true iff we are
* to wait if necessary. Return NULL if none are available and
* we cannot wait.
*/
struct mscp *
mscp_getcp(mi, canwait)
register struct mscp_info *mi;
int canwait;
{
#define mri (&mi->mi_cmd)
register struct mscp *mp;
register int i;
int s = splbio();
again:
/*
* Ensure that we have some command credits, and
* that the next command packet is free.
*/
if (mi->mi_credits <= MSCP_MINCREDITS) {
if (!canwait) {
splx(s);
return (NULL);
}
mi->mi_wantcredits = 1;
sleep((caddr_t) &mi->mi_wantcredits, PCMD);
goto again;
}
i = mri->mri_next;
if (mri->mri_desc[i] & MSCP_OWN) {
if (!canwait) {
splx(s);
return (NULL);
}
mi->mi_wantcmd = 1;
sleep((caddr_t) &mi->mi_wantcmd, PCMD);
goto again;
}
mi->mi_credits--;
mri->mri_desc[i] &= ~MSCP_INT;
mri->mri_next = (mri->mri_next + 1) % mri->mri_size;
splx(s);
mp = &mri->mri_ring[i];
/*
* Initialise some often-zero fields.
* ARE THE LAST TWO NECESSARY IN GENERAL? IT SURE WOULD BE
* NICE IF DEC SOLD DOCUMENTATION FOR THEIR OWN CONTROLLERS.
*/
mp->mscp_msglen = MSCP_MSGLEN;
mp->mscp_flags = 0;
mp->mscp_modifier = 0;
mp->mscp_seq.seq_bytecount = 0;
mp->mscp_seq.seq_buffer = 0;
mp->mscp_seq.seq_mapbase = 0;
/*???*/ mp->mscp_sccc.sccc_errlgfl = 0;
/*???*/ mp->mscp_sccc.sccc_copyspd = 0;
return (mp);
#undef mri
}
#ifdef AVOID_EMULEX_BUG
int mscp_aeb_xor = 0x8000bb80;
#endif
/*
* Do a device go. The driver calls this once it has allocated
* resources for the transfer. Save the resource information in
* bp->b_ubinfo, and finish the MSCP packet.
*
* N.B.: If we were blocked for some time, the drive could have gone
* off line and might still be that way. We should probably handle
* such a case by changing this command into an on line request and
* not dequeuing the transfer after all.
*/
mscp_go(mi, mp, info)
register struct mscp_info *mi;
register struct mscp *mp;
int info;
{
register struct buf *bp, *dp;
/*
* Now is also the time to move the transfer off the
* controller and drive queues, and shuffle the drive
* queue on the controller queue. The idea is to try
* to keep as many drives busy as possible---to deal
* the controller's credits out to the drives in a `fair
* share' arrangement. (To do this fully would be more
* trouble than it is worth, though.)
*/
dp = mi->mi_tab->b_actf;
bp = dp->b_actf;
dp->b_actf = bp->b_actf; /* transfer off drive queue */
mi->mi_tab->b_actf = dp->b_hash.le_next;/* drive off ctlr queue */
APPEND(dp, mi->mi_tab, b_hash.le_next); /* then back again */
/* Was: dp->b_actf = bp->av_forw; /* transfer off drive queue */
/* Was: mi->mi_tab->b_actf = dp->b_forw;/* drive off ctlr queue */
/* Was: APPEND(dp, mi->mi_tab, b_forw); /* then back again */
/*
* Move the buffer to the I/O wait queue.
*/
{
struct buf *tmp;
bp->b_actf=&mi->mi_wtab;
if(mi->mi_wtab.b_actf==&mi->mi_wtab){
mi->mi_wtab.b_actf=bp;
} else {
tmp=mi->mi_wtab.b_actf;
while(tmp->b_actf!=&mi->mi_wtab) tmp=tmp->b_actf;
tmp->b_actf=bp;
}}
/* Was: bp->av_back = mi->mi_wtab.av_back;
/* Was: bp->av_forw = &mi->mi_wtab;
/* Was: mi->mi_wtab.av_back->av_forw = bp;
/* Was: mi->mi_wtab.av_back = bp;
/*
* Save the mapping info, finish the command packet, and give
* it to the device. The device's dgo routine should then
* initiate polling.
*/
bp->b_info = info;
#ifdef AVOID_EMULEX_BUG
/*
* The Emulex SC41/MS will occasionally zero the lower half word
* of the command reference number. The upper half word remains
* intact. To keep running, we convert the buffer address into
* a small but nonzero integer that is unique over all pending
* transfers, and store that value in the upper half word. To
* catch occurrances of the bug (so that we can gripe to Emulex),
* we also put a nonzero value in the lower word.
*/
{
register u_int i = mi->mi_nextbp;
do { /* find a free value */
if (mi->mi_bp[i] == 0)
goto found;
i = (i + 1) % AEB_MAX_BP;
} while (i != mi->mi_nextbp);
panic("mscp_go: AEB_MAX_BP too small");
found:
mi->mi_bp[i++] = bp;
mi->mi_nextbp = i % AEB_MAX_BP;
mp->mscp_cmdref = (i << 16) ^ mscp_aeb_xor;
}
#else
mp->mscp_cmdref = (long) bp;
#endif
*mp->mscp_addr |= MSCP_OWN | MSCP_INT;
}
/*
* Handle a response ring transition.
*/
mscp_dorsp(mi)
register struct mscp_info *mi;
{
register struct uba_device *ui;
register struct buf *bp;
register struct mscp *mp;
register int nextrsp;
struct mscp_driver *md = mi->mi_md;
char *ctlrname, *drivename;
int st, error, info;
ctlrname = md->md_mname;
drivename = md->md_dname;
nextrsp = mi->mi_rsp.mri_next;
loop:
if (mi->mi_rsp.mri_desc[nextrsp] & MSCP_OWN) {
/*
* No more responses. Remember the next expected
* response index. Check to see if we have some
* credits back, and wake up sleepers if so.
*/
mi->mi_rsp.mri_next = nextrsp;
if (mi->mi_wantcredits && mi->mi_credits > MSCP_MINCREDITS) {
mi->mi_wantcredits = 0;
wakeup((caddr_t) &mi->mi_wantcredits);
}
return;
}
/*
* Found a response. Update credit information. If there is
* nothing else to do, jump to `done' to get the next response.
*/
mp = &mi->mi_rsp.mri_ring[nextrsp];
mi->mi_credits += MSCP_CREDITS(mp->mscp_msgtc);
switch (MSCP_MSGTYPE(mp->mscp_msgtc)) {
case MSCPT_SEQ:
break;
case MSCPT_DATAGRAM:
(*md->md_dgram)(mi, mp);
goto done;
case MSCPT_CREDITS:
goto done;
case MSCPT_MAINTENANCE:
default:
printf("%s%d: unit %d: unknown message type 0x%x ignored\n",
ctlrname, mi->mi_ctlr, mp->mscp_unit,
MSCP_MSGTYPE(mp->mscp_msgtc));
goto done;
}
/*
* Controllers are allowed to interrupt as any drive, so we
* must check the command before checking for a drive.
*/
if (mp->mscp_opcode == (M_OP_SETCTLRC | M_OP_END)) {
(*md->md_ctlrdone)(mi, mp);
goto done;
}
/*
* Find the drive info. If there is none, and this is an
* available attention response, try configuring a new drive.
*/
if (mp->mscp_unit > md->md_ndpc) {
printf("%s%d: unit %d out of range\n",
ctlrname, mi->mi_ctlr, mp->mscp_unit);
goto done;
}
if ((ui = mi->mi_ip[mp->mscp_unit]) == NULL) {
if ((*md->md_unconf)(mi, mp) != MSCP_DONE) {
printf("%s%d: unit %d not configured, ",
ctlrname, mi->mi_ctlr, mp->mscp_unit);
if (mp->mscp_opcode == M_OP_AVAILATTN)
printf("available attn");
else
printf("stray response op 0x%x status 0x%x",
mp->mscp_opcode, mp->mscp_status);
printf(" ignored\n");
}
goto done;
}
/*
* Handle individual responses.
*/
st = mp->mscp_status & M_ST_MASK;
error = 0;
switch (mp->mscp_opcode) {
case M_OP_END:
/*
* The controller presents a bogus END packet when
* a read/write command is given with an illegal
* block number. This is contrary to the MSCP
* specification (ENDs are to be given only for
* invalid commands), but that is the way of it.
*/
if (st == M_ST_INVALCMD && mp->mscp_cmdref != 0) {
printf("%s%d: bad lbn (%d)?\n", drivename,
ui->ui_unit, mp->mscp_seq.seq_lbn);
error = EIO;
goto rwend;
}
goto unknown;
case M_OP_ONLINE | M_OP_END:
/*
* Finished an ON LINE request. Call the driver to
* find out whether it succeeded. If so, mark it on
* line.
*/
if (ui->ui_flags & UNIT_ONLINE) {
printf("%s%d: duplicate ONLINE ignored\n",
drivename, ui->ui_unit);
break;
}
if ((*md->md_online)(ui, mp) == MSCP_DONE)
ui->ui_flags |= UNIT_ONLINE;
break;
case M_OP_GETUNITST | M_OP_END:
/*
* Got unit status. Call the driver to find out
* whether it succeeded, and if so, mark it.
*/
if ((*md->md_gotstatus)(ui, mp) == MSCP_DONE)
ui->ui_flags |= UNIT_HAVESTATUS;
break;
case M_OP_AVAILATTN:
/*
* The drive went offline and we did not notice.
* Mark it off line now, to force an on line request
* next, so we can make sure it is still the same
* drive.
*
* IF THE UDA DRIVER HAS A COMMAND AWAITING UNIBUS
* RESOURCES, THAT COMMAND MAY GO OUT BEFORE THE ON
* LINE. IS IT WORTH FIXING??
*/
ui->ui_flags &= ~(UNIT_ONLINE | UNIT_HAVESTATUS);
#ifdef notyet
(*md->md_offline)(ui, mp);
#endif
break;
case M_OP_READ | M_OP_END:
case M_OP_WRITE | M_OP_END:
/*
* A transfer finished. Get the buffer, and release its
* map registers via ubadone(). If the command finished
* with an off line or available status, the drive went
* off line (the idiot controller does not tell us until
* it comes back *on* line, or until we try to use it).
*/
if (mp->mscp_cmdref == 0) {
/*
* No buffer means there is a bug somewhere!
*/
printf("%s%d: io done, but no buffer?\n",
drivename, ui->ui_unit);
mscp_hexdump(mp);
break;
}
rwend:
#ifdef AVOID_EMULEX_BUG
{
register u_short *p = (u_short *) &mp->mscp_cmdref;
/*
* Note any errors on the part of the controller.
* The lower word should be zero after exclusive
* or'ing with mscp_aeb_xor, and the upper should
* then be in the range [1..AEB_MAX_BP].
*/
mp->mscp_cmdref ^= mscp_aeb_xor;
p[1]--;
if (p[1] >= AEB_MAX_BP)
panic("unrecoverable Emulex screwup");
if (p[0] == 0)
mi->mi_ok++;
else {
/*
* Calculate the expected response,
* assuming p[1] is correct. The
* actual response is then the expected
* response xor p[0].
*/
int sb = ((p[1] + 1) << 16) ^ mscp_aeb_xor;
log(LOG_WARNING, "\
Emulex SC41/MS screwup: %s%d, got %d correct, then changed 0x%x to 0x%x\n",
ctlrname, mi->mi_ctlr,
mi->mi_ok, sb, sb ^ p[0]);
mi->mi_ok = 0;
}
/* convert index back to buffer, and mark free */
bp = mi->mi_bp[p[1]];
mi->mi_bp[p[1]] = 0;
}
#else
bp = (struct buf *) mp->mscp_cmdref;
#ifdef MSCP_PARANOIA
{
register struct buf *q = mi->mi_wtab.av_forw;
/*
* Ensure that this response corresponds to
* some outstanding request. If not, ignore
* it entirely. This will likely cause a
* Unibus reset soon, after which the controller
* just might behave.
*/
while (q != bp && q != &mi->mi_wtab)
q = q->av_forw;
if (q != bp) {
printf("%s%d: bad response packet ignored\n",
ctlrname, mi->mi_ctlr);
mscp_hexdump(mp);
goto out;
}
}
#endif MSCP_PARANOIA
#endif AVOID_EMULEX_BUG
/*
* Mark any error-due-to-bad-LBN (via `goto rwend').
* WHAT STATUS WILL THESE HAVE? IT SURE WOULD BE NICE
* IF DEC SOLD DOCUMENTATION FOR THEIR OWN CONTROLLERS.
*/
if (error) {
bp->b_flags |= B_ERROR;
bp->b_error = error;
}
if (st == M_ST_OFFLINE || st == M_ST_AVAILABLE) {
ui->ui_flags &= ~(UNIT_ONLINE | UNIT_HAVESTATUS);
#ifdef notyet
(*md->md_offline)(ui, mp);
#endif
}
/*
* Unlink the transfer from the wait queue mi_wtab.
* If there are no more transfers on the drive queue
* for this drive, and it is a profiled disk, turn
* off its busy bit.
*/
{ /* Insane */
struct buf *tmp;
tmp=bp->b_actf;
if(!tmp){
printf("Found 0 - bad!\n");
asm("halt");
}
while(tmp->b_actf!=bp){
if(!tmp){
printf("Got lost in chains...\n");
asm("halt");
}
tmp=tmp->b_actf;
}
tmp->b_actf=bp->b_actf;
}
if (ui->ui_dk >= 0 && md->md_utab[ui->ui_unit].b_hash.le_next == NULL)
dk_busy &= ~(1 << ui->ui_dk);
/* Was: bp->av_back->av_forw = bp->av_forw;
bp->av_forw->av_back = bp->av_back;
if (ui->ui_dk >= 0 && md->md_utab[ui->ui_unit].b_forw == NULL)
dk_busy &= ~(1 << ui->ui_dk);
*/
/*
* If the transfer has something to do with bad
* block forwarding, let the driver handle the
* rest.
*/
if ((bp->b_flags & B_BAD) != 0 && md->md_bb != NULL) {
(*md->md_bb)(ui, mp, bp);
goto out;
}
/*
* If the transfer failed, give the driver a crack
* at fixing things up.
*/
if (st != M_ST_SUCCESS) {
switch ((*md->md_ioerr)(ui, mp, bp)) {
case MSCP_DONE: /* fixed */
break;
case MSCP_RESTARTED: /* still working on it */
goto out;
case MSCP_FAILED: /* no luck */
diskerr(bp, drivename, "hard error",
LOG_PRINTF, -1, md->md_lab ?
&md->md_lab[ui->ui_unit] : md->md_lab);
mscp_printevent(mp);
bp->b_flags |= B_ERROR;
bp->b_error = EIO;
break;
}
}
/*
* Set the residual count and mark the transfer as
* done. If the I/O wait queue is now empty, release
* the shared BDP, if any.
*/
info = bp->b_info; /* we are about to clobber it */
bp->b_resid = bp->b_bcount - mp->mscp_seq.seq_bytecount;
(*md->md_iodone)(mi, bp, info);
out:
break;
case M_OP_REPLACE | M_OP_END:
/*
* A replace operation finished. Just let the driver
* handle it (if it does replaces).
*/
if (md->md_replace == NULL)
printf("%s%d: bogus REPLACE end\n",
drivename, ui->ui_unit);
else
(*md->md_replace)(ui, mp);
break;
default:
/*
* If it is not one of the above, we cannot handle it.
* (And we should not have received it, for that matter.)
*/
unknown:
printf("%s%d: unknown opcode 0x%x status 0x%x ignored\n",
mi->mi_md->md_dname, ui->ui_unit,
mp->mscp_opcode, mp->mscp_status);
mscp_hexdump(mp);
break;
}
/*
* If the drive needs to be put back in the controller queue,
* do that now. (`bp' below ought to be `dp', but they are all
* struct buf *.) Note that b_active was cleared in the driver;
* we presume that there is something to be done, hence reassert it.
*/
if (ui->ui_flags & UNIT_REQUEUE) {
bp = &md->md_utab[ui->ui_unit];
if (bp->b_active) panic("mscp_dorsp requeue");
APPEND(bp, mi->mi_tab, b_hash.le_next);
/* Was: APPEND(bp, mi->mi_tab, b_forw); */
bp->b_active = 1;
ui->ui_flags &= ~UNIT_REQUEUE;
}
done:
/*
* Give back the response packet, and take a look at the next.
*/
mp->mscp_msglen = MSCP_MSGLEN;
mi->mi_rsp.mri_desc[nextrsp] |= MSCP_OWN;
nextrsp = (nextrsp + 1) % mi->mi_rsp.mri_size;
goto loop;
}
/*
* Dump the entire contents of an MSCP packet in hex. Mainly useful
* for debugging....
*/
mscp_hexdump(mp)
register struct mscp *mp;
{
register long *p = (long *) mp;
register int i = mp->mscp_msglen;
if (i > 256) /* sanity */
i = 256;
i /= sizeof (*p); /* ASSUMES MULTIPLE OF sizeof(long) */
while (--i >= 0)
printf("0x%x ", *p++);
printf("\n");
}
/*
* Requeue outstanding transfers, e.g., after bus reset.
* Also requeue any drives that have on line or unit status
* info pending.
*/
mscp_requeue(mi)
struct mscp_info *mi;
{
register struct uba_device *ui;
register struct mscp_driver *md = mi->mi_md;
register struct buf *bp, *dp;
register int unit;
struct buf *nextbp;
/*
* Clear the controller chain. Mark everything un-busy; we
* will soon fix any that are in fact busy.
*/
printf("mscp_requeue\n");
asm("halt");
/* XXX mi->mi_tab->b_actf = NULL;
mi->mi_tab->b_active = 0;
for (unit = 0, dp = md->md_utab; unit < md->md_nunits; unit++, dp++) {
ui = md->md_dinfo[unit];
if (ui == NULL || !ui->ui_alive || ui->ui_ctlr != mi->mi_ctlr)
continue; /* not ours */
/* XXX dp->b_forw = NULL;
dp->b_active = 0;
}
/*
* Scan the wait queue, linking buffers onto drive queues.
* Note that these must be put at the front of the drive queue,
* lest we reorder I/O operations.
*/
asm("halt");
/* XXX for (bp = mi->mi_wtab.av_back; bp != &mi->mi_wtab; bp = nextbp) {
nextbp = bp->av_back;
dp = &md->md_utab[minor(bp->b_dev) >> md->md_unitshift];
bp->av_forw = dp->b_actf;
if (dp->b_actf == NULL)
dp->b_actl = bp;
dp->b_actf = bp;
}
mi->mi_wtab.av_forw = mi->mi_wtab.av_back = &mi->mi_wtab;
/*
* Scan for drives waiting for on line or status responses,
* and for drives with pending transfers. Put these on the
* controller queue, and mark the controller busy.
*/
for (unit = 0, dp = md->md_utab; unit < md->md_nunits; unit++, dp++) {
ui = md->md_dinfo[unit];
if (ui == NULL || !ui->ui_alive || ui->ui_ctlr != mi->mi_ctlr)
continue;
ui->ui_flags &= ~(UNIT_HAVESTATUS | UNIT_ONLINE);
if ((ui->ui_flags & UNIT_REQUEUE) == 0 && dp->b_actf == NULL)
continue;
ui->ui_flags &= ~UNIT_REQUEUE;
asm("halt");
/* XXX APPEND(dp, mi->mi_tab, b_forw); */
dp->b_active = 1;
mi->mi_tab->b_active = 1;
}
#ifdef AVOID_EMULEX_BUG
/*
* ... and clear the index-to-buffer table.
*/
for (unit = 0; unit < AEB_MAX_BP; unit++)
mi->mi_bp[unit] = 0;
#endif
}
/*
* MSCP error reporting
*/
/*
* Messages for the various subcodes.
*/
static char unknown_msg[] = "unknown subcode";
/*
* Subcodes for Success (0)
*/
static char *succ_msgs[] = {
"normal", /* 0 */
"spin down ignored", /* 1 = Spin-Down Ignored */
"still connected", /* 2 = Still Connected */
unknown_msg,
"dup. unit #", /* 4 = Duplicate Unit Number */
unknown_msg,
unknown_msg,
unknown_msg,
"already online", /* 8 = Already Online */
unknown_msg,
unknown_msg,
unknown_msg,
unknown_msg,
unknown_msg,
unknown_msg,
unknown_msg,
"still online", /* 16 = Still Online */
};
/*
* Subcodes for Invalid Command (1)
*/
static char *icmd_msgs[] = {
"invalid msg length", /* 0 = Invalid Message Length */
};
/*
* Subcodes for Command Aborted (2)
*/
/* none known */
/*
* Subcodes for Unit Offline (3)
*/
static char *offl_msgs[] = {
"unknown drive", /* 0 = Unknown, or online to other ctlr */
"not mounted", /* 1 = Unmounted, or RUN/STOP at STOP */
"inoperative", /* 2 = Unit Inoperative */
unknown_msg,
"duplicate", /* 4 = Duplicate Unit Number */
unknown_msg,
unknown_msg,
unknown_msg,
"in diagnosis", /* 8 = Disabled by FS or diagnostic */
};
/*
* Subcodes for Unit Available (4)
*/
/* none known */
/*
* Subcodes for Media Format Error (5)
*/
static char *media_fmt_msgs[] = {
"fct unread - edc", /* 0 = FCT unreadable */
"invalid sector header",/* 1 = Invalid Sector Header */
"not 512 sectors", /* 2 = Not 512 Byte Sectors */
"not formatted", /* 3 = Not Formatted */
"fct ecc", /* 4 = FCT ECC */
};
/*
* Subcodes for Write Protected (6)
* N.B.: Code 6 subcodes are 7 bits higher than other subcodes
* (i.e., bits 12-15).
*/
static char *wrprot_msgs[] = {
unknown_msg,
"software", /* 1 = Software Write Protect */
"hardware", /* 2 = Hardware Write Protect */
};
/*
* Subcodes for Compare Error (7)
*/
/* none known */
/*
* Subcodes for Data Error (8)
*/
static char *data_msgs[] = {
"forced error", /* 0 = Forced Error (software) */
unknown_msg,
"header compare", /* 2 = Header Compare Error */
"sync timeout", /* 3 = Sync Timeout Error */
unknown_msg,
unknown_msg,
unknown_msg,
"uncorrectable ecc", /* 7 = Uncorrectable ECC */
"1 symbol ecc", /* 8 = 1 bit ECC */
"2 symbol ecc", /* 9 = 2 bit ECC */
"3 symbol ecc", /* 10 = 3 bit ECC */
"4 symbol ecc", /* 11 = 4 bit ECC */
"5 symbol ecc", /* 12 = 5 bit ECC */
"6 symbol ecc", /* 13 = 6 bit ECC */
"7 symbol ecc", /* 14 = 7 bit ECC */
"8 symbol ecc", /* 15 = 8 bit ECC */
};
/*
* Subcodes for Host Buffer Access Error (9)
*/
static char *host_buffer_msgs[] = {
unknown_msg,
"odd xfer addr", /* 1 = Odd Transfer Address */
"odd xfer count", /* 2 = Odd Transfer Count */
"non-exist. memory", /* 3 = Non-Existent Memory */
"memory parity", /* 4 = Memory Parity Error */
};
/*
* Subcodes for Controller Error (10)
*/
static char *cntlr_msgs[] = {
unknown_msg,
"serdes overrun", /* 1 = Serialiser/Deserialiser Overrun */
"edc", /* 2 = Error Detection Code? */
"inconsistant internal data struct",/* 3 = Internal Error */
};
/*
* Subcodes for Drive Error (11)
*/
static char *drive_msgs[] = {
unknown_msg,
"sdi command timeout", /* 1 = SDI Command Timeout */
"ctlr detected protocol",/* 2 = Controller Detected Protocol Error */
"positioner", /* 3 = Positioner Error */
"lost rd/wr ready", /* 4 = Lost R/W Ready Error */
"drive clock dropout", /* 5 = Lost Drive Clock */
"lost recvr ready", /* 6 = Lost Receiver Ready */
"drive detected error", /* 7 = Drive Error */
"ctlr detected pulse or parity",/* 8 = Pulse or Parity Error */
};
/*
* The following table correlates message codes with the
* decoding strings.
*/
struct code_decode {
char *cdc_msg;
int cdc_nsubcodes;
char **cdc_submsgs;
} code_decode[] = {
#define SC(m) sizeof (m) / sizeof (m[0]), m
"success", SC(succ_msgs),
"invalid command", SC(icmd_msgs),
"command aborted", 0, 0,
"unit offline", SC(offl_msgs),
"unit available", 0, 0,
"media format error", SC(media_fmt_msgs),
"write protected", SC(wrprot_msgs),
"compare error", 0, 0,
"data error", SC(data_msgs),
"host buffer access error", SC(host_buffer_msgs),
"controller error", SC(cntlr_msgs),
"drive error", SC(drive_msgs),
#undef SC
};
/*
* Print the decoded error event from an MSCP error datagram.
*/
mscp_printevent(mp)
struct mscp *mp;
{
register int event = mp->mscp_event;
register struct code_decode *cdc;
int c, sc;
char *cm, *scm;
/*
* The code is the lower six bits of the event number (aka
* status). If that is 6 (write protect), the subcode is in
* bits 12-15; otherwise, it is in bits 5-11.
* I WONDER WHAT THE OTHER BITS ARE FOR. IT SURE WOULD BE
* NICE IF DEC SOLD DOCUMENTATION FOR THEIR OWN CONTROLLERS.
*/
c = event & M_ST_MASK;
sc = (c != 6 ? event >> 5 : event >> 12) & 0x7ff;
if (c >= sizeof code_decode / sizeof code_decode[0])
cm = "- unknown code", scm = "??";
else {
cdc = &code_decode[c];
cm = cdc->cdc_msg;
if (sc >= cdc->cdc_nsubcodes)
scm = unknown_msg;
else
scm = cdc->cdc_submsgs[sc];
}
printf(" %s (%s) (code %d, subcode %d)\n", cm, scm, c, sc);
}
/*
* Print the code and logical block number for an error packet.
* THIS IS PROBABLY PECULIAR TO DISK DRIVES. IT SURE WOULD BE
* NICE IF DEC SOLD DOCUMENTATION FOR THEIR OWN CONTROLLERS.
*/
mscp_decodeerror(name, ctlr, mp)
char *name;
int ctlr;
register struct mscp *mp;
{
/*
* For bad blocks, mp->mscp_erd.erd_hdr identifies a code and
* the logical block number. Code 0 is a regular block; code 6
* is a replacement block. The remaining codes are currently
* undefined. The code is in the upper four bits of the header
* (bits 0-27 are the lbn).
*/
int issoft = mp->mscp_flags & (M_LF_SUCC | M_LF_CONT);
static char *codemsg[16] = {
"lbn", "code 1", "code 2", "code 3",
"code 4", "code 5", "rbn", "code 7",
"code 8", "code 9", "code 10", "code 11",
"code 12", "code 13", "code 14", "code 15"
};
#define BADCODE(h) (codemsg[(unsigned)(h) >> 28])
#define BADLBN(h) ((h) & 0xfffffff)
printf("%s%d: %s error datagram%s:", name, ctlr,
issoft ? "soft" : "hard",
mp->mscp_flags & M_LF_CONT ? " (continuing)" : "");
switch (mp->mscp_format & 0377) {
case M_FM_CTLRERR: /* controller error */
break;
case M_FM_BUSADDR: /* host memory access error */
printf(" memory addr 0x%x:", mp->mscp_erd.erd_busaddr);
break;
case M_FM_DISKTRN:
printf(" unit %d: level %d retry %d, %s %d:",
mp->mscp_unit,
mp->mscp_erd.erd_level, mp->mscp_erd.erd_retry,
BADCODE(mp->mscp_erd.erd_hdr),
BADLBN(mp->mscp_erd.erd_hdr));
break;
case M_FM_SDI:
printf(" unit %d: %s %d:", mp->mscp_unit,
BADCODE(mp->mscp_erd.erd_hdr),
BADLBN(mp->mscp_erd.erd_hdr));
break;
case M_FM_SMLDSK:
printf(" unit %d: small disk error, cyl %d:",
mp->mscp_unit, mp->mscp_erd.erd_sdecyl);
break;
default:
printf(" unit %d: unknown error, format 0x%x:",
mp->mscp_unit, mp->mscp_format);
}
mscp_printevent(mp);
#undef BADCODE
#undef BADLBN
}

471
sys/arch/vax/vax/mscp.h Normal file
View File

@ -0,0 +1,471 @@
/*
* Copyright (c) 1988 Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Chris Torek.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)mscp.h 7.5 (Berkeley) 6/28/90
* $Id: mscp.h,v 1.1 1994/08/02 20:22:06 ragge Exp $
*/
/*
* Definitions for the Mass Storage Control Protocol
* I WISH I KNEW WHAT MORE OF THESE WERE. IT SURE WOULD BE NICE
* IF DEC SOLD DOCUMENTATION FOR THEIR OWN CONTROLLERS.
*/
/*
* Control message opcodes
*/
#define M_OP_ABORT 0x01 /* Abort command */
#define M_OP_GETCMDST 0x02 /* Get command status command */
#define M_OP_GETUNITST 0x03 /* Get unit status command */
#define M_OP_SETCTLRC 0x04 /* Set controller characteristics command */
#define M_OP_SEREX 0x07 /* Serious exception end message */
#define M_OP_AVAILABLE 0x08 /* Available command */
#define M_OP_ONLINE 0x09 /* Online command */
#define M_OP_SETUNITC 0x0a /* Set unit characteristics command */
#define M_OP_DTACCPATH 0x0b /* Determine access paths command */
#define M_OP_ACCESS 0x10 /* Access command */
#define M_OP_COMPCD 0x11 /* Compare controller data command */
#define M_OP_ERASE 0x12 /* Erase command */
#define M_OP_FLUSH 0x13 /* Flush command */
#define M_OP_REPLACE 0x14 /* Replace command */
#define M_OP_COMPHD 0x20 /* Compare host data command */
#define M_OP_READ 0x21 /* Read command */
#define M_OP_WRITE 0x22 /* Write command */
#define M_OP_AVAILATTN 0x40 /* Available attention message */
#define M_OP_DUPUNIT 0x41 /* Duplicate unit number attention message */
#define M_OP_ACCPATH 0x42 /* Access path attention message */
#define M_OP_END 0x80 /* End message flag */
/*
* Generic command modifiers
*/
#define M_MD_EXPRS 0x8000 /* Express request */
#define M_MD_COMP 0x4000 /* Compare */
#define M_MD_CLSEX 0x2000 /* Clear serious exception */
#define M_MD_ERROR 0x1000 /* Force error */
#define M_MD_SCCHH 0x0800 /* Suppress caching (high speed) */
#define M_MD_SCCHL 0x0400 /* Suppress caching (low speed) */
#define M_MD_SECOR 0x0200 /* Suppress error correction */
#define M_MD_SEREC 0x0100 /* Suppress error recovery */
#define M_MD_SSHDW 0x0080 /* Suppress shadowing */
#define M_MD_WBKNV 0x0040 /* Write back (non-volatile) */
#define M_MD_WBKVL 0x0020 /* Write back (volatile) */
#define M_MD_WRSEQ 0x0010 /* Write shadow set one unit at a time */
/*
* AVAILABLE command modifiers
*/
#define M_AVM_ALLCD 0x0002 /* All class drivers */
#define M_AVM_SPINDOWN 0x0001 /* Spin down */
/*
* FLUSH command modifiers
*/
#define M_FLM_FLUSHENU 0x0001 /* Flush entire unit */
#define M_FLM_VOLATILE 0x0002 /* Volatile only */
/*
* GET UNIT STATUS command modifiers
*/
#define M_GUM_NEXTUNIT 0x0001 /* Next unit */
/*
* ONLINE command modifiers
*/
#define M_OLM_RIP 0x0001 /* Allow self destruction */
#define M_OLM_IGNMF 0x0002 /* Ignore media format error */
/*
* ONLINE and SET UNIT CHARACTERISTICS command modifiers
*/
#define M_OSM_ALTERHI 0x0020 /* Alter host identifier */
#define M_OSM_SHADOWSP 0x0010 /* Shadow unit specified */
#define M_OSM_CLEARWBL 0x0008 /* Clear write-back data lost */
#define M_OSM_SETWRPROT 0x0004 /* Set write protect */
/*
* REPLACE command modifiers
*/
#define M_RPM_PRIMARY 0x0001 /* Primary replacement block */
/*
* End message flags
*/
#define M_EF_BBLKR 0x80 /* Bad block reported */
#define M_EF_BBLKU 0x40 /* Bad block unreported */
#define M_EF_ERLOG 0x20 /* Error log generated */
#define M_EF_SEREX 0x10 /* Serious exception */
/*
* Controller flags
*/
#define M_CF_ATTN 0x80 /* Enable attention messages */
#define M_CF_MISC 0x40 /* Enable miscellaneous error log messages */
#define M_CF_OTHER 0x20 /* Enable other host's error log messages */
#define M_CF_THIS 0x10 /* Enable this host's error log messages */
#define M_CF_MLTHS 0x04 /* Multi-host */
#define M_CF_SHADW 0x02 /* Shadowing */
#define M_CF_576 0x01 /* 576 byte sectors */
/*
* Unit flags
*/
#define M_UF_REPLC 0x8000 /* Controller initiated bad block replacement */
#define M_UF_INACT 0x4000 /* Inactive shadow set unit */
#define M_UF_WRTPH 0x2000 /* Write protect (hardware) */
#define M_UF_WRTPS 0x1000 /* Write protect (software or volume) */
#define M_UF_SCCHH 0x8000 /* Suppress caching (high speed) */
#define M_UF_SCCHL 0x4000 /* Suppress caching (low speed) */
#define M_UF_RMVBL 0x0080 /* Removable media */
#define M_UF_WBKNV 0x0040 /* Write back (non-volatile) */
#define M_UF_576 0x0004 /* 576 byte sectors */
#define M_UF_CMPWR 0x0002 /* Compare writes */
#define M_UF_CMPRD 0x0001 /* Compare reads */
/*
* Error Log message format codes
*/
#define M_FM_CTLRERR 0x00 /* Controller error */
#define M_FM_BUSADDR 0x01 /* Host memory access error */
#define M_FM_DISKTRN 0x02 /* Disk transfer error */
#define M_FM_SDI 0x03 /* SDI error */
#define M_FM_SMLDSK 0x04 /* Small disk error */
/*
* Error Log message flags
*/
#define M_LF_SUCC 0x80 /* Operation successful */
#define M_LF_CONT 0x40 /* Operation continuing */
#define M_LF_SQNRS 0x01 /* Sequence number reset */
/*
* Status codes
*/
#define M_ST_MASK 0x1f /* Status code mask */
#define M_ST_SUCCESS 0x00 /* Success */
#define M_ST_INVALCMD 0x01 /* Invalid command */
#define M_ST_ABORTED 0x02 /* Command aborted */
#define M_ST_OFFLINE 0x03 /* Unit offline */
#define M_ST_AVAILABLE 0x04 /* Unit available */
#define M_ST_MFMTERR 0x05 /* Media format error */
#define M_ST_WRPROT 0x06 /* Write protected */
#define M_ST_COMPERR 0x07 /* Compare error */
#define M_ST_DATAERR 0x08 /* Data error */
#define M_ST_HOSTBUFERR 0x09 /* Host buffer access error */
#define M_ST_CTLRERR 0x0a /* Controller error */
#define M_ST_DRIVEERR 0x0b /* Drive error */
#define M_ST_DIAG 0x1f /* Message from an internal diagnostic */
/*
* Subcodes of M_ST_OFFLINE
*/
#define M_OFFLINE_UNKNOWN (0 << 5) /* unknown or on other ctlr */
#define M_OFFLINE_UNMOUNTED (1 << 5) /* unmounted or RUN/STOP at STOP */
#define M_OFFLINE_INOPERATIVE (2 << 5) /* inoperative? */
#define M_OFFLINE_DUPLICATE (4 << 5) /* duplicate unit number */
#define M_OFFLINE_INDIAGNOSTIC (8 << 5) /* disabled by FS or diagnostic */
/*
* An MSCP packet begins with a header giving the length of
* the entire packet (including the header itself)(?), two bytes
* of device specific data, and the a whole bunch of variants
* depending on message type.
*
* N.B.: In most cases we distinguish between a `command' and
* an `end' variant as well. The command variant is that which
* is given to the controller; the `end' variant is its response.
*/
/*
* Generic sequential message variant (command and response).
*/
struct mscpv_seq {
long seq_bytecount; /* byte count */
#define seq_rbn seq_bytecount /* aka RBN (replace) */
#define seq_outref seq_bytecount /* aka outref (abort/get cmd status) */
long seq_buffer; /* buffer descriptor */
long seq_mapbase; /* page map (first PTE) phys address */
long seq_xxx1; /* ? */ /* unused */
long seq_lbn; /* logical block number */
long seq_xxx2; /* ? */ /* unused */
long *seq_addr; /* pointer to cmd descriptor */
long seq_software[4]; /* reserved to software; unused */
};
/*
* Set Controller Characteristics command variant
*/
struct mscpv_sccc {
u_short sccc_version; /* MSCP version number */
u_short sccc_ctlrflags; /* controller flags */
u_short sccc_hosttimo; /* host timeout */
u_short sccc_usefrac; /* use fraction */
long sccc_time; /* time and date */
long sccc_xxx1; /* ? */
long sccc_errlgfl; /* ? */
short sccc_xxx2; /* ? */
short sccc_copyspd; /* ? */
};
/*
* Set Controller Characteristics end variant
*/
struct mscpv_scce {
u_short scce_version; /* MSCP version number */
u_short scce_ctlrflags; /* controller flags */
u_short scce_ctlrtimo; /* controller timeout */
u_short scce_ctlrcmdl; /* ??? */
quad_t scce_ctlrid; /* controller ID */
long scce_xxx[3]; /* ? */
long scce_volser; /* volume serial number */
};
/*
* On Line command variant
*/
struct mscpv_onlc {
long onlc_xxx1[4]; /* ? */
long onlc_errlgfl; /* error log flag? */
short onlc_xxx2; /* ? */
short onlc_copyspd; /* copy speed? */
};
/*
* On Line end variant
*/
struct mscpv_onle {
long onle_xxx1[3]; /* ? */
/*???*/ short onle_xxx2; /* ? */
u_char onle_drivetype; /* drive type index (same in guse) */
char onle_xxx3; /* ? */
long onle_mediaid; /* media type id (same in guse) */
long onle_xxx4; /* ? */
long onle_unitsize; /* unit size in sectors */
long onle_volser; /* volume serial number */
};
/*
* Get Unit Status end variant (and Avail Attn?)
*/
struct mscpv_guse {
u_short guse_multunit; /* multi-unit code */
u_short guse_unitflags; /* unit flags */
long guse_hostid; /* host id */
long guse_unitid0; /*???*/
short guse_unitid1; /*???*/
u_char guse_drivetype; /* drive type index */
u_char guse_unitid2; /*???*/
long guse_mediaid; /* media type id (encoded) */
short guse_shadowunit; /* shadow unit */
short guse_shadowstat; /* shadow status */
u_short guse_nspt; /* sectors per track */
u_short guse_group; /* track group size */
u_short guse_ngpc; /* groups per cylinder */
u_short guse_xxx; /* reserved */
u_short guse_rctsize; /* RCT size (sectors) */
u_char guse_nrpt; /* RBNs per track */
u_char guse_nrct; /* number of RCTs */
};
/*
* Macros to break up and build media IDs. An ID encodes the port
* type in the top 10 bits, and the drive type in the remaining 22.
* The 10 bits, and 15 of the 22, are in groups of 5, with the value
* 0 representing space and values 1..26 representing A..Z. The low
* 7 bits represent a number in 0..127. Hence an RA81 on a UDA50
* is <D><U><R><A>< >81, or 0x25641051. This encoding scheme is known
* in part in uda.c.
*
* The casts below are just to make pcc generate better code.
*/
#define MSCP_MEDIA_PORT(id) (((long)(id) >> 22) & 0x3ff) /* port */
#define MSCP_MEDIA_DRIVE(id) ((long)(id) & 0x003fffff) /* drive */
#define MSCP_MID_ECH(n, id) (((long)(id) >> ((n) * 5 + 7)) & 0x1f)
#define MSCP_MID_CHAR(n, id) \
(MSCP_MID_ECH(n, id) ? MSCP_MID_ECH(n, id) + '@' : ' ')
#define MSCP_MID_NUM(id) ((id) & 0x7f)
/* for, e.g., RA81 */
#define MSCP_MKDRIVE2(a, b, n) \
(((a) - '@') << 17 | ((b) - '@') << 12 | (n))
/* for, e.g., RRD50 */
#define MSCP_MKDRIVE3(a, b, c, n) \
(((a) - '@') << 17 | ((b) - '@') << 12 | ((c) - '@') << 7 | (n))
/*
* Error datagram variant.
*/
struct mscpv_erd {
quad_t erd_ctlrid; /* controller ID */
u_char erd_ctlrsoftware; /* controller software version */
u_char erd_ctlrhardware; /* controller hardware version */
u_short erd_multiunit; /* multi-unit code (?) */
union {
u_long un_busaddr; /* bus address, if mem access err */
quad_t un_unitid; /* unit id, otherwise */
} erd_un1;
#define erd_busaddr erd_un1.un_busaddr
#define erd_unitid erd_un1.un_unitid
u_char erd_unitsoftware; /* unit software version */
u_char erd_unithardware; /* unit hardware version */
union {
u_char un_b[2]; /* level, retry (if disk xfer err) */
u_short un_s; /* cylinder (if small disk error) */
} erd_un2;
#define erd_level erd_un2.un_b[0]
#define erd_retry erd_un2.un_b[1]
#define erd_sdecyl erd_un2.un_s
long erd_volser; /* volume serial number */
u_long erd_hdr; /* `header' (block number) */
u_char erd_sdistat[12]; /* SDI status information (?) */
};
/*
* I am making brash assumptions about the first four bytes of all
* MSCP packets. These appear to be true for both UDA50s and TMSCP
* devices (TU81, TA81, TK50). DEC claim that these four bytes are
* not part of MSCP itself, yet at least the length is necessary
* for, e.g., error checking.
*/
struct mscp {
u_short mscp_msglen; /* length in bytes */
u_char mscp_msgtc; /* type (high 4 bits) and credits */
u_char mscp_vcid; /* virtual circuit ID */
long mscp_cmdref; /* command reference number */
u_short mscp_unit; /* unit number */
u_short mscp_seqnum; /* sequence number */
u_char mscp_opcode; /* opcode */
#define mscp_format mscp_opcode /* aka format (datagrams) */
u_char mscp_flags; /* flags */
u_short mscp_modifier; /* modifier (commands) */
#define mscp_status mscp_modifier /* aka status (ends) */
#define mscp_event mscp_modifier /* aka event (datagrams) */
union {
struct mscpv_seq un_seq; /* generic sequential msg */
struct mscpv_sccc un_sccc; /* SCC command */
struct mscpv_scce un_scce; /* SCC end */
struct mscpv_onlc un_onlc; /* on line command */
struct mscpv_onle un_onle; /* on line end */
struct mscpv_guse un_guse; /* get unit status */
struct mscpv_erd un_erd; /* error datagram */
} mscp_un;
/*???*/ long mscp_xxx; /* pad to 64 bytes */
};
/*
* Define message length according to the DEC specifications by dropping
* the four byte header.
*/
#define MSCP_MSGLEN (sizeof (struct mscp) - 4)
/*
* Shorthand
*/
/*
* Generic packet
*/
#define mscp_seq mscp_un.un_seq
/*
* Set Controller Characteristics packet
*/
#define mscp_sccc mscp_un.un_sccc
/*
* Set Controller Characteristics end packet
*/
#define mscp_scce mscp_un.un_scce
/*
* Online / Set Unit Characteristics command packet
*/
#define mscp_onlc mscp_un.un_onlc
/*
* Online end packet
*/
#define mscp_onle mscp_un.un_onle
/*
* Get Unit Status end packet
*/
#define mscp_guse mscp_un.un_guse
/*
* MSCP Error Log packet
*/
#define mscp_erd mscp_un.un_erd
/*
* MSCP seq_addr field actually belongs to overall packet.
*/
#define mscp_addr mscp_seq.seq_addr
/*
* Macros to break up mscp_msgtc, and types.
*/
#define MSCP_MSGTYPE(m) ((m) & 0xf0)
#define MSCP_CREDITS(m) ((m) & 0x0f)
#define MSCPT_SEQ 0x00 /* sequential message */
#define MSCPT_DATAGRAM 0x10 /* error datagram */
#define MSCPT_CREDITS 0x20 /* credit notification */
#define MSCPT_MAINTENANCE 0xf0 /* who knows */
/*
* Here begin more perhaps brash assumptions about MSCP devices...
*/
/*
* MSCP controllers have `command rings' and `response rings'. A
* command ring is a pool of MSCP packets that the host uses to give
* commands to the controller; a response ring is a pool of MSCP
* packets that the controller uses to give back responses. Entries
* in the command and response rings are `owned' by either the host
* or the controller; only the owner is allowed to alter any of the
* fields in the MSCP packet. Thus, free command packets are owned
* by the host, and free response packets by the controller. When
* the host gives a packet to the controller, it tells the controller
* by touching a device register; when the controller gives a response
* to the host, it generates an interrupt if enabled, and sets
* a device register as well.
*
* The pool is `described' by a set of pointers to the packets, along
* with the two flags below.
*/
#define MSCP_OWN 0x80000000 /* controller owns this packet */
#define MSCP_INT 0x40000000 /* controller should interrupt */

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/*
* Copyright (c) 1988 Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Chris Torek.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)mscpvar.h 7.3 (Berkeley) 6/28/90
* $Id: mscpvar.h,v 1.1 1994/08/02 20:22:07 ragge Exp $
*/
/*
* MSCP generic driver configuration
*/
/*
* Enabling MSCP_PARANOIA makes the response code perform various checks
* on the hardware. (Right now it verifies only the buffer pointer in
* mscp_cmdref.)
*
* Enabling AVOID_EMULEX_BUG selects an alternative method of identifying
* transfers in progress, which gets around a rather peculiar bug in the
* SC41/MS. Enabling MSCP_PARANOIA instead should work, but will cause
* `extra' Unibus resets.
*
* Either of these flags can simply be included as an `options' line in
* your configuration file.
*/
/* #define MSCP_PARANOIA */
/* #define AVOID_EMULEX_BUG */
/*
* Per driver information.
*
* md_ndpc sets the maximum unit number allowed in response packets.
* md_nunits is the number of drives attached to all controllers.
* md_unitshift is the divisor for converting a minor device number
* to a unit index for the device queues in md_utab.
*
* The routines are called from the generic response dispatcher.
* THE FOLLOWING IS OUT OF DATE
* The first three (dgram, ctlrdone, and unconf) get passed a pointer
* to the uba_ctlr and to the packet; the rest get a pointer to the
* uba_device and to the packet (`um, mp' and `ui, mp' respectively).
* The routines unconf, online, gotstatus, and ioerr are functions
* and should return one of the values given below. In addition,
* the ioerr and bb routines get a third argument, `bp': a pointer
* to the buffer describing the transfer in error.
* END OUT OF DATE
*/
struct mscp_driver {
int md_ndpc; /* number of drives per ctlr */
int md_nunits; /* total number drives (all ctlrs) */
int md_unitshift; /* device number to unit: >> count */
struct buf *md_utab; /* pointer to device queues */
struct disklabel *md_lab; /* pointer to devicee disklabels */
struct uba_device **md_dinfo; /* pointer to device info */
int (*md_dgram)(); /* error datagram */
int (*md_ctlrdone)(); /* controller operation complete */
int (*md_unconf)(); /* response from unconfigured drive */
int (*md_iodone)(); /* normal I/O is done */
int (*md_online)(); /* drive on line */
int (*md_gotstatus)(); /* got unit status */
int (*md_replace)(); /* replace done */
int (*md_ioerr)(); /* read or write failed */
int (*md_bb)(); /* B_BAD io done */
char *md_mname; /* name of controllers */
char *md_dname; /* name of drives */
};
/*
* Return values from functions.
* MSCP_RESTARTED is peculiar to I/O errors.
*/
#define MSCP_DONE 0 /* all ok */
#define MSCP_FAILED 1 /* no go */
#define MSCP_RESTARTED 2 /* transfer restarted */
/*
* Ring information, per ring (one each for commands and responses).
*/
struct mscp_ri {
int mri_size; /* ring size */
int mri_next; /* next (expected|free) */
long *mri_desc; /* base address of descriptors */
struct mscp *mri_ring; /* base address of packets */
};
/*
* Per device information.
*
* mi_ip is a pointer to the inverting pointers (things that get `ui's
* given unit numbers) FOR THIS CONTROLLER (NOT the whole set!).
*
* mi_wtab holds a queue of those transfers that were started but have
* not yet finished. Other Unibus drivers do not need this as they hand
* out requests one at a time. MSCP devices, however, take a slew of
* requests and pick their own order to execute them. This means that
* we have to have a place to move transfers that were given to the
* controller, so we can tell those apart from those that have not yet
* been handed out; mi_wtab is that place.
*/
struct mscp_info {
struct mscp_driver *mi_md; /* pointer to driver info */
int mi_ctlr; /* controller index */
struct buf *mi_tab; /* pointer to ctlr's drive queue */
struct uba_device **mi_ip; /* pointer to inverting pointers */
struct mscp_ri mi_cmd; /* MSCP command ring info */
struct mscp_ri mi_rsp; /* MSCP response ring info */
short mi_credits; /* transfer credits */
char mi_wantcmd; /* waiting for command packet */
char mi_wantcredits; /* waiting for transfer credits */
struct buf mi_wtab; /* transfer wait queue */
#ifdef AVOID_EMULEX_BUG
#define AEB_MAX_BP 32 /* max pend xfers (power of 2) XXX */
struct buf *mi_bp[AEB_MAX_BP]; /* xfer no. to buffer */
u_int mi_nextbp; /* generates unique xfer no's */
int mi_ok; /* for error rate statistics */
#endif AVOID_EMULEX_BUG
};
/*
* We have run out of credits when mi_credits is <= MSCP_MINCREDITS.
* It is still possible to issue one command in this case, but it must
* not be a data transfer. E.g., `get command status' or `abort command'
* is legal, while `read' is not.
*/
#define MSCP_MINCREDITS 1
/*
* Flags for mscp_getcp().
*/
#define MSCP_WAIT 1
#define MSCP_DONTWAIT 0
struct mscp *mscp_getcp(); /* get a command packet */
/*
* Unit flags
*/
#define UNIT_ONLINE 0x01 /* drive is on line */
#define UNIT_HAVESTATUS 0x02 /* got unit status */
#define UNIT_REQUEUE 0x04 /* requeue after response */
/*
* Handle a command ring transition: wake up sleepers for command packets.
* This is too simple to bother with a function call.
*/
#define MSCP_DOCMD(mi) { \
if ((mi)->mi_wantcmd) { \
(mi)->mi_wantcmd = 0; \
wakeup((caddr_t) &(mi)->mi_wantcmd); \
} \
}
/*
* The following macro appends a buffer to a drive queue or a drive to
* a controller queue, given the name of the forward link. Use as
* `APPEND(dp, &um->um_tab, b_forw)' or `APPEND(bp, dp, av_forw)',
* where `bp' is a transfer request, `dp' is a drive queue, and `um_tab'
* is a controller queue. (That is, the forward link for controller
* queues is `b_forw'; for drive queues, it is `av_forw'.)
*
* Changed to new buf structure 940605/Ragge
*/
#define APPEND(bp, queue, link) { \
struct buf *tmp; \
\
(bp)->link = NULL; \
if ((queue)->b_actf == NULL) \
(queue)->b_actf = (bp); \
else { \
tmp=(queue)->b_actf; \
while(tmp->b_actf) tmp=tmp->b_actf; \
tmp->b_actf = (bp); \
} \
}
/* Old APPEND macro */
/*
#define APPEND(bp, queue, link) { \
(bp)->link = NULL; \
if ((queue)->b_actf == NULL) \
(queue)->b_actf = (bp); \
else \
(queue)->b_actl->link = (bp); \
(queue)->b_actl = (bp); \
}
*/

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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: pmap.c,v 1.1 1994/08/02 20:22:09 ragge Exp $
* With ideas from HP300 port/IC
*/
/* All bugs are subject to removal without further notice */
#include "vax/include/loconf.h"
#include "sys/types.h"
#include "sys/queue.h"
#include "vax/include/macros.h"
#include "vax/include/types.h"
#include "vm/vm.h"
#include "vm/vm_page.h"
#include "sys/malloc.h"
#include "vax/include/pte.h"
#include "vax/include/param.h"
#include "vax/include/mtpr.h"
#include "uba.h"
#define NULL ((void*)(0))
#define vax_pages_per_page PAGE_SIZE/NBPG
#define pa_tp_pvh(pa) &pv_table[(pa&0x7fffffff)>>PAGE_SHIFT];
#define PMAP_ENTRY(pmap, virt_addr) ((struct pte*) &pmap->pm_ptab[vax_btop(virt_addr & ~0xc0000000)])
/* Calculates the physical address a page table entry points to */
#define PMAP_TO_PA(pte_ptr) ((*pte_ptr&PG_FRAME)<<PG_SHIFT)
struct pmap kernel_pmap_store;
pmap_t kernel_pmap = &kernel_pmap_store;
static pv_entry_t alloc_pv_entry();
static void free_pv_entry();
static int prot_array[]={ PG_NONE, PG_RO, PG_RW, PG_RW,
PG_RO, PG_RO, PG_RW, PG_RW };
/*pmap_map(vm_offset_t, vm_offset_t, vm_offset_t, int);*/
static int total_size;
static vm_offset_t pv_phys;
static pv_entry_t pv_head =NULL;
static unsigned int pv_count=0;
extern void* vavail;
extern vm_offset_t phys_avail;
typedef unsigned long int uint;
extern uint etext;
extern uint edata;
extern uint end;
extern uint Sysseg;
extern struct pte* Sysmap;
extern uint ptab_len;
extern uint *ptab_addr;
extern uint pte_cmap;
uint* UMEMmap;
uint* usrpt;
void* Numem;
void* vavail;
int startpmapdebug=0;
struct pte *Sysmap;
vm_size_t mem_size;
vm_offset_t* phys_mem_table; /* Table of available physical mem */
vm_offset_t avail_start, avail_end;
vm_offset_t virtual_avail, virtual_end; /* Available virtual memory */
unsigned long phys_mem_blocks;
/******************************************************************************
*
* pmap_bootstrap()
*
******************************************************************************
*
* Called as part of vm bootstrap, allocates internal pmap structures.
*
*/
void pmap_bootstrap(vm_offset_t* memtab) {
/* Bootstrap pmap module */
vm_offset_t phys_start=memtab[0], phys_end=memtab[1];
unsigned int pv_table_size;
unsigned int p_prot_table_size;
/*#include "param.h"
#include "proc.h"
#include "malloc.h"
#include "user.h"
#include "vm/vm.h"
#include "vm/vm_kern.h"
#include "vm/vm_page.h"
#include "uba.h"
#include "vax/include/cpu.h"
#include "vax/include/pte.h"
#include "vax/include/macros.h"
*/
#define MISC_PAGES (5+UPAGES)
/* 2 pages for stack protection + 2 pages for page clearing/copying */
#define MAP_PAGES(pages, prot) \
for(i=0; i<pages; i++) { \
*pte_ptr++=prot|pte_entry++; \
}
#define MAP_EMPTY_PAGES(pages, prot) \
for(i=0; i<pages; i++) { \
*pte_ptr++=prot; \
}
uint i;
/*
etext = Code start address.
edata = Data start address.
end = Data end address.
*/
uint textpages = (uint)vax_btop(NBPG-1+(uint)&etext-VM_MIN_KERNEL_ADDRESS);
uint datapages = (uint)vax_btop(NBPG-1+(uint)&end-(uint)&etext);
uint istackpages = (uint)ISTACK_SIZE/NBPG;
uint ptabpages = (uint)VM_KERNEL_PT_PAGES;
uint mptabpages = (uint)ptabpages;
uint unipages = (uint)NUBA*512;
uint uptabpages = (uint)VM_KERNEL_PT_PAGES*128-textpages-datapages-
istackpages-MISC_PAGES-mptabpages-unipages;
uint pte_entry=0;
uint* pte_ptr;
ptab_addr=
pte_ptr = (uint*)(vax_round_page((uint)&end+ISTACK_SIZE+MISC_PAGES*NBPG)
&~0x80000000);
Sysmap=(struct pte*)\
(VM_KERNEL_PT_PAGES*0x80*0x200+0x80000000)-(VM_KERNEL_PT_PAGES*4*0x20);
/* Top of vmem - size of kernel ptab. */
/*
printf("Text loaded: 0x%s%x\n",
PRINT_HEXF((uint)&etext&~(0x80000000)),
(uint)&etext&~(0x80000000));
printf("Data loaded: 0x%s%x\n",
PRINT_HEXF(((uint)&end-(uint)&etext+NBPG-1)&~(NBPG-1)),
((uint)&end-(uint)&etext+NBPG-1)&~(NBPG-1));
printf("Text pages: 0x%s%x\t", PRINT_HEXF(textpages*0x10000), textpages);
printf("Data pages: 0x%s%x\n", PRINT_HEXF(datapages*0x10000), datapages);
printf("Misc pages: 0x%s%x\t",
PRINT_HEXF((MISC_PAGES+istackpages)*0x10000), MISC_PAGES+istackpages);
printf("Ptab pages: 0x%s%x\n", PRINT_HEXF(ptabpages*0x10000), ptabpages);
*/
MAP_PAGES(2, PG_V|PG_RW); /* Map exception vectors as R/W */
MAP_PAGES(textpages-2, PG_V|PG_RO); /* Map text pages READ ONLY */
MAP_PAGES(datapages, PG_V|PG_RW); /* Map data pages READWRITE */
MAP_PAGES(1, PG_V|PG_NONE); /* Map protection for kstack */
MAP_PAGES(istackpages, PG_V|PG_RW); /* Map istack pages READWRITE */
MAP_PAGES(1, PG_V|PG_NONE); /* Map protection for istack */
MAP_PAGES(UPAGES, PG_V|PG_RW); /* Map process 0 pages */
MAP_PAGES(1, PG_V|PG_NONE); /* Map protection for istack */
pte_cmap=(uint)pte_ptr-(uint)ptab_addr+(uint)Sysmap;
/* Save pte for CMAP1 page */
MAP_PAGES(2, PG_V|PG_RW); /* Map page where we can map */
/* phys mem page to clear it */
UMEMmap=(void*)pte_ptr-(void*)ptab_addr+(void*)Sysmap;
Numem=(void*)(((((uint)pte_ptr-(uint)ptab_addr)>>2)<<9)|0x80000000);
printf("Numem=%x\n", Numem);
MAP_EMPTY_PAGES(unipages, PG_NONE);
vavail=(void*)(((((uint)pte_ptr-(uint)ptab_addr)>>2)<<9)|0x80000000);
printf("vavail=%x\n", vavail);
MAP_EMPTY_PAGES(uptabpages, PG_RW); /* Map available kernel mem */
printf("Entry: %lx\n", pte_entry);
MAP_PAGES(mptabpages, PG_V|PG_RW); /* Map kernel page table */
printf("Virtual memory mapped.\n");
ptab_len=((uint)((uint)pte_ptr-(uint)ptab_addr))/sizeof(struct pte);
printf("ptab addr: 0x%s%x-0x%s%x=0x%s%x\n",
PRINT_HEXF((uint)ptab_addr), ptab_addr,
PRINT_HEXF((uint)pte_ptr), pte_ptr,
PRINT_HEXF(ptab_len), ptab_len);
mem_size=phys_end-phys_start;
/* Init kernel pmap */
kernel_pmap->pm_ptab = Sysmap;
kernel_pmap->next = NULL;
kernel_pmap->ref_count = 1;
simple_lock_init(&kernel_pmap->pm_lock);
phys_mem_blocks=(phys_end-phys_start)>>12; /* XXX 4096 byte pages */
avail_start=round_page(phys_avail);
avail_end =trunc_page(phys_end);
virtual_avail= round_page(vavail);
virtual_end= trunc_page((vm_offset_t)Sysmap);
printf("%6dkb physical memory (0x%s%x-0x%s%x)\n"
"%6dkb free (0x%s%x-0x%s%x).\n",
(phys_end-phys_start)>>10,
PRINT_HEXF(phys_start), phys_start,
PRINT_HEXF(phys_end-1), phys_end-1,
(avail_end-avail_start)>>10,
PRINT_HEXF(avail_start), avail_start,
PRINT_HEXF(avail_end-1), avail_end-1
);
printf("%6dkb virtual kernel memory (0x%s%x-0x%s%x)\n"
"%6dkb free (0x%s%x-0x%s%x).\n",
(VM_MAX_KERNEL_ADDRESS-VM_MIN_KERNEL_ADDRESS)>>10,
PRINT_HEXF(VM_MIN_KERNEL_ADDRESS), VM_MIN_KERNEL_ADDRESS,
PRINT_HEXF(VM_MAX_KERNEL_ADDRESS-1), VM_MAX_KERNEL_ADDRESS-1,
(virtual_end-virtual_avail)>>10,
PRINT_HEXF(virtual_avail), virtual_avail,
PRINT_HEXF(virtual_end-1), virtual_end-1
);
/* Physical to virtual mapping table */
pv_table_size= phys_mem_blocks*sizeof(struct pv_entry);
total_size=round_page(pv_table_size);
pv_table = ((void*)virtual_avail);
pv_phys = ((void*)avail_start);
/* printf("P: pv_table %x\n",pv_table); */
avail_start += total_size;
virtual_avail += total_size;
printf("pmap structures allocated (size: 0x%x)\n", total_size);
printf("phys_mem_blocks: 0x%x\n", phys_mem_blocks);
printf("mem_size=0x%x\n", mem_size);
}
/****************************************************************************** *
* pmap_init()
*
******************************************************************************
*
* Called as part of vm init, but is here a no-operation.
*
*/
void pmap_init(vm_offset_t s, vm_offset_t e) {
/* printf("pmap_init: pv_table: %x, pv_phys: %x, total_size: %x\n",
pv_table, pv_phys, total_size); */
pmap_map(pv_table, pv_phys, pv_phys+total_size,
VM_PROT_READ|VM_PROT_WRITE);
bzero(pv_table, total_size);
}
/******************************************************************************
*
* pmap_create()
*
******************************************************************************
*
* pmap_t pmap_create(phys_size)
*
* Create a pmap for a new task.
*
* Allocate a pmap form kernel memory with malloc.
* Clear the pmap.
* Allocate a ptab for the pmap.
*
*/
pmap_t pmap_create(vm_size_t phys_size) {
pmap_t pmap;
printf("pmap_create: phys_size %x\n",phys_size);
if(phys_size) {
return NULL;
}
/* XXX: is it ok to wait here? */
pmap = (pmap_t) malloc(sizeof *pmap, M_VMPMAP, M_WAITOK);
bzero(pmap, sizeof(*pmap)); /* Zero pmap */
pmap->pm_ptab = (pt_entry_t*)malloc(VAX_MAX_PT_SIZE, M_VMPMAP, M_WAITOK);
pmap->ref_count = 1; /* Initialize it */
simple_lock_init(&pmap->lock);
return (pmap);
}
void pmap_pinit(pmap_t pmap) {
bzero(pmap, sizeof(*pmap)); /* Zero pmap */
pmap->ref_count = 1; /* Initialize it */
simple_lock_init(&pmap->lock);
}
/*
* Release any resources held by the given physical map.
* Called when a pmap initialized by pmap_pinit is being released.
* Should only be called if the map contains no valid mappings.
*/
void
pmap_release(pmap)
register struct pmap *pmap;
{
if(startpmapdebug) printf("pmap_release: pmap %x\n",pmap);
if (pmap->pm_ptab) {
free((caddr_t)pmap->pm_ptab, M_VMPMAP);
pmap->pm_ptab=NULL;
}
}
/******************************************************************************
*
* pmap_destroy()
*
******************************************************************************
*
* pmap_destroy(pmap)
*
* Remove a reference from the pmap.
*
* If the pmap is NULL then just return else decrese pm_count.
*
* XXX pmap == NULL => "software only" pmap???
*
* If this was the last reference we call's pmap_relaese to release this pmap.
*
* OBS! remember to set pm_lock
*/
void
pmap_destroy(pmap)
pmap_t pmap;
{
int count;
if(startpmapdebug) printf("pmap_destroy: pmap %x\n",pmap);
if (pmap == NULL)
return;
simple_lock(&pmap->pm_lock);
count = --pmap->ref_count;
simple_unlock(&pmap->pm_lock);
if (!count) {
free((caddr_t)pmap->pm_ptab, M_VMPMAP);
pmap_release(pmap);
free((caddr_t)pmap, M_VMPMAP);
}
}
void pmap_reference(pmap_t pmap) {
if (pmap)
pmap->ref_count++;
}
void pmap_enter(map, v, p, prot, wired)
register pmap_t map;
vm_offset_t v;
vm_offset_t p;
vm_prot_t prot;
boolean_t wired;
{
int j,i,pte,s, *patch;
pv_entry_t pv, tmp;
/* printf("F|rst:\n");*/
i = (v&0x7fffffff)>>PG_SHIFT;
pte=prot_array[prot]|PG_PFNUM(p)|PG_V;
/* printf("F|re splimp %x\n",mfpr(PR_IPL));*/
s=splimp();
/* printf("F|re pvtable\n");*/
/* pv=&pv_table[(patch[(p&0x7fffffff)>>PG_SHIFT]&PG_FRAME)];*/
pv=&pv_table[(p&0x7fffffff)>>PAGE_SHIFT];
/* printf("Efter splimp %x: map %x\n",mfpr(PR_IPL),map);*/
if(startpmapdebug) printf("pmap_enter: virt %x, phys %x\n",v,p);
if(!map)
return;
/* printf("pmap_enter2: pv %x, map %x\n",pv,map);*/
if(!pv->pv_pmap) {
/* printf("pv->pv_pmap\n");*/
pv->pv_pmap=map;
pv->pv_next=NULL;
pv->pv_va=v;
} else {
/* printf("till alloc_pv_entry()\n");*/
tmp=alloc_pv_entry();
tmp->pv_pmap=map;
tmp->pv_next=pv->pv_next;
tmp->pv_va=v;
pv->pv_next=tmp;
}
/* printf("F|re wired.\n");*/
if(wired)
pte|=PG_W;
/* printf("Fore for\n");*/
for(j=0; j<vax_pages_per_page; j++) {
patch=(int*)map->pm_ptab;
patch[i++]=pte++;
/* printf("pmap_enter, dags f|r TBIS\n");*/
TBIS(p);
p+=NBPG;
}
/* printf("Dags f|r splx\n");*/
splx(s);
}
vm_offset_t pmap_map(virtuell, pstart, pend, prot)
vm_offset_t virtuell, pstart, pend;
{
vm_offset_t count;
int *pentry;
/* printf("pmap_map: virtuell %x, pstart %x, pend %x\n",
virtuell, pstart, pend); */
(uint)pentry=
(((uint)(virtuell&0x7fffffff)>>9)*4)+(uint)Sysmap; /* XXX DEFINE! */
for(count=pstart;count<pend;count+=512){ /* XXX DEFINE! */
*pentry++ = (count>>9)|prot_array[prot]|PG_V; /* XXX DEFINE! */
}
/* printf("Done!\n");*/
return(virtuell+(count-pstart));
}
/*
vm_offset_t
pmap_map(vvirt, sstart, end, prot)
vm_offset_t vvirt;
vm_offset_t sstart;
vm_offset_t end;
int prot;
{
vm_offset_t virt,start;
virt=vvirt;
start=sstart;
printf("I pmap-map\n");
while (start < end) {
printf("Dags att hoppa till pmap_enter\n");
pmap_enter(kernel_pmap, virt, start, prot, FALSE);
printf("]ter fr}n pmap_enter\n");
virt += PAGE_SIZE;
start += PAGE_SIZE;
}
return(virt);
}
*/
vm_offset_t pmap_extract(pmap_t pmap, vm_offset_t va) {
if(startpmapdebug) printf("pmap_extract: pmap %x, va %x\n",pmap, va);
return ((*((int*)&(pmap->pm_ptab[(va&0x7fffffff)>>PG_SHIFT]))&PG_FRAME)
<<PG_SHIFT)|va&((1<<PG_SHIFT)-1);
}
void
pmap_protect(virt, start, end, prot)
vm_offset_t virt;
vm_offset_t start;
vm_offset_t end;
int prot;
{
while (start < end) {
pmap_page_protect(kernel_pmap, virt, start, prot, FALSE);
virt += PAGE_SIZE;
start += PAGE_SIZE;
}
}
void pmap_remove(pmap, start, end)
pmap_t pmap;
vm_offset_t start, end;
{
int i=(start&0x7fffffff)>>PG_SHIFT;
int j;
int s=splimp();
pv_entry_t pv;
pv_entry_t pv2;
int* patch;
unsigned int* pte_ptr;
vm_offset_t phys_addr;
if(startpmapdebug) printf("pmap_remove(pmap=0x%x, start=0x%x, end=0x%x)\n",
pmap, start, end);
if(!pmap)
return;
patch=(int*)pmap->pm_ptab;
for( ; start<end; ) {
pte_ptr=(unsigned int*)PMAP_ENTRY(pmap, start);
if(!(phys_addr=PMAP_TO_PA(pte_ptr))) {
goto PLOK;
}
/* pv=&pv_table[(patch[(phys_addr&0x7fffffff)>>PAGE_SHIFT]&PG_FRAME)<<PG_SHIFT];*/
pv=&pv_table[(patch[(phys_addr&0x7fffffff)>>PG_SHIFT]&PG_FRAME)];
/* printf("Loop; start=0x%x, pv=0x%x\n", start, pv); */
if(pv->pv_pmap==pmap) {
/* printf("1\n");*/
if(pv->pv_next) {
pv->pv_pmap=pv->pv_next->pv_pmap;
pv->pv_va=pv->pv_next->pv_va;
pv->pv_next=pv->pv_next->pv_next;
} else {
pv->pv_pmap=NULL;
}
} else {
/* printf("2\n");*/
for(; pv->pv_next; pv=pv->pv_next) {
if(pv->pv_next->pv_pmap==pmap) {
pv2=pv->pv_next;
pv->pv_pmap=pv2->pv_pmap;
pv->pv_va=pv2->pv_va;
pv->pv_next=pv2->pv_next;
free_pv_entry(pv2);
break;
}
}
}
PLOK:
for( j=0; j<vax_pages_per_page; j++ ) {
patch[i++]=0;
TBIS(start);
start+=NBPG;
}
}
splx(s);
}
void pmap_copy_page(src, dst)
vm_offset_t src;
vm_offset_t dst;
{
register int i;
src >>= PG_SHIFT;
dst >>= PG_SHIFT;
i = 0;
do {
physcopyseg(src++, dst++);
} while (++i != vax_pages_per_page);
}
static pv_entry_t
alloc_pv_entry()
{
pv_entry_t temporary;
if(!pv_head) {
return(malloc(sizeof(struct pv_entry), M_VMPVENT, M_NOWAIT));
} else {
temporary=pv_head;
pv_head=temporary->pv_next;
pv_count--;
return temporary;
}
}
static void
free_pv_entry(entry)
pv_entry_t entry;
{
if(pv_count>=50) { /* XXX Should be a define? */
free(entry, M_VMPVENT);
} else {
entry->pv_next=pv_head;
pv_head=entry;
pv_count++;
}
}
pmap_changebit(pa, bit, setem)
register vm_offset_t pa;
int bit;
boolean_t setem;
{
pv_entry_t pv=&pv_table[(pa&0x7fffffff)>>PAGE_SHIFT];
int* a;
int i;
if(!pv->pv_pmap)
return;
do {
a=(int*)&(pv->pv_pmap->pm_ptab[pv->pv_va>>PG_SHIFT]);
for(i=0; i<vax_pages_per_page; i++) {
if(setem)
a[i]|=bit;
else
a[i]&=~bit;
TBIS(pv->pv_va+NBPG*i);
}
} while (pv=pv->pv_next);
}
pmap_testbit(pa, bit)
register vm_offset_t pa;
int bit;
{
pv_entry_t pv=&pv_table[(pa&0x7fffffff)>>PAGE_SHIFT];
int* a;
int i;
if(!pv->pv_pmap)
return 0;
do {
a=(int*)&(pv->pv_pmap->pm_ptab[pv->pv_va>>PG_SHIFT]);
for(i=0; i<vax_pages_per_page; i++) {
if(a[i]&bit)
return 1;
}
} while (pv=pv->pv_next);
return 0;
}
boolean_t
pmap_is_referenced(pa)
vm_offset_t pa;
{
return(pmap_testbit(pa, PG_REF));
}
boolean_t
pmap_is_modified(pa)
vm_offset_t pa;
{
return(pmap_testbit(pa, PG_M));
}
void pmap_clear_reference(pa)
vm_offset_t pa;
{
int s;
/*
* Simulate page reference bit
*/
s=splhigh();
pmap_changebit(pa, PG_REF, FALSE);
pmap_changebit(pa, PG_SREF, TRUE);
pmap_changebit(pa, PG_V, FALSE);
splx(s);
}
void pmap_clear_modify(pa)
vm_offset_t pa;
{
pmap_changebit(pa, PG_M, FALSE);
}
void pmap_change_wiring(pmap, va, wired)
register pmap_t pmap;
vm_offset_t va;
boolean_t wired;
{
if(wired)
*((int*)&(pmap->pm_ptab[(va&0x7fffffff)>>PG_SHIFT]))|=PG_W;
else
*((int*)&(pmap->pm_ptab[(va&0x7fffffff)>>PG_SHIFT]))&=~PG_W;
}
/*
* This routine is only advisory and need not do anything.
*/
void pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr)
pmap_t dst_pmap;
pmap_t src_pmap;
vm_offset_t dst_addr;
vm_size_t len;
vm_offset_t src_addr;
{
if(startpmapdebug) printf("pmap_copy: \n");
}
/*
* pmap_page_protect:
*
* Lower the permission for all mappings to a given page.
*/
void
pmap_page_protect(pa, prot)
vm_offset_t pa;
vm_prot_t prot;
{
register pv_entry_t pv;
int s;
switch (prot) {
case VM_PROT_ALL:
break;
case VM_PROT_READ:
case VM_PROT_READ|VM_PROT_EXECUTE:
pmap_changebit(pa, PG_RO, TRUE);
break;
default:
pv = pa_to_pvh(pa);
s = splimp();
while (pv->pv_pmap != NULL) {
pmap_remove(pv->pv_pmap, pv->pv_va,
pv->pv_va + PAGE_SIZE);
pv=pv->pv_next;
if(!pv) break;
}
splx(s);
break;
}
}
void pmap_update() {
TBIA();
}
/*
* pmap_zero_page zeros the specified (machine independent)
* page by mapping the page into virtual memory and using
* bzero to clear its contents, one machine dependent page
* at a time.
*/
pmap_zero_page(phys)
register vm_offset_t phys;
{
register int ix;
if(startpmapdebug) printf("pmap_zero_page(phys %x, vax_pages_per_page %x\n",phys,vax_pages_per_page);
phys >>= PG_SHIFT;
ix = 0;
do {
clearseg(phys++);
} while (++ix != vax_pages_per_page);
}
/*
* Routine: pmap_pageable
* Function:
* Make the specified pages (by pmap, offset)
* pageable (or not) as requested.
*
* A page which is not pageable may not take
* a fault; therefore, its page table entry
* must remain valid for the duration.
*
* This routine is merely advisory; pmap_enter
* will specify that these pages are to be wired
* down (or not) as appropriate.
*/
pmap_pageable(pmap, sva, eva, pageable)
pmap_t pmap;
vm_offset_t sva, eva;
boolean_t pageable;
{
if(startpmapdebug) printf("pmap_pageable\n");
}

83
sys/arch/vax/vax/random.s Normal file
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@ -0,0 +1,83 @@
/*
* Copyright (c) 1990,1993 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that: (1) source code distributions
* retain the above copyright notice and this paragraph in its entirety, (2)
* distributions including binary code include the above copyright notice and
* this paragraph in its entirety in the documentation or other materials
* provided with the distribution, and (3) all advertising materials mentioning
* features or use of this software display the following acknowledgement:
* ``This product includes software developed by the University of California,
* Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
* the University nor the names of its contributors may be used to endorse
* or promote products derived from this software without specific prior
* written permission.
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
* Here is a very good random number generator. This implementation is
* based on ``Two Fast Implementations of the "Minimal Standard" Random
* Number Generator'', David G. Carta, Communications of the ACM, Jan 1990,
* Vol 33 No 1. Do NOT modify this code unless you have a very thorough
* understanding of the algorithm. It's trickier than you think. If
* you do change it, make sure that its 10,000'th invocation returns
* 1043618065.
*
* This implementation Copyright (c) 1994 Ludd, University of Lule}, Sweden
* All rights reserved.
*
* All bugs subject to removal without further notice.
*
* Here is easier-to-decipher pseudocode:
*
* p = (16807*seed)<30:0> # e.g., the low 31 bits of the product
* q = (16807*seed)<62:31> # e.g., the high 31 bits starting at bit 32
* if (p + q < 2^31)
* seed = p + q
* else
* seed = ((p + q) & (2^31 - 1)) + 1
* return (seed);
*
* The result is in (0,2^31), e.g., it's always positive.
*
* $Id: random.s,v 1.1 1994/08/02 20:22:11 ragge Exp $
*/
.data
randseed:
.long 1
.text
.globl _random
_random:
.word 0x0
movl $16807,r0
movl randseed,r1 # r2=16807*loword(randseed)
bicl3 $0xffff0000,r1,r2
mull2 r0,r2
ashl $-16,r1,r1 # r1=16807*hiword(randseed)
bicl2 $0xffff0000,r1
mull2 r0,r1
bicl3 $0xffff0000,r2,r0
ashl $-16,r2,r2 # r1+=(r2>>16)
bicl2 $0xffff0000,r2
addl2 r2,r1
ashl $16,r1,r2 # r0|=r1<<16
bisl2 r2,r0
ashl $-16,r1,r1 # r1=r1>>16
ashl $1,r1,r1
movl r0,r2
rotl $1,r0,r0
bicl2 $0xfffffffe,r0
bisl2 r0,r1
movl r2,r0
bicl2 $0x80000000,r0
addl2 r1,r0
bgeq L1
subl2 $0x7fffffff,r0
L1: movl r0,randseed
ret

225
sys/arch/vax/vax/rootfil.c Normal file
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/*
* Copyright (c) 1988 University of Utah.
* Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* the Systems Programming Group of the University of Utah Computer
* Science Department.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: Utah Hdr: machdep.c 1.63 91/04/24
* from: @(#)machdep.c 7.16 (Berkeley) 6/3/91
* $Id: rootfil.c,v 1.1 1994/08/02 20:22:12 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#include "param.h"
#include "vax/include/sid.h"
#include "buf.h"
#include "mbuf.h"
#include "vax/include/pte.h"
#include "uba.h"
#include "reboot.h"
#include "conf.h"
#include "vax/include/macros.h"
#include "vax/include/nexus.h"
#include "vax/uba/ubavar.h"
#define DOSWAP /* Change swdevt, argdev, and dumpdev too */
u_long bootdev; /* should be dev_t, but not until 32 bits */
extern dev_t rootdev, dumpdev;
static char devname[][2] = {
'h','p', /* 0 = hp */
0,0, /* 1 = ht */
'u','p', /* 2 = up */
'r','k', /* 3 = hk */
0,0, /* 4 = sw */
0,0, /* 5 = tm */
0,0, /* 6 = ts */
0,0, /* 7 = mt */
0,0, /* 8 = tu */
'r','a', /* 9 = ra */
0,0, /* 10 = ut */
'r','b', /* 11 = rb */
0,0, /* 12 = uu */
0,0, /* 13 = rx */
'r','l', /* 14 = rl */
0,0, /* 15 = tmscp */
'k','r', /* 16 = ra on kdb50 */
};
#define PARTITIONMASK 0x7
#define PARTITIONSHIFT 3
/*
* Attempt to find the device from which we were booted.
* If we can do so, and not instructed not to do so,
* change rootdev to correspond to the load device.
*/
setroot()
{
int majdev, mindev, unit, part, controller, adaptor;
dev_t temp, orootdev;
#if NUBA > 0
extern struct uba_device ubdinit[];
#endif
struct swdevt *swp;
extern int boothowto;
if (boothowto & RB_DFLTROOT ||
(bootdev & B_MAGICMASK) != (u_long)B_DEVMAGIC)
return;
majdev = B_TYPE(bootdev);
if (majdev >= sizeof(devname) / sizeof(devname[0]))
return;
adaptor = B_ADAPTOR(bootdev);
controller = B_CONTROLLER(bootdev);
part = B_PARTITION(bootdev);
unit = B_UNIT(bootdev);
if (majdev == 0) { /* MBA device */
#if NMBA > 0
register struct mba_device *mbap;
int mask;
/*
* The MBA number used at boot time is not necessarily the same as the
* MBA number used by the kernel. In order to change the rootdev we need to
* convert the boot MBA number to the kernel MBA number. The address space
* for an MBA used by the boot code is 0x20010000 + 0x2000 * MBA_number
* on the 78? and 86?0, 0xf28000 + 0x2000 * MBA_number on the 750.
* Therefore we can search the mba_hd table for the MBA that has the physical
* address corresponding to the boot MBA number.
*/
#define PHYSADRSHFT 13
#define PHYSMBAMASK780 0x7
#define PHYSMBAMASK750 0x3
switch (MACHID(cpu_type)) {
case VAX_780:
/* case VAX_8600: */
default:
mask = PHYSMBAMASK780;
break;
case VAX_750:
mask = PHYSMBAMASK750;
break;
}
for (mbap = mbdinit; mbap->driver; mbap++)
if (mbap->alive && mbap->drive == unit &&
(((long)mbap->hd->mh_physmba >> PHYSADRSHFT)
& mask) == adaptor)
break;
if (mbap->driver == 0)
return;
mindev = mbap->unit;
#else
return;
#endif
#if NUBA > 0
} else {
register struct uba_device *ubap;
for (ubap = ubdinit; ubap->ui_driver; ubap++)
if (ubap->ui_alive && ubap->ui_slave == unit &&
ubap->ui_ctlr == controller &&
ubap->ui_ubanum == adaptor &&
ubap->ui_driver->ud_dname[0] == devname[majdev][0] &&
ubap->ui_driver->ud_dname[1] == devname[majdev][1])
break;
if (ubap->ui_driver == 0)
return;
mindev = ubap->ui_unit;
#endif
}
mindev = (mindev << PARTITIONSHIFT) + part;
orootdev = rootdev;
rootdev = makedev(majdev, mindev);
/*
* If the original rootdev is the same as the one
* just calculated, don't need to adjust the swap configuration.
*/
if (rootdev == orootdev)
return;
printf("Changing root device to %c%c%d%c\n",
devname[majdev][0], devname[majdev][1],
mindev >> PARTITIONSHIFT, part + 'a');
#ifdef DOSWAP
mindev &= ~PARTITIONMASK;
for (swp = swdevt; swp->sw_dev; swp++) {
if (majdev == major(swp->sw_dev) &&
mindev == (minor(swp->sw_dev) & ~PARTITIONMASK)) {
temp = swdevt[0].sw_dev;
swdevt[0].sw_dev = swp->sw_dev;
swp->sw_dev = temp;
break;
}
}
if (swp->sw_dev == 0)
return;
/*
* If argdev and dumpdev were the same as the old primary swap
* device, move them to the new primary swap device.
*/
if (temp == dumpdev)
dumpdev = swdevt[0].sw_dev;
printf("autoconf.c: argdev\n");
asm("halt");
/* if (temp == argdev)
argdev = swdevt[0].sw_dev; */
#endif
}
/*
* Configure swap space and related parameters.
*/
swapconf()
{
register struct swdevt *swp;
register int nblks;
for (swp = swdevt; swp->sw_dev; swp++)
if (bdevsw[major(swp->sw_dev)].d_psize) {
nblks =
(*bdevsw[major(swp->sw_dev)].d_psize)(swp->sw_dev);
if (nblks != -1 &&
(swp->sw_nblks == 0 || swp->sw_nblks > nblks))
swp->sw_nblks = nblks;
}
dumpconf();
}

40
sys/arch/vax/vax/skit.c Normal file
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@ -0,0 +1,40 @@
/*
* This file shouldn't exist; it contains all undefines that currently is.
* (even undefined pointers, bleh!) It is actually created from an awk
* script taking input from ld :)
* Things are taken away as soon they are implemented.
*/
boot (){conout(" boot \n");asm("halt");}
cnopen(){conout(" cnopen \n");asm("halt");}
cnclose(){conout(" cnclose \n");asm("halt");}
cnread(){conout(" cnread \n");asm("halt");}
cnwrite(){conout(" cnwrite \n");asm("halt");}
cnioctl(){conout(" cnioctl \n");asm("halt");}
cpu_exit(){conout(" cpu_exit \n");asm("halt");}
fubyte (){conout(" fubyte \n");asm("halt");}
fuibyte (){conout(" fuibyte \n");asm("halt");}
fuswintr(){conout("fuswintr\n");asm("halt");}
microtime (){conout(" microtime \n");asm("halt");}
mmrw(){conout(" mmrw\n");asm("halt");}
need_proftick(){conout("need_proftick\n");asm("halt");}
pmap_phys_address(){conout(" pmap_phys_address\n");asm("halt");}
process_set_pc (){conout(" process_set_pc \n");asm("halt");}
process_sstep (){conout(" process_sstep \n");asm("halt");}
remrq (){conout(" remrq \n");asm("halt");}
resuba (){conout(" resuba \n");asm("halt");} /* When to use this??? */
sendsig (){conout(" sendsig \n");asm("halt");}
setregs (){conout(" setregs \n");asm("halt");}
sigreturn (){conout(" sigreturn \n");asm("halt");}
subyte (){conout(" subyte \n");asm("halt");}
suibyte (){conout(" suibyte \n");asm("halt");}
suswintr(){conout("suswintr\n");asm("halt");}
syopen(){conout(" syopen \n");asm("halt");}
syread(){conout(" syread \n");asm("halt");}
sywrite(){conout(" sywrite \n");asm("halt");}
syioctl(){conout(" syioctl \n");asm("halt");}
syselect(){conout(" syselect \n");asm("halt");}
tuopen(){conout("tuopen\n");asm("halt");}
tuclose(){conout("tuclose\n");asm("halt");}
tustrategy(){conout("tustrategy\n");asm("halt");}
vmapbuf (){conout(" vmapbuf \n");asm("halt");}
vunmapbuf (){conout(" vunmapbuf \n");asm("halt");}

View File

@ -0,0 +1,214 @@
/*-
* Copyright (c) 1982, 1986 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)swapgeneric.c 7.11 (Berkeley) 5/9/91
* $Id: swapgeneric.c,v 1.1 1994/08/02 20:22:16 ragge Exp $
*/
#include "mba.h"
#include "uba.h"
#include "../include/pte.h"
#include "sys/param.h"
#include "sys/conf.h"
#include "sys/buf.h"
/* #include "sys/vm.h" */
#include "sys/systm.h"
#include "sys/reboot.h"
/* #include "cons.h" */
#include "../include/mtpr.h"
#if NMBA > 0
#include "../mba/mbareg.h"
#include "../mba/mbavar.h"
#endif
#include "../uba/ubareg.h"
#include "../uba/ubavar.h"
/*
* Generic configuration; all in one
*/
dev_t rootdev = NODEV;
dev_t argdev = NODEV;
dev_t dumpdev = NODEV;
int nswap;
struct swdevt swdevt[] = {
{ -1, 1, 0 },
{ -1, 1, 0 },
{ -1, 1, 0 },
{ 0, 0, 0 },
};
long dumplo;
int dmmin, dmmax, dmtext;
extern int ufs_mountroot();
int (*mountroot)() = ufs_mountroot;
extern struct mba_driver hpdriver;
extern struct uba_driver scdriver;
extern struct uba_driver hkdriver;
extern struct uba_driver idcdriver;
extern struct uba_driver hldriver;
extern struct uba_driver udadriver;
extern struct uba_driver kdbdriver;
struct genericconf {
caddr_t gc_driver;
char *gc_name;
dev_t gc_root;
} genericconf[] = {
/* { (caddr_t)&hpdriver, "hp", makedev(0, 0), },
{ (caddr_t)&scdriver, "up", makedev(2, 0), }, */
#if NUBA > 0
{ (caddr_t)&udadriver, "ra", makedev(9, 0), },
#endif
/* { (caddr_t)&idcdriver, "rb", makedev(11, 0), },
{ (caddr_t)&hldriver, "rl", makedev(14, 0), },
{ (caddr_t)&hkdriver, "hk", makedev(3, 0), },
{ (caddr_t)&hkdriver, "rk", makedev(3, 0), },
{ (caddr_t)&kdbdriver, "kra", makedev(16, 0), }, */
{ 0 },
};
setconf()
{
#if NMBA > 0
register struct mba_device *mi;
#endif
#if NUBA > 0
register struct uba_device *ui;
#endif
register struct genericconf *gc;
register char *cp, *gp;
int unit, swaponroot = 0;
if (rootdev != NODEV)
goto doswap;
unit = 0;
if (boothowto & RB_ASKNAME) {
char name[128];
retry:
printf("root device? ");
gets(name);
for (gc = genericconf; gc->gc_driver; gc++)
for (cp = name, gp = gc->gc_name; *cp == *gp; cp++)
if (*++gp == 0)
goto gotit;
printf(
"use hp%%d, up%%d, ra%%d, rb%%d, rl%%d, hk%%d or kra%%d\n");
goto retry;
gotit:
if (*++cp < '0' || *cp > '9') {
printf("bad/missing unit number\n");
goto retry;
}
while (*cp >= '0' && *cp <= '9')
unit = 10 * unit + *cp++ - '0';
if (*cp == '*')
swaponroot++;
goto found;
}
for (gc = genericconf; gc->gc_driver; gc++) {
#if NMBA > 0
for (mi = mbdinit; mi->mi_driver; mi++) {
if (mi->mi_alive == 0)
continue;
if (mi->mi_unit == unit && mi->mi_driver ==
(struct mba_driver *)gc->gc_driver) {
printf("root on %s%d\n",
mi->mi_driver->md_dname, unit);
goto found;
}
}
#endif
#if NUBA > 0
for (ui = ubdinit; ui->ui_driver; ui++) {
if (ui->ui_alive == 0)
continue;
if (ui->ui_unit == unit && ui->ui_driver ==
(struct uba_driver *)gc->gc_driver) {
printf("root on %s%d\n",
ui->ui_driver->ud_dname, unit);
goto found;
}
}
#endif
}
printf("no suitable root\n");
asm("halt");
found:
printf("gc->gc_root: %d\n",gc->gc_root);
gc->gc_root = makedev(major(gc->gc_root), unit*8);
rootdev = gc->gc_root;
doswap:
swdevt[0].sw_dev = argdev = dumpdev =
makedev(major(rootdev), minor(rootdev)+1);
/* swap size and dumplo set during autoconfigure */
if (swaponroot)
rootdev = dumpdev;
}
gets(cp)
char *cp;
{
register char *lp;
register c;
lp = cp;
for (;;) {
cnputc(c = cngetc());
switch (c) {
case '\n':
case '\r':
*lp++ = '\0';
return;
case '\b':
case '#':
case '\177':
lp--;
if (lp < cp)
lp = cp;
continue;
case '@':
case 'u'&037:
lp = cp;
cnputc('\n');
continue;
default:
*lp++ = c;
}
}
}

132
sys/arch/vax/vax/trap.c Normal file
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/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: trap.c,v 1.1 1994/08/02 20:22:17 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#include "sys/types.h"
#include "sys/param.h"
#include "sys/proc.h"
#include "sys/syscall.h"
#include "sys/systm.h"
#include "vax/include/mtpr.h"
#include "vm/vm.h"
#include "vm/vm_kern.h"
#include "vm/vm_prot.h"
#include "kern/syscalls.c"
extern int want_resched,whichqs;
/*
* astint() forces rescheduling of processes. Called by the fancy
* hardware supported Asynchronous System Trap on VAXen :)
*/
astint(psl){
mtpr(AST_NO,PR_ASTLVL); /* Turn off AST's */
splclock(); /* We want no interrupts now */
/* printf("Passerar astint() %x\n",whichqs); */
if(whichqs&&want_resched){
setrunqueue(curproc);
printf("Swtch() fr}n AST\n");
swtch();
}
}
ingen_v(psl,pc,vaddr,info)
unsigned psl,pc,vaddr,info;
{
int rv;
vm_map_t map;
vm_prot_t ftype;
extern vm_map_t kernel_map;
printf("Inv_pte: psl %x, pc %x, addr %x, info %x\n",psl,pc,vaddr,info);
if(pc>(unsigned)0x80000000)
map=kernel_map;
else
map= &curproc->p_vmspace->vm_map;
ftype = VM_PROT_READ; /* XXX */
rv = vm_fault(map, vaddr, ftype, FALSE);
if (rv != KERN_SUCCESS) {
printf("pagefault - ]t helvete... :( \n");
asm("halt");
}
}
struct sysc_frame {
int ap; /* Argument pointer on user stack */
int r1; /* General registers r0 & r1 */
int r0;
int type; /* System call number */
int pc; /* User pc */
int psl; /* User psl */
};
syscall(frame)
struct sysc_frame *frame;
{
struct sysent *callp;
int err,rval[2],args[8],narg;
if(frame->type<0||frame->type>=nsysent)
callp= &sysent[0];
else
callp= &sysent[frame->type];
rval[0]=0;
rval[1]=frame->r1;
narg=callp->sy_narg * sizeof(int);
if((narg=callp->sy_narg*4)!=0)
copyin(frame->ap,args,narg);
printf("%s: curproc %x, args %x, callp->sy_call %x\n",syscallnames[frame->type],
curproc,args, callp->sy_call);
err=(*callp->sy_call)(curproc,args,rval);
switch(err){
case 0:
frame->r1=rval[1];
frame->r0=rval[0];
frame->psl &= ~PSL_C;
break;
case ERESTART:
frame->pc=frame->pc-2;
break;
default:
frame->r0=err;
frame->psl |= PSL_C;
break;
}
/* here should be resched routines... but later :) */
}

70
sys/arch/vax/vax/udiv.s Normal file
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/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Donn Seeley at UUNET Technologies, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)udiv.s 5.6 (Berkeley) 4/15/91
* $Id: udiv.s,v 1.1 1994/08/02 20:22:19 ragge Exp $
*/
/*
* Unsigned division, PCC flavor.
* udiv() takes an ordinary dividend/divisor pair;
* audiv() takes a pointer to a dividend and an ordinary divisor.
*/
#define DIVIDEND 4(ap)
#define DIVISOR 8(ap)
.globl udiv
.align 2
udiv: .word 0x0
movl DIVISOR,r2
jlss Leasy # big divisor: settle by comparison
movl DIVIDEND,r0
jlss Lhard # big dividend: extended division
divl2 r2,r0 # small divisor and dividend: signed division
ret
Lhard:
clrl r1
ediv r2,r0,r0,r1
ret
Leasy:
cmpl DIVIDEND,r2
jgequ Lone # if dividend is as big or bigger, return 1
clrl r0 # else return 0
ret
Lone:
movl $1,r0
ret

68
sys/arch/vax/vax/urem.s Normal file
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@ -0,0 +1,68 @@
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* Donn Seeley at UUNET Technologies, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)urem.s 5.6 (Berkeley) 4/15/91
* $Id: urem.s,v 1.1 1994/08/02 20:22:20 ragge Exp $
*/
/*
* Unsigned modulus, PCC flavor.
* urem() takes an ordinary dividend/divisor pair;
*/
#define DIVIDEND 4(ap)
#define DIVISOR 8(ap)
.globl urem
.align 2
urem: .word 0x0
movl 8(ap),r2
jlss Leasy # big divisor: settle by comparison
movl 4(ap),r0
jlss Lhard # big dividend: need extended division
divl3 r2,r0,r1 # small divisor and dividend: signed modulus
mull2 r2,r1
subl2 r1,r0
ret
Lhard:
clrl r1
ediv r2,r0,r1,r0
ret
Leasy:
subl3 r2,DIVIDEND,r0
jcc Ldifference # if divisor goes in once, return difference
movl DIVIDEND,r0 # if divisor is bigger, return dividend
Ldifference:
ret

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@ -0,0 +1,284 @@
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed at Ludd, University of Lule}.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $Id: vm_machdep.c,v 1.1 1994/08/02 20:22:22 ragge Exp $
*/
/* All bugs are subject to removal without further notice */
#include "sys/types.h"
#include "vm/vm.h"
#include "vax/include/vmparam.h"
#include "vax/include/mtpr.h"
#include "sys/param.h"
#include "vax/include/pte.h"
#include "sys/proc.h"
#include "sys/user.h"
#include "sys/exec.h"
volatile int whichqs;
/*
* Clearseg, 'stolen' from locore.s
*/
void
clearseg(vm_offset_t physaddr) {
/* XXX Noop for now */
}
pagemove(from, to, size)
register caddr_t from, to;
int size;
{
register struct pte *fpte, *tpte;
if (size % CLBYTES)
panic("pagemove");
fpte = kvtopte(from);
tpte = kvtopte(to);
while (size > 0) {
*tpte++ = *fpte;
*(int *)fpte++ = PG_NV;
TBIS(from);
TBIS(to);
from += NBPG;
to += NBPG;
size -= NBPG;
}
DCIS();
}
#define VIRT2PHYS(x) \
(((*(int *)((((((int)x)&0x7fffffff)>>9)*4)+0x87f00000))&0x1fffff)<<9)
volatile unsigned int ustat,uofset;
cpu_fork(p1, p2)
struct proc *p1, *p2;
{
unsigned int *i,ksp,uorig,uchld;
struct pcb *nyproc;
uorig=(unsigned int)p1->p_addr;
nyproc=uchld=(unsigned int)p2->p_addr;
uofset=uchld-uorig;
/*
* Kopiera stacken. pcb skiter vi i, eftersom det ordnas fr}n savectx.
* OBS! Vi k|r p} kernelstacken!
*/
splhigh();
ksp=mfpr(PR_KSP);
#define UAREA (NBPG*UPAGES)
#define size (uorig+UAREA-ksp)
/*
printf("cpu_fork: uorig %x, uchld %x, UAREA %x\n",uorig, uchld, UAREA);
printf("cpu_fork: ksp: %x, usp: %x, size: %x\n",ksp,(uchld+UAREA-size),size);
*/
bcopy(ksp,(uchld+UAREA-size),size);
ustat=(uchld+UAREA-size)-8; /* Kompensera f|r PC + PSL */
mtpr(uchld,PR_ESP);
/*
* Ett VIDRIGT karpen-s{tt att s{tta om s} att sp f}r r{tt adress...
*/
for(i=ustat;i<uchld+UAREA;i++){
/* printf("Upp-i %x\n",i); */
if(*i<(uorig+UAREA)&& *i>ksp){
/* printf("Hittat int: %x\n",*i); */
*i = *i+(uchld-uorig);
}
}
/*
* Det som nu skall g|ras {r:
* 1: synka stackarna
* 2: l{gga r{tt v{rde f|r R0 i nya PCB.
*/
nyproc->P0BR=mfpr(PR_P0BR);
nyproc->P0LR=mfpr(PR_P0LR);
nyproc->P1BR=mfpr(PR_P1BR);
nyproc->P1LR=mfpr(PR_P1LR);
mtpr(VIRT2PHYS(uchld),PR_PCBB);
/* printf("cpu_fork: physaddr %x\n",VIRT2PHYS(uchld)); */
asm("movpsl -(sp)");
asm("jsb _savectx");
asm("movl r0,_ustat");
spl0();
if (ustat){
/*
* Return 1 in child.
*/
/* printf("F|r{lder!\n"); */
return (0);
}
/* printf("Forkad process!\n"); */
return (1);
}
void
setrunqueue(struct proc *p){
struct proc *a1;
int knummer;
/* printf("processp: %x\n",p); */
if(p->p_back) panic("sket sig i setrunqueue\n");
/* printf("p->p_priority: %x\n",p->p_priority); */
knummer=(p->p_priority>>2);
whichqs |= (1<<knummer);
a1=(knummer<<1)+(int *)qs;
/* printf("setrunqueue: qs %x, a1 %x, knummer %x, whichqs %x\n",qs,a1,knummer,whichqs); */
p->p_forw=a1;
p->p_back=a1->p_back;
a1->p_back=p;
p->p_back->p_forw=p;
return;
}
volatile caddr_t curpcb,nypcb;
swtch(){
int i,j,s;
struct proc *cp,*cq, *cr;
extern int want_resched;
hej: s=splhigh();
/* F|rst: Hitta en k|. */
j=whichqs;
/* printf("whichqs: %x\n",whichqs); */
for(i=0;j;i++){
if(j&1) goto found;
j=j>>1;
}
goto idle;
found:
/* printf("resched\n"); */
j=1<<i;
whichqs &= (!j);
/* printf("i %x, j %x, whichqs %x\n",i,j,whichqs); */
cq=qs+i;
if(cq->p_forw==cq) panic("Process inte i processk|n...");
cp=cq->p_forw;
cq->p_forw = cp->p_forw;
cr=cp->p_forw;
cr->p_back=cp->p_back;
if(!(cp->p_forw==cq)) whichqs |= j;
splhigh();
curpcb=VIRT2PHYS(curproc->p_addr);
nypcb=VIRT2PHYS(&cp->p_addr->u_pcb);
if(curpcb!=nypcb) printf("swtch: %x, %x\n",curproc->p_addr,&cp->p_addr->u_pcb);
want_resched=0;
curproc=cp;
cp->p_back=0;
if(curpcb==nypcb) return;
asm("movpsl -(sp)");
asm("jsb _loswtch");
return; /* New process! */
idle:
spl0();
while(!whichqs);
goto hej;
}
/* Should check that values is in bounds XXX */
copyinstr(from, to, maxlen, lencopied)
char *from, *to;
int *lencopied;
{
int i;
for(i=0;i<maxlen;i++){
*(to+i)=*(from+i);
if(!(*(to+i))) goto ok;
}
return(ENAMETOOLONG);
ok:
*lencopied=i+1;
return(0);
}
/* Should check that values is in bounds XXX */
copyoutstr(from, to, maxlen, lencopied){
int i;
printf("copyoutstr\n");
asm("halt");
for(i=from;i<from+maxlen;i++)
if(!(*((char *)to+i)=*((char *)from+i)))
goto ok;
return(ENAMETOOLONG);
ok:
*(int *)lencopied=i;
return(0);
}
cpu_wait(){}
cpu_exec_aout_makecmds(p, epp)
struct proc *p;
struct exec_package *epp;
{
int error;
struct exec *ep;
/*
* Compatibility with reno programs.
*/
ep=epp->ep_hdr;
switch (ep->a_midmag) {
case 0x10b:
error = exec_aout_prep_zmagic(p, epp);
break;
case 0x108:
error = exec_aout_prep_nmagic(p, epp);
break;
case 0x107:
error = exec_aout_prep_omagic(p, epp);
break;
default:
error = ENOEXEC;
}
return(error);
}
sysarch(){return(EINVAL);}

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@ -0,0 +1,163 @@
/*
* Copyright (c) 1982, 1986 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)in_cksum.c 7.6 (Berkeley) 12/16/90
* $Id: yyyin_cksum.c,v 1.1 1994/08/02 20:21:55 ragge Exp $
*/
#include "sys/param.h"
#include "sys/mbuf.h"
/*
* Checksum routine for Internet Protocol family headers (VAX Version).
*
* This routine is very heavily used in the network
* code and should be modified for each CPU to be as fast as possible.
*/
in_cksum(m, len)
register struct mbuf *m;
register int len;
{
register u_short *w; /* on vax, known to be r9 */
register int sum = 0; /* on vax, known to be r8 */
register int mlen = 0;
for (;;) {
/*
* Each trip around loop adds in
* word from one mbuf segment.
*/
w = mtod(m, u_short *);
if (mlen == -1) {
/*
* There is a byte left from the last segment;
* add it into the checksum. Don't have to worry
* about a carry-out here because we make sure
* that high part of (32 bit) sum is small below.
*/
sum += *(u_char *)w << 8;
w = (u_short *)((char *)w + 1);
mlen = m->m_len - 1;
len--;
} else
mlen = m->m_len;
m = m->m_next;
if (len < mlen)
mlen = len;
len -= mlen;
/*
* Force to long boundary so we do longword aligned
* memory operations. It is too hard to do byte
* adjustment, do only word adjustment.
*/
if (((int)w&0x2) && mlen >= 2) {
sum += *w++;
mlen -= 2;
}
/*
* Do as much of the checksum as possible 32 bits at at time.
* In fact, this loop is unrolled to make overhead from
* branches &c small.
*
* We can do a 16 bit ones complement sum 32 bits at a time
* because the 32 bit register is acting as two 16 bit
* registers for adding, with carries from the low added
* into the high (by normal carry-chaining) and carries
* from the high carried into the low on the next word
* by use of the adwc instruction. This lets us run
* this loop at almost memory speed.
*
* Here there is the danger of high order carry out, and
* we carefully use adwc.
*/
while ((mlen -= 32) >= 0) {
#undef ADD
#ifdef unneeded /* The loop construct clears carry for us... */
asm("bicpsr $1"); /* clears carry */
#endif
#define ADD asm("adwc (r9)+,r8;");
ADD; ADD; ADD; ADD; ADD; ADD; ADD; ADD;
asm("adwc $0,r8");
}
mlen += 32;
while ((mlen -= 8) >= 0) {
#ifdef unneeded /* The loop construct clears carry for us... */
asm("bicpsr $1"); /* clears carry */
#endif
ADD; ADD;
asm("adwc $0,r8");
}
mlen += 8;
/*
* Now eliminate the possibility of carry-out's by
* folding back to a 16 bit number (adding high and
* low parts together.) Then mop up trailing words
* and maybe an odd byte.
*/
{ asm("ashl $-16,r8,r0; addw2 r0,r8");
asm("adwc $0,r8; movzwl r8,r8"); }
while ((mlen -= 2) >= 0) {
asm("movzwl (r9)+,r0; addl2 r0,r8");
}
if (mlen == -1) {
sum += *(u_char *)w;
}
if (len == 0)
break;
/*
* Locate the next block with some data.
* If there is a word split across a boundary we
* will wrap to the top with mlen == -1 and
* then add it in shifted appropriately.
*/
for (;;) {
if (m == 0) {
printf("cksum: out of data\n");
goto done;
}
if (m->m_len)
break;
m = m->m_next;
}
}
done:
/*
* Add together high and low parts of sum
* and carry to get cksum.
* Have to be careful to not drop the last
* carry here.
*/
{ asm("ashl $-16,r8,r0; addw2 r0,r8; adwc $0,r8");
asm("mcoml r8,r8; movzwl r8,r8"); }
return (sum);
}

1125
sys/dev/dec/qbus/uba.c Normal file

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326
sys/dev/dec/qbus/ubareg.h Normal file
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/*-
* Copyright (c) 1982, 1986 The Regents of the University of California.
* All rights reserved.
* (c) UNIX System Laboratories, Inc.
* All or some portions of this file are derived from material licensed
* to the University of California by American Telephone and Telegraph
* Co. or Unix System Laboratories, Inc. and are reproduced herein with
* the permission of UNIX System Laboratories, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)ubareg.h 7.8 (Berkeley) 5/9/91
* $Id: ubareg.h,v 1.1 1994/08/02 20:21:27 ragge Exp $
*/
/*
* VAX UNIBUS adapter registers
*/
/*
* "UNIBUS" adaptor types.
* This code is used for both UNIBUSes and Q-buses
* with different types of adaptors.
* Definition of a type includes support code for that type.
*/
#if VAX780 || VAX8600
#define DW780 1 /* has adaptor regs, sr: 780/785/8600 */
#else
#undef DW780
#endif
#if VAX750
#define DW750 2 /* has adaptor regs, no sr: 750, 730 */
#endif
#if VAX730
#define DW730 3 /* has adaptor regs, no sr: 750, 730 */
#endif
#if VAX630 || VAX650
#define QBA 4 /* 22-bit Q-bus, no adaptor regs: uVAX II */
#endif
#if VAX8200 || VAX8500 || VAX8800
#define DWBUA 5 /* BI UNIBUS adaptor: 8200/8500/8800 */
#endif
/*
* Size of unibus memory address space in pages
* (also number of map registers).
* QBAPAGES should be 8192, but we don't need nearly that much
* address space, and the return from the allocation routine
* can accommodate at most 2047 (ubavar.h: UBA_MAXMR);
* QBAPAGES must be at least UBAPAGES. Choose pragmatically.
*/
#define UBAPAGES 496
#define NUBMREG 496
#if defined(GATEWAY) && !defined(QNIVERT)
#define QBAPAGES 1024
#else
#define QBAPAGES UBAPAGES
#endif
#define UBAIOADDR 0760000 /* start of I/O page */
#define UBAIOPAGES 16
#ifndef LOCORE
/*
* DWBUA hardware registers.
*/
struct dwbua_regs {
int pad1[456]; /* actually bii regs + pad */
int bua_csr; /* control and status register */
int bua_offset; /* vector offset register */
int bua_fubar; /* failed UNIBUS address register */
int bua_bifar; /* BI failed address register */
int bua_udiag[5]; /* micro diagnostics (R/O) */
int pad2[3];
/* dpr[0] is for DDP; dpr's 1 through 5 are for BPD's 1 through 5 */
int bua_dpr[6]; /* data path registers */
int pad3[10];
int bua_bdps[20]; /* buffered data path space *//*???*/
int pad4[8];
struct pte bua_map[UBAPAGES]; /* unibus map registers */
int pad5[UBAIOPAGES]; /* no maps for device address space */
};
#ifdef DWBUA
/* bua_csr */
#define BUACSR_ERR 0x80000000 /* composite error */
#define BUACSR_BIF 0x10000000 /* BI failure */
#define BUACSR_SSYNTO 0x08000000 /* slave sync timeout */
#define BUACSR_UIE 0x04000000 /* unibus interlock error */
#define BUACSR_IVMR 0x02000000 /* invalid map register */
#define BUACSR_BADBDP 0x01000000 /* bad BDP select */
#define BUACSR_BUAEIE 0x00100000 /* bua error interrupt enable (?) */
#define BUACSR_UPI 0x00020000 /* unibus power init */
#define BUACSR_UREGDUMP 0x00010000 /* microdiag register dump */
#define BUACSR_IERRNO 0x000000ff /* mask for internal errror number */
/* bua_offset */
#define BUAOFFSET_MASK 0x00003e00 /* hence max offset = 15872 */
/* bua_dpr */
#define BUADPR_DPSEL 0x00e00000 /* data path select (?) */
#define BUADPR_PURGE 0x00000001 /* purge bdp */
/* bua_map -- in particular, those bits that are not in DW780s & DW750s */
#define BUAMR_IOADR 0x40000000 /* I/O address space */
#define BUAMR_LAE 0x04000000 /* longword access enable */
/* I see no reason to use either one, though ... act 6 Aug 1987 */
#define UBA_PURGEBUA(uba, bdp) \
(((struct dwbua_regs *)(uba))->bua_dpr[bdp] |= BUADPR_PURGE)
#else
#define UBA_PURGEBUA(uba, bdp)
#endif
/*
* DW780/DW750 hardware registers
*/
struct uba_regs {
int uba_cnfgr; /* configuration register */
int uba_cr; /* control register */
int uba_sr; /* status register */
int uba_dcr; /* diagnostic control register */
int uba_fmer; /* failed map entry register */
int uba_fubar; /* failed UNIBUS address register */
int pad1[2];
int uba_brsvr[4];
int uba_brrvr[4]; /* receive vector registers */
int uba_dpr[16]; /* buffered data path register */
int pad2[480];
struct pte uba_map[UBAPAGES]; /* unibus map register */
int pad3[UBAIOPAGES]; /* no maps for device address space */
};
#endif
#ifdef DW780
/* uba_cnfgr */
#define UBACNFGR_UBINIT 0x00040000 /* unibus init asserted */
#define UBACNFGR_UBPDN 0x00020000 /* unibus power down */
#define UBACNFGR_UBIC 0x00010000 /* unibus init complete */
#define UBACNFGR_BITS \
"\40\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT\30ADPDN\27ADPUP\23UBINIT\22UBPDN\21UBIC"
/* uba_cr */
#define UBACR_MRD16 0x40000000 /* map reg disable bit 4 */
#define UBACR_MRD8 0x20000000 /* map reg disable bit 3 */
#define UBACR_MRD4 0x10000000 /* map reg disable bit 2 */
#define UBACR_MRD2 0x08000000 /* map reg disable bit 1 */
#define UBACR_MRD1 0x04000000 /* map reg disable bit 0 */
#define UBACR_IFS 0x00000040 /* interrupt field switch */
#define UBACR_BRIE 0x00000020 /* BR interrupt enable */
#define UBACR_USEFIE 0x00000010 /* UNIBUS to SBI error field IE */
#define UBACR_SUEFIE 0x00000008 /* SBI to UNIBUS error field IE */
#define UBACR_CNFIE 0x00000004 /* configuration IE */
#define UBACR_UPF 0x00000002 /* UNIBUS power fail */
#define UBACR_ADINIT 0x00000001 /* adapter init */
/* uba_sr */
#define UBASR_BR7FULL 0x08000000 /* BR7 receive vector reg full */
#define UBASR_BR6FULL 0x04000000 /* BR6 receive vector reg full */
#define UBASR_BR5FULL 0x02000000 /* BR5 receive vector reg full */
#define UBASR_BR4FULL 0x01000000 /* BR4 receive vector reg full */
#define UBASR_RDTO 0x00000400 /* UNIBUS to SBI read data timeout */
#define UBASR_RDS 0x00000200 /* read data substitute */
#define UBASR_CRD 0x00000100 /* corrected read data */
#define UBASR_CXTER 0x00000080 /* command transmit error */
#define UBASR_CXTMO 0x00000040 /* command transmit timeout */
#define UBASR_DPPE 0x00000020 /* data path parity error */
#define UBASR_IVMR 0x00000010 /* invalid map register */
#define UBASR_MRPF 0x00000008 /* map register parity failure */
#define UBASR_LEB 0x00000004 /* lost error */
#define UBASR_UBSTO 0x00000002 /* UNIBUS select timeout */
#define UBASR_UBSSYNTO 0x00000001 /* UNIBUS slave sync timeout */
#define UBASR_BITS \
"\20\13RDTO\12RDS\11CRD\10CXTER\7CXTMO\6DPPE\5IVMR\4MRPF\3LEB\2UBSTO\1UBSSYNTO"
/* uba_brrvr[] */
#define UBABRRVR_AIRI 0x80000000 /* adapter interrupt request */
#define UBABRRVR_DIV 0x0000ffff /* device interrupt vector field */
#endif
/* uba_dpr */
#ifdef DW780
#define UBADPR_BNE 0x80000000 /* buffer not empty - purge */
#define UBADPR_BTE 0x40000000 /* buffer transfer error */
#define UBADPR_DPF 0x20000000 /* DP function (RO) */
#define UBADPR_BS 0x007f0000 /* buffer state field */
#define UBADPR_BUBA 0x0000ffff /* buffered UNIBUS address */
#define UBA_PURGE780(uba, bdp) \
((uba)->uba_dpr[bdp] |= UBADPR_BNE)
#else
#define UBA_PURGE780(uba, bdp)
#endif
#ifdef DW750
#define UBADPR_ERROR 0x80000000 /* error occurred */
#define UBADPR_NXM 0x40000000 /* nxm from memory */
#define UBADPR_UCE 0x20000000 /* uncorrectable error */
#define UBADPR_PURGE 0x00000001 /* purge bdp */
/* the DELAY is for a hardware problem */
#define UBA_PURGE750(uba, bdp) { \
((uba)->uba_dpr[bdp] |= (UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE)); \
DELAY(8); \
}
#else
#define UBA_PURGE750(uba, bdp)
#endif
/*
* Macros for fast buffered data path purging in time-critical routines.
*
* Too bad C pre-processor doesn't have the power of LISP in macro
* expansion...
*/
/* THIS IS WRONG, should use pointer to uba_hd */
#if DWBUA || DW780 || DW750
#define UBAPURGE(uba, bdp) { \
switch (MACHID(cpu_type)) { \
case VAX_8200: UBA_PURGEBUA(uba, bdp); break; \
case VAX_8600: case VAX_780: UBA_PURGE780((uba), (bdp)); break; \
case VAX_750: UBA_PURGE750((uba), (bdp)); break; \
} \
}
#else
#define UBAPURGE(uba, bdp)
#endif
/* uba_mr[] */
#define UBAMR_MRV 0x80000000 /* map register valid */
#define UBAMR_BO 0x02000000 /* byte offset bit */
#define UBAMR_DPDB 0x01e00000 /* data path designator field */
#define UBAMR_SBIPFN 0x001fffff /* SBI page address field */
#define UBAMR_DPSHIFT 21 /* shift to data path designator */
/*
* Number of unibus buffered data paths and possible uba's per cpu type.
*/
#define NBDP8600 15
#define NBDP780 15
#define NBDPBUA 5
#define NBDP750 3
#define NBDP730 0
#define MAXNBDP 15
/*
* Symbolic BUS addresses for UBAs.
*/
#if VAX630 || VAX650
#define QBAMAP630 ((struct pte *)0x20088000)
#define QMEM630 0x30000000
#define QIOPAGE630 0x20000000
/*
* Q-bus control registers
*/
#define QIPCR 0x1f40 /* from start of iopage */
/* bits in QIPCR */
#define Q_DBIRQ 0x0001 /* doorbell interrupt request */
#define Q_LMEAE 0x0020 /* local mem external access enable */
#define Q_DBIIE 0x0040 /* doorbell interrupt enable */
#define Q_AUXHLT 0x0100 /* auxiliary processor halt */
#define Q_DMAQPE 0x8000 /* Q22 bus address space parity error */
#endif
#if VAX730
#define UMEM730 0xfc0000
#endif
#if VAX750
#define UMEM750(i) (0xfc0000-(i)*0x40000)
#endif
#if VAX780
#define UMEM780(i) (0x20100000+(i)*0x40000)
#endif
#if VAX8200 /* BEWARE, argument is node, not ubanum */
#define UMEM8200(i) (0x20400000+(i)*0x40000)
#endif
#if VAX8600
#define UMEMA8600(i) (0x20100000+(i)*0x40000)
#define UMEMB8600(i) (0x22100000+(i)*0x40000)
#endif
/*
* Macro to offset a UNIBUS device address, often expressed as
* something like 0172520, by forcing it into the last 8K
* of UNIBUS memory space.
*/
#define ubdevreg(addr) ((addr) & 017777)

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/*
* Copyright (c) 1982, 1986 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)ubavar.h 7.7 (Berkeley) 6/28/90
* $Id: ubavar.h,v 1.1 1994/08/02 20:21:28 ragge Exp $
*/
/*
* This file contains definitions related to the kernel structures
* for dealing with the unibus adapters.
*
* Each uba has a uba_hd structure.
* Each unibus controller which is not a device has a uba_ctlr structure.
* Each unibus device has a uba_device structure.
*/
#ifndef LOCORE
#include "buf.h"
/*
* Per-uba structure.
*
* This structure holds the interrupt vector for the uba,
* and its address in physical and virtual space. At boot time
* we determine the devices attached to the uba's and their
* interrupt vectors, filling in uh_vec. We free the map
* register and bdp resources of the uba into the structures
* defined here.
*
* During normal operation, resources are allocated and returned
* to the structures here. We watch the number of passive releases
* on each uba, and if the number is excessive may reset the uba.
*
* When uba resources are needed and not available, or if a device
* which can tolerate no other uba activity (rk07) gets on the bus,
* then device drivers may have to wait to get to the bus and are
* queued here. It is also possible for processes to block in
* the unibus driver in resource wait (mrwant, bdpwant); these
* wait states are also recorded here.
*/
struct uba_hd {
int uh_type; /* type of adaptor */
struct uba_regs *uh_uba; /* virt addr of uba adaptor regs */
struct uba_regs *uh_physuba; /* phys addr of uba adaptor regs */
struct pte *uh_mr; /* start of page map */
int uh_memsize; /* size of uba memory, pages */
caddr_t uh_mem; /* start of uba memory address space */
caddr_t uh_iopage; /* start of uba io page */
int (**Nuh_vec)(); /* interrupt vector */
struct uba_device *uh_actf; /* head of queue to transfer */
struct uba_device *uh_actl; /* tail of queue to transfer */
short uh_mrwant; /* someone is waiting for map reg */
short uh_bdpwant; /* someone awaits bdp's */
int uh_bdpfree; /* free bdp's */
int uh_hangcnt; /* number of ticks hung */
int uh_zvcnt; /* number of recent 0 vectors */
long uh_zvtime; /* time over which zvcnt accumulated */
int uh_zvtotal; /* total number of 0 vectors */
int uh_errcnt; /* number of errors */
int uh_lastiv; /* last free interrupt vector */
short uh_users; /* transient bdp use count */
short uh_xclu; /* an rk07 is using this uba! */
int uh_lastmem; /* limit of any unibus memory */
#define UAMSIZ 100
struct map *uh_map; /* register free map */
};
/* given a pointer to uba_regs, find DWBUA registers */
/* this should be replaced with a union in uba_hd */
#define BUA(uba) ((struct dwbua_regs *)(uba))
/*
* Per-controller structure.
* (E.g. one for each disk and tape controller, and other things
* which use and release buffered data paths.)
*
* If a controller has devices attached, then there are
* cross-referenced uba_drive structures.
* This structure is the one which is queued in unibus resource wait,
* and saves the information about unibus resources which are used.
* The queue of devices waiting to transfer is also attached here.
*/
struct uba_ctlr {
struct uba_driver *um_driver;
short um_ctlr; /* controller index in driver */
short um_ubanum; /* the uba it is on */
short um_alive; /* controller exists */
int (*um_intr)(); /* interrupt handler(s) */
caddr_t um_addr; /* address of device in i/o space */
struct uba_hd *um_hd;
/* the driver saves the prototype command here for use in its go routine */
int um_cmd; /* communication to dgo() */
int um_ubinfo; /* save unibus registers, etc */
int um_bdp; /* for controllers that hang on to bdp's */
struct buf um_tab; /* queue of devices for this controller */
};
/*
* Per ``device'' structure.
* (A controller has devices or uses and releases buffered data paths).
* (Everything else is a ``device''.)
*
* If a controller has many drives attached, then there will
* be several uba_device structures associated with a single uba_ctlr
* structure.
*
* This structure contains all the information necessary to run
* a unibus device such as a dz or a dh. It also contains information
* for slaves of unibus controllers as to which device on the slave
* this is. A flags field here can also be given in the system specification
* and is used to tell which dz lines are hard wired or other device
* specific parameters.
*/
struct uba_device {
struct uba_driver *ui_driver;
short ui_unit; /* unit number on the system */
short ui_ctlr; /* mass ctlr number; -1 if none */
short ui_ubanum; /* the uba it is on */
short ui_slave; /* slave on controller */
int (*ui_intr)(); /* interrupt handler(s) */
caddr_t ui_addr; /* address of device in i/o space */
short ui_dk; /* if init 1 set to number for iostat */
int ui_flags; /* parameter from system specification */
short ui_alive; /* device exists */
short ui_type; /* driver specific type information */
caddr_t ui_physaddr; /* phys addr, for standalone (dump) code */
/* this is the forward link in a list of devices on a controller */
struct uba_device *ui_forw;
/* if the device is connected to a controller, this is the controller */
struct uba_ctlr *ui_mi;
struct uba_hd *ui_hd;
};
/*
* Per-driver structure.
*
* Each unibus driver defines entries for a set of routines
* as well as an array of types which are acceptable to it.
* These are used at boot time by the configuration program.
*/
struct uba_driver {
int (*ud_probe)(); /* see if a driver is really there */
int (*ud_slave)(); /* see if a slave is there */
int (*ud_attach)(); /* setup driver for a slave */
int (*ud_dgo)(); /* fill csr/ba to start transfer */
u_short *ud_addr; /* device csr addresses */
char *ud_dname; /* name of a device */
struct uba_device **ud_dinfo; /* backpointers to ubdinit structs */
char *ud_mname; /* name of a controller */
struct uba_ctlr **ud_minfo; /* backpointers to ubminit structs */
short ud_xclu; /* want exclusive use of bdp's */
short ud_keepbdp; /* hang on to bdp's once allocated */
int (*ud_ubamem)(); /* see if dedicated memory is present */
};
#endif
/*
* Flags to UBA map/bdp allocation routines
*/
#define UBA_NEEDBDP 0x01 /* transfer needs a bdp */
#define UBA_CANTWAIT 0x02 /* don't block me */
#define UBA_NEED16 0x04 /* need 16 bit addresses only */
#define UBA_HAVEBDP 0x08 /* use bdp specified in high bits */
/*
* Macros to bust return word from map allocation routines.
* SHOULD USE STRUCTURE TO STORE UBA RESOURCE ALLOCATION:
*/
#ifdef notyet
struct ubinfo {
long ub_addr; /* unibus address: mr + boff */
int ub_nmr; /* number of registers, 0 if empty */
int ub_bdp; /* bdp number, 0 if none */
};
#define UBAI_MR(i) (((i) >> 9) & 0x7ff) /* starting map register */
#define UBAI_BOFF(i) ((i)&0x1ff) /* page offset */
#else
#define UBAI_BDP(i) ((int)(((unsigned)(i)) >> 28))
#define BDPMASK 0xf0000000
#define UBAI_NMR(i) ((int)((i) >> 20) & 0xff) /* max 255 (=127.5K) */
#define UBA_MAXNMR 255
#define UBAI_MR(i) ((int)((i) >> 9) & 0x7ff) /* max 2047 */
#define UBA_MAXMR 2047
#define UBAI_BOFF(i) ((int)((i) & 0x1ff))
#define UBAI_ADDR(i) ((int)((i) & 0xfffff)) /* uba addr (boff+mr) */
#define UBAI_INFO(off, mr, nmr, bdp) \
(((bdp) << 28) | ((nmr) << 20) | ((mr) << 9) | (off))
#endif
#ifndef LOCORE
#ifdef KERNEL
#define ubago(ui) ubaqueue(ui, 0)
/*
* UBA related kernel variables
*/
int numuba; /* number of uba's */
struct uba_hd uba_hd[];
/*
* Ubminit and ubdinit initialize the mass storage controller and
* device tables specifying possible devices.
*/
extern struct uba_ctlr ubminit[];
extern struct uba_device ubdinit[];
/*
* UNIBUS device address space is mapped by UMEMmap
* into virtual address umem[][].
* The IO page is mapped to the last 8K of each.
* This should be enlarged for the Q22 bus.
*/
extern struct pte *UMEMmap[]; /* uba device addr pte's */
/* extern char umem[][512*NBPG]; /* uba device addr space */
extern char *Numem;
#define Tumem(x) (Numem+(UBAPAGES+UBAIOPAGES)*NBPG*x)
/*
* Since some VAXen vector their unibus interrupts
* just adjacent to the system control block, we must
* allocate space there when running on ``any'' cpu. This space is
* used for the vectors for all ubas.
*/
extern int (*UNIvec[][128])(); /* unibus vec for ubas */
extern int (*eUNIvec)(); /* end of unibus vec */
#if defined(VAX780) || defined(VAX8600)
/*
* On DW780's, we must set the scb vectors for the nexus of the
* UNIbus adaptors to vector to locore unibus adaptor interrupt dispatchers
* which make 780's look like the other VAXen.
*/
extern Xua0int(), Xua1int(), Xua2int(), Xua3int();
#endif VAX780
#endif KERNEL
#endif !LOCORE