diff --git a/sys/arch/mvme68k/conf/GENERIC b/sys/arch/mvme68k/conf/GENERIC index f02d175ef966..ec7eb5cd0063 100644 --- a/sys/arch/mvme68k/conf/GENERIC +++ b/sys/arch/mvme68k/conf/GENERIC @@ -1,11 +1,12 @@ -# $NetBSD: GENERIC,v 1.12 2000/08/13 01:31:19 itojun Exp $ +# $NetBSD: GENERIC,v 1.13 2000/09/06 19:51:42 scw Exp $ include "arch/mvme68k/conf/std.mvme68k" -#ident "GENERIC-$Revision: 1.12 $" +#ident "GENERIC-$Revision: 1.13 $" # Boards this kernel supports options MVME147 +options MVME162 options MVME167 maxusers 4 @@ -72,24 +73,30 @@ mainbus0 at root # MVME147 specific devices pcc0 at mainbus0 vmepcc0 at pcc? +vme0 at vmepcc0 zsc* at pcc? ipl 4 -zstty* at zsc? channel ? clock0 at pcc? ipl 5 le0 at pcc? ipl 3 wdsc0 at pcc? ipl 2 lpt* at pcc? ipl 1 -# MVME167 specific devices +# MVME162 and MVME167 shared devices pcctwo0 at mainbus0 vmetwo0 at mainbus0 +vme0 at vmetwo0 clock0 at pcctwo? ipl 5 -clmpcc0 at pcctwo? ipl 4 ie0 at pcctwo? ipl 3 ncrsc0 at pcctwo? ipl 2 + +# MVME162 specific devices +zsc* at pcctwo? ipl 4 + +# MVME167 specific devices +clmpcc0 at pcctwo? ipl 4 lpt* at pcctwo? ipl 1 -vme0 at vmepcc0 -vme0 at vmetwo0 +# Common front-end for MVME147 and MVME162 `zs' device +zstty* at zsc? channel ? # Example VMEbus device #foo0 at vme0 addr 0x00ef0000 irq 3 vect 0x80 diff --git a/sys/arch/mvme68k/conf/VME162 b/sys/arch/mvme68k/conf/VME162 new file mode 100644 index 000000000000..cea3e5bfe0c3 --- /dev/null +++ b/sys/arch/mvme68k/conf/VME162 @@ -0,0 +1,82 @@ +# $NetBSD: VME162,v 1.1 2000/09/06 19:51:43 scw Exp $ + +include "arch/mvme68k/conf/std.mvme68k" + +# Boards this kernel supports; need at least one +options MVME162 + +# Needed on m68040 boards to emulate some missing FP instructions +options FPSP + +maxusers 16 + +options DDB +options DIAGNOSTIC, DEBUG + +#options SYSVSHM +options KTRACE +options COMPAT_43 + +file-system FFS +file-system NFS +file-system KERNFS +file-system MFS +#file-system MSDOSFS +#file-system UNION + +#options NFSSERVER +#options FFS_EI # FFS Endian Independant support + +# Networking options +options INET +options TCP_COMPAT_42 # compatibility with 4.2BSD TCP/IP +#options GATEWAY # IP packet forwarding +#options ISO # OSI networking +#options TPIP +#options EON + +#options COMPAT_14, COMPAT_13, COMPAT_12 +#options COMPAT_SUNOS +#options COMPAT_M68K4K # compatibility with NetBSD/m68k4k binaries + +## force NFS root and swap +#config netbsd root on ? type nfs +## "generic" boot (put root on boot device) +config netbsd root on ? type ? + +options NFS_BOOT_BOOTPARAM # Diskless client w/ bootparamd + + +pseudo-device sl +pseudo-device ppp 2 +pseudo-device loop +pseudo-device bpfilter +pseudo-device pty +pseudo-device vnd 2 + +mainbus0 at root + +pcctwo0 at mainbus0 +clock0 at pcctwo? ipl 5 +zsc* at pcctwo? ipl 4 +ie0 at pcctwo? ipl 3 +ncrsc0 at pcctwo? ipl 2 + +zstty* at zsc? channel ? + +# VMEbus Support +vmetwo0 at mainbus0 +vme0 at vmetwo0 + +# Example VMEbus device +#foo0 at vme0 addr 0x10001000 am 0x0d irq 3 vect 0x80 + +# SCSI Bus Support +scsibus* at ncrsc? + +sd* at scsibus? target ? lun ? +st* at scsibus? target ? lun ? +#cd* at scsibus? target ? lun ? +#ch* at scsibus? target ? lun ? +#ss* at scsibus? target ? lun ? # SCSI scanners +#uk* at scsibus? target ? lun ? # SCSI unknown diff --git a/sys/arch/mvme68k/conf/files.mvme68k b/sys/arch/mvme68k/conf/files.mvme68k index f869824aff93..7ae3829ca843 100644 --- a/sys/arch/mvme68k/conf/files.mvme68k +++ b/sys/arch/mvme68k/conf/files.mvme68k @@ -1,4 +1,4 @@ -# $NetBSD: files.mvme68k,v 1.34 2000/08/13 17:00:51 scw Exp $ +# $NetBSD: files.mvme68k,v 1.35 2000/09/06 19:51:43 scw Exp $ # config file for mvme68k @@ -49,6 +49,9 @@ file dev/ic/z8530sc.c zsc attach zsc at pcc with zsc_pcc file arch/mvme68k/dev/zs_pcc.c zsc_pcc needs-flag +attach zsc at pcctwo with zsc_pcctwo +file arch/mvme68k/dev/zs_pcctwo.c zsc_pcctwo needs-flag + device zstty: tty attach zstty at zsc file dev/ic/z8530tty.c zstty needs-flag diff --git a/sys/arch/mvme68k/dev/clmpcc_pcctwo.c b/sys/arch/mvme68k/dev/clmpcc_pcctwo.c index 24be6ec29e8b..f6bc9736cc19 100644 --- a/sys/arch/mvme68k/dev/clmpcc_pcctwo.c +++ b/sys/arch/mvme68k/dev/clmpcc_pcctwo.c @@ -1,4 +1,4 @@ -/* $NetBSD: clmpcc_pcctwo.c,v 1.4 2000/07/20 20:40:38 scw Exp $ */ +/* $NetBSD: clmpcc_pcctwo.c,v 1.5 2000/09/06 19:51:43 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -97,7 +97,8 @@ clmpcc_pcctwo_match(parent, cf, aux) pa = aux; - if (strcmp(pa->pa_name, clmpcc_cd.cd_name)) + if (strcmp(pa->pa_name, clmpcc_cd.cd_name) || + (machineid != MVME_167 && machineid != MVME_177)) return (0); pa->pa_ipl = cf->pcctwocf_ipl; @@ -140,12 +141,6 @@ clmpcc_pcctwo_attach(parent, self, aux) pcctwointr_establish(PCCTWOV_SCC_RX_EXCEP, clmpcc_rxintr, level, sc); pcctwointr_establish(PCCTWOV_SCC_TX, clmpcc_txintr, level, sc); pcctwointr_establish(PCCTWOV_SCC_MODEM, clmpcc_mdintr, level, sc); - - /* Enable the interrupts */ - pcc2_reg_write(sys_pcctwo, PCC2REG_SCC_MODEM_ICSR, - level | PCCTWO_ICR_IEN); - pcc2_reg_write(sys_pcctwo, PCC2REG_SCC_RX_ICSR, level | PCCTWO_ICR_IEN); - pcc2_reg_write(sys_pcctwo, PCC2REG_SCC_TX_ICSR, level | PCCTWO_ICR_IEN); } void @@ -236,7 +231,7 @@ clmpcccnprobe(cp) { int maj; - if (machineid == MVME_147) { + if (machineid != MVME_167 && machineid != MVME_177) { cp->cn_pri = CN_DEAD; return; } diff --git a/sys/arch/mvme68k/dev/clock_pcctwo.c b/sys/arch/mvme68k/dev/clock_pcctwo.c index 8878be80136c..7a8905353455 100644 --- a/sys/arch/mvme68k/dev/clock_pcctwo.c +++ b/sys/arch/mvme68k/dev/clock_pcctwo.c @@ -1,4 +1,4 @@ -/* $NetBSD: clock_pcctwo.c,v 1.3 2000/03/18 22:33:02 scw Exp $ */ +/* $NetBSD: clock_pcctwo.c,v 1.4 2000/09/06 19:51:43 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -37,8 +37,9 @@ */ /* - * Glue for the Peripheral Channel Controller Two (PCCChip2) timers - * and the Mostek clock chip found on the MVME-1[67]7 series of boards. + * Glue for the Peripheral Channel Controller Two (PCCChip2) timers, + * the Memory Controller ASIC (MCchip, and the Mostek clock chip found + * on the MVME-1[67]7 and MVME-162 series of boards. */ #include @@ -128,13 +129,14 @@ clock_pcctwo_attach(parent, self, aux) /* Ensure our interrupts get disabled at shutdown time. */ (void) shutdownhook_establish(clock_pcctwo_shutdown, NULL); + sc->sc_clock_lvl = (pa->pa_ipl & PCCTWO_ICR_LEVEL_MASK) | + PCCTWO_ICR_ICLR | PCCTWO_ICR_IEN; + /* Attach the interrupt handlers. */ pcctwointr_establish(PCCTWOV_TIMER1, clock_pcctwo_profintr, pa->pa_ipl, NULL); pcctwointr_establish(PCCTWOV_TIMER2, clock_pcctwo_statintr, pa->pa_ipl, NULL); - sc->sc_clock_lvl = (pa->pa_ipl & PCCTWO_ICR_LEVEL_MASK) | - PCCTWO_ICR_ICLR | PCCTWO_ICR_IEN; } void diff --git a/sys/arch/mvme68k/dev/if_ie.c b/sys/arch/mvme68k/dev/if_ie.c index 106bc28b1782..4194e3b62fab 100644 --- a/sys/arch/mvme68k/dev/if_ie.c +++ b/sys/arch/mvme68k/dev/if_ie.c @@ -1,4 +1,4 @@ -/* $NetBSD: if_ie.c,v 1.6 2000/07/25 20:52:27 scw Exp $ */ +/* $NetBSD: if_ie.c,v 1.7 2000/09/06 19:51:43 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -94,7 +94,7 @@ static void ie_write_16 __P((struct ie_softc *, int, u_int16_t)); static void ie_write_24 __P((struct ie_softc *, int, int)); /* - * i82596 Support Routines for MVME1[67]7 Boards + * i82596 Support Routines for MVME1[67][27] Boards */ static void ie_reset(sc, why) @@ -339,8 +339,5 @@ ie_pcctwo_attach(parent, self, args) i82586_attach(sc, "onboard", ethaddr, NULL, 0, 0); /* Finally, hook the hardware interrupt */ - pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, 0); pcctwointr_establish(PCCTWOV_LANC_IRQ, i82586_intr, pa->pa_ipl, sc); - pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, - pa->pa_ipl | PCCTWO_ICR_ICLR | PCCTWO_ICR_EDGE); } diff --git a/sys/arch/mvme68k/dev/lpt_pcctwo.c b/sys/arch/mvme68k/dev/lpt_pcctwo.c index ad9c6be48f50..b5ed1a93d84d 100644 --- a/sys/arch/mvme68k/dev/lpt_pcctwo.c +++ b/sys/arch/mvme68k/dev/lpt_pcctwo.c @@ -1,4 +1,4 @@ -/* $NetBSD: lpt_pcctwo.c,v 1.3 2000/03/18 22:33:03 scw Exp $ */ +/* $NetBSD: lpt_pcctwo.c,v 1.4 2000/09/06 19:51:43 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -46,6 +46,7 @@ #include #include +#include #include #include @@ -93,7 +94,8 @@ lpt_pcctwo_match(parent, cf, args) pa = args; - if (strcmp(pa->pa_name, lpt_cd.cd_name)) + if (strcmp(pa->pa_name, lpt_cd.cd_name) || + (machineid != MVME_167 && machineid != MVME_177)) return (0); pa->pa_ipl = cf->pcctwocf_ipl; diff --git a/sys/arch/mvme68k/dev/mainbus.c b/sys/arch/mvme68k/dev/mainbus.c index 44432bd85533..fd6bc36eed0b 100644 --- a/sys/arch/mvme68k/dev/mainbus.c +++ b/sys/arch/mvme68k/dev/mainbus.c @@ -1,4 +1,4 @@ -/* $NetBSD: mainbus.c,v 1.2 2000/03/18 22:33:03 scw Exp $ */ +/* $NetBSD: mainbus.c,v 1.3 2000/09/06 19:51:43 scw Exp $ */ /*- * Copyright (c) 2000 The NetBSD Foundation, Inc. @@ -79,7 +79,7 @@ static struct mainbus_devices mainbusdevs_147[] = { }; #endif -#if defined(MVME167) || defined(MVME177) +#if defined(MVME162) || defined(MVME167) || defined(MVME177) static struct mainbus_devices mainbusdevs_1x7[] = { {"pcctwo", MAINBUS_PCCTWO_OFFSET}, {"vmetwo", MAINBUS_VMETWO_OFFSET}, @@ -146,13 +146,8 @@ mainbus_attach(parent, self, args) break; #endif -#ifdef MVME162 +#if defined(MVME162) || defined(MVME167) || defined(MVME177) case MVME_162: - devices = mainbusdevs_162; - break; -#endif - -#if defined(MVME167) || defined(MVME177) case MVME_166: case MVME_167: case MVME_177: diff --git a/sys/arch/mvme68k/dev/ncrsc_pcctwo.c b/sys/arch/mvme68k/dev/ncrsc_pcctwo.c index 006af734b950..054d82baacbb 100644 --- a/sys/arch/mvme68k/dev/ncrsc_pcctwo.c +++ b/sys/arch/mvme68k/dev/ncrsc_pcctwo.c @@ -1,4 +1,4 @@ -/* $NetBSD: ncrsc_pcctwo.c,v 1.5 2000/07/25 20:52:28 scw Exp $ */ +/* $NetBSD: ncrsc_pcctwo.c,v 1.6 2000/09/06 19:51:43 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -168,10 +168,7 @@ ncrsc_pcctwo_attach(parent, self, args) siopinitialize(sc); /* Hook the chip's interrupt */ - pcc2_reg_write(sys_pcctwo, PCC2REG_SCSI_ICSR, 0); pcctwointr_establish(PCCTWOV_SCSI, ncrsc_pcctwo_intr, pa->pa_ipl, sc); - pcc2_reg_write(sys_pcctwo, PCC2REG_SCSI_ICSR, - pa->pa_ipl | PCCTWO_ICR_IEN); (void) config_found(self, &sc->sc_link, scsiprint); } diff --git a/sys/arch/mvme68k/dev/pcctwo.c b/sys/arch/mvme68k/dev/pcctwo.c index 1742f0eaee29..236746248689 100644 --- a/sys/arch/mvme68k/dev/pcctwo.c +++ b/sys/arch/mvme68k/dev/pcctwo.c @@ -1,4 +1,4 @@ -/* $NetBSD: pcctwo.c,v 1.3 2000/03/18 22:33:03 scw Exp $ */ +/* $NetBSD: pcctwo.c,v 1.4 2000/09/06 19:51:43 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -37,7 +37,7 @@ */ /* - * PCCchip2 Driver + * PCCchip2 and MCchip Driver */ #include @@ -45,6 +45,7 @@ #include #include +#include #include #include @@ -67,7 +68,7 @@ struct cfattach pcctwo_ca = { extern struct cfdriver pcctwo_cd; /* - * Global Pointer to the PCCChip2's soft state + * Global Pointer to the PCCChip2/MCchip soft state, and chip ID */ struct pcctwo_softc *sys_pcctwo; @@ -79,10 +80,19 @@ struct pcctwo_device { bus_addr_t pcc_offset; /* offset from PCC2 base */ }; +/* + * Macroes to make life easy when converting vector offset to interrupt + * control register, and how to initialise the ICSR. + */ +#define VEC2ICSR(r,v) ((r) | (((v) | PCCTWO_ICR_IEN) << 8)) +#define VEC2ICSR_REG(x) ((x) & 0xff) +#define VEC2ICSR_INIT(x) ((x) >> 8) + +#if defined(MVME167) || defined(MVME177) /* * Devices that live on the PCCchip2, attached in this order. */ -struct pcctwo_device pcctwo_devices[] = { +static struct pcctwo_device pcctwo_devices[] = { {"clock", PCCTWO_RTC_OFF}, {"clmpcc", PCCTWO_SCC_OFF}, {"ie", PCCTWO_IE_OFF}, @@ -92,6 +102,62 @@ struct pcctwo_device pcctwo_devices[] = { {NULL, 0} }; +static int pcctwo_vec2icsr_1x7[] = { + VEC2ICSR(PCC2REG_PRT_BUSY_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_PRT_PE_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_PRT_SEL_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_PRT_FAULT_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_PRT_ACK_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_SCSI_ICSR, 0), + VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_TIMER2_ICSR, PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_TIMER1_ICSR, PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_GPIO_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + -1, + VEC2ICSR(PCC2REG_SCC_RX_ICSR, 0), + VEC2ICSR(PCC2REG_SCC_MODEM_ICSR, 0), + VEC2ICSR(PCC2REG_SCC_TX_ICSR, 0), + VEC2ICSR(PCC2REG_SCC_RX_ICSR, 0) +}; +#endif + +#ifdef MVME162 +/* + * Devices that live on the MCchip, attached in this order. + */ +static struct pcctwo_device mcchip_devices[] = { + {"clock", PCCTWO_RTC_OFF}, + {"zsc", MCCHIP_ZS0_OFF}, + {"zsc", MCCHIP_ZS1_OFF}, + {"ie", PCCTWO_IE_OFF}, + {"ncrsc", PCCTWO_NCRSC_OFF}, + {"nvram", PCCTWO_NVRAM_OFF}, + {NULL, 0} +}; + +static int pcctwo_vec2icsr_1x2[] = { + -1, + -1, + -1, + VEC2ICSR(MCCHIPREG_TIMER4_ICSR, PCCTWO_ICR_ICLR), + VEC2ICSR(MCCHIPREG_TIMER3_ICSR, PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_SCSI_ICSR, 0), + VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_ETH_ICSR, PCCTWO_ICR_EDGE | PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_TIMER2_ICSR, PCCTWO_ICR_ICLR), + VEC2ICSR(PCC2REG_TIMER1_ICSR, PCCTWO_ICR_ICLR), + -1, + VEC2ICSR(MCCHIPREG_PARERR_ICSR, PCCTWO_ICR_ICLR), + VEC2ICSR(MCCHIPREG_SCC_ICSR, 0), + VEC2ICSR(MCCHIPREG_SCC_ICSR, 0), + VEC2ICSR(MCCHIPREG_ABORT_ICSR, PCCTWO_ICR_ICLR), + -1 +}; + +static int pcctwoabortintr(void *); +#endif + /* ARGSUSED */ int pcctwomatch(parent, cf, args) @@ -100,20 +166,34 @@ pcctwomatch(parent, cf, args) void *args; { struct mainbus_attach_args *ma; + bus_space_handle_t bh; + u_int8_t cid; ma = args; - /* - * Note: We don't need to check we're running on a 'machineid' - * which contains a PCCChip2, since "mainbus_attach" already - * deals with it. - */ - - /* Only attach one PCCchip2. */ - if (sys_pcctwo) + /* There can be only one. */ + if (sys_pcctwo || strcmp(ma->ma_name, pcctwo_cd.cd_name)) return (0); - return (strcmp(ma->ma_name, pcctwo_cd.cd_name) == 0); + /* + * Grab the Chip's ID + */ + bus_space_map(ma->ma_bust, PCCTWO_REG_OFF + ma->ma_offset, + PCC2REG_SIZE, 0, &bh); + cid = bus_space_read_1(ma->ma_bust, bh, PCC2REG_CHIP_ID); + bus_space_unmap(ma->ma_bust, bh, PCC2REG_SIZE); + +#if defined(MVME167) || defined(MVME177) + if ((machineid == MVME_167 || machineid == MVME_177) && + cid == PCCTWO_CHIP_ID_PCC2) + return (1); +#endif +#ifdef MVME162 + if (machineid == MVME_162 && cid == PCCTWO_CHIP_ID_MCCHIP) + return (1); +#endif + + return (0); } /* ARGSUSED */ @@ -126,7 +206,8 @@ pcctwoattach(parent, self, args) struct mainbus_attach_args *ma; struct pcctwo_softc *sc; struct pcctwo_attach_args npa; - int i; + struct pcctwo_device *pd; + u_int8_t cid; ma = args; sc = sys_pcctwo = (struct pcctwo_softc *) self; @@ -136,12 +217,6 @@ pcctwoattach(parent, self, args) bus_space_map(sc->sc_bust, PCCTWO_REG_OFF + ma->ma_offset, PCC2REG_SIZE, 0, &sc->sc_bush); - /* - * Announce ourselves to the world in general - */ - printf(": Peripheral Channel Controller (PCCchip2), Rev %d\n", - pcc2_reg_read(sc, PCC2REG_CHIP_REVISION)); - /* * Fix up the vector base for PCCChip2 Interrupts */ @@ -153,18 +228,48 @@ pcctwoattach(parent, self, args) pcc2_reg_write(sc, PCC2REG_GENERAL_CONTROL, pcc2_reg_read(sc, PCC2REG_GENERAL_CONTROL) | PCCTWO_GEN_CTRL_MIEN); + /* What are we? */ + cid = pcc2_reg_read(sc, PCC2REG_CHIP_ID); + + /* + * Announce ourselves to the world in general + */ +#if defined(MVME167) || defined(MVME177) + if (cid == PCCTWO_CHIP_ID_PCC2) { + printf(": Peripheral Channel Controller (PCCchip2), Rev %d\n", + pcc2_reg_read(sc, PCC2REG_CHIP_REVISION)); + pd = pcctwo_devices; + sc->sc_vec2icsr = pcctwo_vec2icsr_1x7; + } else +#endif +#ifdef MVME162 + if (cid == PCCTWO_CHIP_ID_MCCHIP) { + printf(": Memory Controller ASIC (MCchip), Rev %d\n", + pcc2_reg_read(sc, PCC2REG_CHIP_REVISION)); + pd = mcchip_devices; + sc->sc_vec2icsr = pcctwo_vec2icsr_1x2; + + pcctwointr_establish(MCCHIPV_ABORT, pcctwoabortintr, 7, NULL); + } else +#endif + { + /* This is one of those "Can't Happen" things ... */ + panic("pcctwoattach: unsupported ASIC!"); + } + /* * Attach configured children. */ - for (i = 0; pcctwo_devices[i].pcc_name != NULL; ++i) { + while (pd->pcc_name != NULL) { /* * Note that IPL is filled in by match function. */ - npa.pa_name = pcctwo_devices[i].pcc_name; + npa.pa_name = pd->pcc_name; npa.pa_ipl = -1; npa.pa_dmat = ma->ma_dmat; npa.pa_bust = ma->ma_bust; - npa.pa_offset = pcctwo_devices[i].pcc_offset + ma->ma_offset; + npa.pa_offset = pd->pcc_offset + ma->ma_offset; + pd++; /* Attach the device if configured. */ (void) config_found(self, &npa, pcctwoprint); @@ -199,6 +304,7 @@ pcctwointr_establish(vec, hand, lvl, arg) int (*hand) __P((void *)), lvl; void *arg; { + int vec2icsr; #ifdef DEBUG if (vec < 0 || vec >= PCCTWOV_MAX) { @@ -209,9 +315,21 @@ pcctwointr_establish(vec, hand, lvl, arg) printf("pcctwo: illegal interrupt level: %d\n", lvl); panic("pcctwointr_establish"); } + if (sys_pcctwo->sc_vec2icsr[vec] == -1) { + printf("pcctwo: unsupported vector: %d\n", vec); + panic("pcctwointr_establish"); + } #endif + vec2icsr = sys_pcctwo->sc_vec2icsr[vec]; + pcc2_reg_write(sys_pcctwo, VEC2ICSR_REG(vec2icsr), 0); + + /* Hook the interrupt */ isrlink_vectored(hand, arg, lvl, vec + PCCTWO_VECBASE); + + /* Enable it in hardware */ + pcc2_reg_write(sys_pcctwo, VEC2ICSR_REG(vec2icsr), + VEC2ICSR_INIT(vec2icsr) | lvl); } void @@ -224,7 +342,26 @@ pcctwointr_disestablish(vec) printf("pcctwo: illegal vector offset: 0x%x\n", vec); panic("pcctwointr_disestablish"); } + if (sys_pcctwo->sc_vec2icsr[vec] == -1) { + printf("pcctwo: unsupported vector: %d\n", vec); + panic("pcctwointr_establish"); + } #endif + /* Disable it in hardware */ + pcc2_reg_write(sys_pcctwo, sys_pcctwo->sc_vec2icsr[vec], 0); + isrunlink_vectored(vec + PCCTWO_VECBASE); } + +#ifdef MVME162 +static int +pcctwoabortintr(void *frame) +{ + + pcc2_reg_write(sys_pcctwo, MCCHIPREG_ABORT_ICSR, PCCTWO_ICR_ICLR | + pcc2_reg_read(sys_pcctwo, MCCHIPREG_ABORT_ICSR)); + + return (nmihand(frame)); +} +#endif diff --git a/sys/arch/mvme68k/dev/pcctworeg.h b/sys/arch/mvme68k/dev/pcctworeg.h index eb2f1343deb5..81b03a8ce895 100644 --- a/sys/arch/mvme68k/dev/pcctworeg.h +++ b/sys/arch/mvme68k/dev/pcctworeg.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcctworeg.h,v 1.5 2000/07/25 20:52:28 scw Exp $ */ +/* $NetBSD: pcctworeg.h,v 1.6 2000/09/06 19:51:44 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -57,6 +57,12 @@ #define PCCTWO_NVRAM_OFF 0x7e000 /* Offset of MK48T18 NVRAM */ #define PCCTWO_RTC_OFF 0x7fff8 /* Offset of MK48T18 RTC registers */ +/* + * The two devices on mvme162's MCchip + */ +#define MCCHIP_ZS0_OFF 0x03000 +#define MCCHIP_ZS1_OFF 0x03800 + /* * This is needed to figure out the boot device. * (The physical address of the boot device's registers are passed in @@ -109,7 +115,43 @@ #define PCC2REG_IRQ_LEVEL 0x3e /* Interrupt Priority Level */ #define PCC2REG_IRQ_MASK 0x3f /* Interrupt Mask */ -#define PCC2REG_SIZE 0x40 +/* + * Additions to the registers for the MCChip. Some of these overlap with + * the PCCchip2's registers, but only where hardware is not present, eg. + * the printer registers. + */ +#define MCCHIPREG_TIMER4_ICSR 0x18 /* Tick timer 4 interrupt control */ +#define MCCHIPREG_TIMER3_ICSR 0x19 /* Tick timer 4 interrupt control */ +#define MCCHIPREG_PARERR_ICSR 0x1c /* Parity error interrupt control */ +#define MCCHIPREG_SCC_ICSR 0x1d /* ZS-85230 interrupt control */ +#define MCCHIPREG_TIMER4_CTRL 0x1e /* Tick timer 4 control */ +#define MCCHIPREG_TIMER3_CTRL 0x1f /* Tick timer 3 control */ +#define MCCHIPREG_DRAM_BAR 0x20 /* DRAM Base Address (16-bits) */ +#define MCCHIPREG_SRAM_BAR 0x22 /* SRAM Base Address (16-bits) */ +#define MCCHIPREG_DRAM_SIZE 0x24 /* DRAM Size */ +#define MCCHIPREG_RAM_OPTIONS 0x25 /* DRAM/SRAM Options */ +#define MCCHIPREG_SRAM_SIZE 0x26 /* SRAM Size */ +#define MCCHIPREG_GP_INPUTS 0x2d /* General Purpose Inputs */ +#define MCCHIPREG_162_VERSION 0x2e /* MVME162-LX Series Version */ +#define MCCHIPREG_TIMER3_COMP 0x30 /* Tick Timer 3 Compare (32-bit) */ +#define MCCHIPREG_TIMER3_CNTR 0x34 /* Tick Timer 3 Counter (32-bit) */ +#define MCCHIPREG_TIMER4_COMP 0x38 /* Tick Timer 4 Compare (32-bit) */ +#define MCCHIPREG_TIMER4_CNTR 0x3c /* Tick Timer 4 Counter (32-bit) */ +#define MCCHIPREG_BUS_CLOCK 0x40 /* Bus Clock */ +#define MCCHIPREG_EPROM_TIMING 0x41 /* EPROM Access Time Control */ +#define MCCHIPREG_FLASH_TIMING 0x42 /* FLASH Access Time Control */ +#define MCCHIPREG_ABORT_ICSR 0x43 /* ABORT Switch Interrupt Control */ +#define MCCHIPREG_RESET_CONTROL 0x44 /* Reset Switch Control */ +#define MCCHIPREG_WDOG_CONTROL 0x45 /* Watchdog Timer Control */ +#define MCCHIPREG_TIMEBASE_SEL 0x46 /* Access & Watchdog Timebase Select */ +#define MCCHIPREG_DRAM_CONTROL 0x48 /* Parity DRAM Control */ +#define MCCHIPREG_MPU_STATUS 0x4a /* MPU Status */ +#define MCCHIPREG_PRESCALER 0x4c /* Prescaler Count Register (32-bits) */ + +/* + * PCCchip2's register size is 0x40. MCchip's is 0x50. Plump for the latter. + */ +#define PCC2REG_SIZE 0x50 /* * Convenience macroes for accessing the PCCChip2's registers @@ -134,12 +176,14 @@ * its control. The second is written to the CD2401's Local Interrupt * Vector Register. Thus, we don't use the Auto-Vector facilities * for the CD2401, as recommended in the PCCChip2 Programmer's Guide. + * The third is used as a base for the ZS85230 serial chips on mvme162. */ #define PCCTWO_VECBASE 0x50 #define PCCTWO_SCC_VECBASE 0x5c +#define MCCHIP_ZS_VECBASE 0x5c /* - * Vector Encoding (Offsets from PCCTWO_VECBASE) + * PCCchip2 Vector Encoding (Offsets from PCCTWO_VECBASE) * The order 0x0 -> 0xf also indicates priority, with 0x0 lowest. */ #define PCCTWOV_PRT_BUSY 0x0 /* Printer Port 'BSY' */ @@ -159,6 +203,22 @@ #define PCCTWOV_SCC_RX 0xf /* SCC Rx (Non-Auto-vector mode) */ #define PCCTWOV_MAX 16 +/* + * MCchip-specific Vector Encoding (Offsets from PCCTWO_VECBASE) + */ +#define MCCHIPV_TIMER4 0x3 /* Tick Timer 4 Interrupt */ +#define MCCHIPV_TIMER3 0x4 /* Tick Timer 3 Interrupt */ +#define MCCHIPV_PARITY_ERR 0xb /* Parity DRAM Error Exception */ +#define MCCHIPV_ZS0 0xc /* First ZS85230 Interrupt Vector */ +#define MCCHIPV_ZS1 0xc /* Second ZS85230 Interrupt Vector */ +#define MCCHIPV_ABORT 0xe /* Abort Switch */ + +/* + * How to identify the PCCchip2 from an MCchip + */ +#define PCCTWO_CHIP_ID_PCC2 0x20 +#define PCCTWO_CHIP_ID_MCCHIP 0x84 + /* * Bit Values for the General Control Register (PCC2REG_GENERAL_CONTROL) diff --git a/sys/arch/mvme68k/dev/pcctwovar.h b/sys/arch/mvme68k/dev/pcctwovar.h index 3cb0cdd5b081..fcfb8ef90f7f 100644 --- a/sys/arch/mvme68k/dev/pcctwovar.h +++ b/sys/arch/mvme68k/dev/pcctwovar.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcctwovar.h,v 1.2 2000/03/18 22:33:03 scw Exp $ */ +/* $NetBSD: pcctwovar.h,v 1.3 2000/09/06 19:51:44 scw Exp $ */ /*- * Copyright (c) 2000 The NetBSD Foundation, Inc. @@ -61,6 +61,7 @@ struct pcctwo_softc { struct device sc_dev; bus_space_tag_t sc_bust; /* PCCChip2's register tag */ bus_space_handle_t sc_bush; /* PCCChip2's register handle */ + int *sc_vec2icsr; /* Translate vector to ICSR */ }; extern struct pcctwo_softc *sys_pcctwo; diff --git a/sys/arch/mvme68k/dev/vme_two.c b/sys/arch/mvme68k/dev/vme_two.c index dddf6894d1a7..6c3db702f696 100644 --- a/sys/arch/mvme68k/dev/vme_two.c +++ b/sys/arch/mvme68k/dev/vme_two.c @@ -1,4 +1,4 @@ -/* $NetBSD: vme_two.c,v 1.8 2000/08/23 08:13:14 scw Exp $ */ +/* $NetBSD: vme_two.c,v 1.9 2000/09/06 19:51:44 scw Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -115,7 +115,8 @@ vmetwo_match(parent, cf, aux) if (vmetwo_sc) return (0); - if (machineid != MVME_167 && machineid != MVME_177) + if (machineid != MVME_167 && machineid != MVME_177 && + machineid != MVME_162) return (0); return (1); @@ -273,8 +274,13 @@ vmetwo_attach(parent, self, aux) &sc->sc_slave[i + VME2_SLAVE_PROG_START + 2]); } - /* Let the NMI handler deal with level 7 ABORT switch interrupts */ - vmetwo_intr_establish(sc, 7, VME2_VEC_ABORT, 0, nmihand, NULL); + if (machineid != MVME_162) { + /* + * Let the NMI handler deal with level 7 ABORT switch + * interrupts + */ + vmetwo_intr_establish(sc, 7, VME2_VEC_ABORT, 1, nmihand, NULL); + } /* Attach to the mvme68k common VMEbus front-end */ sc->sc_mvmebus.sc_dmat = ma->ma_dmat; diff --git a/sys/arch/mvme68k/dev/zs.c b/sys/arch/mvme68k/dev/zs.c index 46a4cb9ea0ab..57364b3e2de2 100644 --- a/sys/arch/mvme68k/dev/zs.c +++ b/sys/arch/mvme68k/dev/zs.c @@ -1,4 +1,4 @@ -/* $NetBSD: zs.c,v 1.21 2000/07/21 20:18:35 scw Exp $ */ +/* $NetBSD: zs.c,v 1.22 2000/09/06 19:51:44 scw Exp $ */ /*- * Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -103,7 +103,7 @@ u_char zs_init_reg[16] = { ZSWR9_MASTER_IE, 0, /*10: Misc. TX/RX control bits */ ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, - ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ + 0, /*12: BAUDLO (default=9600) */ 0, /*13: BAUDHI (default=9600) */ ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, ZSWR15_BREAK_IE, @@ -132,21 +132,18 @@ cons_decl(zsc_pcc); * Configure children of an SCC. */ void -zs_config(zsc, bust, bush) +zs_config(zsc, zs, vector, pclk) struct zsc_softc *zsc; - bus_space_tag_t bust; - bus_space_handle_t bush; + struct zsdevice *zs; + int vector, pclk; { struct zsc_attach_args zsc_args; - struct zsdevice *zs; volatile struct zschan *zc; struct zs_chanstate *cs; int zsc_unit, channel, s; zsc_unit = zsc->zsc_dev.dv_unit; - printf(": Zilog 8530 SCC\n"); - - zs = (struct zsdevice *) bush; /* XXXXXXXX */ + printf(": Zilog 8530 SCC at vector 0x%x\n", vector); /* * Initialize software state for each channel. @@ -166,12 +163,14 @@ zs_config(zsc, bust, bush) zs_conschan = cs; } else { zc = (channel == 0) ? &zs->zs_chan_a : &zs->zs_chan_b; - cs->cs_reg_csr = &zc->zc_csr; - cs->cs_reg_data = &zc->zc_data; + cs->cs_reg_csr = zc->zc_csr; + cs->cs_reg_data = zc->zc_data; bcopy(zs_init_reg, cs->cs_creg, 16); bcopy(zs_init_reg, cs->cs_preg, 16); cs->cs_defspeed = zs_defspeed[zsc_unit][channel]; } + cs->cs_creg[2] = cs->cs_preg[2] = vector; + cs->cs_creg[12] = cs->cs_preg[12] = ((pclk / 32) / 9600) - 1; cs->cs_defcflag = zs_def_cflag; /* Make these correspond to cs_defcflag (-crtscts) */ @@ -183,15 +182,17 @@ zs_config(zsc, bust, bush) cs->cs_channel = channel; cs->cs_private = NULL; cs->cs_ops = &zsops_null; - cs->cs_brg_clk = PCLK / 16; + cs->cs_brg_clk = pclk / 16; /* * Clear the master interrupt enable. * The INTENA is common to both channels, * so just do it on the A channel. + * Write the interrupt vector while we're at it. */ if (channel == 0) { zs_write_reg(cs, 9, 0); + zs_write_reg(cs, 2, vector); } /* @@ -234,12 +235,34 @@ zsc_print(aux, name) return UNCONF; } +#ifdef MVME162 /* - * Our ZS chips all share a common, autovectored interrupt, + * Our ZS chips each have their own interrupt vector. + */ +int +zshard_unshared(arg) + void *arg; +{ + struct zsc_softc *zsc = arg; + int rval; + + rval = zsc_intr_hard(zsc); + + if ((zsc->zsc_cs[0]->cs_softreq) || + (zsc->zsc_cs[1]->cs_softreq)) + softintr_schedule(zsc->zsc_softintr_cookie); + + return (rval); +} +#endif + +#ifdef MVME147 +/* + * Our ZS chips all share a common, PCC-vectored interrupt, * so we have to look at all of them on each interrupt. */ int -zshard(arg) +zshard_shared(arg) void *arg; { struct zsc_softc *zsc; @@ -257,6 +280,7 @@ zshard(arg) } return (rval); } +#endif #if 0 @@ -482,16 +506,14 @@ zs_putc(arg, c) * Common parts of console init. */ void -zs_cnconfig(zsc_unit, channel, bust, bush) +zs_cnconfig(zsc_unit, channel, zs, pclk) int zsc_unit, channel; - bus_space_tag_t bust; - bus_space_handle_t bush; + struct zsdevice *zs; + int pclk; { struct zs_chanstate *cs; - struct zsdevice *zs; struct zschan *zc; - zs = (struct zsdevice *) bush; /* XXXXXXXX */ zc = (channel == 0) ? &zs->zs_chan_a : &zs->zs_chan_b; /* @@ -503,12 +525,13 @@ zs_cnconfig(zsc_unit, channel, bust, bush) zs_hwflags[zsc_unit][channel] = ZS_HWFLAG_CONSOLE; /* Setup temporary chanstate. */ - cs->cs_reg_csr = &zc->zc_csr; - cs->cs_reg_data = &zc->zc_data; + cs->cs_reg_csr = zc->zc_csr; + cs->cs_reg_data = zc->zc_data; /* Initialize the pending registers. */ bcopy(zs_init_reg, cs->cs_preg, 16); cs->cs_preg[5] |= (ZSWR5_DTR | ZSWR5_RTS); + cs->cs_preg[12] = ((pclk / 32) / 9600) - 1; #if 0 /* XXX: Preserve BAUD rate from boot loader. */ diff --git a/sys/arch/mvme68k/dev/zs_pcc.c b/sys/arch/mvme68k/dev/zs_pcc.c index 8638a5106cad..c9cbbabf7cc6 100644 --- a/sys/arch/mvme68k/dev/zs_pcc.c +++ b/sys/arch/mvme68k/dev/zs_pcc.c @@ -1,4 +1,4 @@ -/* $NetBSD: zs_pcc.c,v 1.9 2000/07/23 20:50:21 scw Exp $ */ +/* $NetBSD: zs_pcc.c,v 1.10 2000/09/06 19:51:44 scw Exp $ */ /*- * Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -117,6 +117,7 @@ zsc_pcc_attach(parent, self, aux) { struct zsc_softc *zsc = (void *) self; struct pcc_attach_args *pa = aux; + struct zsdevice zs; bus_space_handle_t bush; int zs_level, ir; static int didintr; @@ -126,8 +127,19 @@ zsc_pcc_attach(parent, self, aux) zs_level = pa->pa_ipl; - /* Do common parts of SCC configuration. */ - zs_config(zsc, pa->pa_bust, bush); + /* XXX: This is a gross hack. I need to bus-space zs.c ... */ + zs.zs_chan_b.zc_csr = (volatile u_char *) bush; + zs.zs_chan_b.zc_data = (volatile u_char *) bush + 1; + zs.zs_chan_a.zc_csr = (volatile u_char *) bush + 2; + zs.zs_chan_a.zc_data = (volatile u_char *) bush + 3; + + /* + * Do common parts of SCC configuration. + * Note that the vector is not actually used by the ZS chip on + * MVME-147. We set up the PCC so that it provides the vector. + * This is just here so the real vector is printed at config time. + */ + zs_config(zsc, &zs, PCC_VECBASE + PCCV_ZS, PCLK_147); /* * Now safe to install interrupt handlers. Note the arguments @@ -136,7 +148,7 @@ zsc_pcc_attach(parent, self, aux) */ if (didintr == 0) { didintr = 1; - pccintr_establish(PCCV_ZS, zshard, zs_level, zsc); + pccintr_establish(PCCV_ZS, zshard_shared, zs_level, zsc); } /* Sanity check the interrupt levels. */ @@ -146,11 +158,11 @@ zsc_pcc_attach(parent, self, aux) panic("zs_pcc_attach: zs configured at different IPLs"); /* - * Set master interrupt enable. Vector is programmed into - * the SCC by the PCC. + * Set master interrupt enable. Vector is supplied by the PCC. */ pcc_reg_write(sys_pcc, PCCREG_SERIAL_INTR_CTRL, zs_level | PCC_IENABLE | PCC_ZSEXTERN); + zs_write_reg(zsc->zsc_cs[0], 2, PCC_VECBASE + PCCV_ZS); zs_write_reg(zsc->zsc_cs[0], 9, zs_init_reg[9]); } @@ -181,9 +193,16 @@ zsc_pcccninit(cp) { bus_space_tag_t bust = MVME68K_INTIO_BUS_SPACE; bus_space_handle_t bush; + struct zsdevice zs; bus_space_map(bust, MAINBUS_PCC_OFFSET + PCC_ZS0_OFF, 4, 0, &bush); + /* XXX: This is a gross hack. I need to bus-space zs.c ... */ + zs.zs_chan_b.zc_csr = (volatile u_char *) bush; + zs.zs_chan_b.zc_data = (volatile u_char *) bush + 1; + zs.zs_chan_a.zc_csr = (volatile u_char *) bush + 2; + zs.zs_chan_a.zc_data = (volatile u_char *) bush + 3; + /* Do common parts of console init. */ - zs_cnconfig(0, 0, bust, bush); + zs_cnconfig(0, 0, &zs, PCLK_147); } diff --git a/sys/arch/mvme68k/dev/zs_pcctwo.c b/sys/arch/mvme68k/dev/zs_pcctwo.c new file mode 100644 index 000000000000..d0afb38029ed --- /dev/null +++ b/sys/arch/mvme68k/dev/zs_pcctwo.c @@ -0,0 +1,188 @@ +/* $NetBSD: zs_pcctwo.c,v 1.1 2000/09/06 19:51:44 scw Exp $ */ + +/*- + * Copyright (c) 2000 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Gordon W. Ross, Jason R. Thorpe and Steve C. Woodford. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Zilog Z8530 Dual UART driver (machine-dependent part) + * + * Runs two serial lines per chip using slave drivers. + * Plain tty/async lines use the zs_async slave. + * + * Modified for NetBSD/mvme68k by Jason R. Thorpe + * + * Modified to attach to the PCCchip2/MCchip backend by Steve Woodford. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + + +/* Definition of the driver for autoconfig. */ +static int zsc_pcctwo_match(struct device *, struct cfdata *, void *); +static void zsc_pcctwo_attach(struct device *, struct device *, void *); + +struct cfattach zsc_pcctwo_ca = { + sizeof(struct zsc_softc), zsc_pcctwo_match, zsc_pcctwo_attach +}; + +extern struct cfdriver zsc_cd; + +cons_decl(zsc_pcctwo); + + +/* + * Is the zs chip present? + */ +static int +zsc_pcctwo_match(parent, cf, aux) + struct device *parent; + struct cfdata *cf; + void *aux; +{ + struct pcctwo_attach_args *pa = aux; + + if (strcmp(pa->pa_name, zsc_cd.cd_name) || machineid != MVME_162) + return (0); + + pa->pa_ipl = cf->pcctwocf_ipl; + if (pa->pa_ipl == -1) + pa->pa_ipl = ZSHARD_PRI; + return (1); +} + +/* + * Attach a found zs. + */ +static void +zsc_pcctwo_attach(parent, self, aux) + struct device *parent; + struct device *self; + void *aux; +{ + struct zsc_softc *zsc = (void *) self; + struct pcctwo_attach_args *pa = aux; + struct zsdevice zs; + bus_space_handle_t bush; + int zs_level; + static int vector = MCCHIPV_ZS0; + + /* Map the device's registers */ + bus_space_map(pa->pa_bust, pa->pa_offset, 8, 0, &bush); + + zs_level = pa->pa_ipl; + + /* XXX: This is a gross hack. I need to bus-space zs.c ... */ + zs.zs_chan_b.zc_csr = (volatile u_char *) bush + 1; + zs.zs_chan_b.zc_data = (volatile u_char *) bush + 3; + zs.zs_chan_a.zc_csr = (volatile u_char *) bush + 5; + zs.zs_chan_a.zc_data = (volatile u_char *) bush + 7; + + /* Do common parts of SCC configuration. */ + zs_config(zsc, &zs, vector + PCCTWO_VECBASE, PCLK_162); + + /* + * Now safe to install interrupt handlers. + */ + pcctwointr_establish(vector++, zshard_unshared, zs_level, zsc); + + /* + * Set master interrupt enable. + */ + zs_write_reg(zsc->zsc_cs[0], 9, zs_init_reg[9]); +} + +/**************************************************************** + * Console support functions (MVME PCC specific!) + ****************************************************************/ + +/* + * Check for SCC console. The MVME-162 always uses unit 0 chan 0. + */ +void +zsc_pcctwocnprobe(cp) + struct consdev *cp; +{ + if (machineid != MVME_162) { + cp->cn_pri = CN_DEAD; + return; + } + + /* Initialize required fields. */ + cp->cn_dev = makedev(zs_major, 0); + cp->cn_pri = CN_NORMAL; +} + +void +zsc_pcctwocninit(cp) + struct consdev *cp; +{ + bus_space_tag_t bust = MVME68K_INTIO_BUS_SPACE; + bus_space_handle_t bush; + struct zsdevice zs; + + bus_space_map(bust, MAINBUS_PCCTWO_OFFSET + MCCHIP_ZS0_OFF, 8, 0,&bush); + + /* XXX: This is a gross hack. I need to bus-space zs.c ... */ + zs.zs_chan_b.zc_csr = (volatile u_char *) bush + 1; + zs.zs_chan_b.zc_data = (volatile u_char *) bush + 3; + zs.zs_chan_a.zc_csr = (volatile u_char *) bush + 5; + zs.zs_chan_a.zc_data = (volatile u_char *) bush + 7; + + /* Do common parts of console init. */ + zs_cnconfig(0, 0, &zs, PCLK_162); +} diff --git a/sys/arch/mvme68k/dev/zsvar.h b/sys/arch/mvme68k/dev/zsvar.h index a7ce905ca808..ea7cd57d055c 100644 --- a/sys/arch/mvme68k/dev/zsvar.h +++ b/sys/arch/mvme68k/dev/zsvar.h @@ -1,4 +1,4 @@ -/* $NetBSD: zsvar.h,v 1.6 2000/07/20 20:40:37 scw Exp $ */ +/* $NetBSD: zsvar.h,v 1.7 2000/09/06 19:51:44 scw Exp $ */ /*- * Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -42,9 +42,14 @@ */ /* - * The MVME provides a 4.9152 MHz clock to the SCC chips. + * The MVME-147 provides a 4.9152 MHz clock to the SCC chips. */ -#define PCLK (9600 * 512) /* PCLK pin input clock rate */ +#define PCLK_147 (9600 * 512) /* PCLK pin input clock rate */ + +/* + * The MVME-162 provides a 9.8304 MHz clock to the SCC chips. + */ +#define PCLK_162 (9600 * 1024) /* PCLK pin input clock rate */ /* * SCC should interrupt host at level 4. @@ -65,8 +70,8 @@ * The layout of this is hardware-dependent (padding, order). */ struct zschan { - volatile u_char zc_csr; /* ctrl,status, and indirect access */ - volatile u_char zc_data; /* data */ + volatile u_char *zc_csr; /* ctrl,status, and indirect access */ + volatile u_char *zc_data; /* data */ }; struct zsdevice { @@ -79,6 +84,11 @@ struct zsdevice { extern u_char zs_init_reg[]; /* Functions exported to ASIC-specific drivers. */ -void zs_config __P((struct zsc_softc *, bus_space_tag_t,bus_space_handle_t)); -void zs_cnconfig __P((int, int, bus_space_tag_t, bus_space_handle_t)); -int zshard __P((void *)); +void zs_config __P((struct zsc_softc *, struct zsdevice *, int, int)); +void zs_cnconfig __P((int, int, struct zsdevice *, int)); +#ifdef MVME147 +int zshard_shared __P((void *)); +#endif +#ifdef MVME162 +int zshard_unshared(void *); +#endif diff --git a/sys/arch/mvme68k/mvme68k/autoconf.c b/sys/arch/mvme68k/mvme68k/autoconf.c index 349ae638e2f0..d5effff47eb3 100644 --- a/sys/arch/mvme68k/mvme68k/autoconf.c +++ b/sys/arch/mvme68k/mvme68k/autoconf.c @@ -1,4 +1,4 @@ -/* $NetBSD: autoconf.c,v 1.26 2000/07/25 20:52:30 scw Exp $ */ +/* $NetBSD: autoconf.c,v 1.27 2000/09/06 19:51:44 scw Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -70,7 +70,7 @@ #ifdef MVME147 #include #endif -#if defined(MVME167) || defined(MVME177) +#if defined(MVME162) || defined(MVME167) || defined(MVME177) #include #endif @@ -153,11 +153,12 @@ device_register(dev, aux) break; #endif /* MVME_147 */ -#if defined(MVME167) || defined(MVME177) +#if defined(MVME162) || defined(MVME167) || defined(MVME177) + case MVME_162: case MVME_167: case MVME_177: /* - * We currently only support booting from the 167's + * We currently only support booting from the 16x and 17x * onboard scsi and ethernet. So ensure this * device's parent is the PCCTWO driver. */ @@ -178,7 +179,7 @@ device_register(dev, aux) } break; -#endif /* MVME_167 || MVME_177 */ +#endif /* MVME_162 || MVME_167 || MVME_177 */ default: break; diff --git a/sys/arch/mvme68k/mvme68k/conf.c b/sys/arch/mvme68k/mvme68k/conf.c index 833e95fc4d14..eb85964738a1 100644 --- a/sys/arch/mvme68k/mvme68k/conf.c +++ b/sys/arch/mvme68k/mvme68k/conf.c @@ -1,4 +1,4 @@ -/* $NetBSD: conf.c,v 1.20 2000/03/18 22:33:06 scw Exp $ */ +/* $NetBSD: conf.c,v 1.21 2000/09/06 19:51:44 scw Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. @@ -298,6 +298,12 @@ chrtoblk(dev) #include "zsc_pcc.h" cons_decl(zsc_pcc); +#define zsc_pcctwocnpollc nullcnpollc +#define zsc_pcctwocngetc zsc_pcccngetc +#define zsc_pcctwocnputc zsc_pcccnputc +#include "zsc_pcctwo.h" +cons_decl(zsc_pcctwo); + #define clmpcccnpollc nullcnpollc #include "clmpcc_pcctwo.h" cons_decl(clmpcc); @@ -307,6 +313,9 @@ struct consdev constab[] = { #if NZSC_PCC > 0 cons_init(zsc_pcc), #endif +#if NZSC_PCCTWO > 0 + cons_init(zsc_pcctwo), +#endif #if NCLMPCC_PCCTWO > 0 cons_init(clmpcc), #endif diff --git a/sys/arch/mvme68k/mvme68k/locore.s b/sys/arch/mvme68k/mvme68k/locore.s index e1008eda752f..48a95f8d79da 100644 --- a/sys/arch/mvme68k/mvme68k/locore.s +++ b/sys/arch/mvme68k/mvme68k/locore.s @@ -1,4 +1,4 @@ -/* $NetBSD: locore.s,v 1.63 2000/08/20 21:50:10 thorpej Exp $ */ +/* $NetBSD: locore.s,v 1.64 2000/09/06 19:51:44 scw Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -254,11 +254,14 @@ Lnot147: /* MVME-162 - 68040 CPU/MMU/FPU */ cmpw #MVME_162,d0 jne Lnot162 + btst #6,0xfff4202e | MVME162LX 200/300 ? + jeq Lnotyet | We don't support any others + RELOC(mmutype,a0) movl #MMU_68040,a0@ RELOC(cputype,a0) movl #CPU_68040,a0@ - RELOC(fputype,a0) + RELOC(fputype,a0) | XXX What about FPU-less version? movl #FPU_68040,a0@ RELOC(vectab,a0) RELOC(buserr40,a1) @@ -266,12 +269,49 @@ Lnot147: movl a1,a0@(8) movl a2,a0@(12) -#if 1 /* XXX */ - jra Lnotyet -#else - /* XXX more XXX */ - jra Lstart1 -#endif + /* + * Determine if this board has a VMEchip2 + */ + btst #1,0xfff4202e | VMEchip2 presence detect + jne 1f | Jump if it doesn't exist. + + /* + * Disable all interrupts from VMEchip2. This is especially + * useful when the kernel doesn't have the VMEchip2 driver + * configured. If we didn't do this, then we're at the mercy + * of whatever VMEchip2 interrupts the ROM set up. For example, + * hitting the ABORT switch could kill the system... + */ + movl 0xfff40088,d0 + andl #0xff7fffff,d0 | Clear 'MIEN' + movl d0,0xfff40088 +1: + /* + * Determine how much onboard memory is installed + */ + movql #0x07,d0 + andb 0xfff42024,d0 + lea Ldramsize162,a0 + movl a0@(d0:w:4),d1 | Lookup the size + jeq Lmemcquery | Assume a MEMC chip if this is zero. + jra Lis16x_common + + .data + .even + /* + * Table of DRAM register size values -> actual size in bytes + */ +Ldramsize162: + .long 0x00100000 + .long 0x00200000 + .long 0x00000000 + .long 0x00400000 + .long 0x00400000 + .long 0x00800000 + .long 0x00000000 + .long 0x01000000 + .text + Lnot162: #endif @@ -294,12 +334,6 @@ Lis167: movl a1,a0@(8) movl a2,a0@(12) - /* Save our ethernet address */ - movel 0xfffc1f2e,d0 - lsll #8,d0 - RELOC(myea, a0) - movl d0,a0@ - /* * Disable all interrupts from VMEchip2. This is especially * useful when the kernel doesn't have the VMEchip2 driver @@ -310,16 +344,10 @@ Lis167: movl 0xfff40088,d0 andl #0xff7fffff,d0 | Clear 'MIEN' movl d0,0xfff40088 +#endif - /* - * Fix up the physical addresses of the MVME167's onboard - * I/O registers. - */ - RELOC(intiobase_phys, a0); - movl #INTIOBASE167,a0@ - RELOC(intiotop_phys, a0); - movl #INTIOTOP167,a0@ - +#if defined(MVME167) || defined(MVME162) +Lmemcquery: /* * Figure out the size of onboard DRAM by querying * the memory controller ASIC(s) @@ -338,6 +366,23 @@ Lis167: bsr memc040read addl d0,d1 #endif + +Lis16x_common: + /* Save our ethernet address */ + movel 0xfffc1f2e,d0 + lsll #8,d0 + RELOC(myea, a0) + movl d0,a0@ + + /* + * Fix up the physical addresses of the MVME167's onboard + * I/O registers. + */ + RELOC(intiobase_phys, a0); + movl #INTIOBASE167,a0@ + RELOC(intiotop_phys, a0); + movl #INTIOTOP167,a0@ + /* * Initialise first physical memory segment with onboard RAM details */ @@ -346,10 +391,37 @@ Lis167: movl d1,a0@(4) | phys_seg_list[0].ps_end clrl a0@(8) | phys_seg_list[0].ps_startpage - /* No offboard RAM (yet) */ + /* offboard RAM */ clrl a0@(0x0c) | phys_seg_list[1].ps_start - clrl a0@(0x10) | phys_seg_list[1].ps_end + movl #NBPG-1,d0 + addl 0xfffc0000,d0 | Start of offboard segment + andl #-NBPG,d0 | Round up to page boundary + beq Ldone167 | Jump if none defined + movl #NBPG,d1 | Note: implicit '+1' + addl 0xfffc0004,d1 | End of offboard segment + andl #-NBPG,d1 | Round up to page boundary + cmpl d1,d0 | Quick and dirty validity check + bcss Lramsave167 | Yup, looks good. + movel a0@(4),d1 | Just use onboard RAM otherwise + bras Ldone167 +Lramsave167: + movl d0,a0@(0x0c) | phys_seg_list[1].ps_start + movl d1,a0@(0x10) | phys_seg_list[1].ps_end + clrl a0@(0x14) | phys_seg_list[1].ps_startpage + + /* + * Offboard RAM needs to be cleared to zero to initialise parity + * on most VMEbus RAM cards. Without this, some cards will buserr + * when first read. + */ + movel d0,a0 | offboard start address again. +Lramclr167: + clrl a0@+ | zap a word + cmpl a0,d1 | reached end? + bnes Lramclr167 + +Ldone167: moveq #PGSHIFT,d2 lsrl d2,d1 | convert to page (click) number RELOC(maxmem, a0) diff --git a/sys/arch/mvme68k/mvme68k/machdep.c b/sys/arch/mvme68k/mvme68k/machdep.c index 6d5f600df933..62790266680b 100644 --- a/sys/arch/mvme68k/mvme68k/machdep.c +++ b/sys/arch/mvme68k/mvme68k/machdep.c @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.71 2000/08/20 17:07:44 scw Exp $ */ +/* $NetBSD: machdep.c,v 1.72 2000/09/06 19:51:45 scw Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -193,11 +193,7 @@ void mvme68k_init __P((void)); void mvme147_init __P((void)); #endif -#ifdef MVME162 -void mvme162_init __P((void)); -#endif - -#ifdef MVME167 +#if defined(MVME162) || defined(MVME167) #include void mvme167_init __P((void)); #endif @@ -240,13 +236,13 @@ mvme68k_init() mvme147_init(); break; #endif -#ifdef MVME162 - case MVME_162: - mvme162_init(); - break; -#endif #ifdef MVME167 case MVME_167: +#endif +#ifdef MVME162 + case MVME_162: +#endif +#if defined(MVME167) || defined(MVME162) mvme167_init(); break; #endif @@ -312,21 +308,9 @@ mvme147_init() } #endif /* MVME147 */ -#ifdef MVME162 +#if defined(MVME167) || defined(MVME162) /* - * MVME-162 specific initialization. - */ -void -mvme162_init() -{ - - /* XXX implement XXX */ -} -#endif /* MVME162 */ - -#ifdef MVME167 -/* - * MVME-167 specific initializaion. + * MVME-167 and MVME-162 specific initializaion. * * XXX Still needs to be bus_spaced XXX */