Make sure ABE/SYNCBE are enabled in HID1 for the 7450 CPUs
Enable XBSEN for the 7450.
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu_subr.c,v 1.76 2012/10/20 14:42:15 kiyohara Exp $ */
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/* $NetBSD: cpu_subr.c,v 1.77 2013/09/22 18:05:16 matt Exp $ */
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/*-
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* Copyright (c) 2001 Matt Thomas.
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@ -34,7 +34,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.76 2012/10/20 14:42:15 kiyohara Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.77 2013/09/22 18:05:16 matt Exp $");
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#include "opt_ppcparam.h"
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#include "opt_ppccache.h"
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@ -278,15 +278,31 @@ cpu_model_init(void)
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} else if (vers == MPC601) {
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oeacpufeat |= OEACPU_601;
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} else if (MPC745X_P(vers) && vers != MPC7450) {
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oeacpufeat |= OEACPU_HIGHSPRG;
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oeacpufeat |= OEACPU_XBSEN;
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oeacpufeat |= OEACPU_HIGHBAT;
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/* Enable more and larger BAT registers */
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} else if (MPC745X_P(vers)) {
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register_t hid0 = mfspr(SPR_HID0);
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register_t hid1 = mfspr(SPR_HID1);
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if (vers != MPC7450) {
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/* Enable more SPRG registers */
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oeacpufeat |= OEACPU_HIGHSPRG;
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/* Enable more BAT registers */
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oeacpufeat |= OEACPU_HIGHBAT;
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hid0 |= HID0_HIGH_BAT_EN;
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}
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/* Enable larger BAT registers */
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oeacpufeat |= OEACPU_XBSEN;
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hid0 |= HID0_XBSEN;
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hid0 |= HID0_HIGH_BAT_EN;
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/* Enable address broadcasting for MP systems */
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hid1 |= HID1_SYNCBE | HID1_ABE;
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mtspr(SPR_HID0, hid0);
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__asm volatile("sync;isync");
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mtspr(SPR_HID0, hid1);
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__asm volatile("sync;isync");
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} else if (vers == IBM750FX || vers == IBM750GX) {
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oeacpufeat |= OEACPU_HIGHBAT;
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