Remove obsolete ssir stuff which was used for pre-5.0 softintr(9).

No visible problem on X68030.
This commit is contained in:
tsutsui 2014-03-22 21:49:18 +00:00
parent 52afc2f519
commit 7e5b560932
3 changed files with 21 additions and 75 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.20 2008/06/23 01:49:31 isaki Exp $ */
/* $NetBSD: intr.h,v 1.21 2014/03/22 21:49:18 tsutsui Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -34,8 +34,7 @@
#include <machine/psl.h>
/* spl0 requires checking for software interrupts */
void spl0(void);
#define spl0() _spl0()
#define splsoftbio() splraise1()
#define splsoftclock() splraise1()
@ -48,9 +47,6 @@ void spl0(void);
#define splnone() spl0()
#define splzs() splraise5() /* disallow serial interrupts */
/* watch out for side effects */
#define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0())
#define IPL_NONE 0
#define IPL_SOFTCLOCK 1
#define IPL_SOFTBIO 2
@ -82,4 +78,10 @@ splraiseipl(ipl_cookie_t icookie)
return _splraise(icookie._psl);
}
static inline void
splx(int sr)
{
__asm volatile("movew %0,%%sr" : : "di" (sr));
}
#endif /* !_X68K_INTR_H_ */

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@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.116 2014/03/22 15:59:07 tsutsui Exp $ */
/* $NetBSD: locore.s,v 1.117 2014/03/22 21:49:18 tsutsui Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -502,14 +502,8 @@ ENTRY_NOPROFILE(trap0)
movl %d0,%sp@- | push syscall number
jbsr _C_LABEL(syscall) | handle it
addql #4,%sp | pop syscall arg
tstl _C_LABEL(astpending)
jne Lrei2
tstb _C_LABEL(ssir)
jeq Ltrap1
movw #SPL1,%sr
tstb _C_LABEL(ssir)
jne Lsir1
Ltrap1:
tstl _C_LABEL(astpending) | AST pending?
jne Lrei | yes, handle it via trap
movl %sp@(FR_SP),%a0 | grab and restore
movl %a0,%usp | user SP
moveml %sp@+,#0x7FFF | restore most registers
@ -737,20 +731,23 @@ ENTRY_NOPROFILE(fdeject)
ASENTRY_NOPROFILE(rei)
tstl _C_LABEL(astpending) | AST pending?
jeq Lchksir | no, go check for SIR
Lrei1:
jne 1f | no, done
rte
1:
btst #5,%sp@ | yes, are we returning to user mode?
jne Lchksir | no, go check for SIR
beq 2f | no, done
rte
2:
movw #PSL_LOWIPL,%sr | lower SPL
clrl %sp@- | stack adjust
moveml #0xFFFF,%sp@- | save all registers
movl %usp,%a1 | including
movl %a1,%sp@(FR_SP) | the users SP
Lrei2:
Lrei:
clrl %sp@- | VA == none
clrl %sp@- | code == none
movl #T_ASTFLT,%sp@- | type == async system trap
pea %sp@(12) | fp = trap frame address
pea %sp@(12) | fp == trap frame address
jbsr _C_LABEL(trap) | go handle it
lea %sp@(16),%sp | pop value args
movl %sp@(FR_SP),%a0 | restore user SP
@ -771,38 +768,6 @@ Laststkadj:
moveml %sp@+,#0x7FFF | restore user registers
movl %sp@,%sp | and our SP
rte | and do real RTE
Lchksir:
tstb _C_LABEL(ssir) | SIR pending?
jeq Ldorte | no, all done
movl %d0,%sp@- | need a scratch register
movw %sp@(4),%d0 | get SR
andw #PSL_IPL7,%d0 | mask all but IPL
jne Lnosir | came from interrupt, no can do
movl %sp@+,%d0 | restore scratch register
Lgotsir:
movw #SPL1,%sr | prevent others from servicing int
tstb _C_LABEL(ssir) | too late?
jeq Ldorte | yes, oh well...
clrl %sp@- | stack adjust
moveml #0xFFFF,%sp@- | save all registers
movl %usp,%a1 | including
movl %a1,%sp@(FR_SP) | the users SP
Lsir1:
clrl %sp@- | VA == none
clrl %sp@- | code == none
movl #T_SSIR,%sp@- | type == software interrupt
pea %sp@(12) | fp = trap frame address
jbsr _C_LABEL(trap) | go handle it
lea %sp@(16),%sp | pop value args
movl %sp@(FR_SP),%a0 | restore
movl %a0,%usp | user SP
moveml %sp@+,#0x7FFF | and all remaining registers
addql #8,%sp | pop SP and stack adjust
rte
Lnosir:
movl %sp@+,%d0 | restore scratch register
Ldorte:
rte | real return
/*
* Use common m68k sigcode.
@ -908,26 +873,6 @@ Lploadwskp:
#endif
rts
/*
* Set processor priority level calls. Most are implemented with
* inline asm expansions. However, spl0 requires special handling
* as we need to check for our emulated software interrupts.
*/
ENTRY(spl0)
moveq #0,%d0
movw %sr,%d0 | get old SR for return
movw #PSL_LOWIPL,%sr | restore new SR
tstb _C_LABEL(ssir) | software interrupt pending?
jeq Lspldone | no, all done
subql #4,%sp | make room for RTE frame
movl %sp@(4),%sp@(2) | position return address
clrw %sp@(6) | set frame type 0
movw #PSL_LOWIPL,%sp@ | and new SR
jra Lgotsir | go handle it
Lspldone:
rts
/*
* _delay(u_int N)
*

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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.187 2013/10/27 02:06:06 tsutsui Exp $ */
/* $NetBSD: machdep.c,v 1.188 2014/03/22 21:49:18 tsutsui Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.187 2013/10/27 02:06:06 tsutsui Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.188 2014/03/22 21:49:18 tsutsui Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@ -1218,7 +1218,6 @@ setmemrange(void)
#endif
}
volatile int ssir;
int idepth;
bool