New sentence, new line. Remove superfluous .Pp. Improve markup.
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@ -1,4 +1,4 @@
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.\" $NetBSD: epgpio.4,v 1.1 2009/02/27 03:13:55 kenh Exp $
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.\" $NetBSD: epgpio.4,v 1.2 2009/02/27 10:39:03 wiz Exp $
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.\"
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.\" Copyright (c) 2009 Ken Hornstein.
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.\" All rights reserved
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@ -46,7 +46,8 @@
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The
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.Nm
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driver provides support for the on-board General Purpose I/O (GPIO) pins on
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the Cirrus Logic EP93xx series of processors. There are 8 GPIO ports (Ports
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the Cirrus Logic EP93xx series of processors.
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There are 8 GPIO ports (Ports
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A though H) each having 8 GPIO pins available (note: early revisions of
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some EP9301 processors have some ports with less than eight pins available
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on each port; check the documentation for your specific processor).
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@ -57,7 +58,8 @@ driver provides a
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.Xr gpio 4
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controller interface and will attach each port as a separate
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.Xr gpio 4
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device with 8 pins available. All pins are bidirectional; when used
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device with 8 pins available.
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All pins are bidirectional; when used
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as inputs they should not be driven beyond TTL voltage levels, but
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for exact details on the electrical interface the documentation for
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the specific evbarm board should be consulted.
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@ -79,18 +81,19 @@ driver.
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.Pp
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Each of these options is a bitmask specifying the pins available to the
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.Xr gpio 4
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controller for the corresponding port. Pins should be disabled if they
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controller for the corresponding port.
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Pins should be disabled if they
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are not available or are being used by the hardware for other purposes.
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The default mask is
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.Dq 0xff
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for all ports.
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.Pp
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.Sh IMPLEMENTATION NOTES
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When a port bitmask configures less than 8 pins available, the remaining
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pins will appear as sequentially numbered pins to the
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.Xr gpio 4
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interface. For example, if
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.Em EPGPIO_PORT_A_MASK
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interface.
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For example, if
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.Dv EPGPIO_PORT_A_MASK
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is set to
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.Dq 0x2c ,
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Port A pins 1, 3, and 5 will appear as
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