More updates to the cxgb stuff. Now it actually starts configuring and
talking to the hardware.
This commit is contained in:
parent
7b060c43f2
commit
7e18461fc5
@ -396,7 +396,12 @@ t3_os_pci_read_config_2(adapter_t *adapter, int reg, uint16_t *val)
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*val = pci_read_config(adapter->dev, reg, 2);
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#endif
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#ifdef __NetBSD__
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*val = (pci_conf_read(adapter->chip, adapter->tag, reg)&0xffff);
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uint32_t temp;
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temp = pci_conf_read(adapter->chip, adapter->tag, reg&0xfc);
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if (reg&0x2)
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*val = (temp>>16)&0xffff;
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else
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*val = temp&0xffff;
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#endif
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}
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@ -407,8 +412,12 @@ t3_os_pci_write_config_2(adapter_t *adapter, int reg, uint16_t val)
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pci_write_config(adapter->dev, reg, val, 2);
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#endif
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#ifdef __NetBSD__
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pci_conf_write(adapter->chip, adapter->tag, reg,
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(pci_conf_read(adapter->chip, adapter->tag, reg)&0xffff0000)|val);
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uint32_t temp = pci_conf_read(adapter->chip, adapter->tag, reg&0xfc);
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if (reg&0x2)
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temp = (temp&0xffff)|(val<<16);
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else
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temp = (temp&0xffff0000)|val;
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pci_conf_write(adapter->chip, adapter->tag, reg&0xfc, temp);
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#endif
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}
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@ -169,7 +169,7 @@ static int offload_close(struct toedev *tdev);
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static d_ioctl_t cxgb_extension_ioctl;
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#endif
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#ifdef __NetBSD__
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static int cxgb_extension_ioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *mylwp);
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static int cxgb_extension_ioctl(dev_t dev, uint32_t cmd, void *data, int fflag, struct lwp *mylwp);
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#endif
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#endif
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@ -197,7 +197,7 @@ DRIVER_MODULE(cxgbc, pci, cxgb_controller_driver, cxgb_controller_devclass, 0, 0
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#endif
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#ifdef __NetBSD__
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CFATTACH_DECL(cxgb, sizeof(struct adapter), cxgb_controller_match, cxgb_controller_attach, cxgb_controller_detach, NULL);
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CFATTACH_DECL(cxgbc, sizeof(struct adapter), cxgb_controller_match, cxgb_controller_attach, cxgb_controller_detach, NULL);
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#endif
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/*
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@ -234,7 +234,7 @@ DRIVER_MODULE(cxgb, cxgbc, cxgb_port_driver, cxgb_port_devclass, 0, 0);
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#endif
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#ifdef __NetBSD__
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CFATTACH_DECL(cxgbp, 0, cxgb_port_match, cxgb_port_attach, cxgb_port_detach, NULL);
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CFATTACH_DECL(cxgb, 0, cxgb_port_match, cxgb_port_attach, cxgb_port_detach, NULL);
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#endif
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#define SGE_MSIX_COUNT (SGE_QSETS + 1)
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@ -425,18 +425,14 @@ static int cxgb_controller_match(device_t dev, struct cfdata *match, void *conte
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{
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struct pci_attach_args *pa = context;
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const struct adapter_info *ai;
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static int printed = 0;
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ai = cxgb_get_adapter_info(pa);
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if (ai == NULL)
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return (0);
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if (printed++ == 0)
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{
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printf("%s RNIC, %d port(s)", ai->desc, ai->nports);
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}
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printf("%s, %d port(s)\n", ai->desc, ai->nports);
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return (100); // ???????????
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return (100); // we ARE the best driver for this card!!
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}
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#endif
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@ -470,6 +466,23 @@ upgrade_fw(adapter_t *sc)
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}
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#endif
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#ifdef __NetBSD__
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int cxgb_cfprint(void *aux, const char *info);
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int cxgb_cfprint(void *aux, const char *info)
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{
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struct cxgb_attach_args *cxgb_args = aux;
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printf("cxgb_cfprint - port = %d\n", cxgb_args->port);
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if (info)
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printf("cxgb_cfprint(%p, \"%s\")\n", aux, info);
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else
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printf("cxgb_cfprint(%p, NULL)\n", aux);
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return (QUIET);
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}
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#endif
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#ifdef __FreeBSD__
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static int
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cxgb_controller_attach(device_t dev)
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@ -487,14 +500,19 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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#ifdef __NetBSD__
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struct adapter *sc = (struct adapter *)self; // device is first thing in adapter
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struct pci_attach_args *pa = context;
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struct cxgb_attach_args cxgb_args;
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#endif
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int i, error = 0;
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#ifdef MSI_SUPPORTED
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int reg, msi_needed;
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int msi_needed;
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#endif
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int reg;
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uint32_t vers;
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int port_qsets = 1;
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MARK;
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printf("dev=%p, sc=%p\n", dev, sc);
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sc->dev = dev;
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#ifdef __NetBSD__
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sc->chip = pa->pa_pc;
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@ -502,16 +520,22 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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#endif
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sc->msi_count = 0;
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#ifdef __FreeBSD__
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/* find the PCIe link width and set max read request to 4KB*/
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if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) {
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#ifdef __FreeBSD__
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reg = t3_os_find_pci_capability(sc, PCIY_EXPRESS);
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#endif
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#ifdef __NetBSD__
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reg = t3_os_find_pci_capability(sc, PCI_CAP_PCIEXPRESS);
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#endif
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if (reg) {
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uint16_t lnk, pectl;
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lnk = pci_read_config(dev, reg + 0x12, 2);
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printf("PCI express card\n");
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t3_os_pci_read_config_2(sc, reg + 0x12, &lnk);
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sc->link_width = (lnk >> 4) & 0x3f;
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pectl = pci_read_config(dev, reg + 0x8, 2);
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t3_os_pci_read_config_2(sc, reg + 0x8, &pectl);
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pectl = (pectl & ~0x7000) | (5 << 12);
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pci_write_config(dev, reg + 0x8, pectl, 2);
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t3_os_pci_write_config_2(sc, reg + 0x8, pectl);
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}
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if (sc->link_width != 0 && sc->link_width <= 4) {
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device_printf(sc->dev,
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@ -519,12 +543,20 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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sc->link_width);
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}
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#ifdef __FreeBSD__
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pci_enable_busmaster(dev);
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#endif
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#ifdef __NetBSD__
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t3_os_pci_read_config_4(sc, PCI_COMMAND_STATUS_REG, ®);
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reg |= PCI_COMMAND_MASTER_ENABLE;
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t3_os_pci_write_config_4(sc, PCI_COMMAND_STATUS_REG, reg);
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#endif
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/*
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* Allocate the registers and make them available to the driver.
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* The registers that we care about for NIC mode are in BAR 0
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*/
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#ifdef __FreeBSD__
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sc->regs_rid = PCIR_BAR(0);
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if ((sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->regs_rid, RF_ACTIVE)) == NULL) {
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@ -532,6 +564,13 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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return (ENXIO);
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}
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#endif
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#ifdef __NetBSD__
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sc->regs_rid = PCI_MAPREG_START;
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t3_os_pci_read_config_4(sc, PCI_MAPREG_START, ®);
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printf("BAR0 = %08x\n", reg);
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// call bus_space_map
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#endif
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mtx_init(&sc->sge.reg_lock, "SGE reg lock", NULL, MTX_DEF);
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mtx_init(&sc->lock, "cxgb controller lock", NULL, MTX_DEF);
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@ -549,11 +588,14 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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#ifdef __NetBSD__
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ai = cxgb_get_adapter_info(pa);
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#endif
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MARK;
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if (t3_prep_adapter(sc, ai, 1) < 0) {
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MARK;
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error = ENODEV;
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goto out;
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}
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MARK;
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#ifdef MSI_SUPPORTED
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/* Allocate the BAR for doing MSI-X. If it succeeds, try to allocate
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* enough messages for the queue sets. If that fails, try falling
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@ -602,6 +644,7 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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sc->irq_rid = 0;
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sc->cxgb_intr = t3b_intr;
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}
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MARK;
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#ifdef __FreeBSD__
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/* Create a private taskqueue thread for handling driver events */
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@ -630,7 +673,10 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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callout_init(&sc->cxgb_tick_ch);
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#endif
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MARK;
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if (t3_check_fw_version(sc) != 0) {
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MARK;
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/*
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* Warn user that a firmware update will be attempted in init.
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*/
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@ -653,6 +699,7 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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* Create a child device for each MAC. The ethernet attachment
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* will be done in these children.
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*/
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printf("nports=%d\n", (sc)->params.nports);
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for (i = 0; i < (sc)->params.nports; i++) {
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#ifdef __FreeBSD__
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if ((child = device_add_child(dev, "cxgb", -1)) == NULL) {
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@ -663,7 +710,8 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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#endif
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#ifdef __NetBSD__
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// XXXXXXXXXXXXXXXXXXXXXXXXXX
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child = NULL; // XXXXXXXXXXXXXXXXXXXXXXX
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cxgb_args.port = i;
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child = config_found_sm_loc(self, NULL, NULL, &cxgb_args, cxgb_cfprint, NULL);
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#endif
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sc->portdev[i] = child;
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sc->port[i].adapter = sc;
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@ -687,8 +735,10 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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*/
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sc->params.stats_update_period = 1;
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MARK;
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/* initialize sge private state */
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t3_sge_init_sw(sc);
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MARK;
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t3_led_ready(sc);
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@ -709,8 +759,10 @@ cxgb_controller_attach(device_t dev, device_t self, void *context)
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t3_add_sysctls(sc);
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#endif
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out:
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MARK;
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if (error)
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cxgb_free(sc);
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MARK;
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#ifdef __FreeBSD__
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return (error);
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#endif
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@ -731,6 +783,8 @@ static int cxgb_controller_detach(device_t dev, int flags)
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struct adapter *sc = (struct adapter *)dev; // device is first thing in adapter
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#endif
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MARK;
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printf("dev=%p, sc=%p\n", dev, sc);
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cxgb_free(sc);
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return (0);
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@ -883,7 +937,7 @@ cxgb_setup_msix(adapter_t *sc, int msix_count)
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rid = k + 2;
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if (cxgb_debug)
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printf("rid=%d ", rid);
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printf("rid=%d\n", rid);
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#ifdef __FreeBSD__
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if ((sc->msix_irq_res[k] = bus_alloc_resource_any(
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sc->dev, SYS_RES_IRQ, &rid,
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@ -929,7 +983,14 @@ static int cxgb_port_match(device_t dev, struct cfdata *match, void *context)
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{
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struct port_info *p = (struct port_info *)dev; // device is first thing in adapter
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char buf[80];
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struct cxgb_attach_args *cxgb_args = context;
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printf("cxgb_port_match(%p, %p, %p)\n", dev, match, context);
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printf("port = %d\n", cxgb_args->port);
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return (0);
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printf("==> port %d %s\n", p->port, p->port_type->desc);
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snprintf(buf, sizeof(buf), "Port %d %s", p->port, p->port_type->desc);
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// device_set_desc_copy(dev, buf);
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@ -1074,7 +1135,7 @@ static void cxgb_port_attach(device_t dev, device_t self, void *context)
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#ifdef __FreeBSD__
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ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO);
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#endif
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ifp->if_baudrate = 100000000;
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ifp->if_baudrate = 10000000000;
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ether_ifattach(ifp, p->hw_addr);
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#ifdef DEFAULT_JUMBO
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@ -1194,8 +1255,8 @@ t3_fatal_err(struct adapter *sc)
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int
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t3_os_find_pci_capability(adapter_t *sc, int cap)
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{
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#if 0
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device_t dev;
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#ifdef __FreeBSD__
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struct pci_devinfo *dinfo;
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pcicfgregs *cfg;
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uint32_t status;
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@ -1228,6 +1289,43 @@ t3_os_find_pci_capability(adapter_t *sc, int cap)
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return (ptr);
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ptr = pci_read_config(dev, ptr + PCICAP_NEXTPTR, 1);
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}
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#endif
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#ifdef __NetBSD__
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uint32_t status;
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uint32_t bhlc;
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uint32_t temp;
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uint8_t ptr;
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dev = sc->dev;
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status = pci_conf_read(sc->chip, sc->tag, PCI_COMMAND_STATUS_REG);
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if (!(status&PCI_STATUS_CAPLIST_SUPPORT))
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return (0);
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bhlc = pci_conf_read(sc->chip, sc->tag, PCI_BHLC_REG);
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switch (PCI_HDRTYPE(bhlc))
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{
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case 0:
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case 1:
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ptr = PCI_CAPLISTPTR_REG;
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break;
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case 2:
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ptr = PCI_CARDBUS_CAPLISTPTR_REG;
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break;
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default:
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return (0);
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}
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temp = pci_conf_read(sc->chip, sc->tag, ptr);
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ptr = PCI_CAPLIST_PTR(temp);
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while (ptr != 0) {
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temp = pci_conf_read(sc->chip, sc->tag, ptr);
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if (PCI_CAPLIST_CAP(temp) == cap)
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return (ptr);
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ptr = PCI_CAPLIST_NEXT(temp);
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}
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#endif
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return (0);
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}
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@ -2256,7 +2354,7 @@ cxgb_extension_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data,
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#endif
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#ifdef __NetBSD__
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static int
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cxgb_extension_ioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *mylwp)
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cxgb_extension_ioctl(dev_t dev, uint32_t cmd, void *data, int fflag, struct lwp *mylwp)
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#endif
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{
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int mmd, error = 0;
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@ -96,6 +96,8 @@ static inline void device_printf(device_t d, ...)
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#define callout_drain(x) callout_stop(x)
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#define MARK printf(__FILE__"(%d):\n", __LINE__)
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static inline int atomic_cmpset_ptr(volatile long *dst, long exp, long src)
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{
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if (*dst == exp)
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@ -124,6 +126,13 @@ struct task
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void *context;
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};
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struct cxgb_attach_args
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{
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int port;
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};
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#define INT3 __asm("int $3")
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static inline struct mbuf *
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m_defrag(struct mbuf *m0, int flags)
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{
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@ -198,7 +198,7 @@ static uint8_t flit_desc_map[] = {
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static int lro_default = 0;
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int cxgb_debug = 0;
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int cxgb_debug = 1;
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#define my_static
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@ -565,6 +565,7 @@ int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data)
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}
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t3_os_pci_read_config_4(adapter, base + PCI_VPD_DATA, data);
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*data = le32_to_cpu(*data);
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printf("t3_seeprom_read() succeeded!\n");
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return 0;
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}
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@ -670,6 +671,7 @@ static int get_vpd_params(adapter_t *adapter, struct vpd_params *p)
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for (i = 0; i < 6; i++)
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p->eth_base[i] = hex2int(vpd.na_data[2 * i]) * 16 +
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hex2int(vpd.na_data[2 * i + 1]);
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printf("get_vpd_params() succeeded!\n");
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return 0;
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}
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@ -3451,7 +3453,10 @@ int __devinit t3_prep_adapter(adapter_t *adapter,
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return ret;
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if (reset && t3_reset_adapter(adapter))
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{
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printf("t3_reset_adapter() failed!\n");
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return -1;
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}
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t3_sge_prep(adapter, &adapter->params.sge);
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@ -1,4 +1,4 @@
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# $NetBSD: files.pci,v 1.292 2007/07/09 01:14:05 jklos Exp $
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# $NetBSD: files.pci,v 1.293 2007/07/10 06:07:55 jklos Exp $
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#
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# Config file and device description for machine-independent PCI code.
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# Included by ports that need it. Requires that the SCSI files be
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@ -781,19 +781,21 @@ file dev/pci/radeonfb_bios.c radeonfb
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defflag opt_radeonfb.h RADEONFB_DEBUG
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# Chelsio Terminator 3 (T3) 10 gigabit ethernet
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device cxgbc { }
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attach cxgbc at pci
|
||||
device cxgb: ether, ifnet, arp
|
||||
attach cxgb at pci
|
||||
file dev/pci/cxgb_main.c cxgb
|
||||
file dev/pci/cxgb_mc5.c cxgb
|
||||
file dev/pci/cxgb_vsc8211.c cxgb
|
||||
file dev/pci/cxgb_ael1002.c cxgb
|
||||
file dev/pci/cxgb_mv88e1xxx.c cxgb
|
||||
file dev/pci/cxgb_xgmac.c cxgb
|
||||
file dev/pci/cxgb_t3_hw.c cxgb
|
||||
file dev/pci/cxgb_sge.c cxgb
|
||||
file dev/pci/cxgb_lro.c cxgb
|
||||
file dev/pci/cxgb_offload.c cxgb
|
||||
file dev/pci/cxgb_l2t.c cxgb
|
||||
attach cxgb at cxgbc
|
||||
file dev/pci/cxgb_main.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_mc5.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_vsc8211.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_ael1002.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_mv88e1xxx.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_xgmac.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_t3_hw.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_sge.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_lro.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_offload.c cxgbc | cxgb
|
||||
file dev/pci/cxgb_l2t.c cxgbc | cxgb
|
||||
|
||||
# Chips & Technologies 65550 framebuffer console driver
|
||||
device chipsfb: wsemuldisplaydev, rasops8, vcons, videomode
|
||||
|
Loading…
Reference in New Issue
Block a user